Content Addressable Memories (CAMs) are memories in which data is selected based on its contents, rather than its physical location. This function is useful for many applications, especially when performing a look-up for the purposes of mapping from a long identification word to a shorter word. This operation is required in many telecom functions, including Asynchronous Transfer Mode (ATM) address translation.
U.S. Pat. No. 5,289,403 granted to J. D. Yetter discloses a technique of providing self-timing to a CAM, using a model column and model row. The bit at the intersection of the model column and model row always misses, while all other cells in that row always match, and this generates the slowest possible mismatch condition on the model match line. This signal is then used to generate a clock for timing of subsequent events, and for qualifying all other match lines. Word-sliced architectures, control signal generation, and power-up issues are not addressed.
A paper by A. L. Silburt et al. entitled "A 180-MHz 0.8-um BiCMOS Modular Memory Family of DRAM and Multiport SRAM", IEEE J. Solid-State Circuits, vol. 28, no. 3, pp. 222-232, March 1993, describes modular embedded memory designs which employ model self-timing paths to achieve low power and duty cycle independence. These model paths comprise model decoders, model rows and model columns. CAMs are not addressed in the paper.
U.S. Pat. No. 5,596,539 granted to R. H. Passow et al. discloses a mechanism similar to that in A. L. Silburt et al., employing a model row and a model column. The model sense amplifier is unbalanced to provide additional timing margin. Again, CAMs are not addressed.
A paper by S. Kornachuk et al. entitled "A High Speed Embedded Cache Design with Non-Intrusive BIST", Records IEEE International Workshop on Memory Technology, Design and Testing, pp. 40-45, August 1994, describes a self-timing path for a combined CAM/RAM cache, comprising a model word which always misses in the slowest possible way. Word-sliced architectures, control signal generation, and power-up issues are not addressed.