x86
stringlengths 321
23.7M
| arm
stringlengths 335
24.4M
|
|---|---|
.file "50400.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "50400.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "77346.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "floating"
.LC1:
.string "transient"
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 320
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov QWORD PTR -320[rbp], 0
mov edi, 0
call XOpenDisplay@PLT
mov QWORD PTR -312[rbp], rax
cmp QWORD PTR -312[rbp], 0
jne .L2
mov edi, 1
call exit@PLT
.L2:
mov rax, QWORD PTR -312[rbp]
mov rdx, QWORD PTR 232[rax]
mov rax, QWORD PTR -312[rbp]
mov eax, DWORD PTR 224[rax]
cdqe
sal rax, 7
add rax, rdx
mov rax, QWORD PTR 16[rax]
mov QWORD PTR -304[rbp], rax
mov rsi, QWORD PTR -304[rbp]
mov rax, QWORD PTR -312[rbp]
sub rsp, 8
push 0
push 0
push 0
mov r9d, 400
mov r8d, 400
mov ecx, 100
mov edx, 100
mov rdi, rax
call XCreateSimpleWindow@PLT
add rsp, 32
mov QWORD PTR -296[rbp], rax
mov DWORD PTR -252[rbp], 400
mov eax, DWORD PTR -252[rbp]
mov DWORD PTR -260[rbp], eax
mov eax, DWORD PTR -260[rbp]
mov DWORD PTR -256[rbp], eax
mov eax, DWORD PTR -256[rbp]
mov DWORD PTR -264[rbp], eax
mov QWORD PTR -288[rbp], 48
lea rdx, -288[rbp]
mov rcx, QWORD PTR -296[rbp]
mov rax, QWORD PTR -312[rbp]
mov rsi, rcx
mov rdi, rax
call XSetWMNormalHints@PLT
mov rcx, QWORD PTR -296[rbp]
mov rax, QWORD PTR -312[rbp]
lea rdx, .LC0[rip]
mov rsi, rcx
mov rdi, rax
call XStoreName@PLT
mov rdx, QWORD PTR -296[rbp]
mov rax, QWORD PTR -312[rbp]
mov rsi, rdx
mov rdi, rax
call XMapWindow@PLT
mov rcx, QWORD PTR -296[rbp]
mov rax, QWORD PTR -312[rbp]
mov edx, 32768
mov rsi, rcx
mov rdi, rax
call XSelectInput@PLT
.L4:
lea rdx, -208[rbp]
mov rax, QWORD PTR -312[rbp]
mov rsi, rdx
mov rdi, rax
call XNextEvent@PLT
cmp QWORD PTR -320[rbp], 0
jne .L4
mov edi, 5
call sleep@PLT
mov rsi, QWORD PTR -304[rbp]
mov rax, QWORD PTR -312[rbp]
sub rsp, 8
push 0
push 0
push 0
mov r9d, 100
mov r8d, 100
mov ecx, 50
mov edx, 50
mov rdi, rax
call XCreateSimpleWindow@PLT
add rsp, 32
mov QWORD PTR -320[rbp], rax
mov rdx, QWORD PTR -296[rbp]
mov rcx, QWORD PTR -320[rbp]
mov rax, QWORD PTR -312[rbp]
mov rsi, rcx
mov rdi, rax
call XSetTransientForHint@PLT
mov rcx, QWORD PTR -320[rbp]
mov rax, QWORD PTR -312[rbp]
lea rdx, .LC1[rip]
mov rsi, rcx
mov rdi, rax
call XStoreName@PLT
mov rdx, QWORD PTR -320[rbp]
mov rax, QWORD PTR -312[rbp]
mov rsi, rdx
mov rdi, rax
call XMapWindow@PLT
mov rcx, QWORD PTR -320[rbp]
mov rax, QWORD PTR -312[rbp]
mov edx, 32768
mov rsi, rcx
mov rdi, rax
call XSelectInput@PLT
jmp .L4
.cfi_endproc
.LFE6:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "77346.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "floating\000"
.align 2
.LC1:
.ascii "transient\000"
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 192
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #216
ldr r3, .L6
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-192]
mov r0, #0
bl XOpenDisplay
str r0, [fp, #-188]
ldr r3, [fp, #-188]
cmp r3, #0
bne .L2
mov r0, #1
bl exit
.L2:
ldr r3, [fp, #-188]
ldr r2, [r3, #140]
ldr r3, [fp, #-188]
ldr r3, [r3, #132]
mov r1, r3
mov r3, r1
lsl r3, r3, #2
add r3, r3, r1
lsl r3, r3, #4
add r3, r2, r3
ldr r3, [r3, #8]
str r3, [fp, #-184]
mov r3, #0
str r3, [sp, #16]
mov r3, #0
str r3, [sp, #12]
mov r3, #0
str r3, [sp, #8]
mov r3, #400
str r3, [sp, #4]
mov r3, #400
str r3, [sp]
mov r3, #100
mov r2, #100
ldr r1, [fp, #-184]
ldr r0, [fp, #-188]
bl XCreateSimpleWindow
str r0, [fp, #-180]
mov r3, #400
str r3, [fp, #-144]
ldr r3, [fp, #-144]
str r3, [fp, #-152]
ldr r3, [fp, #-152]
str r3, [fp, #-148]
ldr r3, [fp, #-148]
str r3, [fp, #-156]
mov r3, #48
str r3, [fp, #-176]
sub r3, fp, #176
mov r2, r3
ldr r1, [fp, #-180]
ldr r0, [fp, #-188]
bl XSetWMNormalHints
ldr r2, .L6+4
ldr r1, [fp, #-180]
ldr r0, [fp, #-188]
bl XStoreName
ldr r1, [fp, #-180]
ldr r0, [fp, #-188]
bl XMapWindow
mov r2, #32768
ldr r1, [fp, #-180]
ldr r0, [fp, #-188]
bl XSelectInput
.L4:
sub r3, fp, #104
mov r1, r3
ldr r0, [fp, #-188]
bl XNextEvent
ldr r3, [fp, #-192]
cmp r3, #0
bne .L4
mov r0, #5
bl sleep
mov r3, #0
str r3, [sp, #16]
mov r3, #0
str r3, [sp, #12]
mov r3, #0
str r3, [sp, #8]
mov r3, #100
str r3, [sp, #4]
mov r3, #100
str r3, [sp]
mov r3, #50
mov r2, #50
ldr r1, [fp, #-184]
ldr r0, [fp, #-188]
bl XCreateSimpleWindow
str r0, [fp, #-192]
ldr r2, [fp, #-180]
ldr r1, [fp, #-192]
ldr r0, [fp, #-188]
bl XSetTransientForHint
ldr r2, .L6+8
ldr r1, [fp, #-192]
ldr r0, [fp, #-188]
bl XStoreName
ldr r1, [fp, #-192]
ldr r0, [fp, #-188]
bl XMapWindow
mov r2, #32768
ldr r1, [fp, #-192]
ldr r0, [fp, #-188]
bl XSelectInput
b .L4
.L7:
.align 2
.L6:
.word .LC2
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "874180.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "Jane"
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov DWORD PTR -20[rbp], edi
mov QWORD PTR -32[rbp], rsi
mov edi, 16
call malloc@PLT
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
lea rdx, .LC0[rip]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -8[rbp]
mov DWORD PTR 8[rax], 1
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call free@PLT
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "874180.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Jane\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r0, #8
bl malloc
mov r3, r0
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldr r2, .L3
str r2, [r3]
ldr r3, [fp, #-8]
mov r2, #1
str r2, [r3, #4]
ldr r0, [fp, #-8]
bl free
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L4:
.align 2
.L3:
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "240939.c"
.intel_syntax noprefix
.text
.globl bar
.type bar, @function
bar:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 208
mov QWORD PTR -136[rbp], rdi
movsd QWORD PTR -144[rbp], xmm0
movsd QWORD PTR -152[rbp], xmm1
movsd QWORD PTR -160[rbp], xmm2
movsd QWORD PTR -168[rbp], xmm3
movsd QWORD PTR -176[rbp], xmm4
movsd QWORD PTR -184[rbp], xmm5
movsd QWORD PTR -192[rbp], xmm6
movsd QWORD PTR -200[rbp], xmm7
mov QWORD PTR -208[rbp], rsi
movsd xmm1, QWORD PTR 16[rbp]
movsd xmm0, QWORD PTR .LC0[rip]
mulsd xmm0, xmm1
movsd QWORD PTR -128[rbp], xmm0
movsd xmm1, QWORD PTR -160[rbp]
movsd xmm0, QWORD PTR .LC1[rip]
mulsd xmm1, xmm0
movsd xmm0, QWORD PTR -144[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -120[rbp], xmm0
movsd xmm1, QWORD PTR -176[rbp]
movsd xmm0, QWORD PTR .LC2[rip]
mulsd xmm0, xmm1
movsd QWORD PTR -112[rbp], xmm0
movsd xmm0, QWORD PTR -176[rbp]
subsd xmm0, QWORD PTR -192[rbp]
movsd QWORD PTR -104[rbp], xmm0
movsd xmm1, QWORD PTR -184[rbp]
movsd xmm0, QWORD PTR .LC1[rip]
mulsd xmm0, xmm1
addsd xmm0, QWORD PTR -152[rbp]
subsd xmm0, QWORD PTR -200[rbp]
movsd QWORD PTR -96[rbp], xmm0
movsd xmm0, QWORD PTR -184[rbp]
movapd xmm1, xmm0
addsd xmm1, xmm0
movsd xmm0, QWORD PTR -168[rbp]
subsd xmm0, xmm1
addsd xmm0, QWORD PTR -200[rbp]
addsd xmm0, xmm0
movsd QWORD PTR -88[rbp], xmm0
movsd xmm0, QWORD PTR -184[rbp]
subsd xmm0, QWORD PTR -200[rbp]
movsd QWORD PTR -80[rbp], xmm0
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -120[rbp]
jp .L9
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -120[rbp]
je .L2
.L9:
pxor xmm0, xmm0
movsd QWORD PTR -72[rbp], xmm0
movsd xmm0, QWORD PTR -72[rbp]
subsd xmm0, QWORD PTR -112[rbp]
movsd QWORD PTR -64[rbp], xmm0
movsd xmm0, QWORD PTR -112[rbp]
movq xmm1, QWORD PTR .LC4[rip]
xorpd xmm0, xmm1
subsd xmm0, QWORD PTR -72[rbp]
movsd QWORD PTR -56[rbp], xmm0
movsd xmm0, QWORD PTR -64[rbp]
pxor xmm1, xmm1
comisd xmm0, xmm1
jbe .L4
movsd xmm0, QWORD PTR -144[rbp]
subsd xmm0, QWORD PTR -192[rbp]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -64[rbp]
movsd xmm0, QWORD PTR -160[rbp]
movapd xmm2, xmm0
addsd xmm2, QWORD PTR -192[rbp]
movsd xmm0, QWORD PTR .LC1[rip]
mulsd xmm0, xmm2
mulsd xmm0, QWORD PTR -64[rbp]
addsd xmm1, xmm0
movsd xmm0, QWORD PTR -176[rbp]
movapd xmm2, xmm0
subsd xmm2, QWORD PTR -192[rbp]
movsd xmm0, QWORD PTR .LC1[rip]
mulsd xmm0, xmm2
mulsd xmm0, QWORD PTR -64[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -48[rbp], xmm0
movsd xmm0, QWORD PTR -152[rbp]
subsd xmm0, QWORD PTR -200[rbp]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -64[rbp]
movsd xmm0, QWORD PTR -168[rbp]
movapd xmm2, xmm0
addsd xmm2, QWORD PTR -200[rbp]
movsd xmm0, QWORD PTR .LC1[rip]
mulsd xmm0, xmm2
mulsd xmm0, QWORD PTR -64[rbp]
addsd xmm1, xmm0
movsd xmm0, QWORD PTR -184[rbp]
movapd xmm2, xmm0
subsd xmm2, QWORD PTR -200[rbp]
movsd xmm0, QWORD PTR .LC1[rip]
mulsd xmm0, xmm2
mulsd xmm0, QWORD PTR -64[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -40[rbp], xmm0
movsd xmm0, QWORD PTR -32[rbp]
mov rdx, QWORD PTR -128[rbp]
mov rax, QWORD PTR -136[rbp]
movapd xmm1, xmm0
movq xmm0, rdx
mov rdi, rax
call foo@PLT
movsd xmm0, QWORD PTR -128[rbp]
movq xmm1, QWORD PTR .LC4[rip]
xorpd xmm0, xmm1
movq rdx, xmm0
movsd xmm0, QWORD PTR -32[rbp]
mov rax, QWORD PTR -136[rbp]
movapd xmm1, xmm0
movq xmm0, rdx
mov rdi, rax
call foo@PLT
.L4:
movsd xmm0, QWORD PTR -56[rbp]
pxor xmm1, xmm1
comisd xmm0, xmm1
jbe .L2
movsd xmm1, QWORD PTR -176[rbp]
movsd xmm0, QWORD PTR .LC1[rip]
mulsd xmm0, xmm1
addsd xmm0, QWORD PTR -144[rbp]
subsd xmm0, QWORD PTR -192[rbp]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR -176[rbp]
movapd xmm2, xmm0
addsd xmm2, xmm0
movsd xmm0, QWORD PTR -160[rbp]
subsd xmm0, xmm2
movapd xmm2, xmm0
addsd xmm2, QWORD PTR -192[rbp]
movsd xmm0, QWORD PTR .LC1[rip]
mulsd xmm0, xmm2
mulsd xmm0, QWORD PTR -56[rbp]
addsd xmm1, xmm0
movsd xmm2, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR .LC1[rip]
mulsd xmm0, xmm2
addsd xmm0, xmm1
movsd QWORD PTR -48[rbp], xmm0
movsd xmm1, QWORD PTR -184[rbp]
movsd xmm0, QWORD PTR .LC1[rip]
mulsd xmm0, xmm1
addsd xmm0, QWORD PTR -152[rbp]
subsd xmm0, QWORD PTR -200[rbp]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR -184[rbp]
movapd xmm2, xmm0
addsd xmm2, xmm0
movsd xmm0, QWORD PTR -168[rbp]
subsd xmm0, xmm2
movapd xmm2, xmm0
addsd xmm2, QWORD PTR -200[rbp]
movsd xmm0, QWORD PTR .LC1[rip]
mulsd xmm0, xmm2
mulsd xmm0, QWORD PTR -56[rbp]
addsd xmm1, xmm0
movsd xmm2, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR .LC1[rip]
mulsd xmm0, xmm2
addsd xmm0, xmm1
movsd QWORD PTR -40[rbp], xmm0
mov rax, QWORD PTR -208[rbp]
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -48[rbp]
mov rax, QWORD PTR -208[rbp]
add rax, 16
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, QWORD PTR -40[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
mov rax, QWORD PTR -208[rbp]
add rax, 8
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -48[rbp]
mov rax, QWORD PTR -208[rbp]
add rax, 24
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, QWORD PTR -40[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -32[rbp], xmm0
movsd xmm0, QWORD PTR -32[rbp]
mov rdx, QWORD PTR -128[rbp]
mov rax, QWORD PTR -136[rbp]
movapd xmm1, xmm0
movq xmm0, rdx
mov rdi, rax
call foo@PLT
movsd xmm0, QWORD PTR -128[rbp]
movq xmm1, QWORD PTR .LC4[rip]
xorpd xmm0, xmm1
movq rdx, xmm0
movsd xmm0, QWORD PTR -32[rbp]
mov rax, QWORD PTR -136[rbp]
movapd xmm1, xmm0
movq xmm0, rdx
mov rdi, rax
call foo@PLT
.L2:
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -96[rbp]
jp .L12
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -96[rbp]
jne .L12
jmp .L13
.L12:
pxor xmm0, xmm0
movsd QWORD PTR -72[rbp], xmm0
movsd xmm0, QWORD PTR -72[rbp]
movapd xmm1, xmm0
subsd xmm1, QWORD PTR -88[rbp]
movsd xmm0, QWORD PTR -96[rbp]
movapd xmm2, xmm0
addsd xmm2, xmm0
divsd xmm1, xmm2
movapd xmm0, xmm1
movsd QWORD PTR -16[rbp], xmm0
movsd xmm0, QWORD PTR -88[rbp]
movq xmm1, QWORD PTR .LC4[rip]
xorpd xmm0, xmm1
movapd xmm1, xmm0
subsd xmm1, QWORD PTR -72[rbp]
movsd xmm0, QWORD PTR -96[rbp]
movapd xmm2, xmm0
addsd xmm2, xmm0
divsd xmm1, xmm2
movapd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
.L13:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size bar, .-bar
.section .rodata
.align 8
.LC0:
.long 0
.long 1071644672
.align 8
.LC1:
.long 0
.long 1074266112
.align 8
.LC2:
.long 0
.long 1074790400
.align 16
.LC4:
.long 0
.long -2147483648
.long 0
.long 0
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "240939.c"
.text
.global __aeabi_dmul
.global __aeabi_dsub
.global __aeabi_dadd
.global __aeabi_dcmpeq
.global __aeabi_dcmpgt
.global __aeabi_ddiv
.align 2
.global bar
.syntax unified
.arm
.fpu softvfp
.type bar, %function
bar:
@ args = 68, pretend = 0, frame = 152
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, fp, lr}
add fp, sp, #28
sub sp, sp, #160
str r0, [fp, #-160]
str r2, [fp, #-172]
str r3, [fp, #-168]
mov r2, #0
ldr r3, .L14
add r1, fp, #60
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-156]
str r3, [fp, #-152]
mov r2, #0
ldr r3, .L14+4
add r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #172
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-148]
str r3, [fp, #-144]
mov r2, #0
ldr r3, .L14+8
add r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-140]
str r3, [fp, #-136]
add r3, fp, #44
ldmia r3, {r2-r3}
add r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-132]
str r3, [fp, #-128]
mov r2, #0
ldr r3, .L14+4
add r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldmib fp, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
add r3, fp, #52
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-124]
str r3, [fp, #-120]
add r1, fp, #36
ldmia r1, {r0-r1}
mov r2, r0
mov r3, r1
bl __aeabi_dadd
mov r2, r0
mov r3, r1
add r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
add r3, fp, #52
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, r0
mov r3, r1
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-116]
str r3, [fp, #-112]
add r3, fp, #52
ldmia r3, {r2-r3}
add r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-108]
str r3, [fp, #-104]
mov r2, #0
mov r3, #0
sub r1, fp, #148
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L2
mov r2, #0
mov r3, #0
str r2, [fp, #-100]
str r3, [fp, #-96]
sub r3, fp, #140
ldmia r3, {r2-r3}
sub r1, fp, #100
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-92]
str r3, [fp, #-88]
ldr r4, [fp, #-140]
ldr r3, [fp, #-136]
eor r5, r3, #-2147483648
sub r3, fp, #100
ldmia r3, {r2-r3}
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-84]
str r3, [fp, #-80]
mov r2, #0
mov r3, #0
sub r1, fp, #92
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L4
add r3, fp, #44
ldmia r3, {r2-r3}
sub r1, fp, #172
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
sub r3, fp, #92
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
add r3, fp, #44
ldmia r3, {r2-r3}
add r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L14+4
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
sub r3, fp, #92
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
add r3, fp, #44
ldmia r3, {r2-r3}
add r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L14+4
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
sub r3, fp, #92
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-76]
str r3, [fp, #-72]
add r3, fp, #52
ldmia r3, {r2-r3}
ldmib fp, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
sub r3, fp, #92
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
add r3, fp, #52
ldmia r3, {r2-r3}
add r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L14+4
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
sub r3, fp, #92
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
add r3, fp, #52
ldmia r3, {r2-r3}
add r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L14+4
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
sub r3, fp, #92
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-68]
str r3, [fp, #-64]
sub r3, fp, #60
ldmia r3, {r2-r3}
stm sp, {r2-r3}
sub r3, fp, #156
ldmia r3, {r2-r3}
ldr r0, [fp, #-160]
bl foo
ldr r3, [fp, #-156]
str r3, [fp, #-180]
ldr r3, [fp, #-152]
eor r3, r3, #-2147483648
str r3, [fp, #-176]
sub r3, fp, #60
ldmia r3, {r2-r3}
stm sp, {r2-r3}
sub r3, fp, #180
ldmia r3, {r2-r3}
ldr r0, [fp, #-160]
bl foo
.L4:
mov r2, #0
mov r3, #0
sub r1, fp, #84
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L2
mov r2, #0
ldr r3, .L14+4
add r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
sub r3, fp, #172
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
add r3, fp, #44
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
sub r3, fp, #84
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
add r1, fp, #28
ldmia r1, {r0-r1}
mov r2, r0
mov r3, r1
bl __aeabi_dadd
mov r2, r0
mov r3, r1
add r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
add r3, fp, #44
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L14+4
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
sub r3, fp, #84
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
mov r2, #0
ldr r3, .L14+4
sub r1, fp, #84
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-76]
str r3, [fp, #-72]
mov r2, #0
ldr r3, .L14+4
add r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldmib fp, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
add r3, fp, #52
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
sub r3, fp, #84
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
add r1, fp, #36
ldmia r1, {r0-r1}
mov r2, r0
mov r3, r1
bl __aeabi_dadd
mov r2, r0
mov r3, r1
add r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
add r3, fp, #52
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L14+4
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
sub r3, fp, #84
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
mov r2, #0
ldr r3, .L14+4
sub r1, fp, #84
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-68]
str r3, [fp, #-64]
ldr r3, [fp, #68]
ldmia r3, {r0-r1}
sub r3, fp, #76
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #68]
add r3, r3, #16
ldmia r3, {r0-r1}
sub r3, fp, #68
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r3, [fp, #68]
add r3, r3, #8
ldmia r3, {r0-r1}
sub r3, fp, #76
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #68]
add r3, r3, #24
ldmia r3, {r0-r1}
sub r3, fp, #68
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-60]
str r3, [fp, #-56]
sub r3, fp, #60
ldmia r3, {r2-r3}
stm sp, {r2-r3}
sub r3, fp, #156
ldmia r3, {r2-r3}
ldr r0, [fp, #-160]
bl foo
ldr r8, [fp, #-156]
ldr r3, [fp, #-152]
eor r9, r3, #-2147483648
sub r3, fp, #60
ldmia r3, {r2-r3}
stm sp, {r2-r3}
mov r2, r8
mov r3, r9
ldr r0, [fp, #-160]
bl foo
.L2:
mov r2, #0
mov r3, #0
sub r1, fp, #124
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L12
b .L13
.L12:
mov r2, #0
mov r3, #0
str r2, [fp, #-100]
str r3, [fp, #-96]
sub r3, fp, #116
ldmia r3, {r2-r3}
sub r1, fp, #100
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
sub r1, fp, #124
ldmia r1, {r0-r1}
mov r2, r0
mov r3, r1
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-44]
str r3, [fp, #-40]
ldr r6, [fp, #-116]
ldr r3, [fp, #-112]
eor r7, r3, #-2147483648
sub r3, fp, #100
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
sub r1, fp, #124
ldmia r1, {r0-r1}
mov r2, r0
mov r3, r1
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-36]
str r3, [fp, #-32]
.L13:
nop
sub sp, fp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, fp, pc}
.L15:
.align 2
.L14:
.word 1071644672
.word 1074266112
.word 1074790400
.size bar, .-bar
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "944477.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "%d "
.text
.globl print_array
.type print_array, @function
print_array:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -4[rbp], 0
jmp .L2
.L3:
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
mov esi, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -4[rbp], 1
.L2:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -28[rbp]
jl .L3
mov edi, 10
call putchar@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size print_array, .-print_array
.section .rodata
.LC1:
.string "j=%d; i=%d\n"
.text
.globl insertion_sort
.type insertion_sort, @function
insertion_sort:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -12[rbp], 1
jmp .L5
.L11:
mov eax, DWORD PTR -12[rbp]
mov DWORD PTR -8[rbp], eax
jmp .L6
.L10:
mov eax, DWORD PTR -8[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -8[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rax, rcx
mov eax, DWORD PTR [rax]
cmp edx, eax
jle .L12
mov eax, DWORD PTR -8[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -8[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov edx, DWORD PTR -8[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*4]
mov rdx, QWORD PTR -24[rbp]
add rdx, rcx
mov eax, DWORD PTR [rax]
mov DWORD PTR [rdx], eax
mov eax, DWORD PTR -8[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -24[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR [rdx], eax
mov edx, DWORD PTR -8[rbp]
mov eax, DWORD PTR -12[rbp]
mov esi, eax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
mov edx, DWORD PTR -28[rbp]
mov rax, QWORD PTR -24[rbp]
mov esi, edx
mov rdi, rax
call print_array
sub DWORD PTR -8[rbp], 1
.L6:
cmp DWORD PTR -8[rbp], 0
jg .L10
jmp .L9
.L12:
nop
.L9:
add DWORD PTR -12[rbp], 1
.L5:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -28[rbp]
jl .L11
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size insertion_sort, .-insertion_sort
.globl insertion_sort_move
.type insertion_sort_move, @function
insertion_sort_move:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -12[rbp], 1
jmp .L14
.L18:
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -12[rbp]
mov DWORD PTR -8[rbp], eax
jmp .L15
.L17:
mov eax, DWORD PTR -8[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov edx, DWORD PTR -8[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*4]
mov rdx, QWORD PTR -24[rbp]
add rdx, rcx
mov eax, DWORD PTR [rax]
mov DWORD PTR [rdx], eax
sub DWORD PTR -8[rbp], 1
.L15:
cmp DWORD PTR -8[rbp], 0
jle .L16
mov eax, DWORD PTR -8[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
cmp DWORD PTR -4[rbp], eax
jl .L17
.L16:
mov eax, DWORD PTR -8[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR [rdx], eax
add DWORD PTR -12[rbp], 1
.L14:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -28[rbp]
jl .L18
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size insertion_sort_move, .-insertion_sort_move
.globl insertion_sort_sentinel
.type insertion_sort_sentinel, @function
insertion_sort_sentinel:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -44[rbp], esi
mov eax, DWORD PTR -44[rbp]
sub eax, 1
mov DWORD PTR -20[rbp], eax
jmp .L20
.L22:
mov eax, DWORD PTR -20[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -20[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
mov eax, DWORD PTR [rax]
cmp edx, eax
jle .L21
mov eax, DWORD PTR -20[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -20[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov edx, DWORD PTR -20[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*4]
mov rdx, QWORD PTR -40[rbp]
add rdx, rcx
mov eax, DWORD PTR [rax]
mov DWORD PTR [rdx], eax
mov eax, DWORD PTR -20[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR [rdx], eax
.L21:
sub DWORD PTR -20[rbp], 1
.L20:
cmp DWORD PTR -20[rbp], 0
jg .L22
mov DWORD PTR -16[rbp], 2
jmp .L23
.L26:
mov eax, DWORD PTR -16[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
mov DWORD PTR -8[rbp], eax
mov eax, DWORD PTR -16[rbp]
mov DWORD PTR -12[rbp], eax
jmp .L24
.L25:
mov eax, DWORD PTR -12[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov edx, DWORD PTR -12[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*4]
mov rdx, QWORD PTR -40[rbp]
add rdx, rcx
mov eax, DWORD PTR [rax]
mov DWORD PTR [rdx], eax
sub DWORD PTR -12[rbp], 1
.L24:
mov eax, DWORD PTR -12[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
cmp DWORD PTR -8[rbp], eax
jl .L25
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -8[rbp]
mov DWORD PTR [rdx], eax
add DWORD PTR -16[rbp], 1
.L23:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L26
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size insertion_sort_sentinel, .-insertion_sort_sentinel
.section .rodata
.LC2:
.string "Before Sorting"
.LC3:
.string "After Sorting"
.text
.globl main
.type main, @function
main:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov DWORD PTR -52[rbp], edi
mov QWORD PTR -64[rbp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -48[rbp], 3
mov DWORD PTR -44[rbp], 1
mov DWORD PTR -40[rbp], 6
mov DWORD PTR -36[rbp], 3
mov DWORD PTR -32[rbp], 2
mov DWORD PTR -28[rbp], 5
mov DWORD PTR -24[rbp], 4
mov DWORD PTR -20[rbp], 5
lea rdi, .LC2[rip]
call puts@PLT
lea rax, -48[rbp]
mov esi, 8
mov rdi, rax
call print_array
lea rax, -48[rbp]
mov esi, 8
mov rdi, rax
call insertion_sort_sentinel
lea rdi, .LC3[rip]
call puts@PLT
lea rax, -48[rbp]
mov esi, 8
mov rdi, rax
call print_array
mov eax, 0
mov rdx, QWORD PTR -8[rbp]
sub rdx, QWORD PTR fs:40
je .L29
call __stack_chk_fail@PLT
.L29:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "944477.c"
.text
.section .rodata
.align 2
.LC1:
.ascii "%d \000"
.text
.align 2
.global print_array
.syntax unified
.arm
.fpu softvfp
.type print_array, %function
print_array:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r3, #0
str r3, [fp, #-8]
b .L2
.L3:
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r2, [fp, #-16]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
ldr r0, .L4
bl printf
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L2:
ldr r2, [fp, #-8]
ldr r3, [fp, #-20]
cmp r2, r3
blt .L3
mov r0, #10
bl putchar
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L5:
.align 2
.L4:
.word .LC1
.size print_array, .-print_array
.section .rodata
.align 2
.LC2:
.ascii "j=%d; i=%d\012\000"
.text
.align 2
.global insertion_sort
.syntax unified
.arm
.fpu softvfp
.type insertion_sort, %function
insertion_sort:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
str r1, [fp, #-28]
mov r3, #1
str r3, [fp, #-16]
b .L7
.L13:
ldr r3, [fp, #-16]
str r3, [fp, #-12]
b .L8
.L12:
ldr r3, [fp, #-12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-24]
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
ble .L14
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-8]
ldr r3, [fp, #-12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-24]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r2, [fp, #-8]
str r2, [r3]
ldr r2, [fp, #-12]
ldr r1, [fp, #-16]
ldr r0, .L15
bl printf
ldr r1, [fp, #-28]
ldr r0, [fp, #-24]
bl print_array
ldr r3, [fp, #-12]
sub r3, r3, #1
str r3, [fp, #-12]
.L8:
ldr r3, [fp, #-12]
cmp r3, #0
bgt .L12
b .L11
.L14:
nop
.L11:
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L7:
ldr r2, [fp, #-16]
ldr r3, [fp, #-28]
cmp r2, r3
blt .L13
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L16:
.align 2
.L15:
.word .LC2
.size insertion_sort, .-insertion_sort
.align 2
.global insertion_sort_move
.syntax unified
.arm
.fpu softvfp
.type insertion_sort_move, %function
insertion_sort_move:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
mov r3, #1
str r3, [fp, #-16]
b .L18
.L22:
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-8]
ldr r3, [fp, #-16]
str r3, [fp, #-12]
b .L19
.L21:
ldr r3, [fp, #-12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-24]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-12]
sub r3, r3, #1
str r3, [fp, #-12]
.L19:
ldr r3, [fp, #-12]
cmp r3, #0
ble .L20
ldr r3, [fp, #-12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r3, [r3]
ldr r2, [fp, #-8]
cmp r2, r3
blt .L21
.L20:
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r2, [fp, #-8]
str r2, [r3]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L18:
ldr r2, [fp, #-16]
ldr r3, [fp, #-28]
cmp r2, r3
blt .L22
nop
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size insertion_sort_move, .-insertion_sort_move
.align 2
.global insertion_sort_sentinel
.syntax unified
.arm
.fpu softvfp
.type insertion_sort_sentinel, %function
insertion_sort_sentinel:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #36
str r0, [fp, #-32]
str r1, [fp, #-36]
ldr r3, [fp, #-36]
sub r3, r3, #1
str r3, [fp, #-24]
b .L24
.L26:
ldr r3, [fp, #-24]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r1, [fp, #-32]
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
ble .L25
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-8]
ldr r3, [fp, #-24]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r2, r2, r3
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r1, [fp, #-32]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-24]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-8]
str r2, [r3]
.L25:
ldr r3, [fp, #-24]
sub r3, r3, #1
str r3, [fp, #-24]
.L24:
ldr r3, [fp, #-24]
cmp r3, #0
bgt .L26
mov r3, #2
str r3, [fp, #-20]
b .L27
.L30:
ldr r3, [fp, #-20]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-12]
ldr r3, [fp, #-20]
str r3, [fp, #-16]
b .L28
.L29:
ldr r3, [fp, #-16]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r1, [fp, #-32]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-16]
sub r3, r3, #1
str r3, [fp, #-16]
.L28:
ldr r3, [fp, #-16]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r3, [r3]
ldr r2, [fp, #-12]
cmp r2, r3
blt .L29
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-12]
str r2, [r3]
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L27:
ldr r2, [fp, #-20]
ldr r3, [fp, #-36]
cmp r2, r3
blt .L30
nop
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size insertion_sort_sentinel, .-insertion_sort_sentinel
.section .rodata
.align 2
.LC3:
.ascii "Before Sorting\000"
.align 2
.LC4:
.ascii "After Sorting\000"
.align 2
.LC0:
.word 3
.word 1
.word 6
.word 3
.word 2
.word 5
.word 4
.word 5
.align 2
.LC5:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-48]
str r1, [fp, #-52]
ldr r3, .L34
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, .L34+4
sub ip, fp, #40
mov lr, r3
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldm lr, {r0, r1, r2, r3}
stm ip, {r0, r1, r2, r3}
ldr r0, .L34+8
bl puts
sub r3, fp, #40
mov r1, #8
mov r0, r3
bl print_array
sub r3, fp, #40
mov r1, #8
mov r0, r3
bl insertion_sort_sentinel
ldr r0, .L34+12
bl puts
sub r3, fp, #40
mov r1, #8
mov r0, r3
bl print_array
mov r3, #0
ldr r2, .L34
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L33
bl __stack_chk_fail
.L33:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L35:
.align 2
.L34:
.word .LC5
.word .LC0
.word .LC3
.word .LC4
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "35307.c"
.intel_syntax noprefix
.text
.section .rodata
.align 8
.LC0:
.string "Digite o custo de f\303\241brica do autom\303\263vel : "
.LC1:
.string "%f"
.align 8
.LC5:
.string "\nO valor final do autom\303\263vel \303\251 : %f"
.align 8
.LC6:
.string "\nO valor do revendedor \303\251 : %f"
.LC7:
.string "\nO valor dos impostos \303\251 : %f"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
lea rax, -24[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
movss xmm1, DWORD PTR -24[rbp]
movss xmm0, DWORD PTR .LC2[rip]
mulss xmm0, xmm1
movss xmm1, DWORD PTR .LC3[rip]
divss xmm0, xmm1
movss DWORD PTR -20[rbp], xmm0
movss xmm1, DWORD PTR -24[rbp]
movss xmm0, DWORD PTR .LC4[rip]
mulss xmm0, xmm1
movss xmm1, DWORD PTR .LC3[rip]
divss xmm0, xmm1
movss DWORD PTR -16[rbp], xmm0
movss xmm0, DWORD PTR -24[rbp]
addss xmm0, DWORD PTR -20[rbp]
movss xmm1, DWORD PTR -16[rbp]
addss xmm0, xmm1
movss DWORD PTR -12[rbp], xmm0
pxor xmm2, xmm2
cvtss2sd xmm2, DWORD PTR -12[rbp]
movq rax, xmm2
movq xmm0, rax
lea rdi, .LC5[rip]
mov eax, 1
call printf@PLT
pxor xmm3, xmm3
cvtss2sd xmm3, DWORD PTR -20[rbp]
movq rax, xmm3
movq xmm0, rax
lea rdi, .LC6[rip]
mov eax, 1
call printf@PLT
pxor xmm4, xmm4
cvtss2sd xmm4, DWORD PTR -16[rbp]
movq rax, xmm4
movq xmm0, rax
lea rdi, .LC7[rip]
mov eax, 1
call printf@PLT
mov eax, 0
mov rdx, QWORD PTR -8[rbp]
sub rdx, QWORD PTR fs:40
je .L3
call __stack_chk_fail@PLT
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 4
.LC2:
.long 1103626240
.align 4
.LC3:
.long 1120403456
.align 4
.LC4:
.long 1110704128
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "35307.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Digite o custo de f\303\241brica do autom\303\263ve"
.ascii "l : \000"
.align 2
.LC1:
.ascii "%f\000"
.global __aeabi_fmul
.global __aeabi_fdiv
.global __aeabi_fadd
.global __aeabi_f2d
.align 2
.LC2:
.ascii "\012O valor final do autom\303\263vel \303\251 : %f"
.ascii "\000"
.align 2
.LC3:
.ascii "\012O valor do revendedor \303\251 : %f\000"
.align 2
.LC4:
.ascii "\012O valor dos impostos \303\251 : %f\000"
.align 2
.LC5:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
ldr r3, .L4
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r0, .L4+4
bl printf
sub r3, fp, #24
mov r1, r3
ldr r0, .L4+8
bl __isoc99_scanf
ldr r3, [fp, #-24] @ float
ldr r1, .L4+12
mov r0, r3
bl __aeabi_fmul
mov r3, r0
ldr r1, .L4+16
mov r0, r3
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-20] @ float
ldr r3, [fp, #-24] @ float
ldr r1, .L4+20
mov r0, r3
bl __aeabi_fmul
mov r3, r0
ldr r1, .L4+16
mov r0, r3
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-24] @ float
ldr r1, [fp, #-20] @ float
mov r0, r3
bl __aeabi_fadd
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-12] @ float
ldr r0, [fp, #-12] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L4+24
bl printf
ldr r0, [fp, #-20] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L4+28
bl printf
ldr r0, [fp, #-16] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L4+32
bl printf
mov r3, #0
ldr r2, .L4
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L3
bl __stack_chk_fail
.L3:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L5:
.align 2
.L4:
.word .LC5
.word .LC0
.word .LC1
.word 1103626240
.word 1120403456
.word 1110704128
.word .LC2
.word .LC3
.word .LC4
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "921370.c"
.intel_syntax noprefix
.text
.section .rodata
.align 8
.LC0:
.string "==========VOTA BRASIL=========="
.align 8
.LC1:
.string "Digite sua data de nascimento !!"
.LC2:
.string "%d"
.align 8
.LC3:
.string "Voto o brigatorio !sua idade e %d\n"
.LC4:
.string "Voto opicional idade %d \n"
.align 8
.LC5:
.string "Voce nao tem idade para votar %d \n"
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -16[rbp], 0
mov DWORD PTR -12[rbp], 0
lea rdi, .LC0[rip]
call puts@PLT
lea rdi, .LC1[rip]
call puts@PLT
lea rax, -16[rbp]
mov rsi, rax
lea rdi, .LC2[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov edx, DWORD PTR -16[rbp]
mov eax, 2021
sub eax, edx
mov DWORD PTR -12[rbp], eax
cmp DWORD PTR -12[rbp], 17
jle .L2
cmp DWORD PTR -12[rbp], 65
jg .L2
mov eax, DWORD PTR -12[rbp]
mov esi, eax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
jmp .L3
.L2:
cmp DWORD PTR -12[rbp], 15
jle .L4
cmp DWORD PTR -12[rbp], 17
jle .L5
.L4:
cmp DWORD PTR -12[rbp], 65
jle .L6
.L5:
mov eax, DWORD PTR -12[rbp]
mov esi, eax
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
jmp .L3
.L6:
mov eax, DWORD PTR -12[rbp]
mov esi, eax
lea rdi, .LC5[rip]
mov eax, 0
call printf@PLT
.L3:
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L8
call __stack_chk_fail@PLT
.L8:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "921370.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "==========VOTA BRASIL==========\000"
.align 2
.LC1:
.ascii "Digite sua data de nascimento !!\000"
.align 2
.LC2:
.ascii "%d\000"
.align 2
.LC3:
.ascii "Voto o brigatorio !sua idade e %d\012\000"
.align 2
.LC4:
.ascii "Voto opicional idade %d \012\000"
.align 2
.LC5:
.ascii "Voce nao tem idade para votar %d \012\000"
.align 2
.LC6:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
ldr r3, .L9
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-12]
ldr r0, .L9+4
bl puts
ldr r0, .L9+8
bl puts
sub r3, fp, #16
mov r1, r3
ldr r0, .L9+12
bl __isoc99_scanf
ldr r3, [fp, #-16]
rsb r3, r3, #2016
add r3, r3, #5
str r3, [fp, #-12]
ldr r3, [fp, #-12]
cmp r3, #17
ble .L2
ldr r3, [fp, #-12]
cmp r3, #65
bgt .L2
ldr r1, [fp, #-12]
ldr r0, .L9+16
bl printf
b .L3
.L2:
ldr r3, [fp, #-12]
cmp r3, #15
ble .L4
ldr r3, [fp, #-12]
cmp r3, #17
ble .L5
.L4:
ldr r3, [fp, #-12]
cmp r3, #65
ble .L6
.L5:
ldr r1, [fp, #-12]
ldr r0, .L9+20
bl printf
b .L3
.L6:
ldr r1, [fp, #-12]
ldr r0, .L9+24
bl printf
.L3:
mov r3, #0
ldr r2, .L9
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L8
bl __stack_chk_fail
.L8:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L10:
.align 2
.L9:
.word .LC6
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "314841.c"
.intel_syntax noprefix
.text
.globl X_SIZE_VALUE
.bss
.align 4
.type X_SIZE_VALUE, @object
.size X_SIZE_VALUE, 4
X_SIZE_VALUE:
.zero 4
.globl overflow_mode
.data
.align 4
.type overflow_mode, @object
.size overflow_mode, 4
overflow_mode:
.long 1
.globl rounding_mode
.bss
.align 4
.type rounding_mode, @object
.size rounding_mode, 4
rounding_mode:
.zero 4
.text
.globl __DSVERIFIER_assume
.type __DSVERIFIER_assume, @function
__DSVERIFIER_assume:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov eax, edi
mov BYTE PTR -4[rbp], al
movzx eax, BYTE PTR -4[rbp]
mov edi, eax
mov eax, 0
call __ESBMC_assume@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size __DSVERIFIER_assume, .-__DSVERIFIER_assume
.section .rodata
.align 8
.LC0:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/compatibility.h"
.LC1:
.string "expression"
.text
.globl __DSVERIFIER_assert
.type __DSVERIFIER_assert, @function
__DSVERIFIER_assert:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov eax, edi
mov BYTE PTR -4[rbp], al
cmp BYTE PTR -4[rbp], 0
jne .L4
lea rcx, __PRETTY_FUNCTION__.21[rip]
mov edx, 36
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.L4:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size __DSVERIFIER_assert, .-__DSVERIFIER_assert
.section .rodata
.LC2:
.string "%s"
.text
.globl __DSVERIFIER_assert_msg
.type __DSVERIFIER_assert_msg, @function
__DSVERIFIER_assert_msg:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov eax, edi
mov QWORD PTR -16[rbp], rsi
mov BYTE PTR -4[rbp], al
mov rax, QWORD PTR -16[rbp]
mov rsi, rax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
cmp BYTE PTR -4[rbp], 0
jne .L7
lea rcx, __PRETTY_FUNCTION__.20[rip]
mov edx, 41
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.L7:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size __DSVERIFIER_assert_msg, .-__DSVERIFIER_assert_msg
.globl _fxp_one
.bss
.align 8
.type _fxp_one, @object
.size _fxp_one, 8
_fxp_one:
.zero 8
.globl _fxp_half
.align 8
.type _fxp_half, @object
.size _fxp_half, 8
_fxp_half:
.zero 8
.globl _fxp_minus_one
.align 8
.type _fxp_minus_one, @object
.size _fxp_minus_one, 8
_fxp_minus_one:
.zero 8
.globl _fxp_min
.align 8
.type _fxp_min, @object
.size _fxp_min, 8
_fxp_min:
.zero 8
.globl _fxp_max
.align 8
.type _fxp_max, @object
.size _fxp_max, 8
_fxp_max:
.zero 8
.globl _dbl_max
.align 8
.type _dbl_max, @object
.size _dbl_max, 8
_dbl_max:
.zero 8
.globl _dbl_min
.align 8
.type _dbl_min, @object
.size _dbl_min, 8
_dbl_min:
.zero 8
.globl _fxp_fmask
.align 8
.type _fxp_fmask, @object
.size _fxp_fmask, 8
_fxp_fmask:
.zero 8
.globl _fxp_imask
.align 8
.type _fxp_imask, @object
.size _fxp_imask, 8
_fxp_imask:
.zero 8
.section .rodata
.align 32
.type scale_factor, @object
.size scale_factor, 248
scale_factor:
.long 0
.long 1072693248
.long 0
.long 1073741824
.long 0
.long 1074790400
.long 0
.long 1075838976
.long 0
.long 1076887552
.long 0
.long 1077936128
.long 0
.long 1078984704
.long 0
.long 1080033280
.long 0
.long 1081081856
.long 0
.long 1082130432
.long 0
.long 1083179008
.long 0
.long 1084227584
.long 0
.long 1085276160
.long 0
.long 1086324736
.long 0
.long 1087373312
.long 0
.long 1088421888
.long 0
.long 1089470464
.long 0
.long 1090519040
.long 0
.long 1091567616
.long 0
.long 1092616192
.long 0
.long 1093664768
.long 0
.long 1094713344
.long 0
.long 1095761920
.long 0
.long 1096810496
.long 0
.long 1097859072
.long 0
.long 1098907648
.long 0
.long 1099956224
.long 0
.long 1101004800
.long 0
.long 1102053376
.long 0
.long 1103101952
.long 0
.long 1104150528
.align 32
.type scale_factor_inv, @object
.size scale_factor_inv, 248
scale_factor_inv:
.long 0
.long 1072693248
.long 0
.long 1071644672
.long 0
.long 1070596096
.long 0
.long 1069547520
.long 0
.long 1068498944
.long 0
.long 1067450368
.long 0
.long 1066401792
.long 0
.long 1065353216
.long 0
.long 1064304640
.long 0
.long 1063256064
.long 0
.long 1062207488
.long 0
.long 1061158912
.long 0
.long 1060110336
.long 0
.long 1059061760
.long 0
.long 1058013184
.long 0
.long 1056964608
.long 147574
.long 1055916032
.long -295148
.long 1054867455
.long 442722
.long 1053818880
.long 442722
.long 1052770304
.long -3836923
.long 1051721727
.long -3836923
.long 1050673151
.long -3836923
.long 1049624575
.long 16971005
.long 1048576000
.long 16971005
.long 1047527424
.long -117173718
.long 1046478847
.long -117173718
.long 1045430271
.long 243644596
.long 1044381696
.long -721636628
.long 1043333119
.long -721636628
.long 1042284543
.long 2057033325
.long 1041235968
.align 32
.type rand_uni, @object
.size rand_uni, 40000
rand_uni:
.long -1090980738
.long -1112175576
.long -1106268981
.long 1050290517
.long 1036740293
.long 1064879289
.long 1065104477
.long 1057904025
.long 1058341827
.long -1105391874
.long 1053059208
.long -1096031224
.long 1064997005
.long -1098026844
.long 1053276161
.long -1103670874
.long 1060153685
.long -1084269022
.long -1082623921
.long -1089152099
.long -1089971858
.long -1099598916
.long -1087529625
.long 1051914755
.long -1101560469
.long 1062690036
.long -1091405365
.long 1059638621
.long -1087982995
.long -1082784013
.long -1113135698
.long 1058999736
.long -1085745433
.long 1019435440
.long 1053364041
.long 1061609359
.long 1035087920
.long 1063349407
.long 1063397950
.long -1098958981
.long -1087313908
.long 1058285497
.long -1082567766
.long -1108276165
.long -1086763766
.long -1091084444
.long -1085128895
.long -1091870424
.long 1041742704
.long 1055095857
.long -1096370585
.long 1057705193
.long -1104590464
.long 1040973022
.long 1057691271
.long 1055864390
.long -1095576813
.long -1087832828
.long 1063848842
.long 1064699740
.long -1085717922
.long 1050443251
.long 1057146058
.long 1036170702
.long 1043458992
.long 1041495254
.long 1016835224
.long -1097256952
.long 1050334643
.long -1086652520
.long 1060129563
.long 1040855016
.long 1057530281
.long -1156296968
.long -1089489913
.long 1055300184
.long -1089353932
.long 1064584069
.long -1098726324
.long -1086159967
.long -1084558434
.long -1105796200
.long -1097153790
.long -1088136037
.long -1094968157
.long 1056690938
.long -1089811181
.long -1083165686
.long 1060051278
.long 1050076832
.long 1004086943
.long -1083287383
.long 1042023236
.long 1059961369
.long -1089932017
.long 1064213982
.long -1122769874
.long -1084694163
.long -1082534712
.long 1059033125
.long -1087813048
.long 1060730859
.long 1050505517
.long 1005731364
.long -1094086494
.long 1023443447
.long 1033720214
.long -1087967840
.long 1063074669
.long -1089027007
.long 1056830924
.long -1084263516
.long 1064997214
.long -1090437037
.long -1091781398
.long 1013462154
.long 1061487913
.long 1064434379
.long -1085783916
.long -1084945539
.long 1061085669
.long -1087214440
.long -1115018716
.long -1107539666
.long -1095244881
.long -1094079747
.long 1054997360
.long -1084992721
.long -1097179506
.long -1082193925
.long 1064256557
.long -1097819440
.long -1083345928
.long -1092631710
.long -1095202339
.long 1064506801
.long 1057011326
.long 1062010719
.long -1090327798
.long 1050565392
.long -1101775798
.long 1064188676
.long -1085871250
.long -1090877093
.long -1106652338
.long 1049776288
.long 1044034835
.long -1089778989
.long 1049530284
.long -1089574061
.long 1058290743
.long 1040834867
.long 1058690157
.long -1105506895
.long 1043924977
.long -1087975760
.long 1049620521
.long -1089176069
.long 1060116763
.long 1049562456
.long -1084589500
.long -1089971946
.long -1085130923
.long -1103519824
.long -1082400569
.long -1111129859
.long 1063355442
.long 1037186736
.long 1063568378
.long -1098596375
.long 1060308102
.long 1053707835
.long -1109212671
.long 1034768304
.long 1062345615
.long 1061923599
.long -1090681976
.long 1049352786
.long -1098295281
.long 1047366845
.long 1060222933
.long 1063003581
.long 1064673460
.long -1093103650
.long -1109360283
.long 1054719639
.long 1060219822
.long 1052752822
.long -1097442375
.long -1094001525
.long -1115589625
.long -1125542376
.long 1062531190
.long -1089704622
.long 1061861361
.long 1051099679
.long 1042219100
.long -1108989595
.long -1087593042
.long 1059360412
.long -1088577714
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.long 1057730707
.long 1059675835
.long -1088970832
.long 1058797351
.long -1082654200
.long -1087699321
.long 1045684652
.long 1036180365
.long 1049199445
.long -1120381080
.long -1083244610
.long 1047674761
.long 1032654210
.long 1064181549
.long 1054815563
.long 1057530997
.long 1052544887
.long -1088802513
.long 1060479714
.long -1104390179
.long 1040567958
.long -1087872667
.long 1038849053
.long 1043457474
.long -1087471100
.long -1089868318
.long 1056342431
.long 1012932633
.long -1089343539
.long 1044427803
.long -1095455927
.long -1082479812
.long 1046811230
.long 1065256252
.long -1105766498
.long 1046457208
.long -1107960523
.long -1135824046
.long -1088084081
.long -1090466650
.long 1057537097
.long 1058973025
.long -1099964730
.long 1065137536
.long 1048954652
.long 1062867287
.long 1061159242
.long -1083369352
.long 1055265281
.long 1061712750
.long -1091887116
.long -1100325134
.long 1049284298
.long -1087564814
.long 1061714480
.long 1059247883
.long -1086255776
.long -1089740810
.long 1025378107
.long -1086006789
.long -1088092639
.long 1007802340
.long -1113435749
.long -1082298528
.long 1058693626
.long 1049610675
.long -1088258869
.long -1086951039
.long -1093064818
.long -1092635528
.long 1055869593
.long 1063805358
.long 1061806799
.long -1105468365
.long -1082750444
.long 1063799534
.long 1062112993
.long 1060307809
.long 1037887921
.long 1040345819
.long -1090474651
.long -1090322006
.long -1107742836
.long -1088899583
.long 1053950755
.long -1084598531
.long 1049548146
.long 1020599998
.long 1065312254
.long -1090544345
.long -1092157527
.long -1084116125
.long 1065134394
.long -1106986999
.long 1064276606
.long -1088018875
.long 1057810795
.long 1049545345
.long 1013037223
.long -1087823511
.long -1093313818
.long -1097132516
.long 1043922500
.long -1083670648
.long 1049584530
.long -1087834253
.long -1085515949
.long 1063701922
.long -1088695307
.long 1050886565
.long 1063239383
.long -1113120533
.long 1065045712
.long -1095913428
.long 1057966509
.long 1053285818
.long -1096915036
.long 1064624467
.long -1088443122
.long -1102489424
.long -1087128767
.long 1050022155
.long -1088553552
.long 1062989600
.long 1059666004
.long 1033443678
.long -1097819914
.long -1087709502
.long -1092162202
.long -1091709596
.long 1058497868
.long 1057847909
.long -1099417252
.long 1041722626
.long -1144619950
.long -1084636137
.long -1087835404
.long -1104580000
.long 1045499080
.long -1087737926
.long -1086892566
.long 1054195946
.long 1055225985
.long 1060887856
.long -1104261038
.long -1095659245
.long 1064616002
.long 1023494034
.long 1057116058
.long -1105764417
.long 1060612374
.long -1105399888
.long -1089072999
.long 1039815345
.long -1084059828
.long -1095057958
.long 1035086798
.long -1085594387
.long 1057530810
.long -1084600804
.long 1050077630
.long 1040976879
.long 1062636562
.long 1061917655
.long -1085854881
.long -1098541074
.long -1097103790
.long 1049372113
.long 1057475924
.long 1035044185
.long 1032506143
.long 1060728634
.long -1082554723
.long 1061860840
.long 1048426230
.long 1065008126
.long -1094310941
.long 1032000624
.long -1147798295
.long 1052651372
.long 1059441764
.long 1049190212
.long -1096544456
.long 1035859026
.long 1048777663
.long 1060997787
.long -1087887144
.long 1062392613
.long -1085143949
.long -1092086022
.long 1061733336
.long 1063890106
.long 1036824943
.long -1101416116
.long 1015775368
.long -1089024821
.long -1104153305
.long -1090100983
.long 1064707768
.long 1037001441
.long 1064370996
.long -1082680285
.long 1058923877
.long -1083576240
.long 1049398380
.long 1064089109
.long -1084373497
.long 1047068863
.long 1035591433
.long -1107128544
.long -1083102313
.long -1108045303
.long 1059888610
.long 1063362239
.long 1048327040
.long 1029721288
.long -1091764483
.long 1063490437
.long 1059759416
.long 1047798692
.long -1097906308
.long 1062924887
.long 1050733780
.long -1103024449
.long -1088685208
.long 1043170642
.long 1049100049
.long -1083079628
.long 1056733709
.long -1094339288
.long 1009402694
.long 1061220616
.long 1052379496
.long -1097678881
.long -1088449856
.long 1044144581
.long -1107393035
.long -1087366780
.long -1090368006
.long -1087066796
.long 1058652163
.long 1062249251
.long 1045150698
.long 1056222955
.long 1061292422
.long 1058940225
.long -1095431749
.long 1054269807
.long -1084469430
.long -1128353426
.long -1085654469
.long -1083922294
.long 1058826820
.long 1062792570
.long -1082305698
.long -1094959910
.long 1061017375
.long -1083412289
.long -1089173940
.long 1058257997
.long -1083625736
.long -1083682340
.long 1060192079
.long 1062177191
.long -1088697096
.long 1061347733
.long 1029684603
.long -1094077272
.long -1108487058
.long -1123012760
.long 1052761653
.long -1083349396
.long 1064334861
.long -1082636572
.long -1119326636
.long -1089064130
.long 1019278491
.long 1053236140
.long -1114295935
.long 1054222555
.long -1089272672
.long -1085822056
.long -1084895473
.long 1063989519
.long -1086058146
.long -1083215739
.long -1113994980
.long -1098698049
.long 1060217139
.long 1058521538
.long 1062614224
.long -1085453101
.long 1031007548
.long 1042427254
.long -1092889165
.long -1092178938
.long -1104322180
.long 1054291815
.long -1083760538
.long -1087923992
.long 1064376819
.long -1093504223
.long -1092016193
.long 1058346568
.long -1098030183
.long 1042823187
.long -1082797514
.long 1058475485
.long -1082211203
.long -1097706072
.long -1085618983
.long -1091991298
.long -1084409295
.long 1061976722
.long -1090222528
.long 1057351936
.long 1053568383
.long 1063821073
.long -1092705213
.long -1098000855
.long 1058236321
.long -1121081701
.long -1096306148
.long -1093833516
.long -1100076850
.long 1058267028
.long -1086605080
.long -1097313821
.long 1042975221
.long -1088055665
.long 1023414542
.long 1061228454
.long -1083665550
.long 1050769762
.long 1052476456
.long 1063137010
.long -1088616639
.long 1006179781
.long 1064571803
.long -1085275302
.long 1060907236
.long 1061691100
.long -1087935778
.long 1058853519
.long -1097318513
.long -1093553731
.long -1106023722
.long -1085236094
.long 1052237856
.long 1052163793
.long -1084270937
.long 1060602745
.long -1094716131
.long -1114647838
.long 1051255101
.long 1036242700
.long -1083178536
.long -1096481881
.long 1061686471
.long -1085315725
.long -1105598732
.long 1062784778
.long -1107086589
.long -1086280919
.long 1062668808
.long -1114601916
.long 968892864
.long 1033986761
.long -1099172513
.long -1105172589
.long -1091835973
.long 1059011787
.long 1060703779
.long -1098643462
.long -1096900751
.long 1061414742
.long -1089624545
.long -1088627530
.long 1052066243
.long 1064066292
.long 1059157322
.long -1105702412
.long -1085120104
.long 1052543743
.long 1053790897
.long -1085431643
.long -1092875281
.long -1086763671
.long -1082735668
.long 1044608717
.long 1056193127
.long -1087813170
.long 1049302233
.long -1083539817
.long 1044990008
.long 1052883015
.long 1058374175
.long -1122318862
.long -1096311334
.long 1062849119
.long 1061990587
.long -1109158271
.long 1057393891
.long -1093723952
.long -1106658928
.long 1035357273
.long -1085224811
.long -1083469824
.long -1095213990
.long -1089575508
.long -1100855275
.long -1089318961
.long 1058194918
.long -1106701520
.long -1082430235
.long -1095467028
.long 1050880651
.long -1085638088
.long 1060171884
.long 1062098676
.long -1082438471
.long 1053850760
.long 1063981677
.long 1061609886
.long -1092607029
.long -1094373856
.long 1010608748
.long 1060105715
.long 1065227804
.long 1055991641
.long -1084252049
.long -1089496920
.long -1086724842
.long -1089865702
.long 1061528976
.long 1062979084
.long -1104353577
.text
.globl wrap
.type wrap, @function
wrap:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov QWORD PTR -40[rbp], rdx
mov rax, QWORD PTR -40[rbp]
mov edx, eax
mov rax, QWORD PTR -32[rbp]
mov ecx, eax
mov eax, edx
sub eax, ecx
add eax, 1
mov DWORD PTR -4[rbp], eax
mov rax, QWORD PTR -24[rbp]
cmp rax, QWORD PTR -32[rbp]
jge .L9
mov eax, DWORD PTR -4[rbp]
movsx rcx, eax
mov rax, QWORD PTR -32[rbp]
sub rax, QWORD PTR -24[rbp]
mov edx, DWORD PTR -4[rbp]
movsx rsi, edx
cqo
idiv rsi
add rax, 1
imul rax, rcx
add QWORD PTR -24[rbp], rax
.L9:
mov rax, QWORD PTR -24[rbp]
sub rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR -4[rbp]
movsx rcx, edx
cqo
idiv rcx
mov rax, QWORD PTR -32[rbp]
add rax, rdx
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size wrap, .-wrap
.globl fxp_get_int_part
.type fxp_get_int_part, @function
fxp_get_int_part:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
cmp QWORD PTR -8[rbp], 0
jns .L12
mov rax, QWORD PTR -8[rbp]
neg rax
mov rdx, rax
mov rax, QWORD PTR _fxp_imask[rip]
and rax, rdx
neg rax
jmp .L14
.L12:
mov rax, QWORD PTR _fxp_imask[rip]
and rax, QWORD PTR -8[rbp]
.L14:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size fxp_get_int_part, .-fxp_get_int_part
.globl fxp_get_frac_part
.type fxp_get_frac_part, @function
fxp_get_frac_part:
.LFB11:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
cmp QWORD PTR -8[rbp], 0
jns .L16
mov rax, QWORD PTR -8[rbp]
neg rax
mov rdx, rax
mov rax, QWORD PTR _fxp_fmask[rip]
and rax, rdx
neg rax
jmp .L18
.L16:
mov rax, QWORD PTR _fxp_fmask[rip]
and rax, QWORD PTR -8[rbp]
.L18:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE11:
.size fxp_get_frac_part, .-fxp_get_frac_part
.globl fxp_quantize
.type fxp_quantize, @function
fxp_quantize:
.LFB12:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 8
mov QWORD PTR -8[rbp], rdi
mov eax, DWORD PTR overflow_mode[rip]
cmp eax, 2
jne .L20
mov rax, QWORD PTR _fxp_min[rip]
cmp QWORD PTR -8[rbp], rax
jge .L21
mov rax, QWORD PTR _fxp_min[rip]
jmp .L22
.L21:
mov rax, QWORD PTR _fxp_max[rip]
cmp QWORD PTR -8[rbp], rax
jle .L23
mov rax, QWORD PTR _fxp_max[rip]
jmp .L22
.L20:
mov eax, DWORD PTR overflow_mode[rip]
cmp eax, 3
jne .L23
mov rax, QWORD PTR _fxp_min[rip]
cmp QWORD PTR -8[rbp], rax
jl .L24
mov rax, QWORD PTR _fxp_max[rip]
cmp QWORD PTR -8[rbp], rax
jle .L23
.L24:
mov rdx, QWORD PTR _fxp_max[rip]
mov rcx, QWORD PTR _fxp_min[rip]
mov rax, QWORD PTR -8[rbp]
mov rsi, rcx
mov rdi, rax
call wrap
jmp .L22
.L23:
mov rax, QWORD PTR -8[rbp]
.L22:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE12:
.size fxp_quantize, .-fxp_quantize
.section .rodata
.align 8
.LC3:
.string "An Overflow Occurred in system's output"
.text
.globl fxp_verify_overflow
.type fxp_verify_overflow, @function
fxp_verify_overflow:
.LFB13:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_quantize
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR _fxp_max[rip]
cmp QWORD PTR -8[rbp], rax
jg .L26
mov rax, QWORD PTR _fxp_min[rip]
cmp QWORD PTR -8[rbp], rax
jl .L26
mov eax, 1
jmp .L27
.L26:
mov eax, 0
.L27:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE13:
.size fxp_verify_overflow, .-fxp_verify_overflow
.globl fxp_verify_overflow_node
.type fxp_verify_overflow_node, @function
fxp_verify_overflow_node:
.LFB14:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov rax, QWORD PTR -16[rbp]
mov rsi, rax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR _fxp_max[rip]
cmp QWORD PTR -8[rbp], rax
jg .L29
mov rax, QWORD PTR _fxp_min[rip]
cmp QWORD PTR -8[rbp], rax
jl .L29
mov eax, 1
jmp .L30
.L29:
mov eax, 0
.L30:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE14:
.size fxp_verify_overflow_node, .-fxp_verify_overflow_node
.globl fxp_verify_overflow_array
.type fxp_verify_overflow_array, @function
fxp_verify_overflow_array:
.LFB15:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -4[rbp], 0
mov DWORD PTR -4[rbp], 0
jmp .L32
.L33:
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov rdi, rax
call fxp_verify_overflow
add DWORD PTR -4[rbp], 1
.L32:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -28[rbp]
jl .L33
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE15:
.size fxp_verify_overflow_array, .-fxp_verify_overflow_array
.globl fxp_int_to_fxp
.type fxp_int_to_fxp, @function
fxp_int_to_fxp:
.LFB16:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -20[rbp], edi
mov eax, DWORD PTR -20[rbp]
movsx rdx, eax
mov rax, QWORD PTR _fxp_one[rip]
imul rax, rdx
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE16:
.size fxp_int_to_fxp, .-fxp_int_to_fxp
.globl fxp_to_int
.type fxp_to_int, @function
fxp_to_int:
.LFB17:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
cmp QWORD PTR -8[rbp], 0
js .L37
mov rax, QWORD PTR _fxp_half[rip]
add QWORD PTR -8[rbp], rax
jmp .L38
.L37:
mov rax, QWORD PTR _fxp_half[rip]
sub QWORD PTR -8[rbp], rax
.L38:
mov eax, DWORD PTR impl[rip+4]
mov ecx, eax
sar QWORD PTR -8[rbp], cl
mov rax, QWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE17:
.size fxp_to_int, .-fxp_to_int
.globl fxp_float_to_fxp
.type fxp_float_to_fxp, @function
fxp_float_to_fxp:
.LFB18:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -20[rbp], xmm0
pxor xmm1, xmm1
cvtss2sd xmm1, DWORD PTR -20[rbp]
mov eax, DWORD PTR impl[rip+4]
cdqe
lea rdx, 0[0+rax*8]
lea rax, scale_factor[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mulsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
movss xmm0, DWORD PTR -20[rbp]
pxor xmm1, xmm1
comiss xmm0, xmm1
jb .L46
movsd xmm1, QWORD PTR -8[rbp]
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
cvttsd2si rax, xmm0
mov QWORD PTR -16[rbp], rax
jmp .L43
.L46:
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC5[rip]
subsd xmm0, xmm1
cvttsd2si rax, xmm0
mov QWORD PTR -16[rbp], rax
.L43:
mov rax, QWORD PTR -16[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE18:
.size fxp_float_to_fxp, .-fxp_float_to_fxp
.globl fxp_double_to_fxp
.type fxp_double_to_fxp, @function
fxp_double_to_fxp:
.LFB19:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -40[rbp], xmm0
mov eax, DWORD PTR impl[rip+4]
cdqe
lea rdx, 0[0+rax*8]
lea rax, scale_factor[rip]
movsd xmm0, QWORD PTR [rdx+rax]
movsd xmm1, QWORD PTR -40[rbp]
mulsd xmm0, xmm1
movsd QWORD PTR -16[rbp], xmm0
mov eax, DWORD PTR rounding_mode[rip]
test eax, eax
jne .L48
movsd xmm0, QWORD PTR -40[rbp]
pxor xmm1, xmm1
comisd xmm0, xmm1
jb .L59
movsd xmm1, QWORD PTR -16[rbp]
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
cvttsd2si rax, xmm0
mov QWORD PTR -24[rbp], rax
jmp .L51
.L59:
movsd xmm0, QWORD PTR -16[rbp]
movsd xmm1, QWORD PTR .LC5[rip]
subsd xmm0, xmm1
cvttsd2si rax, xmm0
mov QWORD PTR -24[rbp], rax
jmp .L51
.L48:
mov eax, DWORD PTR rounding_mode[rip]
cmp eax, 1
jne .L52
movsd xmm0, QWORD PTR -16[rbp]
cvttsd2si rax, xmm0
mov QWORD PTR -24[rbp], rax
pxor xmm1, xmm1
cvtsi2sd xmm1, QWORD PTR -24[rbp]
movsd xmm0, QWORD PTR -16[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -40[rbp]
jbe .L51
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -8[rbp]
jp .L58
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -8[rbp]
je .L51
.L58:
movsd xmm0, QWORD PTR -16[rbp]
movsd xmm1, QWORD PTR .LC7[rip]
subsd xmm0, xmm1
movsd QWORD PTR -16[rbp], xmm0
movsd xmm0, QWORD PTR -16[rbp]
cvttsd2si rax, xmm0
mov QWORD PTR -24[rbp], rax
jmp .L51
.L52:
mov eax, DWORD PTR rounding_mode[rip]
test eax, eax
jne .L51
movsd xmm0, QWORD PTR -16[rbp]
cvttsd2si rax, xmm0
mov QWORD PTR -24[rbp], rax
.L51:
mov rax, QWORD PTR -24[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE19:
.size fxp_double_to_fxp, .-fxp_double_to_fxp
.globl fxp_float_to_fxp_array
.type fxp_float_to_fxp_array, @function
fxp_float_to_fxp_array:
.LFB20:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 40
.cfi_offset 3, -24
mov QWORD PTR -32[rbp], rdi
mov QWORD PTR -40[rbp], rsi
mov DWORD PTR -44[rbp], edx
mov DWORD PTR -12[rbp], 0
jmp .L61
.L62:
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
mov edx, DWORD PTR -12[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -40[rbp]
lea rbx, [rcx+rdx]
movd xmm0, eax
call fxp_float_to_fxp
mov QWORD PTR [rbx], rax
add DWORD PTR -12[rbp], 1
.L61:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L62
nop
nop
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE20:
.size fxp_float_to_fxp_array, .-fxp_float_to_fxp_array
.globl fxp_double_to_fxp_array
.type fxp_double_to_fxp_array, @function
fxp_double_to_fxp_array:
.LFB21:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 40
.cfi_offset 3, -24
mov QWORD PTR -32[rbp], rdi
mov QWORD PTR -40[rbp], rsi
mov DWORD PTR -44[rbp], edx
mov DWORD PTR -12[rbp], 0
jmp .L64
.L65:
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov edx, DWORD PTR -12[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -40[rbp]
lea rbx, [rcx+rdx]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR [rbx], rax
add DWORD PTR -12[rbp], 1
.L64:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L65
nop
nop
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE21:
.size fxp_double_to_fxp_array, .-fxp_double_to_fxp_array
.globl fxp_to_float
.type fxp_to_float, @function
fxp_to_float:
.LFB22:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR -8[rbp], eax
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -8[rbp]
mov eax, DWORD PTR impl[rip+4]
cdqe
lea rdx, 0[0+rax*8]
lea rax, scale_factor_inv[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mulsd xmm0, xmm1
cvtsd2ss xmm0, xmm0
movss DWORD PTR -4[rbp], xmm0
movss xmm0, DWORD PTR -4[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE22:
.size fxp_to_float, .-fxp_to_float
.globl fxp_to_double
.type fxp_to_double, @function
fxp_to_double:
.LFB23:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR -12[rbp], eax
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -12[rbp]
mov eax, DWORD PTR impl[rip+4]
cdqe
lea rdx, 0[0+rax*8]
lea rax, scale_factor_inv[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mulsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE23:
.size fxp_to_double, .-fxp_to_double
.globl fxp_to_float_array
.type fxp_to_float_array, @function
fxp_to_float_array:
.LFB24:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 40
.cfi_offset 3, -24
mov QWORD PTR -32[rbp], rdi
mov QWORD PTR -40[rbp], rsi
mov DWORD PTR -44[rbp], edx
mov DWORD PTR -12[rbp], 0
jmp .L71
.L72:
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov edx, DWORD PTR -12[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*4]
mov rdx, QWORD PTR -32[rbp]
lea rbx, [rcx+rdx]
mov rdi, rax
call fxp_to_float
movd eax, xmm0
mov DWORD PTR [rbx], eax
add DWORD PTR -12[rbp], 1
.L71:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L72
nop
nop
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE24:
.size fxp_to_float_array, .-fxp_to_float_array
.globl fxp_to_double_array
.type fxp_to_double_array, @function
fxp_to_double_array:
.LFB25:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 40
.cfi_offset 3, -24
mov QWORD PTR -32[rbp], rdi
mov QWORD PTR -40[rbp], rsi
mov DWORD PTR -44[rbp], edx
mov DWORD PTR -12[rbp], 0
jmp .L74
.L75:
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov edx, DWORD PTR -12[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -32[rbp]
lea rbx, [rcx+rdx]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov QWORD PTR [rbx], rax
add DWORD PTR -12[rbp], 1
.L74:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L75
nop
nop
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE25:
.size fxp_to_double_array, .-fxp_to_double_array
.globl fxp_abs
.type fxp_abs, @function
fxp_abs:
.LFB26:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 24
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
cqo
mov rax, rdx
xor rax, QWORD PTR -24[rbp]
sub rax, rdx
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_quantize
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE26:
.size fxp_abs, .-fxp_abs
.globl fxp_add
.type fxp_add, @function
fxp_add:
.LFB27:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov rdx, QWORD PTR -24[rbp]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_quantize
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE27:
.size fxp_add, .-fxp_add
.globl fxp_sub
.type fxp_sub, @function
fxp_sub:
.LFB28:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov rax, QWORD PTR -24[rbp]
sub rax, QWORD PTR -32[rbp]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_quantize
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE28:
.size fxp_sub, .-fxp_sub
.globl fxp_mult
.type fxp_mult, @function
fxp_mult:
.LFB29:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov rax, QWORD PTR -24[rbp]
imul rax, QWORD PTR -32[rbp]
mov QWORD PTR -8[rbp], rax
cmp QWORD PTR -8[rbp], 0
js .L83
mov eax, DWORD PTR impl[rip+4]
sub eax, 1
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
cdqe
and rax, QWORD PTR -8[rbp]
lea rdx, [rax+rax]
mov rax, QWORD PTR -8[rbp]
add rdx, rax
mov eax, DWORD PTR impl[rip+4]
mov ecx, eax
sar rdx, cl
mov rax, rdx
mov QWORD PTR -16[rbp], rax
jmp .L84
.L83:
mov rax, QWORD PTR -8[rbp]
neg rax
mov rdx, rax
mov eax, DWORD PTR impl[rip+4]
sub eax, 1
mov esi, 1
mov ecx, eax
sal esi, cl
mov eax, esi
cdqe
and rax, rdx
add rax, rax
sub rax, QWORD PTR -8[rbp]
mov rdx, rax
mov eax, DWORD PTR impl[rip+4]
mov ecx, eax
sar rdx, cl
mov rax, rdx
neg rax
mov QWORD PTR -16[rbp], rax
.L84:
mov rax, QWORD PTR -16[rbp]
mov rdi, rax
call fxp_quantize
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -16[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE29:
.size fxp_mult, .-fxp_mult
.globl fxp_div
.type fxp_div, @function
fxp_div:
.LFB30:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
cmp QWORD PTR -32[rbp], 0
setne al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov eax, DWORD PTR impl[rip+4]
mov rdx, QWORD PTR -24[rbp]
mov ecx, eax
sal rdx, cl
mov rax, rdx
cqo
idiv QWORD PTR -32[rbp]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_quantize
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE30:
.size fxp_div, .-fxp_div
.globl fxp_neg
.type fxp_neg, @function
fxp_neg:
.LFB31:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 24
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
neg rax
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_quantize
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE31:
.size fxp_neg, .-fxp_neg
.globl fxp_sign
.type fxp_sign, @function
fxp_sign:
.LFB32:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
cmp QWORD PTR -8[rbp], 0
je .L91
cmp QWORD PTR -8[rbp], 0
jns .L92
mov rax, QWORD PTR _fxp_minus_one[rip]
jmp .L95
.L92:
mov rax, QWORD PTR _fxp_one[rip]
jmp .L95
.L91:
mov eax, 0
.L95:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE32:
.size fxp_sign, .-fxp_sign
.globl fxp_shrl
.type fxp_shrl, @function
fxp_shrl:
.LFB33:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov DWORD PTR -12[rbp], esi
mov rax, QWORD PTR -8[rbp]
mov edx, eax
mov eax, DWORD PTR -12[rbp]
mov ecx, eax
shr edx, cl
mov eax, edx
mov eax, eax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE33:
.size fxp_shrl, .-fxp_shrl
.globl fxp_square
.type fxp_square, @function
fxp_square:
.LFB34:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 8
mov QWORD PTR -8[rbp], rdi
mov rdx, QWORD PTR -8[rbp]
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_mult
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE34:
.size fxp_square, .-fxp_square
.section .rodata
.LC8:
.string "\n%i"
.text
.globl fxp_print_int
.type fxp_print_int, @function
fxp_print_int:
.LFB35:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov esi, eax
lea rdi, .LC8[rip]
mov eax, 0
call printf@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE35:
.size fxp_print_int, .-fxp_print_int
.section .rodata
.LC9:
.string "\n%f"
.text
.globl fxp_print_float
.type fxp_print_float, @function
fxp_print_float:
.LFB36:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_to_float
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movq rax, xmm1
movq xmm0, rax
lea rdi, .LC9[rip]
mov eax, 1
call printf@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE36:
.size fxp_print_float, .-fxp_print_float
.globl fxp_print_float_array
.type fxp_print_float_array, @function
fxp_print_float_array:
.LFB37:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -4[rbp], 0
jmp .L103
.L104:
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov rdi, rax
call fxp_to_float
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movq rax, xmm1
movq xmm0, rax
lea rdi, .LC9[rip]
mov eax, 1
call printf@PLT
add DWORD PTR -4[rbp], 1
.L103:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -28[rbp]
jl .L104
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE37:
.size fxp_print_float_array, .-fxp_print_float_array
.section .rodata
.LC10:
.string "%s = {"
.LC11:
.string " %jd "
.LC12:
.string "}"
.text
.globl print_fxp_array_elements
.type print_fxp_array_elements, @function
print_fxp_array_elements:
.LFB38:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov rax, QWORD PTR -24[rbp]
mov rsi, rax
lea rdi, .LC10[rip]
mov eax, 0
call printf@PLT
mov DWORD PTR -4[rbp], 0
jmp .L106
.L107:
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov rsi, rax
lea rdi, .LC11[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -4[rbp], 1
.L106:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -36[rbp]
jl .L107
lea rdi, .LC12[rip]
call puts@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE38:
.size print_fxp_array_elements, .-print_fxp_array_elements
.globl initialize_array
.type initialize_array, @function
initialize_array:
.LFB39:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -4[rbp], 0
jmp .L109
.L110:
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR [rax], xmm0
add DWORD PTR -4[rbp], 1
.L109:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -28[rbp]
jl .L110
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE39:
.size initialize_array, .-initialize_array
.globl revert_array
.type revert_array, @function
revert_array:
.LFB40:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 40
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov edx, DWORD PTR -36[rbp]
mov rax, QWORD PTR -32[rbp]
mov esi, edx
mov rdi, rax
call initialize_array
mov DWORD PTR -4[rbp], 0
jmp .L112
.L113:
mov eax, DWORD PTR -36[rbp]
sub eax, DWORD PTR -4[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -24[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
add DWORD PTR -4[rbp], 1
.L112:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -36[rbp]
jl .L113
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE40:
.size revert_array, .-revert_array
.globl internal_pow
.type internal_pow, @function
internal_pow:
.LFB41:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -24[rbp], xmm0
movsd QWORD PTR -32[rbp], xmm1
movsd xmm0, QWORD PTR .LC7[rip]
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -12[rbp], 0
jmp .L115
.L116:
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -12[rbp], 1
.L115:
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -12[rbp]
movsd xmm0, QWORD PTR -32[rbp]
comisd xmm0, xmm1
ja .L116
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE41:
.size internal_pow, .-internal_pow
.globl internal_abs
.type internal_abs, @function
internal_abs:
.LFB42:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -8[rbp], xmm0
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -8[rbp]
jbe .L124
movsd xmm0, QWORD PTR -8[rbp]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm0, xmm1
jmp .L122
.L124:
movsd xmm0, QWORD PTR -8[rbp]
.L122:
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE42:
.size internal_abs, .-internal_abs
.globl fatorial
.type fatorial, @function
fatorial:
.LFB43:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
cmp DWORD PTR -4[rbp], 0
je .L126
mov eax, DWORD PTR -4[rbp]
sub eax, 1
mov edi, eax
call fatorial
imul eax, DWORD PTR -4[rbp]
jmp .L128
.L126:
mov eax, 1
.L128:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE43:
.size fatorial, .-fatorial
.section .rodata
.align 8
.LC14:
.string "[DEBUG] the first constraint of Jury criteria failed: (F(1) > 0)"
.align 8
.LC16:
.string "[DEBUG] the second constraint of Jury criteria failed: (F(-1)*(-1)^n > 0)"
.align 8
.LC17:
.string "[DEBUG] the third constraint of Jury criteria failed: (abs(a0) < a_{n}*z^{n})"
.text
.globl check_stability
.type check_stability, @function
check_stability:
.LFB44:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 168
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov QWORD PTR -152[rbp], rdi
mov DWORD PTR -156[rbp], esi
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov QWORD PTR -200[rbp], rax
mov eax, DWORD PTR -156[rbp]
add eax, eax
sub eax, 1
mov DWORD PTR -116[rbp], eax
mov eax, DWORD PTR -156[rbp]
mov DWORD PTR -124[rbp], eax
mov esi, DWORD PTR -156[rbp]
mov edi, DWORD PTR -116[rbp]
movsx rax, esi
sub rax, 1
mov QWORD PTR -96[rbp], rax
movsx rax, esi
mov rcx, rax
mov ebx, 0
movsx rax, esi
lea rbx, 0[0+rax*8]
movsx rax, edi
sub rax, 1
mov QWORD PTR -88[rbp], rax
movsx rax, esi
mov r14, rax
mov r15d, 0
movsx rax, edi
mov r12, rax
mov r13d, 0
mov rdx, r15
imul rdx, r12
mov rax, r13
imul rax, r14
lea rcx, [rdx+rax]
mov rax, r14
mul r12
add rcx, rdx
mov rdx, rcx
movsx rax, esi
mov r10, rax
mov r11d, 0
movsx rax, edi
mov r8, rax
mov r9d, 0
mov rdx, r11
imul rdx, r8
mov rax, r9
imul rax, r10
lea rcx, [rdx+rax]
mov rax, r10
mul r8
add rcx, rdx
mov rdx, rcx
movsx rdx, esi
movsx rax, edi
imul rax, rdx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L130:
cmp rsp, rdx
je .L131
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L130
.L131:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L132
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L132:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov eax, DWORD PTR -156[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov QWORD PTR -176[rbp], rdx
mov QWORD PTR -168[rbp], 0
movsx rdx, eax
mov QWORD PTR -192[rbp], rdx
mov QWORD PTR -184[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L133:
cmp rsp, rdx
je .L134
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L133
.L134:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L135
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L135:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov DWORD PTR -128[rbp], 0
jmp .L136
.L137:
mov eax, DWORD PTR -128[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -128[rbp], 1
.L136:
mov eax, DWORD PTR -128[rbp]
cmp eax, DWORD PTR -156[rbp]
jl .L137
pxor xmm0, xmm0
movsd QWORD PTR -104[rbp], xmm0
mov DWORD PTR -128[rbp], 0
jmp .L138
.L139:
mov eax, DWORD PTR -128[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
movsd xmm1, QWORD PTR -104[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -104[rbp], xmm0
add DWORD PTR -128[rbp], 1
.L138:
mov eax, DWORD PTR -128[rbp]
cmp eax, DWORD PTR -156[rbp]
jl .L139
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -104[rbp]
jb .L171
lea rdi, .LC14[rip]
mov eax, 0
call printf@PLT
mov eax, 0
jmp .L142
.L171:
pxor xmm0, xmm0
movsd QWORD PTR -104[rbp], xmm0
mov DWORD PTR -128[rbp], 0
jmp .L143
.L144:
mov eax, DWORD PTR -128[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
movsd xmm4, QWORD PTR [rax]
movsd QWORD PTR -176[rbp], xmm4
mov eax, DWORD PTR -156[rbp]
sub eax, 1
sub eax, DWORD PTR -128[rbp]
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov rax, QWORD PTR .LC15[rip]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
mulsd xmm0, QWORD PTR -176[rbp]
movsd xmm1, QWORD PTR -104[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -104[rbp], xmm0
add DWORD PTR -128[rbp], 1
.L143:
mov eax, DWORD PTR -128[rbp]
cmp eax, DWORD PTR -156[rbp]
jl .L144
mov eax, DWORD PTR -156[rbp]
sub eax, 1
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov rax, QWORD PTR .LC15[rip]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
movsd xmm1, QWORD PTR -104[rbp]
mulsd xmm0, xmm1
movsd QWORD PTR -104[rbp], xmm0
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -104[rbp]
jb .L172
lea rdi, .LC16[rip]
mov eax, 0
call printf@PLT
mov eax, 0
jmp .L142
.L172:
mov eax, DWORD PTR -156[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
movq xmm0, rax
call internal_abs
movq rax, xmm0
mov rdx, QWORD PTR -152[rbp]
movsd xmm0, QWORD PTR [rdx]
movq xmm5, rax
comisd xmm5, xmm0
jbe .L173
lea rdi, .LC17[rip]
mov eax, 0
call printf@PLT
mov eax, 0
jmp .L142
.L173:
mov DWORD PTR -128[rbp], 0
jmp .L149
.L152:
mov DWORD PTR -132[rbp], 0
jmp .L150
.L151:
mov rcx, rbx
shr rcx, 3
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -132[rbp]
movsx rsi, edx
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
imul rdx, rcx
add rdx, rsi
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -132[rbp], 1
.L150:
mov eax, DWORD PTR -132[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L151
add DWORD PTR -128[rbp], 1
.L149:
mov eax, DWORD PTR -128[rbp]
cmp eax, DWORD PTR -116[rbp]
jl .L152
mov DWORD PTR -128[rbp], 0
jmp .L153
.L161:
mov DWORD PTR -132[rbp], 0
jmp .L154
.L160:
cmp DWORD PTR -128[rbp], 0
jne .L155
mov eax, DWORD PTR -132[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
mov rcx, rbx
shr rcx, 3
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -132[rbp]
movsx rsi, edx
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
imul rdx, rcx
add rdx, rsi
movsd QWORD PTR [rax+rdx*8], xmm0
jmp .L156
.L155:
mov eax, DWORD PTR -128[rbp]
and eax, 1
test eax, eax
je .L157
mov DWORD PTR -120[rbp], 0
jmp .L158
.L159:
mov rsi, rbx
shr rsi, 3
mov eax, DWORD PTR -128[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -124[rbp]
sub eax, DWORD PTR -120[rbp]
lea edi, -1[rax]
mov rcx, rbx
shr rcx, 3
mov rax, QWORD PTR -80[rbp]
movsx rdi, edi
movsx rdx, edx
imul rdx, rsi
add rdx, rdi
movsd xmm0, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -120[rbp]
movsx rsi, edx
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
imul rdx, rcx
add rdx, rsi
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -120[rbp], 1
.L158:
mov eax, DWORD PTR -120[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L159
sub DWORD PTR -124[rbp], 1
mov eax, DWORD PTR -124[rbp]
mov DWORD PTR -132[rbp], eax
jmp .L156
.L157:
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -128[rbp]
lea esi, -2[rax]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -132[rbp]
movsx rdi, edx
movsx rdx, esi
imul rdx, rcx
add rdx, rdi
movsd xmm0, QWORD PTR [rax+rdx*8]
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -128[rbp]
lea esi, -2[rax]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -124[rbp]
movsx rdi, edx
movsx rdx, esi
imul rdx, rcx
add rdx, rdi
movsd xmm1, QWORD PTR [rax+rdx*8]
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -128[rbp]
lea edx, -2[rax]
mov rax, QWORD PTR -80[rbp]
movsx rdx, edx
imul rdx, rcx
movsd xmm3, QWORD PTR [rax+rdx*8]
movapd xmm2, xmm1
divsd xmm2, xmm3
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -128[rbp]
lea esi, -1[rax]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -132[rbp]
movsx rdi, edx
movsx rdx, esi
imul rdx, rcx
add rdx, rdi
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm1, xmm2
mov rcx, rbx
shr rcx, 3
subsd xmm0, xmm1
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -132[rbp]
movsx rsi, edx
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
imul rdx, rcx
add rdx, rsi
movsd QWORD PTR [rax+rdx*8], xmm0
.L156:
add DWORD PTR -132[rbp], 1
.L154:
mov eax, DWORD PTR -132[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L160
add DWORD PTR -128[rbp], 1
.L153:
mov eax, DWORD PTR -128[rbp]
cmp eax, DWORD PTR -116[rbp]
jl .L161
mov rax, QWORD PTR -80[rbp]
movsd xmm0, QWORD PTR [rax]
pxor xmm1, xmm1
comisd xmm0, xmm1
setnb al
movzx eax, al
mov DWORD PTR -112[rbp], eax
mov DWORD PTR -128[rbp], 0
jmp .L162
.L165:
mov eax, DWORD PTR -128[rbp]
and eax, 1
test eax, eax
jne .L163
mov rcx, rbx
shr rcx, 3
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
imul rdx, rcx
movsd xmm0, QWORD PTR [rax+rdx*8]
pxor xmm1, xmm1
comisd xmm0, xmm1
setnb al
movzx eax, al
mov DWORD PTR -108[rbp], eax
mov eax, DWORD PTR -112[rbp]
cmp eax, DWORD PTR -108[rbp]
je .L174
mov eax, 0
jmp .L142
.L174:
nop
.L163:
add DWORD PTR -128[rbp], 1
.L162:
mov eax, DWORD PTR -128[rbp]
cmp eax, DWORD PTR -116[rbp]
jl .L165
mov eax, 1
.L142:
mov rsp, QWORD PTR -200[rbp]
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L167
call __stack_chk_fail@PLT
.L167:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE44:
.size check_stability, .-check_stability
.globl poly_sum
.type poly_sum, @function
poly_sum:
.LFB45:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov QWORD PTR -40[rbp], rdx
mov DWORD PTR -32[rbp], ecx
mov QWORD PTR -48[rbp], r8
mov DWORD PTR -52[rbp], r9d
mov eax, DWORD PTR -28[rbp]
cmp DWORD PTR -32[rbp], eax
cmovge eax, DWORD PTR -32[rbp]
mov DWORD PTR -52[rbp], eax
mov DWORD PTR -4[rbp], 0
jmp .L176
.L179:
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -32[rbp]
jle .L177
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -24[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR -28[rbp]
sub eax, DWORD PTR -32[rbp]
cmp DWORD PTR -4[rbp], eax
jl .L178
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
mov eax, DWORD PTR -4[rbp]
sub eax, DWORD PTR -28[rbp]
mov edx, eax
mov eax, DWORD PTR -32[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
jmp .L178
.L177:
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR -32[rbp]
sub eax, DWORD PTR -28[rbp]
cmp DWORD PTR -4[rbp], eax
jl .L178
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
mov eax, DWORD PTR -4[rbp]
sub eax, DWORD PTR -32[rbp]
mov edx, eax
mov eax, DWORD PTR -28[rbp]
add eax, edx
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
.L178:
add DWORD PTR -4[rbp], 1
.L176:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -52[rbp]
jl .L179
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE45:
.size poly_sum, .-poly_sum
.globl poly_mult
.type poly_mult, @function
poly_mult:
.LFB46:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov QWORD PTR -40[rbp], rdx
mov DWORD PTR -32[rbp], ecx
mov QWORD PTR -48[rbp], r8
mov DWORD PTR -52[rbp], r9d
mov edx, DWORD PTR -28[rbp]
mov eax, DWORD PTR -32[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR -52[rbp], eax
mov DWORD PTR -12[rbp], 0
jmp .L181
.L184:
mov DWORD PTR -8[rbp], 0
jmp .L182
.L183:
mov edx, DWORD PTR -28[rbp]
mov eax, DWORD PTR -32[rbp]
add eax, edx
sub eax, DWORD PTR -12[rbp]
sub eax, DWORD PTR -8[rbp]
sub eax, 2
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR [rax], xmm0
add DWORD PTR -8[rbp], 1
.L182:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -32[rbp]
jl .L183
add DWORD PTR -12[rbp], 1
.L181:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -28[rbp]
jl .L184
mov DWORD PTR -12[rbp], 0
jmp .L185
.L188:
mov DWORD PTR -8[rbp], 0
jmp .L186
.L187:
mov edx, DWORD PTR -28[rbp]
mov eax, DWORD PTR -32[rbp]
add eax, edx
sub eax, DWORD PTR -12[rbp]
sub eax, DWORD PTR -8[rbp]
sub eax, 2
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
sub eax, DWORD PTR -12[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movsd xmm2, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
sub eax, DWORD PTR -8[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm2
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
add DWORD PTR -8[rbp], 1
.L186:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -32[rbp]
jl .L187
add DWORD PTR -12[rbp], 1
.L185:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -28[rbp]
jl .L188
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE46:
.size poly_mult, .-poly_mult
.section .rodata
.align 8
.LC18:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/util.h"
.align 8
.LC19:
.string "!(window_count == window_size)"
.text
.globl double_check_oscillations
.type double_check_oscillations, @function
double_check_oscillations:
.LFB47:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -44[rbp], esi
mov rax, QWORD PTR -40[rbp]
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -44[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
ucomisd xmm0, xmm1
setp al
mov edx, 1
ucomisd xmm0, xmm1
cmovne eax, edx
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov DWORD PTR -24[rbp], 0
mov DWORD PTR -20[rbp], 0
mov DWORD PTR -16[rbp], 2
jmp .L190
.L198:
mov eax, DWORD PTR -16[rbp]
mov DWORD PTR -8[rbp], eax
mov DWORD PTR -12[rbp], 0
jmp .L191
.L197:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -8[rbp]
jle .L192
mov DWORD PTR -24[rbp], 0
mov DWORD PTR -20[rbp], 0
.L192:
mov edx, DWORD PTR -12[rbp]
mov eax, DWORD PTR -8[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -44[rbp]
jge .L200
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
ucomisd xmm0, xmm1
jp .L194
ucomisd xmm0, xmm1
jne .L194
add DWORD PTR -20[rbp], 1
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -8[rbp]
jne .L194
lea rcx, __PRETTY_FUNCTION__.19[rip]
mov edx, 209
lea rsi, .LC18[rip]
lea rdi, .LC19[rip]
call __assert_fail@PLT
.L194:
add DWORD PTR -24[rbp], 1
add DWORD PTR -12[rbp], 1
.L191:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L197
jmp .L196
.L200:
nop
.L196:
add DWORD PTR -16[rbp], 1
.L190:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L198
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE47:
.size double_check_oscillations, .-double_check_oscillations
.section .rodata
.LC20:
.string "window_size %d\n"
.LC21:
.string "%.0f == %.0f\n"
.LC22:
.string "desired_elements %d\n"
.LC23:
.string "found_elements %d\n"
.text
.globl double_check_limit_cycle
.type double_check_limit_cycle, @function
double_check_limit_cycle:
.LFB48:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -44[rbp], esi
mov eax, DWORD PTR -44[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -28[rbp], 0
mov DWORD PTR -24[rbp], 1
mov eax, DWORD PTR -44[rbp]
sub eax, 2
mov DWORD PTR -28[rbp], eax
jmp .L202
.L207:
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
ucomisd xmm0, QWORD PTR -8[rbp]
jp .L215
comisd xmm0, QWORD PTR -8[rbp]
jne .L215
jmp .L206
.L215:
add DWORD PTR -24[rbp], 1
sub DWORD PTR -28[rbp], 1
.L202:
cmp DWORD PTR -28[rbp], 0
jns .L207
.L206:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -44[rbp]
je .L208
cmp DWORD PTR -24[rbp], 1
je .L208
mov eax, 1
jmp .L209
.L208:
mov eax, 0
.L209:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov eax, DWORD PTR -24[rbp]
mov esi, eax
lea rdi, .LC20[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -24[rbp]
add eax, eax
mov DWORD PTR -16[rbp], eax
mov DWORD PTR -20[rbp], 0
mov eax, DWORD PTR -44[rbp]
sub eax, 1
mov DWORD PTR -28[rbp], eax
jmp .L210
.L214:
mov eax, DWORD PTR -44[rbp]
sub eax, DWORD PTR -24[rbp]
cmp DWORD PTR -28[rbp], eax
jl .L211
mov eax, DWORD PTR -28[rbp]
sub eax, DWORD PTR -24[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
movapd xmm1, xmm0
movq xmm0, rax
lea rdi, .LC21[rip]
mov eax, 2
call printf@PLT
mov eax, DWORD PTR -28[rbp]
sub eax, DWORD PTR -24[rbp]
mov DWORD PTR -12[rbp], eax
cmp DWORD PTR -12[rbp], 0
jle .L212
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
sub eax, DWORD PTR -24[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
ucomisd xmm0, xmm1
jp .L212
ucomisd xmm0, xmm1
jne .L212
add DWORD PTR -20[rbp], 2
.L211:
sub DWORD PTR -28[rbp], 1
.L210:
cmp DWORD PTR -28[rbp], 0
jns .L214
.L212:
mov eax, DWORD PTR -16[rbp]
mov esi, eax
lea rdi, .LC22[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -20[rbp]
mov esi, eax
lea rdi, .LC23[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -20[rbp]
setne al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE48:
.size double_check_limit_cycle, .-double_check_limit_cycle
.globl double_check_persistent_limit_cycle
.type double_check_persistent_limit_cycle, @function
double_check_persistent_limit_cycle:
.LFB49:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 88
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov QWORD PTR -120[rbp], rdi
mov DWORD PTR -124[rbp], esi
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov DWORD PTR -92[rbp], 0
mov DWORD PTR -96[rbp], 0
mov DWORD PTR -88[rbp], 0
mov rax, QWORD PTR -120[rbp]
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -80[rbp], xmm0
mov DWORD PTR -92[rbp], 0
jmp .L218
.L224:
mov eax, DWORD PTR -92[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
ucomisd xmm0, QWORD PTR -80[rbp]
jp .L240
comisd xmm0, QWORD PTR -80[rbp]
je .L242
.L240:
add DWORD PTR -88[rbp], 1
jmp .L221
.L242:
cmp DWORD PTR -88[rbp], 0
jne .L244
add DWORD PTR -96[rbp], 1
.L221:
add DWORD PTR -92[rbp], 1
.L218:
mov eax, DWORD PTR -92[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L224
jmp .L223
.L244:
nop
.L223:
mov eax, DWORD PTR -96[rbp]
add DWORD PTR -88[rbp], eax
cmp DWORD PTR -88[rbp], 1
jle .L225
mov eax, DWORD PTR -124[rbp]
mov edx, eax
shr edx, 31
add eax, edx
sar eax
cmp DWORD PTR -88[rbp], eax
jg .L225
mov eax, 1
jmp .L226
.L225:
mov eax, 0
.L226:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov eax, DWORD PTR -88[rbp]
mov rdx, rsp
mov rbx, rdx
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov r14, rdx
mov r15d, 0
movsx rdx, eax
mov r12, rdx
mov r13d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L227:
cmp rsp, rdx
je .L228
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L227
.L228:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L229
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L229:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov DWORD PTR -92[rbp], 0
jmp .L230
.L232:
mov eax, DWORD PTR -92[rbp]
cmp eax, DWORD PTR -88[rbp]
jge .L231
mov eax, DWORD PTR -92[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -92[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
.L231:
add DWORD PTR -92[rbp], 1
.L230:
mov eax, DWORD PTR -92[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L232
mov DWORD PTR -92[rbp], 0
mov DWORD PTR -84[rbp], 0
mov BYTE PTR -97[rbp], 0
jmp .L233
.L238:
mov eax, DWORD PTR -92[rbp]
lea edx, 1[rax]
mov DWORD PTR -92[rbp], edx
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -84[rbp]
lea edx, 1[rax]
mov DWORD PTR -84[rbp], edx
mov rdx, QWORD PTR -64[rbp]
cdqe
movsd xmm1, QWORD PTR [rdx+rax*8]
ucomisd xmm0, xmm1
jp .L234
ucomisd xmm0, xmm1
jne .L234
mov BYTE PTR -97[rbp], 1
mov eax, DWORD PTR -84[rbp]
cmp eax, DWORD PTR -88[rbp]
jne .L233
jmp .L243
.L234:
mov BYTE PTR -97[rbp], 0
jmp .L237
.L243:
mov DWORD PTR -84[rbp], 0
.L233:
mov eax, DWORD PTR -92[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L238
.L237:
movzx eax, BYTE PTR -97[rbp]
test eax, eax
setne al
xor eax, 1
movzx eax, al
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
mov rsp, rbx
nop
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
je .L239
call __stack_chk_fail@PLT
.L239:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE49:
.size double_check_persistent_limit_cycle, .-double_check_persistent_limit_cycle
.section .rodata
.LC24:
.string " %.32f "
.text
.globl print_array_elements
.type print_array_elements, @function
print_array_elements:
.LFB50:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov rax, QWORD PTR -24[rbp]
mov rsi, rax
lea rdi, .LC10[rip]
mov eax, 0
call printf@PLT
mov DWORD PTR -4[rbp], 0
jmp .L246
.L247:
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
movq xmm0, rax
lea rdi, .LC24[rip]
mov eax, 1
call printf@PLT
add DWORD PTR -4[rbp], 1
.L246:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -36[rbp]
jl .L247
lea rdi, .LC12[rip]
call puts@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE50:
.size print_array_elements, .-print_array_elements
.globl double_add_matrix
.type double_add_matrix, @function
double_add_matrix:
.LFB51:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -20[rbp], edi
mov DWORD PTR -24[rbp], esi
mov QWORD PTR -32[rbp], rdx
mov QWORD PTR -40[rbp], rcx
mov QWORD PTR -48[rbp], r8
mov DWORD PTR -8[rbp], 0
jmp .L249
.L252:
mov DWORD PTR -4[rbp], 0
jmp .L250
.L251:
mov eax, DWORD PTR -8[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
movsd xmm1, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -8[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
movsd xmm0, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -8[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -48[rbp]
add rdx, rax
addsd xmm0, xmm1
mov eax, DWORD PTR -4[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -4[rbp], 1
.L250:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -24[rbp]
jb .L251
add DWORD PTR -8[rbp], 1
.L249:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -20[rbp]
jb .L252
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE51:
.size double_add_matrix, .-double_add_matrix
.globl double_sub_matrix
.type double_sub_matrix, @function
double_sub_matrix:
.LFB52:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -20[rbp], edi
mov DWORD PTR -24[rbp], esi
mov QWORD PTR -32[rbp], rdx
mov QWORD PTR -40[rbp], rcx
mov QWORD PTR -48[rbp], r8
mov DWORD PTR -8[rbp], 0
jmp .L254
.L257:
mov DWORD PTR -4[rbp], 0
jmp .L255
.L256:
mov eax, DWORD PTR -8[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
movsd xmm0, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -8[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
movsd xmm1, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -8[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -48[rbp]
add rdx, rax
subsd xmm0, xmm1
mov eax, DWORD PTR -4[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -4[rbp], 1
.L255:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -24[rbp]
jb .L256
add DWORD PTR -8[rbp], 1
.L254:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -20[rbp]
jb .L257
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE52:
.size double_sub_matrix, .-double_sub_matrix
.section .rodata
.align 8
.LC25:
.string "\nError! Operation invalid, please enter with valid matrices."
.text
.globl double_matrix_multiplication
.type double_matrix_multiplication, @function
double_matrix_multiplication:
.LFB53:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov DWORD PTR -36[rbp], edi
mov DWORD PTR -40[rbp], esi
mov DWORD PTR -44[rbp], edx
mov DWORD PTR -48[rbp], ecx
mov QWORD PTR -56[rbp], r8
mov QWORD PTR -64[rbp], r9
mov eax, DWORD PTR -40[rbp]
cmp eax, DWORD PTR -44[rbp]
jne .L259
mov DWORD PTR -20[rbp], 0
jmp .L260
.L263:
mov DWORD PTR -16[rbp], 0
jmp .L261
.L262:
mov eax, DWORD PTR -20[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR 16[rbp]
add rdx, rax
mov eax, DWORD PTR -16[rbp]
pxor xmm0, xmm0
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -16[rbp], 1
.L261:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -48[rbp]
jb .L262
add DWORD PTR -20[rbp], 1
.L260:
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -36[rbp]
jb .L263
mov DWORD PTR -20[rbp], 0
jmp .L264
.L269:
mov DWORD PTR -16[rbp], 0
jmp .L265
.L268:
mov DWORD PTR -12[rbp], 0
jmp .L266
.L267:
mov eax, DWORD PTR -20[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -56[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
movsd xmm1, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -12[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -64[rbp]
add rdx, rax
mov eax, DWORD PTR -16[rbp]
movsd xmm0, QWORD PTR [rdx+rax*8]
mulsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
mov eax, DWORD PTR -20[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR 16[rbp]
add rdx, rax
mov eax, DWORD PTR -16[rbp]
movsd xmm1, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -20[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -56[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
movsd xmm2, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -12[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -64[rbp]
add rdx, rax
mov eax, DWORD PTR -16[rbp]
movsd xmm0, QWORD PTR [rdx+rax*8]
mulsd xmm0, xmm2
mov eax, DWORD PTR -20[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR 16[rbp]
add rdx, rax
addsd xmm0, xmm1
mov eax, DWORD PTR -16[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -12[rbp], 1
.L266:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -40[rbp]
jb .L267
add DWORD PTR -16[rbp], 1
.L265:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -48[rbp]
jb .L268
add DWORD PTR -20[rbp], 1
.L264:
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -36[rbp]
jb .L269
jmp .L271
.L259:
lea rdi, .LC25[rip]
call puts@PLT
.L271:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE53:
.size double_matrix_multiplication, .-double_matrix_multiplication
.globl fxp_matrix_multiplication
.type fxp_matrix_multiplication, @function
fxp_matrix_multiplication:
.LFB54:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 56
.cfi_offset 3, -24
mov DWORD PTR -36[rbp], edi
mov DWORD PTR -40[rbp], esi
mov DWORD PTR -44[rbp], edx
mov DWORD PTR -48[rbp], ecx
mov QWORD PTR -56[rbp], r8
mov QWORD PTR -64[rbp], r9
mov eax, DWORD PTR -40[rbp]
cmp eax, DWORD PTR -44[rbp]
jne .L273
mov DWORD PTR -28[rbp], 0
jmp .L274
.L277:
mov DWORD PTR -24[rbp], 0
jmp .L275
.L276:
mov eax, DWORD PTR -28[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR 16[rbp]
add rdx, rax
mov eax, DWORD PTR -24[rbp]
mov QWORD PTR [rdx+rax*8], 0
add DWORD PTR -24[rbp], 1
.L275:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -48[rbp]
jb .L276
add DWORD PTR -28[rbp], 1
.L274:
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -36[rbp]
jb .L277
mov DWORD PTR -28[rbp], 0
jmp .L278
.L283:
mov DWORD PTR -24[rbp], 0
jmp .L279
.L282:
mov DWORD PTR -20[rbp], 0
jmp .L280
.L281:
mov eax, DWORD PTR -20[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -64[rbp]
add rdx, rax
mov eax, DWORD PTR -24[rbp]
mov rdx, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -28[rbp]
sal rax, 5
mov rcx, rax
mov rax, QWORD PTR -56[rbp]
add rcx, rax
mov eax, DWORD PTR -20[rbp]
mov rax, QWORD PTR [rcx+rax*8]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov eax, DWORD PTR -28[rbp]
sal rax, 5
mov rcx, rax
mov rax, QWORD PTR 16[rbp]
add rcx, rax
mov eax, DWORD PTR -24[rbp]
mov rax, QWORD PTR [rcx+rax*8]
mov ecx, DWORD PTR -28[rbp]
mov rsi, rcx
sal rsi, 5
mov rcx, QWORD PTR 16[rbp]
lea rbx, [rsi+rcx]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov edx, DWORD PTR -24[rbp]
mov QWORD PTR [rbx+rdx*8], rax
add DWORD PTR -20[rbp], 1
.L280:
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -40[rbp]
jb .L281
add DWORD PTR -24[rbp], 1
.L279:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -48[rbp]
jb .L282
add DWORD PTR -28[rbp], 1
.L278:
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -36[rbp]
jb .L283
jmp .L285
.L273:
lea rdi, .LC25[rip]
call puts@PLT
.L285:
nop
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE54:
.size fxp_matrix_multiplication, .-fxp_matrix_multiplication
.globl fxp_exp_matrix
.type fxp_exp_matrix, @function
fxp_exp_matrix:
.LFB55:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 200
.cfi_offset 3, -24
mov DWORD PTR -180[rbp], edi
mov DWORD PTR -184[rbp], esi
mov QWORD PTR -192[rbp], rdx
mov DWORD PTR -196[rbp], ecx
mov QWORD PTR -208[rbp], r8
mov rax, QWORD PTR fs:40
mov QWORD PTR -24[rbp], rax
xor eax, eax
cmp DWORD PTR -196[rbp], 0
jne .L287
mov DWORD PTR -176[rbp], 0
jmp .L288
.L293:
mov DWORD PTR -172[rbp], 0
jmp .L289
.L292:
mov eax, DWORD PTR -176[rbp]
cmp eax, DWORD PTR -172[rbp]
jne .L290
mov eax, DWORD PTR -176[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -208[rbp]
lea rbx, [rdx+rax]
mov rax, QWORD PTR .LC7[rip]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -172[rbp]
mov QWORD PTR [rbx+rdx*8], rax
jmp .L291
.L290:
mov eax, DWORD PTR -176[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -208[rbp]
add rdx, rax
mov eax, DWORD PTR -172[rbp]
mov QWORD PTR [rdx+rax*8], 0
.L291:
add DWORD PTR -172[rbp], 1
.L289:
mov eax, DWORD PTR -172[rbp]
cmp eax, DWORD PTR -184[rbp]
jb .L292
add DWORD PTR -176[rbp], 1
.L288:
mov eax, DWORD PTR -176[rbp]
cmp eax, DWORD PTR -180[rbp]
jb .L293
jmp .L286
.L287:
mov DWORD PTR -176[rbp], 0
jmp .L295
.L298:
mov DWORD PTR -172[rbp], 0
jmp .L296
.L297:
mov eax, DWORD PTR -176[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
mov eax, DWORD PTR -176[rbp]
sal rax, 5
mov rcx, rax
mov rax, QWORD PTR -208[rbp]
add rcx, rax
mov eax, DWORD PTR -172[rbp]
mov rdx, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -172[rbp]
mov QWORD PTR [rcx+rax*8], rdx
add DWORD PTR -172[rbp], 1
.L296:
mov eax, DWORD PTR -172[rbp]
cmp eax, DWORD PTR -184[rbp]
jb .L297
add DWORD PTR -176[rbp], 1
.L295:
mov eax, DWORD PTR -176[rbp]
cmp eax, DWORD PTR -180[rbp]
jb .L298
cmp DWORD PTR -196[rbp], 1
je .L318
mov DWORD PTR -168[rbp], 1
jmp .L300
.L315:
mov DWORD PTR -176[rbp], 0
jmp .L301
.L304:
mov DWORD PTR -172[rbp], 0
jmp .L302
.L303:
mov eax, DWORD PTR -176[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -208[rbp]
add rdx, rax
mov eax, DWORD PTR -172[rbp]
mov rax, QWORD PTR [rdx+rax*8]
mov ecx, DWORD PTR -172[rbp]
mov edx, DWORD PTR -176[rbp]
sal rdx, 2
add rdx, rcx
mov QWORD PTR -160[rbp+rdx*8], rax
add DWORD PTR -172[rbp], 1
.L302:
mov eax, DWORD PTR -172[rbp]
cmp eax, DWORD PTR -184[rbp]
jb .L303
add DWORD PTR -176[rbp], 1
.L301:
mov eax, DWORD PTR -176[rbp]
cmp eax, DWORD PTR -180[rbp]
jb .L304
mov DWORD PTR -176[rbp], 0
jmp .L305
.L308:
mov DWORD PTR -172[rbp], 0
jmp .L306
.L307:
mov eax, DWORD PTR -176[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -208[rbp]
add rdx, rax
mov eax, DWORD PTR -172[rbp]
mov QWORD PTR [rdx+rax*8], 0
add DWORD PTR -172[rbp], 1
.L306:
mov eax, DWORD PTR -172[rbp]
cmp eax, DWORD PTR -184[rbp]
jb .L307
add DWORD PTR -176[rbp], 1
.L305:
mov eax, DWORD PTR -176[rbp]
cmp eax, DWORD PTR -180[rbp]
jb .L308
mov DWORD PTR -176[rbp], 0
jmp .L309
.L314:
mov DWORD PTR -172[rbp], 0
jmp .L310
.L313:
mov DWORD PTR -164[rbp], 0
jmp .L311
.L312:
mov eax, DWORD PTR -164[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
mov eax, DWORD PTR -172[rbp]
mov rdx, QWORD PTR [rdx+rax*8]
mov ecx, DWORD PTR -164[rbp]
mov eax, DWORD PTR -176[rbp]
sal rax, 2
add rax, rcx
mov rax, QWORD PTR -160[rbp+rax*8]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov eax, DWORD PTR -176[rbp]
sal rax, 5
mov rcx, rax
mov rax, QWORD PTR -208[rbp]
add rcx, rax
mov eax, DWORD PTR -172[rbp]
mov rax, QWORD PTR [rcx+rax*8]
mov ecx, DWORD PTR -176[rbp]
mov rsi, rcx
sal rsi, 5
mov rcx, QWORD PTR -208[rbp]
lea rbx, [rsi+rcx]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov edx, DWORD PTR -172[rbp]
mov QWORD PTR [rbx+rdx*8], rax
add DWORD PTR -164[rbp], 1
.L311:
mov eax, DWORD PTR -164[rbp]
cmp eax, DWORD PTR -184[rbp]
jb .L312
add DWORD PTR -172[rbp], 1
.L310:
mov eax, DWORD PTR -172[rbp]
cmp eax, DWORD PTR -184[rbp]
jb .L313
add DWORD PTR -176[rbp], 1
.L309:
mov eax, DWORD PTR -176[rbp]
cmp eax, DWORD PTR -180[rbp]
jb .L314
add DWORD PTR -168[rbp], 1
.L300:
mov eax, DWORD PTR -168[rbp]
cmp eax, DWORD PTR -196[rbp]
jb .L315
jmp .L286
.L318:
nop
.L286:
mov rax, QWORD PTR -24[rbp]
sub rax, QWORD PTR fs:40
je .L317
call __stack_chk_fail@PLT
.L317:
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE55:
.size fxp_exp_matrix, .-fxp_exp_matrix
.globl double_exp_matrix
.type double_exp_matrix, @function
double_exp_matrix:
.LFB56:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 192
mov DWORD PTR -164[rbp], edi
mov DWORD PTR -168[rbp], esi
mov QWORD PTR -176[rbp], rdx
mov DWORD PTR -180[rbp], ecx
mov QWORD PTR -192[rbp], r8
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
cmp DWORD PTR -180[rbp], 0
jne .L320
mov DWORD PTR -160[rbp], 0
jmp .L321
.L326:
mov DWORD PTR -156[rbp], 0
jmp .L322
.L325:
mov eax, DWORD PTR -160[rbp]
cmp eax, DWORD PTR -156[rbp]
jne .L323
mov eax, DWORD PTR -160[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
mov eax, DWORD PTR -156[rbp]
movsd xmm0, QWORD PTR .LC7[rip]
movsd QWORD PTR [rdx+rax*8], xmm0
jmp .L324
.L323:
mov eax, DWORD PTR -160[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
mov eax, DWORD PTR -156[rbp]
pxor xmm0, xmm0
movsd QWORD PTR [rdx+rax*8], xmm0
.L324:
add DWORD PTR -156[rbp], 1
.L322:
mov eax, DWORD PTR -156[rbp]
cmp eax, DWORD PTR -168[rbp]
jb .L325
add DWORD PTR -160[rbp], 1
.L321:
mov eax, DWORD PTR -160[rbp]
cmp eax, DWORD PTR -164[rbp]
jb .L326
jmp .L319
.L320:
mov DWORD PTR -160[rbp], 0
jmp .L328
.L331:
mov DWORD PTR -156[rbp], 0
jmp .L329
.L330:
mov eax, DWORD PTR -160[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -176[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR -160[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
mov eax, DWORD PTR -156[rbp]
movsd xmm0, QWORD PTR [rcx+rax*8]
mov eax, DWORD PTR -156[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -156[rbp], 1
.L329:
mov eax, DWORD PTR -156[rbp]
cmp eax, DWORD PTR -168[rbp]
jb .L330
add DWORD PTR -160[rbp], 1
.L328:
mov eax, DWORD PTR -160[rbp]
cmp eax, DWORD PTR -164[rbp]
jb .L331
cmp DWORD PTR -180[rbp], 1
je .L351
mov DWORD PTR -148[rbp], 1
jmp .L333
.L348:
mov DWORD PTR -160[rbp], 0
jmp .L334
.L337:
mov DWORD PTR -156[rbp], 0
jmp .L335
.L336:
mov eax, DWORD PTR -160[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
mov eax, DWORD PTR -156[rbp]
movsd xmm0, QWORD PTR [rdx+rax*8]
mov edx, DWORD PTR -156[rbp]
mov eax, DWORD PTR -160[rbp]
sal rax, 2
add rax, rdx
movsd QWORD PTR -144[rbp+rax*8], xmm0
add DWORD PTR -156[rbp], 1
.L335:
mov eax, DWORD PTR -156[rbp]
cmp eax, DWORD PTR -168[rbp]
jb .L336
add DWORD PTR -160[rbp], 1
.L334:
mov eax, DWORD PTR -160[rbp]
cmp eax, DWORD PTR -164[rbp]
jb .L337
mov DWORD PTR -160[rbp], 0
jmp .L338
.L341:
mov DWORD PTR -156[rbp], 0
jmp .L339
.L340:
mov eax, DWORD PTR -160[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
mov eax, DWORD PTR -156[rbp]
pxor xmm0, xmm0
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -156[rbp], 1
.L339:
mov eax, DWORD PTR -156[rbp]
cmp eax, DWORD PTR -168[rbp]
jb .L340
add DWORD PTR -160[rbp], 1
.L338:
mov eax, DWORD PTR -160[rbp]
cmp eax, DWORD PTR -164[rbp]
jb .L341
mov DWORD PTR -160[rbp], 0
jmp .L342
.L347:
mov DWORD PTR -156[rbp], 0
jmp .L343
.L346:
mov DWORD PTR -152[rbp], 0
jmp .L344
.L345:
mov eax, DWORD PTR -160[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
mov eax, DWORD PTR -156[rbp]
movsd xmm1, QWORD PTR [rdx+rax*8]
mov edx, DWORD PTR -152[rbp]
mov eax, DWORD PTR -160[rbp]
sal rax, 2
add rax, rdx
movsd xmm2, QWORD PTR -144[rbp+rax*8]
mov eax, DWORD PTR -152[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -176[rbp]
add rdx, rax
mov eax, DWORD PTR -156[rbp]
movsd xmm0, QWORD PTR [rdx+rax*8]
mulsd xmm0, xmm2
mov eax, DWORD PTR -160[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -192[rbp]
add rdx, rax
addsd xmm0, xmm1
mov eax, DWORD PTR -156[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -152[rbp], 1
.L344:
mov eax, DWORD PTR -152[rbp]
cmp eax, DWORD PTR -168[rbp]
jb .L345
add DWORD PTR -156[rbp], 1
.L343:
mov eax, DWORD PTR -156[rbp]
cmp eax, DWORD PTR -168[rbp]
jb .L346
add DWORD PTR -160[rbp], 1
.L342:
mov eax, DWORD PTR -160[rbp]
cmp eax, DWORD PTR -164[rbp]
jb .L347
add DWORD PTR -148[rbp], 1
.L333:
mov eax, DWORD PTR -148[rbp]
cmp eax, DWORD PTR -180[rbp]
jb .L348
jmp .L319
.L351:
nop
.L319:
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L350
call __stack_chk_fail@PLT
.L350:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE56:
.size double_exp_matrix, .-double_exp_matrix
.globl fxp_add_matrix
.type fxp_add_matrix, @function
fxp_add_matrix:
.LFB57:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 48
.cfi_offset 3, -24
mov DWORD PTR -28[rbp], edi
mov DWORD PTR -32[rbp], esi
mov QWORD PTR -40[rbp], rdx
mov QWORD PTR -48[rbp], rcx
mov QWORD PTR -56[rbp], r8
mov DWORD PTR -16[rbp], 0
jmp .L353
.L356:
mov DWORD PTR -12[rbp], 0
jmp .L354
.L355:
mov eax, DWORD PTR -16[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -48[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
mov rdx, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -16[rbp]
sal rax, 5
mov rcx, rax
mov rax, QWORD PTR -40[rbp]
add rcx, rax
mov eax, DWORD PTR -12[rbp]
mov rax, QWORD PTR [rcx+rax*8]
mov ecx, DWORD PTR -16[rbp]
mov rsi, rcx
sal rsi, 5
mov rcx, QWORD PTR -56[rbp]
lea rbx, [rsi+rcx]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov edx, DWORD PTR -12[rbp]
mov QWORD PTR [rbx+rdx*8], rax
add DWORD PTR -12[rbp], 1
.L354:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -32[rbp]
jb .L355
add DWORD PTR -16[rbp], 1
.L353:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -28[rbp]
jb .L356
nop
nop
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE57:
.size fxp_add_matrix, .-fxp_add_matrix
.globl fxp_sub_matrix
.type fxp_sub_matrix, @function
fxp_sub_matrix:
.LFB58:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 48
.cfi_offset 3, -24
mov DWORD PTR -28[rbp], edi
mov DWORD PTR -32[rbp], esi
mov QWORD PTR -40[rbp], rdx
mov QWORD PTR -48[rbp], rcx
mov QWORD PTR -56[rbp], r8
mov DWORD PTR -16[rbp], 0
jmp .L358
.L361:
mov DWORD PTR -12[rbp], 0
jmp .L359
.L360:
mov eax, DWORD PTR -16[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -48[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
mov rdx, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -16[rbp]
sal rax, 5
mov rcx, rax
mov rax, QWORD PTR -40[rbp]
add rcx, rax
mov eax, DWORD PTR -12[rbp]
mov rax, QWORD PTR [rcx+rax*8]
mov ecx, DWORD PTR -16[rbp]
mov rsi, rcx
sal rsi, 5
mov rcx, QWORD PTR -56[rbp]
lea rbx, [rsi+rcx]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov edx, DWORD PTR -12[rbp]
mov QWORD PTR [rbx+rdx*8], rax
add DWORD PTR -12[rbp], 1
.L359:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -32[rbp]
jb .L360
add DWORD PTR -16[rbp], 1
.L358:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -28[rbp]
jb .L361
nop
nop
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE58:
.size fxp_sub_matrix, .-fxp_sub_matrix
.section .rodata
.align 8
.LC26:
.string "\nMatrix\n=====================\n"
.LC27:
.string "#matrix[%d][%d]: %2.2f "
.text
.globl print_matrix
.type print_matrix, @function
print_matrix:
.LFB59:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -32[rbp], edx
lea rdi, .LC26[rip]
call puts@PLT
mov DWORD PTR -8[rbp], 0
jmp .L363
.L366:
mov DWORD PTR -4[rbp], 0
jmp .L364
.L365:
mov eax, DWORD PTR -8[rbp]
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -24[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
mov rcx, QWORD PTR [rdx+rax*8]
mov edx, DWORD PTR -4[rbp]
mov eax, DWORD PTR -8[rbp]
movq xmm0, rcx
mov esi, eax
lea rdi, .LC27[rip]
mov eax, 1
call printf@PLT
add DWORD PTR -4[rbp], 1
.L364:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -32[rbp]
jb .L365
mov edi, 10
call putchar@PLT
add DWORD PTR -8[rbp], 1
.L363:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -28[rbp]
jb .L366
mov edi, 10
call putchar@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE59:
.size print_matrix, .-print_matrix
.globl determinant
.type determinant, @function
determinant:
.LFB60:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 208
mov QWORD PTR -184[rbp], rdi
mov DWORD PTR -188[rbp], esi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
pxor xmm0, xmm0
movsd QWORD PTR -152[rbp], xmm0
cmp DWORD PTR -188[rbp], 0
jle .L368
cmp DWORD PTR -188[rbp], 1
jne .L369
mov rax, QWORD PTR -184[rbp]
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -152[rbp], xmm0
jmp .L368
.L369:
cmp DWORD PTR -188[rbp], 2
jne .L370
mov rax, QWORD PTR -184[rbp]
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -184[rbp]
add rax, 32
movsd xmm0, QWORD PTR 8[rax]
mulsd xmm0, xmm1
mov rax, QWORD PTR -184[rbp]
add rax, 32
movsd xmm2, QWORD PTR [rax]
mov rax, QWORD PTR -184[rbp]
movsd xmm1, QWORD PTR 8[rax]
mulsd xmm1, xmm2
subsd xmm0, xmm1
movsd QWORD PTR -152[rbp], xmm0
jmp .L368
.L370:
pxor xmm0, xmm0
movsd QWORD PTR -152[rbp], xmm0
mov DWORD PTR -160[rbp], 0
jmp .L371
.L380:
mov DWORD PTR -168[rbp], 0
jmp .L372
.L379:
mov DWORD PTR -168[rbp], 1
jmp .L373
.L378:
mov DWORD PTR -156[rbp], 0
mov DWORD PTR -164[rbp], 0
jmp .L374
.L377:
mov eax, DWORD PTR -164[rbp]
cmp eax, DWORD PTR -160[rbp]
je .L383
mov eax, DWORD PTR -168[rbp]
cdqe
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -184[rbp]
add rdx, rax
mov eax, DWORD PTR -168[rbp]
lea ecx, -1[rax]
mov eax, DWORD PTR -164[rbp]
cdqe
movsd xmm0, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -156[rbp]
movsx rdx, eax
movsx rax, ecx
sal rax, 2
add rax, rdx
movsd QWORD PTR -144[rbp+rax*8], xmm0
add DWORD PTR -156[rbp], 1
jmp .L376
.L383:
nop
.L376:
add DWORD PTR -164[rbp], 1
.L374:
mov eax, DWORD PTR -164[rbp]
cmp eax, DWORD PTR -188[rbp]
jl .L377
add DWORD PTR -168[rbp], 1
.L373:
mov eax, DWORD PTR -168[rbp]
cmp eax, DWORD PTR -188[rbp]
jl .L378
add DWORD PTR -168[rbp], 1
.L372:
mov eax, DWORD PTR -188[rbp]
sub eax, 1
cmp DWORD PTR -168[rbp], eax
jl .L379
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -160[rbp]
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
mov rax, QWORD PTR .LC15[rip]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
mov rax, QWORD PTR -184[rbp]
mov edx, DWORD PTR -160[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm1
movsd QWORD PTR -200[rbp], xmm0
mov eax, DWORD PTR -188[rbp]
lea edx, -1[rax]
lea rax, -144[rbp]
mov esi, edx
mov rdi, rax
call determinant
mulsd xmm0, QWORD PTR -200[rbp]
movsd xmm1, QWORD PTR -152[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -152[rbp], xmm0
add DWORD PTR -160[rbp], 1
.L371:
mov eax, DWORD PTR -160[rbp]
cmp eax, DWORD PTR -188[rbp]
jl .L380
.L368:
movsd xmm0, QWORD PTR -152[rbp]
movq rax, xmm0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L382
call __stack_chk_fail@PLT
.L382:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE60:
.size determinant, .-determinant
.globl fxp_determinant
.type fxp_determinant, @function
fxp_determinant:
.LFB61:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 336
mov QWORD PTR -312[rbp], rdi
mov DWORD PTR -316[rbp], esi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -296[rbp], 0
jmp .L385
.L388:
mov DWORD PTR -292[rbp], 0
jmp .L386
.L387:
mov eax, DWORD PTR -296[rbp]
cdqe
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -312[rbp]
add rdx, rax
mov eax, DWORD PTR -292[rbp]
cdqe
mov rax, QWORD PTR [rdx+rax*8]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov edx, DWORD PTR -292[rbp]
movsx rcx, edx
mov edx, DWORD PTR -296[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -272[rbp+rdx*8], rax
add DWORD PTR -292[rbp], 1
.L386:
mov eax, DWORD PTR -292[rbp]
cmp eax, DWORD PTR -316[rbp]
jl .L387
add DWORD PTR -296[rbp], 1
.L385:
mov eax, DWORD PTR -296[rbp]
cmp eax, DWORD PTR -316[rbp]
jl .L388
pxor xmm0, xmm0
movsd QWORD PTR -280[rbp], xmm0
cmp DWORD PTR -316[rbp], 0
jle .L389
cmp DWORD PTR -316[rbp], 1
jne .L390
movsd xmm0, QWORD PTR -272[rbp]
movsd QWORD PTR -280[rbp], xmm0
jmp .L389
.L390:
cmp DWORD PTR -316[rbp], 2
jne .L391
movsd xmm1, QWORD PTR -272[rbp]
movsd xmm0, QWORD PTR -232[rbp]
mulsd xmm0, xmm1
movsd xmm2, QWORD PTR -240[rbp]
movsd xmm1, QWORD PTR -264[rbp]
mulsd xmm1, xmm2
subsd xmm0, xmm1
movsd QWORD PTR -280[rbp], xmm0
jmp .L389
.L391:
pxor xmm0, xmm0
movsd QWORD PTR -280[rbp], xmm0
mov DWORD PTR -288[rbp], 0
jmp .L392
.L401:
mov DWORD PTR -296[rbp], 0
jmp .L393
.L400:
mov DWORD PTR -296[rbp], 1
jmp .L394
.L399:
mov DWORD PTR -284[rbp], 0
mov DWORD PTR -292[rbp], 0
jmp .L395
.L398:
mov eax, DWORD PTR -292[rbp]
cmp eax, DWORD PTR -288[rbp]
je .L404
mov eax, DWORD PTR -296[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -292[rbp]
movsx rcx, eax
mov eax, DWORD PTR -296[rbp]
cdqe
sal rax, 2
add rax, rcx
movsd xmm0, QWORD PTR -272[rbp+rax*8]
mov eax, DWORD PTR -284[rbp]
movsx rcx, eax
movsx rax, edx
sal rax, 2
add rax, rcx
movsd QWORD PTR -144[rbp+rax*8], xmm0
add DWORD PTR -284[rbp], 1
jmp .L397
.L404:
nop
.L397:
add DWORD PTR -292[rbp], 1
.L395:
mov eax, DWORD PTR -292[rbp]
cmp eax, DWORD PTR -316[rbp]
jl .L398
add DWORD PTR -296[rbp], 1
.L394:
mov eax, DWORD PTR -296[rbp]
cmp eax, DWORD PTR -316[rbp]
jl .L399
add DWORD PTR -296[rbp], 1
.L393:
mov eax, DWORD PTR -316[rbp]
sub eax, 1
cmp DWORD PTR -296[rbp], eax
jl .L400
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -288[rbp]
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm1, xmm0
movsd xmm0, QWORD PTR .LC7[rip]
addsd xmm0, xmm1
mov rax, QWORD PTR .LC15[rip]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
mov eax, DWORD PTR -288[rbp]
cdqe
movsd xmm1, QWORD PTR -272[rbp+rax*8]
mulsd xmm0, xmm1
movsd QWORD PTR -328[rbp], xmm0
mov eax, DWORD PTR -316[rbp]
lea edx, -1[rax]
lea rax, -144[rbp]
mov esi, edx
mov rdi, rax
call determinant
mulsd xmm0, QWORD PTR -328[rbp]
movsd xmm1, QWORD PTR -280[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -280[rbp], xmm0
add DWORD PTR -288[rbp], 1
.L392:
mov eax, DWORD PTR -288[rbp]
cmp eax, DWORD PTR -316[rbp]
jl .L401
.L389:
movsd xmm0, QWORD PTR -280[rbp]
movq rax, xmm0
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L403
call __stack_chk_fail@PLT
.L403:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE61:
.size fxp_determinant, .-fxp_determinant
.globl transpose
.type transpose, @function
transpose:
.LFB62:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov DWORD PTR -40[rbp], ecx
mov DWORD PTR -8[rbp], 0
jmp .L406
.L409:
mov DWORD PTR -4[rbp], 0
jmp .L407
.L408:
mov eax, DWORD PTR -8[rbp]
cdqe
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -24[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR -4[rbp]
cdqe
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
cdqe
movsd xmm0, QWORD PTR [rcx+rax*8]
mov eax, DWORD PTR -8[rbp]
cdqe
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -4[rbp], 1
.L407:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -40[rbp]
jl .L408
add DWORD PTR -8[rbp], 1
.L406:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -36[rbp]
jl .L409
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE62:
.size transpose, .-transpose
.globl fxp_transpose
.type fxp_transpose, @function
fxp_transpose:
.LFB63:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov DWORD PTR -40[rbp], ecx
mov DWORD PTR -8[rbp], 0
jmp .L411
.L414:
mov DWORD PTR -4[rbp], 0
jmp .L412
.L413:
mov eax, DWORD PTR -8[rbp]
cdqe
sal rax, 5
mov rdx, rax
mov rax, QWORD PTR -24[rbp]
add rdx, rax
mov eax, DWORD PTR -4[rbp]
cdqe
sal rax, 5
mov rcx, rax
mov rax, QWORD PTR -32[rbp]
add rcx, rax
mov eax, DWORD PTR -4[rbp]
cdqe
mov rdx, QWORD PTR [rdx+rax*8]
mov eax, DWORD PTR -8[rbp]
cdqe
mov QWORD PTR [rcx+rax*8], rdx
add DWORD PTR -4[rbp], 1
.L412:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -40[rbp]
jl .L413
add DWORD PTR -8[rbp], 1
.L411:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -36[rbp]
jl .L414
nop
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE63:
.size fxp_transpose, .-fxp_transpose
.globl generic_timing_shift_l_double
.type generic_timing_shift_l_double, @function
generic_timing_shift_l_double:
.LFB64:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -24[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov DWORD PTR -36[rbp], esi
mov eax, DWORD PTR hw[rip+24]
lea ecx, [rax+rax]
mov edx, DWORD PTR hw[rip+28]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+32]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
add edx, eax
mov eax, DWORD PTR hw[rip+44]
sal eax, 3
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov rax, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -8[rbp], xmm0
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
sal eax, 2
add edx, eax
mov eax, DWORD PTR hw[rip+84]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+44]
sal eax, 2
add edx, eax
mov eax, DWORD PTR hw[rip+92]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR hw[rip+44]
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov DWORD PTR -12[rbp], 0
jmp .L416
.L417:
mov eax, DWORD PTR hw[rip+48]
mov edx, eax
sal edx, 4
add edx, eax
mov eax, DWORD PTR hw[rip+60]
sal eax, 2
add edx, eax
mov eax, DWORD PTR hw[rip+64]
sal eax, 2
add edx, eax
mov eax, DWORD PTR hw[rip+68]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+72]
add eax, eax
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+84]
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+76]
add eax, eax
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 2
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+92]
add edx, eax
mov eax, DWORD PTR hw[rip+124]
add edx, eax
mov eax, DWORD PTR hw[rip+52]
add edx, eax
mov eax, DWORD PTR hw[rip+88]
add edx, eax
mov eax, DWORD PTR hw[rip+100]
add edx, eax
mov eax, DWORD PTR hw[rip+104]
add edx, eax
mov eax, DWORD PTR hw[rip+128]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR -12[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
add DWORD PTR -12[rbp], 1
.L416:
mov eax, DWORD PTR -36[rbp]
sub eax, 1
cmp DWORD PTR -12[rbp], eax
jl .L417
mov eax, DWORD PTR -36[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR [rax], xmm0
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 2
mov ecx, eax
mov edx, DWORD PTR hw[rip+84]
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
add ecx, eax
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+60]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+64]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+72]
add edx, eax
mov eax, DWORD PTR hw[rip+68]
add edx, eax
mov eax, DWORD PTR hw[rip+52]
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add edx, eax
mov eax, DWORD PTR hw[rip+124]
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+28]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+116]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+120]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE64:
.size generic_timing_shift_l_double, .-generic_timing_shift_l_double
.globl generic_timing_shift_r_double
.type generic_timing_shift_r_double, @function
generic_timing_shift_r_double:
.LFB65:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -24[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov DWORD PTR -36[rbp], esi
mov eax, DWORD PTR hw[rip+24]
lea ecx, [rax+rax]
mov edx, DWORD PTR hw[rip+28]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+32]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
add edx, eax
mov eax, DWORD PTR hw[rip+44]
sal eax, 3
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR -36[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -8[rbp], xmm0
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
sal eax, 3
sub eax, edx
mov ecx, eax
mov eax, DWORD PTR hw[rip+64]
add eax, eax
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+60]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+84]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+44]
sal eax, 2
add edx, eax
mov eax, DWORD PTR hw[rip+68]
add edx, eax
mov eax, DWORD PTR hw[rip+72]
add edx, eax
mov eax, DWORD PTR hw[rip+92]
add edx, eax
mov eax, DWORD PTR hw[rip+52]
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov edx, DWORD PTR hw[rip+48]
mov eax, DWORD PTR hw[rip+44]
add eax, edx
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+32]
add edx, eax
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR -36[rbp]
sub eax, 1
mov DWORD PTR -12[rbp], eax
jmp .L420
.L421:
mov eax, DWORD PTR -12[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
sal eax, 4
sub eax, edx
mov ecx, eax
mov eax, DWORD PTR hw[rip+60]
sal eax, 2
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+64]
sal eax, 2
add edx, eax
mov eax, DWORD PTR hw[rip+68]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+72]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+84]
sal eax, 2
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 2
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+52]
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add edx, eax
mov eax, DWORD PTR hw[rip+92]
add edx, eax
mov eax, DWORD PTR hw[rip+124]
add edx, eax
mov eax, DWORD PTR hw[rip+32]
add edx, eax
mov eax, DWORD PTR hw[rip+100]
add edx, eax
mov eax, DWORD PTR hw[rip+104]
add edx, eax
mov eax, DWORD PTR hw[rip+128]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
sub DWORD PTR -12[rbp], 1
.L420:
cmp DWORD PTR -12[rbp], 0
jg .L421
mov rax, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR [rax], xmm0
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
sal eax, 2
add eax, edx
add eax, eax
mov ecx, eax
mov edx, DWORD PTR hw[rip+84]
mov eax, edx
sal eax, 2
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+116]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+120]
add edx, eax
mov eax, DWORD PTR hw[rip+120]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
add edx, eax
mov eax, DWORD PTR hw[rip+28]
add edx, eax
mov eax, DWORD PTR hw[rip+124]
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE65:
.size generic_timing_shift_r_double, .-generic_timing_shift_r_double
.globl shiftL
.type shiftL, @function
shiftL:
.LFB66:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov rax, QWORD PTR -32[rbp]
mov rax, QWORD PTR [rax]
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -12[rbp], 0
jmp .L424
.L425:
mov eax, DWORD PTR -12[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov edx, DWORD PTR -12[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -32[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
add DWORD PTR -12[rbp], 1
.L424:
mov eax, DWORD PTR -36[rbp]
sub eax, 1
cmp DWORD PTR -12[rbp], eax
jl .L425
mov eax, DWORD PTR -36[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE66:
.size shiftL, .-shiftL
.globl shiftR
.type shiftR, @function
shiftR:
.LFB67:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov eax, DWORD PTR -36[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov QWORD PTR -8[rbp], rax
mov eax, DWORD PTR -36[rbp]
sub eax, 1
mov DWORD PTR -12[rbp], eax
jmp .L428
.L429:
mov eax, DWORD PTR -12[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov edx, DWORD PTR -12[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -32[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
sub DWORD PTR -12[rbp], 1
.L428:
cmp DWORD PTR -12[rbp], 0
jg .L429
mov rax, QWORD PTR -32[rbp]
mov rdx, QWORD PTR -24[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE67:
.size shiftR, .-shiftR
.globl shiftLfloat
.type shiftLfloat, @function
shiftLfloat:
.LFB68:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -20[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov DWORD PTR -24[rbp], esi
mov rax, QWORD PTR -32[rbp]
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -4[rbp], xmm0
mov DWORD PTR -8[rbp], 0
jmp .L432
.L433:
mov eax, DWORD PTR -8[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -8[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
add DWORD PTR -8[rbp], 1
.L432:
mov eax, DWORD PTR -24[rbp]
sub eax, 1
cmp DWORD PTR -8[rbp], eax
jl .L433
mov eax, DWORD PTR -24[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR [rax], xmm0
movss xmm0, DWORD PTR -4[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE68:
.size shiftLfloat, .-shiftLfloat
.globl shiftRfloat
.type shiftRfloat, @function
shiftRfloat:
.LFB69:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -20[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov DWORD PTR -24[rbp], esi
mov eax, DWORD PTR -24[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -4[rbp], xmm0
mov eax, DWORD PTR -24[rbp]
sub eax, 1
mov DWORD PTR -8[rbp], eax
jmp .L436
.L437:
mov eax, DWORD PTR -8[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -8[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
sub DWORD PTR -8[rbp], 1
.L436:
cmp DWORD PTR -8[rbp], 0
jg .L437
mov rax, QWORD PTR -32[rbp]
movss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR [rax], xmm0
movss xmm0, DWORD PTR -4[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE69:
.size shiftRfloat, .-shiftRfloat
.globl shiftRDdouble
.type shiftRDdouble, @function
shiftRDdouble:
.LFB70:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -24[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov DWORD PTR -36[rbp], esi
mov rax, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -12[rbp], 0
jmp .L440
.L441:
mov eax, DWORD PTR -12[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
add DWORD PTR -12[rbp], 1
.L440:
mov eax, DWORD PTR -36[rbp]
sub eax, 1
cmp DWORD PTR -12[rbp], eax
jl .L441
mov eax, DWORD PTR -36[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR [rax], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE70:
.size shiftRDdouble, .-shiftRDdouble
.globl shiftRdouble
.type shiftRdouble, @function
shiftRdouble:
.LFB71:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -24[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov DWORD PTR -36[rbp], esi
mov eax, DWORD PTR -36[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -8[rbp], xmm0
mov eax, DWORD PTR -36[rbp]
sub eax, 1
mov DWORD PTR -12[rbp], eax
jmp .L444
.L445:
mov eax, DWORD PTR -12[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
sub DWORD PTR -12[rbp], 1
.L444:
cmp DWORD PTR -12[rbp], 0
jg .L445
mov rax, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR [rax], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE71:
.size shiftRdouble, .-shiftRdouble
.globl shiftLDouble
.type shiftLDouble, @function
shiftLDouble:
.LFB72:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd QWORD PTR -24[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov DWORD PTR -36[rbp], esi
mov rax, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -12[rbp], 0
jmp .L448
.L449:
mov eax, DWORD PTR -12[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
add DWORD PTR -12[rbp], 1
.L448:
mov eax, DWORD PTR -36[rbp]
sub eax, 1
cmp DWORD PTR -12[rbp], eax
jl .L449
mov eax, DWORD PTR -36[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR [rax], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE72:
.size shiftLDouble, .-shiftLDouble
.globl shiftLboth
.type shiftLboth, @function
shiftLboth:
.LFB73:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -20[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov QWORD PTR -40[rbp], rsi
mov QWORD PTR -48[rbp], rdx
mov DWORD PTR -24[rbp], ecx
mov rax, QWORD PTR -48[rbp]
mov rax, QWORD PTR [rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -32[rbp]
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -12[rbp], xmm0
mov DWORD PTR -16[rbp], 0
jmp .L452
.L453:
mov eax, DWORD PTR -16[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
mov edx, DWORD PTR -16[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -48[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
mov eax, DWORD PTR -16[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -16[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
add DWORD PTR -16[rbp], 1
.L452:
mov eax, DWORD PTR -24[rbp]
sub eax, 1
cmp DWORD PTR -16[rbp], eax
jl .L453
mov eax, DWORD PTR -24[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -48[rbp]
add rdx, rax
mov rax, QWORD PTR -40[rbp]
mov QWORD PTR [rdx], rax
mov eax, DWORD PTR -24[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR [rax], xmm0
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE73:
.size shiftLboth, .-shiftLboth
.globl shiftRboth
.type shiftRboth, @function
shiftRboth:
.LFB74:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -20[rbp], xmm0
mov QWORD PTR -32[rbp], rdi
mov QWORD PTR -40[rbp], rsi
mov QWORD PTR -48[rbp], rdx
mov DWORD PTR -24[rbp], ecx
mov eax, DWORD PTR -24[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov QWORD PTR -8[rbp], rax
mov eax, DWORD PTR -24[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -12[rbp], xmm0
mov eax, DWORD PTR -24[rbp]
sub eax, 1
mov DWORD PTR -16[rbp], eax
jmp .L455
.L456:
mov eax, DWORD PTR -16[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
mov edx, DWORD PTR -16[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -48[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
mov eax, DWORD PTR -16[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -16[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
sub DWORD PTR -16[rbp], 1
.L455:
cmp DWORD PTR -16[rbp], 0
jg .L456
mov rax, QWORD PTR -48[rbp]
mov rdx, QWORD PTR -40[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -32[rbp]
movss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR [rax], xmm0
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE74:
.size shiftRboth, .-shiftRboth
.globl order
.type order, @function
order:
.LFB75:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -4[rbp], edi
mov DWORD PTR -8[rbp], esi
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -8[rbp]
jle .L458
mov eax, DWORD PTR -4[rbp]
sub eax, 1
jmp .L460
.L458:
mov eax, DWORD PTR -8[rbp]
sub eax, 1
.L460:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE75:
.size order, .-order
.globl fxp_check_limit_cycle
.type fxp_check_limit_cycle, @function
fxp_check_limit_cycle:
.LFB76:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -44[rbp], esi
mov eax, DWORD PTR -44[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -28[rbp], 0
mov DWORD PTR -24[rbp], 1
mov eax, DWORD PTR -44[rbp]
sub eax, 2
mov DWORD PTR -28[rbp], eax
jmp .L462
.L466:
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
cmp QWORD PTR -8[rbp], rax
je .L473
add DWORD PTR -24[rbp], 1
sub DWORD PTR -28[rbp], 1
.L462:
cmp DWORD PTR -28[rbp], 0
jns .L466
jmp .L465
.L473:
nop
.L465:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -44[rbp]
je .L467
cmp DWORD PTR -24[rbp], 1
je .L467
mov eax, 1
jmp .L468
.L467:
mov eax, 0
.L468:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov eax, DWORD PTR -24[rbp]
mov esi, eax
lea rdi, .LC20[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -24[rbp]
add eax, eax
mov DWORD PTR -16[rbp], eax
mov DWORD PTR -20[rbp], 0
mov eax, DWORD PTR -44[rbp]
sub eax, 1
mov DWORD PTR -28[rbp], eax
jmp .L469
.L472:
mov eax, DWORD PTR -44[rbp]
sub eax, DWORD PTR -24[rbp]
cmp DWORD PTR -28[rbp], eax
jl .L470
mov eax, DWORD PTR -28[rbp]
sub eax, DWORD PTR -24[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov rsi, rax
lea rdi, .LC21[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -28[rbp]
sub eax, DWORD PTR -24[rbp]
mov DWORD PTR -12[rbp], eax
cmp DWORD PTR -12[rbp], 0
jle .L471
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
sub eax, DWORD PTR -24[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
cmp rdx, rax
jne .L471
add DWORD PTR -20[rbp], 2
.L470:
sub DWORD PTR -28[rbp], 1
.L469:
cmp DWORD PTR -28[rbp], 0
jns .L472
.L471:
cmp DWORD PTR -20[rbp], 0
setg al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov eax, DWORD PTR -16[rbp]
mov esi, eax
lea rdi, .LC22[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -20[rbp]
mov esi, eax
lea rdi, .LC23[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -16[rbp]
sete al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov edi, 0
call __DSVERIFIER_assert
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE76:
.size fxp_check_limit_cycle, .-fxp_check_limit_cycle
.globl fxp_check_persistent_limit_cycle
.type fxp_check_persistent_limit_cycle, @function
fxp_check_persistent_limit_cycle:
.LFB77:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 88
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov QWORD PTR -120[rbp], rdi
mov DWORD PTR -124[rbp], esi
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov DWORD PTR -92[rbp], 0
mov DWORD PTR -96[rbp], 0
mov DWORD PTR -88[rbp], 0
mov rax, QWORD PTR -120[rbp]
mov rax, QWORD PTR [rax]
mov QWORD PTR -80[rbp], rax
mov DWORD PTR -92[rbp], 0
jmp .L475
.L480:
mov eax, DWORD PTR -92[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
cmp QWORD PTR -80[rbp], rax
je .L476
add DWORD PTR -88[rbp], 1
jmp .L477
.L476:
cmp DWORD PTR -88[rbp], 0
jne .L496
add DWORD PTR -96[rbp], 1
.L477:
add DWORD PTR -92[rbp], 1
.L475:
mov eax, DWORD PTR -92[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L480
jmp .L479
.L496:
nop
.L479:
mov eax, DWORD PTR -96[rbp]
add DWORD PTR -88[rbp], eax
cmp DWORD PTR -88[rbp], 1
jle .L481
mov eax, DWORD PTR -124[rbp]
mov edx, eax
shr edx, 31
add eax, edx
sar eax
cmp DWORD PTR -88[rbp], eax
jg .L481
mov eax, 1
jmp .L482
.L481:
mov eax, 0
.L482:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov eax, DWORD PTR -88[rbp]
mov rdx, rsp
mov rbx, rdx
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov r14, rdx
mov r15d, 0
movsx rdx, eax
mov r12, rdx
mov r13d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L483:
cmp rsp, rdx
je .L484
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L483
.L484:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L485
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L485:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov DWORD PTR -92[rbp], 0
jmp .L486
.L488:
mov eax, DWORD PTR -92[rbp]
cmp eax, DWORD PTR -88[rbp]
jge .L487
mov eax, DWORD PTR -92[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
mov rcx, QWORD PTR [rax]
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -92[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], rcx
.L487:
add DWORD PTR -92[rbp], 1
.L486:
mov eax, DWORD PTR -92[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L488
mov DWORD PTR -92[rbp], 0
mov DWORD PTR -84[rbp], 0
mov BYTE PTR -97[rbp], 0
jmp .L489
.L493:
mov eax, DWORD PTR -92[rbp]
lea edx, 1[rax]
mov DWORD PTR -92[rbp], edx
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
mov rcx, QWORD PTR [rax]
mov eax, DWORD PTR -84[rbp]
lea edx, 1[rax]
mov DWORD PTR -84[rbp], edx
mov rdx, QWORD PTR -64[rbp]
cdqe
mov rax, QWORD PTR [rdx+rax*8]
cmp rcx, rax
jne .L490
mov BYTE PTR -97[rbp], 1
mov eax, DWORD PTR -84[rbp]
cmp eax, DWORD PTR -88[rbp]
jne .L489
jmp .L495
.L490:
mov BYTE PTR -97[rbp], 0
jmp .L492
.L495:
mov DWORD PTR -84[rbp], 0
.L489:
mov eax, DWORD PTR -92[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L493
.L492:
movzx eax, BYTE PTR -97[rbp]
test eax, eax
setne al
xor eax, 1
movzx eax, al
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
mov rsp, rbx
nop
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
je .L494
call __stack_chk_fail@PLT
.L494:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE77:
.size fxp_check_persistent_limit_cycle, .-fxp_check_persistent_limit_cycle
.globl fxp_check_oscillations
.type fxp_check_oscillations, @function
fxp_check_oscillations:
.LFB78:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -44[rbp], esi
mov rax, QWORD PTR -40[rbp]
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR -44[rbp]
cdqe
sal rax, 3
lea rcx, -8[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
cmp rdx, rax
je .L498
mov eax, DWORD PTR -44[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR -44[rbp]
cdqe
sal rax, 3
lea rcx, -16[rax]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
cmp rdx, rax
je .L498
mov eax, 1
jmp .L499
.L498:
mov eax, 0
.L499:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov DWORD PTR -24[rbp], 0
mov DWORD PTR -20[rbp], 0
mov DWORD PTR -16[rbp], 2
jmp .L500
.L507:
mov eax, DWORD PTR -16[rbp]
mov DWORD PTR -8[rbp], eax
mov DWORD PTR -12[rbp], 0
jmp .L501
.L506:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -8[rbp]
jle .L502
mov DWORD PTR -24[rbp], 0
mov DWORD PTR -20[rbp], 0
.L502:
mov edx, DWORD PTR -12[rbp]
mov eax, DWORD PTR -8[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -44[rbp]
jge .L508
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR -4[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
cmp rdx, rax
jne .L504
add DWORD PTR -20[rbp], 1
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -8[rbp]
setne al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
.L504:
add DWORD PTR -24[rbp], 1
add DWORD PTR -12[rbp], 1
.L501:
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L506
jmp .L505
.L508:
nop
.L505:
add DWORD PTR -16[rbp], 1
.L500:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -44[rbp]
jl .L507
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE78:
.size fxp_check_oscillations, .-fxp_check_oscillations
.globl fxp_ln
.type fxp_ln, @function
fxp_ln:
.LFB79:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -20[rbp], edi
mov DWORD PTR -8[rbp], 681391
cmp DWORD PTR -20[rbp], 32767
jg .L510
sal DWORD PTR -20[rbp], 16
sub DWORD PTR -8[rbp], 726817
.L510:
cmp DWORD PTR -20[rbp], 8388607
jg .L511
sal DWORD PTR -20[rbp], 8
sub DWORD PTR -8[rbp], 363409
.L511:
cmp DWORD PTR -20[rbp], 134217727
jg .L512
sal DWORD PTR -20[rbp], 4
sub DWORD PTR -8[rbp], 181704
.L512:
cmp DWORD PTR -20[rbp], 536870911
jg .L513
sal DWORD PTR -20[rbp], 2
sub DWORD PTR -8[rbp], 90852
.L513:
cmp DWORD PTR -20[rbp], 1073741823
jg .L514
sal DWORD PTR -20[rbp]
sub DWORD PTR -8[rbp], 45426
.L514:
mov eax, DWORD PTR -20[rbp]
sar eax
mov edx, eax
mov eax, DWORD PTR -20[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], 0
js .L515
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR -20[rbp], eax
sub DWORD PTR -8[rbp], 26573
.L515:
mov eax, DWORD PTR -20[rbp]
sar eax, 2
mov edx, eax
mov eax, DWORD PTR -20[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], 0
js .L516
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR -20[rbp], eax
sub DWORD PTR -8[rbp], 14624
.L516:
mov eax, DWORD PTR -20[rbp]
sar eax, 3
mov edx, eax
mov eax, DWORD PTR -20[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], 0
js .L517
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR -20[rbp], eax
sub DWORD PTR -8[rbp], 7719
.L517:
mov eax, DWORD PTR -20[rbp]
sar eax, 4
mov edx, eax
mov eax, DWORD PTR -20[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], 0
js .L518
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR -20[rbp], eax
sub DWORD PTR -8[rbp], 3973
.L518:
mov eax, DWORD PTR -20[rbp]
sar eax, 5
mov edx, eax
mov eax, DWORD PTR -20[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], 0
js .L519
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR -20[rbp], eax
sub DWORD PTR -8[rbp], 2017
.L519:
mov eax, DWORD PTR -20[rbp]
sar eax, 6
mov edx, eax
mov eax, DWORD PTR -20[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], 0
js .L520
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR -20[rbp], eax
sub DWORD PTR -8[rbp], 1016
.L520:
mov eax, DWORD PTR -20[rbp]
sar eax, 7
mov edx, eax
mov eax, DWORD PTR -20[rbp]
add eax, edx
mov DWORD PTR -4[rbp], eax
cmp DWORD PTR -4[rbp], 0
js .L521
mov eax, DWORD PTR -4[rbp]
mov DWORD PTR -20[rbp], eax
sub DWORD PTR -8[rbp], 510
.L521:
mov edx, DWORD PTR -20[rbp]
mov eax, -2147483648
sub eax, edx
mov DWORD PTR -20[rbp], eax
mov eax, DWORD PTR -20[rbp]
sar eax, 15
sub DWORD PTR -8[rbp], eax
mov eax, DWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE79:
.size fxp_ln, .-fxp_ln
.globl fxp_log10_low
.type fxp_log10_low, @function
fxp_log10_low:
.LFB80:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 24
movsd QWORD PTR -24[rbp], xmm0
movsd xmm1, QWORD PTR -24[rbp]
movsd xmm0, QWORD PTR .LC28[rip]
mulsd xmm1, xmm0
movsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, xmm1
cvttsd2si eax, xmm0
mov DWORD PTR -12[rbp], eax
mov eax, DWORD PTR -12[rbp]
mov edi, eax
call fxp_ln
mov DWORD PTR -8[rbp], eax
mov edi, 655360
call fxp_ln
mov DWORD PTR -4[rbp], eax
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR -8[rbp]
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -4[rbp]
divsd xmm0, xmm1
movq rax, xmm0
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE80:
.size fxp_log10_low, .-fxp_log10_low
.globl fxp_log10
.type fxp_log10, @function
fxp_log10:
.LFB81:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 8
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
comisd xmm0, QWORD PTR .LC29[rip]
jbe .L533
movsd xmm0, QWORD PTR -8[rbp]
comisd xmm0, QWORD PTR .LC30[rip]
jbe .L534
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC30[rip]
divsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -8[rbp]
movq xmm0, rax
call fxp_log10_low
movsd xmm1, QWORD PTR .LC31[rip]
addsd xmm0, xmm1
movq rax, xmm0
jmp .L530
.L534:
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC29[rip]
divsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -8[rbp]
movq xmm0, rax
call fxp_log10_low
movsd xmm1, QWORD PTR .LC32[rip]
addsd xmm0, xmm1
movq rax, xmm0
jmp .L530
.L533:
mov rax, QWORD PTR -8[rbp]
movq xmm0, rax
call fxp_log10_low
movq rax, xmm0
.L530:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE81:
.size fxp_log10, .-fxp_log10
.section .rodata
.align 8
.LC33:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/functions.h"
.LC34:
.string "sv >= nv"
.text
.globl snrVariance
.type snrVariance, @function
snrVariance:
.LFB82:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov DWORD PTR -68[rbp], edx
pxor xmm0, xmm0
movsd QWORD PTR -40[rbp], xmm0
pxor xmm0, xmm0
movsd QWORD PTR -32[rbp], xmm0
pxor xmm0, xmm0
movsd QWORD PTR -24[rbp], xmm0
pxor xmm0, xmm0
movsd QWORD PTR -16[rbp], xmm0
mov DWORD PTR -44[rbp], 0
jmp .L536
.L537:
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
cvtss2sd xmm0, xmm0
movsd xmm1, QWORD PTR -40[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -40[rbp], xmm0
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
cvtss2sd xmm0, xmm0
movsd xmm1, QWORD PTR -32[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -32[rbp], xmm0
add DWORD PTR -44[rbp], 1
.L536:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -68[rbp]
jl .L537
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -68[rbp]
movsd xmm0, QWORD PTR -40[rbp]
divsd xmm0, xmm1
movsd QWORD PTR -40[rbp], xmm0
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -68[rbp]
movsd xmm0, QWORD PTR -32[rbp]
divsd xmm0, xmm1
movsd QWORD PTR -32[rbp], xmm0
mov DWORD PTR -44[rbp], 0
jmp .L538
.L539:
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
cvtss2sd xmm0, xmm0
movapd xmm1, xmm0
subsd xmm1, QWORD PTR -40[rbp]
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
cvtss2sd xmm0, xmm0
subsd xmm0, QWORD PTR -40[rbp]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
cvtss2sd xmm0, xmm0
movapd xmm1, xmm0
subsd xmm1, QWORD PTR -32[rbp]
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
cvtss2sd xmm0, xmm0
subsd xmm0, QWORD PTR -32[rbp]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -16[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -16[rbp], xmm0
add DWORD PTR -44[rbp], 1
.L538:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -68[rbp]
jl .L539
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -16[rbp]
jp .L544
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -16[rbp]
je .L545
.L544:
movsd xmm0, QWORD PTR -24[rbp]
comisd xmm0, QWORD PTR -16[rbp]
jnb .L542
lea rcx, __PRETTY_FUNCTION__.18[rip]
mov edx, 373
lea rsi, .LC33[rip]
lea rdi, .LC34[rip]
call __assert_fail@PLT
.L542:
movsd xmm0, QWORD PTR -24[rbp]
divsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
pxor xmm0, xmm0
cvtsd2ss xmm0, QWORD PTR -8[rbp]
jmp .L543
.L545:
movss xmm0, DWORD PTR .LC35[rip]
.L543:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE82:
.size snrVariance, .-snrVariance
.globl snrPower
.type snrPower, @function
snrPower:
.LFB83:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov DWORD PTR -52[rbp], edx
pxor xmm0, xmm0
movsd QWORD PTR -24[rbp], xmm0
pxor xmm0, xmm0
movsd QWORD PTR -16[rbp], xmm0
mov DWORD PTR -28[rbp], 0
jmp .L547
.L548:
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
cvtss2sd xmm0, xmm0
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
cvtss2sd xmm0, xmm0
movsd xmm1, QWORD PTR -16[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -16[rbp], xmm0
add DWORD PTR -28[rbp], 1
.L547:
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -52[rbp]
jl .L548
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -16[rbp]
jp .L553
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -16[rbp]
je .L554
.L553:
movsd xmm0, QWORD PTR -24[rbp]
comisd xmm0, QWORD PTR -16[rbp]
jnb .L551
lea rcx, __PRETTY_FUNCTION__.17[rip]
mov edx, 394
lea rsi, .LC33[rip]
lea rdi, .LC34[rip]
call __assert_fail@PLT
.L551:
movsd xmm0, QWORD PTR -24[rbp]
divsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
pxor xmm0, xmm0
cvtsd2ss xmm0, QWORD PTR -8[rbp]
jmp .L552
.L554:
movss xmm0, DWORD PTR .LC35[rip]
.L552:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE83:
.size snrPower, .-snrPower
.section .rodata
.LC38:
.string "power >= 1.0f"
.text
.globl snrPoint
.type snrPoint, @function
snrPoint:
.LFB84:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov DWORD PTR -52[rbp], edx
pxor xmm0, xmm0
movsd QWORD PTR -16[rbp], xmm0
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -20[rbp], 0
jmp .L556
.L563:
mov eax, DWORD PTR -20[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
pxor xmm1, xmm1
ucomiss xmm0, xmm1
jp .L557
pxor xmm1, xmm1
ucomiss xmm0, xmm1
je .L565
.L557:
mov eax, DWORD PTR -20[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -20[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
divss xmm0, xmm1
cvtss2sd xmm0, xmm0
movsd QWORD PTR -16[rbp], xmm0
movsd xmm0, QWORD PTR -16[rbp]
comisd xmm0, QWORD PTR .LC36[rip]
ja .L566
movsd xmm0, QWORD PTR .LC37[rip]
comisd xmm0, QWORD PTR -16[rbp]
ja .L566
movsd xmm0, QWORD PTR -16[rbp]
mulsd xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC7[rip]
comisd xmm0, xmm1
jnb .L559
lea rcx, __PRETTY_FUNCTION__.16[rip]
mov edx, 412
lea rsi, .LC33[rip]
lea rdi, .LC38[rip]
call __assert_fail@PLT
.L565:
nop
jmp .L559
.L566:
nop
.L559:
add DWORD PTR -20[rbp], 1
.L556:
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -52[rbp]
jl .L563
movss xmm0, DWORD PTR .LC35[rip]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE84:
.size snrPoint, .-snrPoint
.globl next
.data
.align 8
.type next, @object
.size next, 8
next:
.quad 1
.text
.globl rand
.type rand, @function
rand:
.LFB85:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov rax, QWORD PTR next[rip]
imul rax, rax, 1103515245
add rax, 12345
mov QWORD PTR next[rip], rax
mov rax, QWORD PTR next[rip]
shr rax, 16
and eax, 32767
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE85:
.size rand, .-rand
.globl srand
.type srand, @function
srand:
.LFB86:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -4[rbp], edi
mov eax, DWORD PTR -4[rbp]
mov QWORD PTR next[rip], rax
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE86:
.size srand, .-srand
.section .rodata
.align 8
.LC41:
.string "(double)timer1*CYCLE <= (double)DEADLINE"
.text
.globl iirIIOutTime
.type iirIIOutTime, @function
iirIIOutTime:
.LFB87:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -56[rbp], rdi
movss DWORD PTR -60[rbp], xmm0
mov QWORD PTR -72[rbp], rsi
mov QWORD PTR -80[rbp], rdx
mov DWORD PTR -64[rbp], ecx
mov DWORD PTR -84[rbp], r8d
mov DWORD PTR -40[rbp], 0
pxor xmm0, xmm0
movss DWORD PTR -36[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 4
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -56[rbp]
add rax, 4
mov QWORD PTR -8[rbp], rax
add DWORD PTR -40[rbp], 71
mov DWORD PTR -28[rbp], 1
jmp .L571
.L572:
mov rax, QWORD PTR -24[rbp]
lea rdx, 4[rax]
mov QWORD PTR -24[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
mov rax, QWORD PTR -56[rbp]
movss xmm0, DWORD PTR [rax]
subss xmm0, xmm1
mov rax, QWORD PTR -56[rbp]
movss DWORD PTR [rax], xmm0
add DWORD PTR -40[rbp], 54
add DWORD PTR -28[rbp], 1
.L571:
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -64[rbp]
jl .L572
mov rax, QWORD PTR -56[rbp]
movss xmm0, DWORD PTR [rax]
addss xmm0, DWORD PTR -60[rbp]
mov rax, QWORD PTR -56[rbp]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -56[rbp]
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -32[rbp], 0
jmp .L573
.L574:
mov rax, QWORD PTR -16[rbp]
lea rdx, 4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -36[rbp]
addss xmm0, xmm1
movss DWORD PTR -36[rbp], xmm0
add DWORD PTR -40[rbp], 46
add DWORD PTR -32[rbp], 1
.L573:
mov eax, DWORD PTR -32[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L574
add DWORD PTR -40[rbp], 38
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR -40[rbp]
movsd xmm2, QWORD PTR .LC39[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR .LC40[rip]
comisd xmm0, xmm1
jnb .L575
lea rcx, __PRETTY_FUNCTION__.15[rip]
mov edx, 450
lea rsi, .LC33[rip]
lea rdi, .LC41[rip]
call __assert_fail@PLT
.L575:
movss xmm0, DWORD PTR -36[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE87:
.size iirIIOutTime, .-iirIIOutTime
.globl iirIItOutTime
.type iirIItOutTime, @function
iirIItOutTime:
.LFB88:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov QWORD PTR -40[rbp], rdi
movss DWORD PTR -44[rbp], xmm0
mov QWORD PTR -56[rbp], rsi
mov QWORD PTR -64[rbp], rdx
mov DWORD PTR -48[rbp], ecx
mov DWORD PTR -68[rbp], r8d
mov DWORD PTR -32[rbp], 0
pxor xmm0, xmm0
movss DWORD PTR -24[rbp], xmm0
mov rax, QWORD PTR -56[rbp]
add rax, 4
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR -8[rbp], rax
mov eax, DWORD PTR -48[rbp]
cmp DWORD PTR -68[rbp], eax
cmovge eax, DWORD PTR -68[rbp]
mov DWORD PTR -20[rbp], eax
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
movaps xmm1, xmm0
mulss xmm1, DWORD PTR -44[rbp]
mov rax, QWORD PTR -40[rbp]
movss xmm0, DWORD PTR [rax]
addss xmm0, xmm1
movss DWORD PTR -24[rbp], xmm0
add DWORD PTR -32[rbp], 105
mov DWORD PTR -28[rbp], 0
jmp .L578
.L581:
mov eax, DWORD PTR -28[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -28[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -48[rbp]
sub eax, 1
cmp DWORD PTR -28[rbp], eax
jge .L579
mov rax, QWORD PTR -16[rbp]
lea rdx, 4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm0, DWORD PTR [rax]
movaps xmm1, xmm0
mulss xmm1, DWORD PTR -24[rbp]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
subss xmm0, xmm1
movss DWORD PTR [rax], xmm0
add DWORD PTR -32[rbp], 41
.L579:
mov eax, DWORD PTR -68[rbp]
sub eax, 1
cmp DWORD PTR -28[rbp], eax
jge .L580
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
movaps xmm1, xmm0
mulss xmm1, DWORD PTR -44[rbp]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
addss xmm0, xmm1
movss DWORD PTR [rax], xmm0
add DWORD PTR -32[rbp], 38
.L580:
add DWORD PTR -32[rbp], 54
add DWORD PTR -28[rbp], 1
.L578:
mov eax, DWORD PTR -20[rbp]
sub eax, 1
cmp DWORD PTR -28[rbp], eax
jl .L581
add DWORD PTR -32[rbp], 7
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR -32[rbp]
movsd xmm2, QWORD PTR .LC39[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR .LC40[rip]
comisd xmm0, xmm1
jnb .L582
lea rcx, __PRETTY_FUNCTION__.14[rip]
mov edx, 477
lea rsi, .LC33[rip]
lea rdi, .LC41[rip]
call __assert_fail@PLT
.L582:
movss xmm0, DWORD PTR -24[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE88:
.size iirIItOutTime, .-iirIItOutTime
.globl iirIItOutTime_double
.type iirIItOutTime_double, @function
iirIItOutTime_double:
.LFB89:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -56[rbp], rdi
movsd QWORD PTR -64[rbp], xmm0
mov QWORD PTR -72[rbp], rsi
mov QWORD PTR -80[rbp], rdx
mov DWORD PTR -84[rbp], ecx
mov DWORD PTR -88[rbp], r8d
mov DWORD PTR -36[rbp], 0
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -16[rbp], rax
mov eax, DWORD PTR -84[rbp]
cmp DWORD PTR -88[rbp], eax
cmovge eax, DWORD PTR -88[rbp]
mov DWORD PTR -28[rbp], eax
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -64[rbp]
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -36[rbp], 105
mov DWORD PTR -32[rbp], 0
jmp .L585
.L588:
mov eax, DWORD PTR -32[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rdx, rax
mov eax, DWORD PTR -32[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR -84[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jge .L586
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -8[rbp]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
subsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
add DWORD PTR -36[rbp], 41
.L586:
mov eax, DWORD PTR -88[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jge .L587
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -64[rbp]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
add DWORD PTR -36[rbp], 38
.L587:
add DWORD PTR -36[rbp], 54
add DWORD PTR -32[rbp], 1
.L585:
mov eax, DWORD PTR -28[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jl .L588
add DWORD PTR -36[rbp], 7
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR -36[rbp]
movsd xmm2, QWORD PTR .LC39[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR .LC40[rip]
comisd xmm0, xmm1
jnb .L589
lea rcx, __PRETTY_FUNCTION__.13[rip]
mov edx, 504
lea rsi, .LC33[rip]
lea rdi, .LC41[rip]
call __assert_fail@PLT
.L589:
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE89:
.size iirIItOutTime_double, .-iirIItOutTime_double
.globl iirOutBoth
.type iirOutBoth, @function
iirOutBoth:
.LFB90:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 144
mov QWORD PTR -104[rbp], rdi
mov QWORD PTR -112[rbp], rsi
mov QWORD PTR -120[rbp], rdx
mov QWORD PTR -128[rbp], rcx
mov QWORD PTR -136[rbp], r8
mov QWORD PTR -144[rbp], r9
mov QWORD PTR -8[rbp], 0
pxor xmm0, xmm0
movss DWORD PTR -84[rbp], xmm0
mov rax, QWORD PTR 24[rbp]
add rax, 8
mov QWORD PTR -72[rbp], rax
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -144[rbp]
add rax, rdx
mov QWORD PTR -64[rbp], rax
mov rax, QWORD PTR 32[rbp]
mov QWORD PTR -56[rbp], rax
mov eax, DWORD PTR 56[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR 16[rbp]
add rax, rdx
mov QWORD PTR -48[rbp], rax
mov rax, QWORD PTR -120[rbp]
add rax, 4
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -104[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -128[rbp]
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR 56[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -112[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -80[rbp], 0
jmp .L592
.L593:
mov rax, QWORD PTR -48[rbp]
lea rdx, -8[rax]
mov QWORD PTR -48[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -56[rbp]
lea rcx, 8[rax]
mov QWORD PTR -56[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -24[rbp]
lea rdx, 4[rax]
mov QWORD PTR -24[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, -4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -84[rbp]
addss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
add DWORD PTR -80[rbp], 1
.L592:
mov eax, DWORD PTR -80[rbp]
cmp eax, DWORD PTR 56[rbp]
jl .L593
mov DWORD PTR -76[rbp], 1
jmp .L594
.L595:
mov rax, QWORD PTR -64[rbp]
lea rdx, -8[rax]
mov QWORD PTR -64[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -72[rbp]
lea rcx, 8[rax]
mov QWORD PTR -72[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -40[rbp]
lea rdx, 4[rax]
mov QWORD PTR -40[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -32[rbp]
lea rdx, -4[rax]
mov QWORD PTR -32[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -84[rbp]
subss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
add DWORD PTR -76[rbp], 1
.L594:
mov eax, DWORD PTR -76[rbp]
cmp eax, DWORD PTR 48[rbp]
jl .L595
mov rax, QWORD PTR 40[rbp]
mov rdx, QWORD PTR -8[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -136[rbp]
movss xmm0, DWORD PTR -84[rbp]
movss DWORD PTR [rax], xmm0
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE90:
.size iirOutBoth, .-iirOutBoth
.globl iirOutFixedL
.type iirOutFixedL, @function
iirOutFixedL:
.LFB91:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov QWORD PTR -72[rbp], rdx
mov QWORD PTR -80[rbp], rcx
mov QWORD PTR -88[rbp], r8
mov DWORD PTR -92[rbp], r9d
mov QWORD PTR -8[rbp], 0
mov eax, DWORD PTR -92[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -80[rbp]
add rax, rdx
mov QWORD PTR -40[rbp], rax
mov rax, QWORD PTR -56[rbp]
add rax, 8
mov QWORD PTR -32[rbp], rax
mov eax, DWORD PTR 16[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -88[rbp]
add rax, rdx
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -48[rbp], 0
jmp .L597
.L598:
mov eax, DWORD PTR -48[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
mov edx, DWORD PTR -48[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -64[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rcx, -8[rax]
mov QWORD PTR -24[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -8[rbp], rax
add DWORD PTR -48[rbp], 1
.L597:
mov eax, DWORD PTR 16[rbp]
sub eax, 1
cmp DWORD PTR -48[rbp], eax
jl .L598
mov eax, DWORD PTR 16[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -64[rbp]
add rdx, rax
mov rax, QWORD PTR -72[rbp]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rcx, -8[rax]
mov QWORD PTR -24[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -44[rbp], 1
jmp .L599
.L600:
mov rax, QWORD PTR -32[rbp]
lea rdx, 8[rax]
mov QWORD PTR -32[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -40[rbp]
lea rcx, -8[rax]
mov QWORD PTR -40[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR -8[rbp], rax
mov eax, DWORD PTR -44[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
mov edx, DWORD PTR -44[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -56[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
add DWORD PTR -44[rbp], 1
.L599:
mov eax, DWORD PTR -92[rbp]
sub eax, 1
cmp DWORD PTR -44[rbp], eax
jl .L600
cmp DWORD PTR -92[rbp], 1
jle .L601
mov rax, QWORD PTR -32[rbp]
lea rdx, 8[rax]
mov QWORD PTR -32[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -40[rbp]
lea rcx, -8[rax]
mov QWORD PTR -40[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR -8[rbp], rax
.L601:
mov eax, DWORD PTR -92[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -56[rbp]
add rdx, rax
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE91:
.size iirOutFixedL, .-iirOutFixedL
.globl iirOutFloatL
.type iirOutFloatL, @function
iirOutFloatL:
.LFB92:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
movss DWORD PTR -68[rbp], xmm0
mov QWORD PTR -80[rbp], rdx
mov QWORD PTR -88[rbp], rcx
mov DWORD PTR -72[rbp], r8d
mov DWORD PTR -92[rbp], r9d
pxor xmm0, xmm0
movss DWORD PTR -44[rbp], xmm0
mov eax, DWORD PTR -72[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -80[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -56[rbp]
add rax, 4
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR -92[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -88[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -40[rbp], 0
jmp .L604
.L605:
mov eax, DWORD PTR -40[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -64[rbp]
add rdx, rax
mov eax, DWORD PTR -40[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -64[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -16[rbp]
lea rdx, -4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -44[rbp]
addss xmm0, xmm1
movss DWORD PTR -44[rbp], xmm0
add DWORD PTR -40[rbp], 1
.L604:
mov eax, DWORD PTR -92[rbp]
sub eax, 1
cmp DWORD PTR -40[rbp], eax
jl .L605
mov eax, DWORD PTR -92[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
movss xmm0, DWORD PTR -68[rbp]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -16[rbp]
lea rdx, -4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -44[rbp]
addss xmm0, xmm1
movss DWORD PTR -44[rbp], xmm0
mov DWORD PTR -36[rbp], 1
jmp .L606
.L607:
mov rax, QWORD PTR -32[rbp]
lea rdx, -4[rax]
mov QWORD PTR -32[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rdx, 4[rax]
mov QWORD PTR -24[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -44[rbp]
subss xmm0, xmm1
movss DWORD PTR -44[rbp], xmm0
mov eax, DWORD PTR -36[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -56[rbp]
add rdx, rax
mov eax, DWORD PTR -36[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -56[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
add DWORD PTR -36[rbp], 1
.L606:
mov eax, DWORD PTR -72[rbp]
sub eax, 1
cmp DWORD PTR -36[rbp], eax
jl .L607
cmp DWORD PTR -72[rbp], 1
jle .L608
mov rax, QWORD PTR -32[rbp]
lea rdx, -4[rax]
mov QWORD PTR -32[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rdx, 4[rax]
mov QWORD PTR -24[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -44[rbp]
subss xmm0, xmm1
movss DWORD PTR -44[rbp], xmm0
.L608:
mov eax, DWORD PTR -72[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movss xmm0, DWORD PTR -44[rbp]
movss DWORD PTR [rax], xmm0
movss xmm0, DWORD PTR -44[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE92:
.size iirOutFloatL, .-iirOutFloatL
.globl iirOutBothL
.type iirOutBothL, @function
iirOutBothL:
.LFB93:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 152
mov QWORD PTR -104[rbp], rdi
mov QWORD PTR -112[rbp], rsi
mov QWORD PTR -120[rbp], rdx
mov QWORD PTR -128[rbp], rcx
movss DWORD PTR -132[rbp], xmm0
mov QWORD PTR -144[rbp], r8
mov QWORD PTR -152[rbp], r9
mov QWORD PTR -40[rbp], 0
mov eax, DWORD PTR 40[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR 16[rbp]
add rax, rdx
mov QWORD PTR -72[rbp], rax
mov rax, QWORD PTR -144[rbp]
add rax, 8
mov QWORD PTR -64[rbp], rax
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR 24[rbp]
add rax, rdx
mov QWORD PTR -56[rbp], rax
mov rax, QWORD PTR -152[rbp]
mov QWORD PTR -48[rbp], rax
pxor xmm0, xmm0
movss DWORD PTR -84[rbp], xmm0
mov eax, DWORD PTR 40[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -104[rbp]
add rax, 4
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -128[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -112[rbp]
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -80[rbp], 0
jmp .L611
.L612:
mov eax, DWORD PTR -80[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
mov edx, DWORD PTR -80[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -152[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -48[rbp]
lea rdx, 8[rax]
mov QWORD PTR -48[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -56[rbp]
lea rcx, -8[rax]
mov QWORD PTR -56[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -40[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR -80[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -112[rbp]
add rdx, rax
mov eax, DWORD PTR -80[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -112[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -16[rbp]
lea rdx, -4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -84[rbp]
addss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
add DWORD PTR -80[rbp], 1
.L611:
mov eax, DWORD PTR 48[rbp]
sub eax, 1
cmp DWORD PTR -80[rbp], eax
jl .L612
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -152[rbp]
add rdx, rax
mov rax, QWORD PTR 32[rbp]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -48[rbp]
lea rdx, 8[rax]
mov QWORD PTR -48[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -56[rbp]
lea rcx, -8[rax]
mov QWORD PTR -56[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -40[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -112[rbp]
add rax, rdx
movss xmm0, DWORD PTR -132[rbp]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -16[rbp]
lea rdx, -4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -84[rbp]
addss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
mov DWORD PTR -76[rbp], 1
jmp .L613
.L614:
mov rax, QWORD PTR -64[rbp]
lea rdx, 8[rax]
mov QWORD PTR -64[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -72[rbp]
lea rcx, -8[rax]
mov QWORD PTR -72[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -40[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR -76[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -144[rbp]
add rax, rdx
mov edx, DWORD PTR -76[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -144[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -32[rbp]
lea rdx, -4[rax]
mov QWORD PTR -32[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rdx, 4[rax]
mov QWORD PTR -24[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -84[rbp]
subss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
mov eax, DWORD PTR -76[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -104[rbp]
add rdx, rax
mov eax, DWORD PTR -76[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -104[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
add DWORD PTR -76[rbp], 1
.L613:
mov eax, DWORD PTR 40[rbp]
sub eax, 1
cmp DWORD PTR -76[rbp], eax
jl .L614
cmp DWORD PTR 40[rbp], 1
jle .L615
mov rax, QWORD PTR -64[rbp]
lea rdx, 8[rax]
mov QWORD PTR -64[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -72[rbp]
lea rcx, -8[rax]
mov QWORD PTR -72[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -40[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR -40[rbp], rax
.L615:
mov eax, DWORD PTR 40[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -144[rbp]
add rdx, rax
mov rax, QWORD PTR -40[rbp]
mov QWORD PTR [rdx], rax
cmp DWORD PTR 40[rbp], 1
jle .L616
mov rax, QWORD PTR -32[rbp]
lea rdx, -4[rax]
mov QWORD PTR -32[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rdx, 4[rax]
mov QWORD PTR -24[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -84[rbp]
subss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
.L616:
mov eax, DWORD PTR 40[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -104[rbp]
add rax, rdx
movss xmm0, DWORD PTR -84[rbp]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -40[rbp]
mov rdi, rax
call fxp_to_float
movd eax, xmm0
movd xmm0, eax
subss xmm0, DWORD PTR -84[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE93:
.size iirOutBothL, .-iirOutBothL
.globl iirOutBothL2
.type iirOutBothL2, @function
iirOutBothL2:
.LFB94:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 152
mov QWORD PTR -104[rbp], rdi
mov QWORD PTR -112[rbp], rsi
mov QWORD PTR -120[rbp], rdx
mov QWORD PTR -128[rbp], rcx
movss DWORD PTR -132[rbp], xmm0
mov QWORD PTR -144[rbp], r8
mov QWORD PTR -152[rbp], r9
mov QWORD PTR -72[rbp], 0
mov eax, DWORD PTR 40[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR 16[rbp]
add rax, rdx
mov QWORD PTR -64[rbp], rax
mov rax, QWORD PTR -144[rbp]
add rax, 8
mov QWORD PTR -56[rbp], rax
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR 24[rbp]
add rax, rdx
mov QWORD PTR -48[rbp], rax
mov rax, QWORD PTR -152[rbp]
mov QWORD PTR -40[rbp], rax
pxor xmm0, xmm0
movss DWORD PTR -84[rbp], xmm0
mov eax, DWORD PTR 40[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -104[rbp]
add rax, 4
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -128[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -112[rbp]
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -80[rbp], 0
mov DWORD PTR -76[rbp], 1
mov DWORD PTR -80[rbp], 0
jmp .L619
.L620:
mov eax, DWORD PTR -80[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
mov edx, DWORD PTR -80[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -152[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
mov eax, DWORD PTR -80[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR 48[rbp]
sub eax, 1
sub eax, DWORD PTR -80[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR 24[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -72[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -72[rbp], rax
mov eax, DWORD PTR -80[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -112[rbp]
add rdx, rax
mov eax, DWORD PTR -80[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -112[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR 48[rbp]
sub eax, 1
sub eax, DWORD PTR -80[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -128[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
mov eax, DWORD PTR -80[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -112[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -84[rbp]
addss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
add DWORD PTR -80[rbp], 1
.L619:
mov eax, DWORD PTR 48[rbp]
sub eax, 1
cmp DWORD PTR -80[rbp], eax
jl .L620
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -152[rbp]
add rdx, rax
mov rax, QWORD PTR 32[rbp]
mov QWORD PTR [rdx], rax
mov eax, DWORD PTR -80[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -152[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR 48[rbp]
sub eax, 1
sub eax, DWORD PTR -80[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR 24[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -72[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -72[rbp], rax
mov eax, DWORD PTR 48[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -112[rbp]
add rax, rdx
movss xmm0, DWORD PTR -132[rbp]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR 48[rbp]
sub eax, 1
sub eax, DWORD PTR -80[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -128[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
mov eax, DWORD PTR -80[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -112[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -84[rbp]
addss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
mov DWORD PTR -76[rbp], 1
jmp .L621
.L622:
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -144[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR 40[rbp]
sub eax, DWORD PTR -76[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR 16[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -72[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR -72[rbp], rax
mov eax, DWORD PTR -76[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -144[rbp]
add rax, rdx
mov edx, DWORD PTR -76[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -144[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
mov eax, DWORD PTR 40[rbp]
sub eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -104[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -84[rbp]
subss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
mov eax, DWORD PTR -76[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -104[rbp]
add rdx, rax
mov eax, DWORD PTR -76[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -104[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
add DWORD PTR -76[rbp], 1
.L621:
mov eax, DWORD PTR 40[rbp]
sub eax, 1
cmp DWORD PTR -76[rbp], eax
jl .L622
cmp DWORD PTR 40[rbp], 1
jle .L623
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -144[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR 40[rbp]
sub eax, DWORD PTR -76[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR 16[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -72[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR -72[rbp], rax
.L623:
mov eax, DWORD PTR 40[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -144[rbp]
add rdx, rax
mov rax, QWORD PTR -72[rbp]
mov QWORD PTR [rdx], rax
cmp DWORD PTR 40[rbp], 1
jle .L624
mov eax, DWORD PTR 40[rbp]
sub eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -120[rbp]
add rax, rdx
movss xmm1, DWORD PTR [rax]
mov eax, DWORD PTR -76[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -104[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -84[rbp]
subss xmm0, xmm1
movss DWORD PTR -84[rbp], xmm0
.L624:
mov eax, DWORD PTR 40[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -104[rbp]
add rax, rdx
movss xmm0, DWORD PTR -84[rbp]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -72[rbp]
mov rdi, rax
call fxp_to_float
movd eax, xmm0
movd xmm0, eax
subss xmm0, DWORD PTR -84[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE94:
.size iirOutBothL2, .-iirOutBothL2
.section .rodata
.align 8
.LC42:
.string "An Overflow Occurred in the node a0"
.text
.globl fxp_direct_form_1
.type fxp_direct_form_1, @function
fxp_direct_form_1:
.LFB95:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov QWORD PTR -72[rbp], rdx
mov QWORD PTR -80[rbp], rcx
mov DWORD PTR -84[rbp], r8d
mov DWORD PTR -88[rbp], r9d
mov QWORD PTR -8[rbp], 0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR -84[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR -88[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -48[rbp], 0
jmp .L627
.L628:
mov rax, QWORD PTR -16[rbp]
lea rdx, -8[rax]
mov QWORD PTR -16[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rcx, 8[rax]
mov QWORD PTR -24[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -8[rbp], rax
add DWORD PTR -48[rbp], 1
.L627:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -88[rbp]
jl .L628
mov DWORD PTR -44[rbp], 1
jmp .L629
.L630:
mov rax, QWORD PTR -32[rbp]
lea rdx, -8[rax]
mov QWORD PTR -32[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -40[rbp]
lea rcx, 8[rax]
mov QWORD PTR -40[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR -8[rbp], rax
add DWORD PTR -44[rbp], 1
.L629:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L630
mov rax, QWORD PTR -8[rbp]
lea rsi, .LC42[rip]
mov rdi, rax
call fxp_verify_overflow_node
mov rax, QWORD PTR -72[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_div
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_quantize
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE95:
.size fxp_direct_form_1, .-fxp_direct_form_1
.section .rodata
.align 8
.LC43:
.string "An Overflow Occurred in the node b0"
.text
.globl fxp_direct_form_2
.type fxp_direct_form_2, @function
fxp_direct_form_2:
.LFB96:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov QWORD PTR -72[rbp], rdx
mov QWORD PTR -80[rbp], rcx
mov DWORD PTR -84[rbp], r8d
mov DWORD PTR -88[rbp], r9d
mov QWORD PTR -8[rbp], 0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -56[rbp]
add rax, 8
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -36[rbp], 1
jmp .L633
.L634:
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -32[rbp]
lea rcx, 8[rax]
mov QWORD PTR -32[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -56[rbp]
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov rdx, QWORD PTR -56[rbp]
mov QWORD PTR [rdx], rax
add DWORD PTR -36[rbp], 1
.L633:
mov eax, DWORD PTR -36[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L634
mov rax, QWORD PTR -56[rbp]
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR -64[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov rdx, QWORD PTR -56[rbp]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -72[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -56[rbp]
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_div
mov rdx, QWORD PTR -56[rbp]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -56[rbp]
mov rax, QWORD PTR [rax]
lea rsi, .LC43[rip]
mov rdi, rax
call fxp_verify_overflow_node
mov rax, QWORD PTR -56[rbp]
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -40[rbp], 0
jmp .L635
.L636:
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rcx, 8[rax]
mov QWORD PTR -24[rbp], rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR -8[rbp], rax
add DWORD PTR -40[rbp], 1
.L635:
mov eax, DWORD PTR -40[rbp]
cmp eax, DWORD PTR -88[rbp]
jl .L636
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fxp_quantize
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE96:
.size fxp_direct_form_2, .-fxp_direct_form_2
.globl fxp_transposed_direct_form_2
.type fxp_transposed_direct_form_2, @function
fxp_transposed_direct_form_2:
.LFB97:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 88
.cfi_offset 3, -24
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov QWORD PTR -72[rbp], rdx
mov QWORD PTR -80[rbp], rcx
mov DWORD PTR -84[rbp], r8d
mov DWORD PTR -88[rbp], r9d
mov QWORD PTR -24[rbp], 0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -40[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -32[rbp], rax
mov eax, DWORD PTR -84[rbp]
cmp DWORD PTR -88[rbp], eax
cmovge eax, DWORD PTR -88[rbp]
mov DWORD PTR -44[rbp], eax
mov rax, QWORD PTR -56[rbp]
mov rbx, QWORD PTR [rax]
mov rax, QWORD PTR -32[rbp]
lea rdx, 8[rax]
mov QWORD PTR -32[rbp], rdx
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR -64[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rsi, rbx
mov rdi, rax
call fxp_add
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -72[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_div
mov QWORD PTR -24[rbp], rax
mov DWORD PTR -48[rbp], 0
jmp .L639
.L642:
mov eax, DWORD PTR -48[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
mov edx, DWORD PTR -48[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -56[rbp]
add rdx, rcx
mov rax, QWORD PTR [rax]
mov QWORD PTR [rdx], rax
mov eax, DWORD PTR -84[rbp]
sub eax, 1
cmp DWORD PTR -48[rbp], eax
jge .L640
mov rax, QWORD PTR -40[rbp]
lea rdx, 8[rax]
mov QWORD PTR -40[rbp], rdx
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR -24[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov eax, DWORD PTR -48[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov ecx, DWORD PTR -48[rbp]
movsx rcx, ecx
lea rsi, 0[0+rcx*8]
mov rcx, QWORD PTR -56[rbp]
lea rbx, [rsi+rcx]
mov rsi, rdx
mov rdi, rax
call fxp_sub
mov QWORD PTR [rbx], rax
.L640:
mov eax, DWORD PTR -88[rbp]
sub eax, 1
cmp DWORD PTR -48[rbp], eax
jge .L641
mov rax, QWORD PTR -32[rbp]
lea rdx, 8[rax]
mov QWORD PTR -32[rbp], rdx
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR -64[rbp]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov eax, DWORD PTR -48[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov ecx, DWORD PTR -48[rbp]
movsx rcx, ecx
lea rsi, 0[0+rcx*8]
mov rcx, QWORD PTR -56[rbp]
lea rbx, [rsi+rcx]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR [rbx], rax
.L641:
add DWORD PTR -48[rbp], 1
.L639:
mov eax, DWORD PTR -44[rbp]
sub eax, 1
cmp DWORD PTR -48[rbp], eax
jl .L642
mov eax, DWORD PTR -48[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
lea rsi, .LC42[rip]
mov rdi, rax
call fxp_verify_overflow_node
mov rax, QWORD PTR -24[rbp]
mov rdi, rax
call fxp_quantize
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE97:
.size fxp_transposed_direct_form_2, .-fxp_transposed_direct_form_2
.globl double_direct_form_1
.type double_direct_form_1, @function
double_direct_form_1:
.LFB98:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov QWORD PTR -72[rbp], rdx
mov QWORD PTR -80[rbp], rcx
mov DWORD PTR -84[rbp], r8d
mov DWORD PTR -88[rbp], r9d
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR -84[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR -88[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -48[rbp], 0
jmp .L645
.L646:
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, -8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -48[rbp], 1
.L645:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -88[rbp]
jl .L646
mov DWORD PTR -44[rbp], 1
jmp .L647
.L648:
mov rax, QWORD PTR -40[rbp]
lea rdx, 8[rax]
mov QWORD PTR -40[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -32[rbp]
lea rdx, -8[rax]
mov QWORD PTR -32[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm1, xmm0
movsd xmm0, QWORD PTR -8[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -44[rbp], 1
.L647:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L648
mov rax, QWORD PTR -72[rbp]
movsd xmm1, QWORD PTR [rax]
movsd xmm0, QWORD PTR -8[rbp]
divsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE98:
.size double_direct_form_1, .-double_direct_form_1
.globl double_direct_form_2
.type double_direct_form_2, @function
double_direct_form_2:
.LFB99:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -56[rbp], rdi
movsd QWORD PTR -64[rbp], xmm0
mov QWORD PTR -72[rbp], rsi
mov QWORD PTR -80[rbp], rdx
mov DWORD PTR -84[rbp], ecx
mov DWORD PTR -88[rbp], r8d
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -56[rbp]
add rax, 8
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -36[rbp], 1
jmp .L651
.L652:
mov rax, QWORD PTR -32[rbp]
lea rdx, 8[rax]
mov QWORD PTR -32[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm1, xmm0
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
subsd xmm0, xmm1
mov rax, QWORD PTR -56[rbp]
movsd QWORD PTR [rax], xmm0
add DWORD PTR -36[rbp], 1
.L651:
mov eax, DWORD PTR -36[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L652
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
addsd xmm0, QWORD PTR -64[rbp]
mov rax, QWORD PTR -56[rbp]
movsd QWORD PTR [rax], xmm0
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -72[rbp]
movsd xmm1, QWORD PTR [rax]
divsd xmm0, xmm1
mov rax, QWORD PTR -56[rbp]
movsd QWORD PTR [rax], xmm0
mov rax, QWORD PTR -56[rbp]
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -40[rbp], 0
jmp .L653
.L654:
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -40[rbp], 1
.L653:
mov eax, DWORD PTR -40[rbp]
cmp eax, DWORD PTR -88[rbp]
jl .L654
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE99:
.size double_direct_form_2, .-double_direct_form_2
.globl double_transposed_direct_form_2
.type double_transposed_direct_form_2, @function
double_transposed_direct_form_2:
.LFB100:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -40[rbp], rdi
movsd QWORD PTR -48[rbp], xmm0
mov QWORD PTR -56[rbp], rsi
mov QWORD PTR -64[rbp], rdx
mov DWORD PTR -68[rbp], ecx
mov DWORD PTR -72[rbp], r8d
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -56[rbp]
add rax, 8
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR -16[rbp], rax
mov eax, DWORD PTR -68[rbp]
cmp DWORD PTR -72[rbp], eax
cmovge eax, DWORD PTR -72[rbp]
mov DWORD PTR -28[rbp], eax
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -48[rbp]
mov rax, QWORD PTR -40[rbp]
movsd xmm0, QWORD PTR [rax]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -56[rbp]
movsd xmm1, QWORD PTR [rax]
movsd xmm0, QWORD PTR -8[rbp]
divsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -32[rbp], 0
jmp .L657
.L660:
mov eax, DWORD PTR -32[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -32[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR -68[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jge .L658
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -8[rbp]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
subsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
.L658:
mov eax, DWORD PTR -72[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jge .L659
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -48[rbp]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
.L659:
add DWORD PTR -32[rbp], 1
.L657:
mov eax, DWORD PTR -28[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jl .L660
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE100:
.size double_transposed_direct_form_2, .-double_transposed_direct_form_2
.globl float_direct_form_1
.type float_direct_form_1, @function
float_direct_form_1:
.LFB101:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov QWORD PTR -72[rbp], rdx
mov QWORD PTR -80[rbp], rcx
mov DWORD PTR -84[rbp], r8d
mov DWORD PTR -88[rbp], r9d
pxor xmm0, xmm0
movss DWORD PTR -44[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 4
mov QWORD PTR -32[rbp], rax
mov eax, DWORD PTR -84[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -16[rbp], rax
mov eax, DWORD PTR -88[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -40[rbp], 0
jmp .L663
.L664:
mov rax, QWORD PTR -16[rbp]
lea rdx, 4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, -4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -44[rbp]
addss xmm0, xmm1
movss DWORD PTR -44[rbp], xmm0
add DWORD PTR -40[rbp], 1
.L663:
mov eax, DWORD PTR -40[rbp]
cmp eax, DWORD PTR -88[rbp]
jl .L664
mov DWORD PTR -36[rbp], 1
jmp .L665
.L666:
mov rax, QWORD PTR -32[rbp]
lea rdx, 4[rax]
mov QWORD PTR -32[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rdx, -4[rax]
mov QWORD PTR -24[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
movss xmm0, DWORD PTR -44[rbp]
subss xmm0, xmm1
movss DWORD PTR -44[rbp], xmm0
add DWORD PTR -36[rbp], 1
.L665:
mov eax, DWORD PTR -36[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L666
mov rax, QWORD PTR -72[rbp]
movss xmm1, DWORD PTR [rax]
movss xmm0, DWORD PTR -44[rbp]
divss xmm0, xmm1
movss DWORD PTR -44[rbp], xmm0
movss xmm0, DWORD PTR -44[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE101:
.size float_direct_form_1, .-float_direct_form_1
.globl float_direct_form_2
.type float_direct_form_2, @function
float_direct_form_2:
.LFB102:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -56[rbp], rdi
movss DWORD PTR -60[rbp], xmm0
mov QWORD PTR -72[rbp], rsi
mov QWORD PTR -80[rbp], rdx
mov DWORD PTR -64[rbp], ecx
mov DWORD PTR -84[rbp], r8d
pxor xmm0, xmm0
movss DWORD PTR -36[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 4
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -56[rbp]
add rax, 4
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -28[rbp], 1
jmp .L669
.L670:
mov rax, QWORD PTR -24[rbp]
lea rdx, 4[rax]
mov QWORD PTR -24[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm1, xmm0
mov rax, QWORD PTR -56[rbp]
movss xmm0, DWORD PTR [rax]
subss xmm0, xmm1
mov rax, QWORD PTR -56[rbp]
movss DWORD PTR [rax], xmm0
add DWORD PTR -28[rbp], 1
.L669:
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -64[rbp]
jl .L670
mov rax, QWORD PTR -56[rbp]
movss xmm0, DWORD PTR [rax]
addss xmm0, DWORD PTR -60[rbp]
mov rax, QWORD PTR -56[rbp]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -56[rbp]
movss xmm0, DWORD PTR [rax]
mov rax, QWORD PTR -72[rbp]
movss xmm1, DWORD PTR [rax]
divss xmm0, xmm1
mov rax, QWORD PTR -56[rbp]
movss DWORD PTR [rax], xmm0
mov rax, QWORD PTR -56[rbp]
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -32[rbp], 0
jmp .L671
.L672:
mov rax, QWORD PTR -16[rbp]
lea rdx, 4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm1, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
mulss xmm0, xmm1
movss xmm1, DWORD PTR -36[rbp]
addss xmm0, xmm1
movss DWORD PTR -36[rbp], xmm0
add DWORD PTR -32[rbp], 1
.L671:
mov eax, DWORD PTR -32[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L672
movss xmm0, DWORD PTR -36[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE102:
.size float_direct_form_2, .-float_direct_form_2
.globl float_transposed_direct_form_2
.type float_transposed_direct_form_2, @function
float_transposed_direct_form_2:
.LFB103:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -40[rbp], rdi
movss DWORD PTR -44[rbp], xmm0
mov QWORD PTR -56[rbp], rsi
mov QWORD PTR -64[rbp], rdx
mov DWORD PTR -48[rbp], ecx
mov DWORD PTR -68[rbp], r8d
pxor xmm0, xmm0
movss DWORD PTR -24[rbp], xmm0
mov rax, QWORD PTR -56[rbp]
add rax, 4
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR -8[rbp], rax
mov eax, DWORD PTR -48[rbp]
cmp DWORD PTR -68[rbp], eax
cmovge eax, DWORD PTR -68[rbp]
mov DWORD PTR -20[rbp], eax
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
movaps xmm1, xmm0
mulss xmm1, DWORD PTR -44[rbp]
mov rax, QWORD PTR -40[rbp]
movss xmm0, DWORD PTR [rax]
addss xmm0, xmm1
movss DWORD PTR -24[rbp], xmm0
mov rax, QWORD PTR -56[rbp]
movss xmm1, DWORD PTR [rax]
movss xmm0, DWORD PTR -24[rbp]
divss xmm0, xmm1
movss DWORD PTR -24[rbp], xmm0
mov DWORD PTR -28[rbp], 0
jmp .L675
.L678:
mov eax, DWORD PTR -28[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -28[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
movss xmm0, DWORD PTR [rdx]
movss DWORD PTR [rax], xmm0
mov eax, DWORD PTR -48[rbp]
sub eax, 1
cmp DWORD PTR -28[rbp], eax
jge .L676
mov rax, QWORD PTR -16[rbp]
lea rdx, 4[rax]
mov QWORD PTR -16[rbp], rdx
movss xmm0, DWORD PTR [rax]
movaps xmm1, xmm0
mulss xmm1, DWORD PTR -24[rbp]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
subss xmm0, xmm1
movss DWORD PTR [rax], xmm0
.L676:
mov eax, DWORD PTR -68[rbp]
sub eax, 1
cmp DWORD PTR -28[rbp], eax
jge .L677
mov rax, QWORD PTR -8[rbp]
lea rdx, 4[rax]
mov QWORD PTR -8[rbp], rdx
movss xmm0, DWORD PTR [rax]
movaps xmm1, xmm0
mulss xmm1, DWORD PTR -44[rbp]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movss xmm0, DWORD PTR [rax]
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
addss xmm0, xmm1
movss DWORD PTR [rax], xmm0
.L677:
add DWORD PTR -28[rbp], 1
.L675:
mov eax, DWORD PTR -20[rbp]
sub eax, 1
cmp DWORD PTR -28[rbp], eax
jl .L678
movss xmm0, DWORD PTR -24[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE103:
.size float_transposed_direct_form_2, .-float_transposed_direct_form_2
.section .rodata
.align 8
.LC44:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/realizations.h"
.align 8
.LC45:
.string "(double) timer1 * hw.cycle <= ds.sample_time"
.text
.globl double_direct_form_1_MSP430
.type double_direct_form_1_MSP430, @function
double_direct_form_1_MSP430:
.LFB104:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 112
mov QWORD PTR -72[rbp], rdi
mov QWORD PTR -80[rbp], rsi
mov QWORD PTR -88[rbp], rdx
mov QWORD PTR -96[rbp], rcx
mov DWORD PTR -100[rbp], r8d
mov DWORD PTR -104[rbp], r9d
mov DWORD PTR -52[rbp], 0
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -88[rbp]
add rax, 8
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR -100[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -72[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -96[rbp]
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR -104[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -80[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
add DWORD PTR -52[rbp], 91
mov DWORD PTR -48[rbp], 0
jmp .L681
.L682:
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, -8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -52[rbp], 47
add DWORD PTR -48[rbp], 1
.L681:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -104[rbp]
jl .L682
mov DWORD PTR -44[rbp], 1
jmp .L683
.L684:
mov rax, QWORD PTR -40[rbp]
lea rdx, 8[rax]
mov QWORD PTR -40[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -32[rbp]
lea rdx, -8[rax]
mov QWORD PTR -32[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm1, xmm0
movsd xmm0, QWORD PTR -8[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -52[rbp], 57
add DWORD PTR -44[rbp], 1
.L683:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -100[rbp]
jl .L684
add DWORD PTR -52[rbp], 3
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -52[rbp]
movsd xmm0, QWORD PTR hw[rip+16]
mulsd xmm1, xmm0
movsd xmm0, QWORD PTR ds[rip+1616]
comisd xmm0, xmm1
jnb .L685
lea rcx, __PRETTY_FUNCTION__.12[rip]
mov edx, 235
lea rsi, .LC44[rip]
lea rdi, .LC45[rip]
call __assert_fail@PLT
.L685:
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE104:
.size double_direct_form_1_MSP430, .-double_direct_form_1_MSP430
.globl double_direct_form_2_MSP430
.type double_direct_form_2_MSP430, @function
double_direct_form_2_MSP430:
.LFB105:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -56[rbp], rdi
movsd QWORD PTR -64[rbp], xmm0
mov QWORD PTR -72[rbp], rsi
mov QWORD PTR -80[rbp], rdx
mov DWORD PTR -84[rbp], ecx
mov DWORD PTR -88[rbp], r8d
mov DWORD PTR -44[rbp], 0
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -56[rbp]
add rax, 8
mov QWORD PTR -16[rbp], rax
add DWORD PTR -44[rbp], 71
mov DWORD PTR -36[rbp], 1
jmp .L688
.L689:
mov rax, QWORD PTR -32[rbp]
lea rdx, 8[rax]
mov QWORD PTR -32[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm1, xmm0
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
subsd xmm0, xmm1
mov rax, QWORD PTR -56[rbp]
movsd QWORD PTR [rax], xmm0
add DWORD PTR -44[rbp], 54
add DWORD PTR -36[rbp], 1
.L688:
mov eax, DWORD PTR -36[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L689
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
addsd xmm0, QWORD PTR -64[rbp]
mov rax, QWORD PTR -56[rbp]
movsd QWORD PTR [rax], xmm0
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -72[rbp]
movsd xmm1, QWORD PTR [rax]
divsd xmm0, xmm1
mov rax, QWORD PTR -56[rbp]
movsd QWORD PTR [rax], xmm0
mov rax, QWORD PTR -56[rbp]
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -40[rbp], 0
jmp .L690
.L691:
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -44[rbp], 46
add DWORD PTR -40[rbp], 1
.L690:
mov eax, DWORD PTR -40[rbp]
cmp eax, DWORD PTR -88[rbp]
jl .L691
add DWORD PTR -44[rbp], 38
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -44[rbp]
movsd xmm0, QWORD PTR hw[rip+16]
mulsd xmm1, xmm0
movsd xmm0, QWORD PTR ds[rip+1616]
comisd xmm0, xmm1
jnb .L692
lea rcx, __PRETTY_FUNCTION__.11[rip]
mov edx, 262
lea rsi, .LC44[rip]
lea rdi, .LC45[rip]
call __assert_fail@PLT
.L692:
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE105:
.size double_direct_form_2_MSP430, .-double_direct_form_2_MSP430
.globl double_transposed_direct_form_2_MSP430
.type double_transposed_direct_form_2_MSP430, @function
double_transposed_direct_form_2_MSP430:
.LFB106:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -56[rbp], rdi
movsd QWORD PTR -64[rbp], xmm0
mov QWORD PTR -72[rbp], rsi
mov QWORD PTR -80[rbp], rdx
mov DWORD PTR -84[rbp], ecx
mov DWORD PTR -88[rbp], r8d
mov DWORD PTR -36[rbp], 0
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -16[rbp], rax
mov eax, DWORD PTR -84[rbp]
cmp DWORD PTR -88[rbp], eax
cmovge eax, DWORD PTR -88[rbp]
mov DWORD PTR -28[rbp], eax
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -64[rbp]
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -36[rbp], 105
mov DWORD PTR -32[rbp], 0
jmp .L695
.L698:
mov eax, DWORD PTR -32[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rdx, rax
mov eax, DWORD PTR -32[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR -84[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jge .L696
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -8[rbp]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
subsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
add DWORD PTR -36[rbp], 41
.L696:
mov eax, DWORD PTR -88[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jge .L697
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -64[rbp]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
add DWORD PTR -36[rbp], 38
.L697:
add DWORD PTR -36[rbp], 54
add DWORD PTR -32[rbp], 1
.L695:
mov eax, DWORD PTR -28[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jl .L698
add DWORD PTR -36[rbp], 7
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -36[rbp]
movsd xmm0, QWORD PTR hw[rip+16]
mulsd xmm1, xmm0
movsd xmm0, QWORD PTR ds[rip+1616]
comisd xmm0, xmm1
jnb .L699
lea rcx, __PRETTY_FUNCTION__.10[rip]
mov edx, 291
lea rsi, .LC44[rip]
lea rdi, .LC45[rip]
call __assert_fail@PLT
.L699:
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE106:
.size double_transposed_direct_form_2_MSP430, .-double_transposed_direct_form_2_MSP430
.globl generic_timing_double_direct_form_1
.type generic_timing_double_direct_form_1, @function
generic_timing_double_direct_form_1:
.LFB107:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov QWORD PTR -72[rbp], rdx
mov QWORD PTR -80[rbp], rcx
mov DWORD PTR -84[rbp], r8d
mov DWORD PTR -88[rbp], r9d
mov edx, DWORD PTR hw[rip+24]
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
mov ecx, eax
mov edx, DWORD PTR hw[rip+28]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+32]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 2
lea edx, [rcx+rax]
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -40[rbp], rax
mov eax, DWORD PTR -84[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR -88[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
mov QWORD PTR -16[rbp], rax
mov edx, DWORD PTR hw[rip+44]
mov eax, DWORD PTR hw[rip+48]
add edx, eax
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
mov edx, eax
mov eax, DWORD PTR hw[rip+52]
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add edx, eax
mov eax, DWORD PTR hw[rip+60]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+64]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+68]
add edx, eax
mov eax, DWORD PTR hw[rip+72]
add eax, edx
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR hw[rip+44]
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov DWORD PTR -48[rbp], 0
jmp .L702
.L703:
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
sal eax, 2
add eax, edx
sal eax, 2
mov ecx, eax
mov edx, DWORD PTR hw[rip+84]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 3
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+52]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add edx, eax
mov eax, DWORD PTR hw[rip+88]
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 2
add eax, edx
add eax, eax
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+92]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+96]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+100]
add edx, eax
mov eax, DWORD PTR hw[rip+104]
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+112]
add edx, eax
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, -8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -48[rbp], 1
.L702:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -88[rbp]
jl .L703
mov edx, DWORD PTR hw[rip+108]
mov eax, DWORD PTR hw[rip+44]
add eax, edx
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov DWORD PTR -44[rbp], 1
jmp .L704
.L705:
mov eax, DWORD PTR hw[rip+48]
imul ecx, eax, 22
mov edx, DWORD PTR hw[rip+84]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 3
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+52]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+44]
sal eax, 3
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add edx, eax
mov eax, DWORD PTR hw[rip+92]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+96]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+88]
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+100]
add edx, eax
mov eax, DWORD PTR hw[rip+104]
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+112]
add edx, eax
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov rax, QWORD PTR -40[rbp]
lea rdx, 8[rax]
mov QWORD PTR -40[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -32[rbp]
lea rdx, -8[rax]
mov QWORD PTR -32[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm1, xmm0
movsd xmm0, QWORD PTR -8[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -44[rbp], 1
.L704:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L705
mov edx, DWORD PTR hw[rip+48]
mov eax, DWORD PTR hw[rip+84]
add eax, edx
lea edx, 0[0+rax*4]
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+28]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+116]
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+120]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE107:
.size generic_timing_double_direct_form_1, .-generic_timing_double_direct_form_1
.globl generic_timing_double_direct_form_2
.type generic_timing_double_direct_form_2, @function
generic_timing_double_direct_form_2:
.LFB108:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -56[rbp], rdi
movsd QWORD PTR -64[rbp], xmm0
mov QWORD PTR -72[rbp], rsi
mov QWORD PTR -80[rbp], rdx
mov DWORD PTR -84[rbp], ecx
mov DWORD PTR -88[rbp], r8d
mov eax, DWORD PTR hw[rip+24]
lea edx, 0[0+rax*8]
mov eax, DWORD PTR hw[rip+44]
imul eax, eax, 14
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+28]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+32]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -72[rbp]
add rax, 8
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -80[rbp]
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -56[rbp]
add rax, 8
mov QWORD PTR -16[rbp], rax
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 2
add eax, edx
add eax, eax
mov ecx, eax
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+76]
add eax, eax
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov edx, DWORD PTR hw[rip+108]
mov eax, DWORD PTR hw[rip+44]
add eax, edx
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov DWORD PTR -36[rbp], 1
jmp .L708
.L709:
mov rax, QWORD PTR -32[rbp]
lea rdx, 8[rax]
mov QWORD PTR -32[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm1, xmm0
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
subsd xmm0, xmm1
mov rax, QWORD PTR -56[rbp]
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR hw[rip+48]
imul edx, eax, 23
mov eax, DWORD PTR hw[rip+84]
sal eax, 5
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 3
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+52]
add eax, eax
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+92]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+96]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+124]
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+100]
add edx, eax
mov eax, DWORD PTR hw[rip+104]
add edx, eax
mov eax, DWORD PTR hw[rip+112]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
add DWORD PTR -36[rbp], 1
.L708:
mov eax, DWORD PTR -36[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L709
mov rax, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR [rax]
addsd xmm0, QWORD PTR -64[rbp]
mov rax, QWORD PTR -56[rbp]
movsd QWORD PTR [rax], xmm0
mov rax, QWORD PTR -56[rbp]
mov QWORD PTR -16[rbp], rax
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 2
lea ecx, [rax+rdx]
mov edx, DWORD PTR hw[rip+84]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 2
add ecx, eax
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 2
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+124]
add edx, eax
mov eax, DWORD PTR hw[rip+92]
add edx, eax
mov eax, DWORD PTR hw[rip+96]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR hw[rip+44]
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov DWORD PTR -40[rbp], 0
jmp .L710
.L711:
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
mov edx, DWORD PTR hw[rip+48]
mov eax, edx
sal eax, 2
add eax, edx
sal eax, 2
mov ecx, eax
mov edx, DWORD PTR hw[rip+84]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 3
add ecx, eax
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 2
add eax, edx
add eax, eax
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+96]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+92]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+52]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+100]
add edx, eax
mov eax, DWORD PTR hw[rip+104]
add edx, eax
mov eax, DWORD PTR hw[rip+112]
add edx, eax
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
add DWORD PTR -40[rbp], 1
.L710:
mov eax, DWORD PTR -40[rbp]
cmp eax, DWORD PTR -88[rbp]
jl .L711
mov edx, DWORD PTR hw[rip+48]
mov eax, DWORD PTR hw[rip+84]
add eax, edx
lea edx, 0[0+rax*4]
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+28]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+116]
sal eax, 3
add edx, eax
mov eax, DWORD PTR hw[rip+120]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE108:
.size generic_timing_double_direct_form_2, .-generic_timing_double_direct_form_2
.globl generic_timing_double_transposed_direct_form_2
.type generic_timing_double_transposed_direct_form_2, @function
generic_timing_double_transposed_direct_form_2:
.LFB109:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -40[rbp], rdi
movsd QWORD PTR -48[rbp], xmm0
mov QWORD PTR -56[rbp], rsi
mov QWORD PTR -64[rbp], rdx
mov DWORD PTR -68[rbp], ecx
mov DWORD PTR -72[rbp], r8d
mov eax, DWORD PTR hw[rip+24]
lea edx, 0[0+rax*8]
mov eax, DWORD PTR hw[rip+44]
imul eax, eax, 14
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+28]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+32]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -56[rbp]
add rax, 8
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR -16[rbp], rax
mov eax, DWORD PTR -68[rbp]
cmp DWORD PTR -72[rbp], eax
cmovge eax, DWORD PTR -72[rbp]
mov DWORD PTR -28[rbp], eax
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -48[rbp]
mov rax, QWORD PTR -40[rbp]
movsd xmm0, QWORD PTR [rax]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 4
sub eax, edx
mov ecx, eax
mov eax, DWORD PTR hw[rip+48]
imul eax, eax, 22
add ecx, eax
mov edx, DWORD PTR hw[rip+84]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 3
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+96]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+92]
add eax, eax
add edx, eax
mov eax, DWORD PTR hw[rip+100]
add edx, eax
mov eax, DWORD PTR hw[rip+104]
add edx, eax
mov eax, DWORD PTR hw[rip+52]
add edx, eax
mov eax, DWORD PTR hw[rip+56]
add edx, eax
mov eax, DWORD PTR hw[rip+112]
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR hw[rip+44]
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov DWORD PTR -32[rbp], 0
jmp .L714
.L717:
mov eax, DWORD PTR -32[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rdx, rax
mov eax, DWORD PTR -32[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rcx
movsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR -68[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jge .L715
mov rax, QWORD PTR -24[rbp]
lea rdx, 8[rax]
mov QWORD PTR -24[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -8[rbp]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
subsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
.L715:
mov eax, DWORD PTR -72[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jge .L716
mov rax, QWORD PTR -16[rbp]
lea rdx, 8[rax]
mov QWORD PTR -16[rbp], rdx
movsd xmm0, QWORD PTR [rax]
movapd xmm1, xmm0
mulsd xmm1, QWORD PTR -48[rbp]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
.L716:
mov eax, DWORD PTR hw[rip+84]
imul ecx, eax, 70
mov eax, DWORD PTR hw[rip+48]
mov edx, eax
sal edx, 6
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+60]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 2
add ecx, eax
mov edx, DWORD PTR hw[rip+64]
mov eax, edx
add eax, eax
add eax, edx
sal eax, 2
add ecx, eax
mov edx, DWORD PTR hw[rip+44]
mov eax, edx
sal eax, 4
sub eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+68]
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
add ecx, eax
mov edx, DWORD PTR hw[rip+72]
mov eax, edx
add eax, eax
add eax, edx
add eax, eax
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+76]
add eax, eax
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+104]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+100]
mov eax, edx
add eax, eax
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+92]
mov eax, edx
sal eax, 2
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+96]
sal eax, 2
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+52]
mov eax, edx
sal eax, 2
add eax, edx
add ecx, eax
mov edx, DWORD PTR hw[rip+80]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+128]
add eax, eax
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+124]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+56]
add eax, eax
lea ecx, [rdx+rax]
mov edx, DWORD PTR hw[rip+88]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+112]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
add DWORD PTR -32[rbp], 1
.L714:
mov eax, DWORD PTR -28[rbp]
sub eax, 1
cmp DWORD PTR -32[rbp], eax
jl .L717
mov edx, DWORD PTR hw[rip+48]
mov eax, DWORD PTR hw[rip+84]
add edx, eax
mov eax, DWORD PTR hw[rip+116]
add eax, eax
add eax, edx
lea ecx, 0[0+rax*4]
mov edx, DWORD PTR hw[rip+40]
mov eax, edx
add eax, eax
add eax, edx
lea edx, [rcx+rax]
mov eax, DWORD PTR hw[rip+28]
add edx, eax
mov eax, DWORD PTR hw[rip+36]
add edx, eax
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+120]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
movsd xmm0, QWORD PTR -8[rbp]
movq rax, xmm0
movq xmm0, rax
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE109:
.size generic_timing_double_transposed_direct_form_2, .-generic_timing_double_transposed_direct_form_2
.globl double_direct_form_1_impl2
.type double_direct_form_1_impl2, @function
double_direct_form_1_impl2:
.LFB110:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r13
push r12
sub rsp, 80
.cfi_offset 13, -24
.cfi_offset 12, -32
mov QWORD PTR -56[rbp], rdi
mov DWORD PTR -60[rbp], esi
mov QWORD PTR -72[rbp], rdx
mov DWORD PTR -64[rbp], ecx
mov QWORD PTR -80[rbp], r8
mov DWORD PTR -84[rbp], r9d
mov rax, QWORD PTR 16[rbp]
mov QWORD PTR -96[rbp], rax
mov rax, QWORD PTR fs:40
mov QWORD PTR -24[rbp], rax
xor eax, eax
mov rax, rsp
mov rsi, rax
mov DWORD PTR -44[rbp], 0
mov DWORD PTR -48[rbp], 0
mov eax, DWORD PTR -60[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -40[rbp], rdx
movsx rdx, eax
mov r12, rdx
mov r13d, 0
movsx rdx, eax
mov r10, rdx
mov r11d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L720:
cmp rsp, rdx
je .L721
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L720
.L721:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L722
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L722:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -32[rbp], rax
mov DWORD PTR -44[rbp], 0
jmp .L723
.L728:
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR -44[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
mov DWORD PTR -48[rbp], 0
jmp .L724
.L727:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -44[rbp]
jg .L736
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR -44[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mov eax, DWORD PTR -44[rbp]
sub eax, DWORD PTR -48[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movsd xmm2, QWORD PTR [rax]
mov eax, DWORD PTR -48[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -72[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm2
addsd xmm0, xmm1
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR -44[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -48[rbp], 1
.L724:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -64[rbp]
jl .L727
jmp .L726
.L736:
nop
.L726:
add DWORD PTR -44[rbp], 1
.L723:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -60[rbp]
jl .L728
mov rax, QWORD PTR -32[rbp]
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -96[rbp]
movsd QWORD PTR [rax], xmm0
mov DWORD PTR -44[rbp], 1
jmp .L729
.L734:
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR [rax], xmm0
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR -44[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
mov DWORD PTR -48[rbp], 1
jmp .L730
.L733:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -44[rbp]
jg .L737
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rax, rdx
movsd xmm1, QWORD PTR [rax]
mov eax, DWORD PTR -44[rbp]
sub eax, DWORD PTR -48[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rax, rdx
movsd xmm2, QWORD PTR [rax]
mov eax, DWORD PTR -48[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -80[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
movq xmm3, QWORD PTR .LC13[rip]
xorpd xmm0, xmm3
mulsd xmm0, xmm2
mov eax, DWORD PTR -44[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rax, rdx
addsd xmm0, xmm1
movsd QWORD PTR [rax], xmm0
add DWORD PTR -48[rbp], 1
.L730:
mov eax, DWORD PTR -48[rbp]
cmp eax, DWORD PTR -84[rbp]
jl .L733
jmp .L732
.L737:
nop
.L732:
add DWORD PTR -44[rbp], 1
.L729:
mov eax, DWORD PTR -44[rbp]
cmp eax, DWORD PTR -60[rbp]
jl .L734
mov rsp, rsi
nop
mov rax, QWORD PTR -24[rbp]
sub rax, QWORD PTR fs:40
je .L735
call __stack_chk_fail@PLT
.L735:
lea rsp, -16[rbp]
pop r12
pop r13
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE110:
.size double_direct_form_1_impl2, .-double_direct_form_1_impl2
.globl fxp_direct_form_1_impl2
.type fxp_direct_form_1_impl2, @function
fxp_direct_form_1_impl2:
.LFB111:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r12
push rbx
sub rsp, 80
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 12, -40
.cfi_offset 3, -48
mov QWORD PTR -72[rbp], rdi
mov DWORD PTR -76[rbp], esi
mov QWORD PTR -88[rbp], rdx
mov DWORD PTR -80[rbp], ecx
mov QWORD PTR -96[rbp], r8
mov DWORD PTR -100[rbp], r9d
mov rax, QWORD PTR 16[rbp]
mov QWORD PTR -112[rbp], rax
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
mov rax, rsp
mov r12, rax
mov DWORD PTR -60[rbp], 0
mov DWORD PTR -64[rbp], 0
mov eax, DWORD PTR -76[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -56[rbp], rdx
movsx rdx, eax
mov r14, rdx
mov r15d, 0
movsx rdx, eax
mov r10, rdx
mov r11d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L739:
cmp rsp, rdx
je .L740
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L739
.L740:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L741
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L741:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -48[rbp], rax
mov DWORD PTR -60[rbp], 0
jmp .L742
.L747:
mov rax, QWORD PTR -48[rbp]
mov edx, DWORD PTR -60[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
mov DWORD PTR -64[rbp], 0
jmp .L743
.L746:
mov eax, DWORD PTR -64[rbp]
cmp eax, DWORD PTR -60[rbp]
jg .L755
mov eax, DWORD PTR -64[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -88[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR -60[rbp]
sub eax, DWORD PTR -64[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rcx, rax
mov rax, QWORD PTR -48[rbp]
mov edx, DWORD PTR -60[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
mov rsi, rcx
mov rdi, rax
call fxp_add
mov rdx, QWORD PTR -48[rbp]
mov ecx, DWORD PTR -60[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
add DWORD PTR -64[rbp], 1
.L743:
mov eax, DWORD PTR -64[rbp]
cmp eax, DWORD PTR -80[rbp]
jl .L746
jmp .L745
.L755:
nop
.L745:
add DWORD PTR -60[rbp], 1
.L742:
mov eax, DWORD PTR -60[rbp]
cmp eax, DWORD PTR -76[rbp]
jl .L747
mov rax, QWORD PTR -48[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -112[rbp]
mov QWORD PTR [rax], rdx
mov DWORD PTR -60[rbp], 1
jmp .L748
.L753:
mov eax, DWORD PTR -60[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -112[rbp]
add rax, rdx
mov QWORD PTR [rax], 0
mov rax, QWORD PTR -48[rbp]
mov edx, DWORD PTR -60[rbp]
movsx rdx, edx
mov rdx, QWORD PTR [rax+rdx*8]
mov eax, DWORD PTR -60[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -112[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov ecx, DWORD PTR -60[rbp]
movsx rcx, ecx
lea rsi, 0[0+rcx*8]
mov rcx, QWORD PTR -112[rbp]
lea rbx, [rsi+rcx]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR [rbx], rax
mov DWORD PTR -64[rbp], 1
jmp .L749
.L752:
mov eax, DWORD PTR -64[rbp]
cmp eax, DWORD PTR -60[rbp]
jg .L756
mov eax, DWORD PTR -64[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -96[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
neg rax
mov rdx, rax
mov eax, DWORD PTR -60[rbp]
sub eax, DWORD PTR -64[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -112[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call fxp_mult
mov rdx, rax
mov eax, DWORD PTR -60[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -112[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov ecx, DWORD PTR -60[rbp]
movsx rcx, ecx
lea rsi, 0[0+rcx*8]
mov rcx, QWORD PTR -112[rbp]
lea rbx, [rsi+rcx]
mov rsi, rdx
mov rdi, rax
call fxp_add
mov QWORD PTR [rbx], rax
add DWORD PTR -64[rbp], 1
.L749:
mov eax, DWORD PTR -64[rbp]
cmp eax, DWORD PTR -100[rbp]
jl .L752
jmp .L751
.L756:
nop
.L751:
add DWORD PTR -60[rbp], 1
.L748:
mov eax, DWORD PTR -60[rbp]
cmp eax, DWORD PTR -76[rbp]
jl .L753
mov rsp, r12
nop
mov rax, QWORD PTR -40[rbp]
sub rax, QWORD PTR fs:40
je .L754
call __stack_chk_fail@PLT
.L754:
lea rsp, -32[rbp]
pop rbx
pop r12
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE111:
.size fxp_direct_form_1_impl2, .-fxp_direct_form_1_impl2
.globl nchoosek
.type nchoosek, @function
nchoosek:
.LFB112:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
mov DWORD PTR -8[rbp], esi
cmp DWORD PTR -8[rbp], 0
jne .L758
mov eax, 1
jmp .L759
.L758:
mov eax, DWORD PTR -8[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -4[rbp]
sub eax, 1
mov esi, edx
mov edi, eax
call nchoosek
imul eax, DWORD PTR -4[rbp]
cdq
idiv DWORD PTR -8[rbp]
.L759:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE112:
.size nchoosek, .-nchoosek
.globl generate_delta_coefficients
.type generate_delta_coefficients, @function
generate_delta_coefficients:
.LFB113:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov DWORD PTR -52[rbp], edx
movsd QWORD PTR -64[rbp], xmm0
mov eax, DWORD PTR -52[rbp]
sub eax, 1
mov DWORD PTR -12[rbp], eax
mov DWORD PTR -20[rbp], 0
jmp .L761
.L764:
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -16[rbp], 0
jmp .L762
.L763:
mov eax, DWORD PTR -16[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm2, QWORD PTR [rax]
movsd QWORD PTR -72[rbp], xmm2
mov eax, DWORD PTR -20[rbp]
sub eax, DWORD PTR -16[rbp]
mov edx, eax
mov eax, DWORD PTR -12[rbp]
sub eax, DWORD PTR -16[rbp]
mov esi, edx
mov edi, eax
call nchoosek
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mulsd xmm0, QWORD PTR -72[rbp]
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -16[rbp], 1
.L762:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -20[rbp]
jle .L763
mov eax, DWORD PTR -12[rbp]
sub eax, DWORD PTR -20[rbp]
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov rax, QWORD PTR -64[rbp]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
movq rax, xmm0
mov edx, DWORD PTR -20[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -48[rbp]
add rdx, rcx
movq xmm0, rax
mulsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR [rdx], xmm0
add DWORD PTR -20[rbp], 1
.L761:
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -12[rbp]
jle .L764
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE113:
.size generate_delta_coefficients, .-generate_delta_coefficients
.globl get_delta_transfer_function
.type get_delta_transfer_function, @function
get_delta_transfer_function:
.LFB114:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov DWORD PTR -20[rbp], edx
mov QWORD PTR -32[rbp], rcx
mov QWORD PTR -40[rbp], r8
mov DWORD PTR -24[rbp], r9d
movsd QWORD PTR -48[rbp], xmm0
mov rsi, QWORD PTR -48[rbp]
mov edx, DWORD PTR -20[rbp]
mov rcx, QWORD PTR -16[rbp]
mov rax, QWORD PTR -8[rbp]
movq xmm0, rsi
mov rsi, rcx
mov rdi, rax
call generate_delta_coefficients
mov rsi, QWORD PTR -48[rbp]
mov edx, DWORD PTR -24[rbp]
mov rcx, QWORD PTR -40[rbp]
mov rax, QWORD PTR -32[rbp]
movq xmm0, rsi
mov rsi, rcx
mov rdi, rax
call generate_delta_coefficients
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE114:
.size get_delta_transfer_function, .-get_delta_transfer_function
.globl get_delta_transfer_function_with_base
.type get_delta_transfer_function_with_base, @function
get_delta_transfer_function_with_base:
.LFB115:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov DWORD PTR -52[rbp], edx
mov QWORD PTR -64[rbp], rcx
mov QWORD PTR -72[rbp], r8
mov DWORD PTR -56[rbp], r9d
movsd QWORD PTR -80[rbp], xmm0
mov eax, DWORD PTR -56[rbp]
sub eax, 1
mov DWORD PTR -16[rbp], eax
mov eax, DWORD PTR -52[rbp]
sub eax, 1
mov DWORD PTR -12[rbp], eax
mov DWORD PTR -24[rbp], 0
jmp .L767
.L770:
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -20[rbp], 0
jmp .L768
.L769:
mov eax, DWORD PTR -20[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -64[rbp]
add rax, rdx
movsd xmm2, QWORD PTR [rax]
movsd QWORD PTR -88[rbp], xmm2
mov eax, DWORD PTR -24[rbp]
sub eax, DWORD PTR -20[rbp]
mov edx, eax
mov eax, DWORD PTR -16[rbp]
sub eax, DWORD PTR -20[rbp]
mov esi, edx
mov edi, eax
call nchoosek
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mulsd xmm0, QWORD PTR -88[rbp]
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -20[rbp], 1
.L768:
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -24[rbp]
jle .L769
mov eax, DWORD PTR -16[rbp]
sub eax, DWORD PTR -24[rbp]
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov rax, QWORD PTR -80[rbp]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
movq rax, xmm0
mov edx, DWORD PTR -24[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -72[rbp]
add rdx, rcx
movq xmm0, rax
mulsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR [rdx], xmm0
add DWORD PTR -24[rbp], 1
.L767:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -16[rbp]
jle .L770
mov DWORD PTR -24[rbp], 0
jmp .L771
.L774:
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
mov DWORD PTR -20[rbp], 0
jmp .L772
.L773:
mov eax, DWORD PTR -20[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
movsd xmm3, QWORD PTR [rax]
movsd QWORD PTR -88[rbp], xmm3
mov eax, DWORD PTR -24[rbp]
sub eax, DWORD PTR -20[rbp]
mov edx, eax
mov eax, DWORD PTR -12[rbp]
sub eax, DWORD PTR -20[rbp]
mov esi, edx
mov edi, eax
call nchoosek
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mulsd xmm0, QWORD PTR -88[rbp]
movsd xmm1, QWORD PTR -8[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
add DWORD PTR -20[rbp], 1
.L772:
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -24[rbp]
jle .L773
mov eax, DWORD PTR -12[rbp]
sub eax, DWORD PTR -24[rbp]
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov rax, QWORD PTR -80[rbp]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
movq rax, xmm0
mov edx, DWORD PTR -24[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
mov rdx, QWORD PTR -48[rbp]
add rdx, rcx
movq xmm0, rax
mulsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR [rdx], xmm0
add DWORD PTR -24[rbp], 1
.L771:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -12[rbp]
jle .L774
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE115:
.size get_delta_transfer_function_with_base, .-get_delta_transfer_function_with_base
.globl ft_closedloop_series
.type ft_closedloop_series, @function
ft_closedloop_series:
.LFB116:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r13
push r12
push rbx
sub rsp, 104
.cfi_offset 13, -24
.cfi_offset 12, -32
.cfi_offset 3, -40
mov QWORD PTR -72[rbp], rdi
mov DWORD PTR -76[rbp], esi
mov QWORD PTR -88[rbp], rdx
mov DWORD PTR -80[rbp], ecx
mov QWORD PTR -96[rbp], r8
mov DWORD PTR -100[rbp], r9d
mov rax, QWORD PTR 16[rbp]
mov QWORD PTR -112[rbp], rax
mov rax, QWORD PTR 32[rbp]
mov QWORD PTR -120[rbp], rax
mov rax, QWORD PTR 48[rbp]
mov QWORD PTR -128[rbp], rax
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
mov edx, DWORD PTR -76[rbp]
mov eax, DWORD PTR -100[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR 40[rbp], eax
mov edx, DWORD PTR -80[rbp]
mov eax, DWORD PTR 24[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR 56[rbp], eax
mov eax, DWORD PTR 56[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -56[rbp], rdx
movsx rdx, eax
mov r12, rdx
mov r13d, 0
movsx rdx, eax
mov r10, rdx
mov r11d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L776:
cmp rsp, rdx
je .L777
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L776
.L777:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L778
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L778:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -48[rbp], rax
mov r8d, DWORD PTR 40[rbp]
mov rdi, QWORD PTR -120[rbp]
mov ecx, DWORD PTR -100[rbp]
mov rdx, QWORD PTR -96[rbp]
mov esi, DWORD PTR -76[rbp]
mov rax, QWORD PTR -72[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_mult
mov r8d, DWORD PTR 56[rbp]
mov rdi, QWORD PTR -48[rbp]
mov ecx, DWORD PTR 24[rbp]
mov rdx, QWORD PTR -112[rbp]
mov esi, DWORD PTR -80[rbp]
mov rax, QWORD PTR -88[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_mult
mov r8d, DWORD PTR 56[rbp]
mov rdi, QWORD PTR -128[rbp]
mov ecx, DWORD PTR 56[rbp]
mov rdx, QWORD PTR -48[rbp]
mov esi, DWORD PTR 40[rbp]
mov rax, QWORD PTR -120[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_sum
mov rsp, rbx
nop
mov rax, QWORD PTR -40[rbp]
sub rax, QWORD PTR fs:40
je .L779
call __stack_chk_fail@PLT
.L779:
lea rsp, -24[rbp]
pop rbx
pop r12
pop r13
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE116:
.size ft_closedloop_series, .-ft_closedloop_series
.globl ft_closedloop_sensitivity
.type ft_closedloop_sensitivity, @function
ft_closedloop_sensitivity:
.LFB117:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r13
push r12
push rbx
sub rsp, 104
.cfi_offset 13, -24
.cfi_offset 12, -32
.cfi_offset 3, -40
mov QWORD PTR -72[rbp], rdi
mov DWORD PTR -76[rbp], esi
mov QWORD PTR -88[rbp], rdx
mov DWORD PTR -80[rbp], ecx
mov QWORD PTR -96[rbp], r8
mov DWORD PTR -100[rbp], r9d
mov rax, QWORD PTR 16[rbp]
mov QWORD PTR -112[rbp], rax
mov rax, QWORD PTR 32[rbp]
mov QWORD PTR -120[rbp], rax
mov rax, QWORD PTR 48[rbp]
mov QWORD PTR -128[rbp], rax
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
mov edx, DWORD PTR -76[rbp]
mov eax, DWORD PTR -100[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR -60[rbp], eax
mov edx, DWORD PTR -80[rbp]
mov eax, DWORD PTR 24[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR 56[rbp], eax
mov edx, DWORD PTR -80[rbp]
mov eax, DWORD PTR 24[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR 40[rbp], eax
mov eax, DWORD PTR -60[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -56[rbp], rdx
movsx rdx, eax
mov r12, rdx
mov r13d, 0
movsx rdx, eax
mov r10, rdx
mov r11d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L781:
cmp rsp, rdx
je .L782
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L781
.L782:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L783
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L783:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -48[rbp], rax
mov r8d, DWORD PTR 40[rbp]
mov rdi, QWORD PTR -120[rbp]
mov ecx, DWORD PTR 24[rbp]
mov rdx, QWORD PTR -112[rbp]
mov esi, DWORD PTR -80[rbp]
mov rax, QWORD PTR -88[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_mult
mov r8d, DWORD PTR -60[rbp]
mov rdi, QWORD PTR -48[rbp]
mov ecx, DWORD PTR -100[rbp]
mov rdx, QWORD PTR -96[rbp]
mov esi, DWORD PTR -76[rbp]
mov rax, QWORD PTR -72[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_mult
mov r8d, DWORD PTR 56[rbp]
mov rdi, QWORD PTR -128[rbp]
mov ecx, DWORD PTR -60[rbp]
mov rdx, QWORD PTR -48[rbp]
mov esi, DWORD PTR 40[rbp]
mov rax, QWORD PTR -120[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_sum
mov rsp, rbx
nop
mov rax, QWORD PTR -40[rbp]
sub rax, QWORD PTR fs:40
je .L784
call __stack_chk_fail@PLT
.L784:
lea rsp, -24[rbp]
pop rbx
pop r12
pop r13
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE117:
.size ft_closedloop_sensitivity, .-ft_closedloop_sensitivity
.globl ft_closedloop_feedback
.type ft_closedloop_feedback, @function
ft_closedloop_feedback:
.LFB118:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 136
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov QWORD PTR -104[rbp], rdi
mov DWORD PTR -108[rbp], esi
mov QWORD PTR -120[rbp], rdx
mov DWORD PTR -112[rbp], ecx
mov QWORD PTR -128[rbp], r8
mov DWORD PTR -132[rbp], r9d
mov rax, QWORD PTR 16[rbp]
mov QWORD PTR -144[rbp], rax
mov rax, QWORD PTR 32[rbp]
mov QWORD PTR -152[rbp], rax
mov rax, QWORD PTR 48[rbp]
mov QWORD PTR -160[rbp], rax
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
mov edx, DWORD PTR -112[rbp]
mov eax, DWORD PTR -132[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR 40[rbp], eax
mov edx, DWORD PTR -112[rbp]
mov eax, DWORD PTR 24[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR 56[rbp], eax
mov edx, DWORD PTR -108[rbp]
mov eax, DWORD PTR -132[rbp]
add eax, edx
sub eax, 1
mov DWORD PTR -92[rbp], eax
mov eax, DWORD PTR 56[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -88[rbp], rdx
movsx rdx, eax
mov QWORD PTR -176[rbp], rdx
mov QWORD PTR -168[rbp], 0
movsx rdx, eax
mov r14, rdx
mov r15d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L786:
cmp rsp, rdx
je .L787
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L786
.L787:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L788
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L788:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov eax, DWORD PTR -92[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov r12, rdx
mov r13d, 0
movsx rdx, eax
mov r10, rdx
mov r11d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L789:
cmp rsp, rdx
je .L790
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L789
.L790:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L791
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L791:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov r8d, DWORD PTR -92[rbp]
mov rdi, QWORD PTR -64[rbp]
mov ecx, DWORD PTR -132[rbp]
mov rdx, QWORD PTR -128[rbp]
mov esi, DWORD PTR -108[rbp]
mov rax, QWORD PTR -104[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_mult
mov r8d, DWORD PTR 56[rbp]
mov rdi, QWORD PTR -80[rbp]
mov ecx, DWORD PTR 24[rbp]
mov rdx, QWORD PTR -144[rbp]
mov esi, DWORD PTR -112[rbp]
mov rax, QWORD PTR -120[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_mult
mov r8d, DWORD PTR 56[rbp]
mov rdi, QWORD PTR -160[rbp]
mov ecx, DWORD PTR 56[rbp]
mov rdx, QWORD PTR -80[rbp]
mov esi, DWORD PTR -92[rbp]
mov rax, QWORD PTR -64[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_sum
mov r8d, DWORD PTR 40[rbp]
mov rdi, QWORD PTR -152[rbp]
mov ecx, DWORD PTR -132[rbp]
mov rdx, QWORD PTR -128[rbp]
mov esi, DWORD PTR -112[rbp]
mov rax, QWORD PTR -120[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call poly_mult
mov rsp, rbx
nop
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
je .L792
call __stack_chk_fail@PLT
.L792:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE118:
.size ft_closedloop_feedback, .-ft_closedloop_feedback
.globl check_stability_closedloop
.type check_stability_closedloop, @function
check_stability_closedloop:
.LFB119:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 168
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov QWORD PTR -136[rbp], rdi
mov DWORD PTR -140[rbp], esi
mov QWORD PTR -152[rbp], rdx
mov DWORD PTR -144[rbp], ecx
mov QWORD PTR -160[rbp], r8
mov DWORD PTR -164[rbp], r9d
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov QWORD PTR -176[rbp], rax
mov eax, DWORD PTR -140[rbp]
mov DWORD PTR -116[rbp], eax
mov ecx, DWORD PTR -140[rbp]
mov eax, DWORD PTR -140[rbp]
add eax, eax
lea esi, -1[rax]
movsx rax, ecx
sub rax, 1
mov QWORD PTR -96[rbp], rax
movsx rax, ecx
mov QWORD PTR -208[rbp], rax
mov QWORD PTR -200[rbp], 0
movsx rax, ecx
lea rbx, 0[0+rax*8]
movsx rax, esi
sub rax, 1
mov QWORD PTR -88[rbp], rax
movsx rax, ecx
mov QWORD PTR -192[rbp], rax
mov QWORD PTR -184[rbp], 0
movsx rax, esi
mov r14, rax
mov r15d, 0
mov r8, QWORD PTR -192[rbp]
mov r9, QWORD PTR -184[rbp]
mov rdx, r9
imul rdx, r14
mov rax, r8
imul rax, r15
lea rdi, [rdx+rax]
mov rax, r8
mul r14
add rdi, rdx
mov rdx, rdi
movsx rax, ecx
mov r12, rax
mov r13d, 0
movsx rax, esi
mov r10, rax
mov r11d, 0
mov rdx, r13
imul rdx, r10
mov rax, r11
imul rax, r12
lea rdi, [rdx+rax]
mov rax, r12
mul r10
add rdi, rdx
mov rdx, rdi
movsx rdx, ecx
movsx rax, esi
imul rax, rdx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L794:
cmp rsp, rdx
je .L795
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L794
.L795:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L796
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L796:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov DWORD PTR -108[rbp], 0
mov rax, QWORD PTR -152[rbp]
mov QWORD PTR -72[rbp], rax
mov rax, QWORD PTR -160[rbp]
mov QWORD PTR -64[rbp], rax
pxor xmm0, xmm0
movsd QWORD PTR -104[rbp], xmm0
mov DWORD PTR -120[rbp], 0
jmp .L797
.L798:
mov eax, DWORD PTR -120[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -136[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
movsd xmm1, QWORD PTR -104[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -104[rbp], xmm0
add DWORD PTR -120[rbp], 1
.L797:
mov eax, DWORD PTR -120[rbp]
cmp eax, DWORD PTR -140[rbp]
jl .L798
movsd xmm0, QWORD PTR -104[rbp]
pxor xmm1, xmm1
comisd xmm0, xmm1
seta al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
pxor xmm0, xmm0
movsd QWORD PTR -104[rbp], xmm0
mov DWORD PTR -120[rbp], 0
jmp .L799
.L800:
mov eax, DWORD PTR -120[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -136[rbp]
add rax, rdx
movsd xmm4, QWORD PTR [rax]
movsd QWORD PTR -192[rbp], xmm4
mov eax, DWORD PTR -140[rbp]
sub eax, 1
sub eax, DWORD PTR -120[rbp]
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov rax, QWORD PTR .LC15[rip]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
mulsd xmm0, QWORD PTR -192[rbp]
movsd xmm1, QWORD PTR -104[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -104[rbp], xmm0
add DWORD PTR -120[rbp], 1
.L799:
mov eax, DWORD PTR -120[rbp]
cmp eax, DWORD PTR -140[rbp]
jl .L800
mov eax, DWORD PTR -140[rbp]
sub eax, 1
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov rax, QWORD PTR .LC15[rip]
movapd xmm1, xmm0
movq xmm0, rax
call internal_pow
movsd xmm1, QWORD PTR -104[rbp]
mulsd xmm0, xmm1
movsd QWORD PTR -104[rbp], xmm0
movsd xmm0, QWORD PTR -104[rbp]
pxor xmm1, xmm1
comisd xmm0, xmm1
seta al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
mov eax, DWORD PTR -140[rbp]
cdqe
sal rax, 3
lea rdx, -8[rax]
mov rax, QWORD PTR -136[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
movq xmm0, rax
call internal_abs
mov rax, QWORD PTR -136[rbp]
movsd xmm1, QWORD PTR [rax]
comisd xmm1, xmm0
seta al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
mov DWORD PTR -120[rbp], 0
jmp .L801
.L813:
mov DWORD PTR -124[rbp], 0
jmp .L802
.L812:
mov rcx, rbx
shr rcx, 3
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -124[rbp]
movsx rsi, edx
mov edx, DWORD PTR -120[rbp]
movsx rdx, edx
imul rdx, rcx
add rdx, rsi
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
cmp DWORD PTR -120[rbp], 0
jne .L803
mov eax, DWORD PTR -124[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -136[rbp]
add rax, rdx
mov rcx, rbx
shr rcx, 3
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -124[rbp]
movsx rsi, edx
mov edx, DWORD PTR -120[rbp]
movsx rdx, edx
imul rdx, rcx
add rdx, rsi
movsd QWORD PTR [rax+rdx*8], xmm0
jmp .L804
.L803:
mov eax, DWORD PTR -120[rbp]
and eax, 1
test eax, eax
je .L805
mov DWORD PTR -112[rbp], 0
jmp .L806
.L807:
mov rsi, rbx
shr rsi, 3
mov eax, DWORD PTR -120[rbp]
lea edx, -1[rax]
mov eax, DWORD PTR -116[rbp]
sub eax, DWORD PTR -112[rbp]
lea edi, -1[rax]
mov rcx, rbx
shr rcx, 3
mov rax, QWORD PTR -80[rbp]
movsx rdi, edi
movsx rdx, edx
imul rdx, rsi
add rdx, rdi
movsd xmm0, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -112[rbp]
movsx rsi, edx
mov edx, DWORD PTR -120[rbp]
movsx rdx, edx
imul rdx, rcx
add rdx, rsi
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -112[rbp], 1
.L806:
mov eax, DWORD PTR -112[rbp]
cmp eax, DWORD PTR -116[rbp]
jl .L807
sub DWORD PTR -116[rbp], 1
mov eax, DWORD PTR -116[rbp]
mov DWORD PTR -124[rbp], eax
jmp .L804
.L805:
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -120[rbp]
lea edx, -2[rax]
mov rax, QWORD PTR -80[rbp]
movsx rdx, edx
imul rdx, rcx
movsd xmm0, QWORD PTR [rax+rdx*8]
pxor xmm1, xmm1
comisd xmm0, xmm1
seta al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -120[rbp]
lea esi, -2[rax]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -124[rbp]
movsx rdi, edx
movsx rdx, esi
imul rdx, rcx
add rdx, rdi
movsd xmm0, QWORD PTR [rax+rdx*8]
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -120[rbp]
lea esi, -2[rax]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -116[rbp]
movsx rdi, edx
movsx rdx, esi
imul rdx, rcx
add rdx, rdi
movsd xmm1, QWORD PTR [rax+rdx*8]
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -120[rbp]
lea edx, -2[rax]
mov rax, QWORD PTR -80[rbp]
movsx rdx, edx
imul rdx, rcx
movsd xmm3, QWORD PTR [rax+rdx*8]
movapd xmm2, xmm1
divsd xmm2, xmm3
mov rcx, rbx
shr rcx, 3
mov eax, DWORD PTR -120[rbp]
lea esi, -1[rax]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -124[rbp]
movsx rdi, edx
movsx rdx, esi
imul rdx, rcx
add rdx, rdi
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm1, xmm2
mov rcx, rbx
shr rcx, 3
subsd xmm0, xmm1
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -124[rbp]
movsx rsi, edx
mov edx, DWORD PTR -120[rbp]
movsx rdx, edx
imul rdx, rcx
add rdx, rsi
movsd QWORD PTR [rax+rdx*8], xmm0
mov rax, QWORD PTR -80[rbp]
movsd xmm0, QWORD PTR [rax]
pxor xmm1, xmm1
comisd xmm0, xmm1
jb .L808
mov rcx, rbx
shr rcx, 3
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -120[rbp]
movsx rdx, edx
imul rdx, rcx
movsd xmm0, QWORD PTR [rax+rdx*8]
pxor xmm1, xmm1
comisd xmm0, xmm1
jb .L808
mov eax, 1
jmp .L811
.L808:
mov eax, 0
.L811:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
.L804:
add DWORD PTR -124[rbp], 1
.L802:
mov eax, DWORD PTR -124[rbp]
cmp eax, DWORD PTR -116[rbp]
jl .L812
add DWORD PTR -120[rbp], 1
.L801:
mov eax, DWORD PTR -140[rbp]
add eax, eax
sub eax, 1
cmp DWORD PTR -120[rbp], eax
jl .L813
mov eax, 1
mov rsp, QWORD PTR -176[rbp]
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L815
call __stack_chk_fail@PLT
.L815:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE119:
.size check_stability_closedloop, .-check_stability_closedloop
.section .rodata
.align 8
.LC46:
.string "impl.frac_bits must be less than word width!"
.align 8
.LC47:
.string "impl.int_bits must be less than word width subtracted by precision!"
.align 8
.LC48:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/initialization.h"
.LC49:
.string "0"
.text
.globl initialization
.type initialization, @function
initialization:
.LFB120:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, DWORD PTR impl[rip+4]
cmp eax, 31
jle .L819
lea rdi, .LC46[rip]
call puts@PLT
.L819:
mov eax, DWORD PTR impl[rip]
mov ecx, DWORD PTR impl[rip+4]
mov edx, 32
sub edx, ecx
cmp eax, edx
jl .L820
lea rdi, .LC47[rip]
call puts@PLT
lea rcx, __PRETTY_FUNCTION__.9[rip]
mov edx, 33
lea rsi, .LC48[rip]
lea rdi, .LC49[rip]
call __assert_fail@PLT
.L820:
mov eax, DWORD PTR impl[rip+4]
cmp eax, 30
jle .L821
mov QWORD PTR _fxp_one[rip], 2147483647
jmp .L822
.L821:
mov eax, DWORD PTR impl[rip+4]
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
cdqe
mov QWORD PTR _fxp_one[rip], rax
.L822:
mov eax, DWORD PTR impl[rip+4]
sub eax, 1
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
cdqe
mov QWORD PTR _fxp_half[rip], rax
mov eax, DWORD PTR impl[rip+4]
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
neg eax
cdqe
mov QWORD PTR _fxp_minus_one[rip], rax
mov edx, DWORD PTR impl[rip+4]
mov eax, DWORD PTR impl[rip]
add eax, edx
sub eax, 1
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
neg eax
cdqe
mov QWORD PTR _fxp_min[rip], rax
mov edx, DWORD PTR impl[rip+4]
mov eax, DWORD PTR impl[rip]
add eax, edx
sub eax, 1
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
sub eax, 1
cdqe
mov QWORD PTR _fxp_max[rip], rax
mov eax, DWORD PTR impl[rip+4]
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
sub eax, 1
cdqe
mov QWORD PTR _fxp_fmask[rip], rax
mov edx, DWORD PTR impl[rip+4]
mov eax, 31
sub eax, edx
mov edx, -2147483648
mov ecx, eax
shr edx, cl
mov eax, edx
mov eax, eax
mov QWORD PTR _fxp_imask[rip], rax
mov rax, QWORD PTR _fxp_min[rip]
pxor xmm0, xmm0
cvtsi2sd xmm0, rax
movsd QWORD PTR _dbl_min[rip], xmm0
movsd xmm0, QWORD PTR _dbl_min[rip]
mov eax, DWORD PTR impl[rip+4]
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
pxor xmm1, xmm1
cvtsi2sd xmm1, eax
divsd xmm0, xmm1
movsd QWORD PTR _dbl_min[rip], xmm0
mov rax, QWORD PTR _fxp_max[rip]
pxor xmm0, xmm0
cvtsi2sd xmm0, rax
movsd QWORD PTR _dbl_max[rip], xmm0
movsd xmm0, QWORD PTR _dbl_max[rip]
mov eax, DWORD PTR impl[rip+4]
mov edx, 1
mov ecx, eax
sal edx, cl
mov eax, edx
pxor xmm1, xmm1
cvtsi2sd xmm1, eax
divsd xmm0, xmm1
movsd QWORD PTR _dbl_max[rip], xmm0
mov eax, DWORD PTR impl[rip+40]
test eax, eax
je .L823
mov eax, DWORD PTR impl[rip+40]
cmp eax, 1
jne .L824
.L823:
mov DWORD PTR impl[rip+40], 1
jmp .L818
.L824:
movsd xmm0, QWORD PTR impl[rip+16]
pxor xmm1, xmm1
ucomisd xmm0, xmm1
jp .L829
pxor xmm1, xmm1
comisd xmm0, xmm1
je .L826
.L829:
movsd xmm0, QWORD PTR impl[rip+16]
mov eax, DWORD PTR impl[rip+40]
pxor xmm1, xmm1
cvtsi2sd xmm1, eax
divsd xmm0, xmm1
movsd QWORD PTR impl[rip+16], xmm0
.L826:
movsd xmm0, QWORD PTR impl[rip+8]
pxor xmm1, xmm1
ucomisd xmm0, xmm1
jp .L830
pxor xmm1, xmm1
comisd xmm0, xmm1
je .L818
.L830:
movsd xmm0, QWORD PTR impl[rip+8]
mov eax, DWORD PTR impl[rip+40]
pxor xmm1, xmm1
cvtsi2sd xmm1, eax
divsd xmm0, xmm1
movsd QWORD PTR impl[rip+8], xmm0
.L818:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE120:
.size initialization, .-initialization
.globl double_state_space_representation
.type double_state_space_representation, @function
double_state_space_representation:
.LFB121:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 288
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -280[rbp], 0
jmp .L832
.L835:
mov DWORD PTR -276[rbp], 0
jmp .L833
.L834:
mov eax, DWORD PTR -276[rbp]
movsx rdx, eax
mov eax, DWORD PTR -280[rbp]
cdqe
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -272[rbp+rax*8], xmm0
mov eax, DWORD PTR -276[rbp]
movsx rdx, eax
mov eax, DWORD PTR -280[rbp]
cdqe
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -144[rbp+rax*8], xmm0
add DWORD PTR -276[rbp], 1
.L833:
cmp DWORD PTR -276[rbp], 3
jle .L834
add DWORD PTR -280[rbp], 1
.L832:
cmp DWORD PTR -280[rbp], 3
jle .L835
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller[rip+512]
lea r8, _controller[rip+256]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -144[rbp]
push rax
lea r9, _controller[rip+768]
lea r8, _controller[rip+384]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rdx, -144[rbp]
lea rax, -272[rbp]
lea r8, _controller[rip+640]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller[rip+512]
lea r8, _controller[rip]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
sub rsp, 8
lea rax, -144[rbp]
push rax
lea r9, _controller[rip+768]
lea r8, _controller[rip+128]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rdx, -144[rbp]
lea rax, -272[rbp]
lea r8, _controller[rip+512]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
movsd xmm0, QWORD PTR _controller[rip+640]
movq rax, xmm0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L837
call __stack_chk_fail@PLT
.L837:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE121:
.size double_state_space_representation, .-double_state_space_representation
.globl fxp_state_space_representation
.type fxp_state_space_representation, @function
fxp_state_space_representation:
.LFB122:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 1184
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -1176[rbp], 0
jmp .L839
.L842:
mov DWORD PTR -1172[rbp], 0
jmp .L840
.L841:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -1168[rbp+rax*8], 0
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -1040[rbp+rax*8], 0
add DWORD PTR -1172[rbp], 1
.L840:
cmp DWORD PTR -1172[rbp], 3
jle .L841
add DWORD PTR -1176[rbp], 1
.L839:
cmp DWORD PTR -1176[rbp], 3
jle .L842
mov DWORD PTR -1176[rbp], 0
jmp .L843
.L846:
mov DWORD PTR -1172[rbp], 0
jmp .L844
.L845:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -912[rbp+rax*8], 0
add DWORD PTR -1172[rbp], 1
.L844:
cmp DWORD PTR -1172[rbp], 3
jle .L845
add DWORD PTR -1176[rbp], 1
.L843:
cmp DWORD PTR -1176[rbp], 3
jle .L846
mov DWORD PTR -1176[rbp], 0
jmp .L847
.L850:
mov DWORD PTR -1172[rbp], 0
jmp .L848
.L849:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -784[rbp+rax*8], 0
add DWORD PTR -1172[rbp], 1
.L848:
cmp DWORD PTR -1172[rbp], 3
jle .L849
add DWORD PTR -1176[rbp], 1
.L847:
cmp DWORD PTR -1176[rbp], 3
jle .L850
mov DWORD PTR -1176[rbp], 0
jmp .L851
.L854:
mov DWORD PTR -1172[rbp], 0
jmp .L852
.L853:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -656[rbp+rax*8], 0
add DWORD PTR -1172[rbp], 1
.L852:
cmp DWORD PTR -1172[rbp], 3
jle .L853
add DWORD PTR -1176[rbp], 1
.L851:
cmp DWORD PTR -1176[rbp], 3
jle .L854
mov DWORD PTR -1176[rbp], 0
jmp .L855
.L858:
mov DWORD PTR -1172[rbp], 0
jmp .L856
.L857:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -528[rbp+rax*8], 0
add DWORD PTR -1172[rbp], 1
.L856:
cmp DWORD PTR -1172[rbp], 3
jle .L857
add DWORD PTR -1176[rbp], 1
.L855:
cmp DWORD PTR -1176[rbp], 3
jle .L858
mov DWORD PTR -1176[rbp], 0
jmp .L859
.L862:
mov DWORD PTR -1172[rbp], 0
jmp .L860
.L861:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -400[rbp+rax*8], 0
add DWORD PTR -1172[rbp], 1
.L860:
cmp DWORD PTR -1172[rbp], 3
jle .L861
add DWORD PTR -1176[rbp], 1
.L859:
cmp DWORD PTR -1176[rbp], 3
jle .L862
mov DWORD PTR -1176[rbp], 0
jmp .L863
.L866:
mov DWORD PTR -1172[rbp], 0
jmp .L864
.L865:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -272[rbp+rax*8], 0
add DWORD PTR -1172[rbp], 1
.L864:
cmp DWORD PTR -1172[rbp], 3
jle .L865
add DWORD PTR -1176[rbp], 1
.L863:
cmp DWORD PTR -1176[rbp], 3
jle .L866
mov DWORD PTR -1176[rbp], 0
jmp .L867
.L870:
mov DWORD PTR -1172[rbp], 0
jmp .L868
.L869:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -144[rbp+rax*8], 0
add DWORD PTR -1172[rbp], 1
.L868:
cmp DWORD PTR -1172[rbp], 3
jle .L869
add DWORD PTR -1176[rbp], 1
.L867:
cmp DWORD PTR -1176[rbp], 3
jle .L870
mov DWORD PTR -1176[rbp], 0
jmp .L871
.L874:
mov DWORD PTR -1172[rbp], 0
jmp .L872
.L873:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -912[rbp+rdx*8], rax
add DWORD PTR -1172[rbp], 1
.L872:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1172[rbp], eax
jl .L873
add DWORD PTR -1176[rbp], 1
.L871:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L874
mov DWORD PTR -1176[rbp], 0
jmp .L875
.L878:
mov DWORD PTR -1172[rbp], 0
jmp .L876
.L877:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 16
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -784[rbp+rdx*8], rax
add DWORD PTR -1172[rbp], 1
.L876:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1172[rbp], eax
jl .L877
add DWORD PTR -1176[rbp], 1
.L875:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L878
mov DWORD PTR -1176[rbp], 0
jmp .L879
.L882:
mov DWORD PTR -1172[rbp], 0
jmp .L880
.L881:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 32
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -656[rbp+rdx*8], rax
add DWORD PTR -1172[rbp], 1
.L880:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1172[rbp], eax
jl .L881
add DWORD PTR -1176[rbp], 1
.L879:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L882
mov DWORD PTR -1176[rbp], 0
jmp .L883
.L886:
mov DWORD PTR -1172[rbp], 0
jmp .L884
.L885:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 48
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -528[rbp+rdx*8], rax
add DWORD PTR -1172[rbp], 1
.L884:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1172[rbp], eax
jl .L885
add DWORD PTR -1176[rbp], 1
.L883:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L886
mov DWORD PTR -1176[rbp], 0
jmp .L887
.L890:
mov DWORD PTR -1172[rbp], 0
jmp .L888
.L889:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -400[rbp+rdx*8], rax
add DWORD PTR -1172[rbp], 1
.L888:
cmp DWORD PTR -1172[rbp], 0
jle .L889
add DWORD PTR -1176[rbp], 1
.L887:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L890
mov DWORD PTR -1176[rbp], 0
jmp .L891
.L894:
mov DWORD PTR -1172[rbp], 0
jmp .L892
.L893:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 96
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -272[rbp+rdx*8], rax
add DWORD PTR -1172[rbp], 1
.L892:
cmp DWORD PTR -1172[rbp], 0
jle .L893
add DWORD PTR -1176[rbp], 1
.L891:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L894
mov DWORD PTR -1176[rbp], 0
jmp .L895
.L898:
mov DWORD PTR -1172[rbp], 0
jmp .L896
.L897:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 80
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -144[rbp+rdx*8], rax
add DWORD PTR -1172[rbp], 1
.L896:
cmp DWORD PTR -1172[rbp], 0
jle .L897
add DWORD PTR -1176[rbp], 1
.L895:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L898
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rcx, -400[rbp]
lea rdx, -656[rbp]
sub rsp, 8
lea rax, -1168[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, 1
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov r10d, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rcx, -272[rbp]
lea rdx, -528[rbp]
sub rsp, 8
lea rax, -1040[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, 1
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rcx, -144[rbp]
lea rdx, -1040[rbp]
lea rax, -1168[rbp]
mov r8, rcx
mov rcx, rdx
mov rdx, rax
mov esi, 1
call fxp_add_matrix
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -400[rbp]
lea rdx, -912[rbp]
sub rsp, 8
lea rax, -1168[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, 1
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov r10d, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -272[rbp]
lea rdx, -784[rbp]
sub rsp, 8
lea rax, -1040[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, 1
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -400[rbp]
lea rdx, -1040[rbp]
lea rax, -1168[rbp]
mov r8, rcx
mov rcx, rdx
mov rdx, rax
mov esi, 1
call fxp_add_matrix
mov DWORD PTR -1176[rbp], 0
jmp .L899
.L902:
mov DWORD PTR -1172[rbp], 0
jmp .L900
.L901:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rax, QWORD PTR -400[rbp+rax*8]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
add rdx, 64
lea rcx, 0[0+rdx*8]
lea rdx, _controller[rip]
mov QWORD PTR [rcx+rdx], rax
add DWORD PTR -1172[rbp], 1
.L900:
cmp DWORD PTR -1172[rbp], 0
jle .L901
add DWORD PTR -1176[rbp], 1
.L899:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L902
mov DWORD PTR -1176[rbp], 0
jmp .L903
.L906:
mov DWORD PTR -1172[rbp], 0
jmp .L904
.L905:
mov eax, DWORD PTR -1172[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1176[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rax, QWORD PTR -144[rbp+rax*8]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov edx, DWORD PTR -1172[rbp]
movsx rcx, edx
mov edx, DWORD PTR -1176[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
add rdx, 80
lea rcx, 0[0+rdx*8]
lea rdx, _controller[rip]
mov QWORD PTR [rcx+rdx], rax
add DWORD PTR -1172[rbp], 1
.L904:
cmp DWORD PTR -1172[rbp], 0
jle .L905
add DWORD PTR -1176[rbp], 1
.L903:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1176[rbp], eax
jl .L906
movsd xmm0, QWORD PTR _controller[rip+640]
movq rax, xmm0
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L908
call __stack_chk_fail@PLT
.L908:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE122:
.size fxp_state_space_representation, .-fxp_state_space_representation
.section .rodata
.align 8
.LC50:
.string "Warning: Function sinTyl from bmc/core/filter_functions.h: Precision must be a positive integer. Assuming 0 precision"
.align 8
.LC56:
.string "Warning: Function sinTyl from bmc/core/filter_functions.h: Precision representation exceeded. Assuming maximum precision of 6"
.text
.globl sinTyl
.type sinTyl, @function
sinTyl:
.LFB123:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
movsd QWORD PTR -40[rbp], xmm0
mov DWORD PTR -44[rbp], edi
movsd xmm0, QWORD PTR -40[rbp]
mulsd xmm0, xmm0
movsd QWORD PTR -16[rbp], xmm0
cmp DWORD PTR -44[rbp], 0
jns .L910
lea rdi, .LC50[rip]
call puts@PLT
mov DWORD PTR -44[rbp], 0
.L910:
cmp DWORD PTR -44[rbp], 0
js .L911
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 0
jle .L911
movsd xmm0, QWORD PTR -40[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -24[rbp]
addsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 1
jle .L911
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm2, QWORD PTR .LC51[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR -24[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 2
jle .L911
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC52[rip]
divsd xmm0, xmm1
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 3
jle .L911
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm2, QWORD PTR .LC53[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR -24[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 4
jle .L911
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC54[rip]
divsd xmm0, xmm1
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 5
jle .L911
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm2, QWORD PTR .LC55[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR -24[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 6
jle .L911
lea rdi, .LC56[rip]
call puts@PLT
.L911:
movsd xmm0, QWORD PTR -24[rbp]
movq rax, xmm0
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE123:
.size sinTyl, .-sinTyl
.section .rodata
.align 8
.LC57:
.string "Warning: Function cosTyl from bmc/core/filter_functions.h: Precision must be a positive integer. Assuming 0 precision"
.text
.globl cosTyl
.type cosTyl, @function
cosTyl:
.LFB124:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
movsd QWORD PTR -40[rbp], xmm0
mov DWORD PTR -44[rbp], edi
movsd xmm0, QWORD PTR -40[rbp]
mulsd xmm0, xmm0
movsd QWORD PTR -16[rbp], xmm0
cmp DWORD PTR -44[rbp], 0
jns .L914
lea rdi, .LC57[rip]
call puts@PLT
mov DWORD PTR -44[rbp], 0
.L914:
cmp DWORD PTR -44[rbp], 0
js .L915
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 0
jle .L915
movsd xmm0, QWORD PTR .LC7[rip]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR .LC7[rip]
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 1
jle .L915
movsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm2, QWORD PTR .LC58[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR -24[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 2
jle .L915
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC59[rip]
divsd xmm0, xmm1
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 3
jle .L915
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm2, QWORD PTR .LC60[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR -24[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 4
jle .L915
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC61[rip]
divsd xmm0, xmm1
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 5
jle .L915
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm2, QWORD PTR .LC62[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR -24[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 6
jle .L915
lea rdi, .LC56[rip]
call puts@PLT
.L915:
movsd xmm0, QWORD PTR -24[rbp]
movq rax, xmm0
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE124:
.size cosTyl, .-cosTyl
.section .rodata
.align 8
.LC66:
.string "Warning: Function sinTyl from bmc/core/filter_functions.h: Precision representation exceeded. Assuming maximum precision of 4"
.text
.globl atanTyl
.type atanTyl, @function
atanTyl:
.LFB125:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
movsd QWORD PTR -40[rbp], xmm0
mov DWORD PTR -44[rbp], edi
movsd xmm0, QWORD PTR -40[rbp]
mulsd xmm0, xmm0
movsd QWORD PTR -16[rbp], xmm0
cmp DWORD PTR -44[rbp], 0
jns .L918
lea rdi, .LC50[rip]
call puts@PLT
mov DWORD PTR -44[rbp], 0
.L918:
cmp DWORD PTR -44[rbp], 0
js .L919
pxor xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 0
jle .L919
movsd xmm0, QWORD PTR -40[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 1
jle .L919
movsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm2, QWORD PTR .LC63[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR -24[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 2
jle .L919
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm1, QWORD PTR .LC64[rip]
divsd xmm0, xmm1
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 3
jle .L919
movsd xmm0, QWORD PTR -8[rbp]
mulsd xmm0, QWORD PTR -16[rbp]
movsd QWORD PTR -8[rbp], xmm0
movsd xmm0, QWORD PTR -8[rbp]
movsd xmm2, QWORD PTR .LC65[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR -24[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
cmp DWORD PTR -44[rbp], 6
jle .L919
lea rdi, .LC66[rip]
call puts@PLT
.L919:
movsd xmm0, QWORD PTR -24[rbp]
movq rax, xmm0
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE125:
.size atanTyl, .-atanTyl
.globl sqrt1
.type sqrt1, @function
sqrt1:
.LFB126:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -20[rbp], xmm0
movss xmm1, DWORD PTR -20[rbp]
movss xmm0, DWORD PTR .LC67[rip]
mulss xmm0, xmm1
movss DWORD PTR -4[rbp], xmm0
movss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR -8[rbp], xmm0
mov eax, DWORD PTR -8[rbp]
sar eax
mov edx, eax
mov eax, 1597463007
sub eax, edx
mov DWORD PTR -8[rbp], eax
movss xmm0, DWORD PTR -8[rbp]
movaps xmm1, xmm0
mulss xmm1, DWORD PTR -20[rbp]
movss xmm0, DWORD PTR -8[rbp]
movaps xmm2, xmm0
mulss xmm2, DWORD PTR -4[rbp]
movss xmm0, DWORD PTR -8[rbp]
mulss xmm2, xmm0
movss xmm0, DWORD PTR .LC68[rip]
subss xmm0, xmm2
mulss xmm0, xmm1
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE126:
.size sqrt1, .-sqrt1
.globl sqrt2
.type sqrt2, @function
sqrt2:
.LFB127:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -20[rbp], xmm0
movss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR -4[rbp], xmm0
mov eax, DWORD PTR -4[rbp]
sar eax
add eax, 532676608
mov DWORD PTR -4[rbp], eax
movss xmm0, DWORD PTR -4[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE127:
.size sqrt2, .-sqrt2
.globl fabsolut
.type fabsolut, @function
fabsolut:
.LFB128:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movss DWORD PTR -4[rbp], xmm0
pxor xmm0, xmm0
comiss xmm0, DWORD PTR -4[rbp]
jbe .L926
movss xmm0, DWORD PTR -4[rbp]
movss xmm1, DWORD PTR .LC69[rip]
xorps xmm0, xmm1
movss DWORD PTR -4[rbp], xmm0
.L926:
movss xmm0, DWORD PTR -4[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE128:
.size fabsolut, .-fabsolut
.type sqrt3, @function
sqrt3:
.LFB129:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 40
movss DWORD PTR -36[rbp], xmm0
movss xmm0, DWORD PTR -36[rbp]
movss xmm1, DWORD PTR .LC70[rip]
divss xmm0, xmm1
movss DWORD PTR -32[rbp], xmm0
movsd xmm0, QWORD PTR .LC71[rip]
movsd QWORD PTR -16[rbp], xmm0
mov DWORD PTR -24[rbp], 0
pxor xmm0, xmm0
ucomiss xmm0, DWORD PTR -36[rbp]
jp .L931
pxor xmm0, xmm0
ucomiss xmm0, DWORD PTR -36[rbp]
jne .L931
pxor xmm0, xmm0
movss DWORD PTR -32[rbp], xmm0
jmp .L933
.L931:
mov DWORD PTR -28[rbp], 1
jmp .L934
.L938:
cmp DWORD PTR -24[rbp], 0
jne .L936
movss xmm0, DWORD PTR -32[rbp]
movaps xmm1, xmm0
mulss xmm1, xmm0
movss xmm0, DWORD PTR -36[rbp]
subss xmm0, xmm1
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
pxor xmm0, xmm0
cvtss2sd xmm0, DWORD PTR -32[rbp]
addsd xmm0, xmm0
divsd xmm1, xmm0
pxor xmm0, xmm0
cvtsd2ss xmm0, xmm1
movss DWORD PTR -20[rbp], xmm0
movss xmm0, DWORD PTR -32[rbp]
addss xmm0, DWORD PTR -20[rbp]
movss DWORD PTR -32[rbp], xmm0
movss xmm0, DWORD PTR -32[rbp]
movaps xmm1, xmm0
mulss xmm1, xmm0
movss xmm0, DWORD PTR -36[rbp]
subss xmm0, xmm1
cvtss2sd xmm0, xmm0
movsd QWORD PTR -8[rbp], xmm0
pxor xmm2, xmm2
cvtsd2ss xmm2, QWORD PTR -8[rbp]
movd eax, xmm2
movd xmm0, eax
call fabsolut
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR -16[rbp]
comisd xmm0, xmm1
jb .L936
mov DWORD PTR -24[rbp], 1
.L936:
add DWORD PTR -28[rbp], 1
.L934:
cmp DWORD PTR -28[rbp], 19
jle .L938
.L933:
movss xmm0, DWORD PTR -32[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE129:
.size sqrt3, .-sqrt3
.globl verify_overflow
.type verify_overflow, @function
verify_overflow:
.LFB130:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 296
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov QWORD PTR -248[rbp], rax
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -152[rbp], rax
movsx rax, edx
mov rcx, rax
mov ebx, 0
movsx rax, edx
mov rsi, rax
mov edi, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L943:
cmp rsp, rcx
je .L944
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L943
.L944:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L945
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L945:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -160[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -168[rbp], rax
movsx rax, edx
mov r8, rax
mov r9d, 0
movsx rax, edx
mov r10, rax
mov r11d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L946:
cmp rsp, rcx
je .L947
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L946
.L947:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L948
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L948:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -176[rbp], rax
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -160[rbp]
mov rsi, rax
lea rdi, ds[rip]
call fxp_double_to_fxp_array
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -176[rbp]
mov rsi, rax
lea rdi, ds[rip+808]
call fxp_double_to_fxp_array
mov rax, QWORD PTR impl[rip+16]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -184[rbp], rax
mov rax, QWORD PTR impl[rip+8]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -144[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -136[rbp], rax
movsx rax, edx
mov r12, rax
mov r13d, 0
movsx rax, edx
mov r14, rax
mov r15d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L949:
cmp rsp, rcx
je .L950
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L949
.L950:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L951
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L951:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -128[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -120[rbp], rax
movsx rax, edx
mov QWORD PTR -208[rbp], rax
mov QWORD PTR -200[rbp], 0
movsx rax, edx
mov QWORD PTR -224[rbp], rax
mov QWORD PTR -216[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L952:
cmp rsp, rcx
je .L953
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L952
.L953:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L954
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L954:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -112[rbp], rax
mov DWORD PTR -192[rbp], 0
jmp .L955
.L958:
mov rdx, QWORD PTR -128[rbp]
mov eax, DWORD PTR -192[rbp]
cdqe
mov QWORD PTR [rdx+rax*8], 0
mov eax, 0
call nondet_int@PLT
movsx rcx, eax
mov rdx, QWORD PTR -112[rbp]
mov eax, DWORD PTR -192[rbp]
cdqe
mov QWORD PTR [rdx+rax*8], rcx
mov rdx, QWORD PTR -112[rbp]
mov eax, DWORD PTR -192[rbp]
cdqe
mov rax, QWORD PTR [rdx+rax*8]
cmp QWORD PTR -184[rbp], rax
jg .L956
mov rdx, QWORD PTR -112[rbp]
mov eax, DWORD PTR -192[rbp]
cdqe
mov rax, QWORD PTR [rdx+rax*8]
cmp QWORD PTR -144[rbp], rax
jl .L956
mov eax, 1
jmp .L957
.L956:
mov eax, 0
.L957:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
add DWORD PTR -192[rbp], 1
.L955:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -192[rbp], eax
jl .L958
mov DWORD PTR -188[rbp], 0
mov edx, DWORD PTR ds[rip+1608]
mov eax, DWORD PTR ds[rip+800]
cmp edx, eax
cmovge eax, edx
mov DWORD PTR -188[rbp], eax
mov edx, DWORD PTR ds[rip+800]
mov rax, rsp
mov rbx, rax
movsx rax, edx
sub rax, 1
mov QWORD PTR -104[rbp], rax
movsx rax, edx
mov QWORD PTR -240[rbp], rax
mov QWORD PTR -232[rbp], 0
movsx rax, edx
mov QWORD PTR -272[rbp], rax
mov QWORD PTR -264[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L959:
cmp rsp, rdx
je .L960
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L959
.L960:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L961
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L961:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -96[rbp], rax
mov eax, DWORD PTR ds[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -88[rbp], rdx
movsx rdx, eax
mov QWORD PTR -288[rbp], rdx
mov QWORD PTR -280[rbp], 0
movsx rdx, eax
mov QWORD PTR -304[rbp], rdx
mov QWORD PTR -296[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L962:
cmp rsp, rdx
je .L963
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L962
.L963:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L964
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L964:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov eax, DWORD PTR -188[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov QWORD PTR -320[rbp], rdx
mov QWORD PTR -312[rbp], 0
movsx rdx, eax
mov QWORD PTR -336[rbp], rdx
mov QWORD PTR -328[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L965:
cmp rsp, rdx
je .L966
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L965
.L966:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L967
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L967:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov DWORD PTR -192[rbp], 0
jmp .L968
.L969:
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -192[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
add DWORD PTR -192[rbp], 1
.L968:
mov eax, DWORD PTR ds[rip+800]
cmp DWORD PTR -192[rbp], eax
jl .L969
mov DWORD PTR -192[rbp], 0
jmp .L970
.L971:
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -192[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
add DWORD PTR -192[rbp], 1
.L970:
mov eax, DWORD PTR ds[rip+1608]
cmp DWORD PTR -192[rbp], eax
jl .L971
mov DWORD PTR -192[rbp], 0
jmp .L972
.L973:
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -192[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
add DWORD PTR -192[rbp], 1
.L972:
mov eax, DWORD PTR -192[rbp]
cmp eax, DWORD PTR -188[rbp]
jl .L973
mov DWORD PTR -192[rbp], 0
jmp .L974
.L975:
mov edx, DWORD PTR -188[rbp]
mov rax, QWORD PTR -64[rbp]
mov rsi, rax
mov edi, 0
call shiftR
mov r8d, DWORD PTR ds[rip+1608]
mov edi, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -192[rbp]
movsx rdx, edx
mov rsi, QWORD PTR [rax+rdx*8]
mov rcx, QWORD PTR -176[rbp]
mov rdx, QWORD PTR -160[rbp]
mov rax, QWORD PTR -64[rbp]
mov r9d, r8d
mov r8d, edi
mov rdi, rax
call fxp_direct_form_2
mov rdx, QWORD PTR -128[rbp]
mov ecx, DWORD PTR -192[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
add DWORD PTR -192[rbp], 1
.L974:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -192[rbp], eax
jl .L975
mov DWORD PTR overflow_mode[rip], 1
mov edx, DWORD PTR X_SIZE_VALUE[rip]
mov rax, QWORD PTR -128[rbp]
mov esi, edx
mov rdi, rax
call fxp_verify_overflow_array
mov eax, 0
mov rsp, rbx
mov rsp, QWORD PTR -248[rbp]
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L977
call __stack_chk_fail@PLT
.L977:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE130:
.size verify_overflow, .-verify_overflow
.section .rodata
.align 8
.LC72:
.string "#matrix STATES -------------------------------"
.align 8
.LC73:
.string "#matrix OUTPUTS -------------------------------"
.align 8
.LC74:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_limit_cycle.h"
.text
.globl verify_limit_cycle_state_space
.type verify_limit_cycle_state_space, @function
verify_limit_cycle_state_space:
.LFB131:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 544
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -536[rbp], 0
jmp .L979
.L982:
mov DWORD PTR -540[rbp], 0
jmp .L980
.L981:
mov eax, DWORD PTR -540[rbp]
movsx rdx, eax
mov eax, DWORD PTR -536[rbp]
cdqe
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -272[rbp+rax*8], xmm0
mov eax, DWORD PTR -540[rbp]
movsx rdx, eax
mov eax, DWORD PTR -536[rbp]
cdqe
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -144[rbp+rax*8], xmm0
mov eax, DWORD PTR -540[rbp]
movsx rdx, eax
mov eax, DWORD PTR -536[rbp]
cdqe
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -528[rbp+rax*8], xmm0
mov eax, DWORD PTR -540[rbp]
movsx rdx, eax
mov eax, DWORD PTR -536[rbp]
cdqe
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -400[rbp+rax*8], xmm0
add DWORD PTR -540[rbp], 1
.L980:
cmp DWORD PTR -540[rbp], 3
jle .L981
add DWORD PTR -536[rbp], 1
.L979:
cmp DWORD PTR -536[rbp], 3
jle .L982
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller[rip+512]
lea r8, _controller[rip+256]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -144[rbp]
push rax
lea r9, _controller[rip+768]
lea r8, _controller[rip+384]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rdx, -144[rbp]
lea rax, -272[rbp]
lea r8, _controller[rip+640]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
mov DWORD PTR -544[rbp], 0
mov DWORD PTR -536[rbp], 1
jmp .L983
.L988:
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller[rip+512]
lea r8, _controller[rip]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
sub rsp, 8
lea rax, -144[rbp]
push rax
lea r9, _controller[rip+768]
lea r8, _controller[rip+128]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rdx, -144[rbp]
lea rax, -272[rbp]
lea r8, _controller[rip+512]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller[rip+512]
lea r8, _controller[rip+256]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -144[rbp]
push rax
lea r9, _controller[rip+768]
lea r8, _controller[rip+384]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rdx, -144[rbp]
lea rax, -272[rbp]
lea r8, _controller[rip+640]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
mov DWORD PTR -532[rbp], 0
jmp .L984
.L985:
mov eax, DWORD PTR -532[rbp]
cdqe
add rax, 16
sal rax, 5
mov rdx, rax
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -544[rbp]
movsx rdx, eax
mov eax, DWORD PTR -532[rbp]
cdqe
sal rax, 2
add rax, rdx
movsd QWORD PTR -528[rbp+rax*8], xmm0
add DWORD PTR -532[rbp], 1
.L984:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -532[rbp], eax
jl .L985
mov DWORD PTR -532[rbp], 0
jmp .L986
.L987:
mov eax, DWORD PTR -532[rbp]
cdqe
add rax, 20
sal rax, 5
mov rdx, rax
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -544[rbp]
movsx rdx, eax
mov eax, DWORD PTR -532[rbp]
cdqe
sal rax, 2
add rax, rdx
movsd QWORD PTR -528[rbp+rax*8], xmm0
add DWORD PTR -532[rbp], 1
.L986:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -532[rbp], eax
jl .L987
add DWORD PTR -544[rbp], 1
add DWORD PTR -536[rbp], 1
.L983:
cmp DWORD PTR -536[rbp], 0
js .L988
lea rdi, .LC72[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR nStates[rip]
mov ecx, eax
lea rax, -528[rbp]
mov edx, 0
mov esi, ecx
mov rdi, rax
call print_matrix
lea rdi, .LC73[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR nOutputs[rip]
mov ecx, eax
lea rax, -400[rbp]
mov edx, 0
mov esi, ecx
mov rdi, rax
call print_matrix
lea rcx, __PRETTY_FUNCTION__.8[rip]
mov edx, 93
lea rsi, .LC74[rip]
lea rdi, .LC49[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE131:
.size verify_limit_cycle_state_space, .-verify_limit_cycle_state_space
.section .rodata
.align 8
.LC75:
.string "X_SIZE must be at least 2 * ds.a_size"
.text
.globl verify_limit_cycle
.type verify_limit_cycle, @function
verify_limit_cycle:
.LFB132:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 472
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov QWORD PTR -424[rbp], rax
mov DWORD PTR overflow_mode[rip], 3
mov eax, DWORD PTR ds[rip+800]
add eax, eax
mov DWORD PTR -232[rbp], eax
lea rdi, .LC75[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -232[rbp], eax
setle al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -168[rbp], rax
movsx rax, edx
mov r12, rax
mov r13d, 0
movsx rax, edx
mov r14, rax
mov r15d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L991:
cmp rsp, rcx
je .L992
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L991
.L992:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L993
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L993:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -176[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -184[rbp], rax
movsx rax, edx
mov QWORD PTR -256[rbp], rax
mov QWORD PTR -248[rbp], 0
movsx rax, edx
mov QWORD PTR -272[rbp], rax
mov QWORD PTR -264[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L994:
cmp rsp, rcx
je .L995
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L994
.L995:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L996
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L996:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -192[rbp], rax
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -176[rbp]
mov rsi, rax
lea rdi, ds[rip]
call fxp_double_to_fxp_array
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -192[rbp]
mov rsi, rax
lea rdi, ds[rip+808]
call fxp_double_to_fxp_array
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -200[rbp], rax
movsx rax, edx
mov QWORD PTR -288[rbp], rax
mov QWORD PTR -280[rbp], 0
movsx rax, edx
mov QWORD PTR -304[rbp], rax
mov QWORD PTR -296[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L997:
cmp rsp, rcx
je .L998
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L997
.L998:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L999
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L999:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -208[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -216[rbp], rax
movsx rax, edx
mov QWORD PTR -320[rbp], rax
mov QWORD PTR -312[rbp], 0
movsx rax, edx
mov QWORD PTR -336[rbp], rax
mov QWORD PTR -328[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1000:
cmp rsp, rcx
je .L1001
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1000
.L1001:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1002
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1002:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -160[rbp], rax
mov rax, QWORD PTR impl[rip+16]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -152[rbp], rax
mov rax, QWORD PTR impl[rip+8]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -144[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -136[rbp], rax
movsx rax, edx
mov QWORD PTR -352[rbp], rax
mov QWORD PTR -344[rbp], 0
movsx rax, edx
mov QWORD PTR -368[rbp], rax
mov QWORD PTR -360[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1003:
cmp rsp, rcx
je .L1004
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1003
.L1004:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1005
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1005:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -128[rbp], rax
mov eax, 0
call nondet_int@PLT
mov DWORD PTR -224[rbp], eax
mov eax, DWORD PTR -224[rbp]
cdqe
cmp QWORD PTR -152[rbp], rax
jg .L1006
mov eax, DWORD PTR -224[rbp]
cdqe
cmp QWORD PTR -144[rbp], rax
jl .L1006
mov eax, 1
jmp .L1007
.L1006:
mov eax, 0
.L1007:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov DWORD PTR -228[rbp], 0
jmp .L1008
.L1009:
mov eax, DWORD PTR -224[rbp]
movsx rcx, eax
mov rdx, QWORD PTR -160[rbp]
mov eax, DWORD PTR -228[rbp]
cdqe
mov QWORD PTR [rdx+rax*8], rcx
mov rdx, QWORD PTR -208[rbp]
mov eax, DWORD PTR -228[rbp]
cdqe
mov QWORD PTR [rdx+rax*8], 0
add DWORD PTR -228[rbp], 1
.L1008:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -228[rbp], eax
jl .L1009
mov DWORD PTR -228[rbp], 0
jmp .L1010
.L1011:
mov eax, DWORD PTR -224[rbp]
movsx rcx, eax
mov rdx, QWORD PTR -128[rbp]
mov eax, DWORD PTR -228[rbp]
cdqe
mov QWORD PTR [rdx+rax*8], rcx
add DWORD PTR -228[rbp], 1
.L1010:
mov eax, DWORD PTR ds[rip+1608]
cmp DWORD PTR -228[rbp], eax
jl .L1011
mov DWORD PTR -220[rbp], 0
mov edx, DWORD PTR ds[rip+1608]
mov eax, DWORD PTR ds[rip+800]
cmp edx, eax
cmovge eax, edx
mov DWORD PTR -220[rbp], eax
mov edx, DWORD PTR ds[rip+800]
mov rax, rsp
mov rbx, rax
movsx rax, edx
sub rax, 1
mov QWORD PTR -120[rbp], rax
movsx rax, edx
mov QWORD PTR -384[rbp], rax
mov QWORD PTR -376[rbp], 0
movsx rax, edx
mov QWORD PTR -400[rbp], rax
mov QWORD PTR -392[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1012:
cmp rsp, rcx
je .L1013
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1012
.L1013:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1014
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1014:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -112[rbp], rax
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -104[rbp], rax
movsx rax, edx
mov QWORD PTR -416[rbp], rax
mov QWORD PTR -408[rbp], 0
movsx rax, edx
mov QWORD PTR -448[rbp], rax
mov QWORD PTR -440[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1015:
cmp rsp, rdx
je .L1016
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1015
.L1016:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1017
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1017:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -96[rbp], rax
mov eax, DWORD PTR -220[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -88[rbp], rdx
movsx rdx, eax
mov QWORD PTR -464[rbp], rdx
mov QWORD PTR -456[rbp], 0
movsx rdx, eax
mov QWORD PTR -480[rbp], rdx
mov QWORD PTR -472[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1018:
cmp rsp, rdx
je .L1019
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1018
.L1019:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1020
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1020:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov eax, DWORD PTR -220[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov QWORD PTR -496[rbp], rdx
mov QWORD PTR -488[rbp], 0
movsx rdx, eax
mov QWORD PTR -512[rbp], rdx
mov QWORD PTR -504[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1021:
cmp rsp, rdx
je .L1022
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1021
.L1022:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1023
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1023:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov DWORD PTR -228[rbp], 0
jmp .L1024
.L1027:
mov eax, 0
call nondet_int@PLT
movsx rcx, eax
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -228[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], rcx
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -228[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
cmp QWORD PTR -152[rbp], rax
jg .L1025
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -228[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
cmp QWORD PTR -144[rbp], rax
jl .L1025
mov eax, 1
jmp .L1026
.L1025:
mov eax, 0
.L1026:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -228[rbp]
movsx rdx, edx
mov rcx, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -228[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], rcx
add DWORD PTR -228[rbp], 1
.L1024:
mov eax, DWORD PTR -228[rbp]
cmp eax, DWORD PTR -220[rbp]
jl .L1027
mov DWORD PTR -228[rbp], 0
jmp .L1028
.L1029:
mov edx, DWORD PTR -220[rbp]
mov rax, QWORD PTR -80[rbp]
mov rsi, rax
mov edi, 0
call shiftR
mov r8d, DWORD PTR ds[rip+1608]
mov edi, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -160[rbp]
mov edx, DWORD PTR -228[rbp]
movsx rdx, edx
mov rsi, QWORD PTR [rax+rdx*8]
mov rcx, QWORD PTR -192[rbp]
mov rdx, QWORD PTR -176[rbp]
mov rax, QWORD PTR -80[rbp]
mov r9d, r8d
mov r8d, edi
mov rdi, rax
call fxp_direct_form_2
mov rdx, QWORD PTR -208[rbp]
mov ecx, DWORD PTR -228[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
add DWORD PTR -228[rbp], 1
.L1028:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -228[rbp], eax
jl .L1029
mov edx, DWORD PTR X_SIZE_VALUE[rip]
mov rax, QWORD PTR -208[rbp]
mov esi, edx
mov rdi, rax
call fxp_check_persistent_limit_cycle
mov eax, 0
mov rsp, rbx
mov rsp, QWORD PTR -424[rbp]
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L1031
call __stack_chk_fail@PLT
.L1031:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE132:
.size verify_limit_cycle, .-verify_limit_cycle
.globl verify_error
.type verify_error, @function
verify_error:
.LFB133:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 1352
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov QWORD PTR -1288[rbp], rax
mov DWORD PTR overflow_mode[rip], 2
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1000[rbp], rax
movsx rax, edx
mov rcx, rax
mov ebx, 0
movsx rax, edx
mov rsi, rax
mov edi, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1033:
cmp rsp, rcx
je .L1034
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1033
.L1034:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1035
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1035:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1008[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1016[rbp], rax
movsx rax, edx
mov r8, rax
mov r9d, 0
movsx rax, edx
mov r10, rax
mov r11d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1036:
cmp rsp, rcx
je .L1037
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1036
.L1037:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1038
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1038:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1024[rbp], rax
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -1008[rbp]
mov rsi, rax
lea rdi, ds[rip]
call fxp_double_to_fxp_array
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -1024[rbp]
mov rsi, rax
lea rdi, ds[rip+808]
call fxp_double_to_fxp_array
mov rax, QWORD PTR impl[rip+16]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -1032[rbp], rax
mov rax, QWORD PTR impl[rip+8]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -1040[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1048[rbp], rax
movsx rax, edx
mov r12, rax
mov r13d, 0
movsx rax, edx
mov r14, rax
mov r15d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1039:
cmp rsp, rcx
je .L1040
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1039
.L1040:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1041
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1041:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1056[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1064[rbp], rax
movsx rax, edx
mov QWORD PTR -1104[rbp], rax
mov QWORD PTR -1096[rbp], 0
movsx rax, edx
mov QWORD PTR -1120[rbp], rax
mov QWORD PTR -1112[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1042:
cmp rsp, rcx
je .L1043
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1042
.L1043:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1044
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1044:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1072[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1080[rbp], rax
movsx rax, edx
mov QWORD PTR -1136[rbp], rax
mov QWORD PTR -1128[rbp], 0
movsx rax, edx
mov QWORD PTR -1152[rbp], rax
mov QWORD PTR -1144[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1045:
cmp rsp, rcx
je .L1046
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1045
.L1046:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1047
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1047:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -992[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -984[rbp], rax
movsx rax, edx
mov QWORD PTR -1168[rbp], rax
mov QWORD PTR -1160[rbp], 0
movsx rax, edx
mov QWORD PTR -1184[rbp], rax
mov QWORD PTR -1176[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1048:
cmp rsp, rcx
je .L1049
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1048
.L1049:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1050
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1050:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -976[rbp], rax
mov DWORD PTR -1084[rbp], 0
mov edx, DWORD PTR ds[rip+1608]
mov eax, DWORD PTR ds[rip+800]
cmp edx, eax
cmovge eax, edx
mov DWORD PTR -1084[rbp], eax
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -968[rbp], rax
movsx rax, edx
mov QWORD PTR -1200[rbp], rax
mov QWORD PTR -1192[rbp], 0
movsx rax, edx
mov QWORD PTR -1216[rbp], rax
mov QWORD PTR -1208[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1051:
cmp rsp, rcx
je .L1052
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1051
.L1052:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1053
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1053:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -960[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -952[rbp], rax
movsx rax, edx
mov QWORD PTR -1232[rbp], rax
mov QWORD PTR -1224[rbp], 0
movsx rax, edx
mov QWORD PTR -1248[rbp], rax
mov QWORD PTR -1240[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1054:
cmp rsp, rcx
je .L1055
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1054
.L1055:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1056
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1056:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -944[rbp], rax
mov edx, DWORD PTR -1084[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -936[rbp], rax
movsx rax, edx
mov QWORD PTR -1264[rbp], rax
mov QWORD PTR -1256[rbp], 0
movsx rax, edx
mov QWORD PTR -1280[rbp], rax
mov QWORD PTR -1272[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1057:
cmp rsp, rcx
je .L1058
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1057
.L1058:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1059
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1059:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -928[rbp], rax
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -920[rbp], rax
movsx rax, edx
mov QWORD PTR -1312[rbp], rax
mov QWORD PTR -1304[rbp], 0
movsx rax, edx
mov QWORD PTR -1328[rbp], rax
mov QWORD PTR -1320[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1060:
cmp rsp, rdx
je .L1061
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1060
.L1061:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1062
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1062:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -912[rbp], rax
mov eax, DWORD PTR ds[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -904[rbp], rdx
movsx rdx, eax
mov QWORD PTR -1344[rbp], rdx
mov QWORD PTR -1336[rbp], 0
movsx rdx, eax
mov QWORD PTR -1360[rbp], rdx
mov QWORD PTR -1352[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1063:
cmp rsp, rdx
je .L1064
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1063
.L1064:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1065
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1065:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -896[rbp], rax
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -888[rbp], rdx
movsx rdx, eax
mov QWORD PTR -1376[rbp], rdx
mov QWORD PTR -1368[rbp], 0
movsx rdx, eax
mov QWORD PTR -1392[rbp], rdx
mov QWORD PTR -1384[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1066:
cmp rsp, rdx
je .L1067
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1066
.L1067:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1068
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1068:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -880[rbp], rax
mov DWORD PTR -1088[rbp], 0
jmp .L1069
.L1070:
mov rax, QWORD PTR -960[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
mov rax, QWORD PTR -912[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -1088[rbp], 1
.L1069:
mov eax, DWORD PTR ds[rip+800]
cmp DWORD PTR -1088[rbp], eax
jl .L1070
mov DWORD PTR -1088[rbp], 0
jmp .L1071
.L1072:
mov rax, QWORD PTR -944[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
mov rax, QWORD PTR -896[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -1088[rbp], 1
.L1071:
mov eax, DWORD PTR ds[rip+1608]
cmp DWORD PTR -1088[rbp], eax
jl .L1072
mov DWORD PTR -1088[rbp], 0
jmp .L1073
.L1074:
mov rax, QWORD PTR -928[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
mov rax, QWORD PTR -880[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -1088[rbp], 1
.L1073:
mov eax, DWORD PTR -1088[rbp]
cmp eax, DWORD PTR -1084[rbp]
jl .L1074
mov DWORD PTR -1088[rbp], 0
jmp .L1075
.L1078:
mov rax, QWORD PTR -1056[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
mov eax, 0
call nondet_int@PLT
movsx rcx, eax
mov rax, QWORD PTR -1072[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], rcx
mov rax, QWORD PTR -1072[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
cmp QWORD PTR -1032[rbp], rax
jg .L1076
mov rax, QWORD PTR -1072[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
cmp QWORD PTR -1040[rbp], rax
jl .L1076
mov eax, 1
jmp .L1077
.L1076:
mov eax, 0
.L1077:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov rax, QWORD PTR -992[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
mov rax, QWORD PTR -1072[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov rdx, QWORD PTR -976[rbp]
mov ecx, DWORD PTR -1088[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
add DWORD PTR -1088[rbp], 1
.L1075:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1078
mov DWORD PTR -1088[rbp], 0
jmp .L1079
.L1084:
mov ecx, DWORD PTR -1084[rbp]
mov rdx, QWORD PTR -928[rbp]
mov rax, QWORD PTR -880[rbp]
mov esi, 0
mov rdi, rax
pxor xmm0, xmm0
call shiftRboth
mov r8d, DWORD PTR ds[rip+1608]
mov edi, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -1072[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov rsi, QWORD PTR [rax+rdx*8]
mov rcx, QWORD PTR -1024[rbp]
mov rdx, QWORD PTR -1008[rbp]
mov rax, QWORD PTR -928[rbp]
mov r9d, r8d
mov r8d, edi
mov rdi, rax
call fxp_direct_form_2
mov rdx, QWORD PTR -1056[rbp]
mov ecx, DWORD PTR -1088[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
mov esi, DWORD PTR ds[rip+1608]
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -976[rbp]
mov ecx, DWORD PTR -1088[rbp]
movsx rcx, ecx
mov rdi, QWORD PTR [rax+rcx*8]
mov rax, QWORD PTR -880[rbp]
mov r8d, esi
mov ecx, edx
lea rdx, ds[rip+808]
lea rsi, ds[rip]
movq xmm0, rdi
mov rdi, rax
call double_direct_form_2
movq rax, xmm0
mov rdx, QWORD PTR -992[rbp]
mov ecx, DWORD PTR -1088[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
mov rax, QWORD PTR -992[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
movsd xmm2, QWORD PTR [rax+rdx*8]
movsd QWORD PTR -1104[rbp], xmm2
mov rax, QWORD PTR -1056[rbp]
mov edx, DWORD PTR -1088[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
mov rdi, rax
call fxp_to_double
movapd xmm1, xmm0
movsd xmm0, QWORD PTR -1104[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -872[rbp], xmm0
movsd xmm0, QWORD PTR impl[rip+48]
comisd xmm0, QWORD PTR -872[rbp]
jbe .L1080
movsd xmm0, QWORD PTR impl[rip+48]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm1, xmm0
movsd xmm0, QWORD PTR -872[rbp]
comisd xmm0, xmm1
jbe .L1080
mov eax, 1
jmp .L1083
.L1080:
mov eax, 0
.L1083:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
add DWORD PTR -1088[rbp], 1
.L1079:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1084
mov eax, 0
mov rsp, QWORD PTR -1288[rbp]
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L1086
call __stack_chk_fail@PLT
.L1086:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE133:
.size verify_error, .-verify_error
.section .rodata
.align 8
.LC76:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_zero_input_limit_cycle.h"
.align 8
.LC77:
.string "X_SIZE_VALUE >= Set_xsize_at_least_two_times_Na"
.text
.globl verify_zero_input_limit_cycle
.type verify_zero_input_limit_cycle, @function
verify_zero_input_limit_cycle:
.LFB134:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 472
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov QWORD PTR -440[rbp], rax
mov DWORD PTR overflow_mode[rip], 3
mov eax, DWORD PTR ds[rip+800]
add eax, eax
mov DWORD PTR -228[rbp], eax
lea rdi, .LC75[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -228[rbp], eax
jle .L1090
lea rcx, __PRETTY_FUNCTION__.7[rip]
mov edx, 23
lea rsi, .LC76[rip]
lea rdi, .LC77[rip]
call __assert_fail@PLT
.L1090:
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -168[rbp], rax
movsx rax, edx
mov r12, rax
mov r13d, 0
movsx rax, edx
mov r14, rax
mov r15d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1091:
cmp rsp, rcx
je .L1092
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1091
.L1092:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1093
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1093:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -176[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -184[rbp], rax
movsx rax, edx
mov QWORD PTR -256[rbp], rax
mov QWORD PTR -248[rbp], 0
movsx rax, edx
mov QWORD PTR -272[rbp], rax
mov QWORD PTR -264[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1094:
cmp rsp, rcx
je .L1095
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1094
.L1095:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1096
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1096:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -192[rbp], rax
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -176[rbp]
mov rsi, rax
lea rdi, ds[rip]
call fxp_double_to_fxp_array
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -192[rbp]
mov rsi, rax
lea rdi, ds[rip+808]
call fxp_double_to_fxp_array
mov rax, QWORD PTR impl[rip+16]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -200[rbp], rax
mov rax, QWORD PTR impl[rip+8]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -208[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -216[rbp], rax
movsx rax, edx
mov QWORD PTR -288[rbp], rax
mov QWORD PTR -280[rbp], 0
movsx rax, edx
mov QWORD PTR -304[rbp], rax
mov QWORD PTR -296[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1097:
cmp rsp, rcx
je .L1098
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1097
.L1098:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1099
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1099:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -160[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -152[rbp], rax
movsx rax, edx
mov QWORD PTR -320[rbp], rax
mov QWORD PTR -312[rbp], 0
movsx rax, edx
mov QWORD PTR -336[rbp], rax
mov QWORD PTR -328[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1100:
cmp rsp, rcx
je .L1101
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1100
.L1101:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1102
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1102:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -144[rbp], rax
mov DWORD PTR -224[rbp], 0
jmp .L1103
.L1104:
mov rdx, QWORD PTR -160[rbp]
mov eax, DWORD PTR -224[rbp]
cdqe
mov QWORD PTR [rdx+rax*8], 0
mov rdx, QWORD PTR -144[rbp]
mov eax, DWORD PTR -224[rbp]
cdqe
mov QWORD PTR [rdx+rax*8], 0
add DWORD PTR -224[rbp], 1
.L1103:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -224[rbp], eax
jl .L1104
mov DWORD PTR -220[rbp], 0
mov edx, DWORD PTR ds[rip+1608]
mov eax, DWORD PTR ds[rip+800]
cmp edx, eax
cmovge eax, edx
mov DWORD PTR -220[rbp], eax
mov edx, DWORD PTR ds[rip+800]
mov rax, rsp
mov rbx, rax
movsx rax, edx
sub rax, 1
mov QWORD PTR -136[rbp], rax
movsx rax, edx
mov QWORD PTR -352[rbp], rax
mov QWORD PTR -344[rbp], 0
movsx rax, edx
mov QWORD PTR -368[rbp], rax
mov QWORD PTR -360[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1105:
cmp rsp, rcx
je .L1106
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1105
.L1106:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1107
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1107:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -128[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -120[rbp], rax
movsx rax, edx
mov QWORD PTR -384[rbp], rax
mov QWORD PTR -376[rbp], 0
movsx rax, edx
mov QWORD PTR -400[rbp], rax
mov QWORD PTR -392[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1108:
cmp rsp, rcx
je .L1109
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1108
.L1109:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1110
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1110:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -112[rbp], rax
mov edx, DWORD PTR -220[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -104[rbp], rax
movsx rax, edx
mov QWORD PTR -416[rbp], rax
mov QWORD PTR -408[rbp], 0
movsx rax, edx
mov QWORD PTR -432[rbp], rax
mov QWORD PTR -424[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1111:
cmp rsp, rdx
je .L1112
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1111
.L1112:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1113
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1113:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -96[rbp], rax
mov eax, DWORD PTR ds[rip+800]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -88[rbp], rdx
movsx rdx, eax
mov QWORD PTR -464[rbp], rdx
mov QWORD PTR -456[rbp], 0
movsx rdx, eax
mov QWORD PTR -480[rbp], rdx
mov QWORD PTR -472[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1114:
cmp rsp, rdx
je .L1115
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1114
.L1115:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1116
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1116:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov eax, DWORD PTR -220[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov QWORD PTR -496[rbp], rdx
mov QWORD PTR -488[rbp], 0
movsx rdx, eax
mov QWORD PTR -512[rbp], rdx
mov QWORD PTR -504[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1117:
cmp rsp, rdx
je .L1118
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1117
.L1118:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1119
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1119:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov DWORD PTR -224[rbp], 0
jmp .L1120
.L1123:
mov eax, 0
call nondet_int@PLT
movsx rcx, eax
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -224[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], rcx
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -224[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
cmp QWORD PTR -200[rbp], rax
jg .L1121
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -224[rbp]
movsx rdx, edx
mov rax, QWORD PTR [rax+rdx*8]
cmp QWORD PTR -208[rbp], rax
jl .L1121
mov eax, 1
jmp .L1122
.L1121:
mov eax, 0
.L1122:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -224[rbp]
movsx rdx, edx
mov rcx, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -224[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], rcx
add DWORD PTR -224[rbp], 1
.L1120:
mov eax, DWORD PTR -224[rbp]
cmp eax, DWORD PTR -220[rbp]
jl .L1123
mov DWORD PTR -224[rbp], 0
jmp .L1124
.L1125:
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -224[rbp]
movsx rdx, edx
mov QWORD PTR [rax+rdx*8], 0
add DWORD PTR -224[rbp], 1
.L1124:
mov eax, DWORD PTR ds[rip+1608]
cmp DWORD PTR -224[rbp], eax
jl .L1125
mov DWORD PTR -224[rbp], 0
jmp .L1126
.L1127:
mov edx, DWORD PTR -220[rbp]
mov rax, QWORD PTR -96[rbp]
mov rsi, rax
mov edi, 0
call shiftR
mov r8d, DWORD PTR ds[rip+1608]
mov edi, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -144[rbp]
mov edx, DWORD PTR -224[rbp]
movsx rdx, edx
mov rsi, QWORD PTR [rax+rdx*8]
mov rcx, QWORD PTR -192[rbp]
mov rdx, QWORD PTR -176[rbp]
mov rax, QWORD PTR -96[rbp]
mov r9d, r8d
mov r8d, edi
mov rdi, rax
call fxp_direct_form_2
mov rdx, QWORD PTR -160[rbp]
mov ecx, DWORD PTR -224[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
add DWORD PTR -224[rbp], 1
.L1126:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -224[rbp], eax
jl .L1127
mov edx, DWORD PTR X_SIZE_VALUE[rip]
mov rax, QWORD PTR -160[rbp]
mov esi, edx
mov rdi, rax
call fxp_check_persistent_limit_cycle
mov eax, 0
mov rsp, rbx
mov rsp, QWORD PTR -440[rbp]
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L1129
call __stack_chk_fail@PLT
.L1129:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE134:
.size verify_zero_input_limit_cycle, .-verify_zero_input_limit_cycle
.globl generic_timer
.bss
.align 4
.type generic_timer, @object
.size generic_timer, 4
generic_timer:
.zero 4
.section .rodata
.align 8
.LC78:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_generic_timing.h"
.LC79:
.string "spent_time <= ds.sample_time"
.text
.globl verify_generic_timing
.type verify_generic_timing, @function
verify_generic_timing:
.LFB135:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r12
push rbx
sub rsp, 192
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 12, -40
.cfi_offset 3, -48
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
mov rax, rsp
mov r12, rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -120[rbp], rax
movsx rax, edx
mov rcx, rax
mov ebx, 0
movsx rax, edx
mov rsi, rax
mov edi, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1131:
cmp rsp, rcx
je .L1132
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1131
.L1132:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1133
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1133:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -128[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -136[rbp], rax
movsx rax, edx
mov r8, rax
mov r9d, 0
movsx rax, edx
mov r10, rax
mov r11d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1134:
cmp rsp, rcx
je .L1135
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1134
.L1135:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1136
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1136:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -112[rbp], rax
mov DWORD PTR -144[rbp], 0
jmp .L1137
.L1142:
mov rdx, QWORD PTR -128[rbp]
mov eax, DWORD PTR -144[rbp]
cdqe
pxor xmm0, xmm0
movsd QWORD PTR [rdx+rax*8], xmm0
mov eax, 0
call nondet_float@PLT
cvtss2sd xmm0, xmm0
mov rdx, QWORD PTR -112[rbp]
mov eax, DWORD PTR -144[rbp]
cdqe
movsd QWORD PTR [rdx+rax*8], xmm0
mov rdx, QWORD PTR -112[rbp]
mov eax, DWORD PTR -144[rbp]
cdqe
movsd xmm0, QWORD PTR [rdx+rax*8]
movsd xmm1, QWORD PTR impl[rip+16]
comisd xmm0, xmm1
jb .L1138
mov rdx, QWORD PTR -112[rbp]
mov eax, DWORD PTR -144[rbp]
cdqe
movsd xmm1, QWORD PTR [rdx+rax*8]
movsd xmm0, QWORD PTR impl[rip+8]
comisd xmm0, xmm1
jb .L1138
mov eax, 1
jmp .L1141
.L1138:
mov eax, 0
.L1141:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
add DWORD PTR -144[rbp], 1
.L1137:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -144[rbp], eax
jl .L1142
mov DWORD PTR -140[rbp], 0
mov edx, DWORD PTR ds[rip+1608]
mov eax, DWORD PTR ds[rip+800]
cmp edx, eax
cmovge eax, edx
mov DWORD PTR -140[rbp], eax
mov edx, DWORD PTR ds[rip+800]
mov rax, rsp
mov rbx, rax
movsx rax, edx
sub rax, 1
mov QWORD PTR -104[rbp], rax
movsx rax, edx
mov QWORD PTR -160[rbp], rax
mov QWORD PTR -152[rbp], 0
movsx rax, edx
mov QWORD PTR -176[rbp], rax
mov QWORD PTR -168[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1143:
cmp rsp, rdx
je .L1144
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1143
.L1144:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1145
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1145:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -96[rbp], rax
mov eax, DWORD PTR ds[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -88[rbp], rdx
movsx rdx, eax
mov QWORD PTR -192[rbp], rdx
mov QWORD PTR -184[rbp], 0
movsx rdx, eax
mov QWORD PTR -208[rbp], rdx
mov QWORD PTR -200[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1146:
cmp rsp, rdx
je .L1147
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1146
.L1147:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1148
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1148:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov eax, DWORD PTR -140[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov QWORD PTR -224[rbp], rdx
mov QWORD PTR -216[rbp], 0
movsx rdx, eax
mov r14, rdx
mov r15d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1149:
cmp rsp, rdx
je .L1150
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1149
.L1150:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1151
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1151:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov DWORD PTR -144[rbp], 0
jmp .L1152
.L1153:
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -144[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -144[rbp], 1
.L1152:
mov eax, DWORD PTR ds[rip+800]
cmp DWORD PTR -144[rbp], eax
jl .L1153
mov DWORD PTR -144[rbp], 0
jmp .L1154
.L1155:
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -144[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -144[rbp], 1
.L1154:
mov eax, DWORD PTR ds[rip+1608]
cmp DWORD PTR -144[rbp], eax
jl .L1155
mov DWORD PTR -144[rbp], 0
jmp .L1156
.L1157:
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -144[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -144[rbp], 1
.L1156:
mov eax, DWORD PTR -144[rbp]
cmp eax, DWORD PTR -140[rbp]
jl .L1157
mov eax, DWORD PTR hw[rip+44]
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+80]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR generic_timer[rip]
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
movsd QWORD PTR -56[rbp], xmm0
mov DWORD PTR -144[rbp], 0
jmp .L1158
.L1160:
mov eax, DWORD PTR hw[rip+48]
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+76]
add edx, eax
mov eax, DWORD PTR hw[rip+44]
add eax, eax
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov eax, DWORD PTR hw[rip+48]
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+132]
add edx, eax
mov eax, DWORD PTR hw[rip+104]
add edx, eax
mov eax, DWORD PTR hw[rip+128]
add edx, eax
mov eax, DWORD PTR generic_timer[rip]
add eax, edx
mov DWORD PTR generic_timer[rip], eax
mov edx, DWORD PTR -140[rbp]
mov rax, QWORD PTR -64[rbp]
mov esi, edx
mov rdi, rax
pxor xmm0, xmm0
call generic_timing_shift_r_double
mov esi, DWORD PTR ds[rip+1608]
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -112[rbp]
mov ecx, DWORD PTR -144[rbp]
movsx rcx, ecx
mov rdi, QWORD PTR [rax+rcx*8]
mov rax, QWORD PTR -64[rbp]
mov r8d, esi
mov ecx, edx
lea rdx, ds[rip+808]
lea rsi, ds[rip]
movq xmm0, rdi
mov rdi, rax
call generic_timing_double_direct_form_2
movq rax, xmm0
mov rdx, QWORD PTR -128[rbp]
mov ecx, DWORD PTR -144[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
mov eax, DWORD PTR generic_timer[rip]
pxor xmm1, xmm1
cvtsi2sd xmm1, eax
movsd xmm0, QWORD PTR hw[rip+16]
mulsd xmm0, xmm1
movsd QWORD PTR -48[rbp], xmm0
movsd xmm0, QWORD PTR ds[rip+1616]
comisd xmm0, QWORD PTR -48[rbp]
jnb .L1159
lea rcx, __PRETTY_FUNCTION__.6[rip]
mov edx, 89
lea rsi, .LC78[rip]
lea rdi, .LC79[rip]
call __assert_fail@PLT
.L1159:
movsd xmm0, QWORD PTR -56[rbp]
cvttsd2si eax, xmm0
mov DWORD PTR generic_timer[rip], eax
add DWORD PTR -144[rbp], 1
.L1158:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -144[rbp], eax
jl .L1160
mov eax, 0
mov rsp, rbx
mov rsp, r12
mov rbx, QWORD PTR -40[rbp]
sub rbx, QWORD PTR fs:40
je .L1162
call __stack_chk_fail@PLT
.L1162:
lea rsp, -32[rbp]
pop rbx
pop r12
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE135:
.size verify_generic_timing, .-verify_generic_timing
.globl verify_timing_msp_430
.type verify_timing_msp_430, @function
verify_timing_msp_430:
.LFB136:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r12
push rbx
sub rsp, 176
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 12, -40
.cfi_offset 3, -48
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
mov rax, rsp
mov r12, rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -104[rbp], rax
movsx rax, edx
mov rcx, rax
mov ebx, 0
movsx rax, edx
mov rsi, rax
mov edi, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1166:
cmp rsp, rcx
je .L1167
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1166
.L1167:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1168
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1168:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -112[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -120[rbp], rax
movsx rax, edx
mov r8, rax
mov r9d, 0
movsx rax, edx
mov r10, rax
mov r11d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1169:
cmp rsp, rcx
je .L1170
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1169
.L1170:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1171
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1171:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -96[rbp], rax
mov DWORD PTR -128[rbp], 0
jmp .L1172
.L1177:
mov rdx, QWORD PTR -112[rbp]
mov eax, DWORD PTR -128[rbp]
cdqe
pxor xmm0, xmm0
movsd QWORD PTR [rdx+rax*8], xmm0
mov eax, 0
call nondet_float@PLT
cvtss2sd xmm0, xmm0
mov rdx, QWORD PTR -96[rbp]
mov eax, DWORD PTR -128[rbp]
cdqe
movsd QWORD PTR [rdx+rax*8], xmm0
mov rdx, QWORD PTR -96[rbp]
mov eax, DWORD PTR -128[rbp]
cdqe
movsd xmm0, QWORD PTR [rdx+rax*8]
movsd xmm1, QWORD PTR impl[rip+16]
comisd xmm0, xmm1
jb .L1173
mov rdx, QWORD PTR -96[rbp]
mov eax, DWORD PTR -128[rbp]
cdqe
movsd xmm1, QWORD PTR [rdx+rax*8]
movsd xmm0, QWORD PTR impl[rip+8]
comisd xmm0, xmm1
jb .L1173
mov eax, 1
jmp .L1176
.L1173:
mov eax, 0
.L1176:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
add DWORD PTR -128[rbp], 1
.L1172:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -128[rbp], eax
jl .L1177
mov DWORD PTR -124[rbp], 0
mov edx, DWORD PTR ds[rip+1608]
mov eax, DWORD PTR ds[rip+800]
cmp edx, eax
cmovge eax, edx
mov DWORD PTR -124[rbp], eax
mov edx, DWORD PTR ds[rip+800]
mov rax, rsp
mov rbx, rax
movsx rax, edx
sub rax, 1
mov QWORD PTR -88[rbp], rax
movsx rax, edx
mov QWORD PTR -144[rbp], rax
mov QWORD PTR -136[rbp], 0
movsx rax, edx
mov QWORD PTR -160[rbp], rax
mov QWORD PTR -152[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1178:
cmp rsp, rdx
je .L1179
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1178
.L1179:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1180
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1180:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov eax, DWORD PTR ds[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov QWORD PTR -176[rbp], rdx
mov QWORD PTR -168[rbp], 0
movsx rdx, eax
mov QWORD PTR -192[rbp], rdx
mov QWORD PTR -184[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1181:
cmp rsp, rdx
je .L1182
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1181
.L1182:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1183
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1183:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov eax, DWORD PTR -124[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -56[rbp], rdx
movsx rdx, eax
mov QWORD PTR -208[rbp], rdx
mov QWORD PTR -200[rbp], 0
movsx rdx, eax
mov r14, rdx
mov r15d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1184:
cmp rsp, rdx
je .L1185
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1184
.L1185:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1186
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1186:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -48[rbp], rax
mov DWORD PTR -128[rbp], 0
jmp .L1187
.L1188:
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -128[rbp], 1
.L1187:
mov eax, DWORD PTR ds[rip+800]
cmp DWORD PTR -128[rbp], eax
jl .L1188
mov DWORD PTR -128[rbp], 0
jmp .L1189
.L1190:
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -128[rbp], 1
.L1189:
mov eax, DWORD PTR ds[rip+1608]
cmp DWORD PTR -128[rbp], eax
jl .L1190
mov DWORD PTR -128[rbp], 0
jmp .L1191
.L1192:
mov rax, QWORD PTR -48[rbp]
mov edx, DWORD PTR -128[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -128[rbp], 1
.L1191:
mov eax, DWORD PTR -128[rbp]
cmp eax, DWORD PTR -124[rbp]
jl .L1192
mov DWORD PTR -128[rbp], 0
jmp .L1193
.L1194:
mov edx, DWORD PTR -124[rbp]
mov rax, QWORD PTR -48[rbp]
mov rsi, rax
mov edi, 0
call shiftR
mov esi, DWORD PTR ds[rip+1608]
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -96[rbp]
mov ecx, DWORD PTR -128[rbp]
movsx rcx, ecx
mov rdi, QWORD PTR [rax+rcx*8]
mov rax, QWORD PTR -48[rbp]
mov r8d, esi
mov ecx, edx
lea rdx, ds[rip+808]
lea rsi, ds[rip]
movq xmm0, rdi
mov rdi, rax
call double_direct_form_2_MSP430
movq rax, xmm0
mov rdx, QWORD PTR -112[rbp]
mov ecx, DWORD PTR -128[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
add DWORD PTR -128[rbp], 1
.L1193:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -128[rbp], eax
jl .L1194
mov eax, 0
mov rsp, rbx
mov rsp, r12
mov rbx, QWORD PTR -40[rbp]
sub rbx, QWORD PTR fs:40
je .L1196
call __stack_chk_fail@PLT
.L1196:
lea rsp, -32[rbp]
pop rbx
pop r12
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE136:
.size verify_timing_msp_430, .-verify_timing_msp_430
.section .rodata
.align 8
.LC80:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_stability.h"
.align 8
.LC81:
.string "check_stability(_a, ds.a_size)"
.text
.globl verify_stability
.type verify_stability, @function
verify_stability:
.LFB137:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 56
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
mov DWORD PTR overflow_mode[rip], 0
mov eax, DWORD PTR ds[rip+800]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -88[rbp], rdx
movsx rdx, eax
mov r8, rdx
mov r9d, 0
movsx rdx, eax
mov rsi, rdx
mov edi, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1200:
cmp rsp, rdx
je .L1201
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1200
.L1201:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1202
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1202:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -80[rbp]
mov rsi, rax
lea rdi, ds[rip]
call fxp_double_to_fxp_array
mov eax, DWORD PTR ds[rip+800]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov r14, rdx
mov r15d, 0
movsx rdx, eax
mov r12, rdx
mov r13d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1203:
cmp rsp, rdx
je .L1204
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1203
.L1204:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1205
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1205:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov edx, DWORD PTR ds[rip+800]
mov rcx, QWORD PTR -80[rbp]
mov rax, QWORD PTR -64[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
mov edx, DWORD PTR ds[rip+800]
mov rax, QWORD PTR -64[rbp]
mov esi, edx
mov rdi, rax
call check_stability
test eax, eax
jne .L1206
lea rcx, __PRETTY_FUNCTION__.5[rip]
mov edx, 37
lea rsi, .LC80[rip]
lea rdi, .LC81[rip]
call __assert_fail@PLT
.L1206:
mov eax, 0
mov rsp, rbx
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L1208
call __stack_chk_fail@PLT
.L1208:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE137:
.size verify_stability, .-verify_stability
.globl verify_minimum_phase
.type verify_minimum_phase, @function
verify_minimum_phase:
.LFB138:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 56
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
mov DWORD PTR overflow_mode[rip], 0
mov eax, DWORD PTR ds[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -88[rbp], rdx
movsx rdx, eax
mov r8, rdx
mov r9d, 0
movsx rdx, eax
mov rsi, rdx
mov edi, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1210:
cmp rsp, rdx
je .L1211
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1210
.L1211:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1212
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1212:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -80[rbp]
mov rsi, rax
lea rdi, ds[rip+808]
call fxp_double_to_fxp_array
mov eax, DWORD PTR ds[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov r14, rdx
mov r15d, 0
movsx rdx, eax
mov r12, rdx
mov r13d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1213:
cmp rsp, rdx
je .L1214
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1213
.L1214:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1215
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1215:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
mov rcx, QWORD PTR -80[rbp]
mov rax, QWORD PTR -64[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -64[rbp]
mov esi, edx
mov rdi, rax
call check_stability
test eax, eax
setne al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
mov eax, 0
mov rsp, rbx
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L1217
call __stack_chk_fail@PLT
.L1217:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE138:
.size verify_minimum_phase, .-verify_minimum_phase
.section .rodata
.align 8
.LC82:
.string "Verifying stability for closedloop function"
.text
.globl verify_stability_closedloop_using_dslib
.type verify_stability_closedloop_using_dslib, @function
verify_stability_closedloop_using_dslib:
.LFB139:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r12
push rbx
sub rsp, 1024
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 12, -40
.cfi_offset 3, -48
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
mov rax, rsp
mov r12, rax
lea rax, controller[rip+808]
mov QWORD PTR -912[rbp], rax
mov eax, DWORD PTR controller[rip+1608]
mov DWORD PTR -964[rbp], eax
lea rax, controller[rip]
mov QWORD PTR -920[rbp], rax
mov eax, DWORD PTR controller[rip+800]
mov DWORD PTR -968[rbp], eax
mov edx, DWORD PTR controller[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -928[rbp], rax
movsx rax, edx
mov rcx, rax
mov ebx, 0
movsx rax, edx
mov rsi, rax
mov edi, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1219:
cmp rsp, rcx
je .L1220
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1219
.L1220:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1221
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1221:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -936[rbp], rax
mov eax, DWORD PTR controller[rip+1608]
mov rsi, QWORD PTR -936[rbp]
mov rcx, QWORD PTR -912[rbp]
mov edx, eax
mov rdi, rcx
call fxp_double_to_fxp_array
mov edx, DWORD PTR controller[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -944[rbp], rax
movsx rax, edx
mov QWORD PTR -992[rbp], rax
mov QWORD PTR -984[rbp], 0
movsx rax, edx
mov QWORD PTR -1008[rbp], rax
mov QWORD PTR -1000[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1222:
cmp rsp, rdx
je .L1223
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1222
.L1223:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1224
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1224:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -904[rbp], rax
mov edx, DWORD PTR controller[rip+800]
mov rcx, QWORD PTR -904[rbp]
mov rax, QWORD PTR -920[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_double_to_fxp_array
mov eax, DWORD PTR controller[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -896[rbp], rdx
movsx rdx, eax
mov QWORD PTR -1024[rbp], rdx
mov QWORD PTR -1016[rbp], 0
movsx rdx, eax
mov QWORD PTR -1040[rbp], rdx
mov QWORD PTR -1032[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1225:
cmp rsp, rdx
je .L1226
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1225
.L1226:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1227
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1227:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -888[rbp], rax
mov edx, DWORD PTR controller[rip+1608]
mov rcx, QWORD PTR -936[rbp]
mov rax, QWORD PTR -888[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
mov eax, DWORD PTR controller[rip+800]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -880[rbp], rdx
movsx rdx, eax
mov QWORD PTR -1056[rbp], rdx
mov QWORD PTR -1048[rbp], 0
movsx rdx, eax
mov r14, rdx
mov r15d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1228:
cmp rsp, rdx
je .L1229
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1228
.L1229:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1230
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1230:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -872[rbp], rax
mov edx, DWORD PTR controller[rip+800]
mov rcx, QWORD PTR -904[rbp]
mov rax, QWORD PTR -872[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
lea rax, plant[rip+808]
mov QWORD PTR -864[rbp], rax
mov eax, DWORD PTR plant[rip+1608]
mov DWORD PTR -960[rbp], eax
lea rax, plant[rip]
mov QWORD PTR -856[rbp], rax
mov eax, DWORD PTR plant[rip+800]
mov DWORD PTR -956[rbp], eax
mov edx, DWORD PTR controller[rip+1608]
mov eax, DWORD PTR plant[rip+1608]
add eax, edx
sub eax, 1
mov DWORD PTR -952[rbp], eax
mov edx, DWORD PTR controller[rip+800]
mov eax, DWORD PTR plant[rip+800]
add eax, edx
sub eax, 1
mov DWORD PTR -948[rbp], eax
lea rdi, .LC82[rip]
call puts@PLT
mov r8d, DWORD PTR -956[rbp]
mov rdi, QWORD PTR -856[rbp]
mov ecx, DWORD PTR -960[rbp]
mov rdx, QWORD PTR -864[rbp]
mov esi, DWORD PTR -948[rbp]
lea rax, -848[rbp]
mov r9d, r8d
mov r8, rdi
mov rdi, rax
call check_stability_closedloop
test eax, eax
setne al
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
mov eax, 0
mov rsp, r12
mov rbx, QWORD PTR -40[rbp]
sub rbx, QWORD PTR fs:40
je .L1232
call __stack_chk_fail@PLT
.L1232:
lea rsp, -32[rbp]
pop rbx
pop r12
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE139:
.size verify_stability_closedloop_using_dslib, .-verify_stability_closedloop_using_dslib
.globl verify_limit_cycle_closed_loop
.type verify_limit_cycle_closed_loop, @function
verify_limit_cycle_closed_loop:
.LFB140:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 2184
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov QWORD PTR -2136[rbp], rax
mov DWORD PTR overflow_mode[rip], 3
lea rax, controller[rip+808]
mov QWORD PTR -1800[rbp], rax
mov eax, DWORD PTR controller[rip+1608]
mov DWORD PTR -1908[rbp], eax
lea rax, controller[rip]
mov QWORD PTR -1808[rbp], rax
mov eax, DWORD PTR controller[rip+800]
mov DWORD PTR -1912[rbp], eax
mov edx, DWORD PTR controller[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1816[rbp], rax
movsx rax, edx
mov rcx, rax
mov ebx, 0
movsx rax, edx
mov rsi, rax
mov edi, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1234:
cmp rsp, rcx
je .L1235
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1234
.L1235:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1236
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1236:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1824[rbp], rax
mov edx, DWORD PTR controller[rip+1608]
mov rcx, QWORD PTR -1824[rbp]
mov rax, QWORD PTR -1800[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_double_to_fxp_array
mov edx, DWORD PTR controller[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1832[rbp], rax
movsx rax, edx
mov r12, rax
mov r13d, 0
movsx rax, edx
mov r14, rax
mov r15d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1237:
cmp rsp, rcx
je .L1238
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1237
.L1238:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1239
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1239:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1840[rbp], rax
mov edx, DWORD PTR controller[rip+800]
mov rcx, QWORD PTR -1840[rbp]
mov rax, QWORD PTR -1808[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_double_to_fxp_array
mov edx, DWORD PTR controller[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1848[rbp], rax
movsx rax, edx
mov QWORD PTR -1936[rbp], rax
mov QWORD PTR -1928[rbp], 0
movsx rax, edx
mov QWORD PTR -1952[rbp], rax
mov QWORD PTR -1944[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1240:
cmp rsp, rcx
je .L1241
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1240
.L1241:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1242
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1242:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1856[rbp], rax
mov edx, DWORD PTR controller[rip+1608]
mov rcx, QWORD PTR -1824[rbp]
mov rax, QWORD PTR -1856[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
mov edx, DWORD PTR controller[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1864[rbp], rax
movsx rax, edx
mov QWORD PTR -1968[rbp], rax
mov QWORD PTR -1960[rbp], 0
movsx rax, edx
mov QWORD PTR -1984[rbp], rax
mov QWORD PTR -1976[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1243:
cmp rsp, rcx
je .L1244
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1243
.L1244:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1245
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1245:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1872[rbp], rax
mov edx, DWORD PTR controller[rip+800]
mov rcx, QWORD PTR -1840[rbp]
mov rax, QWORD PTR -1872[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
lea rax, plant[rip+808]
mov QWORD PTR -1880[rbp], rax
mov eax, DWORD PTR plant[rip+1608]
mov DWORD PTR -1900[rbp], eax
lea rax, plant[rip]
mov QWORD PTR -1792[rbp], rax
mov eax, DWORD PTR plant[rip+800]
mov DWORD PTR -1896[rbp], eax
mov edx, DWORD PTR controller[rip+1608]
mov eax, DWORD PTR plant[rip+1608]
add eax, edx
sub eax, 1
mov DWORD PTR -1892[rbp], eax
mov edx, DWORD PTR controller[rip+800]
mov eax, DWORD PTR plant[rip+800]
add eax, edx
sub eax, 1
mov DWORD PTR -1888[rbp], eax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1784[rbp], rax
movsx rax, edx
mov QWORD PTR -2000[rbp], rax
mov QWORD PTR -1992[rbp], 0
movsx rax, edx
mov QWORD PTR -2016[rbp], rax
mov QWORD PTR -2008[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1246:
cmp rsp, rcx
je .L1247
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1246
.L1247:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1248
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1248:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1776[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1768[rbp], rax
movsx rax, edx
mov QWORD PTR -2032[rbp], rax
mov QWORD PTR -2024[rbp], 0
movsx rax, edx
mov QWORD PTR -2048[rbp], rax
mov QWORD PTR -2040[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1249:
cmp rsp, rcx
je .L1250
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1249
.L1250:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1251
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1251:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1760[rbp], rax
mov edx, DWORD PTR -1892[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1752[rbp], rax
movsx rax, edx
mov QWORD PTR -2064[rbp], rax
mov QWORD PTR -2056[rbp], 0
movsx rax, edx
mov QWORD PTR -2080[rbp], rax
mov QWORD PTR -2072[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1252:
cmp rsp, rcx
je .L1253
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1252
.L1253:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1254
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1254:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1744[rbp], rax
mov eax, 0
call nondet_double@PLT
movq rax, xmm0
mov QWORD PTR -1736[rbp], rax
movsd xmm1, QWORD PTR impl[rip+16]
movsd xmm0, QWORD PTR -1736[rbp]
comisd xmm0, xmm1
jb .L1255
movsd xmm0, QWORD PTR impl[rip+8]
comisd xmm0, QWORD PTR -1736[rbp]
jb .L1255
mov eax, 1
jmp .L1258
.L1255:
mov eax, 0
.L1258:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov DWORD PTR -1904[rbp], 0
jmp .L1259
.L1260:
mov rdx, QWORD PTR -1760[rbp]
mov eax, DWORD PTR -1904[rbp]
cdqe
movsd xmm0, QWORD PTR -1736[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
mov rdx, QWORD PTR -1776[rbp]
mov eax, DWORD PTR -1904[rbp]
cdqe
pxor xmm0, xmm0
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -1904[rbp], 1
.L1259:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -1904[rbp], eax
jl .L1260
mov DWORD PTR -1904[rbp], 0
jmp .L1261
.L1262:
mov rdx, QWORD PTR -1744[rbp]
mov eax, DWORD PTR -1904[rbp]
cdqe
movsd xmm0, QWORD PTR -1736[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -1904[rbp], 1
.L1261:
mov eax, DWORD PTR -1904[rbp]
cmp eax, DWORD PTR -1892[rbp]
jl .L1262
mov edx, DWORD PTR -1888[rbp]
mov rax, rsp
mov rbx, rax
movsx rax, edx
sub rax, 1
mov QWORD PTR -1728[rbp], rax
movsx rax, edx
mov QWORD PTR -2096[rbp], rax
mov QWORD PTR -2088[rbp], 0
movsx rax, edx
mov QWORD PTR -2112[rbp], rax
mov QWORD PTR -2104[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1263:
cmp rsp, rcx
je .L1264
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1263
.L1264:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1265
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1265:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1720[rbp], rax
mov edx, DWORD PTR -1888[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -1712[rbp], rax
movsx rax, edx
mov QWORD PTR -2128[rbp], rax
mov QWORD PTR -2120[rbp], 0
movsx rax, edx
mov QWORD PTR -2160[rbp], rax
mov QWORD PTR -2152[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1266:
cmp rsp, rdx
je .L1267
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1266
.L1267:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1268
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1268:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1704[rbp], rax
mov eax, DWORD PTR -1888[rbp]
cmp DWORD PTR -1892[rbp], eax
cmovge eax, DWORD PTR -1892[rbp]
mov DWORD PTR -1884[rbp], eax
mov eax, DWORD PTR -1884[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -1696[rbp], rdx
movsx rdx, eax
mov QWORD PTR -2176[rbp], rdx
mov QWORD PTR -2168[rbp], 0
movsx rdx, eax
mov QWORD PTR -2192[rbp], rdx
mov QWORD PTR -2184[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1269:
cmp rsp, rdx
je .L1270
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1269
.L1270:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1271
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1271:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1688[rbp], rax
mov eax, DWORD PTR -1884[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -1680[rbp], rdx
movsx rdx, eax
mov QWORD PTR -2208[rbp], rdx
mov QWORD PTR -2200[rbp], 0
movsx rdx, eax
mov QWORD PTR -2224[rbp], rdx
mov QWORD PTR -2216[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1272:
cmp rsp, rdx
je .L1273
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1272
.L1273:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1274
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1274:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -1672[rbp], rax
mov DWORD PTR -1904[rbp], 0
jmp .L1275
.L1280:
mov eax, 0
call nondet_int@PLT
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov rax, QWORD PTR -1688[rbp]
mov edx, DWORD PTR -1904[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
mov rax, QWORD PTR -1688[rbp]
mov edx, DWORD PTR -1904[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
movsd xmm1, QWORD PTR impl[rip+16]
comisd xmm0, xmm1
jb .L1276
mov rax, QWORD PTR -1688[rbp]
mov edx, DWORD PTR -1904[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
movsd xmm0, QWORD PTR impl[rip+8]
comisd xmm0, xmm1
jb .L1276
mov eax, 1
jmp .L1279
.L1276:
mov eax, 0
.L1279:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov rax, QWORD PTR -1688[rbp]
mov edx, DWORD PTR -1904[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -1672[rbp]
mov edx, DWORD PTR -1904[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -1904[rbp], 1
.L1275:
mov eax, DWORD PTR -1904[rbp]
cmp eax, DWORD PTR -1884[rbp]
jl .L1280
mov DWORD PTR -1904[rbp], 0
jmp .L1281
.L1282:
mov edx, DWORD PTR -1884[rbp]
mov rax, QWORD PTR -1688[rbp]
mov esi, edx
mov rdi, rax
pxor xmm0, xmm0
call shiftRDdouble
mov rax, QWORD PTR -1760[rbp]
mov edx, DWORD PTR -1904[rbp]
movsx rdx, edx
mov rdi, QWORD PTR [rax+rdx*8]
mov r8d, DWORD PTR -1892[rbp]
mov ecx, DWORD PTR -1888[rbp]
lea rdx, -1664[rbp]
lea rsi, -864[rbp]
mov rax, QWORD PTR -1688[rbp]
movq xmm0, rdi
mov rdi, rax
call double_direct_form_2
movq rax, xmm0
mov rdx, QWORD PTR -1776[rbp]
mov ecx, DWORD PTR -1904[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
add DWORD PTR -1904[rbp], 1
.L1281:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -1904[rbp], eax
jl .L1282
mov edx, DWORD PTR X_SIZE_VALUE[rip]
mov rax, QWORD PTR -1776[rbp]
mov esi, edx
mov rdi, rax
call double_check_persistent_limit_cycle
mov eax, 0
mov rsp, rbx
mov rsp, QWORD PTR -2136[rbp]
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L1284
call __stack_chk_fail@PLT
.L1284:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE140:
.size verify_limit_cycle_closed_loop, .-verify_limit_cycle_closed_loop
.globl verify_error_closedloop
.type verify_error_closedloop, @function
verify_error_closedloop:
.LFB141:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 4096
or QWORD PTR [rsp], 0
sub rsp, 72
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov QWORD PTR -4120[rbp], rax
mov DWORD PTR overflow_mode[rip], 3
lea rax, controller[rip+808]
mov QWORD PTR -3456[rbp], rax
mov eax, DWORD PTR controller[rip+1608]
mov DWORD PTR -3628[rbp], eax
lea rax, controller[rip]
mov QWORD PTR -3464[rbp], rax
mov eax, DWORD PTR controller[rip+800]
mov DWORD PTR -3632[rbp], eax
mov edx, DWORD PTR controller[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3472[rbp], rax
movsx rax, edx
mov rcx, rax
mov ebx, 0
movsx rax, edx
mov rsi, rax
mov edi, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1290:
cmp rsp, rcx
je .L1291
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1290
.L1291:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1292
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1292:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3480[rbp], rax
mov edx, DWORD PTR controller[rip+1608]
mov rcx, QWORD PTR -3480[rbp]
mov rax, QWORD PTR -3456[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_double_to_fxp_array
mov edx, DWORD PTR controller[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3488[rbp], rax
movsx rax, edx
mov r12, rax
mov r13d, 0
movsx rax, edx
mov r14, rax
mov r15d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1293:
cmp rsp, rcx
je .L1294
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1293
.L1294:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1295
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1295:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3496[rbp], rax
mov edx, DWORD PTR controller[rip+800]
mov rcx, QWORD PTR -3496[rbp]
mov rax, QWORD PTR -3464[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_double_to_fxp_array
mov edx, DWORD PTR controller[rip+1608]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3504[rbp], rax
movsx rax, edx
mov QWORD PTR -3664[rbp], rax
mov QWORD PTR -3656[rbp], 0
movsx rax, edx
mov QWORD PTR -3680[rbp], rax
mov QWORD PTR -3672[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1296:
cmp rsp, rcx
je .L1297
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1296
.L1297:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1298
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1298:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3512[rbp], rax
mov edx, DWORD PTR controller[rip+1608]
mov rcx, QWORD PTR -3480[rbp]
mov rax, QWORD PTR -3512[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
mov edx, DWORD PTR controller[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3520[rbp], rax
movsx rax, edx
mov QWORD PTR -3696[rbp], rax
mov QWORD PTR -3688[rbp], 0
movsx rax, edx
mov QWORD PTR -3712[rbp], rax
mov QWORD PTR -3704[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1299:
cmp rsp, rcx
je .L1300
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1299
.L1300:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1301
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1301:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3528[rbp], rax
mov edx, DWORD PTR controller[rip+800]
mov rcx, QWORD PTR -3496[rbp]
mov rax, QWORD PTR -3528[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
lea rax, plant[rip+808]
mov QWORD PTR -3536[rbp], rax
mov eax, DWORD PTR plant[rip+1608]
mov DWORD PTR -3636[rbp], eax
lea rax, plant[rip]
mov QWORD PTR -3544[rbp], rax
mov eax, DWORD PTR plant[rip+800]
mov DWORD PTR -3640[rbp], eax
mov edx, DWORD PTR controller[rip+1608]
mov eax, DWORD PTR plant[rip+1608]
add eax, edx
sub eax, 1
mov DWORD PTR -3644[rbp], eax
mov edx, DWORD PTR controller[rip+800]
mov eax, DWORD PTR plant[rip+800]
add eax, edx
sub eax, 1
mov DWORD PTR -3648[rbp], eax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3552[rbp], rax
movsx rax, edx
mov QWORD PTR -3728[rbp], rax
mov QWORD PTR -3720[rbp], 0
movsx rax, edx
mov QWORD PTR -3744[rbp], rax
mov QWORD PTR -3736[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1302:
cmp rsp, rcx
je .L1303
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1302
.L1303:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1304
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1304:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3560[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3568[rbp], rax
movsx rax, edx
mov QWORD PTR -3760[rbp], rax
mov QWORD PTR -3752[rbp], 0
movsx rax, edx
mov QWORD PTR -3776[rbp], rax
mov QWORD PTR -3768[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1305:
cmp rsp, rcx
je .L1306
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1305
.L1306:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1307
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1307:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3576[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3584[rbp], rax
movsx rax, edx
mov QWORD PTR -3792[rbp], rax
mov QWORD PTR -3784[rbp], 0
movsx rax, edx
mov QWORD PTR -3808[rbp], rax
mov QWORD PTR -3800[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1308:
cmp rsp, rcx
je .L1309
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1308
.L1309:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1310
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1310:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3592[rbp], rax
mov edx, DWORD PTR X_SIZE_VALUE[rip]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3600[rbp], rax
movsx rax, edx
mov QWORD PTR -3824[rbp], rax
mov QWORD PTR -3816[rbp], 0
movsx rax, edx
mov QWORD PTR -3840[rbp], rax
mov QWORD PTR -3832[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1311:
cmp rsp, rcx
je .L1312
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1311
.L1312:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1313
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1313:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3608[rbp], rax
mov edx, DWORD PTR -3644[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3616[rbp], rax
movsx rax, edx
mov QWORD PTR -3856[rbp], rax
mov QWORD PTR -3848[rbp], 0
movsx rax, edx
mov QWORD PTR -3872[rbp], rax
mov QWORD PTR -3864[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1314:
cmp rsp, rcx
je .L1315
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1314
.L1315:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1316
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1316:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3448[rbp], rax
mov edx, DWORD PTR -3644[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3440[rbp], rax
movsx rax, edx
mov QWORD PTR -3888[rbp], rax
mov QWORD PTR -3880[rbp], 0
movsx rax, edx
mov QWORD PTR -3904[rbp], rax
mov QWORD PTR -3896[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1317:
cmp rsp, rcx
je .L1318
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1317
.L1318:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1319
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1319:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3432[rbp], rax
mov edx, DWORD PTR -3644[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3424[rbp], rax
movsx rax, edx
mov QWORD PTR -3920[rbp], rax
mov QWORD PTR -3912[rbp], 0
movsx rax, edx
mov QWORD PTR -3936[rbp], rax
mov QWORD PTR -3928[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1320:
cmp rsp, rcx
je .L1321
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1320
.L1321:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1322
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1322:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3416[rbp], rax
mov eax, 0
call nondet_double@PLT
movq rax, xmm0
mov QWORD PTR -3408[rbp], rax
movsd xmm1, QWORD PTR impl[rip+16]
movsd xmm0, QWORD PTR -3408[rbp]
comisd xmm0, xmm1
jb .L1323
movsd xmm0, QWORD PTR impl[rip+8]
comisd xmm0, QWORD PTR -3408[rbp]
jb .L1323
mov eax, 1
jmp .L1326
.L1323:
mov eax, 0
.L1326:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov DWORD PTR -3624[rbp], 0
jmp .L1327
.L1328:
mov rdx, QWORD PTR -3592[rbp]
mov eax, DWORD PTR -3624[rbp]
cdqe
movsd xmm0, QWORD PTR -3408[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
mov rdx, QWORD PTR -3608[rbp]
mov eax, DWORD PTR -3624[rbp]
cdqe
movsd xmm0, QWORD PTR -3408[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
mov rdx, QWORD PTR -3560[rbp]
mov eax, DWORD PTR -3624[rbp]
cdqe
pxor xmm0, xmm0
movsd QWORD PTR [rdx+rax*8], xmm0
mov rdx, QWORD PTR -3576[rbp]
mov eax, DWORD PTR -3624[rbp]
cdqe
pxor xmm0, xmm0
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -3624[rbp], 1
.L1327:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -3624[rbp], eax
jl .L1328
mov DWORD PTR -3624[rbp], 0
jmp .L1329
.L1330:
mov rdx, QWORD PTR -3448[rbp]
mov eax, DWORD PTR -3624[rbp]
cdqe
movsd xmm0, QWORD PTR -3408[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
mov rdx, QWORD PTR -3432[rbp]
mov eax, DWORD PTR -3624[rbp]
cdqe
movsd xmm0, QWORD PTR -3408[rbp]
movsd QWORD PTR [rdx+rax*8], xmm0
add DWORD PTR -3624[rbp], 1
.L1329:
mov eax, DWORD PTR -3624[rbp]
cmp eax, DWORD PTR -3644[rbp]
jl .L1330
mov edx, DWORD PTR -3648[rbp]
mov rax, rsp
mov rbx, rax
movsx rax, edx
sub rax, 1
mov QWORD PTR -3400[rbp], rax
movsx rax, edx
mov QWORD PTR -3952[rbp], rax
mov QWORD PTR -3944[rbp], 0
movsx rax, edx
mov QWORD PTR -3968[rbp], rax
mov QWORD PTR -3960[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1331:
cmp rsp, rcx
je .L1332
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1331
.L1332:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1333
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1333:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3392[rbp], rax
mov edx, DWORD PTR -3648[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3384[rbp], rax
movsx rax, edx
mov QWORD PTR -3984[rbp], rax
mov QWORD PTR -3976[rbp], 0
movsx rax, edx
mov QWORD PTR -4000[rbp], rax
mov QWORD PTR -3992[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1334:
cmp rsp, rcx
je .L1335
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1334
.L1335:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1336
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1336:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3376[rbp], rax
mov edx, DWORD PTR -3648[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3368[rbp], rax
movsx rax, edx
mov QWORD PTR -4016[rbp], rax
mov QWORD PTR -4008[rbp], 0
movsx rax, edx
mov QWORD PTR -4032[rbp], rax
mov QWORD PTR -4024[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1337:
cmp rsp, rcx
je .L1338
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1337
.L1338:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1339
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1339:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3360[rbp], rax
mov edx, DWORD PTR -3648[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3352[rbp], rax
movsx rax, edx
mov QWORD PTR -4048[rbp], rax
mov QWORD PTR -4040[rbp], 0
movsx rax, edx
mov QWORD PTR -4064[rbp], rax
mov QWORD PTR -4056[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1340:
cmp rsp, rcx
je .L1341
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1340
.L1341:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1342
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1342:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3344[rbp], rax
mov eax, DWORD PTR -3648[rbp]
cmp DWORD PTR -3644[rbp], eax
cmovge eax, DWORD PTR -3644[rbp]
mov DWORD PTR -3620[rbp], eax
mov edx, DWORD PTR -3620[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3336[rbp], rax
movsx rax, edx
mov QWORD PTR -4080[rbp], rax
mov QWORD PTR -4072[rbp], 0
movsx rax, edx
mov QWORD PTR -4096[rbp], rax
mov QWORD PTR -4088[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1343:
cmp rsp, rcx
je .L1344
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1343
.L1344:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1345
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1345:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3328[rbp], rax
mov edx, DWORD PTR -3620[rbp]
movsx rax, edx
sub rax, 1
mov QWORD PTR -3320[rbp], rax
movsx rax, edx
mov QWORD PTR -4112[rbp], rax
mov QWORD PTR -4104[rbp], 0
movsx rax, edx
mov QWORD PTR -4144[rbp], rax
mov QWORD PTR -4136[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1346:
cmp rsp, rdx
je .L1347
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1346
.L1347:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1348
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1348:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3312[rbp], rax
mov eax, DWORD PTR -3620[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -3304[rbp], rdx
movsx rdx, eax
mov QWORD PTR -4160[rbp], rdx
mov QWORD PTR -4152[rbp], 0
movsx rdx, eax
mov QWORD PTR -4176[rbp], rdx
mov QWORD PTR -4168[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1349:
cmp rsp, rdx
je .L1350
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1349
.L1350:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1351
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1351:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3296[rbp], rax
mov eax, DWORD PTR -3620[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -3288[rbp], rdx
movsx rdx, eax
mov QWORD PTR -4192[rbp], rdx
mov QWORD PTR -4184[rbp], 0
movsx rdx, eax
mov QWORD PTR -4208[rbp], rdx
mov QWORD PTR -4200[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1352:
cmp rsp, rdx
je .L1353
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1352
.L1353:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1354
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1354:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -3280[rbp], rax
mov DWORD PTR -3624[rbp], 0
jmp .L1355
.L1356:
mov rax, QWORD PTR -3328[rbp]
mov edx, DWORD PTR -3624[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
mov rax, QWORD PTR -3312[rbp]
mov edx, DWORD PTR -3624[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -3624[rbp], 1
.L1355:
mov eax, DWORD PTR -3624[rbp]
cmp eax, DWORD PTR -3620[rbp]
jl .L1356
mov DWORD PTR -3624[rbp], 0
jmp .L1357
.L1362:
mov edx, DWORD PTR -3620[rbp]
mov rax, QWORD PTR -3328[rbp]
mov esi, edx
mov rdi, rax
pxor xmm0, xmm0
call shiftRDdouble
mov rax, QWORD PTR -3592[rbp]
mov edx, DWORD PTR -3624[rbp]
movsx rdx, edx
mov rdi, QWORD PTR [rax+rdx*8]
mov r8d, DWORD PTR -3644[rbp]
mov ecx, DWORD PTR -3648[rbp]
lea rdx, -2464[rbp]
lea rsi, -1664[rbp]
mov rax, QWORD PTR -3328[rbp]
movq xmm0, rdi
mov rdi, rax
call double_direct_form_2
movq rax, xmm0
mov rdx, QWORD PTR -3560[rbp]
mov ecx, DWORD PTR -3624[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
mov edx, DWORD PTR -3620[rbp]
mov rax, QWORD PTR -3312[rbp]
mov esi, edx
mov rdi, rax
pxor xmm0, xmm0
call shiftRDdouble
mov rax, QWORD PTR -3608[rbp]
mov edx, DWORD PTR -3624[rbp]
movsx rdx, edx
mov rdi, QWORD PTR [rax+rdx*8]
mov r8d, DWORD PTR -3644[rbp]
mov ecx, DWORD PTR -3648[rbp]
lea rdx, -3264[rbp]
lea rsi, -864[rbp]
mov rax, QWORD PTR -3312[rbp]
movq xmm0, rdi
mov rdi, rax
call double_direct_form_2
movq rax, xmm0
mov rdx, QWORD PTR -3576[rbp]
mov ecx, DWORD PTR -3624[rbp]
movsx rcx, ecx
mov QWORD PTR [rdx+rcx*8], rax
mov rax, QWORD PTR -3576[rbp]
mov edx, DWORD PTR -3624[rbp]
movsx rdx, edx
movsd xmm2, QWORD PTR [rax+rdx*8]
movsd QWORD PTR -3664[rbp], xmm2
mov rax, QWORD PTR -3560[rbp]
mov edx, DWORD PTR -3624[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
cvttsd2si rax, xmm0
mov rdi, rax
call fxp_to_double
movapd xmm1, xmm0
movsd xmm0, QWORD PTR -3664[rbp]
subsd xmm0, xmm1
movsd QWORD PTR -3272[rbp], xmm0
movsd xmm0, QWORD PTR impl[rip+48]
comisd xmm0, QWORD PTR -3272[rbp]
jbe .L1358
movsd xmm0, QWORD PTR impl[rip+48]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm1, xmm0
movsd xmm0, QWORD PTR -3272[rbp]
comisd xmm0, xmm1
jbe .L1358
mov eax, 1
jmp .L1361
.L1358:
mov eax, 0
.L1361:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assert
add DWORD PTR -3624[rbp], 1
.L1357:
mov eax, DWORD PTR X_SIZE_VALUE[rip]
cmp DWORD PTR -3624[rbp], eax
jl .L1362
mov eax, 0
mov rsp, rbx
mov rsp, QWORD PTR -4120[rbp]
mov rbx, QWORD PTR -56[rbp]
sub rbx, QWORD PTR fs:40
je .L1364
call __stack_chk_fail@PLT
.L1364:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE141:
.size verify_error_closedloop, .-verify_error_closedloop
.globl new_state
.bss
.align 32
.type new_state, @object
.size new_state, 128
new_state:
.zero 128
.globl new_stateFWL
.align 32
.type new_stateFWL, @object
.size new_stateFWL, 128
new_stateFWL:
.zero 128
.globl _controller_fxp
.align 32
.type _controller_fxp, @object
.size _controller_fxp, 1040
_controller_fxp:
.zero 1040
.globl _controller_double
.align 32
.type _controller_double, @object
.size _controller_double, 1040
_controller_double:
.zero 1040
.text
.globl ss_system_quantization_error
.type ss_system_quantization_error, @function
ss_system_quantization_error:
.LFB142:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 1104
mov QWORD PTR -1096[rbp], rdi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
pxor xmm0, xmm0
cvtsi2sd xmm0, QWORD PTR -1096[rbp]
movsd QWORD PTR _controller[rip+768], xmm0
mov DWORD PTR -1088[rbp], 0
jmp .L1370
.L1373:
mov DWORD PTR -1084[rbp], 0
jmp .L1371
.L1372:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
movsd QWORD PTR -1056[rbp+rax*8], xmm0
add DWORD PTR -1084[rbp], 1
.L1371:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1084[rbp], eax
jl .L1372
add DWORD PTR -1088[rbp], 1
.L1370:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1373
mov DWORD PTR -1088[rbp], 0
jmp .L1374
.L1377:
mov DWORD PTR -1084[rbp], 0
jmp .L1375
.L1376:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 16
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 16
movsd QWORD PTR -1056[rbp+rax*8], xmm0
add DWORD PTR -1084[rbp], 1
.L1375:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1084[rbp], eax
jl .L1376
add DWORD PTR -1088[rbp], 1
.L1374:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1377
mov DWORD PTR -1088[rbp], 0
jmp .L1378
.L1381:
mov DWORD PTR -1084[rbp], 0
jmp .L1379
.L1380:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 32
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 32
movsd QWORD PTR -1056[rbp+rax*8], xmm0
add DWORD PTR -1084[rbp], 1
.L1379:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1084[rbp], eax
jl .L1380
add DWORD PTR -1088[rbp], 1
.L1378:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1381
mov DWORD PTR -1088[rbp], 0
jmp .L1382
.L1385:
mov DWORD PTR -1084[rbp], 0
jmp .L1383
.L1384:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 48
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 48
movsd QWORD PTR -1056[rbp+rax*8], xmm0
add DWORD PTR -1084[rbp], 1
.L1383:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1084[rbp], eax
jl .L1384
add DWORD PTR -1088[rbp], 1
.L1382:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1385
mov DWORD PTR -1088[rbp], 0
jmp .L1386
.L1389:
mov DWORD PTR -1084[rbp], 0
jmp .L1387
.L1388:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
movsd QWORD PTR -1056[rbp+rax*8], xmm0
add DWORD PTR -1084[rbp], 1
.L1387:
cmp DWORD PTR -1084[rbp], 0
jle .L1388
add DWORD PTR -1088[rbp], 1
.L1386:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1389
mov DWORD PTR -1088[rbp], 0
jmp .L1390
.L1393:
mov DWORD PTR -1084[rbp], 0
jmp .L1391
.L1392:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 96
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 96
movsd QWORD PTR -1056[rbp+rax*8], xmm0
add DWORD PTR -1084[rbp], 1
.L1391:
cmp DWORD PTR -1084[rbp], 0
jle .L1392
add DWORD PTR -1088[rbp], 1
.L1390:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1393
mov DWORD PTR -1088[rbp], 0
jmp .L1394
.L1397:
mov DWORD PTR -1084[rbp], 0
jmp .L1395
.L1396:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 80
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 80
movsd QWORD PTR -1056[rbp+rax*8], xmm0
add DWORD PTR -1084[rbp], 1
.L1395:
cmp DWORD PTR -1084[rbp], 0
jle .L1396
add DWORD PTR -1088[rbp], 1
.L1394:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1397
pxor xmm0, xmm0
movsd QWORD PTR -1080[rbp], xmm0
mov DWORD PTR -1088[rbp], 0
jmp .L1398
.L1401:
mov DWORD PTR -1084[rbp], 0
jmp .L1399
.L1400:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, new_state[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1399:
cmp DWORD PTR -1084[rbp], 0
jle .L1400
add DWORD PTR -1088[rbp], 1
.L1398:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1401
call double_state_space_representation
movq rax, xmm0
mov QWORD PTR -1072[rbp], rax
mov DWORD PTR -1088[rbp], 0
jmp .L1402
.L1405:
mov DWORD PTR -1084[rbp], 0
jmp .L1403
.L1404:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, new_state[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1403:
cmp DWORD PTR -1084[rbp], 0
jle .L1404
add DWORD PTR -1088[rbp], 1
.L1402:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1405
pxor xmm0, xmm0
cvtsi2sd xmm0, QWORD PTR -1096[rbp]
movsd QWORD PTR -288[rbp], xmm0
mov DWORD PTR -1088[rbp], 0
jmp .L1406
.L1409:
mov DWORD PTR -1084[rbp], 0
jmp .L1407
.L1408:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
movsd xmm0, QWORD PTR -1056[rbp+rax*8]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1407:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1084[rbp], eax
jl .L1408
add DWORD PTR -1088[rbp], 1
.L1406:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1409
mov DWORD PTR -1088[rbp], 0
jmp .L1410
.L1413:
mov DWORD PTR -1084[rbp], 0
jmp .L1411
.L1412:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 16
movsd xmm0, QWORD PTR -1056[rbp+rax*8]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 16
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1411:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1084[rbp], eax
jl .L1412
add DWORD PTR -1088[rbp], 1
.L1410:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1413
mov DWORD PTR -1088[rbp], 0
jmp .L1414
.L1417:
mov DWORD PTR -1084[rbp], 0
jmp .L1415
.L1416:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 32
movsd xmm0, QWORD PTR -1056[rbp+rax*8]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 32
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1415:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1084[rbp], eax
jl .L1416
add DWORD PTR -1088[rbp], 1
.L1414:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1417
mov DWORD PTR -1088[rbp], 0
jmp .L1418
.L1421:
mov DWORD PTR -1084[rbp], 0
jmp .L1419
.L1420:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 48
movsd xmm0, QWORD PTR -1056[rbp+rax*8]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 48
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1419:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1084[rbp], eax
jl .L1420
add DWORD PTR -1088[rbp], 1
.L1418:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1421
mov DWORD PTR -1088[rbp], 0
jmp .L1422
.L1425:
mov DWORD PTR -1084[rbp], 0
jmp .L1423
.L1424:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
movsd xmm0, QWORD PTR -1056[rbp+rax*8]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1423:
cmp DWORD PTR -1084[rbp], 0
jle .L1424
add DWORD PTR -1088[rbp], 1
.L1422:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1425
mov DWORD PTR -1088[rbp], 0
jmp .L1426
.L1429:
mov DWORD PTR -1084[rbp], 0
jmp .L1427
.L1428:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 96
movsd xmm0, QWORD PTR -1056[rbp+rax*8]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 96
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1427:
cmp DWORD PTR -1084[rbp], 0
jle .L1428
add DWORD PTR -1088[rbp], 1
.L1426:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1429
mov DWORD PTR -1088[rbp], 0
jmp .L1430
.L1433:
mov DWORD PTR -1084[rbp], 0
jmp .L1431
.L1432:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 80
movsd xmm0, QWORD PTR -1056[rbp+rax*8]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 80
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1431:
cmp DWORD PTR -1084[rbp], 0
jle .L1432
add DWORD PTR -1088[rbp], 1
.L1430:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1433
mov DWORD PTR -1088[rbp], 0
jmp .L1434
.L1437:
mov DWORD PTR -1084[rbp], 0
jmp .L1435
.L1436:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, new_stateFWL[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1435:
cmp DWORD PTR -1084[rbp], 0
jle .L1436
add DWORD PTR -1088[rbp], 1
.L1434:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1437
call fxp_state_space_representation
movq rax, xmm0
mov QWORD PTR -1064[rbp], rax
mov DWORD PTR -1088[rbp], 0
jmp .L1438
.L1441:
mov DWORD PTR -1084[rbp], 0
jmp .L1439
.L1440:
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -1084[rbp]
movsx rdx, eax
mov eax, DWORD PTR -1088[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, new_stateFWL[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -1084[rbp], 1
.L1439:
cmp DWORD PTR -1084[rbp], 0
jle .L1440
add DWORD PTR -1088[rbp], 1
.L1438:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1088[rbp], eax
jl .L1441
movsd xmm0, QWORD PTR -1072[rbp]
subsd xmm0, QWORD PTR -1064[rbp]
movsd QWORD PTR -1080[rbp], xmm0
movsd xmm0, QWORD PTR -1080[rbp]
movq rax, xmm0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L1443
call __stack_chk_fail@PLT
.L1443:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE142:
.size ss_system_quantization_error, .-ss_system_quantization_error
.globl fxp_ss_closed_loop_quantization_error
.type fxp_ss_closed_loop_quantization_error, @function
fxp_ss_closed_loop_quantization_error:
.LFB143:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 1072
movsd QWORD PTR -1064[rbp], xmm0
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov WORD PTR -1054[rbp], 0
mov DWORD PTR -1052[rbp], 0
jmp .L1445
.L1450:
mov DWORD PTR -1048[rbp], 0
jmp .L1446
.L1449:
mov edx, DWORD PTR -1048[rbp]
mov eax, DWORD PTR -1052[rbp]
sal rax, 2
add rax, rdx
add rax, 48
lea rdx, 0[0+rax*8]
lea rax, _controller_fxp[rip]
movsd xmm0, QWORD PTR [rdx+rax]
pxor xmm1, xmm1
ucomisd xmm0, xmm1
jp .L1474
pxor xmm1, xmm1
comisd xmm0, xmm1
je .L1447
.L1474:
mov WORD PTR -1054[rbp], 1
.L1447:
add DWORD PTR -1048[rbp], 1
.L1446:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1048[rbp], eax
jb .L1449
add DWORD PTR -1052[rbp], 1
.L1445:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -1052[rbp], eax
jb .L1450
mov DWORD PTR -1052[rbp], 0
jmp .L1451
.L1454:
mov DWORD PTR -1048[rbp], 0
jmp .L1452
.L1453:
mov edx, DWORD PTR -1048[rbp]
mov eax, DWORD PTR -1052[rbp]
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -1040[rbp+rax*8], xmm0
mov edx, DWORD PTR -1048[rbp]
mov eax, DWORD PTR -1052[rbp]
sal rax, 2
add rax, rdx
mov QWORD PTR -656[rbp+rax*8], 0
add DWORD PTR -1048[rbp], 1
.L1452:
cmp DWORD PTR -1048[rbp], 3
jbe .L1453
add DWORD PTR -1052[rbp], 1
.L1451:
cmp DWORD PTR -1052[rbp], 3
jbe .L1454
mov DWORD PTR -1052[rbp], 0
jmp .L1455
.L1456:
mov eax, DWORD PTR -1052[rbp]
sal rax, 5
add rax, rbp
sub rax, 1040
movsd xmm0, QWORD PTR -1064[rbp]
movsd QWORD PTR [rax], xmm0
add DWORD PTR -1052[rbp], 1
.L1455:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1052[rbp], eax
jb .L1456
mov DWORD PTR -1052[rbp], 0
jmp .L1457
.L1458:
mov eax, DWORD PTR -1052[rbp]
sal rax, 5
add rax, rbp
sub rax, 528
mov QWORD PTR [rax], 0
add DWORD PTR -1052[rbp], 1
.L1457:
cmp DWORD PTR -1052[rbp], 3
jbe .L1458
mov DWORD PTR -1052[rbp], 0
jmp .L1459
.L1460:
mov eax, DWORD PTR -1052[rbp]
add rax, 112
lea rdx, 0[0+rax*8]
lea rax, _controller_fxp[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1052[rbp]
mov QWORD PTR -656[rbp+rdx*8], rax
add DWORD PTR -1052[rbp], 1
.L1459:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1052[rbp], eax
jb .L1460
mov DWORD PTR -1052[rbp], 0
jmp .L1461
.L1464:
mov DWORD PTR -1048[rbp], 0
jmp .L1462
.L1463:
mov edx, DWORD PTR -1048[rbp]
mov eax, DWORD PTR -1052[rbp]
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -912[rbp+rax*8], xmm0
mov edx, DWORD PTR -1048[rbp]
mov eax, DWORD PTR -1052[rbp]
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -784[rbp+rax*8], xmm0
add DWORD PTR -1048[rbp], 1
.L1462:
cmp DWORD PTR -1048[rbp], 3
jbe .L1463
add DWORD PTR -1052[rbp], 1
.L1461:
cmp DWORD PTR -1052[rbp], 3
jbe .L1464
mov DWORD PTR -1044[rbp], 0
jmp .L1465
.L1466:
mov eax, DWORD PTR -1044[rbp]
add rax, 16
sal rax, 5
mov rdx, rax
lea rax, _controller_fxp[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1044[rbp]
sal rdx, 5
add rdx, rbp
sub rdx, 528
mov QWORD PTR [rdx], rax
add DWORD PTR -1044[rbp], 1
.L1465:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -1044[rbp], eax
jb .L1466
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rcx, -528[rbp]
lea rdx, -656[rbp]
sub rsp, 8
lea rax, -400[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, 1
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov DWORD PTR -1044[rbp], 0
jmp .L1467
.L1468:
mov eax, DWORD PTR -1044[rbp]
sal rax, 5
add rax, rbp
sub rax, 1040
movsd xmm0, QWORD PTR [rax]
cvttsd2si rax, xmm0
mov rdi, rax
call fxp_quantize
pxor xmm2, xmm2
cvtsi2sd xmm2, rax
movq rax, xmm2
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -1044[rbp]
sal rdx, 5
add rdx, rbp
sub rdx, 272
mov QWORD PTR [rdx], rax
add DWORD PTR -1044[rbp], 1
.L1467:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1044[rbp], eax
jb .L1468
mov eax, DWORD PTR nInputs[rip]
mov edi, eax
lea rcx, -144[rbp]
lea rdx, -400[rbp]
lea rax, -272[rbp]
mov r8, rcx
mov rcx, rdx
mov rdx, rax
mov esi, 1
call fxp_sub_matrix
mov DWORD PTR -1044[rbp], 0
jmp .L1469
.L1470:
mov eax, DWORD PTR -1044[rbp]
sal rax, 5
add rax, rbp
sub rax, 144
mov rax, QWORD PTR [rax]
mov rdi, rax
call fxp_quantize
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov edx, DWORD PTR -1044[rbp]
add rdx, 24
mov rcx, rdx
sal rcx, 5
lea rdx, _controller_fxp[rip]
mov QWORD PTR [rcx+rdx], rax
add DWORD PTR -1044[rbp], 1
.L1469:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -1044[rbp], eax
jb .L1470
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -912[rbp]
push rax
lea r9, _controller_fxp[rip+512]
lea r8, _controller_fxp[rip+256]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
cmp WORD PTR -1054[rbp], 1
jne .L1471
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -784[rbp]
push rax
lea r9, _controller_fxp[rip+768]
lea r8, _controller_fxp[rip+384]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
.L1471:
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rdx, -784[rbp]
lea rax, -912[rbp]
lea r8, _controller_fxp[rip+640]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
sub rsp, 8
lea rax, -912[rbp]
push rax
lea r9, _controller_fxp[rip+512]
lea r8, _controller_fxp[rip]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
sub rsp, 8
lea rax, -784[rbp]
push rax
lea r9, _controller_fxp[rip+768]
lea r8, _controller_fxp[rip+128]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rdx, -784[rbp]
lea rax, -912[rbp]
lea r8, _controller_fxp[rip+512]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
movsd xmm0, QWORD PTR _controller_fxp[rip+640]
movq rax, xmm0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L1473
call __stack_chk_fail@PLT
.L1473:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE143:
.size fxp_ss_closed_loop_quantization_error, .-fxp_ss_closed_loop_quantization_error
.globl ss_closed_loop_quantization_error
.type ss_closed_loop_quantization_error, @function
ss_closed_loop_quantization_error:
.LFB144:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 432
movsd QWORD PTR -424[rbp], xmm0
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov WORD PTR -410[rbp], 0
mov DWORD PTR -408[rbp], 0
jmp .L1476
.L1481:
mov DWORD PTR -404[rbp], 0
jmp .L1477
.L1480:
mov edx, DWORD PTR -404[rbp]
mov eax, DWORD PTR -408[rbp]
sal rax, 2
add rax, rdx
add rax, 48
lea rdx, 0[0+rax*8]
lea rax, _controller_double[rip]
movsd xmm0, QWORD PTR [rdx+rax]
pxor xmm1, xmm1
ucomisd xmm0, xmm1
jp .L1493
pxor xmm1, xmm1
comisd xmm0, xmm1
je .L1478
.L1493:
mov WORD PTR -410[rbp], 1
.L1478:
add DWORD PTR -404[rbp], 1
.L1477:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -404[rbp], eax
jb .L1480
add DWORD PTR -408[rbp], 1
.L1476:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -408[rbp], eax
jb .L1481
mov DWORD PTR -408[rbp], 0
jmp .L1482
.L1485:
mov DWORD PTR -404[rbp], 0
jmp .L1483
.L1484:
mov edx, DWORD PTR -404[rbp]
mov eax, DWORD PTR -408[rbp]
sal rax, 2
add rax, rdx
movsd xmm0, QWORD PTR -424[rbp]
movsd QWORD PTR -400[rbp+rax*8], xmm0
add DWORD PTR -404[rbp], 1
.L1483:
cmp DWORD PTR -404[rbp], 0
je .L1484
add DWORD PTR -408[rbp], 1
.L1482:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -408[rbp], eax
jb .L1485
mov DWORD PTR -408[rbp], 0
jmp .L1486
.L1489:
mov DWORD PTR -404[rbp], 0
jmp .L1487
.L1488:
mov edx, DWORD PTR -404[rbp]
mov eax, DWORD PTR -408[rbp]
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -272[rbp+rax*8], xmm0
mov edx, DWORD PTR -404[rbp]
mov eax, DWORD PTR -408[rbp]
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -144[rbp+rax*8], xmm0
add DWORD PTR -404[rbp], 1
.L1487:
cmp DWORD PTR -404[rbp], 3
jbe .L1488
add DWORD PTR -408[rbp], 1
.L1486:
cmp DWORD PTR -408[rbp], 3
jbe .L1489
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller_double[rip+512]
lea r8, _controller_double[rip+896]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov edi, eax
lea rdx, -272[rbp]
lea rax, -400[rbp]
lea r8, _controller_double[rip+768]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_sub_matrix
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller_double[rip+512]
lea r8, _controller_double[rip+256]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
cmp WORD PTR -410[rbp], 1
jne .L1490
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
sub rsp, 8
lea rax, -144[rbp]
push rax
lea r9, _controller_double[rip+768]
lea r8, _controller_double[rip+384]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
.L1490:
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rdx, -144[rbp]
lea rax, -272[rbp]
lea r8, _controller_double[rip+640]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
mov eax, DWORD PTR nStates[rip]
mov edx, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller_double[rip+512]
lea r8, _controller_double[rip]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nInputs[rip]
mov edx, eax
mov eax, DWORD PTR nInputs[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
sub rsp, 8
lea rax, -144[rbp]
push rax
lea r9, _controller_double[rip+768]
lea r8, _controller_double[rip+128]
mov ecx, 1
call double_matrix_multiplication
add rsp, 16
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rdx, -144[rbp]
lea rax, -272[rbp]
lea r8, _controller_double[rip+512]
mov rcx, rdx
mov rdx, rax
mov esi, 1
call double_add_matrix
movsd xmm0, QWORD PTR _controller_double[rip+640]
movq rax, xmm0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L1492
call __stack_chk_fail@PLT
.L1492:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE144:
.size ss_closed_loop_quantization_error, .-ss_closed_loop_quantization_error
.section .rodata
.align 8
.LC83:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_error_state_space.h"
.align 8
.LC84:
.string "__quant_error < error_limit && __quant_error > ((-1)*error_limit)"
.text
.globl verify_error_state_space
.type verify_error_state_space, @function
verify_error_state_space:
.LFB145:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 72
.cfi_offset 3, -24
mov rax, QWORD PTR fs:40
mov QWORD PTR -24[rbp], rax
xor eax, eax
mov DWORD PTR -72[rbp], 0
jmp .L1495
.L1498:
mov DWORD PTR -68[rbp], 0
jmp .L1496
.L1497:
mov eax, DWORD PTR -68[rbp]
movsx rdx, eax
mov eax, DWORD PTR -72[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -68[rbp]
movsx rdx, eax
mov eax, DWORD PTR -72[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, new_state[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -68[rbp], 1
.L1496:
cmp DWORD PTR -68[rbp], 0
jle .L1497
add DWORD PTR -72[rbp], 1
.L1495:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -72[rbp], eax
jl .L1498
mov DWORD PTR -72[rbp], 0
jmp .L1499
.L1502:
mov DWORD PTR -68[rbp], 0
jmp .L1500
.L1501:
mov eax, DWORD PTR -68[rbp]
movsx rdx, eax
mov eax, DWORD PTR -72[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 64
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -68[rbp]
movsx rdx, eax
mov eax, DWORD PTR -72[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, new_stateFWL[rip]
movsd QWORD PTR [rdx+rax], xmm0
add DWORD PTR -68[rbp], 1
.L1500:
cmp DWORD PTR -68[rbp], 0
jle .L1501
add DWORD PTR -72[rbp], 1
.L1499:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -72[rbp], eax
jl .L1502
lea rax, _controller_fxp[rip]
lea rdx, _controller[rip]
mov ecx, 130
mov rdi, rax
mov rsi, rdx
rep movsq
lea rax, _controller_double[rip]
lea rdx, _controller[rip]
mov ecx, 130
mov rdi, rax
mov rsi, rdx
rep movsq
mov DWORD PTR overflow_mode[rip], 0
mov rax, QWORD PTR impl[rip+16]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -64[rbp], rax
mov rax, QWORD PTR impl[rip+8]
movq xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR -56[rbp], rax
mov eax, 0
call nondet_double@PLT
movq rax, xmm0
mov QWORD PTR -48[rbp], rax
pxor xmm1, xmm1
cvtsi2sd xmm1, QWORD PTR -64[rbp]
movsd xmm0, QWORD PTR -48[rbp]
comisd xmm0, xmm1
jb .L1503
pxor xmm0, xmm0
cvtsi2sd xmm0, QWORD PTR -56[rbp]
comisd xmm0, QWORD PTR -48[rbp]
jb .L1503
mov eax, 1
jmp .L1506
.L1503:
mov eax, 0
.L1506:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov DWORD PTR -72[rbp], 0
jmp .L1507
.L1508:
movsd xmm0, QWORD PTR -48[rbp]
cvttsd2si rdx, xmm0
mov eax, DWORD PTR -72[rbp]
cdqe
mov QWORD PTR -32[rbp+rax*8], rdx
add DWORD PTR -72[rbp], 1
.L1507:
cmp DWORD PTR -72[rbp], 0
js .L1508
mov eax, DWORD PTR closed_loop[rip]
test eax, eax
je .L1509
mov DWORD PTR -72[rbp], 0
jmp .L1510
.L1515:
mov eax, DWORD PTR -72[rbp]
cdqe
mov rax, QWORD PTR -32[rbp+rax*8]
pxor xmm2, xmm2
cvtsi2sd xmm2, rax
movq rax, xmm2
movq xmm0, rax
call ss_closed_loop_quantization_error
movq rbx, xmm0
mov eax, DWORD PTR -72[rbp]
cdqe
mov rax, QWORD PTR -32[rbp+rax*8]
pxor xmm3, xmm3
cvtsi2sd xmm3, rax
movq rax, xmm3
movq xmm0, rax
call fxp_ss_closed_loop_quantization_error
movapd xmm1, xmm0
movq xmm0, rbx
subsd xmm0, xmm1
movsd QWORD PTR -40[rbp], xmm0
movsd xmm0, QWORD PTR error_limit[rip]
comisd xmm0, QWORD PTR -40[rbp]
jbe .L1511
movsd xmm0, QWORD PTR error_limit[rip]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm1, xmm0
movsd xmm0, QWORD PTR -40[rbp]
comisd xmm0, xmm1
ja .L1514
.L1511:
lea rcx, __PRETTY_FUNCTION__.4[rip]
mov edx, 354
lea rsi, .LC83[rip]
lea rdi, .LC84[rip]
call __assert_fail@PLT
.L1514:
add DWORD PTR -72[rbp], 1
.L1510:
cmp DWORD PTR -72[rbp], 0
js .L1515
jmp .L1516
.L1509:
mov DWORD PTR -72[rbp], 0
jmp .L1517
.L1522:
mov eax, DWORD PTR -72[rbp]
cdqe
mov rax, QWORD PTR -32[rbp+rax*8]
mov rdi, rax
call ss_system_quantization_error
movq rax, xmm0
mov QWORD PTR -40[rbp], rax
movsd xmm0, QWORD PTR error_limit[rip]
comisd xmm0, QWORD PTR -40[rbp]
jbe .L1518
movsd xmm0, QWORD PTR error_limit[rip]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm1, xmm0
movsd xmm0, QWORD PTR -40[rbp]
comisd xmm0, xmm1
ja .L1521
.L1518:
lea rcx, __PRETTY_FUNCTION__.4[rip]
mov edx, 361
lea rsi, .LC83[rip]
lea rdi, .LC84[rip]
call __assert_fail@PLT
.L1521:
add DWORD PTR -72[rbp], 1
.L1517:
cmp DWORD PTR -72[rbp], 0
js .L1522
.L1516:
mov eax, 0
mov rbx, QWORD PTR -24[rbp]
sub rbx, QWORD PTR fs:40
je .L1524
call __stack_chk_fail@PLT
.L1524:
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE145:
.size verify_error_state_space, .-verify_error_state_space
.globl fxp_ss_closed_loop_safety
.type fxp_ss_closed_loop_safety, @function
fxp_ss_closed_loop_safety:
.LFB146:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 800
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov WORD PTR -794[rbp], 0
mov DWORD PTR -788[rbp], 0
jmp .L1530
.L1535:
mov DWORD PTR -792[rbp], 0
jmp .L1531
.L1534:
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
add rax, 48
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
pxor xmm1, xmm1
ucomisd xmm0, xmm1
jp .L1562
pxor xmm1, xmm1
comisd xmm0, xmm1
je .L1532
.L1562:
mov WORD PTR -794[rbp], 1
.L1532:
add DWORD PTR -792[rbp], 1
.L1531:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -792[rbp], eax
jb .L1534
add DWORD PTR -788[rbp], 1
.L1530:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -788[rbp], eax
jb .L1535
mov DWORD PTR -788[rbp], 0
jmp .L1536
.L1539:
mov DWORD PTR -792[rbp], 0
jmp .L1537
.L1538:
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
add rax, 96
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
movsd xmm0, QWORD PTR [rdx+rax]
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
movsd QWORD PTR -784[rbp+rax*8], xmm0
add DWORD PTR -792[rbp], 1
.L1537:
cmp DWORD PTR -792[rbp], 0
je .L1538
add DWORD PTR -788[rbp], 1
.L1536:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -788[rbp], eax
jb .L1539
mov DWORD PTR -788[rbp], 0
jmp .L1540
.L1543:
mov DWORD PTR -792[rbp], 0
jmp .L1541
.L1542:
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
mov QWORD PTR -400[rbp+rax*8], 0
add DWORD PTR -792[rbp], 1
.L1541:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -792[rbp], eax
jb .L1542
add DWORD PTR -788[rbp], 1
.L1540:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -788[rbp], eax
jb .L1543
mov DWORD PTR -788[rbp], 0
jmp .L1544
.L1547:
mov DWORD PTR -792[rbp], 0
jmp .L1545
.L1546:
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
mov QWORD PTR -272[rbp+rax*8], 0
add DWORD PTR -792[rbp], 1
.L1545:
cmp DWORD PTR -792[rbp], 0
je .L1546
add DWORD PTR -788[rbp], 1
.L1544:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -788[rbp], eax
jb .L1547
mov DWORD PTR -788[rbp], 0
jmp .L1548
.L1551:
mov DWORD PTR -792[rbp], 0
jmp .L1549
.L1550:
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
mov QWORD PTR -144[rbp+rax*8], 0
add DWORD PTR -792[rbp], 1
.L1549:
cmp DWORD PTR -792[rbp], 3
jbe .L1550
add DWORD PTR -788[rbp], 1
.L1548:
cmp DWORD PTR -788[rbp], 3
jbe .L1551
mov DWORD PTR -788[rbp], 0
jmp .L1552
.L1555:
mov DWORD PTR -792[rbp], 0
jmp .L1553
.L1554:
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
add rax, 112
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov ecx, DWORD PTR -792[rbp]
mov edx, DWORD PTR -788[rbp]
sal rdx, 2
add rdx, rcx
mov QWORD PTR -400[rbp+rdx*8], rax
add DWORD PTR -792[rbp], 1
.L1553:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -792[rbp], eax
jb .L1554
add DWORD PTR -788[rbp], 1
.L1552:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -788[rbp], eax
jb .L1555
mov DWORD PTR -788[rbp], 0
jmp .L1556
.L1559:
mov DWORD PTR -792[rbp], 0
jmp .L1557
.L1558:
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -656[rbp+rax*8], xmm0
mov edx, DWORD PTR -792[rbp]
mov eax, DWORD PTR -788[rbp]
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -528[rbp+rax*8], xmm0
add DWORD PTR -792[rbp], 1
.L1557:
cmp DWORD PTR -792[rbp], 3
jbe .L1558
add DWORD PTR -788[rbp], 1
.L1556:
cmp DWORD PTR -788[rbp], 3
jbe .L1559
mov DWORD PTR -788[rbp], 1
nop
movsd xmm0, QWORD PTR _controller[rip+640]
movq rax, xmm0
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L1561
call __stack_chk_fail@PLT
.L1561:
movq xmm0, rax
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE146:
.size fxp_ss_closed_loop_safety, .-fxp_ss_closed_loop_safety
.section .rodata
.align 8
.LC85:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_safety_state_space.h"
.LC86:
.string "output_double <= error_limit"
.text
.globl verify_safety_state_space
.type verify_safety_state_space, @function
verify_safety_state_space:
.LFB147:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov eax, 0
call fxp_ss_closed_loop_safety
cvttsd2si rax, xmm0
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -16[rbp]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov QWORD PTR -8[rbp], rax
movsd xmm0, QWORD PTR error_limit[rip]
comisd xmm0, QWORD PTR -8[rbp]
jnb .L1564
lea rcx, __PRETTY_FUNCTION__.3[rip]
mov edx, 140
lea rsi, .LC85[rip]
lea rdi, .LC86[rip]
call __assert_fail@PLT
.L1564:
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE147:
.size verify_safety_state_space, .-verify_safety_state_space
.section .rodata
.align 8
.LC87:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_controllability.h"
.align 8
.LC88:
.string "determinant(controllabilityMatrix_double,nStates) != 0"
.text
.globl verify_controllability
.type verify_controllability, @function
verify_controllability:
.LFB148:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 928
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -928[rbp], 0
jmp .L1567
.L1570:
mov DWORD PTR -924[rbp], 0
jmp .L1568
.L1569:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -912[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -784[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -656[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -528[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -400[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -272[rbp+rax*8], xmm0
add DWORD PTR -924[rbp], 1
.L1568:
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
cmp DWORD PTR -924[rbp], eax
jl .L1569
add DWORD PTR -928[rbp], 1
.L1567:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1570
mov DWORD PTR -928[rbp], 0
jmp .L1571
.L1574:
mov DWORD PTR -924[rbp], 0
jmp .L1572
.L1573:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -912[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1572:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1573
add DWORD PTR -928[rbp], 1
.L1571:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1574
mov DWORD PTR -928[rbp], 0
jmp .L1575
.L1578:
mov DWORD PTR -924[rbp], 0
jmp .L1576
.L1577:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 16
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -784[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1576:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1577
add DWORD PTR -928[rbp], 1
.L1575:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1578
mov eax, DWORD PTR nInputs[rip]
cmp eax, 1
jle .L1579
mov DWORD PTR -920[rbp], 0
mov DWORD PTR -924[rbp], 0
jmp .L1580
.L1585:
mov edx, DWORD PTR -920[rbp]
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -528[rbp]
lea rax, -912[rbp]
mov r8, rcx
mov ecx, edx
mov rdx, rax
call fxp_exp_matrix
add DWORD PTR -920[rbp], 1
mov eax, DWORD PTR nInputs[rip]
mov r11d, eax
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -784[rbp]
lea rdx, -528[rbp]
sub rsp, 8
lea rax, -400[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, r11d
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov DWORD PTR -916[rbp], 0
jmp .L1581
.L1584:
mov DWORD PTR -928[rbp], 0
jmp .L1582
.L1583:
mov eax, DWORD PTR -916[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rax, QWORD PTR -400[rbp+rax*8]
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -656[rbp+rdx*8], rax
add DWORD PTR -928[rbp], 1
.L1582:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1583
add DWORD PTR -924[rbp], 1
add DWORD PTR -916[rbp], 1
.L1581:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -916[rbp], eax
jl .L1584
.L1580:
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
cmp DWORD PTR -924[rbp], eax
jl .L1585
mov DWORD PTR -928[rbp], 0
jmp .L1586
.L1589:
mov DWORD PTR -924[rbp], 0
jmp .L1587
.L1588:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -528[rbp+rax*8], 0
add DWORD PTR -924[rbp], 1
.L1587:
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
cmp DWORD PTR -924[rbp], eax
jl .L1588
add DWORD PTR -928[rbp], 1
.L1586:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1589
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
mov ecx, edx
imul ecx, eax
mov edx, DWORD PTR nStates[rip]
lea rsi, -528[rbp]
lea rax, -656[rbp]
mov rdi, rax
call fxp_transpose
mov eax, DWORD PTR nStates[rip]
mov r11d, eax
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
mov r10d, eax
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -528[rbp]
lea rdx, -656[rbp]
sub rsp, 8
lea rax, -144[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, r11d
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov DWORD PTR -928[rbp], 0
jmp .L1590
.L1593:
mov DWORD PTR -924[rbp], 0
jmp .L1591
.L1592:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rax, QWORD PTR -144[rbp+rax*8]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -272[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1591:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1592
add DWORD PTR -928[rbp], 1
.L1590:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1593
mov edx, DWORD PTR nStates[rip]
lea rax, -272[rbp]
mov esi, edx
mov rdi, rax
call determinant
movq rax, xmm0
pxor xmm0, xmm0
movq xmm1, rax
ucomisd xmm1, xmm0
jp .L1595
pxor xmm0, xmm0
movq xmm2, rax
comisd xmm2, xmm0
jne .L1595
lea rcx, __PRETTY_FUNCTION__.2[rip]
mov edx, 91
lea rsi, .LC87[rip]
lea rdi, .LC88[rip]
call __assert_fail@PLT
.L1579:
mov DWORD PTR -924[rbp], 0
jmp .L1596
.L1599:
mov edx, DWORD PTR -924[rbp]
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -528[rbp]
lea rax, -912[rbp]
mov r8, rcx
mov ecx, edx
mov rdx, rax
call fxp_exp_matrix
mov eax, DWORD PTR nInputs[rip]
mov r11d, eax
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -784[rbp]
lea rdx, -528[rbp]
sub rsp, 8
lea rax, -400[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, r11d
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov DWORD PTR -928[rbp], 0
jmp .L1597
.L1598:
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 5
add rax, rbp
sub rax, 400
mov rax, QWORD PTR [rax]
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -656[rbp+rdx*8], rax
add DWORD PTR -928[rbp], 1
.L1597:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1598
add DWORD PTR -924[rbp], 1
.L1596:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1599
mov DWORD PTR -928[rbp], 0
jmp .L1600
.L1603:
mov DWORD PTR -924[rbp], 0
jmp .L1601
.L1602:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rax, QWORD PTR -656[rbp+rax*8]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -272[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1601:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1602
add DWORD PTR -928[rbp], 1
.L1600:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1603
mov edx, DWORD PTR nStates[rip]
lea rax, -272[rbp]
mov esi, edx
mov rdi, rax
call determinant
movq rax, xmm0
pxor xmm0, xmm0
movq xmm3, rax
ucomisd xmm3, xmm0
jp .L1595
pxor xmm0, xmm0
movq xmm4, rax
comisd xmm4, xmm0
jne .L1595
lea rcx, __PRETTY_FUNCTION__.2[rip]
mov edx, 113
lea rsi, .LC87[rip]
lea rdi, .LC88[rip]
call __assert_fail@PLT
.L1595:
mov eax, 0
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L1605
call __stack_chk_fail@PLT
.L1605:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE148:
.size verify_controllability, .-verify_controllability
.section .rodata
.align 8
.LC89:
.string "determinant(mimo_controllabilityMatrix_double,nStates) != 0"
.align 8
.LC90:
.string "determinant(controllabilityMatrix,nStates) != 0"
.text
.globl verify_controllability_double
.type verify_controllability_double, @function
verify_controllability_double:
.LFB149:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 544
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov eax, DWORD PTR nInputs[rip]
cmp eax, 1
jle .L1607
mov DWORD PTR -536[rbp], 0
mov DWORD PTR -540[rbp], 0
jmp .L1608
.L1613:
mov eax, DWORD PTR -536[rbp]
mov edx, DWORD PTR nStates[rip]
mov esi, edx
mov edx, DWORD PTR nStates[rip]
mov edi, edx
lea rdx, -400[rbp]
mov r8, rdx
mov ecx, eax
lea rdx, _controller[rip]
call double_exp_matrix
add DWORD PTR -536[rbp], 1
mov eax, DWORD PTR nInputs[rip]
mov ecx, eax
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rdx, -400[rbp]
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller[rip+128]
mov r8, rdx
mov edx, r10d
call double_matrix_multiplication
add rsp, 16
mov DWORD PTR -532[rbp], 0
jmp .L1609
.L1612:
mov DWORD PTR -544[rbp], 0
jmp .L1610
.L1611:
mov eax, DWORD PTR -532[rbp]
movsx rdx, eax
mov eax, DWORD PTR -544[rbp]
cdqe
sal rax, 2
add rax, rdx
movsd xmm0, QWORD PTR -272[rbp+rax*8]
mov eax, DWORD PTR -540[rbp]
movsx rdx, eax
mov eax, DWORD PTR -544[rbp]
cdqe
sal rax, 2
add rax, rdx
movsd QWORD PTR -528[rbp+rax*8], xmm0
add DWORD PTR -544[rbp], 1
.L1610:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -544[rbp], eax
jl .L1611
add DWORD PTR -540[rbp], 1
add DWORD PTR -532[rbp], 1
.L1609:
mov eax, DWORD PTR nInputs[rip]
cmp DWORD PTR -532[rbp], eax
jl .L1612
.L1608:
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
cmp DWORD PTR -540[rbp], eax
jl .L1613
mov DWORD PTR -544[rbp], 0
jmp .L1614
.L1617:
mov DWORD PTR -540[rbp], 0
jmp .L1615
.L1616:
mov eax, DWORD PTR -540[rbp]
movsx rdx, eax
mov eax, DWORD PTR -544[rbp]
cdqe
sal rax, 2
add rax, rdx
pxor xmm0, xmm0
movsd QWORD PTR -400[rbp+rax*8], xmm0
add DWORD PTR -540[rbp], 1
.L1615:
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
cmp DWORD PTR -540[rbp], eax
jl .L1616
add DWORD PTR -544[rbp], 1
.L1614:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -544[rbp], eax
jl .L1617
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
mov ecx, edx
imul ecx, eax
mov edx, DWORD PTR nStates[rip]
lea rsi, -400[rbp]
lea rax, -528[rbp]
mov rdi, rax
call transpose
mov eax, DWORD PTR nStates[rip]
mov r11d, eax
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
mov r10d, eax
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nInputs[rip]
imul eax, edx
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -400[rbp]
lea rdx, -528[rbp]
sub rsp, 8
lea rax, -144[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, r11d
mov edx, r10d
call double_matrix_multiplication
add rsp, 16
mov edx, DWORD PTR nStates[rip]
lea rax, -144[rbp]
mov esi, edx
mov rdi, rax
call determinant
movq rax, xmm0
pxor xmm0, xmm0
movq xmm1, rax
ucomisd xmm1, xmm0
jp .L1619
pxor xmm0, xmm0
movq xmm2, rax
comisd xmm2, xmm0
jne .L1619
lea rcx, __PRETTY_FUNCTION__.1[rip]
mov edx, 154
lea rsi, .LC87[rip]
lea rdi, .LC89[rip]
call __assert_fail@PLT
.L1607:
mov DWORD PTR -540[rbp], 0
jmp .L1620
.L1623:
mov eax, DWORD PTR -540[rbp]
mov edx, DWORD PTR nStates[rip]
mov esi, edx
mov edx, DWORD PTR nStates[rip]
mov edi, edx
lea rdx, -400[rbp]
mov r8, rdx
mov ecx, eax
lea rdx, _controller[rip]
call double_exp_matrix
mov eax, DWORD PTR nInputs[rip]
mov ecx, eax
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rdx, -400[rbp]
sub rsp, 8
lea rax, -272[rbp]
push rax
lea r9, _controller[rip+128]
mov r8, rdx
mov edx, r10d
call double_matrix_multiplication
add rsp, 16
mov DWORD PTR -544[rbp], 0
jmp .L1621
.L1622:
mov eax, DWORD PTR -544[rbp]
cdqe
sal rax, 5
add rax, rbp
sub rax, 272
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -540[rbp]
movsx rdx, eax
mov eax, DWORD PTR -544[rbp]
cdqe
sal rax, 2
add rax, rdx
movsd QWORD PTR -528[rbp+rax*8], xmm0
add DWORD PTR -544[rbp], 1
.L1621:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -544[rbp], eax
jl .L1622
add DWORD PTR -540[rbp], 1
.L1620:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -540[rbp], eax
jl .L1623
mov edx, DWORD PTR nStates[rip]
lea rax, -528[rbp]
mov esi, edx
mov rdi, rax
call determinant
movq rax, xmm0
pxor xmm0, xmm0
movq xmm3, rax
ucomisd xmm3, xmm0
jp .L1619
pxor xmm0, xmm0
movq xmm4, rax
comisd xmm4, xmm0
jne .L1619
lea rcx, __PRETTY_FUNCTION__.1[rip]
mov edx, 163
lea rsi, .LC87[rip]
lea rdi, .LC90[rip]
call __assert_fail@PLT
.L1619:
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L1625
call __stack_chk_fail@PLT
.L1625:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE149:
.size verify_controllability_double, .-verify_controllability_double
.section .rodata
.align 8
.LC91:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_observability.h"
.align 8
.LC92:
.string "determinant(observabilityMatrix_double,nStates) != 0"
.text
.globl verify_observability
.type verify_observability, @function
verify_observability:
.LFB150:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 928
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -928[rbp], 0
jmp .L1627
.L1630:
mov DWORD PTR -924[rbp], 0
jmp .L1628
.L1629:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -656[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -912[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -784[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -528[rbp+rax*8], 0
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -400[rbp+rax*8], 0
add DWORD PTR -924[rbp], 1
.L1628:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1629
add DWORD PTR -928[rbp], 1
.L1627:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1630
mov DWORD PTR -928[rbp], 0
jmp .L1631
.L1634:
mov DWORD PTR -924[rbp], 0
jmp .L1632
.L1633:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -912[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1632:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1633
add DWORD PTR -928[rbp], 1
.L1631:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1634
mov DWORD PTR -928[rbp], 0
jmp .L1635
.L1638:
mov DWORD PTR -924[rbp], 0
jmp .L1636
.L1637:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
add rax, 32
lea rdx, 0[0+rax*8]
lea rax, _controller[rip]
mov rax, QWORD PTR [rdx+rax]
movq xmm0, rax
call fxp_double_to_fxp
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -784[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1636:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1637
add DWORD PTR -928[rbp], 1
.L1635:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1638
mov eax, DWORD PTR nOutputs[rip]
cmp eax, 1
jle .L1639
mov DWORD PTR -924[rbp], 0
mov DWORD PTR -920[rbp], 0
jmp .L1640
.L1645:
mov edx, DWORD PTR -920[rbp]
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -528[rbp]
lea rax, -912[rbp]
mov r8, rcx
mov ecx, edx
mov rdx, rax
call fxp_exp_matrix
add DWORD PTR -920[rbp], 1
mov eax, DWORD PTR nStates[rip]
mov r11d, eax
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rcx, -528[rbp]
lea rdx, -784[rbp]
sub rsp, 8
lea rax, -400[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, r11d
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov DWORD PTR -916[rbp], 0
jmp .L1641
.L1644:
mov DWORD PTR -928[rbp], 0
jmp .L1642
.L1643:
mov eax, DWORD PTR -928[rbp]
movsx rdx, eax
mov eax, DWORD PTR -916[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rax, QWORD PTR -400[rbp+rax*8]
mov edx, DWORD PTR -928[rbp]
movsx rcx, edx
mov edx, DWORD PTR -924[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -656[rbp+rdx*8], rax
add DWORD PTR -928[rbp], 1
.L1642:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1643
add DWORD PTR -924[rbp], 1
add DWORD PTR -916[rbp], 1
.L1641:
mov eax, DWORD PTR nOutputs[rip]
cmp DWORD PTR -916[rbp], eax
jl .L1644
.L1640:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -920[rbp], eax
jl .L1645
mov DWORD PTR -928[rbp], 0
jmp .L1646
.L1649:
mov DWORD PTR -924[rbp], 0
jmp .L1647
.L1648:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov QWORD PTR -528[rbp+rax*8], 0
add DWORD PTR -924[rbp], 1
.L1647:
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nOutputs[rip]
imul eax, edx
cmp DWORD PTR -924[rbp], eax
jl .L1648
add DWORD PTR -928[rbp], 1
.L1646:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1649
mov ecx, DWORD PTR nStates[rip]
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nOutputs[rip]
imul edx, eax
lea rsi, -528[rbp]
lea rax, -656[rbp]
mov rdi, rax
call fxp_transpose
mov eax, DWORD PTR nStates[rip]
mov r11d, eax
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nOutputs[rip]
imul eax, edx
mov r10d, eax
mov edx, DWORD PTR nStates[rip]
mov eax, DWORD PTR nOutputs[rip]
imul eax, edx
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -656[rbp]
lea rdx, -528[rbp]
sub rsp, 8
lea rax, -144[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, r11d
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov DWORD PTR -928[rbp], 0
jmp .L1650
.L1653:
mov DWORD PTR -924[rbp], 0
jmp .L1651
.L1652:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rax, QWORD PTR -144[rbp+rax*8]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -272[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1651:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1652
add DWORD PTR -928[rbp], 1
.L1650:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1653
mov edx, DWORD PTR nStates[rip]
lea rax, -272[rbp]
mov esi, edx
mov rdi, rax
call determinant
movq rax, xmm0
pxor xmm0, xmm0
movq xmm1, rax
ucomisd xmm1, xmm0
jp .L1655
pxor xmm0, xmm0
movq xmm2, rax
comisd xmm2, xmm0
jne .L1655
lea rcx, __PRETTY_FUNCTION__.0[rip]
mov edx, 119
lea rsi, .LC91[rip]
lea rdi, .LC92[rip]
call __assert_fail@PLT
.L1639:
mov DWORD PTR -928[rbp], 0
jmp .L1656
.L1659:
mov edx, DWORD PTR -928[rbp]
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nStates[rip]
mov edi, eax
lea rcx, -528[rbp]
lea rax, -912[rbp]
mov r8, rcx
mov ecx, edx
mov rdx, rax
call fxp_exp_matrix
mov eax, DWORD PTR nStates[rip]
mov r11d, eax
mov eax, DWORD PTR nStates[rip]
mov r10d, eax
mov eax, DWORD PTR nStates[rip]
mov esi, eax
mov eax, DWORD PTR nOutputs[rip]
mov edi, eax
lea rcx, -528[rbp]
lea rdx, -784[rbp]
sub rsp, 8
lea rax, -400[rbp]
push rax
mov r9, rcx
mov r8, rdx
mov ecx, r11d
mov edx, r10d
call fxp_matrix_multiplication
add rsp, 16
mov DWORD PTR -924[rbp], 0
jmp .L1657
.L1658:
mov eax, DWORD PTR -924[rbp]
cdqe
mov rax, QWORD PTR -400[rbp+rax*8]
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -656[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1657:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1658
add DWORD PTR -928[rbp], 1
.L1656:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1659
mov DWORD PTR -928[rbp], 0
jmp .L1660
.L1663:
mov DWORD PTR -924[rbp], 0
jmp .L1661
.L1662:
mov eax, DWORD PTR -924[rbp]
movsx rdx, eax
mov eax, DWORD PTR -928[rbp]
cdqe
sal rax, 2
add rax, rdx
mov rax, QWORD PTR -656[rbp+rax*8]
mov rdi, rax
call fxp_to_double
movq rax, xmm0
mov edx, DWORD PTR -924[rbp]
movsx rcx, edx
mov edx, DWORD PTR -928[rbp]
movsx rdx, edx
sal rdx, 2
add rdx, rcx
mov QWORD PTR -272[rbp+rdx*8], rax
add DWORD PTR -924[rbp], 1
.L1661:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -924[rbp], eax
jl .L1662
add DWORD PTR -928[rbp], 1
.L1660:
mov eax, DWORD PTR nStates[rip]
cmp DWORD PTR -928[rbp], eax
jl .L1663
mov edx, DWORD PTR nStates[rip]
lea rax, -272[rbp]
mov esi, edx
mov rdi, rax
call determinant
movq rax, xmm0
pxor xmm0, xmm0
movq xmm3, rax
ucomisd xmm3, xmm0
jp .L1655
pxor xmm0, xmm0
movq xmm4, rax
comisd xmm4, xmm0
jne .L1655
lea rcx, __PRETTY_FUNCTION__.0[rip]
mov edx, 134
lea rsi, .LC91[rip]
lea rdi, .LC92[rip]
call __assert_fail@PLT
.L1655:
mov eax, 0
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L1665
call __stack_chk_fail@PLT
.L1665:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE150:
.size verify_observability, .-verify_observability
.globl resp_mag
.type resp_mag, @function
resp_mag:
.LFB151:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 248
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov QWORD PTR -168[rbp], rdi
mov DWORD PTR -172[rbp], esi
mov QWORD PTR -184[rbp], rdx
mov DWORD PTR -176[rbp], ecx
mov QWORD PTR -192[rbp], r8
mov DWORD PTR -196[rbp], r9d
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov rax, rsp
mov rbx, rax
mov eax, DWORD PTR -196[rbp]
lea edx, 1[rax]
movsx rax, edx
sub rax, 1
mov QWORD PTR -136[rbp], rax
movsx rax, edx
mov r10, rax
mov r11d, 0
movsx rax, edx
mov r12, rax
mov r13d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1667:
cmp rsp, rcx
je .L1668
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1667
.L1668:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1669
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1669:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -144[rbp], rax
mov eax, DWORD PTR -196[rbp]
lea edx, 1[rax]
movsx rax, edx
sub rax, 1
mov QWORD PTR -120[rbp], rax
movsx rax, edx
mov QWORD PTR -224[rbp], rax
mov QWORD PTR -216[rbp], 0
movsx rax, edx
mov QWORD PTR -240[rbp], rax
mov QWORD PTR -232[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1670:
cmp rsp, rdx
je .L1671
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1670
.L1671:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1672
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1672:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -112[rbp], rax
mov eax, DWORD PTR -196[rbp]
add eax, 1
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -104[rbp], rdx
movsx rdx, eax
mov QWORD PTR -256[rbp], rdx
mov QWORD PTR -248[rbp], 0
movsx rdx, eax
mov QWORD PTR -272[rbp], rdx
mov QWORD PTR -264[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1673:
cmp rsp, rdx
je .L1674
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1673
.L1674:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1675
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1675:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -96[rbp], rax
mov eax, DWORD PTR -196[rbp]
add eax, 1
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -88[rbp], rdx
movsx rdx, eax
mov QWORD PTR -288[rbp], rdx
mov QWORD PTR -280[rbp], 0
movsx rdx, eax
mov r14, rdx
mov r15d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov esi, 16
mov edx, 0
div rsi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1676:
cmp rsp, rdx
je .L1677
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1676
.L1677:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1678
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1678:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
pxor xmm0, xmm0
movsd QWORD PTR -128[rbp], xmm0
mov DWORD PTR -152[rbp], 0
jmp .L1679
.L1684:
mov rax, QWORD PTR -168[rbp]
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -144[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
mov DWORD PTR -148[rbp], 1
jmp .L1680
.L1681:
mov rax, QWORD PTR -144[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
movsd QWORD PTR -64[rbp], xmm0
mov rax, QWORD PTR -128[rbp]
mov edi, 6
movq xmm0, rax
call cosTyl
mov rax, QWORD PTR -144[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm1
movsd QWORD PTR -224[rbp], xmm0
mov rax, QWORD PTR -128[rbp]
mov edi, 6
movq xmm0, rax
call sinTyl
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -224[rbp]
subsd xmm1, xmm0
mov eax, DWORD PTR -148[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -168[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
addsd xmm0, xmm1
mov rax, QWORD PTR -144[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
mov rax, QWORD PTR -128[rbp]
mov edi, 6
movq xmm0, rax
call sinTyl
movq rax, xmm0
movq xmm3, rax
mulsd xmm3, QWORD PTR -64[rbp]
movsd QWORD PTR -224[rbp], xmm3
mov rax, QWORD PTR -128[rbp]
mov edi, 6
movq xmm0, rax
call cosTyl
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm1
addsd xmm0, QWORD PTR -224[rbp]
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -148[rbp], 1
.L1680:
mov eax, DWORD PTR -148[rbp]
cmp eax, DWORD PTR -172[rbp]
jl .L1681
mov rax, QWORD PTR -184[rbp]
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
pxor xmm0, xmm0
movsd QWORD PTR [rax+rdx*8], xmm0
mov DWORD PTR -148[rbp], 1
jmp .L1682
.L1683:
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
movsd QWORD PTR -64[rbp], xmm0
mov rax, QWORD PTR -128[rbp]
mov edi, 6
movq xmm0, rax
call cosTyl
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm1
movsd QWORD PTR -224[rbp], xmm0
mov rax, QWORD PTR -128[rbp]
mov edi, 6
movq xmm0, rax
call sinTyl
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR -224[rbp]
subsd xmm1, xmm0
mov eax, DWORD PTR -148[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -184[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
addsd xmm0, xmm1
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
mov rax, QWORD PTR -128[rbp]
mov edi, 6
movq xmm0, rax
call sinTyl
movq rax, xmm0
movq xmm4, rax
mulsd xmm4, QWORD PTR -64[rbp]
movsd QWORD PTR -224[rbp], xmm4
mov rax, QWORD PTR -128[rbp]
mov edi, 6
movq xmm0, rax
call cosTyl
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm1
addsd xmm0, QWORD PTR -224[rbp]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd QWORD PTR [rax+rdx*8], xmm0
add DWORD PTR -148[rbp], 1
.L1682:
mov eax, DWORD PTR -148[rbp]
cmp eax, DWORD PTR -176[rbp]
jl .L1683
mov rax, QWORD PTR -144[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -144[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
mulsd xmm1, xmm0
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm2, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -112[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm2
addsd xmm0, xmm1
pxor xmm5, xmm5
cvtsd2ss xmm5, xmm0
movd eax, xmm5
movd xmm0, eax
call sqrt3
mov eax, DWORD PTR -152[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -192[rbp]
add rax, rdx
cvtss2sd xmm0, xmm0
movsd QWORD PTR [rax], xmm0
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -96[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
mulsd xmm1, xmm0
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm2, QWORD PTR [rax+rdx*8]
mov rax, QWORD PTR -80[rbp]
mov edx, DWORD PTR -152[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
mulsd xmm0, xmm2
addsd xmm0, xmm1
pxor xmm6, xmm6
cvtsd2ss xmm6, xmm0
movd eax, xmm6
movd xmm0, eax
call sqrt3
cvtss2sd xmm0, xmm0
movsd QWORD PTR -72[rbp], xmm0
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -72[rbp]
setp al
mov edx, 1
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -72[rbp]
cmovne eax, edx
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
mov eax, DWORD PTR -152[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -192[rbp]
add rax, rdx
movsd xmm0, QWORD PTR [rax]
mov eax, DWORD PTR -152[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -192[rbp]
add rax, rdx
divsd xmm0, QWORD PTR -72[rbp]
movsd QWORD PTR [rax], xmm0
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -196[rbp]
movsd xmm0, QWORD PTR .LC93[rip]
divsd xmm0, xmm1
movsd xmm1, QWORD PTR -128[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -128[rbp], xmm0
add DWORD PTR -152[rbp], 1
.L1679:
movsd xmm0, QWORD PTR .LC93[rip]
comisd xmm0, QWORD PTR -128[rbp]
jnb .L1684
mov rsp, rbx
nop
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
je .L1685
call __stack_chk_fail@PLT
.L1685:
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE151:
.size resp_mag, .-resp_mag
.section .rodata
.align 8
.LC94:
.string "|----------------Passband Failure-------------|"
.align 8
.LC95:
.string "|-------------Cutoff Frequency Failure--------|"
.align 8
.LC96:
.string "|----------------Stopband Failure-------------|"
.text
.globl verify_magnitude
.type verify_magnitude, @function
verify_magnitude:
.LFB152:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r12
push rbx
sub rsp, 192
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 12, -40
.cfi_offset 3, -48
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
mov rax, rsp
mov r12, rax
mov DWORD PTR -144[rbp], 100
pxor xmm1, xmm1
cvtsi2sd xmm1, DWORD PTR -144[rbp]
movsd xmm0, QWORD PTR .LC7[rip]
divsd xmm0, xmm1
movsd QWORD PTR -112[rbp], xmm0
mov eax, DWORD PTR -144[rbp]
lea edx, 1[rax]
movsx rax, edx
sub rax, 1
mov QWORD PTR -120[rbp], rax
movsx rax, edx
mov rcx, rax
mov ebx, 0
movsx rax, edx
mov rsi, rax
mov edi, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1687:
cmp rsp, rcx
je .L1688
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1687
.L1688:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1689
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1689:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -128[rbp], rax
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -136[rbp], rax
movsx rax, edx
mov r8, rax
mov r9d, 0
movsx rax, edx
mov r10, rax
mov r11d, 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rdx, rax, 16
mov rax, rdx
and rax, -4096
mov rcx, rsp
sub rcx, rax
.L1690:
cmp rsp, rcx
je .L1691
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1690
.L1691:
mov rax, rdx
and eax, 4095
sub rsp, rax
mov rax, rdx
and eax, 4095
test rax, rax
je .L1692
mov rax, rdx
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1692:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -96[rbp], rax
mov eax, DWORD PTR ds[rip+800]
mov rcx, QWORD PTR -96[rbp]
mov edx, eax
mov rsi, rcx
lea rdi, ds[rip]
call fxp_double_to_fxp_array
mov edx, DWORD PTR ds[rip+800]
movsx rax, edx
sub rax, 1
mov QWORD PTR -88[rbp], rax
movsx rax, edx
mov QWORD PTR -160[rbp], rax
mov QWORD PTR -152[rbp], 0
movsx rax, edx
mov QWORD PTR -176[rbp], rax
mov QWORD PTR -168[rbp], 0
movsx rax, edx
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1693:
cmp rsp, rdx
je .L1694
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1693
.L1694:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1695
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1695:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -80[rbp], rax
mov edx, DWORD PTR ds[rip+800]
mov rcx, QWORD PTR -96[rbp]
mov rax, QWORD PTR -80[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
mov eax, DWORD PTR ds[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -72[rbp], rdx
movsx rdx, eax
mov QWORD PTR -192[rbp], rdx
mov QWORD PTR -184[rbp], 0
movsx rdx, eax
mov QWORD PTR -208[rbp], rdx
mov QWORD PTR -200[rbp], 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1696:
cmp rsp, rdx
je .L1697
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1696
.L1697:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1698
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1698:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -64[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
mov rax, QWORD PTR -64[rbp]
mov rsi, rax
lea rdi, ds[rip+808]
call fxp_double_to_fxp_array
mov eax, DWORD PTR ds[rip+1608]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -56[rbp], rdx
movsx rdx, eax
mov QWORD PTR -224[rbp], rdx
mov QWORD PTR -216[rbp], 0
movsx rdx, eax
mov r14, rdx
mov r15d, 0
cdqe
lea rdx, 0[0+rax*8]
mov eax, 16
sub rax, 1
add rax, rdx
mov ebx, 16
mov edx, 0
div rbx
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L1699:
cmp rsp, rdx
je .L1700
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1699
.L1700:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L1701
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L1701:
mov rax, rsp
add rax, 7
shr rax, 3
sal rax, 3
mov QWORD PTR -48[rbp], rax
mov edx, DWORD PTR ds[rip+1608]
mov rcx, QWORD PTR -64[rbp]
mov rax, QWORD PTR -48[rbp]
mov rsi, rcx
mov rdi, rax
call fxp_to_double_array
mov edx, DWORD PTR ds[rip+800]
mov eax, DWORD PTR ds[rip+1608]
mov esi, DWORD PTR -144[rbp]
mov rcx, QWORD PTR -128[rbp]
mov r9d, esi
mov r8, rcx
mov ecx, edx
lea rdx, ds[rip]
mov esi, eax
lea rdi, ds[rip+808]
call resp_mag
mov eax, DWORD PTR filter[rip+24]
cmp eax, 1
jne .L1702
mov DWORD PTR -140[rbp], 0
pxor xmm0, xmm0
movsd QWORD PTR -104[rbp], xmm0
jmp .L1703
.L1711:
movss xmm0, DWORD PTR filter[rip+12]
cvtss2sd xmm0, xmm0
comisd xmm0, QWORD PTR -104[rbp]
jb .L1733
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -140[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
movss xmm1, DWORD PTR filter[rip]
cvtss2sd xmm1, xmm1
comisd xmm0, xmm1
setnb al
movzx eax, al
lea rsi, .LC94[rip]
mov edi, eax
call __DSVERIFIER_assert_msg
jmp .L1706
.L1733:
movss xmm0, DWORD PTR filter[rip+16]
cvtss2sd xmm0, xmm0
ucomisd xmm0, QWORD PTR -104[rbp]
jp .L1707
ucomisd xmm0, QWORD PTR -104[rbp]
jne .L1707
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -140[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
movss xmm0, DWORD PTR filter[rip+8]
cvtss2sd xmm0, xmm0
comisd xmm0, xmm1
setnb al
movzx eax, al
lea rsi, .LC95[rip]
mov edi, eax
call __DSVERIFIER_assert_msg
jmp .L1706
.L1707:
movss xmm0, DWORD PTR filter[rip+20]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR -104[rbp]
comisd xmm0, xmm1
jb .L1706
movsd xmm0, QWORD PTR .LC7[rip]
comisd xmm0, QWORD PTR -104[rbp]
jb .L1706
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -140[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
movss xmm0, DWORD PTR filter[rip+4]
cvtss2sd xmm0, xmm0
comisd xmm0, xmm1
setnb al
movzx eax, al
lea rsi, .LC96[rip]
mov edi, eax
call __DSVERIFIER_assert_msg
.L1706:
add DWORD PTR -140[rbp], 1
movsd xmm0, QWORD PTR -104[rbp]
addsd xmm0, QWORD PTR -112[rbp]
movsd QWORD PTR -104[rbp], xmm0
.L1703:
movsd xmm0, QWORD PTR .LC7[rip]
comisd xmm0, QWORD PTR -104[rbp]
jnb .L1711
jmp .L1712
.L1702:
mov eax, DWORD PTR filter[rip+24]
cmp eax, 2
jne .L1713
mov DWORD PTR -140[rbp], 0
pxor xmm0, xmm0
movsd QWORD PTR -104[rbp], xmm0
jmp .L1714
.L1722:
movss xmm0, DWORD PTR filter[rip+20]
cvtss2sd xmm0, xmm0
comisd xmm0, QWORD PTR -104[rbp]
jb .L1734
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -140[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
movss xmm0, DWORD PTR filter[rip+4]
cvtss2sd xmm0, xmm0
comisd xmm0, xmm1
setnb al
movzx eax, al
lea rsi, .LC96[rip]
mov edi, eax
call __DSVERIFIER_assert_msg
jmp .L1717
.L1734:
movss xmm0, DWORD PTR filter[rip+16]
cvtss2sd xmm0, xmm0
ucomisd xmm0, QWORD PTR -104[rbp]
jp .L1718
ucomisd xmm0, QWORD PTR -104[rbp]
jne .L1718
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -140[rbp]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rdx*8]
movss xmm0, DWORD PTR filter[rip+8]
cvtss2sd xmm0, xmm0
comisd xmm0, xmm1
setnb al
movzx eax, al
lea rsi, .LC95[rip]
mov edi, eax
call __DSVERIFIER_assert_msg
jmp .L1717
.L1718:
movss xmm0, DWORD PTR filter[rip+12]
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
movsd xmm0, QWORD PTR -104[rbp]
comisd xmm0, xmm1
jbe .L1717
movsd xmm0, QWORD PTR .LC7[rip]
comisd xmm0, QWORD PTR -104[rbp]
jb .L1717
mov rax, QWORD PTR -128[rbp]
mov edx, DWORD PTR -140[rbp]
movsx rdx, edx
movsd xmm0, QWORD PTR [rax+rdx*8]
movss xmm1, DWORD PTR filter[rip]
cvtss2sd xmm1, xmm1
comisd xmm0, xmm1
setnb al
movzx eax, al
lea rsi, .LC94[rip]
mov edi, eax
call __DSVERIFIER_assert_msg
.L1717:
add DWORD PTR -140[rbp], 1
movsd xmm0, QWORD PTR -104[rbp]
addsd xmm0, QWORD PTR -112[rbp]
movsd QWORD PTR -104[rbp], xmm0
.L1714:
movsd xmm0, QWORD PTR .LC7[rip]
comisd xmm0, QWORD PTR -104[rbp]
jnb .L1722
jmp .L1712
.L1713:
mov edi, 0
call __DSVERIFIER_assert
.L1712:
mov eax, 0
mov rsp, r12
mov rbx, QWORD PTR -40[rbp]
sub rbx, QWORD PTR fs:40
je .L1724
call __stack_chk_fail@PLT
.L1724:
lea rsp, -32[rbp]
pop rbx
pop r12
pop r14
pop r15
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE152:
.size verify_magnitude, .-verify_magnitude
.globl plant_cbmc
.bss
.align 32
.type plant_cbmc, @object
.size plant_cbmc, 3224
plant_cbmc:
.zero 3224
.text
.globl main
.type main, @function
main:
.LFB153:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, 0
call initialization
mov eax, 0
call validation
mov DWORD PTR rounding_mode[rip], 1
lea rdi, verify_overflow[rip]
call call_verification_task
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE153:
.size main, .-main
.section .rodata
.align 8
.LC97:
.string "\n\n****************************************************************************"
.align 8
.LC98:
.string "* set (ds and impl) parameters to check with DSVerifier *"
.align 8
.LC99:
.string "****************************************************************************"
.text
.globl validation
.type validation, @function
validation:
.LFB154:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, DWORD PTR ds[rip+800]
test eax, eax
je .L1738
mov eax, DWORD PTR ds[rip+1608]
test eax, eax
jne .L1739
.L1738:
lea rdi, .LC97[rip]
call puts@PLT
lea rdi, .LC98[rip]
call puts@PLT
lea rdi, .LC99[rip]
call puts@PLT
mov edi, 0
call __DSVERIFIER_assert
.L1739:
mov DWORD PTR X_SIZE_VALUE[rip], 5
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE154:
.size validation, .-validation
.globl call_verification_task
.type call_verification_task, @function
call_verification_task:
.LFB155:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov QWORD PTR -72[rbp], rdi
mov DWORD PTR -52[rbp], 0
mov BYTE PTR -57[rbp], 0
mov DWORD PTR -56[rbp], 0
mov DWORD PTR -56[rbp], 0
jmp .L1742
.L1756:
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 302
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
pxor xmm1, xmm1
comisd xmm0, xmm1
jbe .L1743
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm1, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 302
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR .LC100[rip]
divsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -24[rbp]
jbe .L1784
movsd xmm0, QWORD PTR -24[rbp]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm0, xmm1
jmp .L1747
.L1784:
movsd xmm0, QWORD PTR -24[rbp]
.L1747:
movsd QWORD PTR -24[rbp], xmm0
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
subsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR -16[rbp], xmm0
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -24[rbp]
jp .L1748
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -24[rbp]
jne .L1748
cmp BYTE PTR -57[rbp], 0
jne .L1786
.L1748:
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -24[rbp]
jp .L1750
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -24[rbp]
jne .L1750
movzx eax, BYTE PTR -57[rbp]
xor eax, 1
test al, al
je .L1750
mov BYTE PTR -57[rbp], 1
.L1750:
mov eax, 0
call nondet_double@PLT
movq rax, xmm0
mov edx, DWORD PTR -56[rbp]
movsx rdx, edx
add rdx, 100
lea rcx, 0[0+rdx*8]
lea rdx, ds[rip+8]
mov QWORD PTR [rcx+rdx], rax
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
comisd xmm0, QWORD PTR -16[rbp]
jb .L1752
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm1, QWORD PTR [rdx+rax]
movsd xmm0, QWORD PTR -8[rbp]
comisd xmm0, xmm1
jb .L1752
mov eax, 1
jmp .L1755
.L1752:
mov eax, 0
.L1755:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
jmp .L1743
.L1786:
nop
.L1743:
add DWORD PTR -56[rbp], 1
.L1742:
mov eax, DWORD PTR ds[rip+1608]
cmp DWORD PTR -56[rbp], eax
jl .L1756
mov DWORD PTR -56[rbp], 0
jmp .L1757
.L1771:
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 202
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
pxor xmm1, xmm1
comisd xmm0, xmm1
jbe .L1758
mov eax, DWORD PTR -56[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, ds[rip]
movsd xmm1, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -56[rbp]
cdqe
add rax, 202
lea rdx, 0[0+rax*8]
lea rax, ds[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR .LC100[rip]
divsd xmm0, xmm1
movsd QWORD PTR -48[rbp], xmm0
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -48[rbp]
jbe .L1785
movsd xmm0, QWORD PTR -48[rbp]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm0, xmm1
jmp .L1762
.L1785:
movsd xmm0, QWORD PTR -48[rbp]
.L1762:
movsd QWORD PTR -48[rbp], xmm0
mov eax, DWORD PTR -56[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, ds[rip]
movsd xmm0, QWORD PTR [rdx+rax]
subsd xmm0, QWORD PTR -48[rbp]
movsd QWORD PTR -40[rbp], xmm0
mov eax, DWORD PTR -56[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, ds[rip]
movsd xmm0, QWORD PTR [rdx+rax]
movsd xmm1, QWORD PTR -48[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -32[rbp], xmm0
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -48[rbp]
jp .L1763
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -48[rbp]
jne .L1763
cmp BYTE PTR -57[rbp], 0
jne .L1787
.L1763:
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -48[rbp]
jp .L1765
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -48[rbp]
jne .L1765
movzx eax, BYTE PTR -57[rbp]
xor eax, 1
test al, al
je .L1765
mov BYTE PTR -57[rbp], 1
.L1765:
mov eax, 0
call nondet_double@PLT
movq rax, xmm0
mov edx, DWORD PTR -56[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
lea rdx, ds[rip]
mov QWORD PTR [rcx+rdx], rax
mov eax, DWORD PTR -56[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, ds[rip]
movsd xmm0, QWORD PTR [rdx+rax]
comisd xmm0, QWORD PTR -40[rbp]
jb .L1767
mov eax, DWORD PTR -56[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, ds[rip]
movsd xmm1, QWORD PTR [rdx+rax]
movsd xmm0, QWORD PTR -32[rbp]
comisd xmm0, xmm1
jb .L1767
mov eax, 1
jmp .L1770
.L1767:
mov eax, 0
.L1770:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
jmp .L1758
.L1787:
nop
.L1758:
add DWORD PTR -56[rbp], 1
.L1757:
mov eax, DWORD PTR ds[rip+800]
cmp DWORD PTR -56[rbp], eax
jl .L1771
mov rdx, QWORD PTR -72[rbp]
mov eax, 0
call rdx
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE155:
.size call_verification_task, .-call_verification_task
.globl call_closedloop_verification_task
.type call_closedloop_verification_task, @function
call_closedloop_verification_task:
.LFB156:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov QWORD PTR -72[rbp], rdi
mov BYTE PTR -53[rbp], 0
mov DWORD PTR -52[rbp], 0
mov DWORD PTR -52[rbp], 0
jmp .L1789
.L1803:
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 302
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
pxor xmm1, xmm1
comisd xmm0, xmm1
jbe .L1790
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm1, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 302
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR .LC100[rip]
divsd xmm0, xmm1
movsd QWORD PTR -24[rbp], xmm0
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -24[rbp]
jbe .L1831
movsd xmm0, QWORD PTR -24[rbp]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm0, xmm1
jmp .L1794
.L1831:
movsd xmm0, QWORD PTR -24[rbp]
.L1794:
movsd QWORD PTR -24[rbp], xmm0
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
subsd xmm0, QWORD PTR -24[rbp]
movsd QWORD PTR -16[rbp], xmm0
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
movsd xmm1, QWORD PTR -24[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -24[rbp]
jp .L1795
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -24[rbp]
jne .L1795
cmp BYTE PTR -53[rbp], 0
jne .L1833
.L1795:
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -24[rbp]
jp .L1797
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -24[rbp]
jne .L1797
movzx eax, BYTE PTR -53[rbp]
xor eax, 1
test al, al
je .L1797
mov BYTE PTR -53[rbp], 1
.L1797:
mov eax, 0
call nondet_double@PLT
movq rax, xmm0
mov edx, DWORD PTR -52[rbp]
movsx rdx, edx
add rdx, 100
lea rcx, 0[0+rdx*8]
lea rdx, plant[rip+8]
mov QWORD PTR [rcx+rdx], rax
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
comisd xmm0, QWORD PTR -16[rbp]
jb .L1799
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 100
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm1, QWORD PTR [rdx+rax]
movsd xmm0, QWORD PTR -8[rbp]
comisd xmm0, xmm1
jb .L1799
mov eax, 1
jmp .L1802
.L1799:
mov eax, 0
.L1802:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
jmp .L1790
.L1833:
nop
.L1790:
add DWORD PTR -52[rbp], 1
.L1789:
mov eax, DWORD PTR plant[rip+1608]
cmp DWORD PTR -52[rbp], eax
jl .L1803
mov DWORD PTR -52[rbp], 0
jmp .L1804
.L1818:
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 202
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
pxor xmm1, xmm1
comisd xmm0, xmm1
jbe .L1805
mov eax, DWORD PTR -52[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, plant[rip]
movsd xmm1, QWORD PTR [rdx+rax]
mov eax, DWORD PTR -52[rbp]
cdqe
add rax, 202
lea rdx, 0[0+rax*8]
lea rax, plant[rip+8]
movsd xmm0, QWORD PTR [rdx+rax]
mulsd xmm0, xmm1
movsd xmm1, QWORD PTR .LC100[rip]
divsd xmm0, xmm1
movsd QWORD PTR -48[rbp], xmm0
pxor xmm0, xmm0
comisd xmm0, QWORD PTR -48[rbp]
jbe .L1832
movsd xmm0, QWORD PTR -48[rbp]
movq xmm1, QWORD PTR .LC13[rip]
xorpd xmm0, xmm1
jmp .L1809
.L1832:
movsd xmm0, QWORD PTR -48[rbp]
.L1809:
movsd QWORD PTR -48[rbp], xmm0
mov eax, DWORD PTR -52[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, plant[rip]
movsd xmm0, QWORD PTR [rdx+rax]
subsd xmm0, QWORD PTR -48[rbp]
movsd QWORD PTR -40[rbp], xmm0
mov eax, DWORD PTR -52[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, plant[rip]
movsd xmm0, QWORD PTR [rdx+rax]
movsd xmm1, QWORD PTR -48[rbp]
addsd xmm0, xmm1
movsd QWORD PTR -32[rbp], xmm0
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -48[rbp]
jp .L1810
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -48[rbp]
jne .L1810
cmp BYTE PTR -53[rbp], 0
jne .L1834
.L1810:
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -48[rbp]
jp .L1812
pxor xmm0, xmm0
ucomisd xmm0, QWORD PTR -48[rbp]
jne .L1812
movzx eax, BYTE PTR -53[rbp]
xor eax, 1
test al, al
je .L1812
mov BYTE PTR -53[rbp], 1
.L1812:
mov eax, 0
call nondet_double@PLT
movq rax, xmm0
mov edx, DWORD PTR -52[rbp]
movsx rdx, edx
lea rcx, 0[0+rdx*8]
lea rdx, plant[rip]
mov QWORD PTR [rcx+rdx], rax
mov eax, DWORD PTR -52[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, plant[rip]
movsd xmm0, QWORD PTR [rdx+rax]
comisd xmm0, QWORD PTR -40[rbp]
jb .L1814
mov eax, DWORD PTR -52[rbp]
cdqe
lea rdx, 0[0+rax*8]
lea rax, plant[rip]
movsd xmm1, QWORD PTR [rdx+rax]
movsd xmm0, QWORD PTR -32[rbp]
comisd xmm0, xmm1
jb .L1814
mov eax, 1
jmp .L1817
.L1814:
mov eax, 0
.L1817:
and eax, 1
movzx eax, al
mov edi, eax
call __DSVERIFIER_assume
jmp .L1805
.L1834:
nop
.L1805:
add DWORD PTR -52[rbp], 1
.L1804:
mov eax, DWORD PTR plant[rip+800]
cmp DWORD PTR -52[rbp], eax
jl .L1818
mov rdx, QWORD PTR -72[rbp]
mov eax, 0
call rdx
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE156:
.size call_closedloop_verification_task, .-call_closedloop_verification_task
.globl ds
.data
.align 32
.type ds, @object
.size ds, 3224
ds:
.long 0
.long 1072693248
.long 0
.long -1074790400
.zero 784
.long 2
.zero 4
.long -1717986918
.long 1069128089
.long -1717986918
.long -1078355559
.zero 784
.long 2
.zero 4
.long 1202590843
.long 1066695393
.zero 1600
.globl impl
.align 32
.type impl, @object
.size impl, 56
impl:
.long 8
.long 8
.long 0
.long 1072693248
.long 0
.long -1074790400
.zero 32
.section .rodata
.align 16
.type __PRETTY_FUNCTION__.21, @object
.size __PRETTY_FUNCTION__.21, 20
__PRETTY_FUNCTION__.21:
.string "__DSVERIFIER_assert"
.align 16
.type __PRETTY_FUNCTION__.20, @object
.size __PRETTY_FUNCTION__.20, 24
__PRETTY_FUNCTION__.20:
.string "__DSVERIFIER_assert_msg"
.align 16
.type __PRETTY_FUNCTION__.19, @object
.size __PRETTY_FUNCTION__.19, 26
__PRETTY_FUNCTION__.19:
.string "double_check_oscillations"
.align 8
.type __PRETTY_FUNCTION__.18, @object
.size __PRETTY_FUNCTION__.18, 12
__PRETTY_FUNCTION__.18:
.string "snrVariance"
.align 8
.type __PRETTY_FUNCTION__.17, @object
.size __PRETTY_FUNCTION__.17, 9
__PRETTY_FUNCTION__.17:
.string "snrPower"
.align 8
.type __PRETTY_FUNCTION__.16, @object
.size __PRETTY_FUNCTION__.16, 9
__PRETTY_FUNCTION__.16:
.string "snrPoint"
.align 8
.type __PRETTY_FUNCTION__.15, @object
.size __PRETTY_FUNCTION__.15, 13
__PRETTY_FUNCTION__.15:
.string "iirIIOutTime"
.align 8
.type __PRETTY_FUNCTION__.14, @object
.size __PRETTY_FUNCTION__.14, 14
__PRETTY_FUNCTION__.14:
.string "iirIItOutTime"
.align 16
.type __PRETTY_FUNCTION__.13, @object
.size __PRETTY_FUNCTION__.13, 21
__PRETTY_FUNCTION__.13:
.string "iirIItOutTime_double"
.align 16
.type __PRETTY_FUNCTION__.12, @object
.size __PRETTY_FUNCTION__.12, 28
__PRETTY_FUNCTION__.12:
.string "double_direct_form_1_MSP430"
.align 16
.type __PRETTY_FUNCTION__.11, @object
.size __PRETTY_FUNCTION__.11, 28
__PRETTY_FUNCTION__.11:
.string "double_direct_form_2_MSP430"
.align 32
.type __PRETTY_FUNCTION__.10, @object
.size __PRETTY_FUNCTION__.10, 39
__PRETTY_FUNCTION__.10:
.string "double_transposed_direct_form_2_MSP430"
.align 8
.type __PRETTY_FUNCTION__.9, @object
.size __PRETTY_FUNCTION__.9, 15
__PRETTY_FUNCTION__.9:
.string "initialization"
.align 16
.type __PRETTY_FUNCTION__.8, @object
.size __PRETTY_FUNCTION__.8, 31
__PRETTY_FUNCTION__.8:
.string "verify_limit_cycle_state_space"
.align 16
.type __PRETTY_FUNCTION__.7, @object
.size __PRETTY_FUNCTION__.7, 30
__PRETTY_FUNCTION__.7:
.string "verify_zero_input_limit_cycle"
.align 16
.type __PRETTY_FUNCTION__.6, @object
.size __PRETTY_FUNCTION__.6, 22
__PRETTY_FUNCTION__.6:
.string "verify_generic_timing"
.align 16
.type __PRETTY_FUNCTION__.5, @object
.size __PRETTY_FUNCTION__.5, 17
__PRETTY_FUNCTION__.5:
.string "verify_stability"
.align 16
.type __PRETTY_FUNCTION__.4, @object
.size __PRETTY_FUNCTION__.4, 25
__PRETTY_FUNCTION__.4:
.string "verify_error_state_space"
.align 16
.type __PRETTY_FUNCTION__.3, @object
.size __PRETTY_FUNCTION__.3, 26
__PRETTY_FUNCTION__.3:
.string "verify_safety_state_space"
.align 16
.type __PRETTY_FUNCTION__.2, @object
.size __PRETTY_FUNCTION__.2, 23
__PRETTY_FUNCTION__.2:
.string "verify_controllability"
.align 16
.type __PRETTY_FUNCTION__.1, @object
.size __PRETTY_FUNCTION__.1, 30
__PRETTY_FUNCTION__.1:
.string "verify_controllability_double"
.align 16
.type __PRETTY_FUNCTION__.0, @object
.size __PRETTY_FUNCTION__.0, 21
__PRETTY_FUNCTION__.0:
.string "verify_observability"
.align 8
.LC5:
.long 0
.long 1071644672
.align 8
.LC7:
.long 0
.long 1072693248
.align 16
.LC13:
.long 0
.long -2147483648
.long 0
.long 0
.align 8
.LC15:
.long 0
.long -1074790400
.align 8
.LC28:
.long 0
.long 1089470464
.align 8
.LC29:
.long 0
.long 1088421824
.align 8
.LC30:
.long 8388608
.long 1104150400
.align 8
.LC31:
.long -1574947053
.long 1075974094
.align 8
.LC32:
.long -1574947053
.long 1074925518
.align 4
.LC35:
.long 1176256410
.align 8
.LC36:
.long 0
.long 1080213504
.align 8
.LC37:
.long 0
.long -1067270144
.align 8
.LC39:
.long 0
.long 1097761920
.align 8
.LC40:
.long 1202590843
.long 1065646817
.align 8
.LC51:
.long 0
.long 1075314688
.align 8
.LC52:
.long 0
.long 1079902208
.align 8
.LC53:
.long 0
.long 1085517824
.align 8
.LC54:
.long 0
.long 1091970560
.align 8
.LC55:
.long 0
.long 1099106472
.align 8
.LC58:
.long 0
.long 1073741824
.align 8
.LC59:
.long 0
.long 1077411840
.align 8
.LC60:
.long 0
.long 1082556416
.align 8
.LC61:
.long 0
.long 1088663552
.align 8
.LC62:
.long 0
.long 1095479168
.align 8
.LC63:
.long 0
.long 1074266112
.align 8
.LC64:
.long 0
.long 1075052544
.align 8
.LC65:
.long 0
.long 1075576832
.align 4
.LC67:
.long 1056964608
.align 4
.LC68:
.long 1069547520
.align 16
.LC69:
.long -2147483648
.long 0
.long 0
.long 0
.align 4
.LC70:
.long 1092616192
.align 8
.LC71:
.long -1998362383
.long 1055193269
.align 8
.LC93:
.long 1413754136
.long 1074340347
.align 8
.LC100:
.long 0
.long 1079574528
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "314841.c"
.text
.global X_SIZE_VALUE
.bss
.align 2
.type X_SIZE_VALUE, %object
.size X_SIZE_VALUE, 4
X_SIZE_VALUE:
.space 4
.global overflow_mode
.data
.align 2
.type overflow_mode, %object
.size overflow_mode, 4
overflow_mode:
.word 1
.global rounding_mode
.bss
.align 2
.type rounding_mode, %object
.size rounding_mode, 4
rounding_mode:
.space 4
.text
.align 2
.global __DSVERIFIER_assume
.syntax unified
.arm
.fpu softvfp
.type __DSVERIFIER_assume, %function
__DSVERIFIER_assume:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
mov r3, r0
strb r3, [fp, #-5]
ldrb r3, [fp, #-5] @ zero_extendqisi2
mov r0, r3
bl __ESBMC_assume
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size __DSVERIFIER_assume, .-__DSVERIFIER_assume
.section .rodata
.align 2
.LC0:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/core/compatibility.h\000"
.align 2
.LC1:
.ascii "expression\000"
.text
.align 2
.global __DSVERIFIER_assert
.syntax unified
.arm
.fpu softvfp
.type __DSVERIFIER_assert, %function
__DSVERIFIER_assert:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
mov r3, r0
strb r3, [fp, #-5]
ldrb r3, [fp, #-5] @ zero_extendqisi2
cmp r3, #0
bne .L4
ldr r3, .L5
mov r2, #36
ldr r1, .L5+4
ldr r0, .L5+8
bl __assert_fail
.L4:
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L6:
.align 2
.L5:
.word __PRETTY_FUNCTION__.5216
.word .LC0
.word .LC1
.size __DSVERIFIER_assert, .-__DSVERIFIER_assert
.section .rodata
.align 2
.LC2:
.ascii "%s\000"
.text
.align 2
.global __DSVERIFIER_assert_msg
.syntax unified
.arm
.fpu softvfp
.type __DSVERIFIER_assert_msg, %function
__DSVERIFIER_assert_msg:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
mov r3, r0
str r1, [fp, #-12]
strb r3, [fp, #-5]
ldr r1, [fp, #-12]
ldr r0, .L10
bl printf
ldrb r3, [fp, #-5] @ zero_extendqisi2
cmp r3, #0
bne .L9
ldr r3, .L10+4
mov r2, #41
ldr r1, .L10+8
ldr r0, .L10+12
bl __assert_fail
.L9:
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L11:
.align 2
.L10:
.word .LC2
.word __PRETTY_FUNCTION__.5221
.word .LC0
.word .LC1
.size __DSVERIFIER_assert_msg, .-__DSVERIFIER_assert_msg
.comm _fxp_one,4,4
.comm _fxp_half,4,4
.comm _fxp_minus_one,4,4
.comm _fxp_min,4,4
.comm _fxp_max,4,4
.comm _dbl_max,8,8
.comm _dbl_min,8,8
.comm _fxp_fmask,4,4
.comm _fxp_imask,4,4
.section .rodata
.align 3
.type scale_factor, %object
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.global __aeabi_idiv
.global __aeabi_idivmod
.text
.align 2
.global wrap
.syntax unified
.arm
.fpu softvfp
.type wrap, %function
wrap:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r2, [fp, #-24]
ldr r3, [fp, #-20]
sub r3, r2, r3
add r3, r3, #1
str r3, [fp, #-8]
ldr r2, [fp, #-16]
ldr r3, [fp, #-20]
cmp r2, r3
bge .L13
ldr r2, [fp, #-20]
ldr r3, [fp, #-16]
sub r3, r2, r3
ldr r1, [fp, #-8]
mov r0, r3
bl __aeabi_idiv
mov r3, r0
add r3, r3, #1
ldr r2, [fp, #-8]
mul r3, r2, r3
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-16]
.L13:
ldr r2, [fp, #-16]
ldr r3, [fp, #-20]
sub r3, r2, r3
ldr r1, [fp, #-8]
mov r0, r3
bl __aeabi_idivmod
mov r3, r1
mov r2, r3
ldr r3, [fp, #-20]
add r3, r2, r3
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size wrap, .-wrap
.align 2
.global fxp_get_int_part
.syntax unified
.arm
.fpu softvfp
.type fxp_get_int_part, %function
fxp_get_int_part:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
bge .L16
ldr r3, [fp, #-8]
rsb r2, r3, #0
ldr r3, .L19
ldr r3, [r3]
and r3, r3, r2
rsb r3, r3, #0
b .L18
.L16:
ldr r3, .L19
ldr r2, [r3]
ldr r3, [fp, #-8]
and r3, r3, r2
.L18:
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L20:
.align 2
.L19:
.word _fxp_imask
.size fxp_get_int_part, .-fxp_get_int_part
.align 2
.global fxp_get_frac_part
.syntax unified
.arm
.fpu softvfp
.type fxp_get_frac_part, %function
fxp_get_frac_part:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
bge .L22
ldr r3, [fp, #-8]
rsb r2, r3, #0
ldr r3, .L25
ldr r3, [r3]
and r3, r3, r2
rsb r3, r3, #0
b .L24
.L22:
ldr r3, .L25
ldr r2, [r3]
ldr r3, [fp, #-8]
and r3, r3, r2
.L24:
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L26:
.align 2
.L25:
.word _fxp_fmask
.size fxp_get_frac_part, .-fxp_get_frac_part
.align 2
.global fxp_quantize
.syntax unified
.arm
.fpu softvfp
.type fxp_quantize, %function
fxp_quantize:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r3, .L33
ldr r3, [r3]
cmp r3, #2
bne .L28
ldr r3, .L33+4
ldr r3, [r3]
ldr r2, [fp, #-8]
cmp r2, r3
bge .L29
ldr r3, .L33+4
ldr r3, [r3]
b .L30
.L29:
ldr r3, .L33+8
ldr r3, [r3]
ldr r2, [fp, #-8]
cmp r2, r3
ble .L31
ldr r3, .L33+8
ldr r3, [r3]
b .L30
.L28:
ldr r3, .L33
ldr r3, [r3]
cmp r3, #3
bne .L31
ldr r3, .L33+4
ldr r3, [r3]
ldr r2, [fp, #-8]
cmp r2, r3
blt .L32
ldr r3, .L33+8
ldr r3, [r3]
ldr r2, [fp, #-8]
cmp r2, r3
ble .L31
.L32:
ldr r3, .L33+4
ldr r3, [r3]
ldr r2, .L33+8
ldr r2, [r2]
mov r1, r3
ldr r0, [fp, #-8]
bl wrap
mov r3, r0
b .L30
.L31:
ldr r3, [fp, #-8]
.L30:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L34:
.align 2
.L33:
.word overflow_mode
.word _fxp_min
.word _fxp_max
.size fxp_quantize, .-fxp_quantize
.section .rodata
.align 2
.LC3:
.ascii "An Overflow Occurred in system's output\000"
.text
.align 2
.global fxp_verify_overflow
.syntax unified
.arm
.fpu softvfp
.type fxp_verify_overflow, %function
fxp_verify_overflow:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r0, [fp, #-8]
bl fxp_quantize
ldr r0, .L38
bl printf
ldr r3, .L38+4
ldr r3, [r3]
ldr r2, [fp, #-8]
cmp r2, r3
bgt .L36
ldr r3, .L38+8
ldr r3, [r3]
ldr r2, [fp, #-8]
cmp r2, r3
blt .L36
mov r3, #1
b .L37
.L36:
mov r3, #0
.L37:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L39:
.align 2
.L38:
.word .LC3
.word _fxp_max
.word _fxp_min
.size fxp_verify_overflow, .-fxp_verify_overflow
.align 2
.global fxp_verify_overflow_node
.syntax unified
.arm
.fpu softvfp
.type fxp_verify_overflow_node, %function
fxp_verify_overflow_node:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r1, [fp, #-12]
ldr r0, .L43
bl printf
ldr r3, .L43+4
ldr r3, [r3]
ldr r2, [fp, #-8]
cmp r2, r3
bgt .L41
ldr r3, .L43+8
ldr r3, [r3]
ldr r2, [fp, #-8]
cmp r2, r3
blt .L41
mov r3, #1
b .L42
.L41:
mov r3, #0
.L42:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L44:
.align 2
.L43:
.word .LC2
.word _fxp_max
.word _fxp_min
.size fxp_verify_overflow_node, .-fxp_verify_overflow_node
.align 2
.global fxp_verify_overflow_array
.syntax unified
.arm
.fpu softvfp
.type fxp_verify_overflow_array, %function
fxp_verify_overflow_array:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r3, #0
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-8]
b .L46
.L47:
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r2, [fp, #-16]
add r3, r2, r3
ldr r3, [r3]
mov r0, r3
bl fxp_verify_overflow
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L46:
ldr r2, [fp, #-8]
ldr r3, [fp, #-20]
cmp r2, r3
blt .L47
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fxp_verify_overflow_array, .-fxp_verify_overflow_array
.align 2
.global fxp_int_to_fxp
.syntax unified
.arm
.fpu softvfp
.type fxp_int_to_fxp, %function
fxp_int_to_fxp:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
ldr r3, .L50
ldr r2, [r3]
ldr r3, [fp, #-16]
mul r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L51:
.align 2
.L50:
.word _fxp_one
.size fxp_int_to_fxp, .-fxp_int_to_fxp
.align 2
.global fxp_to_int
.syntax unified
.arm
.fpu softvfp
.type fxp_to_int, %function
fxp_to_int:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L53
ldr r3, .L56
ldr r3, [r3]
ldr r2, [fp, #-8]
add r3, r2, r3
str r3, [fp, #-8]
b .L54
.L53:
ldr r3, .L56
ldr r3, [r3]
ldr r2, [fp, #-8]
sub r3, r2, r3
str r3, [fp, #-8]
.L54:
ldr r3, .L56+4
ldr r3, [r3, #4]
ldr r2, [fp, #-8]
asr r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L57:
.align 2
.L56:
.word _fxp_half
.word impl
.size fxp_to_int, .-fxp_to_int
.global __aeabi_f2d
.global __aeabi_dmul
.global __aeabi_fcmpge
.global __aeabi_dadd
.global __aeabi_d2iz
.global __aeabi_dsub
.align 2
.global fxp_float_to_fxp
.syntax unified
.arm
.fpu softvfp
.type fxp_float_to_fxp, %function
fxp_float_to_fxp:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24] @ float
ldr r0, [fp, #-24] @ float
bl __aeabi_f2d
ldr r3, .L65
ldr r3, [r3, #4]
ldr r2, .L65+4
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r1, #0
ldr r0, [fp, #-24] @ float
bl __aeabi_fcmpge
mov r3, r0
cmp r3, #0
beq .L64
mov r2, #0
ldr r3, .L65+8
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-16]
b .L61
.L64:
mov r2, #0
ldr r3, .L65+8
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-16]
.L61:
ldr r3, [fp, #-16]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L66:
.align 2
.L65:
.word impl
.word scale_factor
.word 1071644672
.size fxp_float_to_fxp, .-fxp_float_to_fxp
.global __aeabi_dcmpge
.global __aeabi_i2d
.global __aeabi_dcmplt
.global __aeabi_dcmpeq
.align 2
.global fxp_double_to_fxp
.syntax unified
.arm
.fpu softvfp
.type fxp_double_to_fxp, %function
fxp_double_to_fxp:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-36]
str r1, [fp, #-32]
ldr r3, .L80
ldr r3, [r3, #4]
ldr r2, .L80+4
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, .L80+8
ldr r3, [r3]
cmp r3, #0
bne .L68
mov r2, #0
mov r3, #0
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L79
mov r2, #0
ldr r3, .L80+12
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-24]
b .L71
.L79:
mov r2, #0
ldr r3, .L80+12
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-24]
b .L71
.L68:
ldr r3, .L80+8
ldr r3, [r3]
cmp r3, #1
bne .L72
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-24]
ldr r0, [fp, #-24]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
mov r3, #0
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L71
mov r2, #0
mov r3, #0
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L71
mov r2, #0
ldr r3, .L80+16
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-24]
b .L71
.L72:
ldr r3, .L80+8
ldr r3, [r3]
cmp r3, #0
bne .L71
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-24]
.L71:
ldr r3, [fp, #-24]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L81:
.align 2
.L80:
.word impl
.word scale_factor
.word rounding_mode
.word 1071644672
.word 1072693248
.size fxp_double_to_fxp, .-fxp_double_to_fxp
.align 2
.global fxp_float_to_fxp_array
.syntax unified
.arm
.fpu softvfp
.type fxp_float_to_fxp_array, %function
fxp_float_to_fxp_array:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
mov r3, #0
str r3, [fp, #-16]
b .L83
.L84:
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r1, [r3] @ float
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r4, r2, r3
mov r0, r1
bl fxp_float_to_fxp
mov r3, r0
str r3, [r4]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L83:
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
cmp r2, r3
blt .L84
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size fxp_float_to_fxp_array, .-fxp_float_to_fxp_array
.align 2
.global fxp_double_to_fxp_array
.syntax unified
.arm
.fpu softvfp
.type fxp_double_to_fxp_array, %function
fxp_double_to_fxp_array:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
mov r3, #0
str r3, [fp, #-16]
b .L86
.L87:
ldr r3, [fp, #-16]
lsl r3, r3, #3
ldr r2, [fp, #-24]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-16]
lsl r1, r1, #2
ldr r0, [fp, #-28]
add r4, r0, r1
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r3, r0
str r3, [r4]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L86:
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
cmp r2, r3
blt .L87
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size fxp_double_to_fxp_array, .-fxp_double_to_fxp_array
.global __aeabi_d2f
.align 2
.global fxp_to_float
.syntax unified
.arm
.fpu softvfp
.type fxp_to_float, %function
fxp_to_float:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r3, [fp, #-16]
str r3, [fp, #-12]
ldr r0, [fp, #-12]
bl __aeabi_i2d
ldr r3, .L90
ldr r3, [r3, #4]
ldr r2, .L90+4
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-8] @ float
ldr r3, [fp, #-8] @ float
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L91:
.align 2
.L90:
.word impl
.word scale_factor_inv
.size fxp_to_float, .-fxp_to_float
.align 2
.global fxp_to_double
.syntax unified
.arm
.fpu softvfp
.type fxp_to_double, %function
fxp_to_double:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
ldr r3, [fp, #-24]
str r3, [fp, #-16]
ldr r0, [fp, #-16]
bl __aeabi_i2d
ldr r3, .L94
ldr r3, [r3, #4]
ldr r2, .L94+4
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L95:
.align 2
.L94:
.word impl
.word scale_factor_inv
.size fxp_to_double, .-fxp_to_double
.align 2
.global fxp_to_float_array
.syntax unified
.arm
.fpu softvfp
.type fxp_to_float_array, %function
fxp_to_float_array:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
mov r3, #0
str r3, [fp, #-16]
b .L97
.L98:
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
ldr r1, [r3]
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r4, r2, r3
mov r0, r1
bl fxp_to_float
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L97:
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
cmp r2, r3
blt .L98
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size fxp_to_float_array, .-fxp_to_float_array
.align 2
.global fxp_to_double_array
.syntax unified
.arm
.fpu softvfp
.type fxp_to_double_array, %function
fxp_to_double_array:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
mov r3, #0
str r3, [fp, #-16]
b .L100
.L101:
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
ldr r1, [r3]
ldr r3, [fp, #-16]
lsl r3, r3, #3
ldr r2, [fp, #-24]
add r4, r2, r3
mov r0, r1
bl fxp_to_double
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L100:
ldr r2, [fp, #-16]
ldr r3, [fp, #-32]
cmp r2, r3
blt .L101
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size fxp_to_double_array, .-fxp_to_double_array
.align 2
.global fxp_abs
.syntax unified
.arm
.fpu softvfp
.type fxp_abs, %function
fxp_abs:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r3, [fp, #-16]
cmp r3, #0
rsblt r3, r3, #0
str r3, [fp, #-8]
ldr r0, [fp, #-8]
bl fxp_quantize
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fxp_abs, .-fxp_abs
.align 2
.global fxp_add
.syntax unified
.arm
.fpu softvfp
.type fxp_add, %function
fxp_add:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r2, [fp, #-16]
ldr r3, [fp, #-20]
add r3, r2, r3
str r3, [fp, #-8]
ldr r0, [fp, #-8]
bl fxp_quantize
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fxp_add, .-fxp_add
.align 2
.global fxp_sub
.syntax unified
.arm
.fpu softvfp
.type fxp_sub, %function
fxp_sub:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r2, [fp, #-16]
ldr r3, [fp, #-20]
sub r3, r2, r3
str r3, [fp, #-8]
ldr r0, [fp, #-8]
bl fxp_quantize
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fxp_sub, .-fxp_sub
.align 2
.global fxp_mult
.syntax unified
.arm
.fpu softvfp
.type fxp_mult, %function
fxp_mult:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-16]
ldr r2, [fp, #-20]
mul r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L109
ldr r3, .L112
ldr r3, [r3, #4]
sub r3, r3, #1
mov r2, #1
lsl r2, r2, r3
ldr r3, [fp, #-8]
and r3, r3, r2
lsl r2, r3, #1
ldr r3, [fp, #-8]
add r2, r2, r3
ldr r3, .L112
ldr r3, [r3, #4]
asr r3, r2, r3
str r3, [fp, #-12]
b .L110
.L109:
ldr r3, [fp, #-8]
rsb r2, r3, #0
ldr r3, .L112
ldr r3, [r3, #4]
sub r3, r3, #1
mov r1, #1
lsl r3, r1, r3
and r3, r3, r2
lsl r2, r3, #1
ldr r3, [fp, #-8]
sub r2, r2, r3
ldr r3, .L112
ldr r3, [r3, #4]
asr r3, r2, r3
rsb r3, r3, #0
str r3, [fp, #-12]
.L110:
ldr r0, [fp, #-12]
bl fxp_quantize
str r0, [fp, #-12]
ldr r3, [fp, #-12]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L113:
.align 2
.L112:
.word impl
.size fxp_mult, .-fxp_mult
.align 2
.global fxp_div
.syntax unified
.arm
.fpu softvfp
.type fxp_div, %function
fxp_div:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-20]
cmp r3, #0
movne r3, #1
moveq r3, #0
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r3, .L116
ldr r3, [r3, #4]
ldr r2, [fp, #-16]
lsl r3, r2, r3
ldr r1, [fp, #-20]
mov r0, r3
bl __aeabi_idiv
mov r3, r0
str r3, [fp, #-8]
ldr r0, [fp, #-8]
bl fxp_quantize
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L117:
.align 2
.L116:
.word impl
.size fxp_div, .-fxp_div
.align 2
.global fxp_neg
.syntax unified
.arm
.fpu softvfp
.type fxp_neg, %function
fxp_neg:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r3, [fp, #-16]
rsb r3, r3, #0
str r3, [fp, #-8]
ldr r0, [fp, #-8]
bl fxp_quantize
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fxp_neg, .-fxp_neg
.align 2
.global fxp_sign
.syntax unified
.arm
.fpu softvfp
.type fxp_sign, %function
fxp_sign:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
beq .L121
ldr r3, [fp, #-8]
cmp r3, #0
bge .L122
ldr r3, .L126
ldr r3, [r3]
b .L125
.L122:
ldr r3, .L126+4
ldr r3, [r3]
b .L125
.L121:
mov r3, #0
.L125:
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L127:
.align 2
.L126:
.word _fxp_minus_one
.word _fxp_one
.size fxp_sign, .-fxp_sign
.align 2
.global fxp_shrl
.syntax unified
.arm
.fpu softvfp
.type fxp_shrl, %function
fxp_shrl:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r2, [fp, #-8]
ldr r3, [fp, #-12]
lsr r3, r2, r3
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size fxp_shrl, .-fxp_shrl
.align 2
.global fxp_square
.syntax unified
.arm
.fpu softvfp
.type fxp_square, %function
fxp_square:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r1, [fp, #-8]
ldr r0, [fp, #-8]
bl fxp_mult
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fxp_square, .-fxp_square
.section .rodata
.align 2
.LC4:
.ascii "\012%i\000"
.text
.align 2
.global fxp_print_int
.syntax unified
.arm
.fpu softvfp
.type fxp_print_int, %function
fxp_print_int:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r1, [fp, #-8]
ldr r0, .L133
bl printf
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L134:
.align 2
.L133:
.word .LC4
.size fxp_print_int, .-fxp_print_int
.section .rodata
.align 2
.LC5:
.ascii "\012%f\000"
.text
.align 2
.global fxp_print_float
.syntax unified
.arm
.fpu softvfp
.type fxp_print_float, %function
fxp_print_float:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r0, [fp, #-8]
bl fxp_to_float
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L136
bl printf
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L137:
.align 2
.L136:
.word .LC5
.size fxp_print_float, .-fxp_print_float
.align 2
.global fxp_print_float_array
.syntax unified
.arm
.fpu softvfp
.type fxp_print_float_array, %function
fxp_print_float_array:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r3, #0
str r3, [fp, #-8]
b .L139
.L140:
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r2, [fp, #-16]
add r3, r2, r3
ldr r3, [r3]
mov r0, r3
bl fxp_to_float
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L141
bl printf
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L139:
ldr r2, [fp, #-8]
ldr r3, [fp, #-20]
cmp r2, r3
blt .L140
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L142:
.align 2
.L141:
.word .LC5
.size fxp_print_float_array, .-fxp_print_float_array
.section .rodata
.align 2
.LC6:
.ascii "%s = {\000"
.align 2
.LC7:
.ascii " %jd \000"
.align 2
.LC8:
.ascii "}\000"
.text
.align 2
.global print_fxp_array_elements
.syntax unified
.arm
.fpu softvfp
.type print_fxp_array_elements, %function
print_fxp_array_elements:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r1, [fp, #-16]
ldr r0, .L146
bl printf
mov r3, #0
str r3, [fp, #-8]
b .L144
.L145:
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
ldr r0, .L146+4
bl printf
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L144:
ldr r2, [fp, #-8]
ldr r3, [fp, #-24]
cmp r2, r3
blt .L145
ldr r0, .L146+8
bl puts
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L147:
.align 2
.L146:
.word .LC6
.word .LC7
.word .LC8
.size print_fxp_array_elements, .-print_fxp_array_elements
.align 2
.global initialize_array
.syntax unified
.arm
.fpu softvfp
.type initialize_array, %function
initialize_array:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r3, #0
str r3, [fp, #-8]
b .L149
.L150:
ldr r3, [fp, #-8]
lsl r3, r3, #3
ldr r2, [fp, #-16]
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L149:
ldr r2, [fp, #-8]
ldr r3, [fp, #-20]
cmp r2, r3
blt .L150
nop
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size initialize_array, .-initialize_array
.align 2
.global revert_array
.syntax unified
.arm
.fpu softvfp
.type revert_array, %function
revert_array:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r1, [fp, #-24]
ldr r0, [fp, #-20]
bl initialize_array
mov r3, #0
str r3, [fp, #-8]
b .L152
.L153:
ldr r2, [fp, #-24]
ldr r3, [fp, #-8]
sub r3, r2, r3
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-16]
add r3, r2, r3
ldr r2, [fp, #-8]
lsl r2, r2, #3
ldr r1, [fp, #-20]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L152:
ldr r2, [fp, #-8]
ldr r3, [fp, #-24]
cmp r2, r3
blt .L153
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size revert_array, .-revert_array
.global __aeabi_dcmpgt
.align 2
.global internal_pow
.syntax unified
.arm
.fpu softvfp
.type internal_pow, %function
internal_pow:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-28]
str r1, [fp, #-24]
str r2, [fp, #-36]
str r3, [fp, #-32]
mov r2, #0
ldr r3, .L158
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-16]
b .L155
.L156:
sub r3, fp, #28
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L155:
ldr r0, [fp, #-16]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
bne .L156
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L159:
.align 2
.L158:
.word 1072693248
.size internal_pow, .-internal_pow
.align 2
.global internal_abs
.syntax unified
.arm
.fpu softvfp
.type internal_abs, %function
internal_abs:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #8
str r0, [fp, #-20]
str r1, [fp, #-16]
mov r2, #0
mov r3, #0
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L166
ldr r4, [fp, #-20]
ldr r3, [fp, #-16]
eor r5, r3, #-2147483648
b .L164
.L166:
sub r5, fp, #20
ldmia r5, {r4-r5}
.L164:
mov r2, r4
mov r3, r5
mov r0, r2
mov r1, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.size internal_abs, .-internal_abs
.align 2
.global fatorial
.syntax unified
.arm
.fpu softvfp
.type fatorial, %function
fatorial:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
beq .L168
ldr r3, [fp, #-8]
sub r3, r3, #1
mov r0, r3
bl fatorial
mov r2, r0
ldr r3, [fp, #-8]
mul r3, r2, r3
b .L170
.L168:
mov r3, #1
.L170:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fatorial, .-fatorial
.global __aeabi_dcmple
.section .rodata
.align 2
.LC9:
.ascii "[DEBUG] the first constraint of Jury criteria faile"
.ascii "d: (F(1) > 0)\000"
.align 2
.LC10:
.ascii "[DEBUG] the second constraint of Jury criteria fail"
.ascii "ed: (F(-1)*(-1)^n > 0)\000"
.align 2
.LC11:
.ascii "[DEBUG] the third constraint of Jury criteria faile"
.ascii "d: (abs(a0) < a_{n}*z^{n})\000"
.global __aeabi_ddiv
.align 2
.LC12:
.word __stack_chk_guard
.text
.align 2
.global check_stability
.syntax unified
.arm
.fpu softvfp
.type check_stability, %function
check_stability:
@ args = 0, pretend = 0, frame = 72
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #76
str r0, [fp, #-104]
str r1, [fp, #-108]
ldr r3, .L213
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
mov r3, sp
mov r10, r3
ldr r3, [fp, #-108]
lsl r3, r3, #1
sub r3, r3, #1
str r3, [fp, #-84]
ldr r3, [fp, #-108]
str r3, [fp, #-92]
ldr ip, [fp, #-108]
ldr lr, [fp, #-84]
sub r3, ip, #1
str r3, [fp, #-80]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r4, r3, #3
sub r3, lr, #1
str r3, [fp, #-76]
mov r3, ip
mov r6, r3
mov r7, #0
mov r3, lr
mov r0, r3
mov r1, #0
mul r2, r0, r7
mul r3, r6, r1
add r5, r2, r3
umull r2, r3, r6, r0
add r1, r5, r3
mov r3, r1
mov r0, #0
mov r1, #0
lsl r1, r3, #6
orr r1, r1, r2, lsr #26
lsl r0, r2, #6
mov r3, ip
mov r6, r3
mov r7, #0
mov r3, lr
mov r0, r3
mov r1, #0
mul r2, r0, r7
mul r3, r6, r1
add r5, r2, r3
umull r2, r3, r6, r0
add r1, r5, r3
mov r3, r1
mov r0, #0
mov r1, #0
lsl r1, r3, #6
orr r1, r1, r2, lsr #26
lsl r0, r2, #6
mov r3, ip
mov r2, lr
mul r3, r2, r3
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-72]
ldr ip, [fp, #-108]
sub r3, ip, #1
str r3, [fp, #-68]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-64]
mov r3, #0
str r3, [fp, #-96]
b .L172
.L173:
ldr r3, [fp, #-96]
lsl r3, r3, #3
ldr r2, [fp, #-104]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r0, [fp, #-64]
ldr r1, [fp, #-96]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L172:
ldr r2, [fp, #-96]
ldr r3, [fp, #-108]
cmp r2, r3
blt .L173
mov r2, #0
mov r3, #0
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-96]
b .L174
.L175:
ldr r3, [fp, #-96]
lsl r3, r3, #3
ldr r2, [fp, #-104]
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L174:
ldr r2, [fp, #-96]
ldr r3, [fp, #-108]
cmp r2, r3
blt .L175
mov r2, #0
mov r3, #0
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L209
ldr r0, .L213+4
bl printf
mov r3, #0
b .L178
.L209:
mov r2, #0
mov r3, #0
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-96]
b .L179
.L180:
ldr r3, [fp, #-96]
lsl r3, r3, #3
ldr r2, [fp, #-104]
add r3, r2, r3
ldmia r3, {r6-r7}
ldr r3, [fp, #-108]
sub r2, r3, #1
ldr r3, [fp, #-96]
sub r3, r2, r3
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L213+8
bl internal_pow
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L179:
ldr r2, [fp, #-96]
ldr r3, [fp, #-108]
cmp r2, r3
blt .L180
ldr r3, [fp, #-108]
sub r3, r3, #1
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L213+8
bl internal_pow
mov r2, r0
mov r3, r1
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r2, #0
mov r3, #0
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L210
ldr r0, .L213+12
bl printf
mov r3, #0
b .L178
.L210:
ldr r3, [fp, #-108]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-104]
add r3, r2, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl internal_abs
ldr r3, [fp, #-104]
ldmia r3, {r2-r3}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L211
ldr r0, .L213+16
bl printf
mov r3, #0
b .L178
.L211:
mov r3, #0
str r3, [fp, #-96]
b .L185
.L188:
mov r3, #0
str r3, [fp, #-100]
b .L186
.L187:
lsr r3, r4, #3
ldr r2, [fp, #-72]
ldr r1, [fp, #-96]
mul r1, r3, r1
ldr r3, [fp, #-100]
add r3, r1, r3
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-100]
add r3, r3, #1
str r3, [fp, #-100]
.L186:
ldr r2, [fp, #-100]
ldr r3, [fp, #-92]
cmp r2, r3
blt .L187
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L185:
ldr r2, [fp, #-96]
ldr r3, [fp, #-84]
cmp r2, r3
blt .L188
mov r3, #0
str r3, [fp, #-96]
b .L189
.L197:
mov r3, #0
str r3, [fp, #-100]
b .L190
.L196:
ldr r3, [fp, #-96]
cmp r3, #0
bne .L191
ldr r3, [fp, #-100]
lsl r3, r3, #3
ldr r2, [fp, #-104]
add r3, r2, r3
lsr r1, r4, #3
ldmia r3, {r2-r3}
ldr r0, [fp, #-72]
ldr ip, [fp, #-96]
mul ip, r1, ip
ldr r1, [fp, #-100]
add r1, ip, r1
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
b .L192
.L191:
ldr r3, [fp, #-96]
and r3, r3, #1
cmp r3, #0
beq .L193
mov r3, #0
str r3, [fp, #-88]
b .L194
.L195:
lsr r0, r4, #3
ldr r3, [fp, #-96]
sub ip, r3, #1
ldr r2, [fp, #-92]
ldr r3, [fp, #-88]
sub r3, r2, r3
sub r3, r3, #1
lsr r1, r4, #3
ldr r2, [fp, #-72]
mul r0, ip, r0
add r3, r0, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r0, [fp, #-72]
ldr ip, [fp, #-96]
mul ip, r1, ip
ldr r1, [fp, #-88]
add r1, ip, r1
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-88]
add r3, r3, #1
str r3, [fp, #-88]
.L194:
ldr r2, [fp, #-88]
ldr r3, [fp, #-92]
cmp r2, r3
blt .L195
ldr r3, [fp, #-92]
sub r3, r3, #1
str r3, [fp, #-92]
ldr r3, [fp, #-92]
str r3, [fp, #-100]
b .L192
.L193:
lsr r3, r4, #3
ldr r2, [fp, #-96]
sub r1, r2, #2
ldr r2, [fp, #-72]
mul r1, r3, r1
ldr r3, [fp, #-100]
add r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r6-r7}
lsr r3, r4, #3
ldr r2, [fp, #-96]
sub r1, r2, #2
ldr r2, [fp, #-72]
mul r1, r3, r1
ldr r3, [fp, #-92]
add r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
lsr r3, r4, #3
ldr r2, [fp, #-96]
sub ip, r2, #2
ldr r2, [fp, #-72]
mul r3, ip, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
lsr r3, r4, #3
ldr r2, [fp, #-96]
sub r1, r2, #1
ldr r2, [fp, #-72]
mul r1, r3, r1
ldr r3, [fp, #-100]
add r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
mov r0, r8
mov r1, r9
bl __aeabi_dmul
mov r2, r0
mov r3, r1
lsr r5, r4, #3
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r0, [fp, #-72]
ldr r1, [fp, #-96]
mul ip, r1, r5
ldr r1, [fp, #-100]
add r1, ip, r1
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
.L192:
ldr r3, [fp, #-100]
add r3, r3, #1
str r3, [fp, #-100]
.L190:
ldr r2, [fp, #-100]
ldr r3, [fp, #-92]
cmp r2, r3
blt .L196
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L189:
ldr r2, [fp, #-96]
ldr r3, [fp, #-84]
cmp r2, r3
blt .L197
ldr r3, [fp, #-72]
ldmia r3, {r0-r1}
mov r3, #1
mov r5, r3
mov r2, #0
mov r3, #0
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
bne .L198
mov r3, #0
mov r5, r3
.L198:
and r3, r5, #255
str r3, [fp, #-60]
mov r3, #0
str r3, [fp, #-96]
b .L199
.L203:
ldr r3, [fp, #-96]
and r3, r3, #1
cmp r3, #0
bne .L200
lsr r3, r4, #3
ldr r2, [fp, #-72]
ldr r1, [fp, #-96]
mul r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
mov r3, #1
mov r5, r3
mov r2, #0
mov r3, #0
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
bne .L201
mov r3, #0
mov r5, r3
.L201:
and r3, r5, #255
str r3, [fp, #-56]
ldr r2, [fp, #-60]
ldr r3, [fp, #-56]
cmp r2, r3
beq .L212
mov r3, #0
b .L178
.L212:
nop
.L200:
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L199:
ldr r2, [fp, #-96]
ldr r3, [fp, #-84]
cmp r2, r3
blt .L203
mov r3, #1
.L178:
mov sp, r10
ldr r2, .L213
ldr r1, [r2]
ldr r2, [fp, #-40]
eors r1, r2, r1
mov r2, #0
beq .L205
bl __stack_chk_fail
.L205:
mov r0, r3
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L214:
.align 2
.L213:
.word .LC12
.word .LC9
.word -1074790400
.word .LC10
.word .LC11
.size check_stability, .-check_stability
.align 2
.global poly_sum
.syntax unified
.arm
.fpu softvfp
.type poly_sum, %function
poly_sum:
@ args = 8, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r2, [fp, #-36]
ldr r3, [fp, #-28]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #8]
mov r3, #0
str r3, [fp, #-16]
b .L216
.L219:
ldr r2, [fp, #-28]
ldr r3, [fp, #-36]
cmp r2, r3
ble .L217
ldr r3, [fp, #-16]
lsl r3, r3, #3
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r2, [fp, #-16]
lsl r2, r2, #3
ldr r1, [fp, #4]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r2, [fp, #-28]
ldr r3, [fp, #-36]
sub r3, r2, r3
ldr r2, [fp, #-16]
cmp r2, r3
blt .L218
ldr r3, [fp, #-16]
lsl r3, r3, #3
ldr r2, [fp, #4]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-16]
ldr r3, [fp, #-28]
sub r2, r2, r3
ldr r3, [fp, #-36]
add r3, r2, r3
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr ip, [fp, #-16]
lsl ip, ip, #3
ldr lr, [fp, #4]
add r4, lr, ip
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
b .L218
.L217:
ldr r3, [fp, #-16]
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-16]
lsl r2, r2, #3
ldr r1, [fp, #4]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r2, [fp, #-36]
ldr r3, [fp, #-28]
sub r3, r2, r3
ldr r2, [fp, #-16]
cmp r2, r3
blt .L218
ldr r3, [fp, #-16]
lsl r3, r3, #3
ldr r2, [fp, #4]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-16]
ldr r3, [fp, #-36]
sub r2, r2, r3
ldr r3, [fp, #-28]
add r3, r2, r3
lsl r3, r3, #3
ldr r2, [fp, #-24]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr ip, [fp, #-16]
lsl ip, ip, #3
ldr lr, [fp, #4]
add r4, lr, ip
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
.L218:
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L216:
ldr r2, [fp, #-16]
ldr r3, [fp, #8]
cmp r2, r3
blt .L219
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size poly_sum, .-poly_sum
.align 2
.global poly_mult
.syntax unified
.arm
.fpu softvfp
.type poly_mult, %function
poly_mult:
@ args = 8, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, fp, lr}
add fp, sp, #16
sub sp, sp, #36
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
ldr r2, [fp, #-44]
ldr r3, [fp, #-52]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #8]
mov r3, #0
str r3, [fp, #-32]
b .L221
.L224:
mov r3, #0
str r3, [fp, #-28]
b .L222
.L223:
ldr r2, [fp, #-44]
ldr r3, [fp, #-52]
add r2, r2, r3
ldr r3, [fp, #-32]
sub r2, r2, r3
ldr r3, [fp, #-28]
sub r3, r2, r3
sub r3, r3, #2
str r3, [fp, #-24]
ldr r3, [fp, #-24]
lsl r3, r3, #3
ldr r2, [fp, #4]
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L222:
ldr r2, [fp, #-28]
ldr r3, [fp, #-52]
cmp r2, r3
blt .L223
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L221:
ldr r2, [fp, #-32]
ldr r3, [fp, #-44]
cmp r2, r3
blt .L224
mov r3, #0
str r3, [fp, #-32]
b .L225
.L228:
mov r3, #0
str r3, [fp, #-28]
b .L226
.L227:
ldr r2, [fp, #-44]
ldr r3, [fp, #-52]
add r2, r2, r3
ldr r3, [fp, #-32]
sub r2, r2, r3
ldr r3, [fp, #-28]
sub r3, r2, r3
sub r3, r3, #2
str r3, [fp, #-24]
ldr r3, [fp, #-24]
lsl r3, r3, #3
ldr r2, [fp, #4]
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r2, [fp, #-44]
ldr r3, [fp, #-32]
sub r3, r2, r3
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-52]
ldr r3, [fp, #-28]
sub r3, r2, r3
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-24]
lsl r3, r3, #3
ldr r2, [fp, #4]
add r6, r2, r3
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r6, {r2-r3}
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L226:
ldr r2, [fp, #-28]
ldr r3, [fp, #-52]
cmp r2, r3
blt .L227
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L225:
ldr r2, [fp, #-32]
ldr r3, [fp, #-44]
cmp r2, r3
blt .L228
nop
nop
sub sp, fp, #16
@ sp needed
pop {r4, r5, r6, fp, pc}
.size poly_mult, .-poly_mult
.section .rodata
.align 2
.LC13:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/core/util.h\000"
.align 2
.LC14:
.ascii "!(window_count == window_size)\000"
.text
.align 2
.global double_check_oscillations
.syntax unified
.arm
.fpu softvfp
.type double_check_oscillations, %function
double_check_oscillations:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #36
str r0, [fp, #-40]
str r1, [fp, #-44]
ldr r3, [fp, #-40]
ldmia r3, {r0-r1}
ldr r3, [fp, #-44]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r2-r3}
mov ip, #1
mov r4, ip
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L230
mov r3, #0
mov r4, r3
.L230:
and r3, r4, #255
mov r0, r3
bl __DSVERIFIER_assume
mov r3, #0
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-32]
mov r3, #2
str r3, [fp, #-28]
b .L231
.L239:
ldr r3, [fp, #-28]
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-24]
b .L232
.L238:
ldr r2, [fp, #-36]
ldr r3, [fp, #-20]
cmp r2, r3
ble .L233
mov r3, #0
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-32]
.L233:
ldr r2, [fp, #-24]
ldr r3, [fp, #-20]
add r3, r2, r3
str r3, [fp, #-16]
ldr r2, [fp, #-16]
ldr r3, [fp, #-44]
cmp r2, r3
bge .L241
ldr r3, [fp, #-24]
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-16]
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L235
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
ldr r2, [fp, #-32]
ldr r3, [fp, #-20]
cmp r2, r3
bne .L235
ldr r3, .L242
mov r2, #209
ldr r1, .L242+4
ldr r0, .L242+8
bl __assert_fail
.L235:
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L232:
ldr r2, [fp, #-24]
ldr r3, [fp, #-44]
cmp r2, r3
blt .L238
b .L237
.L241:
nop
.L237:
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L231:
ldr r2, [fp, #-28]
ldr r3, [fp, #-44]
cmp r2, r3
blt .L239
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L243:
.align 2
.L242:
.word __PRETTY_FUNCTION__.5564
.word .LC13
.word .LC14
.size double_check_oscillations, .-double_check_oscillations
.section .rodata
.align 2
.LC15:
.ascii "window_size %d\012\000"
.align 2
.LC16:
.ascii "%.0f == %.0f\012\000"
.align 2
.LC17:
.ascii "desired_elements %d\012\000"
.align 2
.LC18:
.ascii "found_elements %d\012\000"
.text
.align 2
.global double_check_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type double_check_limit_cycle, %function
double_check_limit_cycle:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
ldr r3, [fp, #-44]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-32]
mov r3, #1
str r3, [fp, #-28]
ldr r3, [fp, #-44]
sub r3, r3, #2
str r3, [fp, #-32]
b .L245
.L250:
ldr r3, [fp, #-32]
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L258
b .L249
.L258:
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
ldr r3, [fp, #-32]
sub r3, r3, #1
str r3, [fp, #-32]
.L245:
ldr r3, [fp, #-32]
cmp r3, #0
bge .L250
.L249:
ldr r2, [fp, #-28]
ldr r3, [fp, #-44]
cmp r2, r3
beq .L251
ldr r3, [fp, #-28]
cmp r3, #1
beq .L251
mov r3, #1
b .L252
.L251:
mov r3, #0
.L252:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r1, [fp, #-28]
ldr r0, .L260
bl printf
ldr r3, [fp, #-28]
lsl r3, r3, #1
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-24]
ldr r3, [fp, #-44]
sub r3, r3, #1
str r3, [fp, #-32]
b .L253
.L257:
ldr r2, [fp, #-44]
ldr r3, [fp, #-28]
sub r3, r2, r3
ldr r2, [fp, #-32]
cmp r2, r3
blt .L254
ldr r3, [fp, #-32]
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-32]
ldr r3, [fp, #-28]
sub r3, r2, r3
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r2-r3}
stm sp, {r2-r3}
mov r2, r0
mov r3, r1
ldr r0, .L260+4
bl printf
ldr r2, [fp, #-32]
ldr r3, [fp, #-28]
sub r3, r2, r3
str r3, [fp, #-16]
ldr r3, [fp, #-16]
cmp r3, #0
ble .L255
ldr r3, [fp, #-32]
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-32]
ldr r3, [fp, #-28]
sub r3, r2, r3
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L255
ldr r3, [fp, #-24]
add r3, r3, #2
str r3, [fp, #-24]
.L254:
ldr r3, [fp, #-32]
sub r3, r3, #1
str r3, [fp, #-32]
.L253:
ldr r3, [fp, #-32]
cmp r3, #0
bge .L257
.L255:
ldr r1, [fp, #-20]
ldr r0, .L260+8
bl printf
ldr r1, [fp, #-24]
ldr r0, .L260+12
bl printf
ldr r2, [fp, #-20]
ldr r3, [fp, #-24]
cmp r2, r3
movne r3, #1
moveq r3, #0
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L261:
.align 2
.L260:
.word .LC15
.word .LC16
.word .LC17
.word .LC18
.size double_check_limit_cycle, .-double_check_limit_cycle
.section .rodata
.align 2
.LC19:
.word __stack_chk_guard
.text
.align 2
.global double_check_persistent_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type double_check_persistent_limit_cycle, %function
double_check_persistent_limit_cycle:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #60
str r0, [fp, #-64]
str r1, [fp, #-68]
ldr r3, .L288
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, #0
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-44]
ldr r3, [fp, #-64]
ldmia r3, {r2-r3}
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-48]
b .L263
.L269:
ldr r3, [fp, #-48]
lsl r3, r3, #3
ldr r2, [fp, #-64]
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L284
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
b .L266
.L284:
ldr r3, [fp, #-44]
cmp r3, #0
bne .L287
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L266:
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L263:
ldr r2, [fp, #-48]
ldr r3, [fp, #-68]
cmp r2, r3
blt .L269
b .L268
.L287:
nop
.L268:
ldr r2, [fp, #-44]
ldr r3, [fp, #-52]
add r3, r2, r3
str r3, [fp, #-44]
ldr r3, [fp, #-44]
cmp r3, #1
ble .L270
ldr r3, [fp, #-68]
lsr r2, r3, #31
add r3, r2, r3
asr r3, r3, #1
mov r2, r3
ldr r3, [fp, #-44]
cmp r3, r2
bgt .L270
mov r3, #1
b .L271
.L270:
mov r3, #0
.L271:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr ip, [fp, #-44]
mov r3, sp
mov r4, r3
sub r3, ip, #1
str r3, [fp, #-36]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-32]
mov r3, #0
str r3, [fp, #-48]
b .L272
.L274:
ldr r2, [fp, #-48]
ldr r3, [fp, #-44]
cmp r2, r3
bge .L273
ldr r3, [fp, #-48]
lsl r3, r3, #3
ldr r2, [fp, #-64]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r0, [fp, #-32]
ldr r1, [fp, #-48]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
.L273:
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L272:
ldr r2, [fp, #-48]
ldr r3, [fp, #-68]
cmp r2, r3
blt .L274
mov r3, #0
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-40]
mov r3, #0
strb r3, [fp, #-53]
b .L275
.L280:
ldr r3, [fp, #-48]
add r2, r3, #1
str r2, [fp, #-48]
lsl r3, r3, #3
ldr r2, [fp, #-64]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-40]
add r2, r3, #1
str r2, [fp, #-40]
ldr r2, [fp, #-32]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L285
mov r3, #1
strb r3, [fp, #-53]
ldr r2, [fp, #-40]
ldr r3, [fp, #-44]
cmp r2, r3
bne .L275
b .L286
.L285:
mov r3, #0
strb r3, [fp, #-53]
b .L279
.L286:
mov r3, #0
str r3, [fp, #-40]
.L275:
ldr r2, [fp, #-48]
ldr r3, [fp, #-68]
cmp r2, r3
blt .L280
.L279:
ldrb r3, [fp, #-53] @ zero_extendqisi2
cmp r3, #0
movne r3, #1
moveq r3, #0
and r3, r3, #255
eor r3, r3, #1
and r3, r3, #255
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
mov sp, r4
nop
ldr r3, .L288
ldr r2, [r3]
ldr r3, [fp, #-16]
eors r2, r3, r2
mov r3, #0
beq .L281
bl __stack_chk_fail
.L281:
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L289:
.align 2
.L288:
.word .LC19
.size double_check_persistent_limit_cycle, .-double_check_persistent_limit_cycle
.section .rodata
.align 2
.LC20:
.ascii " %.32f \000"
.text
.align 2
.global print_array_elements
.syntax unified
.arm
.fpu softvfp
.type print_array_elements, %function
print_array_elements:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r1, [fp, #-16]
ldr r0, .L293
bl printf
mov r3, #0
str r3, [fp, #-8]
b .L291
.L292:
ldr r3, [fp, #-8]
lsl r3, r3, #3
ldr r2, [fp, #-20]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r0, .L293+4
bl printf
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L291:
ldr r2, [fp, #-8]
ldr r3, [fp, #-24]
cmp r2, r3
blt .L292
ldr r0, .L293+8
bl puts
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L294:
.align 2
.L293:
.word .LC6
.word .LC20
.word .LC8
.size print_array_elements, .-print_array_elements
.align 2
.global double_add_matrix
.syntax unified
.arm
.fpu softvfp
.type double_add_matrix, %function
double_add_matrix:
@ args = 4, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-20]
b .L296
.L299:
mov r3, #0
str r3, [fp, #-16]
b .L297
.L298:
ldr r3, [fp, #-20]
lsl r3, r3, #5
ldr r2, [fp, #-32]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-20]
lsl r3, r3, #5
ldr r2, [fp, #-36]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr ip, [fp, #-20]
lsl ip, ip, #5
ldr lr, [fp, #4]
add r4, lr, ip
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r1, [fp, #-16]
lsl r1, r1, #3
add r1, r4, r1
stm r1, {r2-r3}
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L297:
ldr r2, [fp, #-16]
ldr r3, [fp, #-28]
cmp r2, r3
bcc .L298
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L296:
ldr r2, [fp, #-20]
ldr r3, [fp, #-24]
cmp r2, r3
bcc .L299
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size double_add_matrix, .-double_add_matrix
.align 2
.global double_sub_matrix
.syntax unified
.arm
.fpu softvfp
.type double_sub_matrix, %function
double_sub_matrix:
@ args = 4, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-20]
b .L301
.L304:
mov r3, #0
str r3, [fp, #-16]
b .L302
.L303:
ldr r3, [fp, #-20]
lsl r3, r3, #5
ldr r2, [fp, #-32]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-20]
lsl r3, r3, #5
ldr r2, [fp, #-36]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr ip, [fp, #-20]
lsl ip, ip, #5
ldr lr, [fp, #4]
add r4, lr, ip
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, [fp, #-16]
lsl r1, r1, #3
add r1, r4, r1
stm r1, {r2-r3}
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L302:
ldr r2, [fp, #-16]
ldr r3, [fp, #-28]
cmp r2, r3
bcc .L303
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L301:
ldr r2, [fp, #-20]
ldr r3, [fp, #-24]
cmp r2, r3
bcc .L304
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size double_sub_matrix, .-double_sub_matrix
.section .rodata
.align 2
.LC21:
.ascii "\012Error! Operation invalid, please enter with val"
.ascii "id matrices.\000"
.text
.align 2
.global double_matrix_multiplication
.syntax unified
.arm
.fpu softvfp
.type double_matrix_multiplication, %function
double_matrix_multiplication:
@ args = 12, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, fp, lr}
add fp, sp, #16
sub sp, sp, #44
str r0, [fp, #-48]
str r1, [fp, #-52]
str r2, [fp, #-56]
str r3, [fp, #-60]
ldr r2, [fp, #-52]
ldr r3, [fp, #-56]
cmp r2, r3
bne .L306
mov r3, #0
str r3, [fp, #-40]
b .L307
.L310:
mov r3, #0
str r3, [fp, #-36]
b .L308
.L309:
ldr r3, [fp, #-40]
lsl r3, r3, #5
ldr r2, [fp, #12]
add r2, r2, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L308:
ldr r2, [fp, #-36]
ldr r3, [fp, #-60]
cmp r2, r3
bcc .L309
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L307:
ldr r2, [fp, #-40]
ldr r3, [fp, #-48]
cmp r2, r3
bcc .L310
mov r3, #0
str r3, [fp, #-40]
b .L311
.L316:
mov r3, #0
str r3, [fp, #-36]
b .L312
.L315:
mov r3, #0
str r3, [fp, #-32]
b .L313
.L314:
ldr r3, [fp, #-40]
lsl r3, r3, #5
ldr r2, [fp, #4]
add r2, r2, r3
ldr r3, [fp, #-32]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
lsl r3, r3, #5
ldr r2, [fp, #8]
add r2, r2, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
lsl r3, r3, #5
ldr r2, [fp, #12]
add r2, r2, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r3, [fp, #-40]
lsl r3, r3, #5
ldr r2, [fp, #4]
add r2, r2, r3
ldr r3, [fp, #-32]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
lsl r3, r3, #5
ldr r2, [fp, #8]
add r2, r2, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-40]
lsl r3, r3, #5
ldr r2, [fp, #12]
add r6, r2, r3
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r1, [fp, #-36]
lsl r1, r1, #3
add r1, r6, r1
stm r1, {r2-r3}
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L313:
ldr r2, [fp, #-32]
ldr r3, [fp, #-52]
cmp r2, r3
bcc .L314
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L312:
ldr r2, [fp, #-36]
ldr r3, [fp, #-60]
cmp r2, r3
bcc .L315
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L311:
ldr r2, [fp, #-40]
ldr r3, [fp, #-48]
cmp r2, r3
bcc .L316
b .L318
.L306:
ldr r0, .L319
bl puts
.L318:
nop
sub sp, fp, #16
@ sp needed
pop {r4, r5, r6, fp, pc}
.L320:
.align 2
.L319:
.word .LC21
.size double_matrix_multiplication, .-double_matrix_multiplication
.align 2
.global fxp_matrix_multiplication
.syntax unified
.arm
.fpu softvfp
.type fxp_matrix_multiplication, %function
fxp_matrix_multiplication:
@ args = 12, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #32
str r0, [fp, #-32]
str r1, [fp, #-36]
str r2, [fp, #-40]
str r3, [fp, #-44]
ldr r2, [fp, #-36]
ldr r3, [fp, #-40]
cmp r2, r3
bne .L322
mov r3, #0
str r3, [fp, #-24]
b .L323
.L326:
mov r3, #0
str r3, [fp, #-20]
b .L324
.L325:
ldr r3, [fp, #-24]
lsl r3, r3, #4
ldr r2, [fp, #12]
add r3, r2, r3
ldr r2, [fp, #-20]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L324:
ldr r2, [fp, #-20]
ldr r3, [fp, #-44]
cmp r2, r3
bcc .L325
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L323:
ldr r2, [fp, #-24]
ldr r3, [fp, #-32]
cmp r2, r3
bcc .L326
mov r3, #0
str r3, [fp, #-24]
b .L327
.L332:
mov r3, #0
str r3, [fp, #-20]
b .L328
.L331:
mov r3, #0
str r3, [fp, #-16]
b .L329
.L330:
ldr r3, [fp, #-24]
lsl r3, r3, #4
ldr r2, [fp, #12]
add r3, r2, r3
ldr r2, [fp, #-20]
ldr r5, [r3, r2, lsl #2]
ldr r3, [fp, #-24]
lsl r3, r3, #4
ldr r2, [fp, #4]
add r3, r2, r3
ldr r2, [fp, #-16]
ldr r0, [r3, r2, lsl #2]
ldr r3, [fp, #-16]
lsl r3, r3, #4
ldr r2, [fp, #8]
add r3, r2, r3
ldr r2, [fp, #-20]
ldr r3, [r3, r2, lsl #2]
mov r1, r3
bl fxp_mult
mov r1, r0
ldr r3, [fp, #-24]
lsl r3, r3, #4
ldr r2, [fp, #12]
add r4, r2, r3
mov r0, r5
bl fxp_add
mov r2, r0
ldr r3, [fp, #-20]
str r2, [r4, r3, lsl #2]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L329:
ldr r2, [fp, #-16]
ldr r3, [fp, #-36]
cmp r2, r3
bcc .L330
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L328:
ldr r2, [fp, #-20]
ldr r3, [fp, #-44]
cmp r2, r3
bcc .L331
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L327:
ldr r2, [fp, #-24]
ldr r3, [fp, #-32]
cmp r2, r3
bcc .L332
b .L334
.L322:
ldr r0, .L335
bl puts
.L334:
nop
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L336:
.align 2
.L335:
.word .LC21
.size fxp_matrix_multiplication, .-fxp_matrix_multiplication
.section .rodata
.align 2
.LC22:
.word __stack_chk_guard
.text
.align 2
.global fxp_exp_matrix
.syntax unified
.arm
.fpu softvfp
.type fxp_exp_matrix, %function
fxp_exp_matrix:
@ args = 4, pretend = 0, frame = 112
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #112
str r0, [fp, #-104]
str r1, [fp, #-108]
str r2, [fp, #-112]
str r3, [fp, #-116]
ldr r3, [fp, #4]
str r3, [fp, #-120]
ldr r3, .L370
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
ldr r3, [fp, #-116]
cmp r3, #0
bne .L338
mov r3, #0
str r3, [fp, #-96]
b .L339
.L344:
mov r3, #0
str r3, [fp, #-92]
b .L340
.L343:
ldr r2, [fp, #-96]
ldr r3, [fp, #-92]
cmp r2, r3
bne .L341
ldr r3, [fp, #-96]
lsl r3, r3, #4
ldr r2, [fp, #-120]
add r4, r2, r3
mov r0, #0
ldr r1, .L370+4
bl fxp_double_to_fxp
mov r2, r0
ldr r3, [fp, #-92]
str r2, [r4, r3, lsl #2]
b .L342
.L341:
ldr r3, [fp, #-96]
lsl r3, r3, #4
ldr r2, [fp, #-120]
add r3, r2, r3
ldr r2, [fp, #-92]
mov r1, #0
str r1, [r3, r2, lsl #2]
.L342:
ldr r3, [fp, #-92]
add r3, r3, #1
str r3, [fp, #-92]
.L340:
ldr r2, [fp, #-92]
ldr r3, [fp, #-108]
cmp r2, r3
bcc .L343
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L339:
ldr r2, [fp, #-96]
ldr r3, [fp, #-104]
cmp r2, r3
bcc .L344
b .L337
.L338:
mov r3, #0
str r3, [fp, #-96]
b .L346
.L349:
mov r3, #0
str r3, [fp, #-92]
b .L347
.L348:
ldr r3, [fp, #-96]
lsl r3, r3, #4
ldr r2, [fp, #-112]
add r2, r2, r3
ldr r3, [fp, #-96]
lsl r3, r3, #4
ldr r1, [fp, #-120]
add r3, r1, r3
ldr r1, [fp, #-92]
ldr r1, [r2, r1, lsl #2]
ldr r2, [fp, #-92]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-92]
add r3, r3, #1
str r3, [fp, #-92]
.L347:
ldr r2, [fp, #-92]
ldr r3, [fp, #-108]
cmp r2, r3
bcc .L348
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L346:
ldr r2, [fp, #-96]
ldr r3, [fp, #-104]
cmp r2, r3
bcc .L349
ldr r3, [fp, #-116]
cmp r3, #1
beq .L369
mov r3, #1
str r3, [fp, #-88]
b .L351
.L366:
mov r3, #0
str r3, [fp, #-96]
b .L352
.L355:
mov r3, #0
str r3, [fp, #-92]
b .L353
.L354:
ldr r3, [fp, #-96]
lsl r3, r3, #4
ldr r2, [fp, #-120]
add r3, r2, r3
ldr r2, [fp, #-92]
ldr r2, [r3, r2, lsl #2]
ldr r3, [fp, #-96]
lsl r1, r3, #2
ldr r3, [fp, #-92]
add r3, r1, r3
lsl r3, r3, #2
sub r1, fp, #12
add r3, r1, r3
str r2, [r3, #-68]
ldr r3, [fp, #-92]
add r3, r3, #1
str r3, [fp, #-92]
.L353:
ldr r2, [fp, #-92]
ldr r3, [fp, #-108]
cmp r2, r3
bcc .L354
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L352:
ldr r2, [fp, #-96]
ldr r3, [fp, #-104]
cmp r2, r3
bcc .L355
mov r3, #0
str r3, [fp, #-96]
b .L356
.L359:
mov r3, #0
str r3, [fp, #-92]
b .L357
.L358:
ldr r3, [fp, #-96]
lsl r3, r3, #4
ldr r2, [fp, #-120]
add r3, r2, r3
ldr r2, [fp, #-92]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-92]
add r3, r3, #1
str r3, [fp, #-92]
.L357:
ldr r2, [fp, #-92]
ldr r3, [fp, #-108]
cmp r2, r3
bcc .L358
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L356:
ldr r2, [fp, #-96]
ldr r3, [fp, #-104]
cmp r2, r3
bcc .L359
mov r3, #0
str r3, [fp, #-96]
b .L360
.L365:
mov r3, #0
str r3, [fp, #-92]
b .L361
.L364:
mov r3, #0
str r3, [fp, #-84]
b .L362
.L363:
ldr r3, [fp, #-96]
lsl r3, r3, #4
ldr r2, [fp, #-120]
add r3, r2, r3
ldr r2, [fp, #-92]
ldr r5, [r3, r2, lsl #2]
ldr r3, [fp, #-96]
lsl r2, r3, #2
ldr r3, [fp, #-84]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #12
add r3, r2, r3
ldr r0, [r3, #-68]
ldr r3, [fp, #-84]
lsl r3, r3, #4
ldr r2, [fp, #-112]
add r3, r2, r3
ldr r2, [fp, #-92]
ldr r3, [r3, r2, lsl #2]
mov r1, r3
bl fxp_mult
mov r1, r0
ldr r3, [fp, #-96]
lsl r3, r3, #4
ldr r2, [fp, #-120]
add r4, r2, r3
mov r0, r5
bl fxp_add
mov r2, r0
ldr r3, [fp, #-92]
str r2, [r4, r3, lsl #2]
ldr r3, [fp, #-84]
add r3, r3, #1
str r3, [fp, #-84]
.L362:
ldr r2, [fp, #-84]
ldr r3, [fp, #-108]
cmp r2, r3
bcc .L363
ldr r3, [fp, #-92]
add r3, r3, #1
str r3, [fp, #-92]
.L361:
ldr r2, [fp, #-92]
ldr r3, [fp, #-108]
cmp r2, r3
bcc .L364
ldr r3, [fp, #-96]
add r3, r3, #1
str r3, [fp, #-96]
.L360:
ldr r2, [fp, #-96]
ldr r3, [fp, #-104]
cmp r2, r3
bcc .L365
ldr r3, [fp, #-88]
add r3, r3, #1
str r3, [fp, #-88]
.L351:
ldr r2, [fp, #-88]
ldr r3, [fp, #-116]
cmp r2, r3
bcc .L366
b .L337
.L369:
nop
.L337:
ldr r3, .L370
ldr r2, [r3]
ldr r3, [fp, #-16]
eors r2, r3, r2
mov r3, #0
beq .L368
bl __stack_chk_fail
.L368:
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L371:
.align 2
.L370:
.word .LC22
.word 1072693248
.size fxp_exp_matrix, .-fxp_exp_matrix
.section .rodata
.align 2
.LC23:
.word __stack_chk_guard
.text
.align 2
.global double_exp_matrix
.syntax unified
.arm
.fpu softvfp
.type double_exp_matrix, %function
double_exp_matrix:
@ args = 4, pretend = 0, frame = 176
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, fp, lr}
add fp, sp, #16
sub sp, sp, #180
str r0, [fp, #-176]
str r1, [fp, #-180]
str r2, [fp, #-184]
str r3, [fp, #-188]
ldr r3, [fp, #4]
str r3, [fp, #-192]
ldr r3, .L405
ldr r3, [r3]
str r3, [fp, #-24]
mov r3,#0
ldr r3, [fp, #-188]
cmp r3, #0
bne .L373
mov r3, #0
str r3, [fp, #-172]
b .L374
.L379:
mov r3, #0
str r3, [fp, #-168]
b .L375
.L378:
ldr r2, [fp, #-172]
ldr r3, [fp, #-168]
cmp r2, r3
bne .L376
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r2, [fp, #-192]
add r2, r2, r3
ldr r3, [fp, #-168]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
ldr r3, .L405+4
stm r1, {r2-r3}
b .L377
.L376:
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r2, [fp, #-192]
add r2, r2, r3
ldr r3, [fp, #-168]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
.L377:
ldr r3, [fp, #-168]
add r3, r3, #1
str r3, [fp, #-168]
.L375:
ldr r2, [fp, #-168]
ldr r3, [fp, #-180]
cmp r2, r3
bcc .L378
ldr r3, [fp, #-172]
add r3, r3, #1
str r3, [fp, #-172]
.L374:
ldr r2, [fp, #-172]
ldr r3, [fp, #-176]
cmp r2, r3
bcc .L379
b .L372
.L373:
mov r3, #0
str r3, [fp, #-172]
b .L381
.L384:
mov r3, #0
str r3, [fp, #-168]
b .L382
.L383:
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r2, [fp, #-184]
add r2, r2, r3
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r1, [fp, #-192]
add r0, r1, r3
ldr r3, [fp, #-168]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-168]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-168]
add r3, r3, #1
str r3, [fp, #-168]
.L382:
ldr r2, [fp, #-168]
ldr r3, [fp, #-180]
cmp r2, r3
bcc .L383
ldr r3, [fp, #-172]
add r3, r3, #1
str r3, [fp, #-172]
.L381:
ldr r2, [fp, #-172]
ldr r3, [fp, #-176]
cmp r2, r3
bcc .L384
ldr r3, [fp, #-188]
cmp r3, #1
beq .L404
mov r3, #1
str r3, [fp, #-160]
b .L386
.L401:
mov r3, #0
str r3, [fp, #-172]
b .L387
.L390:
mov r3, #0
str r3, [fp, #-168]
b .L388
.L389:
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r2, [fp, #-192]
add r2, r2, r3
ldr r3, [fp, #-168]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-172]
lsl r0, r1, #2
ldr r1, [fp, #-168]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #20
add r1, r0, r1
sub r1, r1, #136
stm r1, {r2-r3}
ldr r3, [fp, #-168]
add r3, r3, #1
str r3, [fp, #-168]
.L388:
ldr r2, [fp, #-168]
ldr r3, [fp, #-180]
cmp r2, r3
bcc .L389
ldr r3, [fp, #-172]
add r3, r3, #1
str r3, [fp, #-172]
.L387:
ldr r2, [fp, #-172]
ldr r3, [fp, #-176]
cmp r2, r3
bcc .L390
mov r3, #0
str r3, [fp, #-172]
b .L391
.L394:
mov r3, #0
str r3, [fp, #-168]
b .L392
.L393:
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r2, [fp, #-192]
add r2, r2, r3
ldr r3, [fp, #-168]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-168]
add r3, r3, #1
str r3, [fp, #-168]
.L392:
ldr r2, [fp, #-168]
ldr r3, [fp, #-180]
cmp r2, r3
bcc .L393
ldr r3, [fp, #-172]
add r3, r3, #1
str r3, [fp, #-172]
.L391:
ldr r2, [fp, #-172]
ldr r3, [fp, #-176]
cmp r2, r3
bcc .L394
mov r3, #0
str r3, [fp, #-172]
b .L395
.L400:
mov r3, #0
str r3, [fp, #-168]
b .L396
.L399:
mov r3, #0
str r3, [fp, #-164]
b .L397
.L398:
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r2, [fp, #-192]
add r2, r2, r3
ldr r3, [fp, #-168]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r3, [fp, #-172]
lsl r2, r3, #2
ldr r3, [fp, #-164]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #20
add r3, r2, r3
sub r3, r3, #136
ldmia r3, {r0-r1}
ldr r3, [fp, #-164]
lsl r3, r3, #5
ldr r2, [fp, #-184]
add r2, r2, r3
ldr r3, [fp, #-168]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r2, [fp, #-192]
add r6, r2, r3
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r1, [fp, #-168]
lsl r1, r1, #3
add r1, r6, r1
stm r1, {r2-r3}
ldr r3, [fp, #-164]
add r3, r3, #1
str r3, [fp, #-164]
.L397:
ldr r2, [fp, #-164]
ldr r3, [fp, #-180]
cmp r2, r3
bcc .L398
ldr r3, [fp, #-168]
add r3, r3, #1
str r3, [fp, #-168]
.L396:
ldr r2, [fp, #-168]
ldr r3, [fp, #-180]
cmp r2, r3
bcc .L399
ldr r3, [fp, #-172]
add r3, r3, #1
str r3, [fp, #-172]
.L395:
ldr r2, [fp, #-172]
ldr r3, [fp, #-176]
cmp r2, r3
bcc .L400
ldr r3, [fp, #-160]
add r3, r3, #1
str r3, [fp, #-160]
.L386:
ldr r2, [fp, #-160]
ldr r3, [fp, #-188]
cmp r2, r3
bcc .L401
b .L372
.L404:
nop
.L372:
ldr r3, .L405
ldr r2, [r3]
ldr r3, [fp, #-24]
eors r2, r3, r2
mov r3, #0
beq .L403
bl __stack_chk_fail
.L403:
sub sp, fp, #16
@ sp needed
pop {r4, r5, r6, fp, pc}
.L406:
.align 2
.L405:
.word .LC23
.word 1072693248
.size double_exp_matrix, .-double_exp_matrix
.align 2
.global fxp_add_matrix
.syntax unified
.arm
.fpu softvfp
.type fxp_add_matrix, %function
fxp_add_matrix:
@ args = 4, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-20]
b .L408
.L411:
mov r3, #0
str r3, [fp, #-16]
b .L409
.L410:
ldr r3, [fp, #-20]
lsl r3, r3, #4
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-16]
ldr r0, [r3, r2, lsl #2]
ldr r3, [fp, #-20]
lsl r3, r3, #4
ldr r2, [fp, #-36]
add r3, r2, r3
ldr r2, [fp, #-16]
ldr r1, [r3, r2, lsl #2]
ldr r3, [fp, #-20]
lsl r3, r3, #4
ldr r2, [fp, #4]
add r4, r2, r3
bl fxp_add
mov r2, r0
ldr r3, [fp, #-16]
str r2, [r4, r3, lsl #2]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L409:
ldr r2, [fp, #-16]
ldr r3, [fp, #-28]
cmp r2, r3
bcc .L410
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L408:
ldr r2, [fp, #-20]
ldr r3, [fp, #-24]
cmp r2, r3
bcc .L411
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size fxp_add_matrix, .-fxp_add_matrix
.align 2
.global fxp_sub_matrix
.syntax unified
.arm
.fpu softvfp
.type fxp_sub_matrix, %function
fxp_sub_matrix:
@ args = 4, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-20]
b .L413
.L416:
mov r3, #0
str r3, [fp, #-16]
b .L414
.L415:
ldr r3, [fp, #-20]
lsl r3, r3, #4
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-16]
ldr r0, [r3, r2, lsl #2]
ldr r3, [fp, #-20]
lsl r3, r3, #4
ldr r2, [fp, #-36]
add r3, r2, r3
ldr r2, [fp, #-16]
ldr r1, [r3, r2, lsl #2]
ldr r3, [fp, #-20]
lsl r3, r3, #4
ldr r2, [fp, #4]
add r4, r2, r3
bl fxp_sub
mov r2, r0
ldr r3, [fp, #-16]
str r2, [r4, r3, lsl #2]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L414:
ldr r2, [fp, #-16]
ldr r3, [fp, #-28]
cmp r2, r3
bcc .L415
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L413:
ldr r2, [fp, #-20]
ldr r3, [fp, #-24]
cmp r2, r3
bcc .L416
nop
nop
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size fxp_sub_matrix, .-fxp_sub_matrix
.section .rodata
.align 2
.LC24:
.ascii "\012Matrix\012=====================\012\000"
.align 2
.LC25:
.ascii "#matrix[%d][%d]: %2.2f \000"
.text
.align 2
.global print_matrix
.syntax unified
.arm
.fpu softvfp
.type print_matrix, %function
print_matrix:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r0, .L422
bl puts
mov r3, #0
str r3, [fp, #-12]
b .L418
.L421:
mov r3, #0
str r3, [fp, #-8]
b .L419
.L420:
ldr r3, [fp, #-12]
lsl r3, r3, #5
ldr r2, [fp, #-16]
add r2, r2, r3
ldr r3, [fp, #-8]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
stm sp, {r2-r3}
ldr r2, [fp, #-8]
ldr r1, [fp, #-12]
ldr r0, .L422+4
bl printf
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L419:
ldr r2, [fp, #-8]
ldr r3, [fp, #-24]
cmp r2, r3
bcc .L420
mov r0, #10
bl putchar
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L418:
ldr r2, [fp, #-12]
ldr r3, [fp, #-20]
cmp r2, r3
bcc .L421
mov r0, #10
bl putchar
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L423:
.align 2
.L422:
.word .LC24
.word .LC25
.size print_matrix, .-print_matrix
.section .rodata
.align 2
.LC26:
.word __stack_chk_guard
.text
.align 2
.global determinant
.syntax unified
.arm
.fpu softvfp
.type determinant, %function
determinant:
@ args = 0, pretend = 0, frame = 168
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #168
str r0, [fp, #-176]
str r1, [fp, #-180]
ldr r3, .L441
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r2, #0
mov r3, #0
str r2, [fp, #-156]
str r3, [fp, #-152]
ldr r3, [fp, #-180]
cmp r3, #0
ble .L425
ldr r3, [fp, #-180]
cmp r3, #1
bne .L426
ldr r3, [fp, #-176]
ldmia r3, {r2-r3}
str r2, [fp, #-156]
str r3, [fp, #-152]
b .L425
.L426:
ldr r3, [fp, #-180]
cmp r3, #2
bne .L427
ldr r3, [fp, #-176]
ldmia r3, {r0-r1}
ldr r3, [fp, #-176]
add r3, r3, #32
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #-176]
add r3, r3, #32
ldmia r3, {r0-r1}
ldr r3, [fp, #-176]
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-156]
str r3, [fp, #-152]
b .L425
.L427:
mov r2, #0
mov r3, #0
str r2, [fp, #-156]
str r3, [fp, #-152]
mov r3, #0
str r3, [fp, #-164]
b .L428
.L437:
mov r3, #0
str r3, [fp, #-172]
b .L429
.L436:
mov r3, #1
str r3, [fp, #-172]
b .L430
.L435:
mov r3, #0
str r3, [fp, #-160]
mov r3, #0
str r3, [fp, #-168]
b .L431
.L434:
ldr r2, [fp, #-168]
ldr r3, [fp, #-164]
cmp r2, r3
beq .L440
ldr r3, [fp, #-172]
lsl r3, r3, #5
ldr r2, [fp, #-176]
add r2, r2, r3
ldr r3, [fp, #-172]
sub r1, r3, #1
ldr r3, [fp, #-168]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
lsl r0, r1, #2
ldr r1, [fp, #-160]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #12
add r1, r0, r1
sub r1, r1, #136
stm r1, {r2-r3}
ldr r3, [fp, #-160]
add r3, r3, #1
str r3, [fp, #-160]
b .L433
.L440:
nop
.L433:
ldr r3, [fp, #-168]
add r3, r3, #1
str r3, [fp, #-168]
.L431:
ldr r2, [fp, #-168]
ldr r3, [fp, #-180]
cmp r2, r3
blt .L434
ldr r3, [fp, #-172]
add r3, r3, #1
str r3, [fp, #-172]
.L430:
ldr r2, [fp, #-172]
ldr r3, [fp, #-180]
cmp r2, r3
blt .L435
ldr r3, [fp, #-172]
add r3, r3, #1
str r3, [fp, #-172]
.L429:
ldr r3, [fp, #-180]
sub r3, r3, #1
ldr r2, [fp, #-172]
cmp r2, r3
blt .L436
ldr r0, [fp, #-164]
bl __aeabi_i2d
mov r2, #0
ldr r3, .L441+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L441+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L441+8
bl internal_pow
ldr r2, [fp, #-176]
ldr r3, [fp, #-164]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #-180]
sub r2, r3, #1
sub r3, fp, #148
mov r1, r2
mov r0, r3
bl determinant
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #156
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-156]
str r3, [fp, #-152]
ldr r3, [fp, #-164]
add r3, r3, #1
str r3, [fp, #-164]
.L428:
ldr r2, [fp, #-164]
ldr r3, [fp, #-180]
cmp r2, r3
blt .L437
.L425:
sub r3, fp, #156
ldmia r3, {r2-r3}
ldr r1, .L441
ldr r0, [r1]
ldr r1, [fp, #-16]
eors r0, r1, r0
mov r1, #0
beq .L439
bl __stack_chk_fail
.L439:
mov r0, r2
mov r1, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L442:
.align 2
.L441:
.word .LC26
.word 1072693248
.word -1074790400
.size determinant, .-determinant
.section .rodata
.align 2
.LC27:
.word __stack_chk_guard
.text
.align 2
.global fxp_determinant
.syntax unified
.arm
.fpu softvfp
.type fxp_determinant, %function
fxp_determinant:
@ args = 0, pretend = 0, frame = 296
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #296
str r0, [fp, #-304]
str r1, [fp, #-308]
ldr r3, .L464
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, #0
str r3, [fp, #-300]
b .L444
.L447:
mov r3, #0
str r3, [fp, #-296]
b .L445
.L446:
ldr r3, [fp, #-300]
lsl r3, r3, #4
ldr r2, [fp, #-304]
add r3, r2, r3
ldr r2, [fp, #-296]
ldr r3, [r3, r2, lsl #2]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr r1, [fp, #-300]
lsl r0, r1, #2
ldr r1, [fp, #-296]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #12
add r1, r0, r1
sub r1, r1, #264
stm r1, {r2-r3}
ldr r3, [fp, #-296]
add r3, r3, #1
str r3, [fp, #-296]
.L445:
ldr r2, [fp, #-296]
ldr r3, [fp, #-308]
cmp r2, r3
blt .L446
ldr r3, [fp, #-300]
add r3, r3, #1
str r3, [fp, #-300]
.L444:
ldr r2, [fp, #-300]
ldr r3, [fp, #-308]
cmp r2, r3
blt .L447
mov r2, #0
mov r3, #0
str r2, [fp, #-284]
str r3, [fp, #-280]
ldr r3, [fp, #-308]
cmp r3, #0
ble .L448
ldr r3, [fp, #-308]
cmp r3, #1
bne .L449
sub r3, fp, #276
ldmia r3, {r2-r3}
str r2, [fp, #-284]
str r3, [fp, #-280]
b .L448
.L449:
ldr r3, [fp, #-308]
cmp r3, #2
bne .L450
sub r1, fp, #276
ldmia r1, {r0-r1}
sub r3, fp, #236
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
sub r1, fp, #244
ldmia r1, {r0-r1}
sub r3, fp, #268
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-284]
str r3, [fp, #-280]
b .L448
.L450:
mov r2, #0
mov r3, #0
str r2, [fp, #-284]
str r3, [fp, #-280]
mov r3, #0
str r3, [fp, #-292]
b .L451
.L460:
mov r3, #0
str r3, [fp, #-300]
b .L452
.L459:
mov r3, #1
str r3, [fp, #-300]
b .L453
.L458:
mov r3, #0
str r3, [fp, #-288]
mov r3, #0
str r3, [fp, #-296]
b .L454
.L457:
ldr r2, [fp, #-296]
ldr r3, [fp, #-292]
cmp r2, r3
beq .L463
ldr r3, [fp, #-300]
sub r1, r3, #1
ldr r3, [fp, #-300]
lsl r2, r3, #2
ldr r3, [fp, #-296]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #12
add r3, r2, r3
sub r3, r3, #264
ldmia r3, {r2-r3}
lsl r0, r1, #2
ldr r1, [fp, #-288]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #12
add r1, r0, r1
sub r1, r1, #136
stm r1, {r2-r3}
ldr r3, [fp, #-288]
add r3, r3, #1
str r3, [fp, #-288]
b .L456
.L463:
nop
.L456:
ldr r3, [fp, #-296]
add r3, r3, #1
str r3, [fp, #-296]
.L454:
ldr r2, [fp, #-296]
ldr r3, [fp, #-308]
cmp r2, r3
blt .L457
ldr r3, [fp, #-300]
add r3, r3, #1
str r3, [fp, #-300]
.L453:
ldr r2, [fp, #-300]
ldr r3, [fp, #-308]
cmp r2, r3
blt .L458
ldr r3, [fp, #-300]
add r3, r3, #1
str r3, [fp, #-300]
.L452:
ldr r3, [fp, #-308]
sub r3, r3, #1
ldr r2, [fp, #-300]
cmp r2, r3
blt .L459
ldr r0, [fp, #-292]
bl __aeabi_i2d
mov r2, #0
ldr r3, .L464+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L464+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L464+8
bl internal_pow
ldr r3, [fp, #-292]
lsl r3, r3, #3
sub r2, fp, #12
add r3, r2, r3
sub r3, r3, #264
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #-308]
sub r2, r3, #1
sub r3, fp, #148
mov r1, r2
mov r0, r3
bl determinant
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #284
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-284]
str r3, [fp, #-280]
ldr r3, [fp, #-292]
add r3, r3, #1
str r3, [fp, #-292]
.L451:
ldr r2, [fp, #-292]
ldr r3, [fp, #-308]
cmp r2, r3
blt .L460
.L448:
sub r3, fp, #284
ldmia r3, {r2-r3}
ldr r1, .L464
ldr r0, [r1]
ldr r1, [fp, #-16]
eors r0, r1, r0
mov r1, #0
beq .L462
bl __stack_chk_fail
.L462:
mov r0, r2
mov r1, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L465:
.align 2
.L464:
.word .LC27
.word 1072693248
.word -1074790400
.size fxp_determinant, .-fxp_determinant
.align 2
.global transpose
.syntax unified
.arm
.fpu softvfp
.type transpose, %function
transpose:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
str r3, [fp, #-28]
mov r3, #0
str r3, [fp, #-12]
b .L467
.L470:
mov r3, #0
str r3, [fp, #-8]
b .L468
.L469:
ldr r3, [fp, #-12]
lsl r3, r3, #5
ldr r2, [fp, #-16]
add r2, r2, r3
ldr r3, [fp, #-8]
lsl r3, r3, #5
ldr r1, [fp, #-20]
add r0, r1, r3
ldr r3, [fp, #-8]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-12]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L468:
ldr r2, [fp, #-8]
ldr r3, [fp, #-28]
cmp r2, r3
blt .L469
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L467:
ldr r2, [fp, #-12]
ldr r3, [fp, #-24]
cmp r2, r3
blt .L470
nop
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size transpose, .-transpose
.align 2
.global fxp_transpose
.syntax unified
.arm
.fpu softvfp
.type fxp_transpose, %function
fxp_transpose:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
str r3, [fp, #-28]
mov r3, #0
str r3, [fp, #-12]
b .L472
.L475:
mov r3, #0
str r3, [fp, #-8]
b .L473
.L474:
ldr r3, [fp, #-12]
lsl r3, r3, #4
ldr r2, [fp, #-16]
add r2, r2, r3
ldr r3, [fp, #-8]
lsl r3, r3, #4
ldr r1, [fp, #-20]
add r3, r1, r3
ldr r1, [fp, #-8]
ldr r1, [r2, r1, lsl #2]
ldr r2, [fp, #-12]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L473:
ldr r2, [fp, #-8]
ldr r3, [fp, #-28]
cmp r2, r3
blt .L474
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L472:
ldr r2, [fp, #-12]
ldr r3, [fp, #-24]
cmp r2, r3
blt .L475
nop
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size fxp_transpose, .-fxp_transpose
.align 2
.global generic_timing_shift_l_double
.syntax unified
.arm
.fpu softvfp
.type generic_timing_shift_l_double, %function
generic_timing_shift_l_double:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #36
str r0, [fp, #-28]
str r1, [fp, #-24]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, .L480
ldr r3, [r3, #16]
lsl r1, r3, #1
ldr r3, .L480
ldr r2, [r3, #20]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L480
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L480
ldr r3, [r3, #24]
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #28]
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #36]
lsl r3, r3, #3
add r2, r2, r3
ldr r3, .L480+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L480+4
str r3, [r2]
ldr r3, [fp, #-32]
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, .L480
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #2
add r2, r3, r2
ldr r3, .L480
ldr r3, [r3, #76]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #36]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #84]
add r2, r2, r3
ldr r3, .L480+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L480+4
str r3, [r2]
ldr r3, .L480
ldr r3, [r3, #36]
lsl r2, r3, #1
ldr r3, .L480
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L480+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L480+4
str r3, [r2]
mov r3, #0
str r3, [fp, #-16]
b .L477
.L478:
ldr r3, .L480
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #4
add r2, r3, r2
ldr r3, .L480
ldr r3, [r3, #52]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #56]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #60]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #64]
lsl r3, r3, #1
add r1, r2, r3
ldr r3, .L480
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
add r2, r1, r3
ldr r3, .L480
ldr r3, [r3, #68]
lsl r3, r3, #1
add r1, r2, r3
ldr r3, .L480
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
add r2, r1, r3
ldr r3, .L480
ldr r3, [r3, #84]
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #116]
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #44]
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #80]
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #92]
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #96]
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #120]
add r2, r2, r3
ldr r3, .L480+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L480+4
str r3, [r2]
ldr r3, [fp, #-16]
add r3, r3, #1
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-16]
lsl r2, r2, #3
ldr r1, [fp, #-32]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L477:
ldr r3, [fp, #-36]
sub r3, r3, #1
ldr r2, [fp, #-16]
cmp r2, r3
blt .L478
ldr r3, [fp, #-36]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r1, r2, r3
sub r3, fp, #28
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, .L480
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #2
mov r1, r3
ldr r3, .L480
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
add r1, r1, r3
ldr r3, .L480
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L480
ldr r3, [r3, #52]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #56]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #64]
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #60]
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #44]
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #48]
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #116]
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #20]
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #28]
add r2, r2, r3
ldr r3, .L480+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L480+4
str r3, [r2]
ldr r3, .L480
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r2, r3, r2
ldr r3, .L480
ldr r3, [r3, #108]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L480
ldr r3, [r3, #112]
add r2, r2, r3
ldr r3, .L480+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L480+4
str r3, [r2]
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L481:
.align 2
.L480:
.word hw
.word generic_timer
.size generic_timing_shift_l_double, .-generic_timing_shift_l_double
.align 2
.global generic_timing_shift_r_double
.syntax unified
.arm
.fpu softvfp
.type generic_timing_shift_r_double, %function
generic_timing_shift_r_double:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #36
str r0, [fp, #-28]
str r1, [fp, #-24]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, .L486
ldr r3, [r3, #16]
lsl r1, r3, #1
ldr r3, .L486
ldr r2, [r3, #20]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L486
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L486
ldr r3, [r3, #24]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #28]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #36]
lsl r3, r3, #3
add r2, r2, r3
ldr r3, .L486+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L486+4
str r3, [r2]
ldr r3, [fp, #-36]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, .L486
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #3
sub r2, r3, r2
ldr r3, .L486
ldr r3, [r3, #56]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #52]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #76]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #36]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #60]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #64]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #84]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #44]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #48]
add r2, r2, r3
ldr r3, .L486+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L486+4
str r3, [r2]
ldr r3, .L486
ldr r2, [r3, #40]
ldr r3, .L486
ldr r3, [r3, #36]
add r3, r2, r3
lsl r2, r3, #1
ldr r3, .L486
ldr r3, [r3, #24]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L486+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L486+4
str r3, [r2]
ldr r3, [fp, #-36]
sub r3, r3, #1
str r3, [fp, #-16]
b .L483
.L484:
ldr r3, [fp, #-16]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-16]
lsl r2, r2, #3
ldr r1, [fp, #-32]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, .L486
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #4
sub r2, r3, r2
ldr r3, .L486
ldr r3, [r3, #52]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #56]
lsl r3, r3, #2
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #60]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #64]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #76]
lsl r3, r3, #2
add r1, r2, r3
ldr r3, .L486
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
add r2, r1, r3
ldr r3, .L486
ldr r3, [r3, #44]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #48]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #84]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #116]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #24]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #92]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #96]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #120]
add r2, r2, r3
ldr r3, .L486+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L486+4
str r3, [r2]
ldr r3, [fp, #-16]
sub r3, r3, #1
str r3, [fp, #-16]
.L483:
ldr r3, [fp, #-16]
cmp r3, #0
bgt .L484
ldr r1, [fp, #-32]
sub r3, fp, #28
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, .L486
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #1
mov r1, r3
ldr r3, .L486
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
add r1, r1, r3
ldr r3, .L486
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L486
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L486
ldr r3, [r3, #108]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #112]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #112]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #28]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #20]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #116]
add r2, r2, r3
ldr r3, .L486
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L486+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L486+4
str r3, [r2]
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L487:
.align 2
.L486:
.word hw
.word generic_timer
.size generic_timing_shift_r_double, .-generic_timing_shift_r_double
.align 2
.global shiftL
.syntax unified
.arm
.fpu softvfp
.type shiftL, %function
shiftL:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-20]
ldr r3, [r3]
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-12]
b .L489
.L490:
ldr r3, [fp, #-12]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-20]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L489:
ldr r3, [fp, #-24]
sub r3, r3, #1
ldr r2, [fp, #-12]
cmp r2, r3
blt .L490
ldr r3, [fp, #-24]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
ldr r2, [fp, #-16]
str r2, [r3]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftL, .-shiftL
.align 2
.global shiftR
.syntax unified
.arm
.fpu softvfp
.type shiftR, %function
shiftR:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-24]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-8]
ldr r3, [fp, #-24]
sub r3, r3, #1
str r3, [fp, #-12]
b .L493
.L494:
ldr r3, [fp, #-12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-20]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-12]
sub r3, r3, #1
str r3, [fp, #-12]
.L493:
ldr r3, [fp, #-12]
cmp r3, #0
bgt .L494
ldr r3, [fp, #-20]
ldr r2, [fp, #-16]
str r2, [r3]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftR, .-shiftR
.align 2
.global shiftLfloat
.syntax unified
.arm
.fpu softvfp
.type shiftLfloat, %function
shiftLfloat:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16] @ float
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-20]
ldr r3, [r3] @ float
str r3, [fp, #-8] @ float
mov r3, #0
str r3, [fp, #-12]
b .L497
.L498:
ldr r3, [fp, #-12]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-20]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L497:
ldr r3, [fp, #-24]
sub r3, r3, #1
ldr r2, [fp, #-12]
cmp r2, r3
blt .L498
ldr r3, [fp, #-24]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
ldr r2, [fp, #-16] @ float
str r2, [r3] @ float
ldr r3, [fp, #-8] @ float
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftLfloat, .-shiftLfloat
.align 2
.global shiftRfloat
.syntax unified
.arm
.fpu softvfp
.type shiftRfloat, %function
shiftRfloat:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16] @ float
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-24]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-8] @ float
ldr r3, [fp, #-24]
sub r3, r3, #1
str r3, [fp, #-12]
b .L501
.L502:
ldr r3, [fp, #-12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-20]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-12]
sub r3, r3, #1
str r3, [fp, #-12]
.L501:
ldr r3, [fp, #-12]
cmp r3, #0
bgt .L502
ldr r3, [fp, #-20]
ldr r2, [fp, #-16] @ float
str r2, [r3] @ float
ldr r3, [fp, #-8] @ float
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftRfloat, .-shiftRfloat
.align 2
.global shiftRDdouble
.syntax unified
.arm
.fpu softvfp
.type shiftRDdouble, %function
shiftRDdouble:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #36
str r0, [fp, #-28]
str r1, [fp, #-24]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, [fp, #-32]
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-16]
b .L505
.L506:
ldr r3, [fp, #-16]
add r3, r3, #1
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-16]
lsl r2, r2, #3
ldr r1, [fp, #-32]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L505:
ldr r3, [fp, #-36]
sub r3, r3, #1
ldr r2, [fp, #-16]
cmp r2, r3
blt .L506
ldr r3, [fp, #-36]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r1, r2, r3
sub r3, fp, #28
ldmia r3, {r2-r3}
stm r1, {r2-r3}
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftRDdouble, .-shiftRDdouble
.align 2
.global shiftRdouble
.syntax unified
.arm
.fpu softvfp
.type shiftRdouble, %function
shiftRdouble:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #36
str r0, [fp, #-28]
str r1, [fp, #-24]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, [fp, #-36]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-36]
sub r3, r3, #1
str r3, [fp, #-16]
b .L509
.L510:
ldr r3, [fp, #-16]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-16]
lsl r2, r2, #3
ldr r1, [fp, #-32]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-16]
sub r3, r3, #1
str r3, [fp, #-16]
.L509:
ldr r3, [fp, #-16]
cmp r3, #0
bgt .L510
ldr r1, [fp, #-32]
sub r3, fp, #28
ldmia r3, {r2-r3}
stm r1, {r2-r3}
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftRdouble, .-shiftRdouble
.align 2
.global shiftLDouble
.syntax unified
.arm
.fpu softvfp
.type shiftLDouble, %function
shiftLDouble:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #36
str r0, [fp, #-28]
str r1, [fp, #-24]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, [fp, #-32]
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-16]
b .L513
.L514:
ldr r3, [fp, #-16]
add r3, r3, #1
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [fp, #-16]
lsl r2, r2, #3
ldr r1, [fp, #-32]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L513:
ldr r3, [fp, #-36]
sub r3, r3, #1
ldr r2, [fp, #-16]
cmp r2, r3
blt .L514
ldr r3, [fp, #-36]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-32]
add r1, r2, r3
sub r3, fp, #28
ldmia r3, {r2-r3}
stm r1, {r2-r3}
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftLDouble, .-shiftLDouble
.align 2
.global shiftLboth
.syntax unified
.arm
.fpu softvfp
.type shiftLboth, %function
shiftLboth:
@ args = 4, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #36
str r0, [fp, #-24] @ float
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, [fp, #-36]
ldr r3, [r3]
str r3, [fp, #-12]
ldr r3, [fp, #-28]
ldr r3, [r3] @ float
str r3, [fp, #-8] @ float
mov r3, #0
str r3, [fp, #-16]
b .L517
.L518:
ldr r3, [fp, #-16]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r1, [fp, #-36]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-16]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r1, [fp, #-28]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L517:
ldr r3, [fp, #4]
sub r3, r3, #1
ldr r2, [fp, #-16]
cmp r2, r3
blt .L518
ldr r3, [fp, #4]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r3, r2, r3
ldr r2, [fp, #-32]
str r2, [r3]
ldr r3, [fp, #4]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
ldr r2, [fp, #-24] @ float
str r2, [r3] @ float
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftLboth, .-shiftLboth
.align 2
.global shiftRboth
.syntax unified
.arm
.fpu softvfp
.type shiftRboth, %function
shiftRboth:
@ args = 4, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #36
str r0, [fp, #-24] @ float
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, [fp, #4]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-12]
ldr r3, [fp, #4]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
ldr r3, [r3] @ float
str r3, [fp, #-8] @ float
ldr r3, [fp, #4]
sub r3, r3, #1
str r3, [fp, #-16]
b .L520
.L521:
ldr r3, [fp, #-16]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r1, [fp, #-36]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-16]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r2, r2, r3
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r1, [fp, #-28]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-16]
sub r3, r3, #1
str r3, [fp, #-16]
.L520:
ldr r3, [fp, #-16]
cmp r3, #0
bgt .L521
ldr r3, [fp, #-36]
ldr r2, [fp, #-32]
str r2, [r3]
ldr r3, [fp, #-28]
ldr r2, [fp, #-24] @ float
str r2, [r3] @ float
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size shiftRboth, .-shiftRboth
.align 2
.global order
.syntax unified
.arm
.fpu softvfp
.type order, %function
order:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r2, [fp, #-8]
ldr r3, [fp, #-12]
cmp r2, r3
ble .L523
ldr r3, [fp, #-8]
sub r3, r3, #1
b .L525
.L523:
ldr r3, [fp, #-12]
sub r3, r3, #1
.L525:
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size order, .-order
.align 2
.global fxp_check_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type fxp_check_limit_cycle, %function
fxp_check_limit_cycle:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-32]
str r1, [fp, #-36]
ldr r3, [fp, #-36]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-28]
mov r3, #1
str r3, [fp, #-24]
ldr r3, [fp, #-36]
sub r3, r3, #2
str r3, [fp, #-28]
b .L527
.L531:
ldr r3, [fp, #-28]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r3, [r3]
ldr r2, [fp, #-16]
cmp r2, r3
beq .L538
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
ldr r3, [fp, #-28]
sub r3, r3, #1
str r3, [fp, #-28]
.L527:
ldr r3, [fp, #-28]
cmp r3, #0
bge .L531
b .L530
.L538:
nop
.L530:
ldr r2, [fp, #-24]
ldr r3, [fp, #-36]
cmp r2, r3
beq .L532
ldr r3, [fp, #-24]
cmp r3, #1
beq .L532
mov r3, #1
b .L533
.L532:
mov r3, #0
.L533:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r1, [fp, #-24]
ldr r0, .L539
bl printf
ldr r3, [fp, #-24]
lsl r3, r3, #1
str r3, [fp, #-12]
mov r3, #0
str r3, [fp, #-20]
ldr r3, [fp, #-36]
sub r3, r3, #1
str r3, [fp, #-28]
b .L534
.L537:
ldr r2, [fp, #-36]
ldr r3, [fp, #-24]
sub r3, r2, r3
ldr r2, [fp, #-28]
cmp r2, r3
blt .L535
ldr r3, [fp, #-28]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r1, [r3]
ldr r2, [fp, #-28]
ldr r3, [fp, #-24]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r3, [r3]
mov r2, r3
ldr r0, .L539+4
bl printf
ldr r2, [fp, #-28]
ldr r3, [fp, #-24]
sub r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
ble .L536
ldr r3, [fp, #-28]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [r3]
ldr r1, [fp, #-28]
ldr r3, [fp, #-24]
sub r3, r1, r3
lsl r3, r3, #2
ldr r1, [fp, #-32]
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
bne .L536
ldr r3, [fp, #-20]
add r3, r3, #2
str r3, [fp, #-20]
.L535:
ldr r3, [fp, #-28]
sub r3, r3, #1
str r3, [fp, #-28]
.L534:
ldr r3, [fp, #-28]
cmp r3, #0
bge .L537
.L536:
ldr r3, [fp, #-20]
cmp r3, #0
movgt r3, #1
movle r3, #0
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r1, [fp, #-12]
ldr r0, .L539+8
bl printf
ldr r1, [fp, #-20]
ldr r0, .L539+12
bl printf
ldr r2, [fp, #-20]
ldr r3, [fp, #-12]
cmp r2, r3
moveq r3, #1
movne r3, #0
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
mov r0, #0
bl __DSVERIFIER_assert
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L540:
.align 2
.L539:
.word .LC15
.word .LC16
.word .LC17
.word .LC18
.size fxp_check_limit_cycle, .-fxp_check_limit_cycle
.section .rodata
.align 2
.LC28:
.word __stack_chk_guard
.text
.align 2
.global fxp_check_persistent_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type fxp_check_persistent_limit_cycle, %function
fxp_check_persistent_limit_cycle:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #52
str r0, [fp, #-56]
str r1, [fp, #-60]
ldr r3, .L561
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, #0
str r3, [fp, #-40]
mov r3, #0
str r3, [fp, #-44]
mov r3, #0
str r3, [fp, #-36]
ldr r3, [fp, #-56]
ldr r3, [r3]
str r3, [fp, #-28]
mov r3, #0
str r3, [fp, #-40]
b .L542
.L547:
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r3, [r3]
ldr r2, [fp, #-28]
cmp r2, r3
beq .L543
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
b .L544
.L543:
ldr r3, [fp, #-36]
cmp r3, #0
bne .L560
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L544:
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L542:
ldr r2, [fp, #-40]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L547
b .L546
.L560:
nop
.L546:
ldr r2, [fp, #-36]
ldr r3, [fp, #-44]
add r3, r2, r3
str r3, [fp, #-36]
ldr r3, [fp, #-36]
cmp r3, #1
ble .L548
ldr r3, [fp, #-60]
lsr r2, r3, #31
add r3, r2, r3
asr r3, r3, #1
mov r2, r3
ldr r3, [fp, #-36]
cmp r3, r2
bgt .L548
mov r3, #1
b .L549
.L548:
mov r3, #0
.L549:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr ip, [fp, #-36]
mov r3, sp
mov r4, r3
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-40]
b .L550
.L552:
ldr r2, [fp, #-40]
ldr r3, [fp, #-36]
cmp r2, r3
bge .L551
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r1, [r3]
ldr r3, [fp, #-20]
ldr r2, [fp, #-40]
str r1, [r3, r2, lsl #2]
.L551:
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L550:
ldr r2, [fp, #-40]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L552
mov r3, #0
str r3, [fp, #-40]
mov r3, #0
str r3, [fp, #-32]
mov r3, #0
strb r3, [fp, #-45]
b .L553
.L557:
ldr r3, [fp, #-40]
add r2, r3, #1
str r2, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-32]
add r1, r3, #1
str r1, [fp, #-32]
ldr r1, [fp, #-20]
ldr r3, [r1, r3, lsl #2]
cmp r2, r3
bne .L554
mov r3, #1
strb r3, [fp, #-45]
ldr r2, [fp, #-32]
ldr r3, [fp, #-36]
cmp r2, r3
bne .L553
b .L559
.L554:
mov r3, #0
strb r3, [fp, #-45]
b .L556
.L559:
mov r3, #0
str r3, [fp, #-32]
.L553:
ldr r2, [fp, #-40]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L557
.L556:
ldrb r3, [fp, #-45] @ zero_extendqisi2
cmp r3, #0
movne r3, #1
moveq r3, #0
and r3, r3, #255
eor r3, r3, #1
and r3, r3, #255
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
mov sp, r4
nop
ldr r3, .L561
ldr r2, [r3]
ldr r3, [fp, #-16]
eors r2, r3, r2
mov r3, #0
beq .L558
bl __stack_chk_fail
.L558:
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L562:
.align 2
.L561:
.word .LC28
.size fxp_check_persistent_limit_cycle, .-fxp_check_persistent_limit_cycle
.align 2
.global fxp_check_oscillations
.syntax unified
.arm
.fpu softvfp
.type fxp_check_oscillations, %function
fxp_check_oscillations:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-32]
str r1, [fp, #-36]
ldr r3, [fp, #-32]
ldr r2, [r3]
ldr r3, [fp, #-36]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r1, [fp, #-32]
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
beq .L564
ldr r3, [fp, #-36]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-36]
sub r3, r3, #-1073741822
lsl r3, r3, #2
ldr r1, [fp, #-32]
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
beq .L564
mov r3, #1
b .L565
.L564:
mov r3, #0
.L565:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
mov r3, #0
str r3, [fp, #-28]
mov r3, #0
str r3, [fp, #-24]
mov r3, #2
str r3, [fp, #-20]
b .L566
.L573:
ldr r3, [fp, #-20]
str r3, [fp, #-12]
mov r3, #0
str r3, [fp, #-16]
b .L567
.L572:
ldr r2, [fp, #-28]
ldr r3, [fp, #-12]
cmp r2, r3
ble .L568
mov r3, #0
str r3, [fp, #-28]
mov r3, #0
str r3, [fp, #-24]
.L568:
ldr r2, [fp, #-16]
ldr r3, [fp, #-12]
add r3, r2, r3
str r3, [fp, #-8]
ldr r2, [fp, #-8]
ldr r3, [fp, #-36]
cmp r2, r3
bge .L574
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r1, [fp, #-32]
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
bne .L570
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
ldr r2, [fp, #-24]
ldr r3, [fp, #-12]
cmp r2, r3
movne r3, #1
moveq r3, #0
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
.L570:
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L567:
ldr r2, [fp, #-16]
ldr r3, [fp, #-36]
cmp r2, r3
blt .L572
b .L571
.L574:
nop
.L571:
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L566:
ldr r2, [fp, #-20]
ldr r3, [fp, #-36]
cmp r2, r3
blt .L573
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fxp_check_oscillations, .-fxp_check_oscillations
.align 2
.global fxp_ln
.syntax unified
.arm
.fpu softvfp
.type fxp_ln, %function
fxp_ln:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
ldr r3, .L589
str r3, [fp, #-12]
ldr r3, [fp, #-16]
cmp r3, #32768
bge .L576
ldr r3, [fp, #-16]
lsl r3, r3, #16
str r3, [fp, #-16]
ldr r2, [fp, #-12]
ldr r3, .L589+4
add r3, r2, r3
str r3, [fp, #-12]
.L576:
ldr r3, [fp, #-16]
cmp r3, #8388608
bge .L577
ldr r3, [fp, #-16]
lsl r3, r3, #8
str r3, [fp, #-16]
ldr r2, [fp, #-12]
ldr r3, .L589+8
add r3, r2, r3
str r3, [fp, #-12]
.L577:
ldr r3, [fp, #-16]
cmn r3, #-134217727
bgt .L578
ldr r3, [fp, #-16]
lsl r3, r3, #4
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #181248
sub r3, r3, #456
str r3, [fp, #-12]
.L578:
ldr r3, [fp, #-16]
cmn r3, #-536870911
bgt .L579
ldr r3, [fp, #-16]
lsl r3, r3, #2
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #90112
sub r3, r3, #740
str r3, [fp, #-12]
.L579:
ldr r3, [fp, #-16]
cmn r3, #-1073741823
bgt .L580
ldr r3, [fp, #-16]
lsl r3, r3, #1
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #45312
sub r3, r3, #114
str r3, [fp, #-12]
.L580:
ldr r3, [fp, #-16]
asr r3, r3, #1
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L581
ldr r3, [fp, #-8]
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #26368
sub r3, r3, #205
str r3, [fp, #-12]
.L581:
ldr r3, [fp, #-16]
asr r3, r3, #2
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L582
ldr r3, [fp, #-8]
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #14592
sub r3, r3, #32
str r3, [fp, #-12]
.L582:
ldr r3, [fp, #-16]
asr r3, r3, #3
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L583
ldr r3, [fp, #-8]
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #7680
sub r3, r3, #39
str r3, [fp, #-12]
.L583:
ldr r3, [fp, #-16]
asr r3, r3, #4
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L584
ldr r3, [fp, #-8]
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #3968
sub r3, r3, #5
str r3, [fp, #-12]
.L584:
ldr r3, [fp, #-16]
asr r3, r3, #5
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L585
ldr r3, [fp, #-8]
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #2016
sub r3, r3, #1
str r3, [fp, #-12]
.L585:
ldr r3, [fp, #-16]
asr r3, r3, #6
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L586
ldr r3, [fp, #-8]
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #1016
str r3, [fp, #-12]
.L586:
ldr r3, [fp, #-16]
asr r3, r3, #7
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L587
ldr r3, [fp, #-8]
str r3, [fp, #-16]
ldr r3, [fp, #-12]
sub r3, r3, #508
sub r3, r3, #2
str r3, [fp, #-12]
.L587:
ldr r3, [fp, #-16]
rsb r3, r3, #-2147483648
str r3, [fp, #-16]
ldr r3, [fp, #-16]
asr r3, r3, #15
ldr r2, [fp, #-12]
sub r3, r2, r3
str r3, [fp, #-12]
ldr r3, [fp, #-12]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L590:
.align 2
.L589:
.word 681391
.word -726817
.word -363409
.size fxp_ln, .-fxp_ln
.align 2
.global fxp_log10_low
.syntax unified
.arm
.fpu softvfp
.type fxp_log10_low, %function
fxp_log10_low:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #24
str r0, [fp, #-36]
str r1, [fp, #-32]
mov r2, #0
ldr r3, .L593
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L593+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-24]
ldr r0, [fp, #-24]
bl fxp_ln
str r0, [fp, #-20]
mov r0, #655360
bl fxp_ln
str r0, [fp, #-16]
ldr r0, [fp, #-20]
bl __aeabi_i2d
mov r4, r0
mov r5, r1
ldr r0, [fp, #-16]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L594:
.align 2
.L593:
.word 1089470464
.word 1071644672
.size fxp_log10_low, .-fxp_log10_low
.align 2
.global fxp_log10
.syntax unified
.arm
.fpu softvfp
.type fxp_log10, %function
fxp_log10:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-12]
str r1, [fp, #-8]
mov r2, #0
ldr r3, .L605
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L603
mov r2, #8388608
ldr r3, .L605+4
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L604
mov r2, #8388608
ldr r3, .L605+4
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r1, fp, #12
ldmia r1, {r0-r1}
bl fxp_log10_low
ldr r2, .L605+8
ldr r3, .L605+12
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L600
.L604:
mov r2, #0
ldr r3, .L605
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r1, fp, #12
ldmia r1, {r0-r1}
bl fxp_log10_low
ldr r2, .L605+8
ldr r3, .L605+16
bl __aeabi_dadd
mov r2, r0
mov r3, r1
b .L600
.L603:
sub r1, fp, #12
ldmia r1, {r0-r1}
bl fxp_log10_low
mov r2, r0
mov r3, r1
.L600:
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L606:
.align 2
.L605:
.word 1088421824
.word 1104150400
.word -1574947053
.word 1075974094
.word 1074925518
.size fxp_log10, .-fxp_log10
.section .rodata
.align 2
.LC29:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/core/functions.h\000"
.align 2
.LC30:
.ascii "sv >= nv\000"
.text
.align 2
.global snrVariance
.syntax unified
.arm
.fpu softvfp
.type snrVariance, %function
snrVariance:
@ args = 0, pretend = 0, frame = 64
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #64
str r0, [fp, #-64]
str r1, [fp, #-68]
str r2, [fp, #-72]
mov r2, #0
mov r3, #0
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r2, #0
mov r3, #0
str r2, [fp, #-44]
str r3, [fp, #-40]
mov r2, #0
mov r3, #0
str r2, [fp, #-36]
str r3, [fp, #-32]
mov r2, #0
mov r3, #0
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-56]
b .L608
.L609:
ldr r3, [fp, #-56]
lsl r3, r3, #2
ldr r2, [fp, #-64]
add r3, r2, r3
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r3, [fp, #-56]
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-44]
str r3, [fp, #-40]
ldr r3, [fp, #-56]
add r3, r3, #1
str r3, [fp, #-56]
.L608:
ldr r2, [fp, #-56]
ldr r3, [fp, #-72]
cmp r2, r3
blt .L609
ldr r0, [fp, #-72]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r0, [fp, #-72]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-44]
str r3, [fp, #-40]
mov r3, #0
str r3, [fp, #-56]
b .L610
.L611:
ldr r3, [fp, #-56]
lsl r3, r3, #2
ldr r2, [fp, #-64]
add r3, r2, r3
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
sub r3, fp, #52
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #-56]
lsl r3, r3, #2
ldr r2, [fp, #-64]
add r3, r2, r3
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
sub r3, fp, #52
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-36]
str r3, [fp, #-32]
ldr r3, [fp, #-56]
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
sub r3, fp, #44
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #-56]
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
sub r3, fp, #44
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-56]
add r3, r3, #1
str r3, [fp, #-56]
.L610:
ldr r2, [fp, #-56]
ldr r3, [fp, #-72]
cmp r2, r3
blt .L611
mov r2, #0
mov r3, #0
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L617
sub r3, fp, #28
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
bne .L614
ldr r3, .L618
ldr r2, .L618+4
ldr r1, .L618+8
ldr r0, .L618+12
bl __assert_fail
.L614:
sub r3, fp, #28
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_d2f
mov r3, r0
b .L615
.L617:
ldr r3, .L618+16
.L615:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L619:
.align 2
.L618:
.word __PRETTY_FUNCTION__.6126
.word 373
.word .LC29
.word .LC30
.word 1176256410
.size snrVariance, .-snrVariance
.global __aeabi_fmul
.align 2
.global snrPower
.syntax unified
.arm
.fpu softvfp
.type snrPower, %function
snrPower:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
mov r2, #0
mov r3, #0
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-32]
b .L621
.L622:
ldr r3, [fp, #-32]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-32]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-32]
lsl r3, r3, #2
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-32]
lsl r3, r3, #2
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L621:
ldr r2, [fp, #-32]
ldr r3, [fp, #-48]
cmp r2, r3
blt .L622
mov r2, #0
mov r3, #0
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L628
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
bne .L625
ldr r3, .L629
ldr r2, .L629+4
ldr r1, .L629+8
ldr r0, .L629+12
bl __assert_fail
.L625:
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_d2f
mov r3, r0
b .L626
.L628:
ldr r3, .L629+16
.L626:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L630:
.align 2
.L629:
.word __PRETTY_FUNCTION__.6139
.word 394
.word .LC29
.word .LC30
.word 1176256410
.size snrPower, .-snrPower
.global __aeabi_fcmpeq
.global __aeabi_fdiv
.section .rodata
.align 2
.LC31:
.ascii "power >= 1.0f\000"
.text
.align 2
.global snrPoint
.syntax unified
.arm
.fpu softvfp
.type snrPoint, %function
snrPoint:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
str r0, [fp, #-32]
str r1, [fp, #-36]
str r2, [fp, #-40]
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
mov r2, #0
mov r3, #0
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-24]
b .L632
.L639:
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, #0
mov r0, r3
bl __aeabi_fcmpeq
mov r3, r0
cmp r3, #0
bne .L641
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-32]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fdiv
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
mov r2, #0
ldr r3, .L643
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
bne .L642
mov r2, #0
ldr r3, .L643+4
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
bne .L642
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L643+8
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
bne .L635
ldr r3, .L643+12
mov r2, #412
ldr r1, .L643+16
ldr r0, .L643+20
bl __assert_fail
.L641:
nop
b .L635
.L642:
nop
.L635:
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L632:
ldr r2, [fp, #-24]
ldr r3, [fp, #-40]
cmp r2, r3
blt .L639
ldr r3, .L643+24
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L644:
.align 2
.L643:
.word 1080213504
.word -1067270144
.word 1072693248
.word __PRETTY_FUNCTION__.6149
.word .LC29
.word .LC31
.word 1176256410
.size snrPoint, .-snrPoint
.global next
.data
.align 2
.type next, %object
.size next, 4
next:
.word 1
.text
.align 2
.global rand
.syntax unified
.arm
.fpu softvfp
.type rand, %function
rand:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
ldr r3, .L647
ldr r3, [r3]
ldr r2, .L647+4
mul r3, r2, r3
add r3, r3, #12288
add r3, r3, #57
ldr r2, .L647
str r3, [r2]
ldr r3, .L647
ldr r3, [r3]
lsr r3, r3, #16
lsl r3, r3, #17
lsr r3, r3, #17
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L648:
.align 2
.L647:
.word next
.word 1103515245
.size rand, .-rand
.align 2
.global srand
.syntax unified
.arm
.fpu softvfp
.type srand, %function
srand:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r2, .L650
ldr r3, [fp, #-8]
str r3, [r2]
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L651:
.align 2
.L650:
.word next
.size srand, .-srand
.global __aeabi_fsub
.global __aeabi_fadd
.section .rodata
.align 2
.LC32:
.ascii "(double)timer1*CYCLE <= (double)DEADLINE\000"
.text
.align 2
.global iirIIOutTime
.syntax unified
.arm
.fpu softvfp
.type iirIIOutTime, %function
iirIIOutTime:
@ args = 8, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44] @ float
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-32]
mov r3, #0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-48]
add r3, r3, #4
str r3, [fp, #-28]
ldr r3, [fp, #-52]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
add r3, r3, #4
str r3, [fp, #-20]
ldr r3, [fp, #-32]
add r3, r3, #71
str r3, [fp, #-32]
mov r3, #1
str r3, [fp, #-8]
b .L653
.L654:
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r2, r3
ldr r3, [fp, #-40]
ldr r3, [r3] @ float
mov r1, r2
mov r0, r3
bl __aeabi_fsub
mov r3, r0
mov r2, r3
ldr r3, [fp, #-40]
str r2, [r3] @ float
ldr r3, [fp, #-32]
add r3, r3, #54
str r3, [fp, #-32]
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L653:
ldr r2, [fp, #-8]
ldr r3, [fp, #4]
cmp r2, r3
blt .L654
ldr r3, [fp, #-40]
ldr r3, [r3] @ float
ldr r1, [fp, #-44] @ float
mov r0, r3
bl __aeabi_fadd
mov r3, r0
mov r2, r3
ldr r3, [fp, #-40]
str r2, [r3] @ float
ldr r3, [fp, #-40]
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-12]
b .L655
.L656:
ldr r3, [fp, #-24]
add r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-32]
add r3, r3, #46
str r3, [fp, #-32]
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L655:
ldr r2, [fp, #-12]
ldr r3, [fp, #8]
cmp r2, r3
blt .L656
ldr r3, [fp, #-32]
add r3, r3, #38
str r3, [fp, #-32]
ldr r0, [fp, #-32]
bl __aeabi_i2d
mov r2, #0
ldr r3, .L659
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r2, .L659+4
ldr r3, .L659+8
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L657
ldr r3, .L659+12
ldr r2, .L659+16
ldr r1, .L659+20
ldr r0, .L659+24
bl __assert_fail
.L657:
ldr r3, [fp, #-16] @ float
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L660:
.align 2
.L659:
.word 1097761920
.word 1202590843
.word 1065646817
.word __PRETTY_FUNCTION__.6181
.word 450
.word .LC29
.word .LC32
.size iirIIOutTime, .-iirIIOutTime
.align 2
.global iirIItOutTime
.syntax unified
.arm
.fpu softvfp
.type iirIItOutTime, %function
iirIItOutTime:
@ args = 8, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #44
str r0, [fp, #-40]
str r1, [fp, #-44] @ float
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-20] @ float
ldr r3, [fp, #-48]
add r3, r3, #4
str r3, [fp, #-32]
ldr r3, [fp, #-52]
str r3, [fp, #-28]
ldr r2, [fp, #8]
ldr r3, [fp, #4]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-16]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
ldr r1, [fp, #-44] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r2, r3
ldr r3, [fp, #-40]
ldr r3, [r3] @ float
mov r1, r3
mov r0, r2
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-20] @ float
ldr r3, [fp, #-36]
add r3, r3, #105
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-24]
b .L662
.L665:
ldr r3, [fp, #-24]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r2, r2, r3
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r1, [fp, #-40]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #4]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
bge .L663
ldr r3, [fp, #-32]
add r2, r3, #4
str r2, [fp, #-32]
ldr r3, [r3] @ float
ldr r1, [fp, #-20] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r4, r2, r3
bl __aeabi_fsub
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-36]
add r3, r3, #41
str r3, [fp, #-36]
.L663:
ldr r3, [fp, #8]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
bge .L664
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
ldr r1, [fp, #-44] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r0, r3
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r1, [r3] @ float
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r4, r2, r3
bl __aeabi_fadd
mov r3, r0
str r3, [r4] @ float
ldr r3, [fp, #-36]
add r3, r3, #38
str r3, [fp, #-36]
.L664:
ldr r3, [fp, #-36]
add r3, r3, #54
str r3, [fp, #-36]
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L662:
ldr r3, [fp, #-16]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
blt .L665
ldr r3, [fp, #-36]
add r3, r3, #7
str r3, [fp, #-36]
ldr r0, [fp, #-36]
bl __aeabi_i2d
mov r2, #0
ldr r3, .L668
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r2, .L668+4
ldr r3, .L668+8
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L666
ldr r3, .L668+12
ldr r2, .L668+16
ldr r1, .L668+20
ldr r0, .L668+24
bl __assert_fail
.L666:
ldr r3, [fp, #-20] @ float
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L669:
.align 2
.L668:
.word 1097761920
.word 1202590843
.word 1065646817
.word __PRETTY_FUNCTION__.6199
.word 477
.word .LC29
.word .LC32
.size iirIItOutTime, .-iirIItOutTime
.align 2
.global iirIItOutTime_double
.syntax unified
.arm
.fpu softvfp
.type iirIItOutTime_double, %function
iirIItOutTime_double:
@ args = 16, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r6, r7, fp, lr}
add fp, sp, #16
sub sp, sp, #52
str r0, [fp, #-56]
str r2, [fp, #-68]
str r3, [fp, #-64]
mov r3, #0
str r3, [fp, #-48]
mov r2, #0
mov r3, #0
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #4]
add r3, r3, #8
str r3, [fp, #-44]
ldr r3, [fp, #8]
str r3, [fp, #-40]
ldr r2, [fp, #16]
ldr r3, [fp, #12]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-32]
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
sub r3, fp, #68
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-56]
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-48]
add r3, r3, #105
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-36]
b .L671
.L674:
ldr r3, [fp, #-36]
add r3, r3, #1
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r2, [fp, #-36]
lsl r2, r2, #3
ldr r1, [fp, #-56]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #12]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
bge .L672
ldr r3, [fp, #-44]
add r2, r3, #8
str r2, [fp, #-44]
ldmia r3, {r0-r1}
sub r3, fp, #28
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r4, r2, r3
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r3, [fp, #-48]
add r3, r3, #41
str r3, [fp, #-48]
.L672:
ldr r3, [fp, #16]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
bge .L673
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
sub r3, fp, #68
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-36]
lsl r1, r1, #3
ldr r0, [fp, #-56]
add r4, r0, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r3, [fp, #-48]
add r3, r3, #38
str r3, [fp, #-48]
.L673:
ldr r3, [fp, #-48]
add r3, r3, #54
str r3, [fp, #-48]
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L671:
ldr r3, [fp, #-32]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
blt .L674
ldr r3, [fp, #-48]
add r3, r3, #7
str r3, [fp, #-48]
ldr r0, [fp, #-48]
bl __aeabi_i2d
mov r2, #0
ldr r3, .L677
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r2, .L677+4
ldr r3, .L677+8
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L675
ldr r3, .L677+12
mov r2, #504
ldr r1, .L677+16
ldr r0, .L677+20
bl __assert_fail
.L675:
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #16
@ sp needed
pop {r4, r6, r7, fp, pc}
.L678:
.align 2
.L677:
.word 1097761920
.word 1202590843
.word 1065646817
.word __PRETTY_FUNCTION__.6217
.word .LC29
.word .LC32
.size iirIItOutTime_double, .-iirIItOutTime_double
.align 2
.global iirOutBoth
.syntax unified
.arm
.fpu softvfp
.type iirOutBoth, %function
iirOutBoth:
@ args = 32, pretend = 0, frame = 64
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #64
str r0, [fp, #-56]
str r1, [fp, #-60]
str r2, [fp, #-64]
str r3, [fp, #-68]
mov r3, #0
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-16] @ float
ldr r3, [fp, #16]
add r3, r3, #4
str r3, [fp, #-52]
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #8]
add r3, r2, r3
str r3, [fp, #-48]
ldr r3, [fp, #20]
str r3, [fp, #-44]
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #12]
add r3, r2, r3
str r3, [fp, #-40]
ldr r3, [fp, #-64]
add r3, r3, #4
str r3, [fp, #-36]
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
str r3, [fp, #-32]
ldr r3, [fp, #-68]
str r3, [fp, #-28]
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-60]
add r3, r2, r3
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-12]
b .L680
.L681:
ldr r3, [fp, #-44]
add r2, r3, #4
str r2, [fp, #-44]
ldr r0, [r3]
ldr r3, [fp, #-40]
sub r2, r3, #4
str r2, [fp, #-40]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-20]
bl fxp_add
str r0, [fp, #-20]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r0, [r3] @ float
ldr r3, [fp, #-24]
sub r2, r3, #4
str r2, [fp, #-24]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L680:
ldr r2, [fp, #-12]
ldr r3, [fp, #32]
cmp r2, r3
blt .L681
mov r3, #1
str r3, [fp, #-8]
b .L682
.L683:
ldr r3, [fp, #-52]
add r2, r3, #4
str r2, [fp, #-52]
ldr r0, [r3]
ldr r3, [fp, #-48]
sub r2, r3, #4
str r2, [fp, #-48]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-20]
bl fxp_sub
str r0, [fp, #-20]
ldr r3, [fp, #-36]
add r2, r3, #4
str r2, [fp, #-36]
ldr r0, [r3] @ float
ldr r3, [fp, #-32]
sub r2, r3, #4
str r2, [fp, #-32]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L682:
ldr r2, [fp, #-8]
ldr r3, [fp, #28]
cmp r2, r3
blt .L683
ldr r3, [fp, #24]
ldr r2, [fp, #-20]
str r2, [r3]
ldr r3, [fp, #4]
ldr r2, [fp, #-16] @ float
str r2, [r3] @ float
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size iirOutBoth, .-iirOutBoth
.align 2
.global iirOutFixedL
.syntax unified
.arm
.fpu softvfp
.type iirOutFixedL, %function
iirOutFixedL:
@ args = 12, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-16]
ldr r3, [fp, #8]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-52]
add r3, r2, r3
str r3, [fp, #-32]
ldr r3, [fp, #-40]
add r3, r3, #4
str r3, [fp, #-28]
ldr r3, [fp, #12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #4]
add r3, r2, r3
str r3, [fp, #-24]
ldr r3, [fp, #-44]
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-12]
b .L685
.L686:
ldr r3, [fp, #-12]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-44]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-44]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-24]
sub r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3]
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16]
bl fxp_add
str r0, [fp, #-16]
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L685:
ldr r3, [fp, #12]
sub r3, r3, #1
ldr r2, [fp, #-12]
cmp r2, r3
blt .L686
ldr r3, [fp, #12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r2, [fp, #-48]
str r2, [r3]
ldr r3, [fp, #-24]
sub r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3]
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16]
bl fxp_add
str r0, [fp, #-16]
mov r3, #1
str r3, [fp, #-8]
b .L687
.L688:
ldr r3, [fp, #-32]
sub r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16]
bl fxp_sub
str r0, [fp, #-16]
ldr r3, [fp, #-8]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r2, r2, r3
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r1, [fp, #-40]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L687:
ldr r3, [fp, #8]
sub r3, r3, #1
ldr r2, [fp, #-8]
cmp r2, r3
blt .L688
ldr r3, [fp, #8]
cmp r3, #1
ble .L689
ldr r3, [fp, #-32]
sub r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16]
bl fxp_sub
str r0, [fp, #-16]
.L689:
ldr r3, [fp, #8]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r2, [fp, #-16]
str r2, [r3]
ldr r3, [fp, #-16]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size iirOutFixedL, .-iirOutFixedL
.align 2
.global iirOutFloatL
.syntax unified
.arm
.fpu softvfp
.type iirOutFloatL, %function
iirOutFloatL:
@ args = 12, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48] @ float
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-16] @ float
ldr r3, [fp, #8]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-52]
add r3, r2, r3
str r3, [fp, #-32]
ldr r3, [fp, #-40]
add r3, r3, #4
str r3, [fp, #-28]
ldr r3, [fp, #12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #4]
add r3, r2, r3
str r3, [fp, #-24]
ldr r3, [fp, #-44]
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-12]
b .L692
.L693:
ldr r3, [fp, #-12]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-44]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-44]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-24]
sub r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L692:
ldr r3, [fp, #12]
sub r3, r3, #1
ldr r2, [fp, #-12]
cmp r2, r3
blt .L693
ldr r3, [fp, #12]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r2, [fp, #-48] @ float
str r2, [r3] @ float
ldr r3, [fp, #-24]
sub r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-16] @ float
mov r3, #1
str r3, [fp, #-8]
b .L694
.L695:
ldr r3, [fp, #-32]
sub r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3] @ float
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-8]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r2, r2, r3
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r1, [fp, #-40]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L694:
ldr r3, [fp, #8]
sub r3, r3, #1
ldr r2, [fp, #-8]
cmp r2, r3
blt .L695
ldr r3, [fp, #8]
cmp r3, #1
ble .L696
ldr r3, [fp, #-32]
sub r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3] @ float
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-16] @ float
.L696:
ldr r3, [fp, #8]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r2, [fp, #-16] @ float
str r2, [r3] @ float
ldr r3, [fp, #-16] @ float
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size iirOutFloatL, .-iirOutFloatL
.align 2
.global iirOutBothL
.syntax unified
.arm
.fpu softvfp
.type iirOutBothL, %function
iirOutBothL:
@ args = 32, pretend = 0, frame = 64
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #64
str r0, [fp, #-56]
str r1, [fp, #-60]
str r2, [fp, #-64]
str r3, [fp, #-68]
mov r3, #0
str r3, [fp, #-36]
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #16]
add r3, r2, r3
str r3, [fp, #-52]
ldr r3, [fp, #8]
add r3, r3, #4
str r3, [fp, #-48]
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #20]
add r3, r2, r3
str r3, [fp, #-44]
ldr r3, [fp, #12]
str r3, [fp, #-40]
mov r3, #0
str r3, [fp, #-16] @ float
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-64]
add r3, r2, r3
str r3, [fp, #-32]
ldr r3, [fp, #-56]
add r3, r3, #4
str r3, [fp, #-28]
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
str r3, [fp, #-24]
ldr r3, [fp, #-60]
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-12]
b .L699
.L700:
ldr r3, [fp, #-12]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #12]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #12]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-44]
sub r2, r3, #4
str r2, [fp, #-44]
ldr r0, [r3]
ldr r3, [fp, #-40]
add r2, r3, #4
str r2, [fp, #-40]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-36]
bl fxp_add
str r0, [fp, #-36]
ldr r3, [fp, #-12]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-60]
add r2, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r1, [fp, #-60]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-24]
sub r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L699:
ldr r3, [fp, #32]
sub r3, r3, #1
ldr r2, [fp, #-12]
cmp r2, r3
blt .L700
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #12]
add r3, r2, r3
ldr r2, [fp, #24]
str r2, [r3]
ldr r3, [fp, #-44]
sub r2, r3, #4
str r2, [fp, #-44]
ldr r0, [r3]
ldr r3, [fp, #-40]
add r2, r3, #4
str r2, [fp, #-40]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-36]
bl fxp_add
str r0, [fp, #-36]
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-60]
add r3, r2, r3
ldr r2, [fp, #4] @ float
str r2, [r3] @ float
ldr r3, [fp, #-24]
sub r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-16] @ float
mov r3, #1
str r3, [fp, #-8]
b .L701
.L702:
ldr r3, [fp, #-52]
sub r2, r3, #4
str r2, [fp, #-52]
ldr r0, [r3]
ldr r3, [fp, #-48]
add r2, r3, #4
str r2, [fp, #-48]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-36]
bl fxp_sub
str r0, [fp, #-36]
ldr r3, [fp, #-8]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #8]
add r2, r2, r3
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r1, [fp, #8]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #-32]
sub r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3] @ float
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-8]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r2, r2, r3
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r1, [fp, #-56]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L701:
ldr r3, [fp, #28]
sub r3, r3, #1
ldr r2, [fp, #-8]
cmp r2, r3
blt .L702
ldr r3, [fp, #28]
cmp r3, #1
ble .L703
ldr r3, [fp, #-52]
sub r2, r3, #4
str r2, [fp, #-52]
ldr r0, [r3]
ldr r3, [fp, #-48]
add r2, r3, #4
str r2, [fp, #-48]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-36]
bl fxp_sub
str r0, [fp, #-36]
.L703:
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #8]
add r3, r2, r3
ldr r2, [fp, #-36]
str r2, [r3]
ldr r3, [fp, #28]
cmp r3, #1
ble .L704
ldr r3, [fp, #-32]
sub r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3] @ float
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-16] @ float
.L704:
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r2, [fp, #-16] @ float
str r2, [r3] @ float
ldr r0, [fp, #-36]
bl fxp_to_float
mov r3, r0
ldr r1, [fp, #-16] @ float
mov r0, r3
bl __aeabi_fsub
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size iirOutBothL, .-iirOutBothL
.align 2
.global iirOutBothL2
.syntax unified
.arm
.fpu softvfp
.type iirOutBothL2, %function
iirOutBothL2:
@ args = 32, pretend = 0, frame = 64
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #64
str r0, [fp, #-56]
str r1, [fp, #-60]
str r2, [fp, #-64]
str r3, [fp, #-68]
mov r3, #0
str r3, [fp, #-52]
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #16]
add r3, r2, r3
str r3, [fp, #-36]
ldr r3, [fp, #8]
add r3, r3, #4
str r3, [fp, #-32]
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #20]
add r3, r2, r3
str r3, [fp, #-28]
ldr r3, [fp, #12]
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-48] @ float
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-64]
add r3, r2, r3
str r3, [fp, #-20]
ldr r3, [fp, #-56]
add r3, r3, #4
str r3, [fp, #-16]
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
str r3, [fp, #-12]
ldr r3, [fp, #-60]
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-44]
mov r3, #1
str r3, [fp, #-40]
mov r3, #0
str r3, [fp, #-44]
b .L707
.L708:
ldr r3, [fp, #-44]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #12]
add r2, r2, r3
ldr r3, [fp, #-44]
lsl r3, r3, #2
ldr r1, [fp, #12]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #32]
sub r2, r3, #1
ldr r3, [fp, #-44]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #20]
add r3, r2, r3
ldr r0, [r3]
ldr r3, [fp, #-44]
lsl r3, r3, #2
ldr r2, [fp, #12]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-52]
bl fxp_add
str r0, [fp, #-52]
ldr r3, [fp, #-44]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-60]
add r2, r2, r3
ldr r3, [fp, #-44]
lsl r3, r3, #2
ldr r1, [fp, #-60]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #32]
sub r2, r3, #1
ldr r3, [fp, #-44]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-44]
lsl r3, r3, #2
ldr r2, [fp, #-60]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-48] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-48] @ float
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L707:
ldr r3, [fp, #32]
sub r3, r3, #1
ldr r2, [fp, #-44]
cmp r2, r3
blt .L708
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #12]
add r3, r2, r3
ldr r2, [fp, #24]
str r2, [r3]
ldr r3, [fp, #32]
sub r2, r3, #1
ldr r3, [fp, #-44]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #20]
add r3, r2, r3
ldr r0, [r3]
ldr r3, [fp, #-44]
lsl r3, r3, #2
ldr r2, [fp, #12]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-52]
bl fxp_add
str r0, [fp, #-52]
ldr r3, [fp, #32]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-60]
add r3, r2, r3
ldr r2, [fp, #4] @ float
str r2, [r3] @ float
ldr r3, [fp, #32]
sub r2, r3, #1
ldr r3, [fp, #-44]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-44]
lsl r3, r3, #2
ldr r2, [fp, #-60]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-48] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-48] @ float
mov r3, #1
str r3, [fp, #-40]
b .L709
.L710:
ldr r2, [fp, #28]
ldr r3, [fp, #-40]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #16]
add r3, r2, r3
ldr r0, [r3]
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #8]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-52]
bl fxp_sub
str r0, [fp, #-52]
ldr r3, [fp, #-40]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #8]
add r2, r2, r3
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r1, [fp, #8]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r2, [fp, #28]
ldr r3, [fp, #-40]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-64]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-48] @ float
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-48] @ float
ldr r3, [fp, #-40]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r2, r2, r3
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r1, [fp, #-56]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L709:
ldr r3, [fp, #28]
sub r3, r3, #1
ldr r2, [fp, #-40]
cmp r2, r3
blt .L710
ldr r3, [fp, #28]
cmp r3, #1
ble .L711
ldr r2, [fp, #28]
ldr r3, [fp, #-40]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #16]
add r3, r2, r3
ldr r0, [r3]
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #8]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-52]
bl fxp_sub
str r0, [fp, #-52]
.L711:
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #8]
add r3, r2, r3
ldr r2, [fp, #-52]
str r2, [r3]
ldr r3, [fp, #28]
cmp r3, #1
ble .L712
ldr r2, [fp, #28]
ldr r3, [fp, #-40]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-64]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-48] @ float
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-48] @ float
.L712:
ldr r3, [fp, #28]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r2, [fp, #-48] @ float
str r2, [r3] @ float
ldr r0, [fp, #-52]
bl fxp_to_float
mov r3, r0
ldr r1, [fp, #-48] @ float
mov r0, r3
bl __aeabi_fsub
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size iirOutBothL2, .-iirOutBothL2
.section .rodata
.align 2
.LC33:
.ascii "An Overflow Occurred in the node a0\000"
.text
.align 2
.global fxp_direct_form_1
.syntax unified
.arm
.fpu softvfp
.type fxp_direct_form_1, %function
fxp_direct_form_1:
@ args = 8, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-16]
ldr r3, [fp, #-48]
add r3, r3, #4
str r3, [fp, #-32]
ldr r3, [fp, #4]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
str r3, [fp, #-28]
ldr r3, [fp, #-52]
str r3, [fp, #-24]
ldr r3, [fp, #8]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-44]
add r3, r2, r3
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-12]
b .L715
.L716:
ldr r3, [fp, #-24]
add r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3]
ldr r3, [fp, #-20]
sub r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16]
bl fxp_add
str r0, [fp, #-16]
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L715:
ldr r2, [fp, #-12]
ldr r3, [fp, #8]
cmp r2, r3
blt .L716
mov r3, #1
str r3, [fp, #-8]
b .L717
.L718:
ldr r3, [fp, #-32]
add r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3]
ldr r3, [fp, #-28]
sub r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16]
bl fxp_sub
str r0, [fp, #-16]
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L717:
ldr r2, [fp, #-8]
ldr r3, [fp, #4]
cmp r2, r3
blt .L718
ldr r1, .L720
ldr r0, [fp, #-16]
bl fxp_verify_overflow_node
ldr r3, [fp, #-48]
ldr r3, [r3]
mov r1, r3
ldr r0, [fp, #-16]
bl fxp_div
str r0, [fp, #-16]
ldr r0, [fp, #-16]
bl fxp_quantize
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L721:
.align 2
.L720:
.word .LC33
.size fxp_direct_form_1, .-fxp_direct_form_1
.section .rodata
.align 2
.LC34:
.ascii "An Overflow Occurred in the node b0\000"
.text
.align 2
.global fxp_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type fxp_direct_form_2, %function
fxp_direct_form_2:
@ args = 8, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #44
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-24]
ldr r3, [fp, #-48]
add r3, r3, #4
str r3, [fp, #-36]
ldr r3, [fp, #-52]
str r3, [fp, #-32]
ldr r3, [fp, #-40]
add r3, r3, #4
str r3, [fp, #-28]
mov r3, #1
str r3, [fp, #-16]
b .L723
.L724:
ldr r3, [fp, #-40]
ldr r4, [r3]
ldr r3, [fp, #-36]
add r2, r3, #4
str r2, [fp, #-36]
ldr r0, [r3]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
mov r0, r4
bl fxp_sub
mov r2, r0
ldr r3, [fp, #-40]
str r2, [r3]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L723:
ldr r2, [fp, #-16]
ldr r3, [fp, #4]
cmp r2, r3
blt .L724
ldr r3, [fp, #-40]
ldr r3, [r3]
ldr r1, [fp, #-44]
mov r0, r3
bl fxp_add
mov r2, r0
ldr r3, [fp, #-40]
str r2, [r3]
ldr r3, [fp, #-40]
ldr r2, [r3]
ldr r3, [fp, #-48]
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl fxp_div
mov r2, r0
ldr r3, [fp, #-40]
str r2, [r3]
ldr r3, [fp, #-40]
ldr r3, [r3]
ldr r1, .L728
mov r0, r3
bl fxp_verify_overflow_node
ldr r3, [fp, #-40]
str r3, [fp, #-28]
mov r3, #0
str r3, [fp, #-20]
b .L725
.L726:
ldr r3, [fp, #-32]
add r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
ldr r0, [fp, #-24]
bl fxp_add
str r0, [fp, #-24]
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L725:
ldr r2, [fp, #-20]
ldr r3, [fp, #8]
cmp r2, r3
blt .L726
ldr r0, [fp, #-24]
bl fxp_quantize
mov r3, r0
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L729:
.align 2
.L728:
.word .LC34
.size fxp_direct_form_2, .-fxp_direct_form_2
.align 2
.global fxp_transposed_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type fxp_transposed_direct_form_2, %function
fxp_transposed_direct_form_2:
@ args = 8, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #40
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-20]
ldr r3, [fp, #-48]
add r3, r3, #4
str r3, [fp, #-32]
ldr r3, [fp, #-52]
str r3, [fp, #-28]
ldr r2, [fp, #8]
ldr r3, [fp, #4]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-16]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3]
ldr r1, [fp, #-44]
mov r0, r3
bl fxp_mult
mov r2, r0
ldr r3, [fp, #-40]
ldr r3, [r3]
mov r1, r3
mov r0, r2
bl fxp_add
str r0, [fp, #-20]
ldr r3, [fp, #-48]
ldr r3, [r3]
mov r1, r3
ldr r0, [fp, #-20]
bl fxp_div
str r0, [fp, #-20]
mov r3, #0
str r3, [fp, #-24]
b .L731
.L734:
ldr r3, [fp, #-24]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r2, r2, r3
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r1, [fp, #-40]
add r3, r1, r3
ldr r2, [r2]
str r2, [r3]
ldr r3, [fp, #4]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
bge .L732
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r5, [r3]
ldr r3, [fp, #-32]
add r2, r3, #4
str r2, [fp, #-32]
ldr r3, [r3]
ldr r1, [fp, #-20]
mov r0, r3
bl fxp_mult
mov r1, r0
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r4, r2, r3
mov r0, r5
bl fxp_sub
mov r3, r0
str r3, [r4]
.L732:
ldr r3, [fp, #8]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
bge .L733
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r5, [r3]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3]
ldr r1, [fp, #-44]
mov r0, r3
bl fxp_mult
mov r1, r0
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r4, r2, r3
mov r0, r5
bl fxp_add
mov r3, r0
str r3, [r4]
.L733:
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L731:
ldr r3, [fp, #-16]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
blt .L734
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r3, [r3]
ldr r1, .L736
mov r0, r3
bl fxp_verify_overflow_node
ldr r0, [fp, #-20]
bl fxp_quantize
mov r3, r0
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L737:
.align 2
.L736:
.word .LC33
.size fxp_transposed_direct_form_2, .-fxp_transposed_direct_form_2
.align 2
.global double_direct_form_1
.syntax unified
.arm
.fpu softvfp
.type double_direct_form_1, %function
double_direct_form_1:
@ args = 8, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r2, #0
mov r3, #0
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-48]
add r3, r3, #8
str r3, [fp, #-36]
ldr r3, [fp, #4]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
str r3, [fp, #-32]
ldr r3, [fp, #-52]
str r3, [fp, #-28]
ldr r3, [fp, #8]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-44]
add r3, r2, r3
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-20]
b .L739
.L740:
ldr r3, [fp, #-28]
add r2, r3, #8
str r2, [fp, #-28]
ldmia r3, {r0-r1}
ldr r3, [fp, #-24]
sub r2, r3, #8
str r2, [fp, #-24]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L739:
ldr r2, [fp, #-20]
ldr r3, [fp, #8]
cmp r2, r3
blt .L740
mov r3, #1
str r3, [fp, #-16]
b .L741
.L742:
ldr r3, [fp, #-36]
add r2, r3, #8
str r2, [fp, #-36]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
sub r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L741:
ldr r2, [fp, #-16]
ldr r3, [fp, #4]
cmp r2, r3
blt .L742
ldr r3, [fp, #-48]
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size double_direct_form_1, .-double_direct_form_1
.align 2
.global double_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type double_direct_form_2, %function
double_direct_form_2:
@ args = 16, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #48
str r0, [fp, #-48]
str r2, [fp, #-60]
str r3, [fp, #-56]
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #4]
add r3, r3, #8
str r3, [fp, #-40]
ldr r3, [fp, #8]
str r3, [fp, #-36]
ldr r3, [fp, #-48]
add r3, r3, #8
str r3, [fp, #-32]
mov r3, #1
str r3, [fp, #-24]
b .L745
.L746:
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
add r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #-48]
ldmia r3, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, [fp, #-48]
stm r1, {r2-r3}
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L745:
ldr r2, [fp, #-24]
ldr r3, [fp, #12]
cmp r2, r3
blt .L746
ldr r3, [fp, #-48]
ldmia r3, {r0-r1}
sub r3, fp, #60
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r1, [fp, #-48]
stm r1, {r2-r3}
ldr r3, [fp, #-48]
ldmia r3, {r0-r1}
ldr r3, [fp, #4]
ldmia r3, {r2-r3}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
ldr r1, [fp, #-48]
stm r1, {r2-r3}
ldr r3, [fp, #-48]
str r3, [fp, #-32]
mov r3, #0
str r3, [fp, #-28]
b .L747
.L748:
ldr r3, [fp, #-36]
add r2, r3, #8
str r2, [fp, #-36]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
add r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L747:
ldr r2, [fp, #-28]
ldr r3, [fp, #16]
cmp r2, r3
blt .L748
sub r3, fp, #20
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.size double_direct_form_2, .-double_direct_form_2
.align 2
.global double_transposed_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type double_transposed_direct_form_2, %function
double_transposed_direct_form_2:
@ args = 16, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r6, r7, fp, lr}
add fp, sp, #16
sub sp, sp, #44
str r0, [fp, #-48]
str r2, [fp, #-60]
str r3, [fp, #-56]
mov r2, #0
mov r3, #0
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #4]
add r3, r3, #8
str r3, [fp, #-44]
ldr r3, [fp, #8]
str r3, [fp, #-40]
ldr r2, [fp, #16]
ldr r3, [fp, #12]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-32]
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
sub r3, fp, #60
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-48]
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #4]
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-36]
b .L751
.L754:
ldr r3, [fp, #-36]
add r3, r3, #1
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r3, r2, r3
ldr r2, [fp, #-36]
lsl r2, r2, #3
ldr r1, [fp, #-48]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #12]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
bge .L752
ldr r3, [fp, #-44]
add r2, r3, #8
str r2, [fp, #-44]
ldmia r3, {r0-r1}
sub r3, fp, #28
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r4, r2, r3
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
.L752:
ldr r3, [fp, #16]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
bge .L753
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
sub r3, fp, #60
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-36]
lsl r1, r1, #3
ldr r0, [fp, #-48]
add r4, r0, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
.L753:
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L751:
ldr r3, [fp, #-32]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
blt .L754
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #16
@ sp needed
pop {r4, r6, r7, fp, pc}
.size double_transposed_direct_form_2, .-double_transposed_direct_form_2
.align 2
.global float_direct_form_1
.syntax unified
.arm
.fpu softvfp
.type float_direct_form_1, %function
float_direct_form_1:
@ args = 8, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-48]
add r3, r3, #4
str r3, [fp, #-32]
ldr r3, [fp, #4]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
str r3, [fp, #-28]
ldr r3, [fp, #-52]
str r3, [fp, #-24]
ldr r3, [fp, #8]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-44]
add r3, r2, r3
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-12]
b .L757
.L758:
ldr r3, [fp, #-24]
add r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
sub r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L757:
ldr r2, [fp, #-12]
ldr r3, [fp, #8]
cmp r2, r3
blt .L758
mov r3, #1
str r3, [fp, #-8]
b .L759
.L760:
ldr r3, [fp, #-32]
add r2, r3, #4
str r2, [fp, #-32]
ldr r0, [r3] @ float
ldr r3, [fp, #-28]
sub r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fsub
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L759:
ldr r2, [fp, #-8]
ldr r3, [fp, #4]
cmp r2, r3
blt .L760
ldr r3, [fp, #-48]
ldr r3, [r3] @ float
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-16] @ float
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size float_direct_form_1, .-float_direct_form_1
.align 2
.global float_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type float_direct_form_2, %function
float_direct_form_2:
@ args = 8, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
str r0, [fp, #-32]
str r1, [fp, #-36] @ float
str r2, [fp, #-40]
str r3, [fp, #-44]
mov r3, #0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-40]
add r3, r3, #4
str r3, [fp, #-28]
ldr r3, [fp, #-44]
str r3, [fp, #-24]
ldr r3, [fp, #-32]
add r3, r3, #4
str r3, [fp, #-20]
mov r3, #1
str r3, [fp, #-8]
b .L763
.L764:
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r2, r3
ldr r3, [fp, #-32]
ldr r3, [r3] @ float
mov r1, r2
mov r0, r3
bl __aeabi_fsub
mov r3, r0
mov r2, r3
ldr r3, [fp, #-32]
str r2, [r3] @ float
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L763:
ldr r2, [fp, #-8]
ldr r3, [fp, #4]
cmp r2, r3
blt .L764
ldr r3, [fp, #-32]
ldr r3, [r3] @ float
ldr r1, [fp, #-36] @ float
mov r0, r3
bl __aeabi_fadd
mov r3, r0
mov r2, r3
ldr r3, [fp, #-32]
str r2, [r3] @ float
ldr r3, [fp, #-32]
ldr r2, [r3] @ float
ldr r3, [fp, #-40]
ldr r3, [r3] @ float
mov r1, r3
mov r0, r2
bl __aeabi_fdiv
mov r3, r0
mov r2, r3
ldr r3, [fp, #-32]
str r2, [r3] @ float
ldr r3, [fp, #-32]
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-12]
b .L765
.L766:
ldr r3, [fp, #-24]
add r2, r3, #4
str r2, [fp, #-24]
ldr r0, [r3] @ float
ldr r3, [fp, #-20]
add r2, r3, #4
str r2, [fp, #-20]
ldr r3, [r3] @ float
mov r1, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-16] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L765:
ldr r2, [fp, #-12]
ldr r3, [fp, #8]
cmp r2, r3
blt .L766
ldr r3, [fp, #-16] @ float
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size float_direct_form_2, .-float_direct_form_2
.align 2
.global float_transposed_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type float_transposed_direct_form_2, %function
float_transposed_direct_form_2:
@ args = 8, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #44
str r0, [fp, #-40]
str r1, [fp, #-44] @ float
str r2, [fp, #-48]
str r3, [fp, #-52]
mov r3, #0
str r3, [fp, #-20] @ float
ldr r3, [fp, #-48]
add r3, r3, #4
str r3, [fp, #-32]
ldr r3, [fp, #-52]
str r3, [fp, #-28]
ldr r2, [fp, #8]
ldr r3, [fp, #4]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-16]
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
ldr r1, [fp, #-44] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r2, r3
ldr r3, [fp, #-40]
ldr r3, [r3] @ float
mov r1, r3
mov r0, r2
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-20] @ float
ldr r3, [fp, #-48]
ldr r3, [r3] @ float
mov r1, r3
ldr r0, [fp, #-20] @ float
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-20] @ float
mov r3, #0
str r3, [fp, #-24]
b .L769
.L772:
ldr r3, [fp, #-24]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r2, r2, r3
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r1, [fp, #-40]
add r3, r1, r3
ldr r2, [r2] @ float
str r2, [r3] @ float
ldr r3, [fp, #4]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
bge .L770
ldr r3, [fp, #-32]
add r2, r3, #4
str r2, [fp, #-32]
ldr r3, [r3] @ float
ldr r1, [fp, #-20] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r0, [r3] @ float
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r4, r2, r3
bl __aeabi_fsub
mov r3, r0
str r3, [r4] @ float
.L770:
ldr r3, [fp, #8]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
bge .L771
ldr r3, [fp, #-28]
add r2, r3, #4
str r2, [fp, #-28]
ldr r3, [r3] @ float
ldr r1, [fp, #-44] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r0, r3
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r3, r2, r3
ldr r1, [r3] @ float
ldr r3, [fp, #-24]
lsl r3, r3, #2
ldr r2, [fp, #-40]
add r4, r2, r3
bl __aeabi_fadd
mov r3, r0
str r3, [r4] @ float
.L771:
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L769:
ldr r3, [fp, #-16]
sub r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
blt .L772
ldr r3, [fp, #-20] @ float
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size float_transposed_direct_form_2, .-float_transposed_direct_form_2
.section .rodata
.align 2
.LC35:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/core/realizations.h\000"
.align 2
.LC36:
.ascii "(double) timer1 * hw.cycle <= ds.sample_time\000"
.text
.align 2
.global double_direct_form_1_MSP430
.syntax unified
.arm
.fpu softvfp
.type double_direct_form_1_MSP430, %function
double_direct_form_1_MSP430:
@ args = 8, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #56
str r0, [fp, #-48]
str r1, [fp, #-52]
str r2, [fp, #-56]
str r3, [fp, #-60]
mov r3, #0
str r3, [fp, #-40]
mov r2, #0
mov r3, #0
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-56]
add r3, r3, #8
str r3, [fp, #-36]
ldr r3, [fp, #4]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r3, r2, r3
str r3, [fp, #-32]
ldr r3, [fp, #-60]
str r3, [fp, #-28]
ldr r3, [fp, #8]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-52]
add r3, r2, r3
str r3, [fp, #-24]
ldr r3, [fp, #-40]
add r3, r3, #91
str r3, [fp, #-40]
mov r3, #0
str r3, [fp, #-20]
b .L775
.L776:
ldr r3, [fp, #-28]
add r2, r3, #8
str r2, [fp, #-28]
ldmia r3, {r0-r1}
ldr r3, [fp, #-24]
sub r2, r3, #8
str r2, [fp, #-24]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-40]
add r3, r3, #47
str r3, [fp, #-40]
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L775:
ldr r2, [fp, #-20]
ldr r3, [fp, #8]
cmp r2, r3
blt .L776
mov r3, #1
str r3, [fp, #-16]
b .L777
.L778:
ldr r3, [fp, #-36]
add r2, r3, #8
str r2, [fp, #-36]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
sub r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-40]
add r3, r3, #57
str r3, [fp, #-40]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L777:
ldr r2, [fp, #-16]
ldr r3, [fp, #4]
cmp r2, r3
blt .L778
ldr r3, [fp, #-40]
add r3, r3, #3
str r3, [fp, #-40]
ldr r0, [fp, #-40]
bl __aeabi_i2d
ldr r3, .L781
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, .L781+4
add r3, r3, #1616
ldmia r3, {r2-r3}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L779
ldr r3, .L781+8
mov r2, #235
ldr r1, .L781+12
ldr r0, .L781+16
bl __assert_fail
.L779:
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L782:
.align 2
.L781:
.word hw
.word ds
.word __PRETTY_FUNCTION__.6554
.word .LC35
.word .LC36
.size double_direct_form_1_MSP430, .-double_direct_form_1_MSP430
.align 2
.global double_direct_form_2_MSP430
.syntax unified
.arm
.fpu softvfp
.type double_direct_form_2_MSP430, %function
double_direct_form_2_MSP430:
@ args = 16, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #48
str r0, [fp, #-48]
str r2, [fp, #-60]
str r3, [fp, #-56]
mov r3, #0
str r3, [fp, #-44]
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #4]
add r3, r3, #8
str r3, [fp, #-40]
ldr r3, [fp, #8]
str r3, [fp, #-36]
ldr r3, [fp, #-48]
add r3, r3, #8
str r3, [fp, #-32]
ldr r3, [fp, #-44]
add r3, r3, #71
str r3, [fp, #-44]
mov r3, #1
str r3, [fp, #-24]
b .L784
.L785:
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
add r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #-48]
ldmia r3, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, [fp, #-48]
stm r1, {r2-r3}
ldr r3, [fp, #-44]
add r3, r3, #54
str r3, [fp, #-44]
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L784:
ldr r2, [fp, #-24]
ldr r3, [fp, #12]
cmp r2, r3
blt .L785
ldr r3, [fp, #-48]
ldmia r3, {r0-r1}
sub r3, fp, #60
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r1, [fp, #-48]
stm r1, {r2-r3}
ldr r3, [fp, #-48]
ldmia r3, {r0-r1}
ldr r3, [fp, #4]
ldmia r3, {r2-r3}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
ldr r1, [fp, #-48]
stm r1, {r2-r3}
ldr r3, [fp, #-48]
str r3, [fp, #-32]
mov r3, #0
str r3, [fp, #-28]
b .L786
.L787:
ldr r3, [fp, #-36]
add r2, r3, #8
str r2, [fp, #-36]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
add r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-44]
add r3, r3, #46
str r3, [fp, #-44]
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L786:
ldr r2, [fp, #-28]
ldr r3, [fp, #16]
cmp r2, r3
blt .L787
ldr r3, [fp, #-44]
add r3, r3, #38
str r3, [fp, #-44]
ldr r0, [fp, #-44]
bl __aeabi_i2d
ldr r3, .L790
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, .L790+4
add r3, r3, #1616
ldmia r3, {r2-r3}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L788
ldr r3, .L790+8
ldr r2, .L790+12
ldr r1, .L790+16
ldr r0, .L790+20
bl __assert_fail
.L788:
sub r3, fp, #20
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L791:
.align 2
.L790:
.word hw
.word ds
.word __PRETTY_FUNCTION__.6576
.word 262
.word .LC35
.word .LC36
.size double_direct_form_2_MSP430, .-double_direct_form_2_MSP430
.align 2
.global double_transposed_direct_form_2_MSP430
.syntax unified
.arm
.fpu softvfp
.type double_transposed_direct_form_2_MSP430, %function
double_transposed_direct_form_2_MSP430:
@ args = 16, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r6, r7, fp, lr}
add fp, sp, #16
sub sp, sp, #52
str r0, [fp, #-56]
str r2, [fp, #-68]
str r3, [fp, #-64]
mov r3, #0
str r3, [fp, #-48]
mov r2, #0
mov r3, #0
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #4]
add r3, r3, #8
str r3, [fp, #-44]
ldr r3, [fp, #8]
str r3, [fp, #-40]
ldr r2, [fp, #16]
ldr r3, [fp, #12]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-32]
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
sub r3, fp, #68
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-56]
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-48]
add r3, r3, #105
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-36]
b .L793
.L796:
ldr r3, [fp, #-36]
add r3, r3, #1
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r2, [fp, #-36]
lsl r2, r2, #3
ldr r1, [fp, #-56]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #12]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
bge .L794
ldr r3, [fp, #-44]
add r2, r3, #8
str r2, [fp, #-44]
ldmia r3, {r0-r1}
sub r3, fp, #28
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r4, r2, r3
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r3, [fp, #-48]
add r3, r3, #41
str r3, [fp, #-48]
.L794:
ldr r3, [fp, #16]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
bge .L795
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
sub r3, fp, #68
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-36]
lsl r1, r1, #3
ldr r0, [fp, #-56]
add r4, r0, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r3, [fp, #-48]
add r3, r3, #38
str r3, [fp, #-48]
.L795:
ldr r3, [fp, #-48]
add r3, r3, #54
str r3, [fp, #-48]
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L793:
ldr r3, [fp, #-32]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
blt .L796
ldr r3, [fp, #-48]
add r3, r3, #7
str r3, [fp, #-48]
ldr r0, [fp, #-48]
bl __aeabi_i2d
ldr r3, .L799
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, .L799+4
add r3, r3, #1616
ldmia r3, {r2-r3}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L797
ldr r3, .L799+8
ldr r2, .L799+12
ldr r1, .L799+16
ldr r0, .L799+20
bl __assert_fail
.L797:
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #16
@ sp needed
pop {r4, r6, r7, fp, pc}
.L800:
.align 2
.L799:
.word hw
.word ds
.word __PRETTY_FUNCTION__.6594
.word 291
.word .LC35
.word .LC36
.size double_transposed_direct_form_2_MSP430, .-double_transposed_direct_form_2_MSP430
.align 2
.global generic_timing_double_direct_form_1
.syntax unified
.arm
.fpu softvfp
.type generic_timing_double_direct_form_1, %function
generic_timing_double_direct_form_1:
@ args = 8, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
ldr r3, .L807
ldr r2, [r3, #16]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
mov r1, r3
ldr r3, .L807
ldr r2, [r3, #20]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L807
ldr r3, [r3, #24]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #28]
add r1, r2, r3
ldr r3, .L807
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L807
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #2
add r2, r1, r3
ldr r3, .L807+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L807+4
str r3, [r2]
mov r2, #0
mov r3, #0
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-48]
add r3, r3, #8
str r3, [fp, #-36]
ldr r3, [fp, #4]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
str r3, [fp, #-32]
ldr r3, [fp, #-52]
str r3, [fp, #-28]
ldr r3, [fp, #8]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-44]
add r3, r2, r3
str r3, [fp, #-24]
ldr r3, .L807
ldr r2, [r3, #36]
ldr r3, .L807
ldr r3, [r3, #40]
add r2, r2, r3
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
mov r2, r3
ldr r3, .L807
ldr r3, [r3, #44]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #48]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #52]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #56]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #60]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #64]
add r3, r2, r3
lsl r2, r3, #1
ldr r3, .L807
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L807+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L807+4
str r3, [r2]
ldr r3, .L807
ldr r3, [r3, #36]
lsl r2, r3, #1
ldr r3, .L807
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L807+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L807+4
str r3, [r2]
mov r3, #0
str r3, [fp, #-20]
b .L802
.L803:
ldr r3, .L807
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #2
mov r1, r3
ldr r3, .L807
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #3
add r2, r1, r3
ldr r3, .L807
ldr r3, [r3, #44]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #48]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #80]
add r1, r2, r3
ldr r3, .L807
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #1
add r2, r1, r3
ldr r3, .L807
ldr r3, [r3, #84]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #88]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #92]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #96]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #104]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L807+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L807+4
str r3, [r2]
ldr r3, [fp, #-28]
add r2, r3, #8
str r2, [fp, #-28]
ldmia r3, {r0-r1}
ldr r3, [fp, #-24]
sub r2, r3, #8
str r2, [fp, #-24]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L802:
ldr r2, [fp, #-20]
ldr r3, [fp, #8]
cmp r2, r3
blt .L803
ldr r3, .L807
ldr r2, [r3, #100]
ldr r3, .L807
ldr r3, [r3, #36]
add r3, r2, r3
lsl r2, r3, #1
ldr r3, .L807
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L807+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L807+4
str r3, [r2]
mov r3, #1
str r3, [fp, #-16]
b .L804
.L805:
ldr r3, .L807
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
mov r1, r3
ldr r3, .L807
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #3
add r2, r1, r3
ldr r3, .L807
ldr r3, [r3, #44]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #36]
lsl r3, r3, #3
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #48]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #84]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #88]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #80]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #92]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #96]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #104]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L807+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L807+4
str r3, [r2]
ldr r3, [fp, #-36]
add r2, r3, #8
str r2, [fp, #-36]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
sub r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L804:
ldr r2, [fp, #-16]
ldr r3, [fp, #4]
cmp r2, r3
blt .L805
ldr r3, .L807
ldr r2, [r3, #40]
ldr r3, .L807
ldr r3, [r3, #76]
add r3, r2, r3
lsl r2, r3, #2
ldr r3, .L807
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #20]
add r2, r2, r3
ldr r3, .L807
ldr r3, [r3, #28]
add r1, r2, r3
ldr r3, .L807
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L807
ldr r2, [r3, #108]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
add r2, r1, r3
ldr r3, .L807
ldr r3, [r3, #112]
add r2, r2, r3
ldr r3, .L807+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L807+4
str r3, [r2]
sub r3, fp, #12
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L808:
.align 2
.L807:
.word hw
.word generic_timer
.size generic_timing_double_direct_form_1, .-generic_timing_double_direct_form_1
.align 2
.global generic_timing_double_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type generic_timing_double_direct_form_2, %function
generic_timing_double_direct_form_2:
@ args = 16, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #48
str r0, [fp, #-48]
str r2, [fp, #-60]
str r3, [fp, #-56]
ldr r3, .L815
ldr r3, [r3, #16]
lsl r1, r3, #3
ldr r3, .L815
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #3
sub r3, r3, r2
lsl r3, r3, #1
add r1, r1, r3
ldr r3, .L815
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L815
ldr r2, [r3, #20]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L815
ldr r3, [r3, #24]
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #28]
add r2, r2, r3
ldr r3, .L815+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L815+4
str r3, [r2]
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #4]
add r3, r3, #8
str r3, [fp, #-40]
ldr r3, [fp, #8]
str r3, [fp, #-36]
ldr r3, [fp, #-48]
add r3, r3, #8
str r3, [fp, #-32]
ldr r3, .L815
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #1
mov r1, r3
ldr r3, .L815
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
add r2, r1, r3
ldr r3, .L815
ldr r3, [r3, #68]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L815+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L815+4
str r3, [r2]
ldr r3, .L815
ldr r2, [r3, #100]
ldr r3, .L815
ldr r3, [r3, #36]
add r3, r2, r3
lsl r2, r3, #1
ldr r3, .L815
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L815+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L815+4
str r3, [r2]
mov r3, #1
str r3, [fp, #-24]
b .L810
.L811:
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
add r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r3, [fp, #-48]
ldmia r3, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, [fp, #-48]
stm r1, {r2-r3}
ldr r3, .L815
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #3
sub r2, r3, r2
ldr r3, .L815
ldr r3, [r3, #76]
lsl r3, r3, #5
add r1, r2, r3
ldr r3, .L815
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #3
add r3, r3, r2
add r2, r1, r3
ldr r3, .L815
ldr r3, [r3, #44]
lsl r3, r3, #1
add r1, r2, r3
ldr r3, .L815
ldr r2, [r3, #84]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L815
ldr r3, [r3, #88]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #48]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #116]
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #92]
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #96]
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #104]
add r2, r2, r3
ldr r3, .L815+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L815+4
str r3, [r2]
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L810:
ldr r2, [fp, #-24]
ldr r3, [fp, #12]
cmp r2, r3
blt .L811
ldr r3, [fp, #-48]
ldmia r3, {r0-r1}
sub r3, fp, #60
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r1, [fp, #-48]
stm r1, {r2-r3}
ldr r3, [fp, #-48]
str r3, [fp, #-32]
ldr r3, .L815
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #2
add r1, r3, r2
ldr r3, .L815
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #2
add r1, r1, r3
ldr r3, .L815
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
add r2, r1, r3
ldr r3, .L815
ldr r3, [r3, #116]
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #84]
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #88]
add r2, r2, r3
ldr r3, .L815+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L815+4
str r3, [r2]
ldr r3, .L815
ldr r3, [r3, #36]
lsl r2, r3, #1
ldr r3, .L815
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L815+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L815+4
str r3, [r2]
mov r3, #0
str r3, [fp, #-28]
b .L812
.L813:
ldr r3, [fp, #-36]
add r2, r3, #8
str r2, [fp, #-36]
ldmia r3, {r0-r1}
ldr r3, [fp, #-32]
add r2, r3, #8
str r2, [fp, #-32]
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, .L815
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #2
mov r1, r3
ldr r3, .L815
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #3
add r1, r1, r3
ldr r3, .L815
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #1
add r2, r1, r3
ldr r3, .L815
ldr r3, [r3, #88]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #84]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #44]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #48]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #92]
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #96]
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #104]
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L815+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L815+4
str r3, [r2]
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L812:
ldr r2, [fp, #-28]
ldr r3, [fp, #16]
cmp r2, r3
blt .L813
ldr r3, .L815
ldr r2, [r3, #40]
ldr r3, .L815
ldr r3, [r3, #76]
add r3, r2, r3
lsl r2, r3, #2
ldr r3, .L815
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #20]
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #28]
add r1, r2, r3
ldr r3, .L815
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L815
ldr r3, [r3, #108]
lsl r3, r3, #3
add r2, r2, r3
ldr r3, .L815
ldr r3, [r3, #112]
add r2, r2, r3
ldr r3, .L815+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L815+4
str r3, [r2]
sub r3, fp, #20
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L816:
.align 2
.L815:
.word hw
.word generic_timer
.size generic_timing_double_direct_form_2, .-generic_timing_double_direct_form_2
.align 2
.global generic_timing_double_transposed_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type generic_timing_double_transposed_direct_form_2, %function
generic_timing_double_transposed_direct_form_2:
@ args = 16, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r6, r7, fp, lr}
add fp, sp, #16
sub sp, sp, #44
str r0, [fp, #-48]
str r2, [fp, #-60]
str r3, [fp, #-56]
ldr r3, .L823
ldr r3, [r3, #16]
lsl r1, r3, #3
ldr r3, .L823
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #3
sub r3, r3, r2
lsl r3, r3, #1
add r1, r1, r3
ldr r3, .L823
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L823
ldr r2, [r3, #20]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L823
ldr r3, [r3, #24]
add r2, r2, r3
ldr r3, .L823
ldr r3, [r3, #28]
add r2, r2, r3
ldr r3, .L823+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L823+4
str r3, [r2]
mov r2, #0
mov r3, #0
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #4]
add r3, r3, #8
str r3, [fp, #-44]
ldr r3, [fp, #8]
str r3, [fp, #-40]
ldr r2, [fp, #16]
ldr r3, [fp, #12]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-32]
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
sub r3, fp, #60
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-48]
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, .L823
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #4
sub r1, r3, r2
ldr r3, .L823
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
add r1, r1, r3
ldr r3, .L823
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #3
add r2, r1, r3
ldr r3, .L823
ldr r3, [r3, #88]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L823
ldr r3, [r3, #84]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L823
ldr r3, [r3, #92]
add r2, r2, r3
ldr r3, .L823
ldr r3, [r3, #96]
add r2, r2, r3
ldr r3, .L823
ldr r3, [r3, #44]
add r2, r2, r3
ldr r3, .L823
ldr r3, [r3, #48]
add r2, r2, r3
ldr r3, .L823
ldr r3, [r3, #104]
add r2, r2, r3
ldr r3, .L823
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L823+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L823+4
str r3, [r2]
ldr r3, .L823
ldr r3, [r3, #36]
lsl r2, r3, #1
ldr r3, .L823
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L823+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L823+4
str r3, [r2]
mov r3, #0
str r3, [fp, #-36]
b .L818
.L821:
ldr r3, [fp, #-36]
add r3, r3, #1
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r3, r2, r3
ldr r2, [fp, #-36]
lsl r2, r2, #3
ldr r1, [fp, #-48]
add r1, r1, r2
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #12]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
bge .L819
ldr r3, [fp, #-44]
add r2, r3, #8
str r2, [fp, #-44]
ldmia r3, {r0-r1}
sub r3, fp, #28
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r4, r2, r3
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
.L819:
ldr r3, [fp, #16]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
bge .L820
ldr r3, [fp, #-40]
add r2, r3, #8
str r2, [fp, #-40]
ldmia r3, {r0-r1}
sub r3, fp, #60
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r6, r2
mov r7, r3
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-48]
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-36]
lsl r1, r1, #3
ldr r0, [fp, #-48]
add r4, r0, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
.L820:
ldr r3, .L823
ldr r2, [r3, #76]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r2, r3, #3
sub r2, r2, r3
lsl r3, r2, #1
mov r2, r3
mov r1, r2
ldr r3, .L823
ldr r2, [r3, #40]
mov r3, r2
lsl r3, r3, #6
add r3, r3, r2
add r1, r1, r3
ldr r3, .L823
ldr r2, [r3, #52]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #2
add r1, r1, r3
ldr r3, .L823
ldr r2, [r3, #56]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #2
add r1, r1, r3
ldr r3, .L823
ldr r2, [r3, #36]
mov r3, r2
lsl r3, r3, #4
sub r3, r3, r2
add r1, r1, r3
ldr r3, .L823
ldr r2, [r3, #60]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
add r1, r1, r3
ldr r3, .L823
ldr r2, [r3, #64]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
lsl r3, r3, #1
add r2, r1, r3
ldr r3, .L823
ldr r3, [r3, #68]
lsl r3, r3, #1
add r1, r2, r3
ldr r3, .L823
ldr r2, [r3, #96]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L823
ldr r2, [r3, #92]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r1, r1, r3
ldr r3, .L823
ldr r2, [r3, #84]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
add r2, r1, r3
ldr r3, .L823
ldr r3, [r3, #88]
lsl r3, r3, #2
add r1, r2, r3
ldr r3, .L823
ldr r2, [r3, #44]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
add r1, r1, r3
ldr r3, .L823
ldr r2, [r3, #72]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L823
ldr r3, [r3, #120]
lsl r3, r3, #1
add r1, r2, r3
ldr r3, .L823
ldr r2, [r3, #116]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L823
ldr r3, [r3, #48]
lsl r3, r3, #1
add r1, r2, r3
ldr r3, .L823
ldr r2, [r3, #80]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L823
ldr r3, [r3, #104]
add r2, r2, r3
ldr r3, .L823+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L823+4
str r3, [r2]
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L818:
ldr r3, [fp, #-32]
sub r3, r3, #1
ldr r2, [fp, #-36]
cmp r2, r3
blt .L821
ldr r3, .L823
ldr r2, [r3, #40]
ldr r3, .L823
ldr r3, [r3, #76]
add r2, r2, r3
ldr r3, .L823
ldr r3, [r3, #108]
lsl r3, r3, #1
add r3, r2, r3
lsl r1, r3, #2
ldr r3, .L823
ldr r2, [r3, #32]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
add r2, r1, r3
ldr r3, .L823
ldr r3, [r3, #20]
add r2, r2, r3
ldr r3, .L823
ldr r3, [r3, #28]
add r2, r2, r3
ldr r3, .L823
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L823
ldr r3, [r3, #112]
add r2, r2, r3
ldr r3, .L823+4
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L823+4
str r3, [r2]
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #16
@ sp needed
pop {r4, r6, r7, fp, pc}
.L824:
.align 2
.L823:
.word hw
.word generic_timer
.size generic_timing_double_transposed_direct_form_2, .-generic_timing_double_transposed_direct_form_2
.section .rodata
.align 2
.LC37:
.word __stack_chk_guard
.text
.align 2
.global double_direct_form_1_impl2
.syntax unified
.arm
.fpu softvfp
.type double_direct_form_1_impl2, %function
double_direct_form_1_impl2:
@ args = 12, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, fp, lr}
add fp, sp, #28
sub sp, sp, #48
str r0, [fp, #-56]
str r1, [fp, #-60]
str r2, [fp, #-64]
str r3, [fp, #-68]
ldr r3, [fp, #4]
str r3, [fp, #-72]
ldr r3, [fp, #12]
str r3, [fp, #-76]
ldr r3, .L841
ldr r3, [r3]
str r3, [fp, #-32]
mov r3,#0
mov r3, sp
mov r9, r3
mov r3, #0
str r3, [fp, #-44]
mov r3, #0
str r3, [fp, #-48]
ldr ip, [fp, #-60]
sub r3, ip, #1
str r3, [fp, #-40]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-44]
b .L826
.L831:
ldr r2, [fp, #-36]
ldr r3, [fp, #-44]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
mov r3, #0
str r3, [fp, #-48]
b .L827
.L830:
ldr r2, [fp, #-48]
ldr r3, [fp, #-44]
cmp r2, r3
bgt .L839
ldr r2, [fp, #-36]
ldr r3, [fp, #-44]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r6-r7}
ldr r2, [fp, #-44]
ldr r3, [fp, #-48]
sub r3, r2, r3
lsl r3, r3, #3
ldr r2, [fp, #-56]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-48]
lsl r3, r3, #3
ldr r2, [fp, #-64]
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r0, [fp, #-36]
ldr r1, [fp, #-44]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L827:
ldr r2, [fp, #-48]
ldr r3, [fp, #-68]
cmp r2, r3
blt .L830
b .L829
.L839:
nop
.L829:
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L826:
ldr r2, [fp, #-44]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L831
ldr r3, [fp, #-36]
ldmia r3, {r2-r3}
ldr r1, [fp, #-76]
stm r1, {r2-r3}
mov r3, #1
str r3, [fp, #-44]
b .L832
.L837:
ldr r3, [fp, #-44]
lsl r3, r3, #3
ldr r2, [fp, #-76]
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-44]
lsl r3, r3, #3
ldr r2, [fp, #-76]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-36]
ldr r3, [fp, #-44]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr ip, [fp, #-44]
lsl ip, ip, #3
ldr lr, [fp, #-76]
add r6, lr, ip
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r6, {r2-r3}
mov r3, #1
str r3, [fp, #-48]
b .L833
.L836:
ldr r2, [fp, #-48]
ldr r3, [fp, #-44]
cmp r2, r3
bgt .L840
ldr r3, [fp, #-44]
lsl r3, r3, #3
ldr r2, [fp, #-76]
add r3, r2, r3
ldmia r3, {r6-r7}
ldr r2, [fp, #-44]
ldr r3, [fp, #-48]
sub r3, r2, r3
lsl r3, r3, #3
ldr r2, [fp, #-76]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-48]
lsl r3, r3, #3
ldr r2, [fp, #-72]
add r3, r2, r3
ldmia r3, {r2-r3}
mov r4, r2
eor r5, r3, #-2147483648
mov r2, r4
mov r3, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-44]
lsl r3, r3, #3
ldr r2, [fp, #-76]
add r8, r2, r3
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r8, {r2-r3}
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L833:
ldr r2, [fp, #-48]
ldr r3, [fp, #8]
cmp r2, r3
blt .L836
b .L835
.L840:
nop
.L835:
ldr r3, [fp, #-44]
add r3, r3, #1
str r3, [fp, #-44]
.L832:
ldr r2, [fp, #-44]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L837
mov sp, r9
nop
ldr r3, .L841
ldr r2, [r3]
ldr r3, [fp, #-32]
eors r2, r3, r2
mov r3, #0
beq .L838
bl __stack_chk_fail
.L838:
sub sp, fp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, fp, pc}
.L842:
.align 2
.L841:
.word .LC37
.size double_direct_form_1_impl2, .-double_direct_form_1_impl2
.section .rodata
.align 2
.LC38:
.word __stack_chk_guard
.text
.align 2
.global fxp_direct_form_1_impl2
.syntax unified
.arm
.fpu softvfp
.type fxp_direct_form_1_impl2, %function
fxp_direct_form_1_impl2:
@ args = 12, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, fp, lr}
add fp, sp, #16
sub sp, sp, #52
str r0, [fp, #-48]
str r1, [fp, #-52]
str r2, [fp, #-56]
str r3, [fp, #-60]
ldr r3, [fp, #4]
str r3, [fp, #-64]
ldr r3, [fp, #12]
str r3, [fp, #-68]
ldr r3, .L859
ldr r3, [r3]
str r3, [fp, #-24]
mov r3,#0
mov r3, sp
mov r6, r3
mov r3, #0
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-40]
ldr ip, [fp, #-52]
sub r3, ip, #1
str r3, [fp, #-32]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-28]
mov r3, #0
str r3, [fp, #-36]
b .L844
.L849:
ldr r3, [fp, #-28]
ldr r2, [fp, #-36]
mov r1, #0
str r1, [r3, r2, lsl #2]
mov r3, #0
str r3, [fp, #-40]
b .L845
.L848:
ldr r2, [fp, #-40]
ldr r3, [fp, #-36]
cmp r2, r3
bgt .L857
ldr r3, [fp, #-28]
ldr r2, [fp, #-36]
ldr r4, [r3, r2, lsl #2]
ldr r2, [fp, #-36]
ldr r3, [fp, #-40]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-48]
add r3, r2, r3
ldr r0, [r3]
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #-56]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
bl fxp_mult
mov r3, r0
mov r1, r3
mov r0, r4
bl fxp_add
mov r1, r0
ldr r3, [fp, #-28]
ldr r2, [fp, #-36]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L845:
ldr r2, [fp, #-40]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L848
b .L847
.L857:
nop
.L847:
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L844:
ldr r2, [fp, #-36]
ldr r3, [fp, #-52]
cmp r2, r3
blt .L849
ldr r3, [fp, #-28]
ldr r2, [r3]
ldr r3, [fp, #-68]
str r2, [r3]
mov r3, #1
str r3, [fp, #-36]
b .L850
.L855:
ldr r3, [fp, #-36]
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-36]
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
ldr r0, [r3]
ldr r3, [fp, #-28]
ldr r2, [fp, #-36]
ldr r1, [r3, r2, lsl #2]
ldr r3, [fp, #-36]
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r4, r2, r3
bl fxp_add
mov r3, r0
str r3, [r4]
mov r3, #1
str r3, [fp, #-40]
b .L851
.L854:
ldr r2, [fp, #-40]
ldr r3, [fp, #-36]
cmp r2, r3
bgt .L858
ldr r3, [fp, #-36]
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
ldr r5, [r3]
ldr r2, [fp, #-36]
ldr r3, [fp, #-40]
sub r3, r2, r3
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r3, r2, r3
ldr r0, [r3]
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #-64]
add r3, r2, r3
ldr r3, [r3]
rsb r3, r3, #0
mov r1, r3
bl fxp_mult
mov r1, r0
ldr r3, [fp, #-36]
lsl r3, r3, #2
ldr r2, [fp, #-68]
add r4, r2, r3
mov r0, r5
bl fxp_add
mov r3, r0
str r3, [r4]
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L851:
ldr r2, [fp, #-40]
ldr r3, [fp, #8]
cmp r2, r3
blt .L854
b .L853
.L858:
nop
.L853:
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L850:
ldr r2, [fp, #-36]
ldr r3, [fp, #-52]
cmp r2, r3
blt .L855
mov sp, r6
nop
ldr r3, .L859
ldr r2, [r3]
ldr r3, [fp, #-24]
eors r2, r3, r2
mov r3, #0
beq .L856
bl __stack_chk_fail
.L856:
sub sp, fp, #16
@ sp needed
pop {r4, r5, r6, fp, pc}
.L860:
.align 2
.L859:
.word .LC38
.size fxp_direct_form_1_impl2, .-fxp_direct_form_1_impl2
.align 2
.global nchoosek
.syntax unified
.arm
.fpu softvfp
.type nchoosek, %function
nchoosek:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r3, [fp, #-12]
cmp r3, #0
bne .L862
mov r3, #1
b .L863
.L862:
ldr r3, [fp, #-8]
sub r2, r3, #1
ldr r3, [fp, #-12]
sub r3, r3, #1
mov r1, r3
mov r0, r2
bl nchoosek
mov r2, r0
ldr r3, [fp, #-8]
mul r3, r2, r3
ldr r1, [fp, #-12]
mov r0, r3
bl __aeabi_idiv
mov r3, r0
.L863:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size nchoosek, .-nchoosek
.align 2
.global generate_delta_coefficients
.syntax unified
.arm
.fpu softvfp
.type generate_delta_coefficients, %function
generate_delta_coefficients:
@ args = 8, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #40
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
ldr r3, [fp, #-48]
sub r3, r3, #1
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-32]
b .L865
.L868:
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-28]
b .L866
.L867:
ldr r3, [fp, #-28]
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r2, [fp, #-24]
ldr r3, [fp, #-28]
sub r0, r2, r3
ldr r2, [fp, #-32]
ldr r3, [fp, #-28]
sub r3, r2, r3
mov r1, r3
bl nchoosek
mov r3, r0
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L866:
ldr r2, [fp, #-28]
ldr r3, [fp, #-32]
cmp r2, r3
ble .L867
ldr r2, [fp, #-24]
ldr r3, [fp, #-32]
sub r3, r2, r3
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
ldmib fp, {r0-r1}
bl internal_pow
ldr r3, [fp, #-32]
lsl r3, r3, #3
ldr r2, [fp, #-44]
add r4, r2, r3
sub r3, fp, #20
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L865:
ldr r2, [fp, #-32]
ldr r3, [fp, #-24]
cmp r2, r3
ble .L868
nop
nop
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.size generate_delta_coefficients, .-generate_delta_coefficients
.align 2
.global get_delta_transfer_function
.syntax unified
.arm
.fpu softvfp
.type get_delta_transfer_function, %function
get_delta_transfer_function:
@ args = 16, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-8]
str r1, [fp, #-12]
str r2, [fp, #-16]
str r3, [fp, #-20]
add r3, fp, #12
ldmia r3, {r2-r3}
stm sp, {r2-r3}
ldr r2, [fp, #-16]
ldr r1, [fp, #-12]
ldr r0, [fp, #-8]
bl generate_delta_coefficients
add r3, fp, #12
ldmia r3, {r2-r3}
stm sp, {r2-r3}
ldr r2, [fp, #8]
ldr r1, [fp, #4]
ldr r0, [fp, #-20]
bl generate_delta_coefficients
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size get_delta_transfer_function, .-get_delta_transfer_function
.align 2
.global get_delta_transfer_function_with_base
.syntax unified
.arm
.fpu softvfp
.type get_delta_transfer_function_with_base, %function
get_delta_transfer_function_with_base:
@ args = 16, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #40
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
ldr r3, [fp, #8]
sub r3, r3, #1
str r3, [fp, #-28]
ldr r3, [fp, #-48]
sub r3, r3, #1
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-36]
b .L871
.L874:
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-32]
b .L872
.L873:
ldr r3, [fp, #-32]
lsl r3, r3, #3
ldr r2, [fp, #-52]
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r2, [fp, #-28]
ldr r3, [fp, #-32]
sub r0, r2, r3
ldr r2, [fp, #-36]
ldr r3, [fp, #-32]
sub r3, r2, r3
mov r1, r3
bl nchoosek
mov r3, r0
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L872:
ldr r2, [fp, #-32]
ldr r3, [fp, #-36]
cmp r2, r3
ble .L873
ldr r2, [fp, #-28]
ldr r3, [fp, #-36]
sub r3, r2, r3
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
add r1, fp, #12
ldmia r1, {r0-r1}
bl internal_pow
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #4]
add r4, r2, r3
sub r3, fp, #20
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L871:
ldr r2, [fp, #-36]
ldr r3, [fp, #-28]
cmp r2, r3
ble .L874
mov r3, #0
str r3, [fp, #-36]
b .L875
.L878:
mov r2, #0
mov r3, #0
str r2, [fp, #-20]
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-32]
b .L876
.L877:
ldr r3, [fp, #-32]
lsl r3, r3, #3
ldr r2, [fp, #-40]
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r2, [fp, #-24]
ldr r3, [fp, #-32]
sub r0, r2, r3
ldr r2, [fp, #-36]
ldr r3, [fp, #-32]
sub r3, r2, r3
mov r1, r3
bl nchoosek
mov r3, r0
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L876:
ldr r2, [fp, #-32]
ldr r3, [fp, #-36]
cmp r2, r3
ble .L877
ldr r2, [fp, #-24]
ldr r3, [fp, #-36]
sub r3, r2, r3
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
add r1, fp, #12
ldmia r1, {r0-r1}
bl internal_pow
ldr r3, [fp, #-36]
lsl r3, r3, #3
ldr r2, [fp, #-44]
add r4, r2, r3
sub r3, fp, #20
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L875:
ldr r2, [fp, #-36]
ldr r3, [fp, #-24]
cmp r2, r3
ble .L878
nop
nop
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.size get_delta_transfer_function_with_base, .-get_delta_transfer_function_with_base
.section .rodata
.align 2
.LC39:
.word __stack_chk_guard
.text
.align 2
.global ft_closedloop_series
.syntax unified
.arm
.fpu softvfp
.type ft_closedloop_series, %function
ft_closedloop_series:
@ args = 32, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #60
str r0, [fp, #-32]
str r1, [fp, #-36]
str r2, [fp, #-40]
str r3, [fp, #-44]
ldr r3, [fp, #4]
str r3, [fp, #-48]
ldr r3, [fp, #12]
str r3, [fp, #-52]
ldr r3, [fp, #20]
str r3, [fp, #-56]
ldr r3, [fp, #28]
str r3, [fp, #-60]
ldr r3, .L881
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r2, [fp, #-36]
ldr r3, [fp, #8]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #24]
ldr r2, [fp, #-44]
ldr r3, [fp, #16]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #32]
ldr ip, [fp, #32]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-20]
ldr r3, [fp, #24]
str r3, [sp, #4]
ldr r3, [fp, #-56]
str r3, [sp]
ldr r3, [fp, #8]
ldr r2, [fp, #-48]
ldr r1, [fp, #-36]
ldr r0, [fp, #-32]
bl poly_mult
ldr r3, [fp, #32]
str r3, [sp, #4]
ldr r3, [fp, #-20]
str r3, [sp]
ldr r3, [fp, #16]
ldr r2, [fp, #-52]
ldr r1, [fp, #-44]
ldr r0, [fp, #-40]
bl poly_mult
ldr r3, [fp, #32]
str r3, [sp, #4]
ldr r3, [fp, #-60]
str r3, [sp]
ldr r3, [fp, #32]
ldr r2, [fp, #-20]
ldr r1, [fp, #24]
ldr r0, [fp, #-56]
bl poly_sum
mov sp, r4
nop
ldr r3, .L881
ldr r2, [r3]
ldr r3, [fp, #-16]
eors r2, r3, r2
mov r3, #0
beq .L880
bl __stack_chk_fail
.L880:
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L882:
.align 2
.L881:
.word .LC39
.size ft_closedloop_series, .-ft_closedloop_series
.section .rodata
.align 2
.LC40:
.word __stack_chk_guard
.text
.align 2
.global ft_closedloop_sensitivity
.syntax unified
.arm
.fpu softvfp
.type ft_closedloop_sensitivity, %function
ft_closedloop_sensitivity:
@ args = 32, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #60
str r0, [fp, #-32]
str r1, [fp, #-36]
str r2, [fp, #-40]
str r3, [fp, #-44]
ldr r3, [fp, #4]
str r3, [fp, #-48]
ldr r3, [fp, #12]
str r3, [fp, #-52]
ldr r3, [fp, #20]
str r3, [fp, #-56]
ldr r3, [fp, #28]
str r3, [fp, #-60]
ldr r3, .L885
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r2, [fp, #-36]
ldr r3, [fp, #8]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-28]
ldr r2, [fp, #-44]
ldr r3, [fp, #16]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #32]
ldr r2, [fp, #-44]
ldr r3, [fp, #16]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #24]
ldr ip, [fp, #-28]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-20]
ldr r3, [fp, #24]
str r3, [sp, #4]
ldr r3, [fp, #-56]
str r3, [sp]
ldr r3, [fp, #16]
ldr r2, [fp, #-52]
ldr r1, [fp, #-44]
ldr r0, [fp, #-40]
bl poly_mult
ldr r3, [fp, #-28]
str r3, [sp, #4]
ldr r3, [fp, #-20]
str r3, [sp]
ldr r3, [fp, #8]
ldr r2, [fp, #-48]
ldr r1, [fp, #-36]
ldr r0, [fp, #-32]
bl poly_mult
ldr r3, [fp, #32]
str r3, [sp, #4]
ldr r3, [fp, #-60]
str r3, [sp]
ldr r3, [fp, #-28]
ldr r2, [fp, #-20]
ldr r1, [fp, #24]
ldr r0, [fp, #-56]
bl poly_sum
mov sp, r4
nop
ldr r3, .L885
ldr r2, [r3]
ldr r3, [fp, #-16]
eors r2, r3, r2
mov r3, #0
beq .L884
bl __stack_chk_fail
.L884:
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L886:
.align 2
.L885:
.word .LC40
.size ft_closedloop_sensitivity, .-ft_closedloop_sensitivity
.section .rodata
.align 2
.LC41:
.word __stack_chk_guard
.text
.align 2
.global ft_closedloop_feedback
.syntax unified
.arm
.fpu softvfp
.type ft_closedloop_feedback, %function
ft_closedloop_feedback:
@ args = 32, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #68
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
ldr r3, [fp, #4]
str r3, [fp, #-56]
ldr r3, [fp, #12]
str r3, [fp, #-60]
ldr r3, [fp, #20]
str r3, [fp, #-64]
ldr r3, [fp, #28]
str r3, [fp, #-68]
ldr r3, .L889
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r2, [fp, #-52]
ldr r3, [fp, #8]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #24]
ldr r2, [fp, #-52]
ldr r3, [fp, #16]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #32]
ldr r2, [fp, #-44]
ldr r3, [fp, #8]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-36]
ldr ip, [fp, #32]
sub r3, ip, #1
str r3, [fp, #-32]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-28]
ldr ip, [fp, #-36]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-20]
ldr r3, [fp, #-36]
str r3, [sp, #4]
ldr r3, [fp, #-20]
str r3, [sp]
ldr r3, [fp, #8]
ldr r2, [fp, #-56]
ldr r1, [fp, #-44]
ldr r0, [fp, #-40]
bl poly_mult
ldr r3, [fp, #32]
str r3, [sp, #4]
ldr r3, [fp, #-28]
str r3, [sp]
ldr r3, [fp, #16]
ldr r2, [fp, #-60]
ldr r1, [fp, #-52]
ldr r0, [fp, #-48]
bl poly_mult
ldr r3, [fp, #32]
str r3, [sp, #4]
ldr r3, [fp, #-68]
str r3, [sp]
ldr r3, [fp, #32]
ldr r2, [fp, #-28]
ldr r1, [fp, #-36]
ldr r0, [fp, #-20]
bl poly_sum
ldr r3, [fp, #24]
str r3, [sp, #4]
ldr r3, [fp, #-64]
str r3, [sp]
ldr r3, [fp, #8]
ldr r2, [fp, #-56]
ldr r1, [fp, #-52]
ldr r0, [fp, #-48]
bl poly_mult
mov sp, r4
nop
ldr r3, .L889
ldr r2, [r3]
ldr r3, [fp, #-16]
eors r2, r3, r2
mov r3, #0
beq .L888
bl __stack_chk_fail
.L888:
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L890:
.align 2
.L889:
.word .LC41
.size ft_closedloop_feedback, .-ft_closedloop_feedback
.section .rodata
.align 2
.LC42:
.word __stack_chk_guard
.text
.align 2
.global check_stability_closedloop
.syntax unified
.arm
.fpu softvfp
.type check_stability_closedloop, %function
check_stability_closedloop:
@ args = 8, pretend = 0, frame = 80
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #84
str r0, [fp, #-96]
str r1, [fp, #-100]
str r2, [fp, #-104]
str r3, [fp, #-108]
ldr r3, [fp, #4]
str r3, [fp, #-112]
ldr r3, .L917
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
mov r3, sp
mov r10, r3
ldr r3, [fp, #-100]
str r3, [fp, #-84]
ldr ip, [fp, #-100]
ldr r3, [fp, #-100]
lsl r3, r3, #1
sub lr, r3, #1
sub r3, ip, #1
str r3, [fp, #-76]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r4, r3, #3
sub r3, lr, #1
str r3, [fp, #-72]
mov r3, ip
mov r6, r3
mov r7, #0
mov r3, lr
mov r0, r3
mov r1, #0
mul r2, r0, r7
mul r3, r6, r1
add r5, r2, r3
umull r2, r3, r6, r0
add r1, r5, r3
mov r3, r1
mov r0, #0
mov r1, #0
lsl r1, r3, #6
orr r1, r1, r2, lsr #26
lsl r0, r2, #6
mov r3, ip
mov r6, r3
mov r7, #0
mov r3, lr
mov r0, r3
mov r1, #0
mul r2, r0, r7
mul r3, r6, r1
add r5, r2, r3
umull r2, r3, r6, r0
add r1, r5, r3
mov r3, r1
mov r0, #0
mov r1, #0
lsl r1, r3, #6
orr r1, r1, r2, lsr #26
lsl r0, r2, #6
mov r3, ip
mov r2, lr
mul r3, r2, r3
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-68]
mov r3, #0
str r3, [fp, #-64]
ldr r3, [fp, #-104]
str r3, [fp, #-60]
ldr r3, [fp, #-112]
str r3, [fp, #-56]
mov r2, #0
mov r3, #0
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-88]
b .L892
.L893:
ldr r3, [fp, #-88]
lsl r3, r3, #3
ldr r2, [fp, #-96]
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r3, [fp, #-88]
add r3, r3, #1
str r3, [fp, #-88]
.L892:
ldr r2, [fp, #-88]
ldr r3, [fp, #-100]
cmp r2, r3
blt .L893
mov r3, #1
mov r5, r3
mov r2, #0
mov r3, #0
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
bne .L894
mov r3, #0
mov r5, r3
.L894:
and r3, r5, #255
mov r0, r3
bl __DSVERIFIER_assert
mov r2, #0
mov r3, #0
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-88]
b .L895
.L896:
ldr r3, [fp, #-88]
lsl r3, r3, #3
ldr r2, [fp, #-96]
add r3, r2, r3
ldmia r3, {r6-r7}
ldr r3, [fp, #-100]
sub r2, r3, #1
ldr r3, [fp, #-88]
sub r3, r2, r3
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L917+4
bl internal_pow
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r3, [fp, #-88]
add r3, r3, #1
str r3, [fp, #-88]
.L895:
ldr r2, [fp, #-88]
ldr r3, [fp, #-100]
cmp r2, r3
blt .L896
ldr r3, [fp, #-100]
sub r3, r3, #1
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L917+4
bl internal_pow
mov r2, r0
mov r3, r1
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r3, #1
mov r5, r3
mov r2, #0
mov r3, #0
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
bne .L897
mov r3, #0
mov r5, r3
.L897:
and r3, r5, #255
mov r0, r3
bl __DSVERIFIER_assert
ldr r3, [fp, #-100]
sub r3, r3, #-536870911
lsl r3, r3, #3
ldr r2, [fp, #-96]
add r3, r2, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl internal_abs
ldr r3, [fp, #-96]
ldmia r3, {r2-r3}
mov ip, #1
mov r5, ip
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
bne .L898
mov r3, #0
mov r5, r3
.L898:
and r3, r5, #255
mov r0, r3
bl __DSVERIFIER_assert
mov r3, #0
str r3, [fp, #-88]
b .L899
.L912:
mov r3, #0
str r3, [fp, #-92]
b .L900
.L911:
lsr r3, r4, #3
ldr r2, [fp, #-68]
ldr r1, [fp, #-88]
mul r1, r3, r1
ldr r3, [fp, #-92]
add r3, r1, r3
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-88]
cmp r3, #0
bne .L901
ldr r3, [fp, #-92]
lsl r3, r3, #3
ldr r2, [fp, #-96]
add r3, r2, r3
lsr r1, r4, #3
ldmia r3, {r2-r3}
ldr r0, [fp, #-68]
ldr ip, [fp, #-88]
mul ip, r1, ip
ldr r1, [fp, #-92]
add r1, ip, r1
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
b .L902
.L901:
ldr r3, [fp, #-88]
and r3, r3, #1
cmp r3, #0
beq .L903
mov r3, #0
str r3, [fp, #-80]
b .L904
.L905:
lsr r0, r4, #3
ldr r3, [fp, #-88]
sub ip, r3, #1
ldr r2, [fp, #-84]
ldr r3, [fp, #-80]
sub r3, r2, r3
sub r3, r3, #1
lsr r1, r4, #3
ldr r2, [fp, #-68]
mul r0, ip, r0
add r3, r0, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r0, [fp, #-68]
ldr ip, [fp, #-88]
mul ip, r1, ip
ldr r1, [fp, #-80]
add r1, ip, r1
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-80]
add r3, r3, #1
str r3, [fp, #-80]
.L904:
ldr r2, [fp, #-80]
ldr r3, [fp, #-84]
cmp r2, r3
blt .L905
ldr r3, [fp, #-84]
sub r3, r3, #1
str r3, [fp, #-84]
ldr r3, [fp, #-84]
str r3, [fp, #-92]
b .L902
.L903:
lsr r3, r4, #3
ldr r2, [fp, #-88]
sub r1, r2, #2
ldr r2, [fp, #-68]
mul r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
mov r3, #1
mov r5, r3
mov r2, #0
mov r3, #0
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
bne .L906
mov r3, #0
mov r5, r3
.L906:
and r3, r5, #255
mov r0, r3
bl __DSVERIFIER_assert
lsr r3, r4, #3
ldr r2, [fp, #-88]
sub r1, r2, #2
ldr r2, [fp, #-68]
mul r1, r3, r1
ldr r3, [fp, #-92]
add r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r6-r7}
lsr r3, r4, #3
ldr r2, [fp, #-88]
sub r1, r2, #2
ldr r2, [fp, #-68]
mul r1, r3, r1
ldr r3, [fp, #-84]
add r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
lsr r3, r4, #3
ldr r2, [fp, #-88]
sub ip, r2, #2
ldr r2, [fp, #-68]
mul r3, ip, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r8, r2
mov r9, r3
lsr r3, r4, #3
ldr r2, [fp, #-88]
sub r1, r2, #1
ldr r2, [fp, #-68]
mul r1, r3, r1
ldr r3, [fp, #-92]
add r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
mov r0, r8
mov r1, r9
bl __aeabi_dmul
mov r2, r0
mov r3, r1
lsr r5, r4, #3
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r0, [fp, #-68]
ldr r1, [fp, #-88]
mul ip, r1, r5
ldr r1, [fp, #-92]
add r1, ip, r1
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-68]
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L907
lsr r3, r4, #3
ldr r2, [fp, #-68]
ldr r1, [fp, #-88]
mul r3, r1, r3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L907
mov r3, #1
b .L910
.L907:
mov r3, #0
.L910:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
.L902:
ldr r3, [fp, #-92]
add r3, r3, #1
str r3, [fp, #-92]
.L900:
ldr r2, [fp, #-92]
ldr r3, [fp, #-84]
cmp r2, r3
blt .L911
ldr r3, [fp, #-88]
add r3, r3, #1
str r3, [fp, #-88]
.L899:
ldr r3, [fp, #-100]
lsl r3, r3, #1
sub r3, r3, #1
ldr r2, [fp, #-88]
cmp r2, r3
blt .L912
mov r3, #1
mov sp, r10
ldr r2, .L917
ldr r1, [r2]
ldr r2, [fp, #-40]
eors r1, r2, r1
mov r2, #0
beq .L914
bl __stack_chk_fail
.L914:
mov r0, r3
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L918:
.align 2
.L917:
.word .LC42
.word -1074790400
.size check_stability_closedloop, .-check_stability_closedloop
.section .rodata
.align 2
.LC43:
.ascii "impl.frac_bits must be less than word width!\000"
.align 2
.LC44:
.ascii "impl.int_bits must be less than word width subtract"
.ascii "ed by precision!\000"
.align 2
.LC45:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/core/initialization.h\000"
.align 2
.LC46:
.ascii "0\000"
.text
.align 2
.global initialization
.syntax unified
.arm
.fpu softvfp
.type initialization, %function
initialization:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
ldr r3, .L932
ldr r3, [r3, #4]
cmp r3, #31
ble .L920
ldr r0, .L932+4
bl puts
.L920:
ldr r3, .L932
ldr r2, [r3]
ldr r3, .L932
ldr r3, [r3, #4]
rsb r3, r3, #32
cmp r2, r3
blt .L921
ldr r0, .L932+8
bl puts
ldr r3, .L932+12
mov r2, #33
ldr r1, .L932+16
ldr r0, .L932+20
bl __assert_fail
.L921:
ldr r3, .L932
ldr r3, [r3, #4]
cmp r3, #30
ble .L922
ldr r3, .L932+24
mvn r2, #-2147483648
str r2, [r3]
b .L923
.L922:
ldr r3, .L932
ldr r3, [r3, #4]
mov r2, #1
lsl r3, r2, r3
ldr r2, .L932+24
str r3, [r2]
.L923:
ldr r3, .L932
ldr r3, [r3, #4]
sub r3, r3, #1
mov r2, #1
lsl r3, r2, r3
ldr r2, .L932+28
str r3, [r2]
ldr r3, .L932
ldr r3, [r3, #4]
mov r2, #1
lsl r3, r2, r3
rsb r3, r3, #0
ldr r2, .L932+32
str r3, [r2]
ldr r3, .L932
ldr r2, [r3, #4]
ldr r3, .L932
ldr r3, [r3]
add r3, r2, r3
sub r3, r3, #1
mov r2, #1
lsl r3, r2, r3
rsb r3, r3, #0
ldr r2, .L932+36
str r3, [r2]
ldr r3, .L932
ldr r2, [r3, #4]
ldr r3, .L932
ldr r3, [r3]
add r3, r2, r3
sub r3, r3, #1
mov r2, #1
lsl r3, r2, r3
sub r3, r3, #1
ldr r2, .L932+40
str r3, [r2]
ldr r3, .L932
ldr r3, [r3, #4]
mov r2, #1
lsl r3, r2, r3
sub r3, r3, #1
ldr r2, .L932+44
str r3, [r2]
ldr r3, .L932
ldr r3, [r3, #4]
rsb r3, r3, #31
mov r2, #-2147483648
lsr r3, r2, r3
mov r2, r3
ldr r3, .L932+48
str r2, [r3]
ldr r3, .L932+36
ldr r3, [r3]
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
ldr r1, .L932+52
stm r1, {r2-r3}
ldr r3, .L932+52
ldmia r3, {r4-r5}
ldr r3, .L932
ldr r3, [r3, #4]
mov r2, #1
lsl r3, r2, r3
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
ldr r1, .L932+52
stm r1, {r2-r3}
ldr r3, .L932+40
ldr r3, [r3]
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
ldr r1, .L932+56
stm r1, {r2-r3}
ldr r3, .L932+56
ldmia r3, {r4-r5}
ldr r3, .L932
ldr r3, [r3, #4]
mov r2, #1
lsl r3, r2, r3
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
ldr r1, .L932+56
stm r1, {r2-r3}
ldr r3, .L932
ldr r3, [r3, #40]
cmp r3, #0
beq .L924
ldr r3, .L932
ldr r3, [r3, #40]
cmp r3, #1
bne .L925
.L924:
ldr r3, .L932
mov r2, #1
str r2, [r3, #40]
pop {r4, r5, fp, pc}
.L925:
ldr r3, .L932
add r1, r3, #16
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L927
ldr r3, .L932
add r5, r3, #16
ldmia r5, {r4-r5}
ldr r3, .L932
ldr r3, [r3, #40]
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
ldr r1, .L932
str r2, [r1, #16]
str r3, [r1, #20]
.L927:
ldr r3, .L932
add r1, r3, #8
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
popne {r4, r5, fp, pc}
ldr r3, .L932
add r5, r3, #8
ldmia r5, {r4-r5}
ldr r3, .L932
ldr r3, [r3, #40]
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
ldr r1, .L932
str r2, [r1, #8]
str r3, [r1, #12]
pop {r4, r5, fp, pc}
.L933:
.align 2
.L932:
.word impl
.word .LC43
.word .LC44
.word __PRETTY_FUNCTION__.6844
.word .LC45
.word .LC46
.word _fxp_one
.word _fxp_half
.word _fxp_minus_one
.word _fxp_min
.word _fxp_max
.word _fxp_fmask
.word _fxp_imask
.word _dbl_min
.word _dbl_max
.size initialization, .-initialization
.section .rodata
.align 2
.LC47:
.word __stack_chk_guard
.text
.align 2
.global double_state_space_representation
.syntax unified
.arm
.fpu softvfp
.type double_state_space_representation, %function
double_state_space_representation:
@ args = 0, pretend = 0, frame = 272
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #288
ldr r3, .L941
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-276]
b .L935
.L938:
mov r3, #0
str r3, [fp, #-272]
b .L936
.L937:
ldr r3, [fp, #-276]
lsl r2, r3, #2
ldr r3, [fp, #-272]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #264
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-276]
lsl r2, r3, #2
ldr r3, [fp, #-272]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #136
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-272]
add r3, r3, #1
str r3, [fp, #-272]
.L936:
ldr r3, [fp, #-272]
cmp r3, #3
ble .L937
ldr r3, [fp, #-276]
add r3, r3, #1
str r3, [fp, #-276]
.L935:
ldr r3, [fp, #-276]
cmp r3, #3
ble .L938
ldr r3, .L941+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L941+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L941+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L941+12
str r3, [sp, #4]
ldr r3, .L941+16
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L941+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L941+20
ldr r3, [r3]
mov r1, r3
ldr r3, .L941+20
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L941+24
str r3, [sp, #4]
ldr r3, .L941+28
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L941+4
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L941+32
str r1, [sp]
mov r1, #1
bl double_add_matrix
ldr r3, .L941+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L941+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L941+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L941+12
str r3, [sp, #4]
ldr r3, .L941+36
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L941+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L941+20
ldr r3, [r3]
mov r1, r3
ldr r3, .L941+20
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L941+24
str r3, [sp, #4]
ldr r3, .L941+40
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L941+8
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L941+12
str r1, [sp]
mov r1, #1
bl double_add_matrix
ldr r3, .L941+36
add r3, r3, #640
ldmia r3, {r2-r3}
ldr r1, .L941
ldr r0, [r1]
ldr r1, [fp, #-8]
eors r0, r1, r0
mov r1, #0
beq .L940
bl __stack_chk_fail
.L940:
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L942:
.align 2
.L941:
.word .LC47
.word nOutputs
.word nStates
.word _controller+512
.word _controller+256
.word nInputs
.word _controller+768
.word _controller+384
.word _controller+640
.word _controller
.word _controller+128
.size double_state_space_representation, .-double_state_space_representation
.section .rodata
.align 2
.LC48:
.word __stack_chk_guard
.text
.align 2
.global fxp_state_space_representation
.syntax unified
.arm
.fpu softvfp
.type fxp_state_space_representation, %function
fxp_state_space_representation:
@ args = 0, pretend = 0, frame = 592
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #608
ldr r3, .L1014
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-592]
b .L944
.L947:
mov r3, #0
str r3, [fp, #-588]
b .L945
.L946:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-580]
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-516]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L945:
ldr r3, [fp, #-588]
cmp r3, #3
ble .L946
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L944:
ldr r3, [fp, #-592]
cmp r3, #3
ble .L947
mov r3, #0
str r3, [fp, #-592]
b .L948
.L951:
mov r3, #0
str r3, [fp, #-588]
b .L949
.L950:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-452]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L949:
ldr r3, [fp, #-588]
cmp r3, #3
ble .L950
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L948:
ldr r3, [fp, #-592]
cmp r3, #3
ble .L951
mov r3, #0
str r3, [fp, #-592]
b .L952
.L955:
mov r3, #0
str r3, [fp, #-588]
b .L953
.L954:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-388]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L953:
ldr r3, [fp, #-588]
cmp r3, #3
ble .L954
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L952:
ldr r3, [fp, #-592]
cmp r3, #3
ble .L955
mov r3, #0
str r3, [fp, #-592]
b .L956
.L959:
mov r3, #0
str r3, [fp, #-588]
b .L957
.L958:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-324]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L957:
ldr r3, [fp, #-588]
cmp r3, #3
ble .L958
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L956:
ldr r3, [fp, #-592]
cmp r3, #3
ble .L959
mov r3, #0
str r3, [fp, #-592]
b .L960
.L963:
mov r3, #0
str r3, [fp, #-588]
b .L961
.L962:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-260]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L961:
ldr r3, [fp, #-588]
cmp r3, #3
ble .L962
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L960:
ldr r3, [fp, #-592]
cmp r3, #3
ble .L963
mov r3, #0
str r3, [fp, #-592]
b .L964
.L967:
mov r3, #0
str r3, [fp, #-588]
b .L965
.L966:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-196]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L965:
ldr r3, [fp, #-588]
cmp r3, #3
ble .L966
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L964:
ldr r3, [fp, #-592]
cmp r3, #3
ble .L967
mov r3, #0
str r3, [fp, #-592]
b .L968
.L971:
mov r3, #0
str r3, [fp, #-588]
b .L969
.L970:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-132]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L969:
ldr r3, [fp, #-588]
cmp r3, #3
ble .L970
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L968:
ldr r3, [fp, #-592]
cmp r3, #3
ble .L971
mov r3, #0
str r3, [fp, #-592]
b .L972
.L975:
mov r3, #0
str r3, [fp, #-588]
b .L973
.L974:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-68]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L973:
ldr r3, [fp, #-588]
cmp r3, #3
ble .L974
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L972:
ldr r3, [fp, #-592]
cmp r3, #3
ble .L975
mov r3, #0
str r3, [fp, #-592]
b .L976
.L979:
mov r3, #0
str r3, [fp, #-588]
b .L977
.L978:
ldr r1, .L1014+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-452]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L977:
ldr r3, .L1014+8
ldr r3, [r3]
ldr r2, [fp, #-588]
cmp r2, r3
blt .L978
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L976:
ldr r3, .L1014+8
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L979
mov r3, #0
str r3, [fp, #-592]
b .L980
.L983:
mov r3, #0
str r3, [fp, #-588]
b .L981
.L982:
ldr r1, .L1014+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
add r3, r3, #16
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-388]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L981:
ldr r3, .L1014+12
ldr r3, [r3]
ldr r2, [fp, #-588]
cmp r2, r3
blt .L982
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L980:
ldr r3, .L1014+8
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L983
mov r3, #0
str r3, [fp, #-592]
b .L984
.L987:
mov r3, #0
str r3, [fp, #-588]
b .L985
.L986:
ldr r1, .L1014+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
add r3, r3, #32
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-324]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L985:
ldr r3, .L1014+8
ldr r3, [r3]
ldr r2, [fp, #-588]
cmp r2, r3
blt .L986
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L984:
ldr r3, .L1014+16
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L987
mov r3, #0
str r3, [fp, #-592]
b .L988
.L991:
mov r3, #0
str r3, [fp, #-588]
b .L989
.L990:
ldr r1, .L1014+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
add r3, r3, #48
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-260]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L989:
ldr r3, .L1014+12
ldr r3, [r3]
ldr r2, [fp, #-588]
cmp r2, r3
blt .L990
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L988:
ldr r3, .L1014+16
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L991
mov r3, #0
str r3, [fp, #-592]
b .L992
.L995:
mov r3, #0
str r3, [fp, #-588]
b .L993
.L994:
ldr r1, .L1014+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
add r3, r3, #64
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-196]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L993:
ldr r3, [fp, #-588]
cmp r3, #0
ble .L994
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L992:
ldr r3, .L1014+8
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L995
mov r3, #0
str r3, [fp, #-592]
b .L996
.L999:
mov r3, #0
str r3, [fp, #-588]
b .L997
.L998:
ldr r1, .L1014+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
add r3, r3, #96
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-132]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L997:
ldr r3, [fp, #-588]
cmp r3, #0
ble .L998
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L996:
ldr r3, .L1014+12
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L999
mov r3, #0
str r3, [fp, #-592]
b .L1000
.L1003:
mov r3, #0
str r3, [fp, #-588]
b .L1001
.L1002:
ldr r1, .L1014+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
add r3, r3, #80
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-68]
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L1001:
ldr r3, [fp, #-588]
cmp r3, #0
ble .L1002
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1000:
ldr r3, .L1014+16
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L1003
ldr r3, .L1014+16
ldr r3, [r3]
mov r0, r3
ldr r3, .L1014+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1014+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #584
str r3, [sp, #8]
sub r3, fp, #200
str r3, [sp, #4]
sub r3, fp, #328
str r3, [sp]
mov r3, #1
bl fxp_matrix_multiplication
ldr r3, .L1014+16
ldr r3, [r3]
mov r0, r3
ldr r3, .L1014+12
ldr r3, [r3]
mov r1, r3
ldr r3, .L1014+12
ldr r3, [r3]
mov r2, r3
sub r3, fp, #520
str r3, [sp, #8]
sub r3, fp, #136
str r3, [sp, #4]
sub r3, fp, #264
str r3, [sp]
mov r3, #1
bl fxp_matrix_multiplication
ldr r3, .L1014+16
ldr r3, [r3]
mov r0, r3
sub r1, fp, #520
sub r2, fp, #584
sub r3, fp, #72
str r3, [sp]
mov r3, r1
mov r1, #1
bl fxp_add_matrix
ldr r3, .L1014+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1014+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1014+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #584
str r3, [sp, #8]
sub r3, fp, #200
str r3, [sp, #4]
sub r3, fp, #456
str r3, [sp]
mov r3, #1
bl fxp_matrix_multiplication
ldr r3, .L1014+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1014+12
ldr r3, [r3]
mov r1, r3
ldr r3, .L1014+12
ldr r3, [r3]
mov r2, r3
sub r3, fp, #520
str r3, [sp, #8]
sub r3, fp, #136
str r3, [sp, #4]
sub r3, fp, #392
str r3, [sp]
mov r3, #1
bl fxp_matrix_multiplication
ldr r3, .L1014+8
ldr r3, [r3]
mov r0, r3
sub r1, fp, #520
sub r2, fp, #584
sub r3, fp, #200
str r3, [sp]
mov r3, r1
mov r1, #1
bl fxp_add_matrix
mov r3, #0
str r3, [fp, #-592]
b .L1004
.L1007:
mov r3, #0
str r3, [fp, #-588]
b .L1005
.L1006:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-196]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr ip, .L1014+4
ldr r1, [fp, #-592]
lsl r0, r1, #2
ldr r1, [fp, #-588]
add r1, r0, r1
add r1, r1, #64
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L1005:
ldr r3, [fp, #-588]
cmp r3, #0
ble .L1006
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1004:
ldr r3, .L1014+8
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L1007
mov r3, #0
str r3, [fp, #-592]
b .L1008
.L1011:
mov r3, #0
str r3, [fp, #-588]
b .L1009
.L1010:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-588]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-68]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr ip, .L1014+4
ldr r1, [fp, #-592]
lsl r0, r1, #2
ldr r1, [fp, #-588]
add r1, r0, r1
add r1, r1, #80
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-588]
add r3, r3, #1
str r3, [fp, #-588]
.L1009:
ldr r3, [fp, #-588]
cmp r3, #0
ble .L1010
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1008:
ldr r3, .L1014+16
ldr r3, [r3]
ldr r2, [fp, #-592]
cmp r2, r3
blt .L1011
ldr r3, .L1014+4
add r3, r3, #640
ldmia r3, {r2-r3}
ldr r1, .L1014
ldr r0, [r1]
ldr r1, [fp, #-8]
eors r0, r1, r0
mov r1, #0
beq .L1013
bl __stack_chk_fail
.L1013:
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1015:
.align 2
.L1014:
.word .LC48
.word _controller
.word nStates
.word nInputs
.word nOutputs
.size fxp_state_space_representation, .-fxp_state_space_representation
.section .rodata
.align 2
.LC49:
.ascii "Warning: Function sinTyl from bmc/core/filter_funct"
.ascii "ions.h: Precision must be a positive integer. Assum"
.ascii "ing 0 precision\000"
.align 2
.LC50:
.ascii "Warning: Function sinTyl from bmc/core/filter_funct"
.ascii "ions.h: Precision representation exceeded. Assuming"
.ascii " maximum precision of 6\000"
.text
.align 2
.global sinTyl
.syntax unified
.arm
.fpu softvfp
.type sinTyl, %function
sinTyl:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
str r0, [fp, #-36]
str r1, [fp, #-32]
str r2, [fp, #-40]
sub r3, fp, #36
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-40]
cmp r3, #0
bge .L1017
ldr r0, .L1020
bl puts
mov r3, #0
str r3, [fp, #-40]
.L1017:
ldr r3, [fp, #-40]
cmp r3, #0
blt .L1018
mov r2, #0
mov r3, #0
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r3, fp, #12
ldmia r3, {r2-r3}
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #0
ble .L1018
sub r3, fp, #36
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r3, fp, #12
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #1
ble .L1018
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1020+4
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #2
ble .L1018
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1020+8
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #3
ble .L1018
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1020+12
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #4
ble .L1018
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1020+16
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #5
ble .L1018
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1020+20
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #6
ble .L1018
ldr r0, .L1020+24
bl puts
.L1018:
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1021:
.align 2
.L1020:
.word .LC49
.word 1075314688
.word 1079902208
.word 1085517824
.word 1091970560
.word 1099106472
.word .LC50
.size sinTyl, .-sinTyl
.section .rodata
.align 2
.LC51:
.ascii "Warning: Function cosTyl from bmc/core/filter_funct"
.ascii "ions.h: Precision must be a positive integer. Assum"
.ascii "ing 0 precision\000"
.text
.align 2
.global cosTyl
.syntax unified
.arm
.fpu softvfp
.type cosTyl, %function
cosTyl:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
str r0, [fp, #-36]
str r1, [fp, #-32]
str r2, [fp, #-40]
sub r3, fp, #36
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-40]
cmp r3, #0
bge .L1023
ldr r0, .L1026
bl puts
mov r3, #0
str r3, [fp, #-40]
.L1023:
ldr r3, [fp, #-40]
cmp r3, #0
blt .L1024
mov r2, #0
mov r3, #0
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r3, fp, #12
ldmia r3, {r2-r3}
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #0
ble .L1024
mov r2, #0
ldr r3, .L1026+4
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1026+4
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #1
ble .L1024
sub r3, fp, #20
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
mov r3, #1073741824
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #2
ble .L1024
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1026+8
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #3
ble .L1024
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1026+12
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #4
ble .L1024
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1026+16
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #5
ble .L1024
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1026+20
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #6
ble .L1024
ldr r0, .L1026+24
bl puts
.L1024:
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1027:
.align 2
.L1026:
.word .LC51
.word 1072693248
.word 1077411840
.word 1082556416
.word 1088663552
.word 1095479168
.word .LC50
.size cosTyl, .-cosTyl
.section .rodata
.align 2
.LC52:
.ascii "Warning: Function sinTyl from bmc/core/filter_funct"
.ascii "ions.h: Precision representation exceeded. Assuming"
.ascii " maximum precision of 4\000"
.text
.align 2
.global atanTyl
.syntax unified
.arm
.fpu softvfp
.type atanTyl, %function
atanTyl:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
str r0, [fp, #-36]
str r1, [fp, #-32]
str r2, [fp, #-40]
sub r3, fp, #36
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
ldr r3, [fp, #-40]
cmp r3, #0
bge .L1029
ldr r0, .L1032
bl puts
mov r3, #0
str r3, [fp, #-40]
.L1029:
ldr r3, [fp, #-40]
cmp r3, #0
blt .L1030
mov r2, #0
mov r3, #0
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r3, fp, #12
ldmia r3, {r2-r3}
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #0
ble .L1030
sub r3, fp, #36
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
sub r3, fp, #12
ldmia r3, {r2-r3}
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #1
ble .L1030
sub r3, fp, #20
ldmia r3, {r2-r3}
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1032+4
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #2
ble .L1030
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1032+8
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #3
ble .L1030
sub r3, fp, #20
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
mov r2, #0
ldr r3, .L1032+12
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-40]
cmp r3, #6
ble .L1030
ldr r0, .L1032+16
bl puts
.L1030:
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1033:
.align 2
.L1032:
.word .LC49
.word 1074266112
.word 1075052544
.word 1075576832
.word .LC52
.size atanTyl, .-atanTyl
.align 2
.global sqrt1
.syntax unified
.arm
.fpu softvfp
.type sqrt1, %function
sqrt1:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #20
str r0, [fp, #-24] @ float
mov r1, #1056964608
ldr r0, [fp, #-24] @ float
bl __aeabi_fmul
mov r3, r0
str r3, [fp, #-16] @ float
ldr r3, [fp, #-24] @ float
str r3, [fp, #-20] @ float
ldr r3, [fp, #-20]
asr r2, r3, #1
ldr r3, .L1036
sub r3, r3, r2
str r3, [fp, #-20]
ldr r3, [fp, #-20] @ float
ldr r1, [fp, #-24] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r4, r3
ldr r3, [fp, #-20] @ float
ldr r1, [fp, #-16] @ float
mov r0, r3
bl __aeabi_fmul
mov r3, r0
mov r2, r3
ldr r3, [fp, #-20] @ float
mov r1, r3
mov r0, r2
bl __aeabi_fmul
mov r3, r0
mov r1, r3
mov r0, #1069547520
bl __aeabi_fsub
mov r3, r0
mov r1, r3
mov r0, r4
bl __aeabi_fmul
mov r3, r0
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L1037:
.align 2
.L1036:
.word 1597463007
.size sqrt1, .-sqrt1
.align 2
.global sqrt2
.syntax unified
.arm
.fpu softvfp
.type sqrt2, %function
sqrt2:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16] @ float
ldr r3, [fp, #-16] @ float
str r3, [fp, #-8] @ float
ldr r3, [fp, #-8]
asr r3, r3, #1
add r3, r3, #532676608
str r3, [fp, #-8]
ldr r3, [fp, #-8] @ float
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size sqrt2, .-sqrt2
.global __aeabi_fcmplt
.align 2
.global fabsolut
.syntax unified
.arm
.fpu softvfp
.type fabsolut, %function
fabsolut:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8] @ float
mov r1, #0
ldr r0, [fp, #-8] @ float
bl __aeabi_fcmplt
mov r3, r0
cmp r3, #0
beq .L1041
ldr r3, [fp, #-8]
eor r3, r3, #-2147483648
str r3, [fp, #-8] @ float
.L1041:
ldr r3, [fp, #-8] @ float
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fabsolut, .-fabsolut
.align 2
.syntax unified
.arm
.fpu softvfp
.type sqrt3, %function
sqrt3:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #40
str r0, [fp, #-48] @ float
ldr r1, .L1058
ldr r0, [fp, #-48] @ float
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-44] @ float
ldr r2, .L1058+4
ldr r3, .L1058+8
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-36]
mov r1, #0
ldr r0, [fp, #-48] @ float
bl __aeabi_fcmpeq
mov r3, r0
cmp r3, #0
beq .L1057
mov r3, #0
str r3, [fp, #-44] @ float
b .L1048
.L1057:
mov r3, #1
str r3, [fp, #-40]
b .L1049
.L1053:
ldr r3, [fp, #-36]
cmp r3, #0
bne .L1051
ldr r1, [fp, #-44] @ float
ldr r0, [fp, #-44] @ float
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-48] @ float
bl __aeabi_fsub
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r4, r0
mov r5, r1
ldr r0, [fp, #-44] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-32] @ float
ldr r1, [fp, #-32] @ float
ldr r0, [fp, #-44] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-44] @ float
ldr r1, [fp, #-44] @ float
ldr r0, [fp, #-44] @ float
bl __aeabi_fmul
mov r3, r0
mov r1, r3
ldr r0, [fp, #-48] @ float
bl __aeabi_fsub
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
str r2, [fp, #-20]
str r3, [fp, #-16]
sub r1, fp, #20
ldmia r1, {r0-r1}
bl __aeabi_d2f
mov r3, r0
mov r0, r3
bl fabsolut
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1051
mov r3, #1
str r3, [fp, #-36]
.L1051:
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L1049:
ldr r3, [fp, #-40]
cmp r3, #19
ble .L1053
.L1048:
ldr r3, [fp, #-44] @ float
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L1059:
.align 2
.L1058:
.word 1092616192
.word -1998362383
.word 1055193269
.size sqrt3, .-sqrt3
.section .rodata
.align 2
.LC53:
.word __stack_chk_guard
.text
.align 2
.global verify_overflow
.syntax unified
.arm
.fpu softvfp
.type verify_overflow, %function
verify_overflow:
@ args = 0, pretend = 0, frame = 80
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #88
ldr r3, .L1075
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1075+4
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-72]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-76]
ldr r3, .L1075+4
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-80]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-84]
ldr r3, .L1075+4
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-76]
ldr r0, .L1075+4
bl fxp_double_to_fxp_array
ldr r3, .L1075+4
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-84]
ldr r0, .L1075+8
bl fxp_double_to_fxp_array
ldr r3, .L1075+12
add r3, r3, #16
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-88]
ldr r3, .L1075+12
add r3, r3, #8
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-64]
ldr r3, .L1075+16
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-60]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-56]
ldr r3, .L1075+16
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-52]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-68]
b .L1061
.L1064:
ldr r3, [fp, #-56]
ldr r2, [fp, #-68]
mov r1, #0
str r1, [r3, r2, lsl #2]
bl nondet_int
mov r1, r0
ldr r3, [fp, #-48]
ldr r2, [fp, #-68]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-48]
ldr r2, [fp, #-68]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-88]
cmp r2, r3
bgt .L1062
ldr r3, [fp, #-48]
ldr r2, [fp, #-68]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-64]
cmp r2, r3
blt .L1062
mov r3, #1
b .L1063
.L1062:
mov r3, #0
.L1063:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r3, [fp, #-68]
add r3, r3, #1
str r3, [fp, #-68]
.L1061:
ldr r3, .L1075+16
ldr r3, [r3]
ldr r2, [fp, #-68]
cmp r2, r3
blt .L1064
mov r3, #0
str r3, [fp, #-44]
ldr r3, .L1075+4
ldr r2, [r3, #1608]
ldr r3, .L1075+4
ldr r3, [r3, #800]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-44]
ldr r3, .L1075+4
ldr ip, [r3, #800]
mov r3, sp
mov r5, r3
sub r3, ip, #1
str r3, [fp, #-40]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-36]
ldr r3, .L1075+4
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-32]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-28]
ldr ip, [fp, #-44]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-68]
b .L1065
.L1066:
ldr r3, [fp, #-36]
ldr r2, [fp, #-68]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-68]
add r3, r3, #1
str r3, [fp, #-68]
.L1065:
ldr r3, .L1075+4
ldr r3, [r3, #800]
ldr r2, [fp, #-68]
cmp r2, r3
blt .L1066
mov r3, #0
str r3, [fp, #-68]
b .L1067
.L1068:
ldr r3, [fp, #-28]
ldr r2, [fp, #-68]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-68]
add r3, r3, #1
str r3, [fp, #-68]
.L1067:
ldr r3, .L1075+4
ldr r3, [r3, #1608]
ldr r2, [fp, #-68]
cmp r2, r3
blt .L1068
mov r3, #0
str r3, [fp, #-68]
b .L1069
.L1070:
ldr r3, [fp, #-20]
ldr r2, [fp, #-68]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-68]
add r3, r3, #1
str r3, [fp, #-68]
.L1069:
ldr r2, [fp, #-68]
ldr r3, [fp, #-44]
cmp r2, r3
blt .L1070
mov r3, #0
str r3, [fp, #-68]
b .L1071
.L1072:
ldr r2, [fp, #-44]
ldr r1, [fp, #-20]
mov r0, #0
bl shiftR
ldr r3, [fp, #-48]
ldr r2, [fp, #-68]
ldr r1, [r3, r2, lsl #2]
ldr r3, .L1075+4
ldr r3, [r3, #800]
ldr r2, .L1075+4
ldr r2, [r2, #1608]
str r2, [sp, #4]
str r3, [sp]
ldr r3, [fp, #-84]
ldr r2, [fp, #-76]
ldr r0, [fp, #-20]
bl fxp_direct_form_2
mov r1, r0
ldr r3, [fp, #-56]
ldr r2, [fp, #-68]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-68]
add r3, r3, #1
str r3, [fp, #-68]
.L1071:
ldr r3, .L1075+16
ldr r3, [r3]
ldr r2, [fp, #-68]
cmp r2, r3
blt .L1072
ldr r3, .L1075+20
mov r2, #1
str r2, [r3]
ldr r3, .L1075+16
ldr r3, [r3]
mov r1, r3
ldr r0, [fp, #-56]
bl fxp_verify_overflow_array
mov r3, #0
mov sp, r5
mov sp, r4
ldr r2, .L1075
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1074
bl __stack_chk_fail
.L1074:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L1076:
.align 2
.L1075:
.word .LC53
.word ds
.word ds+808
.word impl
.word X_SIZE_VALUE
.word overflow_mode
.size verify_overflow, .-verify_overflow
.section .rodata
.align 2
.LC54:
.ascii "#matrix STATES -------------------------------\000"
.align 2
.LC55:
.ascii "#matrix OUTPUTS -------------------------------\000"
.align 2
.LC56:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_limit_cycle.h\000"
.align 2
.LC57:
.word __stack_chk_guard
.text
.align 2
.global verify_limit_cycle_state_space
.syntax unified
.arm
.fpu softvfp
.type verify_limit_cycle_state_space, %function
verify_limit_cycle_state_space:
@ args = 0, pretend = 0, frame = 536
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #552
ldr r3, .L1089
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-532]
b .L1078
.L1081:
mov r3, #0
str r3, [fp, #-536]
b .L1079
.L1080:
ldr r3, [fp, #-532]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #264
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-532]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #136
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-532]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #520
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-532]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #392
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1079:
ldr r3, [fp, #-536]
cmp r3, #3
ble .L1080
ldr r3, [fp, #-532]
add r3, r3, #1
str r3, [fp, #-532]
.L1078:
ldr r3, [fp, #-532]
cmp r3, #3
ble .L1081
ldr r3, .L1089+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1089+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1089+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1089+12
str r3, [sp, #4]
ldr r3, .L1089+16
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1089+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1089+20
ldr r3, [r3]
mov r1, r3
ldr r3, .L1089+20
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L1089+24
str r3, [sp, #4]
ldr r3, .L1089+28
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1089+4
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L1089+32
str r1, [sp]
mov r1, #1
bl double_add_matrix
mov r3, #0
str r3, [fp, #-540]
mov r3, #1
str r3, [fp, #-532]
b .L1082
.L1087:
ldr r3, .L1089+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1089+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1089+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1089+12
str r3, [sp, #4]
ldr r3, .L1089+36
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1089+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1089+20
ldr r3, [r3]
mov r1, r3
ldr r3, .L1089+20
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L1089+24
str r3, [sp, #4]
ldr r3, .L1089+40
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1089+8
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L1089+12
str r1, [sp]
mov r1, #1
bl double_add_matrix
ldr r3, .L1089+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1089+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1089+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1089+12
str r3, [sp, #4]
ldr r3, .L1089+16
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1089+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1089+20
ldr r3, [r3]
mov r1, r3
ldr r3, .L1089+20
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L1089+24
str r3, [sp, #4]
ldr r3, .L1089+28
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1089+4
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L1089+32
str r1, [sp]
mov r1, #1
bl double_add_matrix
mov r3, #0
str r3, [fp, #-528]
b .L1083
.L1084:
ldr r2, .L1089+36
ldr r3, [fp, #-528]
add r3, r3, #16
lsl r3, r3, #5
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-528]
lsl r0, r1, #2
ldr r1, [fp, #-540]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #520
stm r1, {r2-r3}
ldr r3, [fp, #-528]
add r3, r3, #1
str r3, [fp, #-528]
.L1083:
ldr r3, .L1089+8
ldr r3, [r3]
ldr r2, [fp, #-528]
cmp r2, r3
blt .L1084
mov r3, #0
str r3, [fp, #-528]
b .L1085
.L1086:
ldr r2, .L1089+36
ldr r3, [fp, #-528]
add r3, r3, #20
lsl r3, r3, #5
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-528]
lsl r0, r1, #2
ldr r1, [fp, #-540]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #520
stm r1, {r2-r3}
ldr r3, [fp, #-528]
add r3, r3, #1
str r3, [fp, #-528]
.L1085:
ldr r3, .L1089+4
ldr r3, [r3]
ldr r2, [fp, #-528]
cmp r2, r3
blt .L1086
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
ldr r3, [fp, #-532]
add r3, r3, #1
str r3, [fp, #-532]
.L1082:
ldr r3, [fp, #-532]
cmp r3, #0
blt .L1087
ldr r0, .L1089+44
bl printf
ldr r3, .L1089+8
ldr r3, [r3]
mov r1, r3
sub r3, fp, #524
mov r2, #0
mov r0, r3
bl print_matrix
ldr r0, .L1089+48
bl printf
ldr r3, .L1089+4
ldr r3, [r3]
mov r1, r3
sub r3, fp, #396
mov r2, #0
mov r0, r3
bl print_matrix
ldr r3, .L1089+52
mov r2, #93
ldr r1, .L1089+56
ldr r0, .L1089+60
bl __assert_fail
.L1090:
.align 2
.L1089:
.word .LC57
.word nOutputs
.word nStates
.word _controller+512
.word _controller+256
.word nInputs
.word _controller+768
.word _controller+384
.word _controller+640
.word _controller
.word _controller+128
.word .LC54
.word .LC55
.word __PRETTY_FUNCTION__.7103
.word .LC56
.word .LC46
.size verify_limit_cycle_state_space, .-verify_limit_cycle_state_space
.section .rodata
.align 2
.LC58:
.ascii "X_SIZE must be at least 2 * ds.a_size\000"
.align 2
.LC59:
.word __stack_chk_guard
.text
.align 2
.global verify_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type verify_limit_cycle, %function
verify_limit_cycle:
@ args = 0, pretend = 0, frame = 104
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #112
ldr r3, .L1106
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1106+4
mov r2, #3
str r2, [r3]
ldr r3, .L1106+8
ldr r3, [r3, #800]
lsl r3, r3, #1
str r3, [fp, #-84]
ldr r0, .L1106+12
bl printf
ldr r3, .L1106+16
ldr r3, [r3]
ldr r2, [fp, #-84]
cmp r2, r3
movle r3, #1
movgt r3, #0
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
ldr r3, .L1106+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-88]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-92]
ldr r3, .L1106+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-96]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-100]
ldr r3, .L1106+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-92]
ldr r0, .L1106+8
bl fxp_double_to_fxp_array
ldr r3, .L1106+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-100]
ldr r0, .L1106+20
bl fxp_double_to_fxp_array
ldr r3, .L1106+16
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-104]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-108]
ldr r3, .L1106+16
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-112]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-76]
ldr r3, .L1106+24
add r3, r3, #16
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-72]
ldr r3, .L1106+24
add r3, r3, #8
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-68]
ldr r3, .L1106+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-64]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-60]
bl nondet_int
str r0, [fp, #-56]
ldr r2, [fp, #-56]
ldr r3, [fp, #-72]
cmp r2, r3
blt .L1092
ldr r2, [fp, #-56]
ldr r3, [fp, #-68]
cmp r2, r3
bgt .L1092
mov r3, #1
b .L1093
.L1092:
mov r3, #0
.L1093:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
mov r3, #0
str r3, [fp, #-80]
b .L1094
.L1095:
ldr r3, [fp, #-76]
ldr r2, [fp, #-80]
ldr r1, [fp, #-56]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-108]
ldr r2, [fp, #-80]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-80]
add r3, r3, #1
str r3, [fp, #-80]
.L1094:
ldr r3, .L1106+16
ldr r3, [r3]
ldr r2, [fp, #-80]
cmp r2, r3
blt .L1095
mov r3, #0
str r3, [fp, #-80]
b .L1096
.L1097:
ldr r3, [fp, #-60]
ldr r2, [fp, #-80]
ldr r1, [fp, #-56]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-80]
add r3, r3, #1
str r3, [fp, #-80]
.L1096:
ldr r3, .L1106+8
ldr r3, [r3, #1608]
ldr r2, [fp, #-80]
cmp r2, r3
blt .L1097
mov r3, #0
str r3, [fp, #-52]
ldr r3, .L1106+8
ldr r2, [r3, #1608]
ldr r3, .L1106+8
ldr r3, [r3, #800]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-52]
ldr r3, .L1106+8
ldr ip, [r3, #800]
mov r3, sp
mov r5, r3
sub r3, ip, #1
str r3, [fp, #-48]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-44]
ldr r3, .L1106+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-40]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-36]
ldr ip, [fp, #-52]
sub r3, ip, #1
str r3, [fp, #-32]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-28]
ldr ip, [fp, #-52]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-80]
b .L1098
.L1101:
bl nondet_int
mov r1, r0
ldr r3, [fp, #-28]
ldr r2, [fp, #-80]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-28]
ldr r2, [fp, #-80]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-72]
cmp r2, r3
bgt .L1099
ldr r3, [fp, #-28]
ldr r2, [fp, #-80]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-68]
cmp r2, r3
blt .L1099
mov r3, #1
b .L1100
.L1099:
mov r3, #0
.L1100:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r3, [fp, #-28]
ldr r2, [fp, #-80]
ldr r1, [r3, r2, lsl #2]
ldr r3, [fp, #-20]
ldr r2, [fp, #-80]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-80]
add r3, r3, #1
str r3, [fp, #-80]
.L1098:
ldr r2, [fp, #-80]
ldr r3, [fp, #-52]
cmp r2, r3
blt .L1101
mov r3, #0
str r3, [fp, #-80]
b .L1102
.L1103:
ldr r2, [fp, #-52]
ldr r1, [fp, #-28]
mov r0, #0
bl shiftR
ldr r3, [fp, #-76]
ldr r2, [fp, #-80]
ldr r1, [r3, r2, lsl #2]
ldr r3, .L1106+8
ldr r3, [r3, #800]
ldr r2, .L1106+8
ldr r2, [r2, #1608]
str r2, [sp, #4]
str r3, [sp]
ldr r3, [fp, #-100]
ldr r2, [fp, #-92]
ldr r0, [fp, #-28]
bl fxp_direct_form_2
mov r1, r0
ldr r3, [fp, #-108]
ldr r2, [fp, #-80]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-80]
add r3, r3, #1
str r3, [fp, #-80]
.L1102:
ldr r3, .L1106+16
ldr r3, [r3]
ldr r2, [fp, #-80]
cmp r2, r3
blt .L1103
ldr r3, .L1106+16
ldr r3, [r3]
mov r1, r3
ldr r0, [fp, #-108]
bl fxp_check_persistent_limit_cycle
mov r3, #0
mov sp, r5
mov sp, r4
ldr r2, .L1106
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1105
bl __stack_chk_fail
.L1105:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L1107:
.align 2
.L1106:
.word .LC59
.word overflow_mode
.word ds
.word .LC58
.word X_SIZE_VALUE
.word ds+808
.word impl
.size verify_limit_cycle, .-verify_limit_cycle
.section .rodata
.align 2
.LC60:
.word __stack_chk_guard
.text
.align 2
.global verify_error
.syntax unified
.arm
.fpu softvfp
.type verify_error, %function
verify_error:
@ args = 0, pretend = 0, frame = 928
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, fp, lr}
add fp, sp, #24
sub sp, sp, #948
ldr r3, .L1129
ldr r3, [r3]
str r3, [fp, #-32]
mov r3,#0
mov r3, sp
mov r8, r3
ldr r3, .L1129+4
mov r2, #2
str r2, [r3]
ldr r3, .L1129+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-916]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-920]
ldr r3, .L1129+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-924]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-928]
ldr r3, .L1129+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-920]
ldr r0, .L1129+8
bl fxp_double_to_fxp_array
ldr r3, .L1129+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-928]
ldr r0, .L1129+12
bl fxp_double_to_fxp_array
ldr r3, .L1129+16
add r3, r3, #16
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-932]
ldr r3, .L1129+16
add r3, r3, #8
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-936]
ldr r3, .L1129+20
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-940]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-944]
ldr r3, .L1129+20
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-948]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-952]
ldr r3, .L1129+20
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-956]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-908]
ldr r3, .L1129+20
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-904]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-900]
mov r3, #0
str r3, [fp, #-896]
ldr r3, .L1129+8
ldr r2, [r3, #1608]
ldr r3, .L1129+8
ldr r3, [r3, #800]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-896]
ldr r3, .L1129+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-892]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-888]
ldr r3, .L1129+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-884]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-880]
ldr ip, [fp, #-896]
sub r3, ip, #1
str r3, [fp, #-876]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-872]
ldr r3, .L1129+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-868]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-864]
ldr r3, .L1129+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-860]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-856]
ldr ip, [fp, #-896]
sub r3, ip, #1
str r3, [fp, #-852]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-848]
mov r3, #0
str r3, [fp, #-912]
b .L1109
.L1110:
ldr r3, [fp, #-888]
ldr r2, [fp, #-912]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r2, [fp, #-864]
ldr r3, [fp, #-912]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-912]
add r3, r3, #1
str r3, [fp, #-912]
.L1109:
ldr r3, .L1129+8
ldr r3, [r3, #800]
ldr r2, [fp, #-912]
cmp r2, r3
blt .L1110
mov r3, #0
str r3, [fp, #-912]
b .L1111
.L1112:
ldr r3, [fp, #-880]
ldr r2, [fp, #-912]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r2, [fp, #-856]
ldr r3, [fp, #-912]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-912]
add r3, r3, #1
str r3, [fp, #-912]
.L1111:
ldr r3, .L1129+8
ldr r3, [r3, #1608]
ldr r2, [fp, #-912]
cmp r2, r3
blt .L1112
mov r3, #0
str r3, [fp, #-912]
b .L1113
.L1114:
ldr r3, [fp, #-872]
ldr r2, [fp, #-912]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r2, [fp, #-848]
ldr r3, [fp, #-912]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-912]
add r3, r3, #1
str r3, [fp, #-912]
.L1113:
ldr r2, [fp, #-912]
ldr r3, [fp, #-896]
cmp r2, r3
blt .L1114
mov r3, #0
str r3, [fp, #-912]
b .L1115
.L1118:
ldr r3, [fp, #-944]
ldr r2, [fp, #-912]
mov r1, #0
str r1, [r3, r2, lsl #2]
bl nondet_int
mov r1, r0
ldr r3, [fp, #-952]
ldr r2, [fp, #-912]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-952]
ldr r2, [fp, #-912]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-932]
cmp r2, r3
bgt .L1116
ldr r3, [fp, #-952]
ldr r2, [fp, #-912]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-936]
cmp r2, r3
blt .L1116
mov r3, #1
b .L1117
.L1116:
mov r3, #0
.L1117:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r2, [fp, #-908]
ldr r3, [fp, #-912]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-952]
ldr r2, [fp, #-912]
ldr r3, [r3, r2, lsl #2]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr r0, [fp, #-900]
ldr r1, [fp, #-912]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-912]
add r3, r3, #1
str r3, [fp, #-912]
.L1115:
ldr r3, .L1129+20
ldr r3, [r3]
ldr r2, [fp, #-912]
cmp r2, r3
blt .L1118
mov r3, #0
str r3, [fp, #-912]
b .L1119
.L1124:
ldr r3, [fp, #-896]
str r3, [sp]
ldr r3, [fp, #-872]
mov r2, #0
ldr r1, [fp, #-848]
mov r0, #0
bl shiftRboth
ldr r3, [fp, #-952]
ldr r2, [fp, #-912]
ldr r1, [r3, r2, lsl #2]
ldr r3, .L1129+8
ldr r3, [r3, #800]
ldr r2, .L1129+8
ldr r2, [r2, #1608]
str r2, [sp, #4]
str r3, [sp]
ldr r3, [fp, #-928]
ldr r2, [fp, #-920]
ldr r0, [fp, #-872]
bl fxp_direct_form_2
mov r1, r0
ldr r3, [fp, #-944]
ldr r2, [fp, #-912]
str r1, [r3, r2, lsl #2]
ldr r2, [fp, #-900]
ldr r3, [fp, #-912]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, .L1129+8
ldr r1, [r1, #800]
ldr r0, .L1129+8
ldr r0, [r0, #1608]
str r0, [sp, #12]
str r1, [sp, #8]
ldr r1, .L1129+12
str r1, [sp, #4]
ldr r1, .L1129+8
str r1, [sp]
ldr r0, [fp, #-848]
bl double_direct_form_2
mov r2, r0
mov r3, r1
ldr r0, [fp, #-908]
ldr r1, [fp, #-912]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-908]
ldr r3, [fp, #-912]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r6-r7}
ldr r3, [fp, #-944]
ldr r2, [fp, #-912]
ldr r3, [r3, r2, lsl #2]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-844]
str r3, [fp, #-840]
ldr r3, .L1129+16
add r3, r3, #48
ldmia r3, {r2-r3}
sub r1, fp, #844
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L1120
ldr r3, .L1129+16
add r3, r3, #48
ldmia r3, {r2-r3}
mov r4, r2
eor r5, r3, #-2147483648
mov r2, r4
mov r3, r5
sub r1, fp, #844
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1120
mov r3, #1
b .L1123
.L1120:
mov r3, #0
.L1123:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
ldr r3, [fp, #-912]
add r3, r3, #1
str r3, [fp, #-912]
.L1119:
ldr r3, .L1129+20
ldr r3, [r3]
ldr r2, [fp, #-912]
cmp r2, r3
blt .L1124
mov r3, #0
mov sp, r8
ldr r2, .L1129
ldr r1, [r2]
ldr r2, [fp, #-32]
eors r1, r2, r1
mov r2, #0
beq .L1126
bl __stack_chk_fail
.L1126:
mov r0, r3
sub sp, fp, #24
@ sp needed
pop {r4, r5, r6, r7, r8, fp, pc}
.L1130:
.align 2
.L1129:
.word .LC60
.word overflow_mode
.word ds
.word ds+808
.word impl
.word X_SIZE_VALUE
.size verify_error, .-verify_error
.section .rodata
.align 2
.LC61:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_zero_input_limit_cycl"
.ascii "e.h\000"
.align 2
.LC62:
.ascii "X_SIZE_VALUE >= Set_xsize_at_least_two_times_Na\000"
.align 2
.LC63:
.word __stack_chk_guard
.text
.align 2
.global verify_zero_input_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type verify_zero_input_limit_cycle, %function
verify_zero_input_limit_cycle:
@ args = 0, pretend = 0, frame = 96
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #104
ldr r3, .L1145
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1145+4
mov r2, #3
str r2, [r3]
ldr r3, .L1145+8
ldr r3, [r3, #800]
lsl r3, r3, #1
str r3, [fp, #-80]
ldr r0, .L1145+12
bl printf
ldr r3, .L1145+16
ldr r3, [r3]
ldr r2, [fp, #-80]
cmp r2, r3
ble .L1132
ldr r3, .L1145+20
mov r2, #23
ldr r1, .L1145+24
ldr r0, .L1145+28
bl __assert_fail
.L1132:
ldr r3, .L1145+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-84]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-88]
ldr r3, .L1145+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-92]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-96]
ldr r3, .L1145+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-88]
ldr r0, .L1145+8
bl fxp_double_to_fxp_array
ldr r3, .L1145+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-96]
ldr r0, .L1145+32
bl fxp_double_to_fxp_array
ldr r3, .L1145+36
add r3, r3, #16
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-100]
ldr r3, .L1145+36
add r3, r3, #8
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-104]
ldr r3, .L1145+16
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-108]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-72]
ldr r3, .L1145+16
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-68]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-64]
mov r3, #0
str r3, [fp, #-76]
b .L1133
.L1134:
ldr r3, [fp, #-72]
ldr r2, [fp, #-76]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-64]
ldr r2, [fp, #-76]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-76]
add r3, r3, #1
str r3, [fp, #-76]
.L1133:
ldr r3, .L1145+16
ldr r3, [r3]
ldr r2, [fp, #-76]
cmp r2, r3
blt .L1134
mov r3, #0
str r3, [fp, #-60]
ldr r3, .L1145+8
ldr r2, [r3, #1608]
ldr r3, .L1145+8
ldr r3, [r3, #800]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-60]
ldr r3, .L1145+8
ldr ip, [r3, #800]
mov r3, sp
mov r5, r3
sub r3, ip, #1
str r3, [fp, #-56]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-52]
ldr r3, .L1145+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-48]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-44]
ldr ip, [fp, #-60]
sub r3, ip, #1
str r3, [fp, #-40]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-36]
ldr r3, .L1145+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-32]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-28]
ldr ip, [fp, #-60]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-76]
b .L1135
.L1138:
bl nondet_int
mov r1, r0
ldr r3, [fp, #-36]
ldr r2, [fp, #-76]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-36]
ldr r2, [fp, #-76]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-100]
cmp r2, r3
bgt .L1136
ldr r3, [fp, #-36]
ldr r2, [fp, #-76]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-104]
cmp r2, r3
blt .L1136
mov r3, #1
b .L1137
.L1136:
mov r3, #0
.L1137:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r3, [fp, #-36]
ldr r2, [fp, #-76]
ldr r1, [r3, r2, lsl #2]
ldr r3, [fp, #-20]
ldr r2, [fp, #-76]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-76]
add r3, r3, #1
str r3, [fp, #-76]
.L1135:
ldr r2, [fp, #-76]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L1138
mov r3, #0
str r3, [fp, #-76]
b .L1139
.L1140:
ldr r3, [fp, #-44]
ldr r2, [fp, #-76]
mov r1, #0
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-76]
add r3, r3, #1
str r3, [fp, #-76]
.L1139:
ldr r3, .L1145+8
ldr r3, [r3, #1608]
ldr r2, [fp, #-76]
cmp r2, r3
blt .L1140
mov r3, #0
str r3, [fp, #-76]
b .L1141
.L1142:
ldr r2, [fp, #-60]
ldr r1, [fp, #-36]
mov r0, #0
bl shiftR
ldr r3, [fp, #-64]
ldr r2, [fp, #-76]
ldr r1, [r3, r2, lsl #2]
ldr r3, .L1145+8
ldr r3, [r3, #800]
ldr r2, .L1145+8
ldr r2, [r2, #1608]
str r2, [sp, #4]
str r3, [sp]
ldr r3, [fp, #-96]
ldr r2, [fp, #-88]
ldr r0, [fp, #-36]
bl fxp_direct_form_2
mov r1, r0
ldr r3, [fp, #-72]
ldr r2, [fp, #-76]
str r1, [r3, r2, lsl #2]
ldr r3, [fp, #-76]
add r3, r3, #1
str r3, [fp, #-76]
.L1141:
ldr r3, .L1145+16
ldr r3, [r3]
ldr r2, [fp, #-76]
cmp r2, r3
blt .L1142
ldr r3, .L1145+16
ldr r3, [r3]
mov r1, r3
ldr r0, [fp, #-72]
bl fxp_check_persistent_limit_cycle
mov r3, #0
mov sp, r5
mov sp, r4
ldr r2, .L1145
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1144
bl __stack_chk_fail
.L1144:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L1146:
.align 2
.L1145:
.word .LC63
.word overflow_mode
.word ds
.word .LC58
.word X_SIZE_VALUE
.word __PRETTY_FUNCTION__.7203
.word .LC61
.word .LC62
.word ds+808
.word impl
.size verify_zero_input_limit_cycle, .-verify_zero_input_limit_cycle
.global generic_timer
.bss
.align 2
.type generic_timer, %object
.size generic_timer, 4
generic_timer:
.space 4
.section .rodata
.align 2
.LC64:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_generic_timing.h\000"
.align 2
.LC65:
.ascii "spent_time <= ds.sample_time\000"
.align 2
.LC66:
.word __stack_chk_guard
.text
.align 2
.global verify_generic_timing
.syntax unified
.arm
.fpu softvfp
.type verify_generic_timing, %function
verify_generic_timing:
@ args = 0, pretend = 0, frame = 72
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #88
ldr r3, .L1167
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1167+4
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-76]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-80]
ldr r3, .L1167+4
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-84]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-68]
mov r3, #0
str r3, [fp, #-72]
b .L1148
.L1153:
ldr r2, [fp, #-80]
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
bl nondet_float
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [fp, #-68]
ldr r1, [fp, #-72]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-68]
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, .L1167+8
add r3, r3, #16
ldmia r3, {r2-r3}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1149
ldr r2, [fp, #-68]
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, .L1167+8
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1149
mov r3, #1
b .L1152
.L1149:
mov r3, #0
.L1152:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1148:
ldr r3, .L1167+4
ldr r3, [r3]
ldr r2, [fp, #-72]
cmp r2, r3
blt .L1153
mov r3, #0
str r3, [fp, #-64]
ldr r3, .L1167+12
ldr r2, [r3, #1608]
ldr r3, .L1167+12
ldr r3, [r3, #800]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-64]
ldr r3, .L1167+12
ldr ip, [r3, #800]
mov r3, sp
mov r5, r3
sub r3, ip, #1
str r3, [fp, #-60]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-56]
ldr r3, .L1167+12
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-52]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-48]
ldr ip, [fp, #-64]
sub r3, ip, #1
str r3, [fp, #-44]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-40]
mov r3, #0
str r3, [fp, #-72]
b .L1154
.L1155:
ldr r2, [fp, #-56]
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1154:
ldr r3, .L1167+12
ldr r3, [r3, #800]
ldr r2, [fp, #-72]
cmp r2, r3
blt .L1155
mov r3, #0
str r3, [fp, #-72]
b .L1156
.L1157:
ldr r2, [fp, #-48]
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1156:
ldr r3, .L1167+12
ldr r3, [r3, #1608]
ldr r2, [fp, #-72]
cmp r2, r3
blt .L1157
mov r3, #0
str r3, [fp, #-72]
b .L1158
.L1159:
ldr r2, [fp, #-40]
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1158:
ldr r2, [fp, #-72]
ldr r3, [fp, #-64]
cmp r2, r3
blt .L1159
ldr r3, .L1167+16
ldr r3, [r3, #36]
lsl r2, r3, #1
ldr r3, .L1167+16
ldr r3, [r3, #72]
add r2, r2, r3
ldr r3, .L1167+20
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L1167+20
str r3, [r2]
ldr r3, .L1167+20
ldr r3, [r3]
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
str r2, [fp, #-36]
str r3, [fp, #-32]
mov r3, #0
str r3, [fp, #-72]
b .L1160
.L1162:
ldr r3, .L1167+16
ldr r3, [r3, #40]
lsl r2, r3, #1
ldr r3, .L1167+16
ldr r3, [r3, #68]
add r2, r2, r3
ldr r3, .L1167+16
ldr r3, [r3, #36]
lsl r3, r3, #1
add r2, r2, r3
ldr r3, .L1167+20
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L1167+20
str r3, [r2]
ldr r3, .L1167+16
ldr r3, [r3, #40]
lsl r2, r3, #1
ldr r3, .L1167+16
ldr r3, [r3, #124]
add r2, r2, r3
ldr r3, .L1167+16
ldr r3, [r3, #96]
add r2, r2, r3
ldr r3, .L1167+16
ldr r3, [r3, #120]
add r2, r2, r3
ldr r3, .L1167+20
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L1167+20
str r3, [r2]
ldr r3, [fp, #-64]
ldr r2, [fp, #-40]
mov r0, #0
mov r1, #0
bl generic_timing_shift_r_double
ldr r2, [fp, #-68]
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, .L1167+12
ldr r1, [r1, #800]
ldr r0, .L1167+12
ldr r0, [r0, #1608]
str r0, [sp, #12]
str r1, [sp, #8]
ldr r1, .L1167+24
str r1, [sp, #4]
ldr r1, .L1167+12
str r1, [sp]
ldr r0, [fp, #-40]
bl generic_timing_double_direct_form_2
mov r2, r0
mov r3, r1
ldr r0, [fp, #-80]
ldr r1, [fp, #-72]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, .L1167+20
ldr r3, [r3]
mov r0, r3
bl __aeabi_i2d
ldr r3, .L1167+16
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, .L1167+12
add r3, r3, #1616
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1161
ldr r3, .L1167+28
mov r2, #89
ldr r1, .L1167+32
ldr r0, .L1167+36
bl __assert_fail
.L1161:
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_d2iz
mov r3, r0
ldr r2, .L1167+20
str r3, [r2]
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1160:
ldr r3, .L1167+4
ldr r3, [r3]
ldr r2, [fp, #-72]
cmp r2, r3
blt .L1162
mov r3, #0
mov sp, r5
mov sp, r4
ldr r2, .L1167
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1164
bl __stack_chk_fail
.L1164:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L1168:
.align 2
.L1167:
.word .LC66
.word X_SIZE_VALUE
.word impl
.word ds
.word hw
.word generic_timer
.word ds+808
.word __PRETTY_FUNCTION__.7273
.word .LC64
.word .LC65
.size verify_generic_timing, .-verify_generic_timing
.section .rodata
.align 2
.LC67:
.word __stack_chk_guard
.text
.align 2
.global verify_timing_msp_430
.syntax unified
.arm
.fpu softvfp
.type verify_timing_msp_430, %function
verify_timing_msp_430:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #72
ldr r3, .L1188
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1188+4
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-56]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-60]
ldr r3, .L1188+4
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-64]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-52]
b .L1170
.L1175:
ldr r2, [fp, #-60]
ldr r3, [fp, #-52]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
bl nondet_float
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [fp, #-48]
ldr r1, [fp, #-52]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-48]
ldr r3, [fp, #-52]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, .L1188+8
add r3, r3, #16
ldmia r3, {r2-r3}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1171
ldr r2, [fp, #-48]
ldr r3, [fp, #-52]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, .L1188+8
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1171
mov r3, #1
b .L1174
.L1171:
mov r3, #0
.L1174:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L1170:
ldr r3, .L1188+4
ldr r3, [r3]
ldr r2, [fp, #-52]
cmp r2, r3
blt .L1175
mov r3, #0
str r3, [fp, #-44]
ldr r3, .L1188+12
ldr r2, [r3, #1608]
ldr r3, .L1188+12
ldr r3, [r3, #800]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-44]
ldr r3, .L1188+12
ldr ip, [r3, #800]
mov r3, sp
mov r5, r3
sub r3, ip, #1
str r3, [fp, #-40]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-36]
ldr r3, .L1188+12
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-32]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-28]
ldr ip, [fp, #-44]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-52]
b .L1176
.L1177:
ldr r2, [fp, #-36]
ldr r3, [fp, #-52]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L1176:
ldr r3, .L1188+12
ldr r3, [r3, #800]
ldr r2, [fp, #-52]
cmp r2, r3
blt .L1177
mov r3, #0
str r3, [fp, #-52]
b .L1178
.L1179:
ldr r2, [fp, #-28]
ldr r3, [fp, #-52]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L1178:
ldr r3, .L1188+12
ldr r3, [r3, #1608]
ldr r2, [fp, #-52]
cmp r2, r3
blt .L1179
mov r3, #0
str r3, [fp, #-52]
b .L1180
.L1181:
ldr r2, [fp, #-20]
ldr r3, [fp, #-52]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L1180:
ldr r2, [fp, #-52]
ldr r3, [fp, #-44]
cmp r2, r3
blt .L1181
mov r3, #0
str r3, [fp, #-52]
b .L1182
.L1183:
ldr r2, [fp, #-44]
ldr r1, [fp, #-20]
mov r0, #0
bl shiftR
ldr r2, [fp, #-48]
ldr r3, [fp, #-52]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r1, .L1188+12
ldr r1, [r1, #800]
ldr r0, .L1188+12
ldr r0, [r0, #1608]
str r0, [sp, #12]
str r1, [sp, #8]
ldr r1, .L1188+16
str r1, [sp, #4]
ldr r1, .L1188+12
str r1, [sp]
ldr r0, [fp, #-20]
bl double_direct_form_2_MSP430
mov r2, r0
mov r3, r1
ldr r0, [fp, #-60]
ldr r1, [fp, #-52]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L1182:
ldr r3, .L1188+4
ldr r3, [r3]
ldr r2, [fp, #-52]
cmp r2, r3
blt .L1183
mov r3, #0
mov sp, r5
mov sp, r4
ldr r2, .L1188
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1185
bl __stack_chk_fail
.L1185:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L1189:
.align 2
.L1188:
.word .LC67
.word X_SIZE_VALUE
.word impl
.word ds
.word ds+808
.size verify_timing_msp_430, .-verify_timing_msp_430
.section .rodata
.align 2
.LC68:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_stability.h\000"
.align 2
.LC69:
.ascii "check_stability(_a, ds.a_size)\000"
.align 2
.LC70:
.word __stack_chk_guard
.text
.align 2
.global verify_stability
.syntax unified
.arm
.fpu softvfp
.type verify_stability, %function
verify_stability:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
ldr r3, .L1194
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1194+4
mov r2, #0
str r2, [r3]
ldr r3, .L1194+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-32]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-28]
ldr r3, .L1194+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-28]
ldr r0, .L1194+8
bl fxp_double_to_fxp_array
ldr r3, .L1194+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-20]
ldr r3, .L1194+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-28]
ldr r0, [fp, #-20]
bl fxp_to_double_array
ldr r3, .L1194+8
ldr r3, [r3, #800]
mov r1, r3
ldr r0, [fp, #-20]
bl check_stability
mov r3, r0
cmp r3, #0
bne .L1191
ldr r3, .L1194+12
mov r2, #37
ldr r1, .L1194+16
ldr r0, .L1194+20
bl __assert_fail
.L1191:
mov r3, #0
mov sp, r4
ldr r2, .L1194
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1193
bl __stack_chk_fail
.L1193:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L1195:
.align 2
.L1194:
.word .LC70
.word overflow_mode
.word ds
.word __PRETTY_FUNCTION__.7321
.word .LC68
.word .LC69
.size verify_stability, .-verify_stability
.section .rodata
.align 2
.LC71:
.word __stack_chk_guard
.text
.align 2
.global verify_minimum_phase
.syntax unified
.arm
.fpu softvfp
.type verify_minimum_phase, %function
verify_minimum_phase:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
ldr r3, .L1199
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1199+4
mov r2, #0
str r2, [r3]
ldr r3, .L1199+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-32]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-28]
ldr r3, .L1199+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-28]
ldr r0, .L1199+12
bl fxp_double_to_fxp_array
ldr r3, .L1199+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-24]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-20]
ldr r3, .L1199+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-28]
ldr r0, [fp, #-20]
bl fxp_to_double_array
ldr r3, .L1199+8
ldr r3, [r3, #1608]
mov r1, r3
ldr r0, [fp, #-20]
bl check_stability
mov r3, r0
cmp r3, #0
movne r3, #1
moveq r3, #0
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
mov r3, #0
mov sp, r4
ldr r2, .L1199
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1198
bl __stack_chk_fail
.L1198:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L1200:
.align 2
.L1199:
.word .LC71
.word overflow_mode
.word ds
.word ds+808
.size verify_minimum_phase, .-verify_minimum_phase
.section .rodata
.align 2
.LC72:
.ascii "Verifying stability for closedloop function\000"
.align 2
.LC73:
.word __stack_chk_guard
.text
.align 2
.global verify_stability_closedloop_using_dslib
.syntax unified
.arm
.fpu softvfp
.type verify_stability_closedloop_using_dslib, %function
verify_stability_closedloop_using_dslib:
@ args = 0, pretend = 0, frame = 880
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #892
ldr r3, .L1204
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1204+4
str r3, [fp, #-868]
ldr r3, .L1204+8
ldr r3, [r3, #1608]
str r3, [fp, #-872]
ldr r3, .L1204+8
str r3, [fp, #-876]
ldr r3, .L1204+8
ldr r3, [r3, #800]
str r3, [fp, #-880]
ldr r3, .L1204+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-884]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-888]
ldr r3, .L1204+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-888]
ldr r0, [fp, #-868]
bl fxp_double_to_fxp_array
ldr r3, .L1204+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-892]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-864]
ldr r3, .L1204+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-864]
ldr r0, [fp, #-876]
bl fxp_double_to_fxp_array
ldr r3, .L1204+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-860]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-856]
ldr r3, .L1204+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-888]
ldr r0, [fp, #-856]
bl fxp_to_double_array
ldr r3, .L1204+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-852]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-848]
ldr r3, .L1204+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-864]
ldr r0, [fp, #-848]
bl fxp_to_double_array
ldr r3, .L1204+12
str r3, [fp, #-844]
ldr r3, .L1204+16
ldr r3, [r3, #1608]
str r3, [fp, #-840]
ldr r3, .L1204+16
str r3, [fp, #-836]
ldr r3, .L1204+16
ldr r3, [r3, #800]
str r3, [fp, #-832]
ldr r3, .L1204+8
ldr r2, [r3, #1608]
ldr r3, .L1204+16
ldr r3, [r3, #1608]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-828]
ldr r3, .L1204+8
ldr r2, [r3, #800]
ldr r3, .L1204+16
ldr r3, [r3, #800]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-824]
ldr r0, .L1204+20
bl puts
sub r0, fp, #820
ldr r3, [fp, #-832]
str r3, [sp, #4]
ldr r3, [fp, #-836]
str r3, [sp]
ldr r3, [fp, #-840]
ldr r2, [fp, #-844]
ldr r1, [fp, #-824]
bl check_stability_closedloop
mov r3, r0
cmp r3, #0
movne r3, #1
moveq r3, #0
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
mov r3, #0
mov sp, r4
ldr r2, .L1204
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1203
bl __stack_chk_fail
.L1203:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L1205:
.align 2
.L1204:
.word .LC73
.word controller+808
.word controller
.word plant+808
.word plant
.word .LC72
.size verify_stability_closedloop_using_dslib, .-verify_stability_closedloop_using_dslib
.section .rodata
.align 2
.LC74:
.word __stack_chk_guard
.text
.align 2
.global verify_limit_cycle_closed_loop
.syntax unified
.arm
.fpu softvfp
.type verify_limit_cycle_closed_loop, %function
verify_limit_cycle_closed_loop:
@ args = 0, pretend = 0, frame = 1752
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #1760
sub sp, sp, #8
ldr r3, .L1229
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
mov r3, sp
mov r4, r3
ldr r3, .L1229+4
mov r2, #3
str r2, [r3]
ldr r3, .L1229+8
str r3, [fp, #-1716]
ldr r3, .L1229+12
ldr r3, [r3, #1608]
str r3, [fp, #-1720]
ldr r3, .L1229+12
str r3, [fp, #-1724]
ldr r3, .L1229+12
ldr r3, [r3, #800]
str r3, [fp, #-1728]
ldr r3, .L1229+12
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-1732]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-1736]
ldr r3, .L1229+12
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-1736]
ldr r0, [fp, #-1716]
bl fxp_double_to_fxp_array
ldr r3, .L1229+12
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-1740]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-1744]
ldr r3, .L1229+12
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-1744]
ldr r0, [fp, #-1724]
bl fxp_double_to_fxp_array
ldr r3, .L1229+12
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-1748]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1752]
ldr r3, .L1229+12
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-1736]
ldr r0, [fp, #-1752]
bl fxp_to_double_array
ldr r3, .L1229+12
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-1756]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1760]
ldr r3, .L1229+12
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-1744]
ldr r0, [fp, #-1760]
bl fxp_to_double_array
ldr r3, .L1229+16
str r3, [fp, #-1764]
ldr r3, .L1229+20
ldr r3, [r3, #1608]
str r3, [fp, #-1708]
ldr r3, .L1229+20
str r3, [fp, #-1704]
ldr r3, .L1229+20
ldr r3, [r3, #800]
str r3, [fp, #-1700]
ldr r3, .L1229+12
ldr r2, [r3, #1608]
ldr r3, .L1229+20
ldr r3, [r3, #1608]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-1696]
ldr r3, .L1229+12
ldr r2, [r3, #800]
ldr r3, .L1229+20
ldr r3, [r3, #800]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-1692]
ldr r3, .L1229+24
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-1688]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1684]
ldr r3, .L1229+24
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-1680]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1676]
ldr ip, [fp, #-1696]
sub r3, ip, #1
str r3, [fp, #-1672]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1668]
bl nondet_double
str r0, [fp, #-1628]
str r1, [fp, #-1624]
ldr r3, .L1229+28
add r3, r3, #16
ldmia r3, {r2-r3}
ldr r0, [fp, #-1628]
ldr r1, [fp, #-1624]
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1207
ldr r3, .L1229+28
add r3, r3, #8
ldmia r3, {r2-r3}
ldr r0, [fp, #-1628]
ldr r1, [fp, #-1624]
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1207
mov r3, #1
b .L1210
.L1207:
mov r3, #0
.L1210:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
mov r3, #0
str r3, [fp, #-1712]
b .L1211
.L1212:
ldr r2, [fp, #-1676]
ldr r3, [fp, #-1712]
lsl r3, r3, #3
add r1, r2, r3
ldr r2, [fp, #-1628]
ldr r3, [fp, #-1624]
stm r1, {r2-r3}
ldr r2, [fp, #-1684]
ldr r3, [fp, #-1712]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-1712]
add r3, r3, #1
str r3, [fp, #-1712]
.L1211:
ldr r3, .L1229+24
ldr r3, [r3]
ldr r2, [fp, #-1712]
cmp r2, r3
blt .L1212
mov r3, #0
str r3, [fp, #-1712]
b .L1213
.L1214:
ldr r2, [fp, #-1668]
ldr r3, [fp, #-1712]
lsl r3, r3, #3
add r1, r2, r3
ldr r2, [fp, #-1628]
ldr r3, [fp, #-1624]
stm r1, {r2-r3}
ldr r3, [fp, #-1712]
add r3, r3, #1
str r3, [fp, #-1712]
.L1213:
ldr r2, [fp, #-1712]
ldr r3, [fp, #-1696]
cmp r2, r3
blt .L1214
ldr ip, [fp, #-1692]
mov r3, sp
mov r5, r3
sub r3, ip, #1
str r3, [fp, #-1664]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1660]
ldr ip, [fp, #-1692]
sub r3, ip, #1
str r3, [fp, #-1656]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1652]
ldr r2, [fp, #-1696]
ldr r3, [fp, #-1692]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-1648]
ldr ip, [fp, #-1648]
sub r3, ip, #1
str r3, [fp, #-1644]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1640]
ldr ip, [fp, #-1648]
sub r3, ip, #1
str r3, [fp, #-1636]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-1632]
mov r3, #0
str r3, [fp, #-1712]
b .L1215
.L1220:
bl nondet_int
mov r3, r0
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
ldr r0, [fp, #-1640]
ldr r1, [fp, #-1712]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-1640]
ldr r3, [fp, #-1712]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, .L1229+28
add r3, r3, #16
ldmia r3, {r2-r3}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1216
ldr r2, [fp, #-1640]
ldr r3, [fp, #-1712]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, .L1229+28
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1216
mov r3, #1
b .L1219
.L1216:
mov r3, #0
.L1219:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r2, [fp, #-1640]
ldr r3, [fp, #-1712]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
ldr r0, [fp, #-1632]
ldr r1, [fp, #-1712]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1712]
add r3, r3, #1
str r3, [fp, #-1712]
.L1215:
ldr r2, [fp, #-1712]
ldr r3, [fp, #-1648]
cmp r2, r3
blt .L1220
mov r3, #0
str r3, [fp, #-1712]
b .L1221
.L1222:
ldr r3, [fp, #-1648]
ldr r2, [fp, #-1640]
mov r0, #0
mov r1, #0
bl shiftRDdouble
ldr r2, [fp, #-1676]
ldr r3, [fp, #-1712]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1696]
str r3, [sp, #12]
ldr r3, [fp, #-1692]
str r3, [sp, #8]
sub r3, fp, #1600
sub r3, r3, #12
sub r3, r3, #8
str r3, [sp, #4]
sub r3, fp, #820
str r3, [sp]
mov r2, r0
mov r3, r1
ldr r0, [fp, #-1640]
bl double_direct_form_2
mov r2, r0
mov r3, r1
ldr r0, [fp, #-1684]
ldr r1, [fp, #-1712]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1712]
add r3, r3, #1
str r3, [fp, #-1712]
.L1221:
ldr r3, .L1229+24
ldr r3, [r3]
ldr r2, [fp, #-1712]
cmp r2, r3
blt .L1222
ldr r3, .L1229+24
ldr r3, [r3]
mov r1, r3
ldr r0, [fp, #-1684]
bl double_check_persistent_limit_cycle
mov r3, #0
mov sp, r5
mov sp, r4
ldr r2, .L1229
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L1224
bl __stack_chk_fail
.L1224:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L1230:
.align 2
.L1229:
.word .LC74
.word overflow_mode
.word controller+808
.word controller
.word plant+808
.word plant
.word X_SIZE_VALUE
.word impl
.size verify_limit_cycle_closed_loop, .-verify_limit_cycle_closed_loop
.section .rodata
.align 2
.LC75:
.word __stack_chk_guard
.text
.align 2
.global verify_error_closedloop
.syntax unified
.arm
.fpu softvfp
.type verify_error_closedloop, %function
verify_error_closedloop:
@ args = 0, pretend = 0, frame = 3424
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, fp, lr}
add fp, sp, #28
sub sp, sp, #3440
ldr r3, .L1254
ldr r3, [r3]
str r3, [fp, #-32]
mov r3,#0
mov r3, sp
mov r8, r3
ldr r3, .L1254+4
mov r2, #3
str r2, [r3]
ldr r3, .L1254+8
str r3, [fp, #-3348]
ldr r3, .L1254+12
ldr r3, [r3, #1608]
str r3, [fp, #-3352]
ldr r3, .L1254+12
str r3, [fp, #-3356]
ldr r3, .L1254+12
ldr r3, [r3, #800]
str r3, [fp, #-3360]
ldr r3, .L1254+12
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-3364]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-3368]
ldr r3, .L1254+12
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-3368]
ldr r0, [fp, #-3348]
bl fxp_double_to_fxp_array
ldr r3, .L1254+12
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-3372]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-3376]
ldr r3, .L1254+12
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-3376]
ldr r0, [fp, #-3356]
bl fxp_double_to_fxp_array
ldr r3, .L1254+12
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-3380]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3384]
ldr r3, .L1254+12
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-3368]
ldr r0, [fp, #-3384]
bl fxp_to_double_array
ldr r3, .L1254+12
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-3388]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3392]
ldr r3, .L1254+12
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-3376]
ldr r0, [fp, #-3392]
bl fxp_to_double_array
ldr r3, .L1254+16
str r3, [fp, #-3396]
ldr r3, .L1254+20
ldr r3, [r3, #1608]
str r3, [fp, #-3400]
ldr r3, .L1254+20
str r3, [fp, #-3404]
ldr r3, .L1254+20
ldr r3, [r3, #800]
str r3, [fp, #-3408]
ldr r3, .L1254+12
ldr r2, [r3, #1608]
ldr r3, .L1254+20
ldr r3, [r3, #1608]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-3412]
ldr r3, .L1254+12
ldr r2, [r3, #800]
ldr r3, .L1254+20
ldr r3, [r3, #800]
add r3, r2, r3
sub r3, r3, #1
str r3, [fp, #-3416]
ldr r3, .L1254+24
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-3420]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3424]
ldr r3, .L1254+24
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-3428]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3432]
ldr r3, .L1254+24
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-3436]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3440]
ldr r3, .L1254+24
ldr ip, [r3]
sub r3, ip, #1
str r3, [fp, #-3444]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3448]
ldr ip, [fp, #-3412]
sub r3, ip, #1
str r3, [fp, #-3452]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3340]
ldr ip, [fp, #-3412]
sub r3, ip, #1
str r3, [fp, #-3336]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3332]
ldr ip, [fp, #-3412]
sub r3, ip, #1
str r3, [fp, #-3328]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3324]
bl nondet_double
str r0, [fp, #-3252]
str r1, [fp, #-3248]
ldr r3, .L1254+28
add r3, r3, #16
ldmia r3, {r2-r3}
ldr r0, [fp, #-3252]
ldr r1, [fp, #-3248]
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1232
ldr r3, .L1254+28
add r3, r3, #8
ldmia r3, {r2-r3}
ldr r0, [fp, #-3252]
ldr r1, [fp, #-3248]
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1232
mov r3, #1
b .L1235
.L1232:
mov r3, #0
.L1235:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
mov r3, #0
str r3, [fp, #-3344]
b .L1236
.L1237:
ldr r2, [fp, #-3440]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r1, r2, r3
ldr r2, [fp, #-3252]
ldr r3, [fp, #-3248]
stm r1, {r2-r3}
ldr r2, [fp, #-3448]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r1, r2, r3
ldr r2, [fp, #-3252]
ldr r3, [fp, #-3248]
stm r1, {r2-r3}
ldr r2, [fp, #-3424]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r2, [fp, #-3432]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-3344]
add r3, r3, #1
str r3, [fp, #-3344]
.L1236:
ldr r3, .L1254+24
ldr r3, [r3]
ldr r2, [fp, #-3344]
cmp r2, r3
blt .L1237
mov r3, #0
str r3, [fp, #-3344]
b .L1238
.L1239:
ldr r2, [fp, #-3340]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r1, r2, r3
ldr r2, [fp, #-3252]
ldr r3, [fp, #-3248]
stm r1, {r2-r3}
ldr r2, [fp, #-3332]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r1, r2, r3
ldr r2, [fp, #-3252]
ldr r3, [fp, #-3248]
stm r1, {r2-r3}
ldr r3, [fp, #-3344]
add r3, r3, #1
str r3, [fp, #-3344]
.L1238:
ldr r2, [fp, #-3344]
ldr r3, [fp, #-3412]
cmp r2, r3
blt .L1239
ldr ip, [fp, #-3416]
mov r3, sp
mov r9, r3
sub r3, ip, #1
str r3, [fp, #-3320]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3316]
ldr ip, [fp, #-3416]
sub r3, ip, #1
str r3, [fp, #-3312]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3308]
ldr ip, [fp, #-3416]
sub r3, ip, #1
str r3, [fp, #-3304]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3300]
ldr ip, [fp, #-3416]
sub r3, ip, #1
str r3, [fp, #-3296]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3292]
ldr r2, [fp, #-3412]
ldr r3, [fp, #-3416]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-3288]
ldr ip, [fp, #-3288]
sub r3, ip, #1
str r3, [fp, #-3284]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3280]
ldr ip, [fp, #-3288]
sub r3, ip, #1
str r3, [fp, #-3276]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3272]
ldr ip, [fp, #-3288]
sub r3, ip, #1
str r3, [fp, #-3268]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3264]
ldr ip, [fp, #-3288]
sub r3, ip, #1
str r3, [fp, #-3260]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #16
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-3256]
mov r3, #0
str r3, [fp, #-3344]
b .L1240
.L1241:
ldr r2, [fp, #-3280]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r2, [fp, #-3272]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-3344]
add r3, r3, #1
str r3, [fp, #-3344]
.L1240:
ldr r2, [fp, #-3344]
ldr r3, [fp, #-3288]
cmp r2, r3
blt .L1241
mov r3, #0
str r3, [fp, #-3344]
b .L1242
.L1247:
ldr r3, [fp, #-3288]
ldr r2, [fp, #-3280]
mov r0, #0
mov r1, #0
bl shiftRDdouble
ldr r2, [fp, #-3440]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-3412]
str r3, [sp, #12]
ldr r3, [fp, #-3416]
str r3, [sp, #8]
sub r3, fp, #2416
sub r3, r3, #12
sub r3, r3, #8
str r3, [sp, #4]
sub r3, fp, #1616
sub r3, r3, #12
sub r3, r3, #8
str r3, [sp]
mov r2, r0
mov r3, r1
ldr r0, [fp, #-3280]
bl double_direct_form_2
mov r2, r0
mov r3, r1
ldr r0, [fp, #-3424]
ldr r1, [fp, #-3344]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-3288]
ldr r2, [fp, #-3272]
mov r0, #0
mov r1, #0
bl shiftRDdouble
ldr r2, [fp, #-3448]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-3412]
str r3, [sp, #12]
ldr r3, [fp, #-3416]
str r3, [sp, #8]
sub r3, fp, #3216
sub r3, r3, #12
sub r3, r3, #8
str r3, [sp, #4]
sub r3, fp, #836
str r3, [sp]
mov r2, r0
mov r3, r1
ldr r0, [fp, #-3272]
bl double_direct_form_2
mov r2, r0
mov r3, r1
ldr r0, [fp, #-3432]
ldr r1, [fp, #-3344]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-3432]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r6-r7}
ldr r2, [fp, #-3424]
ldr r3, [fp, #-3344]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-3244]
str r3, [fp, #-3240]
ldr r3, .L1254+28
add r3, r3, #48
ldmia r3, {r2-r3}
ldr r0, [fp, #-3244]
ldr r1, [fp, #-3240]
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L1243
ldr r3, .L1254+28
add r3, r3, #48
ldmia r3, {r2-r3}
mov r4, r2
eor r5, r3, #-2147483648
mov r2, r4
mov r3, r5
ldr r0, [fp, #-3244]
ldr r1, [fp, #-3240]
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1243
mov r3, #1
b .L1246
.L1243:
mov r3, #0
.L1246:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assert
ldr r3, [fp, #-3344]
add r3, r3, #1
str r3, [fp, #-3344]
.L1242:
ldr r3, .L1254+24
ldr r3, [r3]
ldr r2, [fp, #-3344]
cmp r2, r3
blt .L1247
mov r3, #0
mov sp, r9
mov sp, r8
ldr r2, .L1254
ldr r1, [r2]
ldr r2, [fp, #-32]
eors r1, r2, r1
mov r2, #0
beq .L1249
bl __stack_chk_fail
.L1249:
mov r0, r3
sub sp, fp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, fp, pc}
.L1255:
.align 2
.L1254:
.word .LC75
.word overflow_mode
.word controller+808
.word controller
.word plant+808
.word plant
.word X_SIZE_VALUE
.word impl
.size verify_error_closedloop, .-verify_error_closedloop
.comm new_state,128,8
.comm new_stateFWL,128,8
.comm _controller_fxp,1040,8
.comm _controller_double,1040,8
.section .rodata
.align 2
.LC76:
.word __stack_chk_guard
.text
.align 2
.global ss_system_quantization_error
.syntax unified
.arm
.fpu softvfp
.type ss_system_quantization_error, %function
ss_system_quantization_error:
@ args = 0, pretend = 0, frame = 1088
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #1088
str r0, [fp, #-1088]
ldr r3, .L1331
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r0, [fp, #-1088]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
ldr r1, .L1331+4
str r2, [r1, #768]
str r3, [r1, #772]
mov r3, #0
str r3, [fp, #-1084]
b .L1257
.L1260:
mov r3, #0
str r3, [fp, #-1080]
b .L1258
.L1259:
ldr r1, .L1331+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
stm r3, {r0-r1}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1258:
ldr r3, .L1331+8
ldr r3, [r3]
ldr r2, [fp, #-1080]
cmp r2, r3
blt .L1259
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1257:
ldr r3, .L1331+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1260
mov r3, #0
str r3, [fp, #-1084]
b .L1261
.L1264:
mov r3, #0
str r3, [fp, #-1080]
b .L1262
.L1263:
ldr r1, .L1331+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #16
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #16
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
stm r3, {r0-r1}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1262:
ldr r3, .L1331+12
ldr r3, [r3]
ldr r2, [fp, #-1080]
cmp r2, r3
blt .L1263
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1261:
ldr r3, .L1331+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1264
mov r3, #0
str r3, [fp, #-1084]
b .L1265
.L1268:
mov r3, #0
str r3, [fp, #-1080]
b .L1266
.L1267:
ldr r1, .L1331+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #32
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #32
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
stm r3, {r0-r1}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1266:
ldr r3, .L1331+8
ldr r3, [r3]
ldr r2, [fp, #-1080]
cmp r2, r3
blt .L1267
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1265:
ldr r3, .L1331+16
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1268
mov r3, #0
str r3, [fp, #-1084]
b .L1269
.L1272:
mov r3, #0
str r3, [fp, #-1080]
b .L1270
.L1271:
ldr r1, .L1331+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #48
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #48
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
stm r3, {r0-r1}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1270:
ldr r3, .L1331+12
ldr r3, [r3]
ldr r2, [fp, #-1080]
cmp r2, r3
blt .L1271
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1269:
ldr r3, .L1331+16
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1272
mov r3, #0
str r3, [fp, #-1084]
b .L1273
.L1276:
mov r3, #0
str r3, [fp, #-1080]
b .L1274
.L1275:
ldr r1, .L1331+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #64
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #64
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
stm r3, {r0-r1}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1274:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1275
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1273:
ldr r3, .L1331+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1276
mov r3, #0
str r3, [fp, #-1084]
b .L1277
.L1280:
mov r3, #0
str r3, [fp, #-1080]
b .L1278
.L1279:
ldr r1, .L1331+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #96
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #96
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
stm r3, {r0-r1}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1278:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1279
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1277:
ldr r3, .L1331+12
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1280
mov r3, #0
str r3, [fp, #-1084]
b .L1281
.L1284:
mov r3, #0
str r3, [fp, #-1080]
b .L1282
.L1283:
ldr r1, .L1331+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #80
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #80
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
stm r3, {r0-r1}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1282:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1283
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1281:
ldr r3, .L1331+16
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1284
mov r2, #0
mov r3, #0
str r2, [fp, #-1076]
str r3, [fp, #-1072]
mov r3, #0
str r3, [fp, #-1084]
b .L1285
.L1288:
mov r3, #0
str r3, [fp, #-1080]
b .L1286
.L1287:
ldr r1, .L1331+20
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
ldr ip, .L1331+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
add r1, r1, #64
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1286:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1287
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1285:
ldr r3, .L1331+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1288
bl double_state_space_representation
str r0, [fp, #-1068]
str r1, [fp, #-1064]
mov r3, #0
str r3, [fp, #-1084]
b .L1289
.L1292:
mov r3, #0
str r3, [fp, #-1080]
b .L1290
.L1291:
ldr r1, .L1331+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #64
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
ldr ip, .L1331+20
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1290:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1291
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1289:
ldr r3, .L1331+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1292
ldr r0, [fp, #-1088]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
str r2, [fp, #-284]
str r3, [fp, #-280]
mov r3, #0
str r3, [fp, #-1084]
b .L1293
.L1296:
mov r3, #0
str r3, [fp, #-1080]
b .L1294
.L1295:
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
ldmia r3, {r2-r3}
ldr ip, .L1331+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1294:
ldr r3, .L1331+8
ldr r3, [r3]
ldr r2, [fp, #-1080]
cmp r2, r3
blt .L1295
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1293:
ldr r3, .L1331+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1296
mov r3, #0
str r3, [fp, #-1084]
b .L1297
.L1300:
mov r3, #0
str r3, [fp, #-1080]
b .L1298
.L1299:
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #16
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
ldmia r3, {r2-r3}
ldr ip, .L1331+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
add r1, r1, #16
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1298:
ldr r3, .L1331+12
ldr r3, [r3]
ldr r2, [fp, #-1080]
cmp r2, r3
blt .L1299
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1297:
ldr r3, .L1331+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1300
mov r3, #0
str r3, [fp, #-1084]
b .L1301
.L1304:
mov r3, #0
str r3, [fp, #-1080]
b .L1302
.L1303:
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #32
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
ldmia r3, {r2-r3}
ldr ip, .L1331+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
add r1, r1, #32
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1302:
ldr r3, .L1331+8
ldr r3, [r3]
ldr r2, [fp, #-1080]
cmp r2, r3
blt .L1303
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1301:
ldr r3, .L1331+16
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1304
mov r3, #0
str r3, [fp, #-1084]
b .L1305
.L1308:
mov r3, #0
str r3, [fp, #-1080]
b .L1306
.L1307:
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #48
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
ldmia r3, {r2-r3}
ldr ip, .L1331+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
add r1, r1, #48
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1306:
ldr r3, .L1331+12
ldr r3, [r3]
ldr r2, [fp, #-1080]
cmp r2, r3
blt .L1307
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1305:
ldr r3, .L1331+16
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1308
mov r3, #0
str r3, [fp, #-1084]
b .L1309
.L1312:
mov r3, #0
str r3, [fp, #-1080]
b .L1310
.L1311:
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #64
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
ldmia r3, {r2-r3}
ldr ip, .L1331+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
add r1, r1, #64
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1310:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1311
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1309:
ldr r3, .L1331+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1312
mov r3, #0
str r3, [fp, #-1084]
b .L1313
.L1316:
mov r3, #0
str r3, [fp, #-1080]
b .L1314
.L1315:
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #96
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
ldmia r3, {r2-r3}
ldr ip, .L1331+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
add r1, r1, #96
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1314:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1315
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1313:
ldr r3, .L1331+12
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1316
mov r3, #0
str r3, [fp, #-1084]
b .L1317
.L1320:
mov r3, #0
str r3, [fp, #-1080]
b .L1318
.L1319:
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #80
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #1040
sub r3, r3, #8
ldmia r3, {r2-r3}
ldr ip, .L1331+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
add r1, r1, #80
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1318:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1319
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1317:
ldr r3, .L1331+16
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1320
mov r3, #0
str r3, [fp, #-1084]
b .L1321
.L1324:
mov r3, #0
str r3, [fp, #-1080]
b .L1322
.L1323:
ldr r1, .L1331+24
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
ldr ip, .L1331+4
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
add r1, r1, #64
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1322:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1323
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1321:
ldr r3, .L1331+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1324
bl fxp_state_space_representation
str r0, [fp, #-1060]
str r1, [fp, #-1056]
mov r3, #0
str r3, [fp, #-1084]
b .L1325
.L1328:
mov r3, #0
str r3, [fp, #-1080]
b .L1326
.L1327:
ldr r1, .L1331+4
ldr r3, [fp, #-1084]
lsl r2, r3, #2
ldr r3, [fp, #-1080]
add r3, r2, r3
add r3, r3, #64
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
ldr ip, .L1331+24
ldr r1, [fp, #-1084]
lsl r0, r1, #2
ldr r1, [fp, #-1080]
add r1, r0, r1
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-1080]
add r3, r3, #1
str r3, [fp, #-1080]
.L1326:
ldr r3, [fp, #-1080]
cmp r3, #0
ble .L1327
ldr r3, [fp, #-1084]
add r3, r3, #1
str r3, [fp, #-1084]
.L1325:
ldr r3, .L1331+8
ldr r3, [r3]
ldr r2, [fp, #-1084]
cmp r2, r3
blt .L1328
ldr r2, [fp, #-1060]
ldr r3, [fp, #-1056]
ldr r0, [fp, #-1068]
ldr r1, [fp, #-1064]
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-1076]
str r3, [fp, #-1072]
ldr r2, [fp, #-1076]
ldr r3, [fp, #-1072]
ldr r1, .L1331
ldr r0, [r1]
ldr r1, [fp, #-8]
eors r0, r1, r0
mov r1, #0
beq .L1330
bl __stack_chk_fail
.L1330:
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1332:
.align 2
.L1331:
.word .LC76
.word _controller
.word nStates
.word nInputs
.word nOutputs
.word new_state
.word new_stateFWL
.size ss_system_quantization_error, .-ss_system_quantization_error
.section .rodata
.align 2
.LC77:
.word __stack_chk_guard
.text
.align 2
.global fxp_ss_closed_loop_quantization_error
.syntax unified
.arm
.fpu softvfp
.type fxp_ss_closed_loop_quantization_error, %function
fxp_ss_closed_loop_quantization_error:
@ args = 0, pretend = 0, frame = 736
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #752
str r0, [fp, #-740]
str r1, [fp, #-736]
ldr r3, .L1364
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r3, fp, #4
sub r3, r3, #724
sub r3, r3, #2
mov r2, #0
strh r2, [r3] @ movhi
mov r3, #0
str r3, [fp, #-728]
b .L1334
.L1339:
mov r3, #0
str r3, [fp, #-724]
b .L1335
.L1338:
ldr r1, .L1364+4
ldr r3, [fp, #-728]
lsl r2, r3, #2
ldr r3, [fp, #-724]
add r3, r2, r3
add r3, r3, #48
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L1336
sub r3, fp, #4
sub r3, r3, #724
sub r3, r3, #2
mov r2, #1
strh r2, [r3] @ movhi
.L1336:
ldr r3, [fp, #-724]
add r3, r3, #1
str r3, [fp, #-724]
.L1335:
ldr r3, .L1364+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-724]
cmp r3, r2
bcc .L1338
ldr r3, [fp, #-728]
add r3, r3, #1
str r3, [fp, #-728]
.L1334:
ldr r3, .L1364+12
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-728]
cmp r3, r2
bcc .L1339
mov r3, #0
str r3, [fp, #-728]
b .L1340
.L1343:
mov r3, #0
str r3, [fp, #-724]
b .L1341
.L1342:
ldr r3, [fp, #-728]
lsl r2, r3, #2
ldr r3, [fp, #-724]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #392
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-728]
lsl r2, r3, #2
ldr r3, [fp, #-724]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-712]
ldr r3, [fp, #-724]
add r3, r3, #1
str r3, [fp, #-724]
.L1341:
ldr r3, [fp, #-724]
cmp r3, #3
bls .L1342
ldr r3, [fp, #-728]
add r3, r3, #1
str r3, [fp, #-728]
.L1340:
ldr r3, [fp, #-728]
cmp r3, #3
bls .L1343
mov r3, #0
str r3, [fp, #-728]
b .L1344
.L1345:
ldr r3, [fp, #-728]
lsl r3, r3, #5
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #392
sub r3, fp, #740
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-728]
add r3, r3, #1
str r3, [fp, #-728]
.L1344:
ldr r3, .L1364+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-728]
cmp r3, r2
bcc .L1345
mov r3, #0
str r3, [fp, #-728]
b .L1346
.L1347:
ldr r3, [fp, #-728]
lsl r3, r3, #4
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-648]
ldr r3, [fp, #-728]
add r3, r3, #1
str r3, [fp, #-728]
.L1346:
ldr r3, [fp, #-728]
cmp r3, #3
bls .L1347
mov r3, #0
str r3, [fp, #-728]
b .L1348
.L1349:
ldr r2, .L1364+4
ldr r3, [fp, #-728]
add r3, r3, #112
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r2, r0
ldr r3, [fp, #-728]
lsl r3, r3, #2
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-712]
ldr r3, [fp, #-728]
add r3, r3, #1
str r3, [fp, #-728]
.L1348:
ldr r3, .L1364+16
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-728]
cmp r3, r2
bcc .L1349
mov r3, #0
str r3, [fp, #-728]
b .L1350
.L1353:
mov r3, #0
str r3, [fp, #-724]
b .L1351
.L1352:
ldr r3, [fp, #-728]
lsl r2, r3, #2
ldr r3, [fp, #-724]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #264
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-728]
lsl r2, r3, #2
ldr r3, [fp, #-724]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #136
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-724]
add r3, r3, #1
str r3, [fp, #-724]
.L1351:
ldr r3, [fp, #-724]
cmp r3, #3
bls .L1352
ldr r3, [fp, #-728]
add r3, r3, #1
str r3, [fp, #-728]
.L1350:
ldr r3, [fp, #-728]
cmp r3, #3
bls .L1353
mov r3, #0
str r3, [fp, #-720]
b .L1354
.L1355:
ldr r2, .L1364+4
ldr r3, [fp, #-720]
add r3, r3, #16
lsl r3, r3, #5
add r3, r2, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r2, r0
ldr r3, [fp, #-720]
lsl r3, r3, #4
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-648]
ldr r3, [fp, #-720]
add r3, r3, #1
str r3, [fp, #-720]
.L1354:
ldr r3, .L1364+16
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-720]
cmp r3, r2
bcc .L1355
ldr r3, .L1364+12
ldr r3, [r3]
mov r0, r3
ldr r3, .L1364+16
ldr r3, [r3]
mov r1, r3
ldr r3, .L1364+16
ldr r3, [r3]
mov r2, r3
sub r3, fp, #588
str r3, [sp, #8]
sub r3, fp, #652
str r3, [sp, #4]
sub r3, fp, #716
str r3, [sp]
mov r3, #1
bl fxp_matrix_multiplication
mov r3, #0
str r3, [fp, #-720]
b .L1356
.L1357:
ldr r3, [fp, #-720]
lsl r3, r3, #5
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #392
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
mov r0, r3
bl fxp_quantize
mov r3, r0
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r2, r0
ldr r3, [fp, #-720]
lsl r3, r3, #4
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-520]
ldr r3, [fp, #-720]
add r3, r3, #1
str r3, [fp, #-720]
.L1356:
ldr r3, .L1364+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-720]
cmp r3, r2
bcc .L1357
ldr r3, .L1364+8
ldr r3, [r3]
mov r0, r3
sub r1, fp, #588
sub r2, fp, #524
sub r3, fp, #460
str r3, [sp]
mov r3, r1
mov r1, #1
bl fxp_sub_matrix
mov r3, #0
str r3, [fp, #-720]
b .L1358
.L1359:
ldr r3, [fp, #-720]
lsl r3, r3, #4
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-456]
mov r0, r3
bl fxp_quantize
mov r3, r0
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr r0, .L1364+4
ldr r1, [fp, #-720]
add r1, r1, #24
lsl r1, r1, #5
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-720]
add r3, r3, #1
str r3, [fp, #-720]
.L1358:
ldr r3, .L1364+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-720]
cmp r3, r2
bcc .L1359
ldr r3, .L1364+12
ldr r3, [r3]
mov r0, r3
ldr r3, .L1364+16
ldr r3, [r3]
mov r1, r3
ldr r3, .L1364+16
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1364+20
str r3, [sp, #4]
ldr r3, .L1364+24
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
sub r3, fp, #4
sub r3, r3, #724
sub r3, r3, #2
ldrh r3, [r3]
cmp r3, #1
bne .L1360
ldr r3, .L1364+12
ldr r3, [r3]
mov r0, r3
ldr r3, .L1364+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1364+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L1364+28
str r3, [sp, #4]
ldr r3, .L1364+32
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
.L1360:
ldr r3, .L1364+12
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L1364+36
str r1, [sp]
mov r1, #1
bl double_add_matrix
ldr r3, .L1364+16
ldr r3, [r3]
mov r0, r3
ldr r3, .L1364+16
ldr r3, [r3]
mov r1, r3
ldr r3, .L1364+16
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1364+20
str r3, [sp, #4]
ldr r3, .L1364+4
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1364+16
ldr r3, [r3]
mov r0, r3
ldr r3, .L1364+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1364+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L1364+28
str r3, [sp, #4]
ldr r3, .L1364+40
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1364+16
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L1364+20
str r1, [sp]
mov r1, #1
bl double_add_matrix
ldr r3, .L1364+4
add r3, r3, #640
ldmia r3, {r2-r3}
ldr r1, .L1364
ldr r0, [r1]
ldr r1, [fp, #-8]
eors r0, r1, r0
mov r1, #0
beq .L1362
bl __stack_chk_fail
.L1362:
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1365:
.align 2
.L1364:
.word .LC77
.word _controller_fxp
.word nInputs
.word nOutputs
.word nStates
.word _controller_fxp+512
.word _controller_fxp+256
.word _controller_fxp+768
.word _controller_fxp+384
.word _controller_fxp+640
.word _controller_fxp+128
.size fxp_ss_closed_loop_quantization_error, .-fxp_ss_closed_loop_quantization_error
.section .rodata
.align 2
.LC78:
.word __stack_chk_guard
.text
.align 2
.global ss_closed_loop_quantization_error
.syntax unified
.arm
.fpu softvfp
.type ss_closed_loop_quantization_error, %function
ss_closed_loop_quantization_error:
@ args = 0, pretend = 0, frame = 416
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #432
str r0, [fp, #-420]
str r1, [fp, #-416]
ldr r3, .L1385
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r3, fp, #4
sub r3, r3, #400
sub r3, r3, #2
mov r2, #0
strh r2, [r3] @ movhi
mov r3, #0
str r3, [fp, #-404]
b .L1367
.L1372:
mov r3, #0
str r3, [fp, #-400]
b .L1368
.L1371:
ldr r1, .L1385+4
ldr r3, [fp, #-404]
lsl r2, r3, #2
ldr r3, [fp, #-400]
add r3, r2, r3
add r3, r3, #48
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L1369
sub r3, fp, #4
sub r3, r3, #400
sub r3, r3, #2
mov r2, #1
strh r2, [r3] @ movhi
.L1369:
ldr r3, [fp, #-400]
add r3, r3, #1
str r3, [fp, #-400]
.L1368:
ldr r3, .L1385+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-400]
cmp r3, r2
bcc .L1371
ldr r3, [fp, #-404]
add r3, r3, #1
str r3, [fp, #-404]
.L1367:
ldr r3, .L1385+12
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-404]
cmp r3, r2
bcc .L1372
mov r3, #0
str r3, [fp, #-404]
b .L1373
.L1376:
mov r3, #0
str r3, [fp, #-400]
b .L1374
.L1375:
ldr r3, [fp, #-404]
lsl r2, r3, #2
ldr r3, [fp, #-400]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #392
sub r3, fp, #420
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ldr r3, [fp, #-400]
add r3, r3, #1
str r3, [fp, #-400]
.L1374:
ldr r3, [fp, #-400]
cmp r3, #0
beq .L1375
ldr r3, [fp, #-404]
add r3, r3, #1
str r3, [fp, #-404]
.L1373:
ldr r3, .L1385+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-404]
cmp r3, r2
bcc .L1376
mov r3, #0
str r3, [fp, #-404]
b .L1377
.L1380:
mov r3, #0
str r3, [fp, #-400]
b .L1378
.L1379:
ldr r3, [fp, #-404]
lsl r2, r3, #2
ldr r3, [fp, #-400]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #264
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-404]
lsl r2, r3, #2
ldr r3, [fp, #-400]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #136
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-400]
add r3, r3, #1
str r3, [fp, #-400]
.L1378:
ldr r3, [fp, #-400]
cmp r3, #3
bls .L1379
ldr r3, [fp, #-404]
add r3, r3, #1
str r3, [fp, #-404]
.L1377:
ldr r3, [fp, #-404]
cmp r3, #3
bls .L1380
ldr r3, .L1385+12
ldr r3, [r3]
mov r0, r3
ldr r3, .L1385+16
ldr r3, [r3]
mov r1, r3
ldr r3, .L1385+16
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1385+20
str r3, [sp, #4]
ldr r3, .L1385+24
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1385+8
ldr r3, [r3]
mov r0, r3
sub r3, fp, #268
sub r2, fp, #396
ldr r1, .L1385+28
str r1, [sp]
mov r1, #1
bl double_sub_matrix
ldr r3, .L1385+12
ldr r3, [r3]
mov r0, r3
ldr r3, .L1385+16
ldr r3, [r3]
mov r1, r3
ldr r3, .L1385+16
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1385+20
str r3, [sp, #4]
ldr r3, .L1385+32
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
sub r3, fp, #4
sub r3, r3, #400
sub r3, r3, #2
ldrh r3, [r3]
cmp r3, #1
bne .L1381
ldr r3, .L1385+12
ldr r3, [r3]
mov r0, r3
ldr r3, .L1385+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1385+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L1385+28
str r3, [sp, #4]
ldr r3, .L1385+36
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
.L1381:
ldr r3, .L1385+12
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L1385+40
str r1, [sp]
mov r1, #1
bl double_add_matrix
ldr r3, .L1385+16
ldr r3, [r3]
mov r0, r3
ldr r3, .L1385+16
ldr r3, [r3]
mov r1, r3
ldr r3, .L1385+16
ldr r3, [r3]
mov r2, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1385+20
str r3, [sp, #4]
ldr r3, .L1385+4
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1385+16
ldr r3, [r3]
mov r0, r3
ldr r3, .L1385+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1385+8
ldr r3, [r3]
mov r2, r3
sub r3, fp, #140
str r3, [sp, #8]
ldr r3, .L1385+28
str r3, [sp, #4]
ldr r3, .L1385+44
str r3, [sp]
mov r3, #1
bl double_matrix_multiplication
ldr r3, .L1385+16
ldr r3, [r3]
mov r0, r3
sub r3, fp, #140
sub r2, fp, #268
ldr r1, .L1385+20
str r1, [sp]
mov r1, #1
bl double_add_matrix
ldr r3, .L1385+4
add r3, r3, #640
ldmia r3, {r2-r3}
ldr r1, .L1385
ldr r0, [r1]
ldr r1, [fp, #-8]
eors r0, r1, r0
mov r1, #0
beq .L1383
bl __stack_chk_fail
.L1383:
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1386:
.align 2
.L1385:
.word .LC78
.word _controller_double
.word nInputs
.word nOutputs
.word nStates
.word _controller_double+512
.word _controller_double+896
.word _controller_double+768
.word _controller_double+256
.word _controller_double+384
.word _controller_double+640
.word _controller_double+128
.size ss_closed_loop_quantization_error, .-ss_closed_loop_quantization_error
.section .rodata
.align 2
.LC79:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_error_state_space.h\000"
.align 2
.LC80:
.ascii "__quant_error < error_limit && __quant_error > ((-1"
.ascii ")*error_limit)\000"
.align 2
.LC81:
.word __stack_chk_guard
.text
.align 2
.global verify_error_state_space
.syntax unified
.arm
.fpu softvfp
.type verify_error_state_space, %function
verify_error_state_space:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, fp, lr}
add fp, sp, #20
sub sp, sp, #40
ldr r3, .L1422
ldr r3, [r3]
str r3, [fp, #-24]
mov r3,#0
mov r3, #0
str r3, [fp, #-60]
b .L1388
.L1391:
mov r3, #0
str r3, [fp, #-56]
b .L1389
.L1390:
ldr r1, .L1422+4
ldr r3, [fp, #-60]
lsl r2, r3, #2
ldr r3, [fp, #-56]
add r3, r2, r3
add r3, r3, #64
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
ldr ip, .L1422+8
ldr r1, [fp, #-60]
lsl r0, r1, #2
ldr r1, [fp, #-56]
add r1, r0, r1
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-56]
add r3, r3, #1
str r3, [fp, #-56]
.L1389:
ldr r3, [fp, #-56]
cmp r3, #0
ble .L1390
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L1388:
ldr r3, .L1422+12
ldr r3, [r3]
ldr r2, [fp, #-60]
cmp r2, r3
blt .L1391
mov r3, #0
str r3, [fp, #-60]
b .L1392
.L1395:
mov r3, #0
str r3, [fp, #-56]
b .L1393
.L1394:
ldr r1, .L1422+4
ldr r3, [fp, #-60]
lsl r2, r3, #2
ldr r3, [fp, #-56]
add r3, r2, r3
add r3, r3, #64
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
ldr ip, .L1422+16
ldr r1, [fp, #-60]
lsl r0, r1, #2
ldr r1, [fp, #-56]
add r1, r0, r1
lsl r1, r1, #3
add r1, ip, r1
stm r1, {r2-r3}
ldr r3, [fp, #-56]
add r3, r3, #1
str r3, [fp, #-56]
.L1393:
ldr r3, [fp, #-56]
cmp r3, #0
ble .L1394
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L1392:
ldr r3, .L1422+12
ldr r3, [r3]
ldr r2, [fp, #-60]
cmp r2, r3
blt .L1395
ldr r2, .L1422+20
ldr r3, .L1422+4
mov r0, r2
mov r1, r3
mov r3, #1040
mov r2, r3
bl memcpy
ldr r2, .L1422+24
ldr r3, .L1422+4
mov r0, r2
mov r1, r3
mov r3, #1040
mov r2, r3
bl memcpy
ldr r3, .L1422+28
mov r2, #0
str r2, [r3]
ldr r3, .L1422+32
add r3, r3, #16
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-52]
ldr r3, .L1422+32
add r3, r3, #8
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
str r0, [fp, #-48]
bl nondet_double
str r0, [fp, #-44]
str r1, [fp, #-40]
ldr r0, [fp, #-52]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1396
ldr r0, [fp, #-48]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1396
mov r3, #1
b .L1399
.L1396:
mov r3, #0
.L1399:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
mov r3, #0
str r3, [fp, #-60]
b .L1400
.L1401:
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_d2iz
mov r2, r0
ldr r3, [fp, #-60]
lsl r3, r3, #2
sub r1, fp, #20
add r3, r1, r3
str r2, [r3, #-8]
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L1400:
ldr r3, [fp, #-60]
cmp r3, #0
blt .L1401
ldr r3, .L1422+36
ldr r3, [r3]
cmp r3, #0
beq .L1402
mov r3, #0
str r3, [fp, #-60]
b .L1403
.L1408:
ldr r3, [fp, #-60]
lsl r3, r3, #2
sub r2, fp, #20
add r3, r2, r3
ldr r3, [r3, #-8]
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl ss_closed_loop_quantization_error
mov r4, r0
mov r5, r1
ldr r3, [fp, #-60]
lsl r3, r3, #2
sub r2, fp, #20
add r3, r2, r3
ldr r3, [r3, #-8]
mov r0, r3
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl fxp_ss_closed_loop_quantization_error
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-36]
str r3, [fp, #-32]
ldr r3, .L1422+40
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L1404
ldr r3, .L1422+40
ldmia r3, {r2-r3}
mov r6, r2
eor r7, r3, #-2147483648
mov r2, r6
mov r3, r7
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
bne .L1407
.L1404:
ldr r3, .L1422+44
ldr r2, .L1422+48
ldr r1, .L1422+52
ldr r0, .L1422+56
bl __assert_fail
.L1407:
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L1403:
ldr r3, [fp, #-60]
cmp r3, #0
blt .L1408
b .L1409
.L1402:
mov r3, #0
str r3, [fp, #-60]
b .L1410
.L1415:
ldr r3, [fp, #-60]
lsl r3, r3, #2
sub r2, fp, #20
add r3, r2, r3
ldr r3, [r3, #-8]
mov r0, r3
bl ss_system_quantization_error
str r0, [fp, #-36]
str r1, [fp, #-32]
ldr r3, .L1422+40
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L1411
ldr r3, .L1422+40
ldmia r3, {r2-r3}
mov r4, r2
eor r5, r3, #-2147483648
mov r2, r4
mov r3, r5
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
bne .L1414
.L1411:
ldr r3, .L1422+44
ldr r2, .L1422+60
ldr r1, .L1422+52
ldr r0, .L1422+56
bl __assert_fail
.L1414:
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L1410:
ldr r3, [fp, #-60]
cmp r3, #0
blt .L1415
.L1409:
mov r3, #0
ldr r2, .L1422
ldr r1, [r2]
ldr r2, [fp, #-24]
eors r1, r2, r1
mov r2, #0
beq .L1417
bl __stack_chk_fail
.L1417:
mov r0, r3
sub sp, fp, #20
@ sp needed
pop {r4, r5, r6, r7, fp, pc}
.L1423:
.align 2
.L1422:
.word .LC81
.word _controller
.word new_state
.word nStates
.word new_stateFWL
.word _controller_fxp
.word _controller_double
.word overflow_mode
.word impl
.word closed_loop
.word error_limit
.word __PRETTY_FUNCTION__.7688
.word 354
.word .LC79
.word .LC80
.word 361
.size verify_error_state_space, .-verify_error_state_space
.section .rodata
.align 2
.LC82:
.word __stack_chk_guard
.text
.align 2
.global fxp_ss_closed_loop_safety
.syntax unified
.arm
.fpu softvfp
.type fxp_ss_closed_loop_safety, %function
fxp_ss_closed_loop_safety:
@ args = 0, pretend = 0, frame = 600
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #600
ldr r3, .L1458
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r3, fp, #4
sub r3, r3, #592
sub r3, r3, #2
mov r2, #0
strh r2, [r3] @ movhi
mov r3, #0
str r3, [fp, #-592]
b .L1425
.L1430:
mov r3, #0
str r3, [fp, #-596]
b .L1426
.L1429:
ldr r1, .L1458+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
add r3, r3, #48
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
bne .L1427
sub r3, fp, #4
sub r3, r3, #592
sub r3, r3, #2
mov r2, #1
strh r2, [r3] @ movhi
.L1427:
ldr r3, [fp, #-596]
add r3, r3, #1
str r3, [fp, #-596]
.L1426:
ldr r3, .L1458+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-596]
cmp r3, r2
bcc .L1429
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1425:
ldr r3, .L1458+12
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-592]
cmp r3, r2
bcc .L1430
mov r3, #0
str r3, [fp, #-592]
b .L1431
.L1434:
mov r3, #0
str r3, [fp, #-596]
b .L1432
.L1433:
ldr r1, .L1458+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
add r3, r3, #96
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
ldr r1, [fp, #-592]
lsl r0, r1, #2
ldr r1, [fp, #-596]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #392
stm r1, {r2-r3}
ldr r3, [fp, #-596]
add r3, r3, #1
str r3, [fp, #-596]
.L1432:
ldr r3, [fp, #-596]
cmp r3, #0
beq .L1433
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1431:
ldr r3, .L1458+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-592]
cmp r3, r2
bcc .L1434
mov r3, #0
str r3, [fp, #-592]
b .L1435
.L1438:
mov r3, #0
str r3, [fp, #-596]
b .L1436
.L1437:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-584]
ldr r3, [fp, #-596]
add r3, r3, #1
str r3, [fp, #-596]
.L1436:
ldr r3, .L1458+12
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-596]
cmp r3, r2
bcc .L1437
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1435:
ldr r3, .L1458+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-592]
cmp r3, r2
bcc .L1438
mov r3, #0
str r3, [fp, #-592]
b .L1439
.L1442:
mov r3, #0
str r3, [fp, #-596]
b .L1440
.L1441:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-520]
ldr r3, [fp, #-596]
add r3, r3, #1
str r3, [fp, #-596]
.L1440:
ldr r3, [fp, #-596]
cmp r3, #0
beq .L1441
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1439:
ldr r3, .L1458+12
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-592]
cmp r3, r2
bcc .L1442
mov r3, #0
str r3, [fp, #-592]
b .L1443
.L1446:
mov r3, #0
str r3, [fp, #-596]
b .L1444
.L1445:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-456]
ldr r3, [fp, #-596]
add r3, r3, #1
str r3, [fp, #-596]
.L1444:
ldr r3, [fp, #-596]
cmp r3, #3
bls .L1445
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1443:
ldr r3, [fp, #-592]
cmp r3, #3
bls .L1446
mov r3, #0
str r3, [fp, #-592]
b .L1447
.L1450:
mov r3, #0
str r3, [fp, #-596]
b .L1448
.L1449:
ldr r1, .L1458+4
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
add r3, r3, #112
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-584]
ldr r3, [fp, #-596]
add r3, r3, #1
str r3, [fp, #-596]
.L1448:
ldr r3, .L1458+12
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-596]
cmp r3, r2
bcc .L1449
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1447:
ldr r3, .L1458+8
ldr r3, [r3]
mov r2, r3
ldr r3, [fp, #-592]
cmp r3, r2
bcc .L1450
mov r3, #0
str r3, [fp, #-592]
b .L1451
.L1454:
mov r3, #0
str r3, [fp, #-596]
b .L1452
.L1453:
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #264
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-592]
lsl r2, r3, #2
ldr r3, [fp, #-596]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #136
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-596]
add r3, r3, #1
str r3, [fp, #-596]
.L1452:
ldr r3, [fp, #-596]
cmp r3, #3
bls .L1453
ldr r3, [fp, #-592]
add r3, r3, #1
str r3, [fp, #-592]
.L1451:
ldr r3, [fp, #-592]
cmp r3, #3
bls .L1454
mov r3, #1
str r3, [fp, #-592]
nop
ldr r3, .L1458+4
add r3, r3, #640
ldmia r3, {r2-r3}
ldr r1, .L1458
ldr r0, [r1]
ldr r1, [fp, #-8]
eors r0, r1, r0
mov r1, #0
beq .L1456
bl __stack_chk_fail
.L1456:
mov r0, r2
mov r1, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1459:
.align 2
.L1458:
.word .LC82
.word _controller
.word nInputs
.word nOutputs
.size fxp_ss_closed_loop_safety, .-fxp_ss_closed_loop_safety
.section .rodata
.align 2
.LC83:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_safety_state_space.h\000"
.align 2
.LC84:
.ascii "output_double <= error_limit\000"
.text
.align 2
.global verify_safety_state_space
.syntax unified
.arm
.fpu softvfp
.type verify_safety_state_space, %function
verify_safety_state_space:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
bl fxp_ss_closed_loop_safety
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2iz
mov r3, r0
str r3, [fp, #-16]
ldr r0, [fp, #-16]
bl fxp_to_double
str r0, [fp, #-12]
str r1, [fp, #-8]
ldr r3, .L1463
ldmia r3, {r2-r3}
sub r1, fp, #12
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1461
ldr r3, .L1463+4
mov r2, #140
ldr r1, .L1463+8
ldr r0, .L1463+12
bl __assert_fail
.L1461:
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1464:
.align 2
.L1463:
.word error_limit
.word __PRETTY_FUNCTION__.7770
.word .LC83
.word .LC84
.size verify_safety_state_space, .-verify_safety_state_space
.section .rodata
.align 2
.LC85:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_controllability.h\000"
.align 2
.LC86:
.ascii "determinant(controllabilityMatrix_double,nStates) !"
.ascii "= 0\000"
.align 2
.LC87:
.word __stack_chk_guard
.text
.align 2
.global verify_controllability
.syntax unified
.arm
.fpu softvfp
.type verify_controllability, %function
verify_controllability:
@ args = 0, pretend = 0, frame = 536
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #552
ldr r3, .L1505
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-540]
b .L1466
.L1469:
mov r3, #0
str r3, [fp, #-536]
b .L1467
.L1468:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-520]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-456]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-392]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-328]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-264]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #136
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1467:
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, .L1505+8
ldr r2, [r2]
mul r3, r2, r3
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1468
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1466:
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1469
mov r3, #0
str r3, [fp, #-540]
b .L1470
.L1473:
mov r3, #0
str r3, [fp, #-536]
b .L1471
.L1472:
ldr r1, .L1505+12
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-520]
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1471:
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1472
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1470:
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1473
mov r3, #0
str r3, [fp, #-540]
b .L1474
.L1477:
mov r3, #0
str r3, [fp, #-536]
b .L1475
.L1476:
ldr r1, .L1505+12
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
add r3, r3, #16
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-456]
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1475:
ldr r3, .L1505+8
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1476
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1474:
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1477
ldr r3, .L1505+8
ldr r3, [r3]
cmp r3, #1
ble .L1478
mov r3, #0
str r3, [fp, #-532]
mov r3, #0
str r3, [fp, #-536]
b .L1479
.L1484:
ldr r3, .L1505+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1505+4
ldr r3, [r3]
mov ip, r3
ldr r1, [fp, #-532]
sub r2, fp, #524
sub r3, fp, #332
str r3, [sp]
mov r3, r1
mov r1, ip
bl fxp_exp_matrix
ldr r3, [fp, #-532]
add r3, r3, #1
str r3, [fp, #-532]
ldr r3, .L1505+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1505+4
ldr r3, [r3]
mov r1, r3
ldr r3, .L1505+4
ldr r3, [r3]
mov r2, r3
ldr r3, .L1505+8
ldr r3, [r3]
mov ip, r3
sub r3, fp, #268
str r3, [sp, #8]
sub r3, fp, #460
str r3, [sp, #4]
sub r3, fp, #332
str r3, [sp]
mov r3, ip
bl fxp_matrix_multiplication
mov r3, #0
str r3, [fp, #-528]
b .L1480
.L1483:
mov r3, #0
str r3, [fp, #-540]
b .L1481
.L1482:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-528]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r2, [r3, #-264]
ldr r3, [fp, #-540]
lsl r1, r3, #2
ldr r3, [fp, #-536]
add r3, r1, r3
lsl r3, r3, #2
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-392]
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1481:
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1482
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
ldr r3, [fp, #-528]
add r3, r3, #1
str r3, [fp, #-528]
.L1480:
ldr r3, .L1505+8
ldr r3, [r3]
ldr r2, [fp, #-528]
cmp r2, r3
blt .L1483
.L1479:
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, .L1505+8
ldr r2, [r2]
mul r3, r2, r3
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1484
mov r3, #0
str r3, [fp, #-540]
b .L1485
.L1488:
mov r3, #0
str r3, [fp, #-536]
b .L1486
.L1487:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-328]
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1486:
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, .L1505+8
ldr r2, [r2]
mul r3, r2, r3
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1487
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1485:
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1488
ldr r3, .L1505+4
ldr ip, [r3]
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, .L1505+8
ldr r2, [r2]
mul r3, r2, r3
sub r1, fp, #332
sub r0, fp, #396
mov r2, ip
bl fxp_transpose
ldr r3, .L1505+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, .L1505+8
ldr r2, [r2]
mul r3, r2, r3
mov r1, r3
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, .L1505+8
ldr r2, [r2]
mul r3, r2, r3
mov r2, r3
ldr r3, .L1505+4
ldr r3, [r3]
mov ip, r3
sub r3, fp, #204
str r3, [sp, #8]
sub r3, fp, #332
str r3, [sp, #4]
sub r3, fp, #396
str r3, [sp]
mov r3, ip
bl fxp_matrix_multiplication
mov r3, #0
str r3, [fp, #-540]
b .L1489
.L1492:
mov r3, #0
str r3, [fp, #-536]
b .L1490
.L1491:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-200]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr r1, [fp, #-540]
lsl r0, r1, #2
ldr r1, [fp, #-536]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #136
stm r1, {r2-r3}
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1490:
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1491
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1489:
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1492
ldr r3, .L1505+4
ldr r2, [r3]
sub r3, fp, #140
mov r1, r2
mov r0, r3
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1494
ldr r3, .L1505+16
mov r2, #91
ldr r1, .L1505+20
ldr r0, .L1505+24
bl __assert_fail
.L1478:
mov r3, #0
str r3, [fp, #-536]
b .L1495
.L1498:
ldr r3, .L1505+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1505+4
ldr r3, [r3]
mov ip, r3
ldr r1, [fp, #-536]
sub r2, fp, #524
sub r3, fp, #332
str r3, [sp]
mov r3, r1
mov r1, ip
bl fxp_exp_matrix
ldr r3, .L1505+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1505+4
ldr r3, [r3]
mov r1, r3
ldr r3, .L1505+4
ldr r3, [r3]
mov r2, r3
ldr r3, .L1505+8
ldr r3, [r3]
mov ip, r3
sub r3, fp, #268
str r3, [sp, #8]
sub r3, fp, #460
str r3, [sp, #4]
sub r3, fp, #332
str r3, [sp]
mov r3, ip
bl fxp_matrix_multiplication
mov r3, #0
str r3, [fp, #-540]
b .L1496
.L1497:
ldr r3, [fp, #-540]
lsl r3, r3, #4
sub r2, fp, #4
add r3, r2, r3
ldr r2, [r3, #-264]
ldr r3, [fp, #-540]
lsl r1, r3, #2
ldr r3, [fp, #-536]
add r3, r1, r3
lsl r3, r3, #2
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-392]
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1496:
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1497
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1495:
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1498
mov r3, #0
str r3, [fp, #-540]
b .L1499
.L1502:
mov r3, #0
str r3, [fp, #-536]
b .L1500
.L1501:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-392]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr r1, [fp, #-540]
lsl r0, r1, #2
ldr r1, [fp, #-536]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #136
stm r1, {r2-r3}
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1500:
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1501
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1499:
ldr r3, .L1505+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1502
ldr r3, .L1505+4
ldr r2, [r3]
sub r3, fp, #140
mov r1, r2
mov r0, r3
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1494
ldr r3, .L1505+16
mov r2, #113
ldr r1, .L1505+20
ldr r0, .L1505+24
bl __assert_fail
.L1494:
mov r3, #0
ldr r2, .L1505
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L1504
bl __stack_chk_fail
.L1504:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1506:
.align 2
.L1505:
.word .LC87
.word nStates
.word nInputs
.word _controller
.word __PRETTY_FUNCTION__.7825
.word .LC85
.word .LC86
.size verify_controllability, .-verify_controllability
.section .rodata
.align 2
.LC88:
.ascii "determinant(mimo_controllabilityMatrix_double,nStat"
.ascii "es) != 0\000"
.align 2
.LC89:
.ascii "determinant(controllabilityMatrix,nStates) != 0\000"
.align 2
.LC90:
.word __stack_chk_guard
.text
.align 2
.global verify_controllability_double
.syntax unified
.arm
.fpu softvfp
.type verify_controllability_double, %function
verify_controllability_double:
@ args = 0, pretend = 0, frame = 536
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #552
ldr r3, .L1527
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, .L1527+4
ldr r3, [r3]
cmp r3, #1
ble .L1508
mov r3, #0
str r3, [fp, #-532]
mov r3, #0
str r3, [fp, #-536]
b .L1509
.L1514:
ldr r3, .L1527+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1527+8
ldr r3, [r3]
mov r1, r3
ldr r2, [fp, #-532]
sub r3, fp, #396
str r3, [sp]
mov r3, r2
ldr r2, .L1527+12
bl double_exp_matrix
ldr r3, [fp, #-532]
add r3, r3, #1
str r3, [fp, #-532]
ldr r3, .L1527+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1527+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1527+8
ldr r3, [r3]
mov r2, r3
ldr r3, .L1527+4
ldr r3, [r3]
mov ip, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1527+16
str r3, [sp, #4]
sub r3, fp, #396
str r3, [sp]
mov r3, ip
bl double_matrix_multiplication
mov r3, #0
str r3, [fp, #-528]
b .L1510
.L1513:
mov r3, #0
str r3, [fp, #-540]
b .L1511
.L1512:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-528]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #264
ldmia r3, {r2-r3}
ldr r1, [fp, #-540]
lsl r0, r1, #2
ldr r1, [fp, #-536]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #520
stm r1, {r2-r3}
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1511:
ldr r3, .L1527+8
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1512
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
ldr r3, [fp, #-528]
add r3, r3, #1
str r3, [fp, #-528]
.L1510:
ldr r3, .L1527+4
ldr r3, [r3]
ldr r2, [fp, #-528]
cmp r2, r3
blt .L1513
.L1509:
ldr r3, .L1527+8
ldr r3, [r3]
ldr r2, .L1527+4
ldr r2, [r2]
mul r3, r2, r3
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1514
mov r3, #0
str r3, [fp, #-540]
b .L1515
.L1518:
mov r3, #0
str r3, [fp, #-536]
b .L1516
.L1517:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #3
sub r2, fp, #4
add r3, r2, r3
sub r1, r3, #392
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1516:
ldr r3, .L1527+8
ldr r3, [r3]
ldr r2, .L1527+4
ldr r2, [r2]
mul r3, r2, r3
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1517
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1515:
ldr r3, .L1527+8
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1518
ldr r3, .L1527+8
ldr ip, [r3]
ldr r3, .L1527+8
ldr r3, [r3]
ldr r2, .L1527+4
ldr r2, [r2]
mul r3, r2, r3
sub r1, fp, #396
sub r0, fp, #524
mov r2, ip
bl transpose
ldr r3, .L1527+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1527+8
ldr r3, [r3]
ldr r2, .L1527+4
ldr r2, [r2]
mul r3, r2, r3
mov r1, r3
ldr r3, .L1527+8
ldr r3, [r3]
ldr r2, .L1527+4
ldr r2, [r2]
mul r3, r2, r3
mov r2, r3
ldr r3, .L1527+8
ldr r3, [r3]
mov ip, r3
sub r3, fp, #140
str r3, [sp, #8]
sub r3, fp, #396
str r3, [sp, #4]
sub r3, fp, #524
str r3, [sp]
mov r3, ip
bl double_matrix_multiplication
ldr r3, .L1527+8
ldr r2, [r3]
sub r3, fp, #140
mov r1, r2
mov r0, r3
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1520
ldr r3, .L1527+20
mov r2, #154
ldr r1, .L1527+24
ldr r0, .L1527+28
bl __assert_fail
.L1508:
mov r3, #0
str r3, [fp, #-536]
b .L1521
.L1524:
ldr r3, .L1527+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1527+8
ldr r3, [r3]
mov r1, r3
ldr r2, [fp, #-536]
sub r3, fp, #396
str r3, [sp]
mov r3, r2
ldr r2, .L1527+12
bl double_exp_matrix
ldr r3, .L1527+8
ldr r3, [r3]
mov r0, r3
ldr r3, .L1527+8
ldr r3, [r3]
mov r1, r3
ldr r3, .L1527+8
ldr r3, [r3]
mov r2, r3
ldr r3, .L1527+4
ldr r3, [r3]
mov ip, r3
sub r3, fp, #268
str r3, [sp, #8]
ldr r3, .L1527+16
str r3, [sp, #4]
sub r3, fp, #396
str r3, [sp]
mov r3, ip
bl double_matrix_multiplication
mov r3, #0
str r3, [fp, #-540]
b .L1522
.L1523:
ldr r3, [fp, #-540]
lsl r3, r3, #5
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #264
ldmia r3, {r2-r3}
ldr r1, [fp, #-540]
lsl r0, r1, #2
ldr r1, [fp, #-536]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #520
stm r1, {r2-r3}
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1522:
ldr r3, .L1527+8
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1523
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1521:
ldr r3, .L1527+8
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1524
ldr r3, .L1527+8
ldr r2, [r3]
sub r3, fp, #524
mov r1, r2
mov r0, r3
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1520
ldr r3, .L1527+20
mov r2, #163
ldr r1, .L1527+24
ldr r0, .L1527+32
bl __assert_fail
.L1520:
mov r3, #0
ldr r2, .L1527
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L1526
bl __stack_chk_fail
.L1526:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1528:
.align 2
.L1527:
.word .LC90
.word nInputs
.word nStates
.word _controller
.word _controller+128
.word __PRETTY_FUNCTION__.7865
.word .LC85
.word .LC88
.word .LC89
.size verify_controllability_double, .-verify_controllability_double
.section .rodata
.align 2
.LC91:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_observability.h\000"
.align 2
.LC92:
.ascii "determinant(observabilityMatrix_double,nStates) != "
.ascii "0\000"
.align 2
.LC93:
.word __stack_chk_guard
.text
.align 2
.global verify_observability
.syntax unified
.arm
.fpu softvfp
.type verify_observability, %function
verify_observability:
@ args = 0, pretend = 0, frame = 536
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #552
ldr r3, .L1569
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-540]
b .L1530
.L1533:
mov r3, #0
str r3, [fp, #-536]
b .L1531
.L1532:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-392]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-520]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-456]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-328]
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-264]
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1531:
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1532
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1530:
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1533
mov r3, #0
str r3, [fp, #-540]
b .L1534
.L1537:
mov r3, #0
str r3, [fp, #-536]
b .L1535
.L1536:
ldr r1, .L1569+8
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-520]
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1535:
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1536
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1534:
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1537
mov r3, #0
str r3, [fp, #-540]
b .L1538
.L1541:
mov r3, #0
str r3, [fp, #-536]
b .L1539
.L1540:
ldr r1, .L1569+8
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
add r3, r3, #32
lsl r3, r3, #3
add r3, r1, r3
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl fxp_double_to_fxp
mov r1, r0
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
str r1, [r3, #-456]
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1539:
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1540
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1538:
ldr r3, .L1569+12
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1541
ldr r3, .L1569+12
ldr r3, [r3]
cmp r3, #1
ble .L1542
mov r3, #0
str r3, [fp, #-536]
mov r3, #0
str r3, [fp, #-532]
b .L1543
.L1548:
ldr r3, .L1569+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1569+4
ldr r3, [r3]
mov ip, r3
ldr r1, [fp, #-532]
sub r2, fp, #524
sub r3, fp, #332
str r3, [sp]
mov r3, r1
mov r1, ip
bl fxp_exp_matrix
ldr r3, [fp, #-532]
add r3, r3, #1
str r3, [fp, #-532]
ldr r3, .L1569+12
ldr r3, [r3]
mov r0, r3
ldr r3, .L1569+4
ldr r3, [r3]
mov r1, r3
ldr r3, .L1569+4
ldr r3, [r3]
mov r2, r3
ldr r3, .L1569+4
ldr r3, [r3]
mov ip, r3
sub r3, fp, #268
str r3, [sp, #8]
sub r3, fp, #332
str r3, [sp, #4]
sub r3, fp, #460
str r3, [sp]
mov r3, ip
bl fxp_matrix_multiplication
mov r3, #0
str r3, [fp, #-528]
b .L1544
.L1547:
mov r3, #0
str r3, [fp, #-540]
b .L1545
.L1546:
ldr r3, [fp, #-528]
lsl r2, r3, #2
ldr r3, [fp, #-540]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r2, [r3, #-264]
ldr r3, [fp, #-536]
lsl r1, r3, #2
ldr r3, [fp, #-540]
add r3, r1, r3
lsl r3, r3, #2
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-392]
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1545:
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1546
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
ldr r3, [fp, #-528]
add r3, r3, #1
str r3, [fp, #-528]
.L1544:
ldr r3, .L1569+12
ldr r3, [r3]
ldr r2, [fp, #-528]
cmp r2, r3
blt .L1547
.L1543:
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, [fp, #-532]
cmp r2, r3
blt .L1548
mov r3, #0
str r3, [fp, #-540]
b .L1549
.L1552:
mov r3, #0
str r3, [fp, #-536]
b .L1550
.L1551:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
mov r2, #0
str r2, [r3, #-328]
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1550:
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, .L1569+12
ldr r2, [r2]
mul r3, r2, r3
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1551
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1549:
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1552
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, .L1569+12
ldr r2, [r2]
mul r2, r3, r2
ldr r3, .L1569+4
ldr r3, [r3]
sub r1, fp, #332
sub r0, fp, #396
bl fxp_transpose
ldr r3, .L1569+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, .L1569+12
ldr r2, [r2]
mul r3, r2, r3
mov r1, r3
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, .L1569+12
ldr r2, [r2]
mul r3, r2, r3
mov r2, r3
ldr r3, .L1569+4
ldr r3, [r3]
mov ip, r3
sub r3, fp, #204
str r3, [sp, #8]
sub r3, fp, #396
str r3, [sp, #4]
sub r3, fp, #332
str r3, [sp]
mov r3, ip
bl fxp_matrix_multiplication
mov r3, #0
str r3, [fp, #-540]
b .L1553
.L1556:
mov r3, #0
str r3, [fp, #-536]
b .L1554
.L1555:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-200]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr r1, [fp, #-540]
lsl r0, r1, #2
ldr r1, [fp, #-536]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #136
stm r1, {r2-r3}
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1554:
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1555
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1553:
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1556
ldr r3, .L1569+4
ldr r2, [r3]
sub r3, fp, #140
mov r1, r2
mov r0, r3
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1558
ldr r3, .L1569+16
mov r2, #119
ldr r1, .L1569+20
ldr r0, .L1569+24
bl __assert_fail
.L1542:
mov r3, #0
str r3, [fp, #-540]
b .L1559
.L1562:
ldr r3, .L1569+4
ldr r3, [r3]
mov r0, r3
ldr r3, .L1569+4
ldr r3, [r3]
mov ip, r3
ldr r1, [fp, #-540]
sub r2, fp, #524
sub r3, fp, #332
str r3, [sp]
mov r3, r1
mov r1, ip
bl fxp_exp_matrix
ldr r3, .L1569+12
ldr r3, [r3]
mov r0, r3
ldr r3, .L1569+4
ldr r3, [r3]
mov r1, r3
ldr r3, .L1569+4
ldr r3, [r3]
mov r2, r3
ldr r3, .L1569+4
ldr r3, [r3]
mov ip, r3
sub r3, fp, #268
str r3, [sp, #8]
sub r3, fp, #332
str r3, [sp, #4]
sub r3, fp, #460
str r3, [sp]
mov r3, ip
bl fxp_matrix_multiplication
mov r3, #0
str r3, [fp, #-536]
b .L1560
.L1561:
ldr r3, [fp, #-536]
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r2, [r3, #-264]
ldr r3, [fp, #-540]
lsl r1, r3, #2
ldr r3, [fp, #-536]
add r3, r1, r3
lsl r3, r3, #2
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-392]
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1560:
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1561
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1559:
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1562
mov r3, #0
str r3, [fp, #-540]
b .L1563
.L1566:
mov r3, #0
str r3, [fp, #-536]
b .L1564
.L1565:
ldr r3, [fp, #-540]
lsl r2, r3, #2
ldr r3, [fp, #-536]
add r3, r2, r3
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-392]
mov r0, r3
bl fxp_to_double
mov r2, r0
mov r3, r1
ldr r1, [fp, #-540]
lsl r0, r1, #2
ldr r1, [fp, #-536]
add r1, r0, r1
lsl r1, r1, #3
sub r0, fp, #4
add r1, r0, r1
sub r1, r1, #136
stm r1, {r2-r3}
ldr r3, [fp, #-536]
add r3, r3, #1
str r3, [fp, #-536]
.L1564:
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, [fp, #-536]
cmp r2, r3
blt .L1565
ldr r3, [fp, #-540]
add r3, r3, #1
str r3, [fp, #-540]
.L1563:
ldr r3, .L1569+4
ldr r3, [r3]
ldr r2, [fp, #-540]
cmp r2, r3
blt .L1566
ldr r3, .L1569+4
ldr r2, [r3]
sub r3, fp, #140
mov r1, r2
mov r0, r3
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1558
ldr r3, .L1569+16
mov r2, #134
ldr r1, .L1569+20
ldr r0, .L1569+24
bl __assert_fail
.L1558:
mov r3, #0
ldr r2, .L1569
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L1568
bl __stack_chk_fail
.L1568:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L1570:
.align 2
.L1569:
.word .LC93
.word nStates
.word _controller
.word nOutputs
.word __PRETTY_FUNCTION__.7926
.word .LC91
.word .LC92
.size verify_observability, .-verify_observability
.section .rodata
.align 2
.LC94:
.word __stack_chk_guard
.text
.align 2
.global resp_mag
.syntax unified
.arm
.fpu softvfp
.type resp_mag, %function
resp_mag:
@ args = 8, pretend = 0, frame = 96
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, fp, lr}
add fp, sp, #16
sub sp, sp, #100
str r0, [fp, #-96]
str r1, [fp, #-100]
str r2, [fp, #-104]
str r3, [fp, #-108]
ldr r3, [fp, #4]
str r3, [fp, #-112]
ldr r3, .L1580
ldr r3, [r3]
str r3, [fp, #-24]
mov r3,#0
mov r3, sp
mov r6, r3
ldr r3, [fp, #8]
add ip, r3, #1
sub r3, ip, #1
str r3, [fp, #-88]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-92]
ldr r3, [fp, #8]
add ip, r3, #1
sub r3, ip, #1
str r3, [fp, #-76]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-72]
ldr r3, [fp, #8]
add ip, r3, #1
sub r3, ip, #1
str r3, [fp, #-68]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-64]
ldr r3, [fp, #8]
add ip, r3, #1
sub r3, ip, #1
str r3, [fp, #-60]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-56]
mov r2, #0
mov r3, #0
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-84]
b .L1572
.L1578:
ldr r3, [fp, #-96]
ldmia r3, {r2-r3}
ldr r0, [fp, #-92]
ldr r1, [fp, #-84]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-72]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
mov r3, #1
str r3, [fp, #-80]
b .L1573
.L1574:
ldr r2, [fp, #-92]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
str r2, [fp, #-36]
str r3, [fp, #-32]
mov r2, #6
sub r1, fp, #52
ldmia r1, {r0-r1}
bl cosTyl
ldr r2, [fp, #-92]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
mov r2, #6
sub r1, fp, #52
ldmia r1, {r0-r1}
bl sinTyl
ldr r2, [fp, #-72]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-80]
lsl r3, r3, #3
ldr r2, [fp, #-96]
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r0, [fp, #-92]
ldr r1, [fp, #-84]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
mov r2, #6
sub r1, fp, #52
ldmia r1, {r0-r1}
bl sinTyl
sub r3, fp, #36
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
mov r2, #6
sub r1, fp, #52
ldmia r1, {r0-r1}
bl cosTyl
ldr r2, [fp, #-72]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r0, [fp, #-72]
ldr r1, [fp, #-84]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-80]
add r3, r3, #1
str r3, [fp, #-80]
.L1573:
ldr r2, [fp, #-80]
ldr r3, [fp, #-100]
cmp r2, r3
blt .L1574
ldr r3, [fp, #-104]
ldmia r3, {r2-r3}
ldr r0, [fp, #-64]
ldr r1, [fp, #-84]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, [fp, #-56]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r1, r2, r3
mov r2, #0
mov r3, #0
stm r1, {r2-r3}
mov r3, #1
str r3, [fp, #-80]
b .L1575
.L1576:
ldr r2, [fp, #-64]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
str r2, [fp, #-36]
str r3, [fp, #-32]
mov r2, #6
sub r1, fp, #52
ldmia r1, {r0-r1}
bl cosTyl
ldr r2, [fp, #-64]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
mov r2, #6
sub r1, fp, #52
ldmia r1, {r0-r1}
bl sinTyl
ldr r2, [fp, #-56]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r3, [fp, #-80]
lsl r3, r3, #3
ldr r2, [fp, #-104]
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r0, [fp, #-64]
ldr r1, [fp, #-84]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
mov r2, #6
sub r1, fp, #52
ldmia r1, {r0-r1}
bl sinTyl
sub r3, fp, #36
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
mov r2, #6
sub r1, fp, #52
ldmia r1, {r0-r1}
bl cosTyl
ldr r2, [fp, #-56]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r0, [fp, #-56]
ldr r1, [fp, #-84]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r3, [fp, #-80]
add r3, r3, #1
str r3, [fp, #-80]
.L1575:
ldr r2, [fp, #-80]
ldr r3, [fp, #-108]
cmp r2, r3
blt .L1576
ldr r2, [fp, #-92]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-92]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r2, [fp, #-72]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-72]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
mov r0, r3
bl sqrt3
mov r1, r0
ldr r3, [fp, #-84]
lsl r3, r3, #3
ldr r2, [fp, #-112]
add r4, r2, r3
mov r0, r1
bl __aeabi_f2d
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r2, [fp, #-64]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-64]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r2
mov r5, r3
ldr r2, [fp, #-56]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, [fp, #-56]
ldr r3, [fp, #-84]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
mov r0, r3
bl sqrt3
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
str r2, [fp, #-44]
str r3, [fp, #-40]
mov r3, #1
mov r4, r3
mov r2, #0
mov r3, #0
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1577
mov r3, #0
mov r4, r3
.L1577:
and r3, r4, #255
mov r0, r3
bl __DSVERIFIER_assume
ldr r3, [fp, #-84]
lsl r3, r3, #3
ldr r2, [fp, #-112]
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r3, [fp, #-84]
lsl r3, r3, #3
ldr r2, [fp, #-112]
add r4, r2, r3
sub r3, fp, #44
ldmia r3, {r2-r3}
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
stm r4, {r2-r3}
ldr r0, [fp, #8]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
ldr r0, .L1580+4
ldr r1, .L1580+8
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r3, [fp, #-84]
add r3, r3, #1
str r3, [fp, #-84]
.L1572:
ldr r2, .L1580+4
ldr r3, .L1580+8
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1578
mov sp, r6
nop
ldr r3, .L1580
ldr r2, [r3]
ldr r3, [fp, #-24]
eors r2, r3, r2
mov r3, #0
beq .L1579
bl __stack_chk_fail
.L1579:
sub sp, fp, #16
@ sp needed
pop {r4, r5, r6, fp, pc}
.L1581:
.align 2
.L1580:
.word .LC94
.word 1413754136
.word 1074340347
.size resp_mag, .-resp_mag
.section .rodata
.align 2
.LC95:
.ascii "|----------------Passband Failure-------------|\000"
.align 2
.LC96:
.ascii "|-------------Cutoff Frequency Failure--------|\000"
.align 2
.LC97:
.ascii "|----------------Stopband Failure-------------|\000"
.align 2
.LC98:
.word __stack_chk_guard
.text
.align 2
.global verify_magnitude
.syntax unified
.arm
.fpu softvfp
.type verify_magnitude, %function
verify_magnitude:
@ args = 0, pretend = 0, frame = 72
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, fp, lr}
add fp, sp, #20
sub sp, sp, #80
ldr r3, .L1624
ldr r3, [r3]
str r3, [fp, #-24]
mov r3,#0
mov r3, sp
mov r7, r3
mov r3, #100
str r3, [fp, #-80]
ldr r0, [fp, #-80]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L1624+4
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-44]
str r3, [fp, #-40]
ldr r3, [fp, #-80]
add ip, r3, #1
sub r3, ip, #1
str r3, [fp, #-84]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-88]
ldr r3, .L1624+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-92]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-72]
ldr r3, .L1624+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-72]
ldr r0, .L1624+8
bl fxp_double_to_fxp_array
ldr r3, .L1624+8
ldr ip, [r3, #800]
sub r3, ip, #1
str r3, [fp, #-68]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-64]
ldr r3, .L1624+8
ldr r3, [r3, #800]
mov r2, r3
ldr r1, [fp, #-72]
ldr r0, [fp, #-64]
bl fxp_to_double_array
ldr r3, .L1624+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-60]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-56]
ldr r3, .L1624+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-56]
ldr r0, .L1624+12
bl fxp_double_to_fxp_array
ldr r3, .L1624+8
ldr ip, [r3, #1608]
sub r3, ip, #1
str r3, [fp, #-52]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #6
orr r3, r3, r0, lsr #26
lsl r2, r0, #6
mov r3, ip
lsl r3, r3, #3
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
add r3, sp, #8
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
str r3, [fp, #-48]
ldr r3, .L1624+8
ldr r3, [r3, #1608]
mov r2, r3
ldr r1, [fp, #-56]
ldr r0, [fp, #-48]
bl fxp_to_double_array
ldr r3, .L1624+8
ldr r1, [r3, #1608]
ldr r3, .L1624+8
ldr r2, [r3, #800]
ldr r3, [fp, #-80]
str r3, [sp, #4]
ldr r3, [fp, #-88]
str r3, [sp]
mov r3, r2
ldr r2, .L1624+8
ldr r0, .L1624+12
bl resp_mag
ldr r3, .L1624+16
ldr r3, [r3, #24]
cmp r3, #1
bne .L1583
mov r3, #0
str r3, [fp, #-76]
mov r2, #0
mov r3, #0
str r2, [fp, #-36]
str r3, [fp, #-32]
b .L1584
.L1595:
ldr r3, .L1624+16
ldr r3, [r3, #12] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1620
ldr r2, [fp, #-88]
ldr r3, [fp, #-76]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r3, .L1624+16
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r1, #1
mov r6, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
bne .L1587
mov r3, #0
mov r6, r3
.L1587:
and r3, r6, #255
ldr r1, .L1624+20
mov r0, r3
bl __DSVERIFIER_assert_msg
b .L1588
.L1620:
ldr r3, .L1624+16
ldr r3, [r3, #16] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1621
ldr r2, [fp, #-88]
ldr r3, [fp, #-76]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r3, .L1624+16
ldr r3, [r3, #8] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r1, #1
mov r6, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1591
mov r3, #0
mov r6, r3
.L1591:
and r3, r6, #255
ldr r1, .L1624+24
mov r0, r3
bl __DSVERIFIER_assert_msg
b .L1588
.L1621:
ldr r3, .L1624+16
ldr r3, [r3, #20] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1588
mov r2, #0
ldr r3, .L1624+4
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1588
ldr r2, [fp, #-88]
ldr r3, [fp, #-76]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r3, .L1624+16
ldr r3, [r3, #4] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r1, #1
mov r6, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1594
mov r3, #0
mov r6, r3
.L1594:
and r3, r6, #255
ldr r1, .L1624+28
mov r0, r3
bl __DSVERIFIER_assert_msg
.L1588:
ldr r3, [fp, #-76]
add r3, r3, #1
str r3, [fp, #-76]
sub r3, fp, #44
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-36]
str r3, [fp, #-32]
.L1584:
mov r2, #0
ldr r3, .L1624+4
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1595
b .L1596
.L1583:
ldr r3, .L1624+16
ldr r3, [r3, #24]
cmp r3, #2
bne .L1597
mov r3, #0
str r3, [fp, #-76]
mov r2, #0
mov r3, #0
str r2, [fp, #-36]
str r3, [fp, #-32]
b .L1598
.L1609:
ldr r3, .L1624+16
ldr r3, [r3, #20] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1622
ldr r2, [fp, #-88]
ldr r3, [fp, #-76]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r3, .L1624+16
ldr r3, [r3, #4] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r1, #1
mov r6, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1601
mov r3, #0
mov r6, r3
.L1601:
and r3, r6, #255
ldr r1, .L1624+28
mov r0, r3
bl __DSVERIFIER_assert_msg
b .L1602
.L1622:
ldr r3, .L1624+16
ldr r3, [r3, #16] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1623
ldr r2, [fp, #-88]
ldr r3, [fp, #-76]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r3, .L1624+16
ldr r3, [r3, #8] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r1, #1
mov r6, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1605
mov r3, #0
mov r6, r3
.L1605:
and r3, r6, #255
ldr r1, .L1624+24
mov r0, r3
bl __DSVERIFIER_assert_msg
b .L1602
.L1623:
ldr r3, .L1624+16
ldr r3, [r3, #12] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1602
mov r2, #0
ldr r3, .L1624+4
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1602
ldr r2, [fp, #-88]
ldr r3, [fp, #-76]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r4-r5}
ldr r3, .L1624+16
ldr r3, [r3] @ float
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r1, #1
mov r6, r1
mov r0, r4
mov r1, r5
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
bne .L1608
mov r3, #0
mov r6, r3
.L1608:
and r3, r6, #255
ldr r1, .L1624+20
mov r0, r3
bl __DSVERIFIER_assert_msg
.L1602:
ldr r3, [fp, #-76]
add r3, r3, #1
str r3, [fp, #-76]
sub r3, fp, #44
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-36]
str r3, [fp, #-32]
.L1598:
mov r2, #0
ldr r3, .L1624+4
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
bne .L1609
b .L1596
.L1597:
mov r0, #0
bl __DSVERIFIER_assert
.L1596:
mov r3, #0
mov sp, r7
ldr r2, .L1624
ldr r1, [r2]
ldr r2, [fp, #-24]
eors r1, r2, r1
mov r2, #0
beq .L1611
bl __stack_chk_fail
.L1611:
mov r0, r3
sub sp, fp, #20
@ sp needed
pop {r4, r5, r6, r7, fp, pc}
.L1625:
.align 2
.L1624:
.word .LC98
.word 1072693248
.word ds
.word ds+808
.word filter
.word .LC95
.word .LC96
.word .LC97
.size verify_magnitude, .-verify_magnitude
.comm plant_cbmc,3224,8
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
bl initialization
bl validation
ldr r3, .L1628
mov r2, #1
str r2, [r3]
ldr r0, .L1628+4
bl call_verification_task
mov r3, #0
mov r0, r3
pop {fp, pc}
.L1629:
.align 2
.L1628:
.word rounding_mode
.word verify_overflow
.size main, .-main
.section .rodata
.align 2
.LC99:
.ascii "\012\012*******************************************"
.ascii "*********************************\000"
.align 2
.LC100:
.ascii "* set (ds and impl) parameters to check with DSVeri"
.ascii "fier *\000"
.align 2
.LC101:
.ascii "***************************************************"
.ascii "*************************\000"
.text
.align 2
.global validation
.syntax unified
.arm
.fpu softvfp
.type validation, %function
validation:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
ldr r3, .L1634
ldr r3, [r3, #800]
cmp r3, #0
beq .L1631
ldr r3, .L1634
ldr r3, [r3, #1608]
cmp r3, #0
bne .L1632
.L1631:
ldr r0, .L1634+4
bl puts
ldr r0, .L1634+8
bl puts
ldr r0, .L1634+12
bl puts
mov r0, #0
bl __DSVERIFIER_assert
.L1632:
ldr r3, .L1634+16
mov r2, #5
str r2, [r3]
pop {fp, pc}
.L1635:
.align 2
.L1634:
.word ds
.word .LC99
.word .LC100
.word .LC101
.word X_SIZE_VALUE
.size validation, .-validation
.align 2
.global call_verification_task
.syntax unified
.arm
.fpu softvfp
.type call_verification_task, %function
call_verification_task:
@ args = 0, pretend = 0, frame = 72
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, fp, lr}
add fp, sp, #20
sub sp, sp, #72
str r0, [fp, #-88]
mov r3, #0
str r3, [fp, #-76]
mov r3, #0
strb r3, [fp, #-77]
mov r3, #0
str r3, [fp, #-72]
mov r3, #0
str r3, [fp, #-72]
b .L1637
.L1651:
ldr r2, .L1683
ldr r3, [fp, #-72]
add r3, r3, #300
add r3, r3, #3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1638
ldr r2, .L1683
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, .L1683
ldr r3, [fp, #-72]
add r3, r3, #300
add r3, r3, #3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L1683+4
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-44]
str r3, [fp, #-40]
mov r2, #0
mov r3, #0
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L1679
ldr r6, [fp, #-44]
ldr r3, [fp, #-40]
eor r7, r3, #-2147483648
b .L1642
.L1679:
sub r7, fp, #44
ldmia r7, {r6-r7}
.L1642:
str r6, [fp, #-44]
str r7, [fp, #-40]
ldr r2, .L1683
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
sub r3, fp, #44
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-36]
str r3, [fp, #-32]
ldr r2, .L1683
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r2, #0
mov r3, #0
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1643
ldrb r3, [fp, #-77] @ zero_extendqisi2
cmp r3, #0
bne .L1681
.L1643:
mov r2, #0
mov r3, #0
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1645
ldrb r3, [fp, #-77]
eor r3, r3, #1
and r3, r3, #255
cmp r3, #0
beq .L1645
mov r3, #1
strb r3, [fp, #-77]
.L1645:
bl nondet_double
mov r2, r0
mov r3, r1
ldr r0, .L1683
ldr r1, [fp, #-72]
add r1, r1, #101
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, .L1683
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1647
ldr r2, .L1683
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1647
mov r3, #1
b .L1650
.L1647:
mov r3, #0
.L1650:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
b .L1638
.L1681:
nop
.L1638:
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1637:
ldr r3, .L1683
ldr r3, [r3, #1608]
ldr r2, [fp, #-72]
cmp r2, r3
blt .L1651
mov r3, #0
str r3, [fp, #-72]
b .L1652
.L1666:
ldr r2, .L1683
ldr r3, [fp, #-72]
add r3, r3, #203
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1653
ldr r2, .L1683
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, .L1683
ldr r3, [fp, #-72]
add r3, r3, #203
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L1683+4
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-68]
str r3, [fp, #-64]
mov r2, #0
mov r3, #0
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L1680
ldr r4, [fp, #-68]
ldr r3, [fp, #-64]
eor r5, r3, #-2147483648
b .L1657
.L1680:
sub r5, fp, #68
ldmia r5, {r4-r5}
.L1657:
str r4, [fp, #-68]
str r5, [fp, #-64]
ldr r2, .L1683
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
sub r3, fp, #68
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-60]
str r3, [fp, #-56]
ldr r2, .L1683
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r2, #0
mov r3, #0
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1658
ldrb r3, [fp, #-77] @ zero_extendqisi2
cmp r3, #0
bne .L1682
.L1658:
mov r2, #0
mov r3, #0
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1660
ldrb r3, [fp, #-77]
eor r3, r3, #1
and r3, r3, #255
cmp r3, #0
beq .L1660
mov r3, #1
strb r3, [fp, #-77]
.L1660:
bl nondet_double
mov r2, r0
mov r3, r1
ldr r0, .L1683
ldr r1, [fp, #-72]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, .L1683
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #60
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1662
ldr r2, .L1683
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1662
mov r3, #1
b .L1665
.L1662:
mov r3, #0
.L1665:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
b .L1653
.L1682:
nop
.L1653:
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1652:
ldr r3, .L1683
ldr r3, [r3, #800]
ldr r2, [fp, #-72]
cmp r2, r3
blt .L1666
ldr r3, [fp, #-88]
blx r3
nop
sub sp, fp, #20
@ sp needed
pop {r4, r5, r6, r7, fp, pc}
.L1684:
.align 2
.L1683:
.word ds
.word 1079574528
.size call_verification_task, .-call_verification_task
.align 2
.global call_closedloop_verification_task
.syntax unified
.arm
.fpu softvfp
.type call_closedloop_verification_task, %function
call_closedloop_verification_task:
@ args = 0, pretend = 0, frame = 64
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, fp, lr}
add fp, sp, #20
sub sp, sp, #64
str r0, [fp, #-80]
mov r3, #0
strb r3, [fp, #-73]
mov r3, #0
str r3, [fp, #-72]
mov r3, #0
str r3, [fp, #-72]
b .L1686
.L1700:
ldr r2, .L1732
ldr r3, [fp, #-72]
add r3, r3, #300
add r3, r3, #3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1687
ldr r2, .L1732
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, .L1732
ldr r3, [fp, #-72]
add r3, r3, #300
add r3, r3, #3
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L1732+4
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-44]
str r3, [fp, #-40]
mov r2, #0
mov r3, #0
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L1728
ldr r6, [fp, #-44]
ldr r3, [fp, #-40]
eor r7, r3, #-2147483648
b .L1691
.L1728:
sub r7, fp, #44
ldmia r7, {r6-r7}
.L1691:
str r6, [fp, #-44]
str r7, [fp, #-40]
ldr r2, .L1732
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
sub r3, fp, #44
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-36]
str r3, [fp, #-32]
ldr r2, .L1732
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-28]
str r3, [fp, #-24]
mov r2, #0
mov r3, #0
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1692
ldrb r3, [fp, #-73] @ zero_extendqisi2
cmp r3, #0
bne .L1730
.L1692:
mov r2, #0
mov r3, #0
sub r1, fp, #44
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1694
ldrb r3, [fp, #-73]
eor r3, r3, #1
and r3, r3, #255
cmp r3, #0
beq .L1694
mov r3, #1
strb r3, [fp, #-73]
.L1694:
bl nondet_double
mov r2, r0
mov r3, r1
ldr r0, .L1732
ldr r1, [fp, #-72]
add r1, r1, #101
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, .L1732
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1696
ldr r2, .L1732
ldr r3, [fp, #-72]
add r3, r3, #101
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #28
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1696
mov r3, #1
b .L1699
.L1696:
mov r3, #0
.L1699:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
b .L1687
.L1730:
nop
.L1687:
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1686:
ldr r3, .L1732
ldr r3, [r3, #1608]
ldr r2, [fp, #-72]
cmp r2, r3
blt .L1700
mov r3, #0
str r3, [fp, #-72]
b .L1701
.L1715:
ldr r2, .L1732
ldr r3, [fp, #-72]
add r3, r3, #203
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpgt
mov r3, r0
cmp r3, #0
beq .L1702
ldr r2, .L1732
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
ldr r2, .L1732
ldr r3, [fp, #-72]
add r3, r3, #203
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L1732+4
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [fp, #-68]
str r3, [fp, #-64]
mov r2, #0
mov r3, #0
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
mov r3, r0
cmp r3, #0
beq .L1729
ldr r4, [fp, #-68]
ldr r3, [fp, #-64]
eor r5, r3, #-2147483648
b .L1706
.L1729:
sub r5, fp, #68
ldmia r5, {r4-r5}
.L1706:
str r4, [fp, #-68]
str r5, [fp, #-64]
ldr r2, .L1732
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r0-r1}
sub r3, fp, #68
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
str r2, [fp, #-60]
str r3, [fp, #-56]
ldr r2, .L1732
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r2, #0
mov r3, #0
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1707
ldrb r3, [fp, #-73] @ zero_extendqisi2
cmp r3, #0
bne .L1731
.L1707:
mov r2, #0
mov r3, #0
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dcmpeq
mov r3, r0
cmp r3, #0
beq .L1709
ldrb r3, [fp, #-73]
eor r3, r3, #1
and r3, r3, #255
cmp r3, #0
beq .L1709
mov r3, #1
strb r3, [fp, #-73]
.L1709:
bl nondet_double
mov r2, r0
mov r3, r1
ldr r0, .L1732
ldr r1, [fp, #-72]
lsl r1, r1, #3
add r1, r0, r1
stm r1, {r2-r3}
ldr r2, .L1732
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #60
ldmia r1, {r0-r1}
bl __aeabi_dcmple
mov r3, r0
cmp r3, #0
beq .L1711
ldr r2, .L1732
ldr r3, [fp, #-72]
lsl r3, r3, #3
add r3, r2, r3
ldmia r3, {r2-r3}
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
beq .L1711
mov r3, #1
b .L1714
.L1711:
mov r3, #0
.L1714:
and r3, r3, #1
and r3, r3, #255
mov r0, r3
bl __DSVERIFIER_assume
b .L1702
.L1731:
nop
.L1702:
ldr r3, [fp, #-72]
add r3, r3, #1
str r3, [fp, #-72]
.L1701:
ldr r3, .L1732
ldr r3, [r3, #800]
ldr r2, [fp, #-72]
cmp r2, r3
blt .L1715
ldr r3, [fp, #-80]
blx r3
nop
sub sp, fp, #20
@ sp needed
pop {r4, r5, r6, r7, fp, pc}
.L1733:
.align 2
.L1732:
.word plant
.word 1079574528
.size call_closedloop_verification_task, .-call_closedloop_verification_task
.global ds
.data
.align 3
.type ds, %object
.size ds, 3224
ds:
.word 0
.word 1072693248
.word 0
.word -1074790400
.space 784
.word 2
.space 4
.word 2576980378
.word 1069128089
.word 2576980378
.word -1078355559
.space 784
.word 2
.space 4
.word 1202590843
.word 1066695393
.space 1600
.global impl
.align 3
.type impl, %object
.size impl, 56
impl:
.word 8
.word 8
.word 0
.word 1072693248
.word 0
.word -1074790400
.space 32
.section .rodata
.align 2
.type __PRETTY_FUNCTION__.5216, %object
.size __PRETTY_FUNCTION__.5216, 20
__PRETTY_FUNCTION__.5216:
.ascii "__DSVERIFIER_assert\000"
.align 2
.type __PRETTY_FUNCTION__.5221, %object
.size __PRETTY_FUNCTION__.5221, 24
__PRETTY_FUNCTION__.5221:
.ascii "__DSVERIFIER_assert_msg\000"
.align 2
.type __PRETTY_FUNCTION__.5564, %object
.size __PRETTY_FUNCTION__.5564, 26
__PRETTY_FUNCTION__.5564:
.ascii "double_check_oscillations\000"
.align 2
.type __PRETTY_FUNCTION__.6126, %object
.size __PRETTY_FUNCTION__.6126, 12
__PRETTY_FUNCTION__.6126:
.ascii "snrVariance\000"
.align 2
.type __PRETTY_FUNCTION__.6139, %object
.size __PRETTY_FUNCTION__.6139, 9
__PRETTY_FUNCTION__.6139:
.ascii "snrPower\000"
.align 2
.type __PRETTY_FUNCTION__.6149, %object
.size __PRETTY_FUNCTION__.6149, 9
__PRETTY_FUNCTION__.6149:
.ascii "snrPoint\000"
.align 2
.type __PRETTY_FUNCTION__.6181, %object
.size __PRETTY_FUNCTION__.6181, 13
__PRETTY_FUNCTION__.6181:
.ascii "iirIIOutTime\000"
.align 2
.type __PRETTY_FUNCTION__.6199, %object
.size __PRETTY_FUNCTION__.6199, 14
__PRETTY_FUNCTION__.6199:
.ascii "iirIItOutTime\000"
.align 2
.type __PRETTY_FUNCTION__.6217, %object
.size __PRETTY_FUNCTION__.6217, 21
__PRETTY_FUNCTION__.6217:
.ascii "iirIItOutTime_double\000"
.align 2
.type __PRETTY_FUNCTION__.6554, %object
.size __PRETTY_FUNCTION__.6554, 28
__PRETTY_FUNCTION__.6554:
.ascii "double_direct_form_1_MSP430\000"
.align 2
.type __PRETTY_FUNCTION__.6576, %object
.size __PRETTY_FUNCTION__.6576, 28
__PRETTY_FUNCTION__.6576:
.ascii "double_direct_form_2_MSP430\000"
.align 2
.type __PRETTY_FUNCTION__.6594, %object
.size __PRETTY_FUNCTION__.6594, 39
__PRETTY_FUNCTION__.6594:
.ascii "double_transposed_direct_form_2_MSP430\000"
.align 2
.type __PRETTY_FUNCTION__.6844, %object
.size __PRETTY_FUNCTION__.6844, 15
__PRETTY_FUNCTION__.6844:
.ascii "initialization\000"
.align 2
.type __PRETTY_FUNCTION__.7103, %object
.size __PRETTY_FUNCTION__.7103, 31
__PRETTY_FUNCTION__.7103:
.ascii "verify_limit_cycle_state_space\000"
.align 2
.type __PRETTY_FUNCTION__.7203, %object
.size __PRETTY_FUNCTION__.7203, 30
__PRETTY_FUNCTION__.7203:
.ascii "verify_zero_input_limit_cycle\000"
.align 2
.type __PRETTY_FUNCTION__.7273, %object
.size __PRETTY_FUNCTION__.7273, 22
__PRETTY_FUNCTION__.7273:
.ascii "verify_generic_timing\000"
.align 2
.type __PRETTY_FUNCTION__.7321, %object
.size __PRETTY_FUNCTION__.7321, 17
__PRETTY_FUNCTION__.7321:
.ascii "verify_stability\000"
.align 2
.type __PRETTY_FUNCTION__.7688, %object
.size __PRETTY_FUNCTION__.7688, 25
__PRETTY_FUNCTION__.7688:
.ascii "verify_error_state_space\000"
.align 2
.type __PRETTY_FUNCTION__.7770, %object
.size __PRETTY_FUNCTION__.7770, 26
__PRETTY_FUNCTION__.7770:
.ascii "verify_safety_state_space\000"
.align 2
.type __PRETTY_FUNCTION__.7825, %object
.size __PRETTY_FUNCTION__.7825, 23
__PRETTY_FUNCTION__.7825:
.ascii "verify_controllability\000"
.align 2
.type __PRETTY_FUNCTION__.7865, %object
.size __PRETTY_FUNCTION__.7865, 30
__PRETTY_FUNCTION__.7865:
.ascii "verify_controllability_double\000"
.align 2
.type __PRETTY_FUNCTION__.7926, %object
.size __PRETTY_FUNCTION__.7926, 21
__PRETTY_FUNCTION__.7926:
.ascii "verify_observability\000"
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "548400.c"
.intel_syntax noprefix
.text
.globl getDepthAndParent
.type getDepthAndParent, @function
getDepthAndParent:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -44[rbp], esi
mov DWORD PTR -48[rbp], edx
mov QWORD PTR -56[rbp], rcx
mov QWORD PTR -64[rbp], r8
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
cmp QWORD PTR -40[rbp], 0
jne .L2
mov rax, QWORD PTR -56[rbp]
mov DWORD PTR [rax], -1
mov rax, QWORD PTR -64[rbp]
mov DWORD PTR [rax], 0
jmp .L1
.L2:
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR [rax]
cmp DWORD PTR -44[rbp], eax
jne .L4
mov rax, QWORD PTR -56[rbp]
mov DWORD PTR [rax], 0
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR -48[rbp]
mov DWORD PTR [rax], edx
jmp .L1
.L4:
mov rax, QWORD PTR -40[rbp]
mov edx, DWORD PTR [rax]
mov rax, QWORD PTR -40[rbp]
mov rax, QWORD PTR 8[rax]
lea rdi, -16[rbp]
lea rcx, -24[rbp]
mov esi, DWORD PTR -44[rbp]
mov r8, rdi
mov rdi, rax
call getDepthAndParent
mov rax, QWORD PTR -40[rbp]
mov edx, DWORD PTR [rax]
mov rax, QWORD PTR -40[rbp]
mov rax, QWORD PTR 16[rax]
lea rdi, -12[rbp]
lea rcx, -20[rbp]
mov esi, DWORD PTR -44[rbp]
mov r8, rdi
mov rdi, rax
call getDepthAndParent
mov eax, DWORD PTR -16[rbp]
test eax, eax
je .L5
mov eax, DWORD PTR -24[rbp]
lea edx, 1[rax]
mov rax, QWORD PTR -56[rbp]
mov DWORD PTR [rax], edx
mov edx, DWORD PTR -16[rbp]
mov rax, QWORD PTR -64[rbp]
mov DWORD PTR [rax], edx
jmp .L1
.L5:
mov eax, DWORD PTR -12[rbp]
test eax, eax
je .L6
mov eax, DWORD PTR -20[rbp]
lea edx, 1[rax]
mov rax, QWORD PTR -56[rbp]
mov DWORD PTR [rax], edx
mov edx, DWORD PTR -12[rbp]
mov rax, QWORD PTR -64[rbp]
mov DWORD PTR [rax], edx
jmp .L1
.L6:
mov rax, QWORD PTR -56[rbp]
mov DWORD PTR [rax], -1
mov rax, QWORD PTR -64[rbp]
mov DWORD PTR [rax], 0
nop
.L1:
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L8
call __stack_chk_fail@PLT
.L8:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size getDepthAndParent, .-getDepthAndParent
.globl isCousins
.type isCousins, @function
isCousins:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -44[rbp], esi
mov DWORD PTR -48[rbp], edx
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rcx, -16[rbp]
lea rdx, -24[rbp]
mov esi, DWORD PTR -44[rbp]
mov rax, QWORD PTR -40[rbp]
mov r8, rcx
mov rcx, rdx
mov edx, 0
mov rdi, rax
call getDepthAndParent
lea rcx, -12[rbp]
lea rdx, -20[rbp]
mov esi, DWORD PTR -48[rbp]
mov rax, QWORD PTR -40[rbp]
mov r8, rcx
mov rcx, rdx
mov edx, 0
mov rdi, rax
call getDepthAndParent
mov edx, DWORD PTR -24[rbp]
mov eax, DWORD PTR -20[rbp]
cmp edx, eax
jne .L10
mov edx, DWORD PTR -16[rbp]
mov eax, DWORD PTR -12[rbp]
cmp edx, eax
je .L10
mov eax, 1
jmp .L11
.L10:
mov eax, 0
.L11:
and eax, 1
mov rdi, QWORD PTR -8[rbp]
sub rdi, QWORD PTR fs:40
je .L13
call __stack_chk_fail@PLT
.L13:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size isCousins, .-isCousins
.section .rodata
.LC0:
.string "is cousins"
.LC1:
.string "is not cousins"
.text
.globl main
.type main, @function
main:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 176
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -160[rbp], 1
mov DWORD PTR -128[rbp], 2
mov DWORD PTR -96[rbp], 3
mov DWORD PTR -64[rbp], 4
mov DWORD PTR -32[rbp], 5
lea rax, -128[rbp]
mov QWORD PTR -152[rbp], rax
lea rax, -96[rbp]
mov QWORD PTR -144[rbp], rax
mov QWORD PTR -120[rbp], 0
lea rax, -64[rbp]
mov QWORD PTR -112[rbp], rax
mov QWORD PTR -88[rbp], 0
lea rax, -32[rbp]
mov QWORD PTR -80[rbp], rax
mov QWORD PTR -56[rbp], 0
mov QWORD PTR -48[rbp], 0
mov QWORD PTR -24[rbp], 0
mov QWORD PTR -16[rbp], 0
lea rax, -160[rbp]
mov edx, 5
mov esi, 4
mov rdi, rax
call isCousins
mov BYTE PTR -161[rbp], al
cmp BYTE PTR -161[rbp], 0
je .L15
lea rdi, .LC0[rip]
call puts@PLT
jmp .L16
.L15:
lea rdi, .LC1[rip]
call puts@PLT
.L16:
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L18
call __stack_chk_fail@PLT
.L18:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "548400.c"
.text
.section .rodata
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global getDepthAndParent
.syntax unified
.arm
.fpu softvfp
.type getDepthAndParent, %function
getDepthAndParent:
@ args = 4, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #56
str r0, [fp, #-32]
str r1, [fp, #-36]
str r2, [fp, #-40]
str r3, [fp, #-44]
ldr r3, [fp, #4]
str r3, [fp, #-48]
ldr r3, .L9
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, [fp, #-32]
cmp r3, #0
bne .L2
ldr r3, [fp, #-44]
mvn r2, #0
str r2, [r3]
ldr r3, [fp, #-48]
mov r2, #0
str r2, [r3]
b .L1
.L2:
ldr r3, [fp, #-32]
ldr r3, [r3]
ldr r2, [fp, #-36]
cmp r2, r3
bne .L4
ldr r3, [fp, #-44]
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-48]
ldr r2, [fp, #-40]
str r2, [r3]
b .L1
.L4:
ldr r3, [fp, #-32]
ldr r0, [r3, #4]
ldr r3, [fp, #-32]
ldr r2, [r3]
sub r1, fp, #24
sub r3, fp, #16
str r3, [sp]
mov r3, r1
ldr r1, [fp, #-36]
bl getDepthAndParent
ldr r3, [fp, #-32]
ldr r0, [r3, #8]
ldr r3, [fp, #-32]
ldr r2, [r3]
sub r1, fp, #20
sub r3, fp, #12
str r3, [sp]
mov r3, r1
ldr r1, [fp, #-36]
bl getDepthAndParent
ldr r3, [fp, #-16]
cmp r3, #0
beq .L5
ldr r3, [fp, #-24]
add r2, r3, #1
ldr r3, [fp, #-44]
str r2, [r3]
ldr r2, [fp, #-16]
ldr r3, [fp, #-48]
str r2, [r3]
b .L1
.L5:
ldr r3, [fp, #-12]
cmp r3, #0
beq .L6
ldr r3, [fp, #-20]
add r2, r3, #1
ldr r3, [fp, #-44]
str r2, [r3]
ldr r2, [fp, #-12]
ldr r3, [fp, #-48]
str r2, [r3]
b .L1
.L6:
ldr r3, [fp, #-44]
mvn r2, #0
str r2, [r3]
ldr r3, [fp, #-48]
mov r2, #0
str r2, [r3]
nop
.L1:
ldr r3, .L9
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L8
bl __stack_chk_fail
.L8:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L10:
.align 2
.L9:
.word .LC0
.size getDepthAndParent, .-getDepthAndParent
.section .rodata
.align 2
.LC1:
.word __stack_chk_guard
.text
.align 2
.global isCousins
.syntax unified
.arm
.fpu softvfp
.type isCousins, %function
isCousins:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-32]
str r1, [fp, #-36]
str r2, [fp, #-40]
ldr r3, .L16
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r2, fp, #24
sub r3, fp, #16
str r3, [sp]
mov r3, r2
mov r2, #0
ldr r1, [fp, #-36]
ldr r0, [fp, #-32]
bl getDepthAndParent
sub r2, fp, #20
sub r3, fp, #12
str r3, [sp]
mov r3, r2
mov r2, #0
ldr r1, [fp, #-40]
ldr r0, [fp, #-32]
bl getDepthAndParent
ldr r2, [fp, #-24]
ldr r3, [fp, #-20]
cmp r2, r3
bne .L12
ldr r2, [fp, #-16]
ldr r3, [fp, #-12]
cmp r2, r3
beq .L12
mov r3, #1
b .L13
.L12:
mov r3, #0
.L13:
and r3, r3, #1
and r3, r3, #255
ldr r2, .L16
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L15
bl __stack_chk_fail
.L15:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L17:
.align 2
.L16:
.word .LC1
.size isCousins, .-isCousins
.section .rodata
.align 2
.LC2:
.ascii "is cousins\000"
.align 2
.LC3:
.ascii "is not cousins\000"
.align 2
.LC4:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 72
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #72
ldr r3, .L23
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #1
str r3, [fp, #-68]
mov r3, #2
str r3, [fp, #-56]
mov r3, #3
str r3, [fp, #-44]
mov r3, #4
str r3, [fp, #-32]
mov r3, #5
str r3, [fp, #-20]
sub r3, fp, #56
str r3, [fp, #-64]
sub r3, fp, #44
str r3, [fp, #-60]
mov r3, #0
str r3, [fp, #-52]
sub r3, fp, #32
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-40]
sub r3, fp, #20
str r3, [fp, #-36]
mov r3, #0
str r3, [fp, #-28]
mov r3, #0
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-12]
sub r3, fp, #68
mov r2, #5
mov r1, #4
mov r0, r3
bl isCousins
mov r3, r0
strb r3, [fp, #-69]
ldrb r3, [fp, #-69] @ zero_extendqisi2
cmp r3, #0
beq .L19
ldr r0, .L23+4
bl puts
b .L20
.L19:
ldr r0, .L23+8
bl puts
.L20:
mov r3, #0
ldr r2, .L23
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L22
bl __stack_chk_fail
.L22:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L24:
.align 2
.L23:
.word .LC4
.word .LC2
.word .LC3
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "848363.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "fs"
.section .data.rel.local,"aw"
.align 32
.type fs_vfs, @object
.size fs_vfs, 184
fs_vfs:
.long 1
.long 0
.long 0
.zero 4
.quad 0
.quad .LC0
.quad 0
.quad fsOpen
.quad fsDelete
.quad fsAccess
.quad fsFullPathname
.quad fsDlOpen
.quad fsDlError
.quad fsDlSym
.quad fsDlClose
.quad fsRandomness
.quad fsSleep
.quad fsCurrentTime
.quad 0
.zero 32
.quad 0
.quad 0
.align 32
.type fs_io_methods, @object
.size fs_io_methods, 152
fs_io_methods:
.long 1
.zero 4
.quad fsClose
.quad fsRead
.quad fsWrite
.quad fsTruncate
.quad fsSync
.quad fsFileSize
.quad fsLock
.quad fsUnlock
.quad fsCheckReservedLock
.quad fsFileControl
.quad fsSectorSize
.quad fsDeviceCharacteristics
.quad 0
.quad 0
.quad 0
.quad 0
.zero 16
.align 32
.type tmp_io_methods, @object
.size tmp_io_methods, 152
tmp_io_methods:
.long 1
.zero 4
.quad tmpClose
.quad tmpRead
.quad tmpWrite
.quad tmpTruncate
.quad tmpSync
.quad tmpFileSize
.quad tmpLock
.quad tmpUnlock
.quad tmpCheckReservedLock
.quad tmpFileControl
.quad tmpSectorSize
.quad tmpDeviceCharacteristics
.quad 0
.quad 0
.quad 0
.quad 0
.zero 16
.text
.type tmpClose, @function
tmpClose:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 16[rax]
mov rdi, rax
call sqlite3_free@PLT
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size tmpClose, .-tmpClose
.type tmpRead, @function
tmpRead:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov QWORD PTR -48[rbp], rcx
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -8[rbp], rax
mov eax, DWORD PTR -36[rbp]
movsx rdx, eax
mov rax, QWORD PTR -48[rbp]
add rdx, rax
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 8[rax]
cdqe
cmp rdx, rax
jle .L4
mov eax, 522
jmp .L5
.L4:
mov eax, DWORD PTR -36[rbp]
movsx rdx, eax
mov rax, QWORD PTR -8[rbp]
mov rcx, QWORD PTR 16[rax]
mov rax, QWORD PTR -48[rbp]
add rcx, rax
mov rax, QWORD PTR -32[rbp]
mov rsi, rcx
mov rdi, rax
call memcpy@PLT
mov eax, 0
.L5:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size tmpRead, .-tmpRead
.type tmpWrite, @function
tmpWrite:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov DWORD PTR -52[rbp], edx
mov QWORD PTR -64[rbp], rcx
mov rax, QWORD PTR -40[rbp]
mov QWORD PTR -16[rbp], rax
mov eax, DWORD PTR -52[rbp]
movsx rdx, eax
mov rax, QWORD PTR -64[rbp]
add rdx, rax
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR 12[rax]
cdqe
cmp rdx, rax
jle .L7
mov eax, DWORD PTR -52[rbp]
movsx rdx, eax
mov rax, QWORD PTR -64[rbp]
add rdx, rax
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR 12[rax]
cdqe
add rax, rdx
add eax, eax
mov DWORD PTR -20[rbp], eax
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 16[rax]
mov edx, DWORD PTR -20[rbp]
mov esi, edx
mov rdi, rax
call sqlite3_realloc@PLT
mov QWORD PTR -8[rbp], rax
cmp QWORD PTR -8[rbp], 0
jne .L8
mov eax, 7
jmp .L9
.L8:
mov rax, QWORD PTR -16[rbp]
mov rdx, QWORD PTR -8[rbp]
mov QWORD PTR 16[rax], rdx
mov rax, QWORD PTR -16[rbp]
mov edx, DWORD PTR -20[rbp]
mov DWORD PTR 12[rax], edx
.L7:
mov eax, DWORD PTR -52[rbp]
movsx rdx, eax
mov rax, QWORD PTR -16[rbp]
mov rcx, QWORD PTR 16[rax]
mov rax, QWORD PTR -64[rbp]
add rcx, rax
mov rax, QWORD PTR -48[rbp]
mov rsi, rax
mov rdi, rcx
call memcpy@PLT
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR 8[rax]
cdqe
mov edx, DWORD PTR -52[rbp]
movsx rcx, edx
mov rdx, QWORD PTR -64[rbp]
add rdx, rcx
cmp rax, rdx
jle .L10
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR 8[rax]
jmp .L11
.L10:
mov rax, QWORD PTR -64[rbp]
mov edx, eax
mov eax, DWORD PTR -52[rbp]
add eax, edx
.L11:
mov rdx, QWORD PTR -16[rbp]
mov DWORD PTR 8[rdx], eax
mov eax, 0
.L9:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size tmpWrite, .-tmpWrite
.type tmpTruncate, @function
tmpTruncate:
.LFB3:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 8[rax]
cdqe
cmp QWORD PTR -32[rbp], rax
jle .L13
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 8[rax]
jmp .L14
.L13:
mov rax, QWORD PTR -32[rbp]
.L14:
mov rdx, QWORD PTR -8[rbp]
mov DWORD PTR 8[rdx], eax
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE3:
.size tmpTruncate, .-tmpTruncate
.type tmpSync, @function
tmpSync:
.LFB4:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov DWORD PTR -12[rbp], esi
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE4:
.size tmpSync, .-tmpSync
.type tmpFileSize, @function
tmpFileSize:
.LFB5:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 8[rax]
movsx rdx, eax
mov rax, QWORD PTR -32[rbp]
mov QWORD PTR [rax], rdx
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE5:
.size tmpFileSize, .-tmpFileSize
.type tmpLock, @function
tmpLock:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov DWORD PTR -12[rbp], esi
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size tmpLock, .-tmpLock
.type tmpUnlock, @function
tmpUnlock:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov DWORD PTR -12[rbp], esi
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size tmpUnlock, .-tmpUnlock
.type tmpCheckReservedLock, @function
tmpCheckReservedLock:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR [rax], 0
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size tmpCheckReservedLock, .-tmpCheckReservedLock
.type tmpFileControl, @function
tmpFileControl:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov DWORD PTR -12[rbp], esi
mov QWORD PTR -24[rbp], rdx
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size tmpFileControl, .-tmpFileControl
.type tmpSectorSize, @function
tmpSectorSize:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size tmpSectorSize, .-tmpSectorSize
.type tmpDeviceCharacteristics, @function
tmpDeviceCharacteristics:
.LFB11:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE11:
.size tmpDeviceCharacteristics, .-tmpDeviceCharacteristics
.section .rodata
.LC1:
.string "the_stack_data/848363.c"
.LC2:
.string "pReal->nRef>=0"
.text
.type fsClose, @function
fsClose:
.LFB12:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -20[rbp], 0
mov rax, QWORD PTR -40[rbp]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 16[rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 28[rax]
lea edx, -1[rax]
mov rax, QWORD PTR -8[rbp]
mov DWORD PTR 28[rax], edx
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 28[rax]
test eax, eax
jns .L33
lea rcx, __PRETTY_FUNCTION__.2[rip]
mov edx, 382
lea rsi, .LC1[rip]
lea rdi, .LC2[rip]
call __assert_fail@PLT
.L33:
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 28[rax]
test eax, eax
jne .L34
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 40[rax]
mov rdx, QWORD PTR -8[rbp]
mov rdx, QWORD PTR 32[rdx]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 32[rax]
test rax, rax
je .L35
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 32[rax]
mov rdx, QWORD PTR -8[rbp]
mov rdx, QWORD PTR 40[rdx]
mov QWORD PTR 40[rax], rdx
.L35:
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR [rax]
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR 8[rax]
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR [rax]
mov rdi, rax
call rdx
mov DWORD PTR -20[rbp], eax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call sqlite3_free@PLT
.L34:
mov eax, DWORD PTR -20[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE12:
.size fsClose, .-fsClose
.type fsRead, @function
fsRead:
.LFB13:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov DWORD PTR -68[rbp], edx
mov QWORD PTR -80[rbp], rcx
mov DWORD PTR -48[rbp], 0
mov rax, QWORD PTR -56[rbp]
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 16[rax]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR [rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -24[rbp]
mov eax, DWORD PTR 8[rax]
cmp eax, 1
jne .L38
mov eax, DWORD PTR -68[rbp]
movsx rdx, eax
mov rax, QWORD PTR -80[rbp]
add rdx, rax
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR 16[rax]
cdqe
cmp rdx, rax
jg .L39
.L38:
mov rax, QWORD PTR -24[rbp]
mov eax, DWORD PTR 8[rax]
cmp eax, 2
jne .L40
mov eax, DWORD PTR -68[rbp]
movsx rdx, eax
mov rax, QWORD PTR -80[rbp]
add rdx, rax
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR 20[rax]
cdqe
cmp rdx, rax
jle .L40
.L39:
mov DWORD PTR -48[rbp], 522
jmp .L41
.L40:
mov rax, QWORD PTR -24[rbp]
mov eax, DWORD PTR 8[rax]
cmp eax, 1
jne .L42
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR [rax]
mov r8, QWORD PTR 16[rax]
mov rax, QWORD PTR -80[rbp]
lea rcx, 512[rax]
mov edx, DWORD PTR -68[rbp]
mov rsi, QWORD PTR -64[rbp]
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call r8
mov DWORD PTR -48[rbp], eax
jmp .L41
.L42:
mov eax, DWORD PTR -68[rbp]
mov DWORD PTR -44[rbp], eax
mov DWORD PTR -40[rbp], 0
mov rax, QWORD PTR -80[rbp]
mov DWORD PTR -36[rbp], eax
jmp .L43
.L44:
mov rax, QWORD PTR -16[rbp]
mov edx, DWORD PTR 24[rax]
mov eax, DWORD PTR -36[rbp]
lea ecx, 511[rax]
test eax, eax
cmovs eax, ecx
sar eax, 9
add eax, 1
sal eax, 9
mov ecx, edx
sub ecx, eax
mov eax, DWORD PTR -36[rbp]
cdq
shr edx, 23
add eax, edx
and eax, 511
sub eax, edx
add eax, ecx
mov DWORD PTR -32[rbp], eax
mov eax, DWORD PTR -32[rbp]
cdq
shr edx, 23
add eax, edx
and eax, 511
sub eax, edx
mov edx, eax
mov eax, 512
sub eax, edx
cmp DWORD PTR -44[rbp], eax
cmovle eax, DWORD PTR -44[rbp]
mov DWORD PTR -28[rbp], eax
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR [rax]
mov r8, QWORD PTR 16[rax]
mov eax, DWORD PTR -32[rbp]
movsx rcx, eax
mov eax, DWORD PTR -40[rbp]
movsx rdx, eax
mov rax, QWORD PTR -64[rbp]
lea rsi, [rdx+rax]
mov edx, DWORD PTR -28[rbp]
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call r8
mov DWORD PTR -48[rbp], eax
mov eax, DWORD PTR -28[rbp]
add DWORD PTR -36[rbp], eax
mov eax, DWORD PTR -28[rbp]
add DWORD PTR -40[rbp], eax
mov eax, DWORD PTR -28[rbp]
sub DWORD PTR -44[rbp], eax
.L43:
cmp DWORD PTR -44[rbp], 0
jle .L41
cmp DWORD PTR -48[rbp], 0
je .L44
.L41:
mov eax, DWORD PTR -48[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE13:
.size fsRead, .-fsRead
.type fsWrite, @function
fsWrite:
.LFB14:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov DWORD PTR -68[rbp], edx
mov QWORD PTR -80[rbp], rcx
mov DWORD PTR -48[rbp], 0
mov rax, QWORD PTR -56[rbp]
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 16[rax]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR [rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -24[rbp]
mov eax, DWORD PTR 8[rax]
cmp eax, 1
jne .L47
mov eax, DWORD PTR -68[rbp]
movsx rdx, eax
mov rax, QWORD PTR -80[rbp]
add rax, rdx
lea rcx, 511[rax]
mov rax, QWORD PTR -16[rbp]
mov edx, DWORD PTR 24[rax]
mov rax, QWORD PTR -16[rbp]
mov esi, DWORD PTR 20[rax]
mov eax, edx
sub eax, esi
cdqe
cmp rcx, rax
jl .L48
mov DWORD PTR -48[rbp], 13
jmp .L49
.L48:
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR [rax]
mov r8, QWORD PTR 24[rax]
mov rax, QWORD PTR -80[rbp]
lea rcx, 512[rax]
mov edx, DWORD PTR -68[rbp]
mov rsi, QWORD PTR -64[rbp]
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call r8
mov DWORD PTR -48[rbp], eax
cmp DWORD PTR -48[rbp], 0
jne .L49
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR 16[rax]
cdqe
mov edx, DWORD PTR -68[rbp]
movsx rcx, edx
mov rdx, QWORD PTR -80[rbp]
add rdx, rcx
cmp rax, rdx
jle .L50
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR 16[rax]
jmp .L51
.L50:
mov rax, QWORD PTR -80[rbp]
mov edx, eax
mov eax, DWORD PTR -68[rbp]
add eax, edx
.L51:
mov rdx, QWORD PTR -16[rbp]
mov DWORD PTR 16[rdx], eax
jmp .L49
.L47:
mov eax, DWORD PTR -68[rbp]
mov DWORD PTR -44[rbp], eax
mov DWORD PTR -40[rbp], 0
mov rax, QWORD PTR -80[rbp]
mov DWORD PTR -36[rbp], eax
jmp .L52
.L55:
mov rax, QWORD PTR -16[rbp]
mov edx, DWORD PTR 24[rax]
mov eax, DWORD PTR -36[rbp]
lea ecx, 511[rax]
test eax, eax
cmovs eax, ecx
sar eax, 9
add eax, 1
sal eax, 9
mov ecx, edx
sub ecx, eax
mov eax, DWORD PTR -36[rbp]
cdq
shr edx, 23
add eax, edx
and eax, 511
sub eax, edx
add eax, ecx
mov DWORD PTR -32[rbp], eax
mov eax, DWORD PTR -32[rbp]
cdq
shr edx, 23
add eax, edx
and eax, 511
sub eax, edx
mov edx, eax
mov eax, 512
sub eax, edx
cmp DWORD PTR -44[rbp], eax
cmovle eax, DWORD PTR -44[rbp]
mov DWORD PTR -28[rbp], eax
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR 16[rax]
add eax, 511
cmp DWORD PTR -32[rbp], eax
jg .L53
mov DWORD PTR -48[rbp], 13
jmp .L52
.L53:
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR [rax]
mov r8, QWORD PTR 24[rax]
mov eax, DWORD PTR -32[rbp]
movsx rcx, eax
mov eax, DWORD PTR -40[rbp]
movsx rdx, eax
mov rax, QWORD PTR -64[rbp]
lea rsi, [rdx+rax]
mov edx, DWORD PTR -28[rbp]
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call r8
mov DWORD PTR -48[rbp], eax
mov eax, DWORD PTR -28[rbp]
add DWORD PTR -36[rbp], eax
mov eax, DWORD PTR -28[rbp]
add DWORD PTR -40[rbp], eax
mov eax, DWORD PTR -28[rbp]
sub DWORD PTR -44[rbp], eax
.L52:
cmp DWORD PTR -44[rbp], 0
jle .L54
cmp DWORD PTR -48[rbp], 0
je .L55
.L54:
cmp DWORD PTR -48[rbp], 0
jne .L49
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR 20[rax]
cdqe
mov edx, DWORD PTR -68[rbp]
movsx rcx, edx
mov rdx, QWORD PTR -80[rbp]
add rdx, rcx
cmp rax, rdx
jle .L56
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR 20[rax]
jmp .L57
.L56:
mov rax, QWORD PTR -80[rbp]
mov edx, eax
mov eax, DWORD PTR -68[rbp]
add eax, edx
.L57:
mov rdx, QWORD PTR -16[rbp]
mov DWORD PTR 20[rdx], eax
.L49:
mov eax, DWORD PTR -48[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE14:
.size fsWrite, .-fsWrite
.type fsTruncate, @function
fsTruncate:
.LFB15:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 16[rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR 8[rax]
cmp eax, 1
jne .L60
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 16[rax]
cdqe
cmp QWORD PTR -32[rbp], rax
jle .L61
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 16[rax]
jmp .L62
.L61:
mov rax, QWORD PTR -32[rbp]
.L62:
mov rdx, QWORD PTR -8[rbp]
mov DWORD PTR 16[rdx], eax
jmp .L63
.L60:
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 20[rax]
cdqe
cmp QWORD PTR -32[rbp], rax
jle .L64
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 20[rax]
jmp .L65
.L64:
mov rax, QWORD PTR -32[rbp]
.L65:
mov rdx, QWORD PTR -8[rbp]
mov DWORD PTR 20[rdx], eax
.L63:
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE15:
.size fsTruncate, .-fsTruncate
.type fsSync, @function
fsSync:
.LFB16:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov QWORD PTR -56[rbp], rdi
mov DWORD PTR -60[rbp], esi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rax, QWORD PTR -56[rbp]
mov QWORD PTR -40[rbp], rax
mov rax, QWORD PTR -40[rbp]
mov rax, QWORD PTR 16[rax]
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -32[rbp]
mov rax, QWORD PTR [rax]
mov QWORD PTR -24[rbp], rax
mov DWORD PTR -44[rbp], 0
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR 8[rax]
cmp eax, 1
jne .L68
mov rax, QWORD PTR -32[rbp]
mov eax, DWORD PTR 16[rax]
shr eax, 24
mov BYTE PTR -12[rbp], al
mov rax, QWORD PTR -32[rbp]
mov eax, DWORD PTR 16[rax]
sar eax, 16
mov BYTE PTR -11[rbp], al
mov rax, QWORD PTR -32[rbp]
mov eax, DWORD PTR 16[rax]
sar eax, 8
mov BYTE PTR -10[rbp], al
mov rax, QWORD PTR -32[rbp]
mov eax, DWORD PTR 16[rax]
mov BYTE PTR -9[rbp], al
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR [rax]
mov r8, QWORD PTR 24[rax]
lea rsi, -12[rbp]
mov rax, QWORD PTR -24[rbp]
mov ecx, 0
mov edx, 4
mov rdi, rax
call r8
mov DWORD PTR -44[rbp], eax
.L68:
cmp DWORD PTR -44[rbp], 0
jne .L69
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR 40[rax]
mov eax, DWORD PTR -60[rbp]
and eax, -17
mov ecx, eax
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call rdx
mov DWORD PTR -44[rbp], eax
.L69:
mov eax, DWORD PTR -44[rbp]
mov rdx, QWORD PTR -8[rbp]
sub rdx, QWORD PTR fs:40
je .L71
call __stack_chk_fail@PLT
.L71:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE16:
.size fsSync, .-fsSync
.type fsFileSize, @function
fsFileSize:
.LFB17:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 16[rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR 8[rax]
cmp eax, 1
jne .L73
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 16[rax]
movsx rdx, eax
mov rax, QWORD PTR -32[rbp]
mov QWORD PTR [rax], rdx
jmp .L74
.L73:
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR 20[rax]
movsx rdx, eax
mov rax, QWORD PTR -32[rbp]
mov QWORD PTR [rax], rdx
.L74:
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE17:
.size fsFileSize, .-fsFileSize
.type fsLock, @function
fsLock:
.LFB18:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov DWORD PTR -12[rbp], esi
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE18:
.size fsLock, .-fsLock
.type fsUnlock, @function
fsUnlock:
.LFB19:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov DWORD PTR -12[rbp], esi
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE19:
.size fsUnlock, .-fsUnlock
.type fsCheckReservedLock, @function
fsCheckReservedLock:
.LFB20:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov rax, QWORD PTR -16[rbp]
mov DWORD PTR [rax], 0
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE20:
.size fsCheckReservedLock, .-fsCheckReservedLock
.type fsFileControl, @function
fsFileControl:
.LFB21:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov DWORD PTR -12[rbp], esi
mov QWORD PTR -24[rbp], rdx
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE21:
.size fsFileControl, .-fsFileControl
.type fsSectorSize, @function
fsSectorSize:
.LFB22:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov eax, 512
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE22:
.size fsSectorSize, .-fsSectorSize
.type fsDeviceCharacteristics, @function
fsDeviceCharacteristics:
.LFB23:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE23:
.size fsDeviceCharacteristics, .-fsDeviceCharacteristics
.section .rodata
.LC3:
.string "eType==DATABASE_FILE"
.LC4:
.string ""
.string ""
.text
.type fsOpen, @function
fsOpen:
.LFB24:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 144
mov QWORD PTR -104[rbp], rdi
mov QWORD PTR -112[rbp], rsi
mov QWORD PTR -120[rbp], rdx
mov DWORD PTR -124[rbp], ecx
mov QWORD PTR -136[rbp], r8
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rax, QWORD PTR -104[rbp]
mov QWORD PTR -56[rbp], rax
mov rax, QWORD PTR -120[rbp]
mov QWORD PTR -48[rbp], rax
mov QWORD PTR -64[rbp], 0
mov DWORD PTR -88[rbp], 0
mov eax, DWORD PTR -124[rbp]
and eax, 2304
test eax, eax
jne .L89
mov rax, QWORD PTR -120[rbp]
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -24[rbp]
mov edx, 24
mov esi, 0
mov rdi, rax
call memset@PLT
mov rax, QWORD PTR -24[rbp]
lea rdx, tmp_io_methods[rip]
mov QWORD PTR [rax], rdx
mov eax, 0
jmp .L90
.L89:
mov eax, DWORD PTR -124[rbp]
and eax, 256
test eax, eax
je .L91
mov eax, 1
jmp .L92
.L91:
mov eax, 2
.L92:
mov DWORD PTR -84[rbp], eax
mov rax, QWORD PTR -48[rbp]
lea rdx, fs_io_methods[rip]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -48[rbp]
mov edx, DWORD PTR -84[rbp]
mov DWORD PTR 8[rax], edx
mov rax, QWORD PTR -112[rbp]
mov rdi, rax
call strlen@PLT
cmp DWORD PTR -84[rbp], 2
jne .L93
mov edx, 8
jmp .L94
.L93:
mov edx, 0
.L94:
sub eax, edx
mov DWORD PTR -80[rbp], eax
mov rax, QWORD PTR -56[rbp]
mov rax, QWORD PTR 168[rax]
mov QWORD PTR -64[rbp], rax
jmp .L95
.L97:
mov rax, QWORD PTR -64[rbp]
mov rax, QWORD PTR 32[rax]
mov QWORD PTR -64[rbp], rax
.L95:
cmp QWORD PTR -64[rbp], 0
je .L96
mov eax, DWORD PTR -80[rbp]
movsx rdx, eax
mov rax, QWORD PTR -64[rbp]
mov rax, QWORD PTR 8[rax]
mov rcx, QWORD PTR -112[rbp]
mov rsi, rcx
mov rdi, rax
call strncmp@PLT
test eax, eax
jne .L97
.L96:
cmp QWORD PTR -64[rbp], 0
jne .L114
mov eax, DWORD PTR -124[rbp]
and ah, -4
or ah, 2
mov DWORD PTR -76[rbp], eax
mov rax, QWORD PTR -56[rbp]
mov rax, QWORD PTR 176[rax]
mov QWORD PTR -40[rbp], rax
cmp DWORD PTR -84[rbp], 1
je .L99
lea rcx, __PRETTY_FUNCTION__.1[rip]
mov edx, 618
lea rsi, .LC1[rip]
lea rdi, .LC3[rip]
call __assert_fail@PLT
.L99:
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR 4[rax]
add eax, 48
mov edi, eax
call sqlite3_malloc@PLT
mov QWORD PTR -64[rbp], rax
cmp QWORD PTR -64[rbp], 0
jne .L100
mov DWORD PTR -88[rbp], 7
jmp .L98
.L100:
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR 4[rax]
cdqe
lea rdx, 48[rax]
mov rax, QWORD PTR -64[rbp]
mov esi, 0
mov rdi, rax
call memset@PLT
mov rax, QWORD PTR -64[rbp]
mov rdx, QWORD PTR -112[rbp]
mov QWORD PTR 8[rax], rdx
mov rax, QWORD PTR -64[rbp]
lea rdx, 48[rax]
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -40[rbp]
mov r9, QWORD PTR 40[rax]
mov rax, QWORD PTR -64[rbp]
mov rdx, QWORD PTR [rax]
mov rdi, QWORD PTR -136[rbp]
mov ecx, DWORD PTR -76[rbp]
mov rsi, QWORD PTR -112[rbp]
mov rax, QWORD PTR -40[rbp]
mov r8, rdi
mov rdi, rax
call r9
mov DWORD PTR -88[rbp], eax
cmp DWORD PTR -88[rbp], 0
jne .L115
mov rax, QWORD PTR -64[rbp]
mov rax, QWORD PTR [rax]
mov QWORD PTR -32[rbp], rax
mov rax, QWORD PTR -32[rbp]
mov rax, QWORD PTR [rax]
mov rcx, QWORD PTR 48[rax]
lea rdx, -72[rbp]
mov rax, QWORD PTR -32[rbp]
mov rsi, rdx
mov rdi, rax
call rcx
mov DWORD PTR -88[rbp], eax
cmp DWORD PTR -88[rbp], 0
jne .L116
mov rax, QWORD PTR -72[rbp]
test rax, rax
jne .L104
mov rax, QWORD PTR -32[rbp]
mov rax, QWORD PTR [rax]
mov r8, QWORD PTR 24[rax]
mov rax, QWORD PTR -32[rbp]
mov ecx, 10485759
mov edx, 1
lea rsi, .LC4[rip]
mov rdi, rax
call r8
mov DWORD PTR -88[rbp], eax
mov rax, QWORD PTR -64[rbp]
mov DWORD PTR 24[rax], 10485760
jmp .L105
.L104:
mov rax, QWORD PTR -72[rbp]
mov edx, eax
mov rax, QWORD PTR -64[rbp]
mov DWORD PTR 24[rax], edx
mov rax, QWORD PTR -32[rbp]
mov rax, QWORD PTR [rax]
mov r8, QWORD PTR 16[rax]
lea rsi, -12[rbp]
mov rax, QWORD PTR -32[rbp]
mov ecx, 0
mov edx, 4
mov rdi, rax
call r8
mov DWORD PTR -88[rbp], eax
movzx eax, BYTE PTR -12[rbp]
movzx eax, al
sal eax, 24
mov edx, eax
movzx eax, BYTE PTR -11[rbp]
movzx eax, al
sal eax, 16
add edx, eax
movzx eax, BYTE PTR -10[rbp]
movzx eax, al
sal eax, 8
add edx, eax
movzx eax, BYTE PTR -9[rbp]
movzx eax, al
add edx, eax
mov rax, QWORD PTR -64[rbp]
mov DWORD PTR 16[rax], edx
cmp DWORD PTR -88[rbp], 0
jne .L105
mov rax, QWORD PTR -32[rbp]
mov rax, QWORD PTR [rax]
mov r8, QWORD PTR 16[rax]
mov rax, QWORD PTR -64[rbp]
mov eax, DWORD PTR 24[rax]
sub eax, 4
movsx rdx, eax
lea rsi, -12[rbp]
mov rax, QWORD PTR -32[rbp]
mov rcx, rdx
mov edx, 4
mov rdi, rax
call r8
mov DWORD PTR -88[rbp], eax
movzx eax, BYTE PTR -12[rbp]
test al, al
jne .L107
movzx eax, BYTE PTR -11[rbp]
test al, al
jne .L107
movzx eax, BYTE PTR -10[rbp]
test al, al
jne .L107
movzx eax, BYTE PTR -9[rbp]
test al, al
je .L105
.L107:
mov rax, QWORD PTR -64[rbp]
mov edx, DWORD PTR 24[rax]
mov rax, QWORD PTR -64[rbp]
mov DWORD PTR 20[rax], edx
.L105:
cmp DWORD PTR -88[rbp], 0
jne .L98
mov rax, QWORD PTR -56[rbp]
mov rdx, QWORD PTR 168[rax]
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR 32[rax], rdx
mov rax, QWORD PTR -64[rbp]
mov rax, QWORD PTR 32[rax]
test rax, rax
je .L109
mov rax, QWORD PTR -64[rbp]
mov rax, QWORD PTR 32[rax]
mov rdx, QWORD PTR -64[rbp]
add rdx, 32
mov QWORD PTR 40[rax], rdx
.L109:
mov rax, QWORD PTR -56[rbp]
lea rdx, 168[rax]
mov rax, QWORD PTR -64[rbp]
mov QWORD PTR 40[rax], rdx
mov rax, QWORD PTR -56[rbp]
mov rdx, QWORD PTR -64[rbp]
mov QWORD PTR 168[rax], rdx
jmp .L98
.L114:
nop
jmp .L98
.L115:
nop
jmp .L98
.L116:
nop
.L98:
cmp QWORD PTR -64[rbp], 0
je .L110
cmp DWORD PTR -88[rbp], 0
jne .L111
mov rax, QWORD PTR -48[rbp]
mov rdx, QWORD PTR -64[rbp]
mov QWORD PTR 16[rax], rdx
mov rax, QWORD PTR -64[rbp]
mov eax, DWORD PTR 28[rax]
lea edx, 1[rax]
mov rax, QWORD PTR -64[rbp]
mov DWORD PTR 28[rax], edx
jmp .L110
.L111:
mov rax, QWORD PTR -64[rbp]
mov rax, QWORD PTR [rax]
mov rax, QWORD PTR [rax]
test rax, rax
je .L112
mov rax, QWORD PTR -64[rbp]
mov rax, QWORD PTR [rax]
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR 8[rax]
mov rax, QWORD PTR -64[rbp]
mov rax, QWORD PTR [rax]
mov rdi, rax
call rdx
.L112:
mov rax, QWORD PTR -64[rbp]
mov rdi, rax
call sqlite3_free@PLT
.L110:
mov eax, DWORD PTR -88[rbp]
.L90:
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L113
call __stack_chk_fail@PLT
.L113:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE24:
.size fsOpen, .-fsOpen
.section .rodata
.LC5:
.string "-journal"
.align 8
.LC6:
.string "strcmp(\"-journal\", &zPath[nName])==0"
.LC7:
.string ""
.string ""
.string ""
.string ""
.string ""
.text
.type fsDelete, @function
fsDelete:
.LFB25:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov DWORD PTR -52[rbp], edx
mov DWORD PTR -32[rbp], 0
mov rax, QWORD PTR -40[rbp]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -48[rbp]
mov rdi, rax
call strlen@PLT
sub eax, 8
mov DWORD PTR -28[rbp], eax
mov eax, DWORD PTR -28[rbp]
movsx rdx, eax
mov rax, QWORD PTR -48[rbp]
add rax, rdx
mov rsi, rax
lea rdi, .LC5[rip]
call strcmp@PLT
test eax, eax
je .L118
lea rcx, __PRETTY_FUNCTION__.0[rip]
mov edx, 693
lea rsi, .LC1[rip]
lea rdi, .LC6[rip]
call __assert_fail@PLT
.L118:
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 168[rax]
mov QWORD PTR -24[rbp], rax
jmp .L119
.L121:
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 32[rax]
mov QWORD PTR -24[rbp], rax
.L119:
cmp QWORD PTR -24[rbp], 0
je .L120
mov eax, DWORD PTR -28[rbp]
movsx rdx, eax
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 8[rax]
mov rcx, QWORD PTR -48[rbp]
mov rsi, rcx
mov rdi, rax
call strncmp@PLT
test eax, eax
jne .L121
.L120:
cmp QWORD PTR -24[rbp], 0
je .L122
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR [rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR [rax]
mov r8, QWORD PTR 24[rax]
mov rax, QWORD PTR -24[rbp]
mov eax, DWORD PTR 24[rax]
sub eax, 512
movsx rdx, eax
mov rax, QWORD PTR -8[rbp]
mov rcx, rdx
mov edx, 4
lea rsi, .LC7[rip]
mov rdi, rax
call r8
mov DWORD PTR -32[rbp], eax
cmp DWORD PTR -32[rbp], 0
jne .L122
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR 20[rax], 0
.L122:
mov eax, DWORD PTR -32[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE25:
.size fsDelete, .-fsDelete
.type fsAccess, @function
fsAccess:
.LFB26:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov DWORD PTR -52[rbp], edx
mov QWORD PTR -64[rbp], rcx
mov rax, QWORD PTR -40[rbp]
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -32[rbp], 0
mov rax, QWORD PTR -48[rbp]
mov rdi, rax
call strlen@PLT
mov DWORD PTR -28[rbp], eax
cmp DWORD PTR -52[rbp], 0
je .L125
mov rax, QWORD PTR -40[rbp]
mov rax, QWORD PTR 176[rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov r8, QWORD PTR 56[rax]
mov rcx, QWORD PTR -64[rbp]
mov edx, DWORD PTR -52[rbp]
mov rsi, QWORD PTR -48[rbp]
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call r8
jmp .L126
.L125:
cmp DWORD PTR -28[rbp], 8
jle .L127
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, -8[rax]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
mov rsi, rax
lea rdi, .LC5[rip]
call strcmp@PLT
test eax, eax
jne .L127
sub DWORD PTR -28[rbp], 8
mov DWORD PTR -32[rbp], 1
.L127:
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 168[rax]
mov QWORD PTR -24[rbp], rax
jmp .L128
.L130:
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 32[rax]
mov QWORD PTR -24[rbp], rax
.L128:
cmp QWORD PTR -24[rbp], 0
je .L129
mov eax, DWORD PTR -28[rbp]
movsx rdx, eax
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 8[rax]
mov rcx, QWORD PTR -48[rbp]
mov rsi, rcx
mov rdi, rax
call strncmp@PLT
test eax, eax
jne .L130
.L129:
cmp QWORD PTR -24[rbp], 0
je .L131
cmp DWORD PTR -32[rbp], 0
je .L132
mov rax, QWORD PTR -24[rbp]
mov eax, DWORD PTR 20[rax]
test eax, eax
jle .L131
.L132:
mov edx, 1
jmp .L133
.L131:
mov edx, 0
.L133:
mov rax, QWORD PTR -64[rbp]
mov DWORD PTR [rax], edx
mov eax, 0
.L126:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE26:
.size fsAccess, .-fsAccess
.type fsFullPathname, @function
fsFullPathname:
.LFB27:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov QWORD PTR -48[rbp], rcx
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 176[rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov r8, QWORD PTR 64[rax]
mov rcx, QWORD PTR -48[rbp]
mov edx, DWORD PTR -36[rbp]
mov rsi, QWORD PTR -32[rbp]
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call r8
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE27:
.size fsFullPathname, .-fsFullPathname
.type fsDlOpen, @function
fsDlOpen:
.LFB28:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 176[rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rcx, QWORD PTR 72[rax]
mov rdx, QWORD PTR -32[rbp]
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call rcx
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE28:
.size fsDlOpen, .-fsDlOpen
.type fsDlError, @function
fsDlError:
.LFB29:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov QWORD PTR -40[rbp], rdx
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 176[rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov r8, QWORD PTR 80[rax]
mov rdx, QWORD PTR -40[rbp]
mov ecx, DWORD PTR -28[rbp]
mov rax, QWORD PTR -8[rbp]
mov esi, ecx
mov rdi, rax
call r8
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE29:
.size fsDlError, .-fsDlError
.type fsDlSym, @function
fsDlSym:
.LFB30:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov QWORD PTR -40[rbp], rdx
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 176[rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov r8, QWORD PTR 88[rax]
mov rdx, QWORD PTR -40[rbp]
mov rcx, QWORD PTR -32[rbp]
mov rax, QWORD PTR -8[rbp]
mov rsi, rcx
mov rdi, rax
call r8
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE30:
.size fsDlSym, .-fsDlSym
.type fsDlClose, @function
fsDlClose:
.LFB31:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 176[rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rcx, QWORD PTR 96[rax]
mov rdx, QWORD PTR -32[rbp]
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call rcx
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE31:
.size fsDlClose, .-fsDlClose
.type fsRandomness, @function
fsRandomness:
.LFB32:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov QWORD PTR -40[rbp], rdx
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 176[rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov r8, QWORD PTR 104[rax]
mov rdx, QWORD PTR -40[rbp]
mov ecx, DWORD PTR -28[rbp]
mov rax, QWORD PTR -8[rbp]
mov esi, ecx
mov rdi, rax
call r8
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE32:
.size fsRandomness, .-fsRandomness
.type fsSleep, @function
fsSleep:
.LFB33:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 176[rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rcx, QWORD PTR 112[rax]
mov edx, DWORD PTR -28[rbp]
mov rax, QWORD PTR -8[rbp]
mov esi, edx
mov rdi, rax
call rcx
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE33:
.size fsSleep, .-fsSleep
.type fsCurrentTime, @function
fsCurrentTime:
.LFB34:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 176[rax]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rcx, QWORD PTR 120[rax]
mov rdx, QWORD PTR -32[rbp]
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
call rcx
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE34:
.size fsCurrentTime, .-fsCurrentTime
.globl fs_register
.type fs_register, @function
fs_register:
.LFB35:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov rax, QWORD PTR fs_vfs[rip+176]
test rax, rax
je .L149
mov eax, 0
jmp .L150
.L149:
mov edi, 0
call sqlite3_vfs_find@PLT
mov QWORD PTR fs_vfs[rip+176], rax
mov rax, QWORD PTR fs_vfs[rip+176]
mov eax, DWORD PTR 8[rax]
mov DWORD PTR fs_vfs[rip+8], eax
mov DWORD PTR fs_vfs[rip+4], 24
mov esi, 0
lea rdi, fs_vfs[rip]
call sqlite3_vfs_register@PLT
.L150:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE35:
.size fs_register, .-fs_register
.section .rodata
.align 8
.type __PRETTY_FUNCTION__.2, @object
.size __PRETTY_FUNCTION__.2, 8
__PRETTY_FUNCTION__.2:
.string "fsClose"
.type __PRETTY_FUNCTION__.1, @object
.size __PRETTY_FUNCTION__.1, 7
__PRETTY_FUNCTION__.1:
.string "fsOpen"
.align 8
.type __PRETTY_FUNCTION__.0, @object
.size __PRETTY_FUNCTION__.0, 9
__PRETTY_FUNCTION__.0:
.string "fsDelete"
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "848363.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "fs\000"
.data
.align 2
.type fs_vfs, %object
.size fs_vfs, 96
fs_vfs:
.word 1
.word 0
.word 0
.word 0
.word .LC0
.word 0
.word fsOpen
.word fsDelete
.word fsAccess
.word fsFullPathname
.word fsDlOpen
.word fsDlError
.word fsDlSym
.word fsDlClose
.word fsRandomness
.word fsSleep
.word fsCurrentTime
.word 0
.space 16
.word 0
.word 0
.align 2
.type fs_io_methods, %object
.size fs_io_methods, 76
fs_io_methods:
.word 1
.word fsClose
.word fsRead
.word fsWrite
.word fsTruncate
.word fsSync
.word fsFileSize
.word fsLock
.word fsUnlock
.word fsCheckReservedLock
.word fsFileControl
.word fsSectorSize
.word fsDeviceCharacteristics
.word 0
.word 0
.word 0
.word 0
.space 8
.align 2
.type tmp_io_methods, %object
.size tmp_io_methods, 76
tmp_io_methods:
.word 1
.word tmpClose
.word tmpRead
.word tmpWrite
.word tmpTruncate
.word tmpSync
.word tmpFileSize
.word tmpLock
.word tmpUnlock
.word tmpCheckReservedLock
.word tmpFileControl
.word tmpSectorSize
.word tmpDeviceCharacteristics
.word 0
.word 0
.word 0
.word 0
.space 8
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type tmpClose, %function
tmpClose:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r3, [fp, #-16]
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldr r3, [r3, #12]
mov r0, r3
bl sqlite3_free
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size tmpClose, .-tmpClose
.align 2
.syntax unified
.arm
.fpu softvfp
.type tmpRead, %function
tmpRead:
@ args = 8, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #24
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
ldr r3, [fp, #-24]
str r3, [fp, #-16]
ldr r3, [fp, #-32]
mov r0, r3
asr r1, r0, #31
ldmib fp, {r2-r3}
adds r4, r0, r2
adc r5, r1, r3
ldr r3, [fp, #-16]
ldr r3, [r3, #4]
mov r2, r3
asr r3, r2, #31
cmp r2, r4
sbcs r3, r3, r5
bge .L4
ldr r3, .L6
b .L5
.L4:
ldr r3, [fp, #-16]
ldr r2, [r3, #12]
ldr r3, [fp, #4]
add r3, r2, r3
ldr r2, [fp, #-32]
mov r1, r3
ldr r0, [fp, #-28]
bl memcpy
mov r3, #0
.L5:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L7:
.align 2
.L6:
.word 522
.size tmpRead, .-tmpRead
.align 2
.syntax unified
.arm
.fpu softvfp
.type tmpWrite, %function
tmpWrite:
@ args = 8, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, fp, lr}
add fp, sp, #28
sub sp, sp, #40
str r0, [fp, #-48]
str r1, [fp, #-52]
str r2, [fp, #-56]
ldr r3, [fp, #-48]
str r3, [fp, #-40]
ldr r3, [fp, #-56]
mov r0, r3
asr r1, r0, #31
ldmib fp, {r2-r3}
adds r8, r0, r2
adc r9, r1, r3
ldr r3, [fp, #-40]
ldr r3, [r3, #8]
mov r2, r3
asr r3, r2, #31
cmp r2, r8
sbcs r3, r3, r9
bge .L9
ldr r3, [fp, #-56]
mov r0, r3
asr r1, r0, #31
ldmib fp, {r2-r3}
adds r4, r0, r2
adc r5, r1, r3
ldr r3, [fp, #-40]
ldr r3, [r3, #8]
mov r2, r3
asr r3, r2, #31
adds r1, r4, r2
str r1, [fp, #-68]
adc r3, r5, r3
str r3, [fp, #-64]
ldr r3, [fp, #-68]
lsl r3, r3, #1
str r3, [fp, #-36]
ldr r3, [fp, #-40]
ldr r3, [r3, #12]
ldr r1, [fp, #-36]
mov r0, r3
bl sqlite3_realloc
str r0, [fp, #-32]
ldr r3, [fp, #-32]
cmp r3, #0
bne .L10
mov r3, #7
b .L11
.L10:
ldr r3, [fp, #-40]
ldr r2, [fp, #-32]
str r2, [r3, #12]
ldr r3, [fp, #-40]
ldr r2, [fp, #-36]
str r2, [r3, #8]
.L9:
ldr r3, [fp, #-40]
ldr r2, [r3, #12]
ldr r3, [fp, #4]
add r3, r2, r3
ldr r2, [fp, #-56]
ldr r1, [fp, #-52]
mov r0, r3
bl memcpy
ldr r3, [fp, #-40]
ldr r3, [r3, #4]
mov r4, r3
asr r5, r4, #31
ldr r3, [fp, #-56]
mov r0, r3
asr r1, r0, #31
ldmib fp, {r2-r3}
adds r6, r0, r2
adc r7, r1, r3
cmp r6, r4
sbcs r3, r7, r5
bge .L12
ldr r3, [fp, #-40]
ldr r3, [r3, #4]
b .L13
.L12:
ldr r2, [fp, #4]
ldr r3, [fp, #-56]
add r3, r2, r3
.L13:
ldr r2, [fp, #-40]
str r3, [r2, #4]
mov r3, #0
.L11:
mov r0, r3
sub sp, fp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, fp, pc}
.size tmpWrite, .-tmpWrite
.align 2
.syntax unified
.arm
.fpu softvfp
.type tmpTruncate, %function
tmpTruncate:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16]
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-16]
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldr r3, [r3, #4]
mov r0, r3
asr r1, r0, #31
sub r3, fp, #28
ldmia r3, {r2-r3}
cmp r0, r2
sbcs r3, r1, r3
bge .L15
ldr r3, [fp, #-8]
ldr r3, [r3, #4]
b .L16
.L15:
ldr r3, [fp, #-28]
.L16:
ldr r2, [fp, #-8]
str r3, [r2, #4]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size tmpTruncate, .-tmpTruncate
.align 2
.syntax unified
.arm
.fpu softvfp
.type tmpSync, %function
tmpSync:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size tmpSync, .-tmpSync
.align 2
.syntax unified
.arm
.fpu softvfp
.type tmpFileSize, %function
tmpFileSize:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-16]
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldr r3, [r3, #4]
mov r2, r3
asr r3, r2, #31
ldr r1, [fp, #-20]
stm r1, {r2-r3}
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size tmpFileSize, .-tmpFileSize
.align 2
.syntax unified
.arm
.fpu softvfp
.type tmpLock, %function
tmpLock:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size tmpLock, .-tmpLock
.align 2
.syntax unified
.arm
.fpu softvfp
.type tmpUnlock, %function
tmpUnlock:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size tmpUnlock, .-tmpUnlock
.align 2
.syntax unified
.arm
.fpu softvfp
.type tmpCheckReservedLock, %function
tmpCheckReservedLock:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r3, [fp, #-12]
mov r2, #0
str r2, [r3]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size tmpCheckReservedLock, .-tmpCheckReservedLock
.align 2
.syntax unified
.arm
.fpu softvfp
.type tmpFileControl, %function
tmpFileControl:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-8]
str r1, [fp, #-12]
str r2, [fp, #-16]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size tmpFileControl, .-tmpFileControl
.align 2
.syntax unified
.arm
.fpu softvfp
.type tmpSectorSize, %function
tmpSectorSize:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size tmpSectorSize, .-tmpSectorSize
.align 2
.syntax unified
.arm
.fpu softvfp
.type tmpDeviceCharacteristics, %function
tmpDeviceCharacteristics:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size tmpDeviceCharacteristics, .-tmpDeviceCharacteristics
.section .rodata
.align 2
.LC1:
.ascii "the_stack_data/848363.c\000"
.align 2
.LC2:
.ascii "pReal->nRef>=0\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsClose, %function
fsClose:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
mov r3, #0
str r3, [fp, #-16]
ldr r3, [fp, #-24]
str r3, [fp, #-12]
ldr r3, [fp, #-12]
ldr r3, [r3, #8]
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldr r3, [r3, #20]
sub r2, r3, #1
ldr r3, [fp, #-8]
str r2, [r3, #20]
ldr r3, [fp, #-8]
ldr r3, [r3, #20]
cmp r3, #0
bge .L35
ldr r3, .L39
ldr r2, .L39+4
ldr r1, .L39+8
ldr r0, .L39+12
bl __assert_fail
.L35:
ldr r3, [fp, #-8]
ldr r3, [r3, #20]
cmp r3, #0
bne .L36
ldr r3, [fp, #-8]
ldr r3, [r3, #28]
ldr r2, [fp, #-8]
ldr r2, [r2, #24]
str r2, [r3]
ldr r3, [fp, #-8]
ldr r3, [r3, #24]
cmp r3, #0
beq .L37
ldr r3, [fp, #-8]
ldr r3, [r3, #24]
ldr r2, [fp, #-8]
ldr r2, [r2, #28]
str r2, [r3, #28]
.L37:
ldr r3, [fp, #-8]
ldr r3, [r3]
ldr r3, [r3]
ldr r3, [r3, #4]
ldr r2, [fp, #-8]
ldr r2, [r2]
mov r0, r2
blx r3
str r0, [fp, #-16]
ldr r0, [fp, #-8]
bl sqlite3_free
.L36:
ldr r3, [fp, #-16]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L40:
.align 2
.L39:
.word __PRETTY_FUNCTION__.6195
.word 382
.word .LC1
.word .LC2
.size fsClose, .-fsClose
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsRead, %function
fsRead:
@ args = 8, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, fp, lr}
add fp, sp, #28
sub sp, sp, #64
str r0, [fp, #-72]
str r1, [fp, #-76]
str r2, [fp, #-80]
mov r3, #0
str r3, [fp, #-64]
ldr r3, [fp, #-72]
str r3, [fp, #-48]
ldr r3, [fp, #-48]
ldr r3, [r3, #8]
str r3, [fp, #-44]
ldr r3, [fp, #-44]
ldr r3, [r3]
str r3, [fp, #-40]
ldr r3, [fp, #-48]
ldr r3, [r3, #4]
cmp r3, #1
bne .L42
ldr r3, [fp, #-80]
mov r0, r3
asr r1, r0, #31
ldmib fp, {r2-r3}
adds r8, r0, r2
adc r9, r1, r3
ldr r3, [fp, #-44]
ldr r3, [r3, #8]
mov r2, r3
asr r3, r2, #31
cmp r2, r8
sbcs r3, r3, r9
blt .L43
.L42:
ldr r3, [fp, #-48]
ldr r3, [r3, #4]
cmp r3, #2
bne .L44
ldr r3, [fp, #-80]
mov r0, r3
asr r1, r0, #31
ldmib fp, {r2-r3}
adds r6, r0, r2
adc r7, r1, r3
ldr r3, [fp, #-44]
ldr r3, [r3, #12]
mov r2, r3
asr r3, r2, #31
cmp r2, r6
sbcs r3, r3, r7
bge .L44
.L43:
ldr r3, .L50
str r3, [fp, #-64]
b .L45
.L44:
ldr r3, [fp, #-48]
ldr r3, [r3, #4]
cmp r3, #1
bne .L46
ldr r3, [fp, #-40]
ldr r3, [r3]
ldr r6, [r3, #8]
ldmib fp, {r2-r3}
adds r4, r2, #512
adc r5, r3, #0
stm sp, {r4-r5}
ldr r2, [fp, #-80]
ldr r1, [fp, #-76]
ldr r0, [fp, #-40]
blx r6
str r0, [fp, #-64]
b .L45
.L46:
ldr r3, [fp, #-80]
str r3, [fp, #-60]
mov r3, #0
str r3, [fp, #-56]
ldr r3, [fp, #4]
str r3, [fp, #-52]
b .L47
.L48:
ldr r3, [fp, #-44]
ldr r1, [r3, #16]
ldr r3, [fp, #-52]
add r2, r3, #508
add r2, r2, #3
cmp r3, #0
movlt r3, r2
movge r3, r3
asr r3, r3, #9
add r3, r3, #1
lsl r3, r3, #9
sub r1, r1, r3
ldr r3, [fp, #-52]
rsbs r2, r3, #0
lsl r3, r3, #23
lsr r3, r3, #23
lsl r2, r2, #23
lsr r2, r2, #23
rsbpl r3, r2, #0
add r3, r1, r3
str r3, [fp, #-36]
ldr r3, [fp, #-36]
rsbs r2, r3, #0
lsl r3, r3, #23
lsr r3, r3, #23
lsl r2, r2, #23
lsr r2, r2, #23
rsbpl r3, r2, #0
rsb r3, r3, #512
ldr r2, [fp, #-60]
cmp r2, r3
movlt r3, r2
movge r3, r3
str r3, [fp, #-32]
ldr r3, [fp, #-40]
ldr r3, [r3]
ldr r4, [r3, #8]
ldr r3, [fp, #-56]
ldr r2, [fp, #-76]
add r1, r2, r3
ldr r3, [fp, #-36]
mov r2, r3
asr r3, r2, #31
stm sp, {r2-r3}
ldr r2, [fp, #-32]
ldr r0, [fp, #-40]
blx r4
str r0, [fp, #-64]
ldr r2, [fp, #-52]
ldr r3, [fp, #-32]
add r3, r2, r3
str r3, [fp, #-52]
ldr r2, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r2, r3
str r3, [fp, #-56]
ldr r2, [fp, #-60]
ldr r3, [fp, #-32]
sub r3, r2, r3
str r3, [fp, #-60]
.L47:
ldr r3, [fp, #-60]
cmp r3, #0
ble .L45
ldr r3, [fp, #-64]
cmp r3, #0
beq .L48
.L45:
ldr r3, [fp, #-64]
mov r0, r3
sub sp, fp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, fp, pc}
.L51:
.align 2
.L50:
.word 522
.size fsRead, .-fsRead
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsWrite, %function
fsWrite:
@ args = 8, pretend = 0, frame = 72
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, fp, lr}
add fp, sp, #28
sub sp, sp, #80
str r0, [fp, #-72]
str r1, [fp, #-76]
str r2, [fp, #-80]
mov r3, #0
str r3, [fp, #-64]
ldr r3, [fp, #-72]
str r3, [fp, #-48]
ldr r3, [fp, #-48]
ldr r3, [r3, #8]
str r3, [fp, #-44]
ldr r3, [fp, #-44]
ldr r3, [r3]
str r3, [fp, #-40]
ldr r3, [fp, #-48]
ldr r3, [r3, #4]
cmp r3, #1
bne .L53
ldr r3, [fp, #-80]
mov r0, r3
asr r1, r0, #31
ldmib fp, {r2-r3}
adds r4, r0, r2
adc r5, r1, r3
ldr r2, .L65
mov r3, #0
adds r1, r4, r2
str r1, [fp, #-92]
adc r3, r5, r3
str r3, [fp, #-88]
ldr r3, [fp, #-44]
ldr r2, [r3, #16]
ldr r3, [fp, #-44]
ldr r3, [r3, #12]
sub r3, r2, r3
mov r2, r3
asr r3, r2, #31
sub r1, fp, #92
ldmia r1, {r0-r1}
cmp r0, r2
sbcs r3, r1, r3
blt .L54
mov r3, #13
str r3, [fp, #-64]
b .L55
.L54:
ldr r3, [fp, #-40]
ldr r3, [r3]
ldr r4, [r3, #12]
ldmib fp, {r2-r3}
adds r1, r2, #512
str r1, [fp, #-100]
adc r3, r3, #0
str r3, [fp, #-96]
sub r3, fp, #100
ldmia r3, {r2-r3}
stm sp, {r2-r3}
ldr r2, [fp, #-80]
ldr r1, [fp, #-76]
ldr r0, [fp, #-40]
blx r4
str r0, [fp, #-64]
ldr r3, [fp, #-64]
cmp r3, #0
bne .L55
ldr r3, [fp, #-44]
ldr r3, [r3, #8]
mov r4, r3
asr r5, r4, #31
ldr r3, [fp, #-80]
mov r0, r3
asr r1, r0, #31
ldmib fp, {r2-r3}
adds r8, r0, r2
adc r9, r1, r3
cmp r8, r4
sbcs r3, r9, r5
bge .L56
ldr r3, [fp, #-44]
ldr r3, [r3, #8]
b .L57
.L56:
ldr r2, [fp, #4]
ldr r3, [fp, #-80]
add r3, r2, r3
.L57:
ldr r2, [fp, #-44]
str r3, [r2, #8]
b .L55
.L53:
ldr r3, [fp, #-80]
str r3, [fp, #-60]
mov r3, #0
str r3, [fp, #-56]
ldr r3, [fp, #4]
str r3, [fp, #-52]
b .L58
.L61:
ldr r3, [fp, #-44]
ldr r1, [r3, #16]
ldr r3, [fp, #-52]
add r2, r3, #508
add r2, r2, #3
cmp r3, #0
movlt r3, r2
movge r3, r3
asr r3, r3, #9
add r3, r3, #1
lsl r3, r3, #9
sub r1, r1, r3
ldr r3, [fp, #-52]
rsbs r2, r3, #0
lsl r3, r3, #23
lsr r3, r3, #23
lsl r2, r2, #23
lsr r2, r2, #23
rsbpl r3, r2, #0
add r3, r1, r3
str r3, [fp, #-36]
ldr r3, [fp, #-36]
rsbs r2, r3, #0
lsl r3, r3, #23
lsr r3, r3, #23
lsl r2, r2, #23
lsr r2, r2, #23
rsbpl r3, r2, #0
rsb r3, r3, #512
ldr r2, [fp, #-60]
cmp r2, r3
movlt r3, r2
movge r3, r3
str r3, [fp, #-32]
ldr r3, [fp, #-44]
ldr r3, [r3, #8]
add r3, r3, #508
add r3, r3, #3
ldr r2, [fp, #-36]
cmp r2, r3
bgt .L59
mov r3, #13
str r3, [fp, #-64]
b .L58
.L59:
ldr r3, [fp, #-40]
ldr r3, [r3]
ldr r4, [r3, #12]
ldr r3, [fp, #-56]
ldr r2, [fp, #-76]
add r1, r2, r3
ldr r3, [fp, #-36]
mov r2, r3
asr r3, r2, #31
stm sp, {r2-r3}
ldr r2, [fp, #-32]
ldr r0, [fp, #-40]
blx r4
str r0, [fp, #-64]
ldr r2, [fp, #-52]
ldr r3, [fp, #-32]
add r3, r2, r3
str r3, [fp, #-52]
ldr r2, [fp, #-56]
ldr r3, [fp, #-32]
add r3, r2, r3
str r3, [fp, #-56]
ldr r2, [fp, #-60]
ldr r3, [fp, #-32]
sub r3, r2, r3
str r3, [fp, #-60]
.L58:
ldr r3, [fp, #-60]
cmp r3, #0
ble .L60
ldr r3, [fp, #-64]
cmp r3, #0
beq .L61
.L60:
ldr r3, [fp, #-64]
cmp r3, #0
bne .L55
ldr r3, [fp, #-44]
ldr r3, [r3, #12]
mov r4, r3
asr r5, r4, #31
ldr r3, [fp, #-80]
mov r0, r3
asr r1, r0, #31
ldmib fp, {r2-r3}
adds r6, r0, r2
adc r7, r1, r3
cmp r6, r4
sbcs r3, r7, r5
bge .L62
ldr r3, [fp, #-44]
ldr r3, [r3, #12]
b .L63
.L62:
ldr r2, [fp, #4]
ldr r3, [fp, #-80]
add r3, r2, r3
.L63:
ldr r2, [fp, #-44]
str r3, [r2, #12]
.L55:
ldr r3, [fp, #-64]
mov r0, r3
sub sp, fp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, fp, pc}
.L66:
.align 2
.L65:
.word 511
.size fsWrite, .-fsWrite
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsTruncate, %function
fsTruncate:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16]
str r2, [fp, #-28]
str r3, [fp, #-24]
ldr r3, [fp, #-16]
str r3, [fp, #-12]
ldr r3, [fp, #-12]
ldr r3, [r3, #8]
str r3, [fp, #-8]
ldr r3, [fp, #-12]
ldr r3, [r3, #4]
cmp r3, #1
bne .L68
ldr r3, [fp, #-8]
ldr r3, [r3, #8]
mov r0, r3
asr r1, r0, #31
sub r3, fp, #28
ldmia r3, {r2-r3}
cmp r0, r2
sbcs r3, r1, r3
bge .L69
ldr r3, [fp, #-8]
ldr r3, [r3, #8]
b .L70
.L69:
ldr r3, [fp, #-28]
.L70:
ldr r2, [fp, #-8]
str r3, [r2, #8]
b .L71
.L68:
ldr r3, [fp, #-8]
ldr r3, [r3, #12]
mov r0, r3
asr r1, r0, #31
sub r3, fp, #28
ldmia r3, {r2-r3}
cmp r0, r2
sbcs r3, r1, r3
bge .L72
ldr r3, [fp, #-8]
ldr r3, [r3, #12]
b .L73
.L72:
ldr r3, [fp, #-28]
.L73:
ldr r2, [fp, #-8]
str r3, [r2, #12]
.L71:
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size fsTruncate, .-fsTruncate
.section .rodata
.align 2
.LC3:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsSync, %function
fsSync:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #44
str r0, [fp, #-40]
str r1, [fp, #-44]
ldr r3, .L80
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
ldr r3, [fp, #-40]
str r3, [fp, #-32]
ldr r3, [fp, #-32]
ldr r3, [r3, #8]
str r3, [fp, #-28]
ldr r3, [fp, #-28]
ldr r3, [r3]
str r3, [fp, #-24]
mov r3, #0
str r3, [fp, #-36]
ldr r3, [fp, #-32]
ldr r3, [r3, #4]
cmp r3, #1
bne .L76
ldr r3, [fp, #-28]
ldr r3, [r3, #8]
lsr r3, r3, #24
and r3, r3, #255
strb r3, [fp, #-20]
ldr r3, [fp, #-28]
ldr r3, [r3, #8]
asr r3, r3, #16
and r3, r3, #255
strb r3, [fp, #-19]
ldr r3, [fp, #-28]
ldr r3, [r3, #8]
asr r3, r3, #8
and r3, r3, #255
strb r3, [fp, #-18]
ldr r3, [fp, #-28]
ldr r3, [r3, #8]
and r3, r3, #255
strb r3, [fp, #-17]
ldr r3, [fp, #-24]
ldr r3, [r3]
ldr r4, [r3, #12]
sub r1, fp, #20
mov r2, #0
mov r3, #0
stm sp, {r2-r3}
mov r2, #4
ldr r0, [fp, #-24]
blx r4
str r0, [fp, #-36]
.L76:
ldr r3, [fp, #-36]
cmp r3, #0
bne .L77
ldr r3, [fp, #-24]
ldr r3, [r3]
ldr r3, [r3, #20]
ldr r2, [fp, #-44]
bic r2, r2, #16
mov r1, r2
ldr r0, [fp, #-24]
blx r3
str r0, [fp, #-36]
.L77:
ldr r3, [fp, #-36]
ldr r2, .L80
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L79
bl __stack_chk_fail
.L79:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L81:
.align 2
.L80:
.word .LC3
.size fsSync, .-fsSync
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsFileSize, %function
fsFileSize:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-16]
str r3, [fp, #-12]
ldr r3, [fp, #-12]
ldr r3, [r3, #8]
str r3, [fp, #-8]
ldr r3, [fp, #-12]
ldr r3, [r3, #4]
cmp r3, #1
bne .L83
ldr r3, [fp, #-8]
ldr r3, [r3, #8]
mov r2, r3
asr r3, r2, #31
ldr r1, [fp, #-20]
stm r1, {r2-r3}
b .L84
.L83:
ldr r3, [fp, #-8]
ldr r3, [r3, #12]
mov r2, r3
asr r3, r2, #31
ldr r1, [fp, #-20]
stm r1, {r2-r3}
.L84:
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size fsFileSize, .-fsFileSize
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsLock, %function
fsLock:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size fsLock, .-fsLock
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsUnlock, %function
fsUnlock:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size fsUnlock, .-fsUnlock
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsCheckReservedLock, %function
fsCheckReservedLock:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r3, [fp, #-12]
mov r2, #0
str r2, [r3]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size fsCheckReservedLock, .-fsCheckReservedLock
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsFileControl, %function
fsFileControl:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-8]
str r1, [fp, #-12]
str r2, [fp, #-16]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size fsFileControl, .-fsFileControl
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsSectorSize, %function
fsSectorSize:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
mov r3, #512
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size fsSectorSize, .-fsSectorSize
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsDeviceCharacteristics, %function
fsDeviceCharacteristics:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size fsDeviceCharacteristics, .-fsDeviceCharacteristics
.section .rodata
.align 2
.LC4:
.ascii "eType==DATABASE_FILE\000"
.align 2
.LC5:
.ascii "\000\000"
.align 2
.LC6:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsOpen, %function
fsOpen:
@ args = 4, pretend = 0, frame = 80
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #92
str r0, [fp, #-72]
str r1, [fp, #-76]
str r2, [fp, #-80]
str r3, [fp, #-84]
ldr r3, [fp, #4]
str r3, [fp, #-88]
ldr r3, .L127
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
ldr r3, [fp, #-72]
str r3, [fp, #-60]
ldr r3, [fp, #-80]
str r3, [fp, #-56]
mov r3, #0
str r3, [fp, #-68]
mov r3, #0
str r3, [fp, #-64]
ldr r3, [fp, #-84]
and r3, r3, #2304
cmp r3, #0
bne .L99
ldr r3, [fp, #-80]
str r3, [fp, #-32]
mov r2, #16
mov r1, #0
ldr r0, [fp, #-32]
bl memset
ldr r3, [fp, #-32]
ldr r2, .L127+4
str r2, [r3]
mov r3, #0
b .L100
.L99:
ldr r3, [fp, #-84]
and r3, r3, #256
cmp r3, #0
beq .L101
mov r3, #1
b .L102
.L101:
mov r3, #2
.L102:
str r3, [fp, #-52]
ldr r3, [fp, #-56]
ldr r2, .L127+8
str r2, [r3]
ldr r3, [fp, #-56]
ldr r2, [fp, #-52]
str r2, [r3, #4]
ldr r0, [fp, #-76]
bl strlen
mov r3, r0
mov r2, r3
ldr r3, [fp, #-52]
cmp r3, #2
bne .L103
mov r3, #8
b .L104
.L103:
mov r3, #0
.L104:
sub r3, r2, r3
str r3, [fp, #-48]
ldr r3, [fp, #-60]
ldr r3, [r3, #88]
str r3, [fp, #-68]
b .L105
.L107:
ldr r3, [fp, #-68]
ldr r3, [r3, #24]
str r3, [fp, #-68]
.L105:
ldr r3, [fp, #-68]
cmp r3, #0
beq .L106
ldr r3, [fp, #-68]
ldr r3, [r3, #4]
ldr r2, [fp, #-48]
ldr r1, [fp, #-76]
mov r0, r3
bl strncmp
mov r3, r0
cmp r3, #0
bne .L107
.L106:
ldr r3, [fp, #-68]
cmp r3, #0
bne .L124
ldr r3, [fp, #-84]
bic r3, r3, #768
orr r3, r3, #512
str r3, [fp, #-44]
ldr r3, [fp, #-60]
ldr r3, [r3, #92]
str r3, [fp, #-40]
ldr r3, [fp, #-52]
cmp r3, #1
beq .L109
ldr r3, .L127+12
ldr r2, .L127+16
ldr r1, .L127+20
ldr r0, .L127+24
bl __assert_fail
.L109:
ldr r3, [fp, #-40]
ldr r3, [r3, #4]
add r3, r3, #32
mov r0, r3
bl sqlite3_malloc
str r0, [fp, #-68]
ldr r3, [fp, #-68]
cmp r3, #0
bne .L110
mov r3, #7
str r3, [fp, #-64]
b .L108
.L110:
ldr r3, [fp, #-40]
ldr r3, [r3, #4]
add r3, r3, #32
mov r2, r3
mov r1, #0
ldr r0, [fp, #-68]
bl memset
ldr r3, [fp, #-68]
ldr r2, [fp, #-76]
str r2, [r3, #4]
ldr r3, [fp, #-68]
add r2, r3, #32
ldr r3, [fp, #-68]
str r2, [r3]
ldr r3, [fp, #-40]
ldr r4, [r3, #24]
ldr r3, [fp, #-68]
ldr r2, [r3]
ldr r3, [fp, #-88]
str r3, [sp]
ldr r3, [fp, #-44]
ldr r1, [fp, #-76]
ldr r0, [fp, #-40]
blx r4
str r0, [fp, #-64]
ldr r3, [fp, #-64]
cmp r3, #0
bne .L125
ldr r3, [fp, #-68]
ldr r3, [r3]
str r3, [fp, #-36]
ldr r3, [fp, #-36]
ldr r3, [r3]
ldr r3, [r3, #24]
sub r2, fp, #28
mov r1, r2
ldr r0, [fp, #-36]
blx r3
str r0, [fp, #-64]
ldr r3, [fp, #-64]
cmp r3, #0
bne .L126
sub r3, fp, #28
ldmia r3, {r2-r3}
orrs r3, r2, r3
bne .L114
ldr r3, [fp, #-36]
ldr r3, [r3]
ldr r4, [r3, #12]
ldr r2, .L127+28
mov r3, #0
stm sp, {r2-r3}
mov r2, #1
ldr r1, .L127+32
ldr r0, [fp, #-36]
blx r4
str r0, [fp, #-64]
ldr r3, [fp, #-68]
mov r2, #10485760
str r2, [r3, #16]
b .L115
.L114:
sub r3, fp, #28
ldmia r3, {r2-r3}
ldr r3, [fp, #-68]
str r2, [r3, #16]
ldr r3, [fp, #-36]
ldr r3, [r3]
ldr r4, [r3, #8]
sub r1, fp, #20
mov r2, #0
mov r3, #0
stm sp, {r2-r3}
mov r2, #4
ldr r0, [fp, #-36]
blx r4
str r0, [fp, #-64]
ldrb r3, [fp, #-20] @ zero_extendqisi2
lsl r2, r3, #24
ldrb r3, [fp, #-19] @ zero_extendqisi2
lsl r3, r3, #16
add r2, r2, r3
ldrb r3, [fp, #-18] @ zero_extendqisi2
lsl r3, r3, #8
add r3, r2, r3
ldrb r2, [fp, #-17] @ zero_extendqisi2
add r2, r3, r2
ldr r3, [fp, #-68]
str r2, [r3, #8]
ldr r3, [fp, #-64]
cmp r3, #0
bne .L115
ldr r3, [fp, #-36]
ldr r3, [r3]
ldr r4, [r3, #8]
ldr r3, [fp, #-68]
ldr r3, [r3, #16]
sub r3, r3, #4
mov r2, r3
asr r3, r2, #31
sub r1, fp, #20
stm sp, {r2-r3}
mov r2, #4
ldr r0, [fp, #-36]
blx r4
str r0, [fp, #-64]
ldrb r3, [fp, #-20] @ zero_extendqisi2
cmp r3, #0
bne .L117
ldrb r3, [fp, #-19] @ zero_extendqisi2
cmp r3, #0
bne .L117
ldrb r3, [fp, #-18] @ zero_extendqisi2
cmp r3, #0
bne .L117
ldrb r3, [fp, #-17] @ zero_extendqisi2
cmp r3, #0
beq .L115
.L117:
ldr r3, [fp, #-68]
ldr r2, [r3, #16]
ldr r3, [fp, #-68]
str r2, [r3, #12]
.L115:
ldr r3, [fp, #-64]
cmp r3, #0
bne .L108
ldr r3, [fp, #-60]
ldr r2, [r3, #88]
ldr r3, [fp, #-68]
str r2, [r3, #24]
ldr r3, [fp, #-68]
ldr r3, [r3, #24]
cmp r3, #0
beq .L119
ldr r3, [fp, #-68]
ldr r3, [r3, #24]
ldr r2, [fp, #-68]
add r2, r2, #24
str r2, [r3, #28]
.L119:
ldr r3, [fp, #-60]
add r2, r3, #88
ldr r3, [fp, #-68]
str r2, [r3, #28]
ldr r3, [fp, #-60]
ldr r2, [fp, #-68]
str r2, [r3, #88]
b .L108
.L124:
nop
b .L108
.L125:
nop
b .L108
.L126:
nop
.L108:
ldr r3, [fp, #-68]
cmp r3, #0
beq .L120
ldr r3, [fp, #-64]
cmp r3, #0
bne .L121
ldr r3, [fp, #-56]
ldr r2, [fp, #-68]
str r2, [r3, #8]
ldr r3, [fp, #-68]
ldr r3, [r3, #20]
add r2, r3, #1
ldr r3, [fp, #-68]
str r2, [r3, #20]
b .L120
.L121:
ldr r3, [fp, #-68]
ldr r3, [r3]
ldr r3, [r3]
cmp r3, #0
beq .L122
ldr r3, [fp, #-68]
ldr r3, [r3]
ldr r3, [r3]
ldr r3, [r3, #4]
ldr r2, [fp, #-68]
ldr r2, [r2]
mov r0, r2
blx r3
.L122:
ldr r0, [fp, #-68]
bl sqlite3_free
.L120:
ldr r3, [fp, #-64]
.L100:
ldr r2, .L127
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L123
bl __stack_chk_fail
.L123:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L128:
.align 2
.L127:
.word .LC6
.word tmp_io_methods
.word fs_io_methods
.word __PRETTY_FUNCTION__.6290
.word 618
.word .LC1
.word .LC4
.word 10485759
.word .LC5
.size fsOpen, .-fsOpen
.section .rodata
.align 2
.LC7:
.ascii "-journal\000"
.align 2
.LC8:
.ascii "strcmp(\"-journal\", &zPath[nName])==0\000"
.align 2
.LC9:
.ascii "\000\000\000\000\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsDelete, %function
fsDelete:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #52
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
mov r3, #0
str r3, [fp, #-32]
ldr r3, [fp, #-40]
str r3, [fp, #-24]
ldr r0, [fp, #-44]
bl strlen
mov r3, r0
sub r3, r3, #8
str r3, [fp, #-20]
ldr r3, [fp, #-20]
ldr r2, [fp, #-44]
add r3, r2, r3
mov r1, r3
ldr r0, .L136
bl strcmp
mov r3, r0
cmp r3, #0
beq .L130
ldr r3, .L136+4
ldr r2, .L136+8
ldr r1, .L136+12
ldr r0, .L136+16
bl __assert_fail
.L130:
ldr r3, [fp, #-24]
ldr r3, [r3, #88]
str r3, [fp, #-28]
b .L131
.L133:
ldr r3, [fp, #-28]
ldr r3, [r3, #24]
str r3, [fp, #-28]
.L131:
ldr r3, [fp, #-28]
cmp r3, #0
beq .L132
ldr r3, [fp, #-28]
ldr r3, [r3, #4]
ldr r2, [fp, #-20]
ldr r1, [fp, #-44]
mov r0, r3
bl strncmp
mov r3, r0
cmp r3, #0
bne .L133
.L132:
ldr r3, [fp, #-28]
cmp r3, #0
beq .L134
ldr r3, [fp, #-28]
ldr r3, [r3]
str r3, [fp, #-16]
ldr r3, [fp, #-16]
ldr r3, [r3]
ldr r4, [r3, #12]
ldr r3, [fp, #-28]
ldr r3, [r3, #16]
sub r3, r3, #512
mov r2, r3
asr r3, r2, #31
stm sp, {r2-r3}
mov r2, #4
ldr r1, .L136+20
ldr r0, [fp, #-16]
blx r4
str r0, [fp, #-32]
ldr r3, [fp, #-32]
cmp r3, #0
bne .L134
ldr r3, [fp, #-28]
mov r2, #0
str r2, [r3, #12]
.L134:
ldr r3, [fp, #-32]
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L137:
.align 2
.L136:
.word .LC7
.word __PRETTY_FUNCTION__.6310
.word 693
.word .LC1
.word .LC8
.word .LC9
.size fsDelete, .-fsDelete
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsAccess, %function
fsAccess:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #44
str r0, [fp, #-40]
str r1, [fp, #-44]
str r2, [fp, #-48]
str r3, [fp, #-52]
ldr r3, [fp, #-40]
str r3, [fp, #-20]
mov r3, #0
str r3, [fp, #-28]
ldr r0, [fp, #-44]
bl strlen
mov r3, r0
str r3, [fp, #-24]
ldr r3, [fp, #-48]
cmp r3, #0
beq .L139
ldr r3, [fp, #-40]
ldr r3, [r3, #92]
str r3, [fp, #-16]
ldr r3, [fp, #-16]
ldr r4, [r3, #32]
ldr r3, [fp, #-52]
ldr r2, [fp, #-48]
ldr r1, [fp, #-44]
ldr r0, [fp, #-16]
blx r4
mov r3, r0
b .L140
.L139:
ldr r3, [fp, #-24]
cmp r3, #8
ble .L141
ldr r3, [fp, #-24]
sub r3, r3, #8
ldr r2, [fp, #-44]
add r3, r2, r3
mov r1, r3
ldr r0, .L148
bl strcmp
mov r3, r0
cmp r3, #0
bne .L141
ldr r3, [fp, #-24]
sub r3, r3, #8
str r3, [fp, #-24]
mov r3, #1
str r3, [fp, #-28]
.L141:
ldr r3, [fp, #-20]
ldr r3, [r3, #88]
str r3, [fp, #-32]
b .L142
.L144:
ldr r3, [fp, #-32]
ldr r3, [r3, #24]
str r3, [fp, #-32]
.L142:
ldr r3, [fp, #-32]
cmp r3, #0
beq .L143
ldr r3, [fp, #-32]
ldr r3, [r3, #4]
ldr r2, [fp, #-24]
ldr r1, [fp, #-44]
mov r0, r3
bl strncmp
mov r3, r0
cmp r3, #0
bne .L144
.L143:
ldr r3, [fp, #-32]
cmp r3, #0
beq .L145
ldr r3, [fp, #-28]
cmp r3, #0
beq .L146
ldr r3, [fp, #-32]
ldr r3, [r3, #12]
cmp r3, #0
ble .L145
.L146:
mov r2, #1
b .L147
.L145:
mov r2, #0
.L147:
ldr r3, [fp, #-52]
str r2, [r3]
mov r3, #0
.L140:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L149:
.align 2
.L148:
.word .LC7
.size fsAccess, .-fsAccess
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsFullPathname, %function
fsFullPathname:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
str r3, [fp, #-36]
ldr r3, [fp, #-24]
ldr r3, [r3, #92]
str r3, [fp, #-16]
ldr r3, [fp, #-16]
ldr r4, [r3, #36]
ldr r3, [fp, #-36]
ldr r2, [fp, #-32]
ldr r1, [fp, #-28]
ldr r0, [fp, #-16]
blx r4
mov r3, r0
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size fsFullPathname, .-fsFullPathname
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsDlOpen, %function
fsDlOpen:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-16]
ldr r3, [r3, #92]
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldr r3, [r3, #40]
ldr r1, [fp, #-20]
ldr r0, [fp, #-8]
blx r3
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fsDlOpen, .-fsDlOpen
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsDlError, %function
fsDlError:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-16]
ldr r3, [r3, #92]
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldr r3, [r3, #44]
ldr r2, [fp, #-24]
ldr r1, [fp, #-20]
ldr r0, [fp, #-8]
blx r3
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fsDlError, .-fsDlError
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsDlSym, %function
fsDlSym:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-16]
ldr r3, [r3, #92]
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldr r3, [r3, #48]
ldr r2, [fp, #-24]
ldr r1, [fp, #-20]
ldr r0, [fp, #-8]
blx r3
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fsDlSym, .-fsDlSym
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsDlClose, %function
fsDlClose:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-16]
ldr r3, [r3, #92]
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldr r3, [r3, #52]
ldr r1, [fp, #-20]
ldr r0, [fp, #-8]
blx r3
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fsDlClose, .-fsDlClose
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsRandomness, %function
fsRandomness:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-16]
ldr r3, [r3, #92]
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldr r3, [r3, #56]
ldr r2, [fp, #-24]
ldr r1, [fp, #-20]
ldr r0, [fp, #-8]
blx r3
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fsRandomness, .-fsRandomness
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsSleep, %function
fsSleep:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-16]
ldr r3, [r3, #92]
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldr r3, [r3, #60]
ldr r1, [fp, #-20]
ldr r0, [fp, #-8]
blx r3
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fsSleep, .-fsSleep
.align 2
.syntax unified
.arm
.fpu softvfp
.type fsCurrentTime, %function
fsCurrentTime:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-16]
ldr r3, [r3, #92]
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldr r3, [r3, #64]
ldr r1, [fp, #-20]
ldr r0, [fp, #-8]
blx r3
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fsCurrentTime, .-fsCurrentTime
.align 2
.global fs_register
.syntax unified
.arm
.fpu softvfp
.type fs_register, %function
fs_register:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
ldr r3, .L167
ldr r3, [r3, #92]
cmp r3, #0
beq .L165
mov r3, #0
b .L166
.L165:
mov r0, #0
bl sqlite3_vfs_find
mov r3, r0
ldr r2, .L167
str r3, [r2, #92]
ldr r3, .L167
ldr r3, [r3, #92]
ldr r3, [r3, #8]
ldr r2, .L167
str r3, [r2, #8]
ldr r3, .L167
mov r2, #16
str r2, [r3, #4]
mov r1, #0
ldr r0, .L167
bl sqlite3_vfs_register
mov r3, r0
.L166:
mov r0, r3
pop {fp, pc}
.L168:
.align 2
.L167:
.word fs_vfs
.size fs_register, .-fs_register
.section .rodata
.align 2
.type __PRETTY_FUNCTION__.6195, %object
.size __PRETTY_FUNCTION__.6195, 8
__PRETTY_FUNCTION__.6195:
.ascii "fsClose\000"
.align 2
.type __PRETTY_FUNCTION__.6290, %object
.size __PRETTY_FUNCTION__.6290, 7
__PRETTY_FUNCTION__.6290:
.ascii "fsOpen\000"
.align 2
.type __PRETTY_FUNCTION__.6310, %object
.size __PRETTY_FUNCTION__.6310, 9
__PRETTY_FUNCTION__.6310:
.ascii "fsDelete\000"
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "72427.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "b: %p\n"
.LC1:
.string "a[0]: %p\n"
.LC2:
.string "b <- a[0]: %td\n"
.LC3:
.string "a[N-1] -> b: %td\n"
.LC4:
.string "no overlap"
.LC5:
.string "b = %d\n"
.LC6:
.string "setting a[%td] = %d\n"
.LC7:
.string "a[%td] = %d\n"
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov DWORD PTR -84[rbp], edi
mov QWORD PTR -96[rbp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -64[rbp], 15
mov DWORD PTR -60[rbp], 42
lea rax, -68[rbp]
lea rdx, -48[rbp]
sub rax, rdx
sar rax, 2
mov QWORD PTR -56[rbp], rax
mov eax, DWORD PTR -64[rbp]
mov DWORD PTR -68[rbp], eax
cmp DWORD PTR -84[rbp], 1
jle .L2
lea rax, -68[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
lea rax, -48[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
lea rdx, -68[rbp]
lea rax, -48[rbp]
cmp rdx, rax
jnb .L3
lea rax, -48[rbp]
lea rdx, -68[rbp]
sub rax, rdx
sar rax, 2
mov rsi, rax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
jmp .L4
.L3:
lea rax, -68[rbp]
lea rdx, -48[rbp]
add rdx, 28
sub rax, rdx
sar rax, 2
mov rsi, rax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
.L4:
lea rdi, .LC4[rip]
call puts@PLT
.L2:
mov eax, DWORD PTR -68[rbp]
mov esi, eax
lea rdi, .LC5[rip]
mov eax, 0
call printf@PLT
mov DWORD PTR -72[rbp], 0
jmp .L5
.L6:
mov eax, DWORD PTR -72[rbp]
mov edx, DWORD PTR -72[rbp]
cdqe
mov DWORD PTR -48[rbp+rax*4], edx
mov eax, DWORD PTR -72[rbp]
add eax, 1
mov DWORD PTR -72[rbp], eax
.L5:
mov eax, DWORD PTR -72[rbp]
cmp eax, 7
jle .L6
mov rax, QWORD PTR -56[rbp]
mov edx, DWORD PTR -60[rbp]
mov DWORD PTR -48[rbp+rax*4], edx
mov edx, DWORD PTR -60[rbp]
mov rax, QWORD PTR -56[rbp]
mov rsi, rax
lea rdi, .LC6[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -56[rbp]
mov edx, DWORD PTR -48[rbp+rax*4]
mov rax, QWORD PTR -56[rbp]
mov rsi, rax
lea rdi, .LC7[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -68[rbp]
mov esi, eax
lea rdi, .LC5[rip]
mov eax, 0
call printf@PLT
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L8
call __stack_chk_fail@PLT
.L8:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "72427.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "b: %p\012\000"
.align 2
.LC1:
.ascii "a[0]: %p\012\000"
.align 2
.LC2:
.ascii "b <- a[0]: %td\012\000"
.align 2
.LC3:
.ascii "a[N-1] -> b: %td\012\000"
.align 2
.LC4:
.ascii "no overlap\000"
.align 2
.LC5:
.ascii "b = %d\012\000"
.align 2
.LC6:
.ascii "setting a[%td] = %d\012\000"
.align 2
.LC7:
.ascii "a[%td] = %d\012\000"
.align 2
.LC8:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 64
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #64
str r0, [fp, #-64]
str r1, [fp, #-68]
ldr r3, .L9
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #15
str r3, [fp, #-52]
mov r3, #42
str r3, [fp, #-48]
sub r3, fp, #56
sub r2, fp, #40
sub r3, r3, r2
asr r3, r3, #2
str r3, [fp, #-44]
ldr r3, [fp, #-52]
str r3, [fp, #-56]
ldr r3, [fp, #-64]
cmp r3, #1
ble .L2
sub r3, fp, #56
mov r1, r3
ldr r0, .L9+4
bl printf
sub r3, fp, #40
mov r1, r3
ldr r0, .L9+8
bl printf
sub r2, fp, #56
sub r3, fp, #40
cmp r2, r3
bcs .L3
sub r3, fp, #40
sub r2, fp, #56
sub r3, r3, r2
asr r3, r3, #2
mov r1, r3
ldr r0, .L9+12
bl printf
b .L4
.L3:
sub r3, fp, #56
sub r2, fp, #40
add r2, r2, #28
sub r3, r3, r2
asr r3, r3, #2
mov r1, r3
ldr r0, .L9+16
bl printf
.L4:
ldr r0, .L9+20
bl puts
.L2:
ldr r3, [fp, #-56]
mov r1, r3
ldr r0, .L9+24
bl printf
mov r3, #0
str r3, [fp, #-60]
b .L5
.L6:
ldr r3, [fp, #-60]
ldr r2, [fp, #-60]
lsl r3, r3, #2
sub r1, fp, #4
add r3, r1, r3
str r2, [r3, #-36]
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L5:
ldr r3, [fp, #-60]
cmp r3, #7
ble .L6
ldr r3, [fp, #-44]
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r2, [fp, #-48]
str r2, [r3, #-36]
ldr r2, [fp, #-48]
ldr r1, [fp, #-44]
ldr r0, .L9+28
bl printf
ldr r3, [fp, #-44]
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-36]
mov r2, r3
ldr r1, [fp, #-44]
ldr r0, .L9+32
bl printf
ldr r3, [fp, #-56]
mov r1, r3
ldr r0, .L9+24
bl printf
mov r3, #0
ldr r2, .L9
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L8
bl __stack_chk_fail
.L8:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L10:
.align 2
.L9:
.word .LC8
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.word .LC6
.word .LC7
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "55361.c"
.intel_syntax noprefix
.text
.globl __VERIFIER_assert
.type __VERIFIER_assert, @function
__VERIFIER_assert:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
cmp DWORD PTR -4[rbp], 0
jne .L5
nop
.L3:
mov eax, 0
call __VERIFIER_error@PLT
.L5:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size __VERIFIER_assert, .-__VERIFIER_assert
.globl foo
.type foo, @function
foo:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
mov edi, 1
call __VERIFIER_assert
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size foo, .-foo
.globl main
.type main, @function
main:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, 0
call __VERIFIER_nondet_int@PLT
test eax, eax
je .L8
mov edi, 1
call foo
jmp .L9
.L8:
mov edi, 1
call foo
.L9:
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "55361.c"
.text
.align 2
.global __VERIFIER_assert
.syntax unified
.arm
.fpu softvfp
.type __VERIFIER_assert, %function
__VERIFIER_assert:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
bne .L5
nop
.L3:
bl __VERIFIER_error
.L5:
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size __VERIFIER_assert, .-__VERIFIER_assert
.align 2
.global foo
.syntax unified
.arm
.fpu softvfp
.type foo, %function
foo:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
mov r0, #1
bl __VERIFIER_assert
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size foo, .-foo
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
bl __VERIFIER_nondet_int
mov r3, r0
cmp r3, #0
beq .L8
mov r0, #1
bl foo
b .L9
.L8:
mov r0, #1
bl foo
.L9:
mov r3, #0
mov r0, r3
pop {fp, pc}
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "560350.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "."
.LC1:
.string "/"
.text
.globl dirname
.type dirname, @function
dirname:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
cmp QWORD PTR -24[rbp], 0
je .L2
mov rax, QWORD PTR -24[rbp]
movzx eax, BYTE PTR [rax]
test al, al
jne .L3
.L2:
lea rax, .LC0[rip]
jmp .L4
.L3:
mov rax, QWORD PTR -24[rbp]
mov rdi, rax
call strlen@PLT
lea rdx, -1[rax]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov QWORD PTR -8[rbp], rax
jmp .L5
.L7:
mov rax, QWORD PTR -8[rbp]
cmp rax, QWORD PTR -24[rbp]
jne .L6
mov rax, QWORD PTR -24[rbp]
jmp .L4
.L6:
mov rax, QWORD PTR -8[rbp]
lea rdx, -1[rax]
mov QWORD PTR -8[rbp], rdx
mov BYTE PTR [rax], 0
.L5:
mov rax, QWORD PTR -8[rbp]
movzx eax, BYTE PTR [rax]
cmp al, 47
je .L7
jmp .L8
.L10:
sub QWORD PTR -8[rbp], 1
.L8:
mov rax, QWORD PTR -8[rbp]
cmp rax, QWORD PTR -24[rbp]
jb .L9
mov rax, QWORD PTR -8[rbp]
movzx eax, BYTE PTR [rax]
cmp al, 47
jne .L10
.L9:
mov rax, QWORD PTR -8[rbp]
cmp rax, QWORD PTR -24[rbp]
jb .L11
mov rax, QWORD PTR -8[rbp]
cmp rax, QWORD PTR -24[rbp]
je .L12
mov rax, QWORD PTR -8[rbp]
mov BYTE PTR [rax], 0
mov rax, QWORD PTR -24[rbp]
jmp .L4
.L12:
lea rax, .LC1[rip]
jmp .L4
.L11:
lea rax, .LC0[rip]
.L4:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size dirname, .-dirname
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "560350.c"
.text
.section .rodata
.align 2
.LC0:
.ascii ".\000"
.align 2
.LC1:
.ascii "/\000"
.text
.align 2
.global dirname
.syntax unified
.arm
.fpu softvfp
.type dirname, %function
dirname:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r3, [fp, #-16]
cmp r3, #0
beq .L2
ldr r3, [fp, #-16]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L3
.L2:
ldr r3, .L15
b .L4
.L3:
ldr r0, [fp, #-16]
bl strlen
mov r3, r0
sub r3, r3, #1
ldr r2, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-8]
b .L5
.L7:
ldr r2, [fp, #-8]
ldr r3, [fp, #-16]
cmp r2, r3
bne .L6
ldr r3, [fp, #-16]
b .L4
.L6:
ldr r3, [fp, #-8]
sub r2, r3, #1
str r2, [fp, #-8]
mov r2, #0
strb r2, [r3]
.L5:
ldr r3, [fp, #-8]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #47
beq .L7
b .L8
.L10:
ldr r3, [fp, #-8]
sub r3, r3, #1
str r3, [fp, #-8]
.L8:
ldr r2, [fp, #-8]
ldr r3, [fp, #-16]
cmp r2, r3
bcc .L9
ldr r3, [fp, #-8]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #47
bne .L10
.L9:
ldr r2, [fp, #-8]
ldr r3, [fp, #-16]
cmp r2, r3
bcc .L11
ldr r2, [fp, #-8]
ldr r3, [fp, #-16]
cmp r2, r3
beq .L12
ldr r3, [fp, #-8]
mov r2, #0
strb r2, [r3]
ldr r3, [fp, #-16]
b .L4
.L12:
ldr r3, .L15+4
b .L4
.L11:
ldr r3, .L15
.L4:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L16:
.align 2
.L15:
.word .LC0
.word .LC1
.size dirname, .-dirname
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "30466.c"
.intel_syntax noprefix
.text
.section .rodata
.LC3:
.string "Cel"
.LC4:
.string "Fah"
.LC5:
.string "%3s %6s\n"
.LC6:
.string "=========="
.LC9:
.string "%3.0f %6.1f\n"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
pxor xmm0, xmm0
movss DWORD PTR -16[rbp], xmm0
movss xmm0, DWORD PTR .LC1[rip]
movss DWORD PTR -12[rbp], xmm0
movss xmm0, DWORD PTR .LC2[rip]
movss DWORD PTR -8[rbp], xmm0
lea rdx, .LC3[rip]
lea rsi, .LC4[rip]
lea rdi, .LC5[rip]
mov eax, 0
call printf@PLT
lea rdi, .LC6[rip]
call puts@PLT
movss xmm0, DWORD PTR -16[rbp]
movss DWORD PTR -20[rbp], xmm0
jmp .L2
.L3:
pxor xmm0, xmm0
cvtss2sd xmm0, DWORD PTR -20[rbp]
movsd xmm2, QWORD PTR .LC7[rip]
movapd xmm1, xmm0
subsd xmm1, xmm2
movsd xmm0, QWORD PTR .LC8[rip]
mulsd xmm0, xmm1
cvtsd2ss xmm0, xmm0
movss DWORD PTR -4[rbp], xmm0
pxor xmm0, xmm0
cvtss2sd xmm0, DWORD PTR -4[rbp]
pxor xmm3, xmm3
cvtss2sd xmm3, DWORD PTR -20[rbp]
movq rax, xmm3
movapd xmm1, xmm0
movq xmm0, rax
lea rdi, .LC9[rip]
mov eax, 2
call printf@PLT
movss xmm0, DWORD PTR -20[rbp]
addss xmm0, DWORD PTR -8[rbp]
movss DWORD PTR -20[rbp], xmm0
.L2:
movss xmm0, DWORD PTR -12[rbp]
comiss xmm0, DWORD PTR -20[rbp]
jnb .L3
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 4
.LC1:
.long 1133903872
.align 4
.LC2:
.long 1101004800
.align 8
.LC7:
.long 0
.long 1077936128
.align 8
.LC8:
.long 1908874354
.long 1071761180
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "30466.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Cel\000"
.align 2
.LC1:
.ascii "Fah\000"
.align 2
.LC2:
.ascii "%3s %6s\012\000"
.align 2
.LC3:
.ascii "==========\000"
.global __aeabi_f2d
.global __aeabi_dsub
.global __aeabi_dmul
.global __aeabi_d2f
.align 2
.LC4:
.ascii "%3.0f %6.1f\012\000"
.global __aeabi_fadd
.global __aeabi_fcmple
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #32
mov r3, #0
str r3, [fp, #-28] @ float
ldr r3, .L5
str r3, [fp, #-24] @ float
ldr r3, .L5+4
str r3, [fp, #-20] @ float
ldr r2, .L5+8
ldr r1, .L5+12
ldr r0, .L5+16
bl printf
ldr r0, .L5+20
bl puts
ldr r3, [fp, #-28] @ float
str r3, [fp, #-32] @ float
b .L2
.L3:
ldr r0, [fp, #-32] @ float
bl __aeabi_f2d
mov r2, #0
ldr r3, .L5+24
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
ldr r2, .L5+28
ldr r3, .L5+32
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-16] @ float
ldr r0, [fp, #-32] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
ldr r0, [fp, #-16] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
stm sp, {r2-r3}
mov r2, r4
mov r3, r5
ldr r0, .L5+36
bl printf
ldr r1, [fp, #-20] @ float
ldr r0, [fp, #-32] @ float
bl __aeabi_fadd
mov r3, r0
str r3, [fp, #-32] @ float
.L2:
ldr r1, [fp, #-24] @ float
ldr r0, [fp, #-32] @ float
bl __aeabi_fcmple
mov r3, r0
cmp r3, #0
bne .L3
mov r3, #0
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L6:
.align 2
.L5:
.word 1133903872
.word 1101004800
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word 1077936128
.word 1908874354
.word 1071761180
.word .LC4
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "386168.c"
.intel_syntax noprefix
.text
.globl maxWidthRamp
.type maxWidthRamp, @function
maxWidthRamp:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 72
.cfi_offset 3, -24
mov QWORD PTR -72[rbp], rdi
mov DWORD PTR -76[rbp], esi
mov rax, QWORD PTR fs:40
mov QWORD PTR -24[rbp], rax
xor eax, eax
mov rax, rsp
mov rsi, rax
mov DWORD PTR -56[rbp], 0
mov eax, DWORD PTR -76[rbp]
movsx rdx, eax
sub rdx, 1
mov QWORD PTR -40[rbp], rdx
movsx rdx, eax
mov r8, rdx
mov r9d, 0
movsx rdx, eax
mov rcx, rdx
mov ebx, 0
cdqe
lea rdx, 0[0+rax*4]
mov eax, 16
sub rax, 1
add rax, rdx
mov edi, 16
mov edx, 0
div rdi
imul rax, rax, 16
mov rcx, rax
and rcx, -4096
mov rdx, rsp
sub rdx, rcx
.L2:
cmp rsp, rdx
je .L3
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L2
.L3:
mov rdx, rax
and edx, 4095
sub rsp, rdx
mov rdx, rax
and edx, 4095
test rdx, rdx
je .L4
and eax, 4095
sub rax, 8
add rax, rsp
or QWORD PTR [rax], 0
.L4:
mov rax, rsp
add rax, 3
shr rax, 2
sal rax, 2
mov QWORD PTR -32[rbp], rax
mov DWORD PTR -60[rbp], 0
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR -60[rbp]
movsx rdx, edx
mov DWORD PTR [rax+rdx*4], 0
mov DWORD PTR -64[rbp], 1
jmp .L5
.L12:
mov eax, DWORD PTR -64[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -72[rbp]
add rax, rdx
mov ecx, DWORD PTR [rax]
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR -60[rbp]
movsx rdx, edx
mov eax, DWORD PTR [rax+rdx*4]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -72[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
cmp ecx, eax
jge .L6
add DWORD PTR -60[rbp], 1
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR -60[rbp]
movsx rdx, edx
mov ecx, DWORD PTR -64[rbp]
mov DWORD PTR [rax+rdx*4], ecx
jmp .L7
.L6:
mov eax, DWORD PTR -64[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -72[rbp]
add rax, rdx
mov edx, DWORD PTR [rax]
mov rax, QWORD PTR -72[rbp]
mov eax, DWORD PTR [rax]
cmp edx, eax
jl .L8
mov eax, DWORD PTR -56[rbp]
cmp DWORD PTR -64[rbp], eax
cmovge eax, DWORD PTR -64[rbp]
mov DWORD PTR -56[rbp], eax
jmp .L7
.L8:
mov DWORD PTR -52[rbp], 0
mov eax, DWORD PTR -60[rbp]
mov DWORD PTR -48[rbp], eax
jmp .L9
.L11:
mov eax, DWORD PTR -48[rbp]
sub eax, DWORD PTR -52[rbp]
mov edx, eax
shr edx, 31
add eax, edx
sar eax
mov edx, eax
mov eax, DWORD PTR -52[rbp]
add eax, edx
mov DWORD PTR -44[rbp], eax
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR -44[rbp]
movsx rdx, edx
mov eax, DWORD PTR [rax+rdx*4]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -72[rbp]
add rax, rdx
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -64[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -72[rbp]
add rax, rcx
mov eax, DWORD PTR [rax]
cmp edx, eax
jle .L10
mov eax, DWORD PTR -44[rbp]
add eax, 1
mov DWORD PTR -52[rbp], eax
jmp .L9
.L10:
mov eax, DWORD PTR -44[rbp]
mov DWORD PTR -48[rbp], eax
.L9:
mov eax, DWORD PTR -52[rbp]
cmp eax, DWORD PTR -48[rbp]
jl .L11
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR -52[rbp]
movsx rdx, edx
mov edx, DWORD PTR [rax+rdx*4]
mov eax, DWORD PTR -64[rbp]
sub eax, edx
cmp DWORD PTR -56[rbp], eax
cmovge eax, DWORD PTR -56[rbp]
mov DWORD PTR -56[rbp], eax
.L7:
add DWORD PTR -64[rbp], 1
.L5:
mov eax, DWORD PTR -64[rbp]
cmp eax, DWORD PTR -76[rbp]
jl .L12
mov eax, DWORD PTR -56[rbp]
mov rsp, rsi
mov rbx, QWORD PTR -24[rbp]
sub rbx, QWORD PTR fs:40
je .L14
call __stack_chk_fail@PLT
.L14:
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size maxWidthRamp, .-maxWidthRamp
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "386168.c"
.text
.section .rodata
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global maxWidthRamp
.syntax unified
.arm
.fpu softvfp
.type maxWidthRamp, %function
maxWidthRamp:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-48]
str r1, [fp, #-52]
ldr r3, .L12
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, sp
mov lr, r3
mov r3, #0
str r3, [fp, #-32]
ldr ip, [fp, #-52]
sub r3, ip, #1
str r3, [fp, #-20]
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
mov r0, r3
mov r1, #0
mov r2, #0
mov r3, #0
lsl r3, r1, #5
orr r3, r3, r0, lsr #27
lsl r2, r0, #5
mov r3, ip
lsl r3, r3, #2
add r3, r3, #7
lsr r3, r3, #3
lsl r3, r3, #3
sub sp, sp, r3
mov r3, sp
add r3, r3, #3
lsr r3, r3, #2
lsl r3, r3, #2
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-36]
ldr r3, [fp, #-16]
ldr r2, [fp, #-36]
mov r1, #0
str r1, [r3, r2, lsl #2]
mov r3, #1
str r3, [fp, #-40]
b .L2
.L9:
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #-48]
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-16]
ldr r1, [fp, #-36]
ldr r3, [r3, r1, lsl #2]
lsl r3, r3, #2
ldr r1, [fp, #-48]
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
bge .L3
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
ldr r3, [fp, #-16]
ldr r2, [fp, #-36]
ldr r1, [fp, #-40]
str r1, [r3, r2, lsl #2]
b .L4
.L3:
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r2, [fp, #-48]
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-48]
ldr r3, [r3]
cmp r2, r3
blt .L5
ldr r2, [fp, #-32]
ldr r3, [fp, #-40]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-32]
b .L4
.L5:
mov r3, #0
str r3, [fp, #-28]
ldr r3, [fp, #-36]
str r3, [fp, #-24]
b .L6
.L8:
ldr r2, [fp, #-24]
ldr r3, [fp, #-28]
sub r3, r2, r3
lsr r2, r3, #31
add r3, r2, r3
asr r3, r3, #1
mov r2, r3
ldr r3, [fp, #-28]
add r3, r3, r2
str r3, [fp, #-12]
ldr r3, [fp, #-16]
ldr r2, [fp, #-12]
ldr r3, [r3, r2, lsl #2]
lsl r3, r3, #2
ldr r2, [fp, #-48]
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-40]
lsl r3, r3, #2
ldr r1, [fp, #-48]
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
ble .L7
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-28]
b .L6
.L7:
ldr r3, [fp, #-12]
str r3, [fp, #-24]
.L6:
ldr r2, [fp, #-28]
ldr r3, [fp, #-24]
cmp r2, r3
blt .L8
ldr r3, [fp, #-16]
ldr r2, [fp, #-28]
ldr r3, [r3, r2, lsl #2]
ldr r2, [fp, #-40]
sub r3, r2, r3
ldr r2, [fp, #-32]
cmp r2, r3
movge r3, r2
movlt r3, r3
str r3, [fp, #-32]
.L4:
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L2:
ldr r2, [fp, #-40]
ldr r3, [fp, #-52]
cmp r2, r3
blt .L9
ldr r3, [fp, #-32]
mov sp, lr
ldr r2, .L12
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L11
bl __stack_chk_fail
.L11:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L13:
.align 2
.L12:
.word .LC0
.size maxWidthRamp, .-maxWidthRamp
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "515446.c"
.intel_syntax noprefix
.text
.globl symlink
.type symlink, @function
symlink:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov rdx, QWORD PTR -16[rbp]
mov rax, QWORD PTR -8[rbp]
mov esi, -100
mov rdi, rax
call symlinkat@PLT
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size symlink, .-symlink
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "515446.c"
.text
.align 2
.global symlink
.syntax unified
.arm
.fpu softvfp
.type symlink, %function
symlink:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r2, [fp, #-12]
mvn r1, #99
ldr r0, [fp, #-8]
bl symlinkat
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size symlink, .-symlink
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "926809.c"
.intel_syntax noprefix
.text
.globl ft_strncat
.type ft_strncat, @function
ft_strncat:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -32[rbp]
mov QWORD PTR -8[rbp], rax
jmp .L2
.L3:
add QWORD PTR -16[rbp], 1
.L2:
mov rax, QWORD PTR -16[rbp]
movzx eax, BYTE PTR [rax]
test al, al
jne .L3
jmp .L4
.L6:
mov rax, QWORD PTR -8[rbp]
movzx edx, BYTE PTR [rax]
mov rax, QWORD PTR -16[rbp]
mov BYTE PTR [rax], dl
add QWORD PTR -16[rbp], 1
add QWORD PTR -8[rbp], 1
sub DWORD PTR -36[rbp], 1
.L4:
mov rax, QWORD PTR -8[rbp]
movzx eax, BYTE PTR [rax]
test al, al
je .L5
cmp DWORD PTR -36[rbp], 0
jg .L6
.L5:
mov rax, QWORD PTR -16[rbp]
mov BYTE PTR [rax], 0
mov rax, QWORD PTR -24[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size ft_strncat, .-ft_strncat
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "926809.c"
.text
.align 2
.global ft_strncat
.syntax unified
.arm
.fpu softvfp
.type ft_strncat, %function
ft_strncat:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-16]
str r3, [fp, #-12]
ldr r3, [fp, #-20]
str r3, [fp, #-8]
b .L2
.L3:
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L2:
ldr r3, [fp, #-12]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L3
b .L4
.L6:
ldr r3, [fp, #-8]
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [fp, #-12]
strb r2, [r3]
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
ldr r3, [fp, #-24]
sub r3, r3, #1
str r3, [fp, #-24]
.L4:
ldr r3, [fp, #-8]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L5
ldr r3, [fp, #-24]
cmp r3, #0
bgt .L6
.L5:
ldr r3, [fp, #-12]
mov r2, #0
strb r2, [r3]
ldr r3, [fp, #-16]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size ft_strncat, .-ft_strncat
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "860578.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "name = %p\n"
.LC1:
.string "&name[0] = %p\n"
.LC2:
.string "name printed as %%s is %s\n"
.LC3:
.string "*name = %c\n"
.LC4:
.string "name[0] = %c\n"
.text
.globl test
.type test, @function
test:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -13[rbp], 1635150195
mov BYTE PTR -9[rbp], 0
lea rax, -13[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
lea rax, -13[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
lea rax, -13[rbp]
mov rsi, rax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
movzx eax, BYTE PTR -13[rbp]
movsx eax, al
mov esi, eax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
movzx eax, BYTE PTR -13[rbp]
movsx eax, al
mov esi, eax
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L2
call __stack_chk_fail@PLT
.L2:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size test, .-test
.section .rodata
.LC5:
.string "r"
.align 8
.LC6:
.string "ps axc --format pid,%cpu,%mem,command --sort=-%mem --headers | head -n 5"
.LC7:
.string "%s"
.text
.globl popa
.type popa, @function
popa:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 544
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rsi, .LC5[rip]
lea rdi, .LC6[rip]
call popen@PLT
mov QWORD PTR -536[rbp], rax
jmp .L4
.L5:
lea rax, -528[rbp]
mov rsi, rax
lea rdi, .LC7[rip]
mov eax, 0
call printf@PLT
.L4:
mov rdx, QWORD PTR -536[rbp]
lea rax, -528[rbp]
mov esi, 512
mov rdi, rax
call fgets@PLT
test rax, rax
jne .L5
mov rax, QWORD PTR -536[rbp]
mov rdi, rax
call pclose@PLT
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L7
call __stack_chk_fail@PLT
.L7:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size popa, .-popa
.globl memload
.type memload, @function
memload:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 40
.cfi_offset 3, -24
mov rax, QWORD PTR fs:40
mov QWORD PTR -24[rbp], rax
xor eax, eax
movabs rax, 2325913809262433606
mov QWORD PTR -39[rbp], rax
mov DWORD PTR -31[rbp], 1414748499
mov WORD PTR -27[rbp], 19781
mov BYTE PTR -25[rbp], 0
mov DWORD PTR -44[rbp], 0
jmp .L9
.L10:
mov eax, DWORD PTR -44[rbp]
cdqe
movzx eax, BYTE PTR -39[rbp+rax]
movsx eax, al
mov edi, eax
call putchar@PLT
add DWORD PTR -44[rbp], 1
.L9:
mov eax, DWORD PTR -44[rbp]
movsx rbx, eax
lea rax, -39[rbp]
mov rdi, rax
call strlen@PLT
cmp rbx, rax
jb .L10
mov edi, 10
call putchar@PLT
nop
mov rax, QWORD PTR -24[rbp]
sub rax, QWORD PTR fs:40
je .L11
call __stack_chk_fail@PLT
.L11:
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size memload, .-memload
.globl main
.type main, @function
main:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, 0
call popa
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "860578.c"
.text
.section .rodata
.align 2
.LC1:
.ascii "name = %p\012\000"
.align 2
.LC2:
.ascii "&name[0] = %p\012\000"
.align 2
.LC3:
.ascii "name printed as %%s is %s\012\000"
.align 2
.LC4:
.ascii "*name = %c\012\000"
.align 2
.LC5:
.ascii "name[0] = %c\012\000"
.align 2
.LC0:
.ascii "siva\000"
.align 2
.LC6:
.word __stack_chk_guard
.text
.align 2
.global test
.syntax unified
.arm
.fpu softvfp
.type test, %function
test:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
ldr r3, .L3
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r2, .L3+4
sub r3, fp, #16
ldm r2, {r0, r1}
str r0, [r3]
add r3, r3, #4
strb r1, [r3]
sub r3, fp, #16
mov r1, r3
ldr r0, .L3+8
bl printf
sub r3, fp, #16
mov r1, r3
ldr r0, .L3+12
bl printf
sub r3, fp, #16
mov r1, r3
ldr r0, .L3+16
bl printf
ldrb r3, [fp, #-16] @ zero_extendqisi2
mov r1, r3
ldr r0, .L3+20
bl printf
ldrb r3, [fp, #-16] @ zero_extendqisi2
mov r1, r3
ldr r0, .L3+24
bl printf
nop
ldr r3, .L3
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L2
bl __stack_chk_fail
.L2:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L4:
.align 2
.L3:
.word .LC6
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.size test, .-test
.section .rodata
.align 2
.LC7:
.ascii "r\000"
.align 2
.LC8:
.ascii "ps axc --format pid,%cpu,%mem,command --sort=-%mem "
.ascii "--headers | head -n 5\000"
.align 2
.LC9:
.ascii "%s\000"
.align 2
.LC10:
.word __stack_chk_guard
.text
.align 2
.global popa
.syntax unified
.arm
.fpu softvfp
.type popa, %function
popa:
@ args = 0, pretend = 0, frame = 520
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #520
ldr r3, .L10
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r1, .L10+4
ldr r0, .L10+8
bl popen
str r0, [fp, #-524]
b .L6
.L7:
sub r3, fp, #520
mov r1, r3
ldr r0, .L10+12
bl printf
.L6:
sub r3, fp, #520
ldr r2, [fp, #-524]
mov r1, #512
mov r0, r3
bl fgets
mov r3, r0
cmp r3, #0
bne .L7
ldr r0, [fp, #-524]
bl pclose
mov r3, #0
ldr r2, .L10
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L9
bl __stack_chk_fail
.L9:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L11:
.align 2
.L10:
.word .LC10
.word .LC7
.word .LC8
.word .LC9
.size popa, .-popa
.section .rodata
.align 2
.LC11:
.ascii "FUCKING SYSTEM\000"
.align 2
.LC12:
.word __stack_chk_guard
.text
.align 2
.global memload
.syntax unified
.arm
.fpu softvfp
.type memload, %function
memload:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
ldr r3, .L16
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, .L16+4
sub ip, fp, #24
ldm r3, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2}
strh r3, [ip] @ movhi
add ip, ip, #2
lsr r3, r3, #16
strb r3, [ip]
mov r3, #0
str r3, [fp, #-28]
b .L13
.L14:
sub r2, fp, #24
ldr r3, [fp, #-28]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
mov r0, r3
bl putchar
ldr r3, [fp, #-28]
add r3, r3, #1
str r3, [fp, #-28]
.L13:
sub r3, fp, #24
mov r0, r3
bl strlen
mov r2, r0
ldr r3, [fp, #-28]
cmp r2, r3
bhi .L14
mov r0, #10
bl putchar
nop
ldr r3, .L16
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L15
bl __stack_chk_fail
.L15:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L17:
.align 2
.L16:
.word .LC12
.word .LC11
.size memload, .-memload
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
bl popa
mov r3, #0
mov r0, r3
pop {fp, pc}
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "453937.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "%s: Testing chroot()\n"
.LC1:
.string "strdup"
.LC2:
.string "chroot"
.text
.type _chroot, @function
_chroot:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov rax, QWORD PTR -40[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -40[rbp]
mov rdi, rax
call strdup@PLT
mov QWORD PTR -16[rbp], rax
cmp QWORD PTR -16[rbp], 0
jne .L2
mov rax, QWORD PTR -40[rbp]
mov edx, 2
lea rsi, .LC1[rip]
mov rdi, rax
call _error
jmp .L3
.L2:
mov rax, QWORD PTR -16[rbp]
mov rdi, rax
call dirname@PLT
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call chroot@PLT
mov DWORD PTR -20[rbp], eax
mov rax, QWORD PTR -16[rbp]
mov rdi, rax
call free@PLT
cmp DWORD PTR -20[rbp], 0
je .L7
call __errno_location@PLT
mov eax, DWORD PTR [rax]
cmp eax, 1
je .L8
cmp eax, 38
je .L8
mov rax, QWORD PTR -40[rbp]
mov edx, 3
lea rsi, .LC2[rip]
mov rdi, rax
call _error
jmp .L3
.L7:
nop
jmp .L4
.L8:
nop
.L4:
mov eax, 0
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size _chroot, .-_chroot
.section .rodata
.LC3:
.string "%s: %s: %s\n"
.text
.type _error, @function
_error:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov DWORD PTR -20[rbp], edx
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov edi, eax
call strerror@PLT
mov rsi, rax
mov rax, QWORD PTR stderr[rip]
mov rcx, QWORD PTR -16[rbp]
mov rdx, QWORD PTR -8[rbp]
mov r8, rsi
lea rsi, .LC3[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov eax, DWORD PTR -20[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size _error, .-_error
.section .rodata
.LC4:
.string "%s: Testing fork()\n"
.LC5:
.string "fork"
.LC6:
.string "waitpid"
.text
.type _fork, @function
_fork:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -20[rbp], 42
mov rax, QWORD PTR -40[rbp]
mov rsi, rax
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
call fork@PLT
mov DWORD PTR -16[rbp], eax
cmp DWORD PTR -16[rbp], -1
jne .L12
mov rax, QWORD PTR -40[rbp]
mov edx, 4
lea rsi, .LC5[rip]
mov rdi, rax
call _error
jmp .L19
.L12:
cmp DWORD PTR -16[rbp], 0
jne .L14
mov eax, DWORD PTR -20[rbp]
mov edi, eax
call _exit@PLT
.L14:
lea rcx, -24[rbp]
mov eax, DWORD PTR -16[rbp]
mov edx, 0
mov rsi, rcx
mov edi, eax
call waitpid@PLT
mov DWORD PTR -12[rbp], eax
cmp DWORD PTR -12[rbp], -1
je .L22
mov eax, DWORD PTR -12[rbp]
cmp eax, DWORD PTR -16[rbp]
jne .L23
mov eax, DWORD PTR -24[rbp]
and eax, 127
test eax, eax
jne .L14
mov eax, DWORD PTR -24[rbp]
sar eax, 8
movzx eax, al
cmp DWORD PTR -20[rbp], eax
jne .L14
mov eax, 0
jmp .L19
.L23:
nop
jmp .L14
.L22:
nop
mov rax, QWORD PTR -40[rbp]
mov edx, 8
lea rsi, .LC6[rip]
mov rdi, rax
call _error
.L19:
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L20
call __stack_chk_fail@PLT
.L20:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size _fork, .-_fork
.section .rodata
.LC7:
.string ""
.LC8:
.string "%s: Testing getgroups()\n"
.LC9:
.string "getgroups"
.LC10:
.string "malloc"
.LC11:
.string "Groups: "
.LC12:
.string "%s%u"
.LC13:
.string ", "
.text
.type _getgroups, @function
_getgroups:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
lea rax, .LC7[rip]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -40[rbp]
mov rsi, rax
lea rdi, .LC8[rip]
mov eax, 0
call printf@PLT
mov esi, 0
mov edi, 0
call getgroups@PLT
mov DWORD PTR -20[rbp], eax
cmp DWORD PTR -20[rbp], 0
jns .L25
mov rax, QWORD PTR -40[rbp]
mov edx, 16
lea rsi, .LC9[rip]
mov rdi, rax
call _error
jmp .L26
.L25:
cmp DWORD PTR -20[rbp], 0
jne .L27
mov eax, 0
jmp .L26
.L27:
mov eax, DWORD PTR -20[rbp]
cdqe
sal rax, 2
mov rdi, rax
call malloc@PLT
mov QWORD PTR -8[rbp], rax
cmp QWORD PTR -8[rbp], 0
jne .L28
mov rax, QWORD PTR -40[rbp]
mov edx, 16
lea rsi, .LC10[rip]
mov rdi, rax
call _error
jmp .L26
.L28:
mov rdx, QWORD PTR -8[rbp]
mov eax, DWORD PTR -20[rbp]
mov rsi, rdx
mov edi, eax
call getgroups@PLT
mov DWORD PTR -20[rbp], eax
cmp DWORD PTR -20[rbp], 0
jns .L29
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call free@PLT
mov rax, QWORD PTR -40[rbp]
mov edx, 16
lea rsi, .LC9[rip]
mov rdi, rax
call _error
jmp .L26
.L29:
lea rdi, .LC11[rip]
mov eax, 0
call printf@PLT
mov DWORD PTR -24[rbp], 0
jmp .L30
.L31:
mov eax, DWORD PTR -24[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -8[rbp]
add rax, rdx
mov edx, DWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
mov rsi, rax
lea rdi, .LC12[rip]
mov eax, 0
call printf@PLT
lea rax, .LC13[rip]
mov QWORD PTR -16[rbp], rax
add DWORD PTR -24[rbp], 1
.L30:
mov eax, DWORD PTR -24[rbp]
cmp eax, DWORD PTR -20[rbp]
jl .L31
mov edi, 10
call putchar@PLT
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call free@PLT
mov eax, 0
.L26:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size _getgroups, .-_getgroups
.section .rodata
.LC14:
.string "%s: Testing gethostname()\n"
.LC15:
.string "gethostname"
.LC16:
.string "hostname: %s\n"
.text
.type _gethostname, @function
_gethostname:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 96
mov QWORD PTR -88[rbp], rdi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rax, QWORD PTR -88[rbp]
mov rsi, rax
lea rdi, .LC14[rip]
mov eax, 0
call printf@PLT
lea rax, -80[rbp]
mov esi, 64
mov rdi, rax
call gethostname@PLT
test eax, eax
je .L33
mov rax, QWORD PTR -88[rbp]
mov edx, 32
lea rsi, .LC15[rip]
mov rdi, rax
call _error
jmp .L35
.L33:
lea rax, -80[rbp]
mov rsi, rax
lea rdi, .LC16[rip]
mov eax, 0
call printf@PLT
mov eax, 0
.L35:
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L36
call __stack_chk_fail@PLT
.L36:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size _gethostname, .-_gethostname
.section .rodata
.LC17:
.string "%s: Testing sleep()\n"
.text
.type _sleep, @function
_sleep:
.LFB11:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov DWORD PTR -44[rbp], esi
mov rax, QWORD PTR -40[rbp]
mov rsi, rax
lea rdi, .LC17[rip]
mov eax, 0
call printf@PLT
mov edi, 0
call time@PLT
mov QWORD PTR -16[rbp], rax
mov eax, DWORD PTR -44[rbp]
mov edi, eax
call sleep@PLT
mov DWORD PTR -20[rbp], eax
mov edi, 0
call time@PLT
mov QWORD PTR -8[rbp], rax
cmp DWORD PTR -20[rbp], 0
jne .L38
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR -16[rbp]
mov rdx, rax
mov eax, DWORD PTR -44[rbp]
cmp rdx, rax
jne .L39
mov eax, 0
jmp .L41
.L39:
mov eax, 64
jmp .L41
.L38:
mov eax, 0
.L41:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE11:
.size _sleep, .-_sleep
.globl main
.type main, @function
main:
.LFB12:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov DWORD PTR -20[rbp], edi
mov QWORD PTR -32[rbp], rsi
mov rax, QWORD PTR -32[rbp]
mov rax, QWORD PTR [rax]
mov rdi, rax
call _chroot
mov DWORD PTR -4[rbp], eax
mov rax, QWORD PTR -32[rbp]
mov rax, QWORD PTR [rax]
mov rdi, rax
call _fork
or DWORD PTR -4[rbp], eax
mov rax, QWORD PTR -32[rbp]
mov rax, QWORD PTR [rax]
mov rdi, rax
call _getgroups
or DWORD PTR -4[rbp], eax
mov rax, QWORD PTR -32[rbp]
mov rax, QWORD PTR [rax]
mov rdi, rax
call _gethostname
or DWORD PTR -4[rbp], eax
mov rax, QWORD PTR -32[rbp]
mov rax, QWORD PTR [rax]
mov esi, 0
mov rdi, rax
call _sleep
or DWORD PTR -4[rbp], eax
mov rax, QWORD PTR -32[rbp]
mov rax, QWORD PTR [rax]
mov esi, 1
mov rdi, rax
call _sleep
or DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -4[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE12:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "453937.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "%s: Testing chroot()\012\000"
.align 2
.LC1:
.ascii "strdup\000"
.align 2
.LC2:
.ascii "chroot\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type _chroot, %function
_chroot:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
ldr r1, [fp, #-24]
ldr r0, .L9
bl printf
ldr r0, [fp, #-24]
bl strdup
mov r3, r0
str r3, [fp, #-16]
ldr r3, [fp, #-16]
cmp r3, #0
bne .L2
mov r2, #2
ldr r1, .L9+4
ldr r0, [fp, #-24]
bl _error
mov r3, r0
b .L3
.L2:
ldr r0, [fp, #-16]
bl dirname
str r0, [fp, #-12]
ldr r0, [fp, #-12]
bl chroot
str r0, [fp, #-8]
ldr r0, [fp, #-16]
bl free
ldr r3, [fp, #-8]
cmp r3, #0
beq .L7
bl __errno_location
mov r3, r0
ldr r3, [r3]
cmp r3, #1
beq .L8
cmp r3, #38
beq .L8
mov r2, #3
ldr r1, .L9+8
ldr r0, [fp, #-24]
bl _error
mov r3, r0
b .L3
.L7:
nop
b .L4
.L8:
nop
.L4:
mov r3, #0
.L3:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L10:
.align 2
.L9:
.word .LC0
.word .LC1
.word .LC2
.size _chroot, .-_chroot
.section .rodata
.align 2
.LC3:
.ascii "%s: %s: %s\012\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type _error, %function
_error:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #28
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, .L13
ldr r4, [r3]
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r0, r3
bl strerror
mov r3, r0
str r3, [sp]
ldr r3, [fp, #-20]
ldr r2, [fp, #-16]
ldr r1, .L13+4
mov r0, r4
bl fprintf
ldr r3, [fp, #-24]
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.L14:
.align 2
.L13:
.word stderr
.word .LC3
.size _error, .-_error
.section .rodata
.align 2
.LC4:
.ascii "%s: Testing fork()\012\000"
.align 2
.LC5:
.ascii "fork\000"
.align 2
.LC6:
.ascii "waitpid\000"
.align 2
.LC7:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type _fork, %function
_fork:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-32]
ldr r3, .L28
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #42
str r3, [fp, #-20]
ldr r1, [fp, #-32]
ldr r0, .L28+4
bl printf
bl fork
mov r3, r0
str r3, [fp, #-16]
ldr r3, [fp, #-16]
cmn r3, #1
bne .L16
mov r2, #4
ldr r1, .L28+8
ldr r0, [fp, #-32]
bl _error
mov r3, r0
b .L23
.L16:
ldr r3, [fp, #-16]
cmp r3, #0
bne .L18
ldr r0, [fp, #-20]
bl _exit
.L18:
sub r3, fp, #24
mov r2, #0
mov r1, r3
ldr r0, [fp, #-16]
bl waitpid
str r0, [fp, #-12]
ldr r3, [fp, #-12]
cmn r3, #1
beq .L26
ldr r2, [fp, #-12]
ldr r3, [fp, #-16]
cmp r2, r3
bne .L27
ldr r3, [fp, #-24]
and r3, r3, #127
cmp r3, #0
bne .L18
ldr r3, [fp, #-24]
asr r3, r3, #8
and r3, r3, #255
ldr r2, [fp, #-20]
cmp r2, r3
bne .L18
mov r3, #0
b .L23
.L27:
nop
b .L18
.L26:
nop
mov r2, #8
ldr r1, .L28+12
ldr r0, [fp, #-32]
bl _error
mov r3, r0
.L23:
ldr r2, .L28
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L24
bl __stack_chk_fail
.L24:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L29:
.align 2
.L28:
.word .LC7
.word .LC4
.word .LC5
.word .LC6
.size _fork, .-_fork
.section .rodata
.align 2
.LC8:
.ascii "\000"
.align 2
.LC9:
.ascii "%s: Testing getgroups()\012\000"
.align 2
.LC10:
.ascii "getgroups\000"
.align 2
.LC11:
.ascii "malloc\000"
.align 2
.LC12:
.ascii "Groups: \000"
.align 2
.LC13:
.ascii "%s%u\000"
.align 2
.LC14:
.ascii ", \000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type _getgroups, %function
_getgroups:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
ldr r3, .L38
str r3, [fp, #-16]
ldr r1, [fp, #-24]
ldr r0, .L38+4
bl printf
mov r1, #0
mov r0, #0
bl getgroups
str r0, [fp, #-12]
ldr r3, [fp, #-12]
cmp r3, #0
bge .L31
mov r2, #16
ldr r1, .L38+8
ldr r0, [fp, #-24]
bl _error
mov r3, r0
b .L32
.L31:
ldr r3, [fp, #-12]
cmp r3, #0
bne .L33
mov r3, #0
b .L32
.L33:
ldr r3, [fp, #-12]
lsl r3, r3, #2
mov r0, r3
bl malloc
mov r3, r0
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
bne .L34
mov r2, #16
ldr r1, .L38+12
ldr r0, [fp, #-24]
bl _error
mov r3, r0
b .L32
.L34:
ldr r1, [fp, #-8]
ldr r0, [fp, #-12]
bl getgroups
str r0, [fp, #-12]
ldr r3, [fp, #-12]
cmp r3, #0
bge .L35
ldr r0, [fp, #-8]
bl free
mov r2, #16
ldr r1, .L38+8
ldr r0, [fp, #-24]
bl _error
mov r3, r0
b .L32
.L35:
ldr r0, .L38+16
bl printf
mov r3, #0
str r3, [fp, #-20]
b .L36
.L37:
ldr r3, [fp, #-20]
lsl r3, r3, #2
ldr r2, [fp, #-8]
add r3, r2, r3
ldr r3, [r3]
mov r2, r3
ldr r1, [fp, #-16]
ldr r0, .L38+20
bl printf
ldr r3, .L38+24
str r3, [fp, #-16]
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L36:
ldr r2, [fp, #-20]
ldr r3, [fp, #-12]
cmp r2, r3
blt .L37
mov r0, #10
bl putchar
ldr r0, [fp, #-8]
bl free
mov r3, #0
.L32:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L39:
.align 2
.L38:
.word .LC8
.word .LC9
.word .LC10
.word .LC11
.word .LC12
.word .LC13
.word .LC14
.size _getgroups, .-_getgroups
.section .rodata
.align 2
.LC15:
.ascii "%s: Testing gethostname()\012\000"
.align 2
.LC16:
.ascii "gethostname\000"
.align 2
.LC17:
.ascii "hostname: %s\012\000"
.align 2
.LC18:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type _gethostname, %function
_gethostname:
@ args = 0, pretend = 0, frame = 80
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #80
str r0, [fp, #-80]
ldr r3, .L45
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r1, [fp, #-80]
ldr r0, .L45+4
bl printf
sub r3, fp, #72
mov r1, #64
mov r0, r3
bl gethostname
mov r3, r0
cmp r3, #0
beq .L41
mov r2, #32
ldr r1, .L45+8
ldr r0, [fp, #-80]
bl _error
mov r3, r0
b .L43
.L41:
sub r3, fp, #72
mov r1, r3
ldr r0, .L45+12
bl printf
mov r3, #0
.L43:
ldr r2, .L45
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L44
bl __stack_chk_fail
.L44:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L46:
.align 2
.L45:
.word .LC18
.word .LC15
.word .LC16
.word .LC17
.size _gethostname, .-_gethostname
.section .rodata
.align 2
.LC19:
.ascii "%s: Testing sleep()\012\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type _sleep, %function
_sleep:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
str r1, [fp, #-28]
ldr r1, [fp, #-24]
ldr r0, .L52
bl printf
mov r0, #0
bl time
str r0, [fp, #-16]
ldr r0, [fp, #-28]
bl sleep
mov r3, r0
str r3, [fp, #-12]
mov r0, #0
bl time
str r0, [fp, #-8]
ldr r3, [fp, #-12]
cmp r3, #0
bne .L48
ldr r2, [fp, #-8]
ldr r3, [fp, #-16]
sub r2, r2, r3
ldr r3, [fp, #-28]
cmp r2, r3
bne .L49
mov r3, #0
b .L51
.L49:
mov r3, #64
b .L51
.L48:
mov r3, #0
.L51:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L53:
.align 2
.L52:
.word .LC19
.size _sleep, .-_sleep
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-20]
ldr r3, [r3]
mov r0, r3
bl _chroot
str r0, [fp, #-8]
ldr r3, [fp, #-20]
ldr r3, [r3]
mov r0, r3
bl _fork
mov r2, r0
ldr r3, [fp, #-8]
orr r3, r3, r2
str r3, [fp, #-8]
ldr r3, [fp, #-20]
ldr r3, [r3]
mov r0, r3
bl _getgroups
mov r2, r0
ldr r3, [fp, #-8]
orr r3, r3, r2
str r3, [fp, #-8]
ldr r3, [fp, #-20]
ldr r3, [r3]
mov r0, r3
bl _gethostname
mov r2, r0
ldr r3, [fp, #-8]
orr r3, r3, r2
str r3, [fp, #-8]
ldr r3, [fp, #-20]
ldr r3, [r3]
mov r1, #0
mov r0, r3
bl _sleep
mov r2, r0
ldr r3, [fp, #-8]
orr r3, r3, r2
str r3, [fp, #-8]
ldr r3, [fp, #-20]
ldr r3, [r3]
mov r1, #1
mov r0, r3
bl _sleep
mov r2, r0
ldr r3, [fp, #-8]
orr r3, r3, r2
str r3, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1004326.c"
.intel_syntax noprefix
.text
.globl unlink
.type unlink, @function
unlink:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov rsi, rax
mov edi, 87
mov eax, 0
call syscall@PLT
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size unlink, .-unlink
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1004326.c"
.text
.align 2
.global unlink
.syntax unified
.arm
.fpu softvfp
.type unlink, %function
unlink:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r1, [fp, #-8]
mov r0, #10
bl syscall
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size unlink, .-unlink
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "220814.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "*\t"
.text
.globl Pattern
.type Pattern, @function
Pattern:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov DWORD PTR -20[rbp], edi
mov DWORD PTR -24[rbp], esi
mov DWORD PTR -8[rbp], 0
mov DWORD PTR -4[rbp], 0
mov eax, DWORD PTR -20[rbp]
cmp eax, DWORD PTR -24[rbp]
jne .L8
mov edi, 10
call putchar@PLT
mov eax, DWORD PTR -20[rbp]
mov DWORD PTR -8[rbp], eax
jmp .L4
.L7:
mov DWORD PTR -4[rbp], 1
jmp .L5
.L6:
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -4[rbp], 1
.L5:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -8[rbp]
jle .L6
mov edi, 10
call putchar@PLT
sub DWORD PTR -8[rbp], 1
.L4:
cmp DWORD PTR -8[rbp], 0
jg .L7
jmp .L1
.L8:
nop
.L1:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size Pattern, .-Pattern
.section .rodata
.LC1:
.string "Enter Number of rows : "
.LC2:
.string "%u"
.LC3:
.string "Enter Number of cols : "
.text
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -16[rbp], 0
mov DWORD PTR -12[rbp], 0
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
lea rax, -16[rbp]
mov rsi, rax
lea rdi, .LC2[rip]
mov eax, 0
call __isoc99_scanf@PLT
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
lea rax, -12[rbp]
mov rsi, rax
lea rdi, .LC2[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov edx, DWORD PTR -12[rbp]
mov eax, DWORD PTR -16[rbp]
mov esi, edx
mov edi, eax
call Pattern
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L11
call __stack_chk_fail@PLT
.L11:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "220814.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "*\011\000"
.text
.align 2
.global Pattern
.syntax unified
.arm
.fpu softvfp
.type Pattern, %function
Pattern:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r3, #0
str r3, [fp, #-12]
mov r3, #0
str r3, [fp, #-8]
ldr r2, [fp, #-16]
ldr r3, [fp, #-20]
cmp r2, r3
bne .L8
mov r0, #10
bl putchar
ldr r3, [fp, #-16]
str r3, [fp, #-12]
b .L4
.L7:
mov r3, #1
str r3, [fp, #-8]
b .L5
.L6:
ldr r0, .L9
bl printf
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L5:
ldr r2, [fp, #-8]
ldr r3, [fp, #-12]
cmp r2, r3
ble .L6
mov r0, #10
bl putchar
ldr r3, [fp, #-12]
sub r3, r3, #1
str r3, [fp, #-12]
.L4:
ldr r3, [fp, #-12]
cmp r3, #0
bgt .L7
b .L1
.L8:
nop
.L1:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L10:
.align 2
.L9:
.word .LC0
.size Pattern, .-Pattern
.section .rodata
.align 2
.LC1:
.ascii "Enter Number of rows : \000"
.align 2
.LC2:
.ascii "%u\000"
.align 2
.LC3:
.ascii "Enter Number of cols : \000"
.align 2
.LC4:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
ldr r3, .L14
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-16]
mov r3, #0
str r3, [fp, #-12]
ldr r0, .L14+4
bl printf
sub r3, fp, #16
mov r1, r3
ldr r0, .L14+8
bl __isoc99_scanf
ldr r0, .L14+12
bl printf
sub r3, fp, #12
mov r1, r3
ldr r0, .L14+8
bl __isoc99_scanf
ldr r3, [fp, #-16]
ldr r2, [fp, #-12]
mov r1, r2
mov r0, r3
bl Pattern
mov r3, #0
ldr r2, .L14
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L13
bl __stack_chk_fail
.L13:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L15:
.align 2
.L14:
.word .LC4
.word .LC1
.word .LC2
.word .LC3
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "341223.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "Digite uma string: "
.LC1:
.string "%s"
.align 8
.LC2:
.string "string1 \303\251: %s\nstring2 is: %s\nstring1 com espa\303\247os entre caracteres \303\251:\n"
.LC3:
.string "%c "
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
movabs rax, 7791341079264130163
mov QWORD PTR -47[rbp], rax
mov DWORD PTR -39[rbp], 1919251561
mov WORD PTR -35[rbp], 27745
mov BYTE PTR -33[rbp], 0
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
lea rax, -32[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
lea rdx, -47[rbp]
lea rax, -32[rbp]
mov rsi, rax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
mov DWORD PTR -52[rbp], 0
jmp .L2
.L3:
mov eax, DWORD PTR -52[rbp]
cdqe
movzx eax, BYTE PTR -32[rbp+rax]
movsx eax, al
mov esi, eax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -52[rbp], 1
.L2:
mov eax, DWORD PTR -52[rbp]
cdqe
movzx eax, BYTE PTR -32[rbp+rax]
test al, al
jne .L3
mov edi, 10
call putchar@PLT
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L5
call __stack_chk_fail@PLT
.L5:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "341223.c"
.text
.section .rodata
.align 2
.LC1:
.ascii "Digite uma string: \000"
.align 2
.LC2:
.ascii "%s\000"
.align 2
.LC3:
.ascii "string1 \303\251: %s\012string2 is: %s\012string1 c"
.ascii "om espa\303\247os entre caracteres \303\251:\012\000"
.align 2
.LC4:
.ascii "%c \000"
.align 2
.LC0:
.ascii "string literal\000"
.align 2
.LC5:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
ldr r3, .L6
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, .L6+4
sub ip, fp, #44
ldm r3, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2}
strh r3, [ip] @ movhi
add ip, ip, #2
lsr r3, r3, #16
strb r3, [ip]
ldr r0, .L6+8
bl printf
sub r3, fp, #28
mov r1, r3
ldr r0, .L6+12
bl __isoc99_scanf
sub r2, fp, #44
sub r3, fp, #28
mov r1, r3
ldr r0, .L6+16
bl printf
mov r3, #0
str r3, [fp, #-48]
b .L2
.L3:
sub r2, fp, #28
ldr r3, [fp, #-48]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
mov r1, r3
ldr r0, .L6+20
bl printf
ldr r3, [fp, #-48]
add r3, r3, #1
str r3, [fp, #-48]
.L2:
sub r2, fp, #28
ldr r3, [fp, #-48]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L3
mov r0, #10
bl putchar
mov r3, #0
ldr r2, .L6
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L5
bl __stack_chk_fail
.L5:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L7:
.align 2
.L6:
.word .LC5
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "366565.c"
.intel_syntax noprefix
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov BYTE PTR -1[rbp], 65
jmp .L2
.L7:
movsx eax, BYTE PTR -1[rbp]
cmp eax, 68
jg .L3
cmp eax, 65
jge .L4
jmp .L5
.L3:
sub eax, 69
cmp eax, 1
ja .L5
jmp .L9
.L4:
movzx eax, BYTE PTR -1[rbp]
add eax, 1
mov BYTE PTR -1[rbp], al
jmp .L5
.L9:
movzx eax, BYTE PTR -1[rbp]
add eax, 1
mov BYTE PTR -1[rbp], al
.L5:
movsx eax, BYTE PTR -1[rbp]
mov edi, eax
call putchar@PLT
.L2:
cmp BYTE PTR -1[rbp], 70
jle .L7
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "366565.c"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
mov r3, #65
strb r3, [fp, #-5]
b .L2
.L7:
ldrb r3, [fp, #-5] @ zero_extendqisi2
cmp r3, #68
bgt .L3
cmp r3, #65
bge .L4
b .L5
.L3:
sub r3, r3, #69
cmp r3, #1
bhi .L5
b .L9
.L4:
ldrb r3, [fp, #-5] @ zero_extendqisi2
add r3, r3, #1
strb r3, [fp, #-5]
b .L5
.L9:
ldrb r3, [fp, #-5] @ zero_extendqisi2
add r3, r3, #1
strb r3, [fp, #-5]
.L5:
ldrb r3, [fp, #-5] @ zero_extendqisi2
mov r0, r3
bl putchar
.L2:
ldrb r3, [fp, #-5] @ zero_extendqisi2
cmp r3, #70
bls .L7
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "696924.c"
.intel_syntax noprefix
.text
.globl pow_mod
.type pow_mod, @function
pow_mod:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov QWORD PTR -40[rbp], rdx
mov QWORD PTR -8[rbp], 1
jmp .L2
.L4:
mov rax, QWORD PTR -32[rbp]
and eax, 1
test rax, rax
je .L3
mov rax, QWORD PTR -8[rbp]
imul rax, QWORD PTR -24[rbp]
cqo
idiv QWORD PTR -40[rbp]
mov QWORD PTR -8[rbp], rdx
.L3:
mov rax, QWORD PTR -24[rbp]
imul rax, rax
cqo
idiv QWORD PTR -40[rbp]
mov QWORD PTR -24[rbp], rdx
mov rax, QWORD PTR -32[rbp]
mov rdx, rax
shr rdx, 63
add rax, rdx
sar rax
mov QWORD PTR -32[rbp], rax
.L2:
cmp QWORD PTR -32[rbp], 0
jne .L4
mov rax, QWORD PTR -8[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size pow_mod, .-pow_mod
.section .rodata
.LC0:
.string "%lld is a Jimmy-number\n"
.LC1:
.string "%lld is not a Jimmy-number\n"
.LC2:
.string "%lld"
.text
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
jmp .L7
.L10:
mov rax, QWORD PTR -16[rbp]
mov rdx, QWORD PTR -16[rbp]
lea rcx, -1[rdx]
mov rdx, rax
mov rsi, rcx
mov edi, 2
call pow_mod
cmp rax, 1
jne .L8
mov rax, QWORD PTR -16[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
jmp .L7
.L8:
mov rax, QWORD PTR -16[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
.L7:
lea rax, -16[rbp]
mov rsi, rax
lea rdi, .LC2[rip]
mov eax, 0
call __isoc99_scanf@PLT
cmp eax, 1
jne .L9
mov rax, QWORD PTR -16[rbp]
cmp rax, -1
jne .L10
.L9:
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L12
call __stack_chk_fail@PLT
.L12:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "696924.c"
.text
.global __aeabi_ldivmod
.align 2
.global pow_mod
.syntax unified
.arm
.fpu softvfp
.type pow_mod, %function
pow_mod:
@ args = 8, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, fp, lr}
add fp, sp, #20
sub sp, sp, #24
str r0, [fp, #-36]
str r1, [fp, #-32]
str r2, [fp, #-44]
str r3, [fp, #-40]
mov r2, #1
mov r3, #0
str r2, [fp, #-28]
str r3, [fp, #-24]
b .L2
.L4:
sub r3, fp, #44
ldmia r3, {r2-r3}
mov r0, #1
mov r1, #0
and r6, r2, r0
and r7, r3, r1
orrs r3, r6, r7
beq .L3
ldr r3, [fp, #-24]
ldr r2, [fp, #-36]
mul r2, r3, r2
ldr r3, [fp, #-32]
ldr r1, [fp, #-28]
mul r3, r1, r3
add r3, r2, r3
ldr ip, [fp, #-28]
ldr r2, [fp, #-36]
umull r0, r1, ip, r2
add r3, r3, r1
mov r1, r3
ldmib fp, {r2-r3}
bl __aeabi_ldivmod
str r2, [fp, #-28]
str r3, [fp, #-24]
.L3:
ldr r3, [fp, #-32]
ldr r2, [fp, #-36]
mul r2, r3, r2
ldr r3, [fp, #-32]
ldr r1, [fp, #-36]
mul r3, r1, r3
add r2, r2, r3
ldr r3, [fp, #-36]
umull r0, r1, r3, r3
add r3, r2, r1
mov r1, r3
ldmib fp, {r2-r3}
bl __aeabi_ldivmod
str r2, [fp, #-36]
str r3, [fp, #-32]
sub r3, fp, #44
ldmia r3, {r2-r3}
lsr r1, r3, #31
mov r0, r1
mov r1, #0
adds r4, r0, r2
adc r5, r1, r3
mov r2, #0
mov r3, #0
lsr r2, r4, #1
orr r2, r2, r5, lsl #31
asr r3, r5, #1
str r2, [fp, #-44]
str r3, [fp, #-40]
.L2:
sub r3, fp, #44
ldmia r3, {r2-r3}
orrs r3, r2, r3
bne .L4
sub r3, fp, #28
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
sub sp, fp, #20
@ sp needed
pop {r4, r5, r6, r7, fp, pc}
.size pow_mod, .-pow_mod
.section .rodata
.align 2
.LC0:
.ascii "%lld is a Jimmy-number\012\000"
.align 2
.LC1:
.ascii "%lld is not a Jimmy-number\012\000"
.align 2
.LC2:
.ascii "%lld\000"
.align 2
.LC3:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #24
ldr r3, .L13
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
b .L7
.L10:
sub r3, fp, #28
ldmia r3, {r2-r3}
subs r4, r2, #1
sbc r5, r3, #0
sub r3, fp, #28
ldmia r3, {r2-r3}
stm sp, {r2-r3}
mov r2, r4
mov r3, r5
mov r0, #2
mov r1, #0
bl pow_mod
mov r2, r0
mov r3, r1
cmp r3, #0
cmpeq r2, #1
bne .L8
sub r3, fp, #28
ldmia r3, {r2-r3}
ldr r0, .L13+4
bl printf
b .L7
.L8:
sub r3, fp, #28
ldmia r3, {r2-r3}
ldr r0, .L13+8
bl printf
.L7:
sub r3, fp, #28
mov r1, r3
ldr r0, .L13+12
bl __isoc99_scanf
mov r3, r0
cmp r3, #1
bne .L9
sub r3, fp, #28
ldmia r3, {r2-r3}
mvn r0, #0
mvn r1, #0
cmp r3, r1
cmpeq r2, r0
bne .L10
.L9:
mov r3, #0
ldr r2, .L13
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L12
bl __stack_chk_fail
.L12:
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.L14:
.align 2
.L13:
.word .LC3
.word .LC0
.word .LC1
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "822539.c"
.intel_syntax noprefix
.text
.globl RandomFunc
.type RandomFunc, @function
RandomFunc:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov rax, QWORD PTR -24[rbp]
movzx eax, WORD PTR [rax]
add ax, 29334
mov WORD PTR -10[rbp], ax
mov WORD PTR -12[rbp], 0
jmp .L2
.L5:
mov WORD PTR -14[rbp], 0
jmp .L3
.L4:
movzx eax, WORD PTR -12[rbp]
cdqe
movzx ecx, WORD PTR -10[rbp+rax*2]
movzx eax, WORD PTR -14[rbp]
cdqe
movzx edx, WORD PTR -10[rbp+rax*2]
movzx eax, WORD PTR -12[rbp]
or edx, ecx
cdqe
mov WORD PTR -10[rbp+rax*2], dx
add WORD PTR -14[rbp], 2
.L3:
mov rax, QWORD PTR -24[rbp]
add rax, 2
movzx eax, WORD PTR [rax]
cmp WORD PTR -14[rbp], ax
jb .L4
movzx eax, WORD PTR -12[rbp]
add eax, 1
mov WORD PTR -12[rbp], ax
.L2:
mov rax, QWORD PTR -24[rbp]
add rax, 2
movzx eax, WORD PTR [rax]
cmp WORD PTR -12[rbp], ax
jb .L5
movzx eax, WORD PTR -10[rbp]
xor ax, -5336
mov edx, eax
mov rax, QWORD PTR -32[rbp]
mov WORD PTR [rax], dx
nop
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
je .L6
call __stack_chk_fail@PLT
.L6:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size RandomFunc, .-RandomFunc
.section .rodata
.align 8
.LC0:
.string "Call this program with %i arguments\n"
.LC1:
.string "You win!"
.LC2:
.string "%u\n"
.text
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov DWORD PTR -36[rbp], edi
mov QWORD PTR -48[rbp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
call megaInit
cmp DWORD PTR -36[rbp], 2
je .L8
mov esi, 1
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov edi, -1
call exit@PLT
.L8:
mov DWORD PTR -20[rbp], 0
jmp .L9
.L10:
mov eax, DWORD PTR -20[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov edx, 10
mov esi, 0
mov rdi, rax
call strtoul@PLT
mov WORD PTR -22[rbp], ax
mov eax, DWORD PTR -20[rbp]
cdqe
movzx edx, WORD PTR -22[rbp]
mov WORD PTR -12[rbp+rax*2], dx
add DWORD PTR -20[rbp], 1
.L9:
cmp DWORD PTR -20[rbp], 0
jle .L10
lea rdx, -10[rbp]
lea rax, -12[rbp]
mov rsi, rdx
mov rdi, rax
call RandomFunc
movzx eax, WORD PTR -10[rbp]
cmp ax, 31026
jne .L11
lea rdi, .LC1[rip]
call puts@PLT
.L11:
mov DWORD PTR -16[rbp], 0
jmp .L12
.L13:
mov eax, DWORD PTR -16[rbp]
cdqe
movzx eax, WORD PTR -10[rbp+rax*2]
movzx eax, ax
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -16[rbp], 1
.L12:
cmp DWORD PTR -16[rbp], 0
jle .L13
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L15
call __stack_chk_fail@PLT
.L15:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size main, .-main
.globl megaInit
.type megaInit, @function
megaInit:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size megaInit, .-megaInit
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "822539.c"
.text
.section .rodata
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global RandomFunc
.syntax unified
.arm
.fpu softvfp
.type RandomFunc, %function
RandomFunc:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
str r1, [fp, #-28]
ldr r3, .L7
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, [fp, #-24]
ldrh r3, [r3]
add r3, r3, #29184
add r3, r3, #150
lsl r3, r3, #16
lsr r3, r3, #16
strh r3, [fp, #-12] @ movhi
mov r3, #0
strh r3, [fp, #-14] @ movhi
b .L2
.L5:
mov r3, #0
strh r3, [fp, #-16] @ movhi
b .L3
.L4:
ldrh r3, [fp, #-14]
lsl r3, r3, #1
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #8
ldrh r1, [r3]
ldrh r3, [fp, #-16]
lsl r3, r3, #1
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #8
ldrh r2, [r3]
ldrh r3, [fp, #-14]
orr r2, r1, r2
lsl r2, r2, #16
lsr r2, r2, #16
lsl r3, r3, #1
sub r1, fp, #4
add r3, r1, r3
sub r3, r3, #8
strh r2, [r3] @ movhi
ldrh r3, [fp, #-16] @ movhi
add r3, r3, #2
strh r3, [fp, #-16] @ movhi
.L3:
ldr r3, [fp, #-24]
add r3, r3, #2
ldrh r3, [r3]
ldrh r2, [fp, #-16]
cmp r2, r3
bcc .L4
ldrh r3, [fp, #-14]
add r3, r3, #1
strh r3, [fp, #-14] @ movhi
.L2:
ldr r3, [fp, #-24]
add r3, r3, #2
ldrh r3, [r3]
ldrh r2, [fp, #-14]
cmp r2, r3
bcc .L5
ldrh r2, [fp, #-12]
ldr r3, .L7+4
eor r3, r3, r2
lsl r3, r3, #16
lsr r2, r3, #16
ldr r3, [fp, #-28]
strh r2, [r3] @ movhi
nop
ldr r3, .L7
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L6
bl __stack_chk_fail
.L6:
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L8:
.align 2
.L7:
.word .LC0
.word -5336
.size RandomFunc, .-RandomFunc
.section .rodata
.align 2
.LC1:
.ascii "Call this program with %i arguments\012\000"
.align 2
.LC2:
.ascii "You win!\000"
.align 2
.LC3:
.ascii "%u\012\000"
.align 2
.LC4:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-32]
str r1, [fp, #-36]
ldr r3, .L18
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
bl megaInit
ldr r3, [fp, #-32]
cmp r3, #2
beq .L10
mov r1, #1
ldr r0, .L18+4
bl printf
mvn r0, #0
bl exit
.L10:
mov r3, #0
str r3, [fp, #-24]
b .L11
.L12:
ldr r3, [fp, #-24]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-36]
add r3, r2, r3
ldr r3, [r3]
mov r2, #10
mov r1, #0
mov r0, r3
bl strtoul
mov r3, r0
strh r3, [fp, #-26] @ movhi
ldr r3, [fp, #-24]
lsl r3, r3, #1
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #12
ldrh r2, [fp, #-26] @ movhi
strh r2, [r3] @ movhi
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L11:
ldr r3, [fp, #-24]
cmp r3, #0
ble .L12
sub r2, fp, #12
sub r3, fp, #16
mov r1, r2
mov r0, r3
bl RandomFunc
ldrh r3, [fp, #-12]
ldr r2, .L18+8
cmp r3, r2
bne .L13
ldr r0, .L18+12
bl puts
.L13:
mov r3, #0
str r3, [fp, #-20]
b .L14
.L15:
ldr r3, [fp, #-20]
lsl r3, r3, #1
sub r2, fp, #4
add r3, r2, r3
sub r3, r3, #8
ldrh r3, [r3]
mov r1, r3
ldr r0, .L18+16
bl printf
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L14:
ldr r3, [fp, #-20]
cmp r3, #0
ble .L15
mov r3, #0
ldr r2, .L18
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L17
bl __stack_chk_fail
.L17:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L19:
.align 2
.L18:
.word .LC4
.word .LC1
.word 31026
.word .LC2
.word .LC3
.size main, .-main
.align 2
.global megaInit
.syntax unified
.arm
.fpu softvfp
.type megaInit, %function
megaInit:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size megaInit, .-megaInit
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "434363.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "program"
.section .data.rel.local,"aw"
.align 8
.type program_name, @object
.size program_name, 8
program_name:
.quad .LC0
.text
.globl basename
.type basename, @function
basename:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -24[rbp]
mov esi, 47
mov rdi, rax
call strrchr@PLT
mov QWORD PTR -8[rbp], rax
cmp QWORD PTR -8[rbp], 0
jne .L2
mov rax, QWORD PTR -24[rbp]
mov esi, 92
mov rdi, rax
call strrchr@PLT
mov QWORD PTR -8[rbp], rax
.L2:
cmp QWORD PTR -8[rbp], 0
je .L3
mov rax, QWORD PTR -8[rbp]
add rax, 1
mov QWORD PTR -16[rbp], rax
.L3:
mov rax, QWORD PTR -16[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size basename, .-basename
.globl setprogname
.type setprogname, @function
setprogname:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
mov rdi, rax
call basename
mov QWORD PTR -8[rbp], rax
cmp QWORD PTR -8[rbp], 0
je .L7
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR program_name[rip], rax
.L7:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size setprogname, .-setprogname
.globl progname
.type progname, @function
progname:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov rax, QWORD PTR program_name[rip]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size progname, .-progname
.section .rodata
.LC1:
.string "ERROR: %s : "
.text
.globl error
.type error, @function
error:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 224
mov QWORD PTR -216[rbp], rdi
mov QWORD PTR -168[rbp], rsi
mov QWORD PTR -160[rbp], rdx
mov QWORD PTR -152[rbp], rcx
mov QWORD PTR -144[rbp], r8
mov QWORD PTR -136[rbp], r9
test al, al
je .L11
movaps XMMWORD PTR -128[rbp], xmm0
movaps XMMWORD PTR -112[rbp], xmm1
movaps XMMWORD PTR -96[rbp], xmm2
movaps XMMWORD PTR -80[rbp], xmm3
movaps XMMWORD PTR -64[rbp], xmm4
movaps XMMWORD PTR -48[rbp], xmm5
movaps XMMWORD PTR -32[rbp], xmm6
movaps XMMWORD PTR -16[rbp], xmm7
.L11:
mov rax, QWORD PTR fs:40
mov QWORD PTR -184[rbp], rax
xor eax, eax
mov DWORD PTR -208[rbp], 8
mov DWORD PTR -204[rbp], 48
lea rax, 16[rbp]
mov QWORD PTR -200[rbp], rax
lea rax, -176[rbp]
mov QWORD PTR -192[rbp], rax
call progname
mov rdx, rax
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC1[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov rax, QWORD PTR stderr[rip]
lea rdx, -208[rbp]
mov rcx, QWORD PTR -216[rbp]
mov rsi, rcx
mov rdi, rax
call vfprintf@PLT
nop
mov rcx, QWORD PTR -184[rbp]
sub rcx, QWORD PTR fs:40
je .L12
call __stack_chk_fail@PLT
.L12:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size error, .-error
.globl fatal
.type fatal, @function
fatal:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 224
mov QWORD PTR -216[rbp], rdi
mov QWORD PTR -168[rbp], rsi
mov QWORD PTR -160[rbp], rdx
mov QWORD PTR -152[rbp], rcx
mov QWORD PTR -144[rbp], r8
mov QWORD PTR -136[rbp], r9
test al, al
je .L14
movaps XMMWORD PTR -128[rbp], xmm0
movaps XMMWORD PTR -112[rbp], xmm1
movaps XMMWORD PTR -96[rbp], xmm2
movaps XMMWORD PTR -80[rbp], xmm3
movaps XMMWORD PTR -64[rbp], xmm4
movaps XMMWORD PTR -48[rbp], xmm5
movaps XMMWORD PTR -32[rbp], xmm6
movaps XMMWORD PTR -16[rbp], xmm7
.L14:
mov rax, QWORD PTR fs:40
mov QWORD PTR -184[rbp], rax
xor eax, eax
mov DWORD PTR -208[rbp], 8
mov DWORD PTR -204[rbp], 48
lea rax, 16[rbp]
mov QWORD PTR -200[rbp], rax
lea rax, -176[rbp]
mov QWORD PTR -192[rbp], rax
call progname
mov rdx, rax
mov rax, QWORD PTR stderr[rip]
lea rsi, .LC1[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov rax, QWORD PTR stderr[rip]
lea rdx, -208[rbp]
mov rcx, QWORD PTR -216[rbp]
mov rsi, rcx
mov rdi, rax
call vfprintf@PLT
mov edi, 1
call exit@PLT
.cfi_endproc
.LFE10:
.size fatal, .-fatal
.globl fgetline
.type fgetline, @function
fgetline:
.LFB11:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov QWORD PTR -40[rbp], rdx
mov rax, QWORD PTR -40[rbp]
sub rax, 1
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -16[rbp], 0
mov rax, QWORD PTR -24[rbp]
mov rdi, rax
call fgetc@PLT
mov DWORD PTR -12[rbp], eax
cmp DWORD PTR -12[rbp], -1
jne .L19
mov eax, -1
jmp .L18
.L21:
mov eax, DWORD PTR -16[rbp]
lea edx, 1[rax]
mov DWORD PTR -16[rbp], edx
movsx rdx, eax
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov edx, DWORD PTR -12[rbp]
mov BYTE PTR [rax], dl
mov rax, QWORD PTR -24[rbp]
mov rdi, rax
call fgetc@PLT
mov DWORD PTR -12[rbp], eax
.L19:
cmp DWORD PTR -12[rbp], -1
je .L20
cmp DWORD PTR -12[rbp], 10
je .L20
mov eax, DWORD PTR -16[rbp]
cdqe
cmp QWORD PTR -8[rbp], rax
ja .L21
.L20:
mov eax, DWORD PTR -16[rbp]
movsx rdx, eax
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov BYTE PTR [rax], 0
mov eax, DWORD PTR -16[rbp]
.L18:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE11:
.size fgetline, .-fgetline
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "434363.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "program\000"
.data
.align 2
.type program_name, %object
.size program_name, 4
program_name:
.word .LC0
.text
.align 2
.global basename
.syntax unified
.arm
.fpu softvfp
.type basename, %function
basename:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r3, [fp, #-16]
str r3, [fp, #-12]
mov r1, #47
ldr r0, [fp, #-16]
bl strrchr
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
bne .L2
mov r1, #92
ldr r0, [fp, #-16]
bl strrchr
str r0, [fp, #-8]
.L2:
ldr r3, [fp, #-8]
cmp r3, #0
beq .L3
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-12]
.L3:
ldr r3, [fp, #-12]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size basename, .-basename
.align 2
.global setprogname
.syntax unified
.arm
.fpu softvfp
.type setprogname, %function
setprogname:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r0, [fp, #-16]
bl basename
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
beq .L7
ldr r2, .L8
ldr r3, [fp, #-8]
str r3, [r2]
.L7:
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L9:
.align 2
.L8:
.word program_name
.size setprogname, .-setprogname
.align 2
.global progname
.syntax unified
.arm
.fpu softvfp
.type progname, %function
progname:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
ldr r3, .L12
ldr r3, [r3]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L13:
.align 2
.L12:
.word program_name
.size progname, .-progname
.section .rodata
.align 2
.LC1:
.ascii "ERROR: %s : \000"
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global error
.syntax unified
.arm
.fpu softvfp
.type error, %function
error:
@ args = 4, pretend = 16, frame = 16
@ frame_needed = 1, uses_anonymous_args = 1
push {r0, r1, r2, r3}
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #20
ldr r3, [fp, #4]
str r3, [fp, #-24]
ldr r3, .L16
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
add r3, fp, #8
str r3, [fp, #-20]
ldr r3, .L16+4
ldr r4, [r3]
bl progname
mov r3, r0
mov r2, r3
ldr r1, .L16+8
mov r0, r4
bl fprintf
ldr r3, .L16+4
ldr r3, [r3]
ldr r2, [fp, #-20]
ldr r1, [fp, #-24]
mov r0, r3
bl vfprintf
nop
ldr r2, .L16
ldr r1, [r2]
ldr r2, [fp, #-16]
eors r1, r2, r1
mov r2, #0
beq .L15
bl __stack_chk_fail
.L15:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, lr}
add sp, sp, #16
bx lr
.L17:
.align 2
.L16:
.word .LC2
.word stderr
.word .LC1
.size error, .-error
.section .rodata
.align 2
.LC3:
.word __stack_chk_guard
.text
.align 2
.global fatal
.syntax unified
.arm
.fpu softvfp
.type fatal, %function
fatal:
@ args = 4, pretend = 16, frame = 16
@ frame_needed = 1, uses_anonymous_args = 1
push {r0, r1, r2, r3}
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #20
ldr r3, [fp, #4]
str r3, [fp, #-24]
ldr r3, .L20
ldr r3, [r3]
str r3, [fp, #-16]
mov r3,#0
add r3, fp, #8
str r3, [fp, #-20]
ldr r3, .L20+4
ldr r4, [r3]
bl progname
mov r3, r0
mov r2, r3
ldr r1, .L20+8
mov r0, r4
bl fprintf
ldr r3, .L20+4
ldr r3, [r3]
ldr r2, [fp, #-20]
ldr r1, [fp, #-24]
mov r0, r3
bl vfprintf
mov r0, #1
bl exit
.L21:
.align 2
.L20:
.word .LC3
.word stderr
.word .LC1
.size fatal, .-fatal
.align 2
.global fgetline
.syntax unified
.arm
.fpu softvfp
.type fgetline, %function
fgetline:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
ldr r3, [fp, #-32]
sub r3, r3, #1
str r3, [fp, #-8]
mov r3, #0
str r3, [fp, #-16]
ldr r0, [fp, #-24]
bl fgetc
str r0, [fp, #-12]
ldr r3, [fp, #-12]
cmn r3, #1
bne .L25
mvn r3, #0
b .L24
.L27:
ldr r3, [fp, #-16]
add r2, r3, #1
str r2, [fp, #-16]
mov r2, r3
ldr r3, [fp, #-28]
add r3, r3, r2
ldr r2, [fp, #-12]
and r2, r2, #255
strb r2, [r3]
ldr r0, [fp, #-24]
bl fgetc
str r0, [fp, #-12]
.L25:
ldr r3, [fp, #-12]
cmn r3, #1
beq .L26
ldr r3, [fp, #-12]
cmp r3, #10
beq .L26
ldr r3, [fp, #-16]
ldr r2, [fp, #-8]
cmp r2, r3
bhi .L27
.L26:
ldr r3, [fp, #-16]
ldr r2, [fp, #-28]
add r3, r2, r3
mov r2, #0
strb r2, [r3]
ldr r3, [fp, #-16]
.L24:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size fgetline, .-fgetline
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "143030.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string ""
.align 8
.LC1:
.string "Exemplifica o uso do continue:\n"
.LC2:
.string "Mostra inteiro de 1 a 10:\n"
.LC3:
.string "%d\n"
.LC4:
.string "\n5 > 3 = %d\n"
.LC5:
.string "\n5 < 3 = %d\n"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
lea rsi, .LC0[rip]
mov edi, 6
call setlocale@PLT
lea rdi, .LC1[rip]
call puts@PLT
lea rdi, .LC2[rip]
call puts@PLT
mov DWORD PTR -4[rbp], 1
jmp .L2
.L5:
cmp DWORD PTR -4[rbp], 5
je .L7
mov eax, DWORD PTR -4[rbp]
mov esi, eax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
jmp .L4
.L7:
nop
.L4:
add DWORD PTR -4[rbp], 1
.L2:
cmp DWORD PTR -4[rbp], 10
jle .L5
mov esi, 1
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
mov esi, 0
lea rdi, .LC5[rip]
mov eax, 0
call printf@PLT
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "143030.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "\000"
.align 2
.LC1:
.ascii "Exemplifica o uso do continue:\012\000"
.align 2
.LC2:
.ascii "Mostra inteiro de 1 a 10:\012\000"
.align 2
.LC3:
.ascii "%d\012\000"
.align 2
.LC4:
.ascii "\0125 > 3 = %d\012\000"
.align 2
.LC5:
.ascii "\0125 < 3 = %d\012\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
ldr r1, .L8
mov r0, #6
bl setlocale
ldr r0, .L8+4
bl puts
ldr r0, .L8+8
bl puts
mov r3, #1
str r3, [fp, #-8]
b .L2
.L5:
ldr r3, [fp, #-8]
cmp r3, #5
beq .L7
ldr r1, [fp, #-8]
ldr r0, .L8+12
bl printf
b .L4
.L7:
nop
.L4:
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L2:
ldr r3, [fp, #-8]
cmp r3, #10
ble .L5
mov r1, #1
ldr r0, .L8+16
bl printf
mov r1, #0
ldr r0, .L8+20
bl printf
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L9:
.align 2
.L8:
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "936953.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "%u"
.LC1:
.string "%o"
.LC2:
.string "%x"
.LC3:
.string "%d"
.LC4:
.string "%i"
.LC5:
.string "%g"
.LC6:
.string "%e"
.LC7:
.string "%f"
.LC8:
.string "%p"
.text
.type minprintf, @function
minprintf:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 272
mov QWORD PTR -264[rbp], rdi
mov QWORD PTR -168[rbp], rsi
mov QWORD PTR -160[rbp], rdx
mov QWORD PTR -152[rbp], rcx
mov QWORD PTR -144[rbp], r8
mov QWORD PTR -136[rbp], r9
test al, al
je .L2
movaps XMMWORD PTR -128[rbp], xmm0
movaps XMMWORD PTR -112[rbp], xmm1
movaps XMMWORD PTR -96[rbp], xmm2
movaps XMMWORD PTR -80[rbp], xmm3
movaps XMMWORD PTR -64[rbp], xmm4
movaps XMMWORD PTR -48[rbp], xmm5
movaps XMMWORD PTR -32[rbp], xmm6
movaps XMMWORD PTR -16[rbp], xmm7
.L2:
mov rax, QWORD PTR fs:40
mov QWORD PTR -184[rbp], rax
xor eax, eax
mov DWORD PTR -208[rbp], 8
mov DWORD PTR -204[rbp], 48
lea rax, 16[rbp]
mov QWORD PTR -200[rbp], rax
lea rax, -176[rbp]
mov QWORD PTR -192[rbp], rax
mov rax, QWORD PTR -264[rbp]
mov QWORD PTR -240[rbp], rax
jmp .L3
.L43:
mov rax, QWORD PTR -240[rbp]
movzx eax, BYTE PTR [rax]
cmp al, 37
je .L4
mov rax, QWORD PTR -240[rbp]
movzx eax, BYTE PTR [rax]
movsx eax, al
mov edi, eax
call putchar@PLT
jmp .L5
.L4:
add QWORD PTR -240[rbp], 1
mov rax, QWORD PTR -240[rbp]
movzx eax, BYTE PTR [rax]
movsx eax, al
sub eax, 69
cmp eax, 51
ja .L6
mov eax, eax
lea rdx, 0[0+rax*4]
lea rax, .L8[rip]
mov eax, DWORD PTR [rdx+rax]
cdqe
lea rdx, .L8[rip]
add rax, rdx
notrack jmp rax
.section .rodata
.align 4
.align 4
.L8:
.long .L16-.L8
.long .L6-.L8
.long .L14-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L7-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L18-.L8
.long .L17-.L8
.long .L16-.L8
.long .L15-.L8
.long .L14-.L8
.long .L6-.L8
.long .L13-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L6-.L8
.long .L12-.L8
.long .L11-.L8
.long .L6-.L8
.long .L6-.L8
.long .L10-.L8
.long .L6-.L8
.long .L9-.L8
.long .L6-.L8
.long .L6-.L8
.long .L7-.L8
.text
.L18:
mov eax, DWORD PTR -208[rbp]
cmp eax, 47
ja .L19
mov rax, QWORD PTR -192[rbp]
mov edx, DWORD PTR -208[rbp]
mov edx, edx
add rax, rdx
mov edx, DWORD PTR -208[rbp]
add edx, 8
mov DWORD PTR -208[rbp], edx
jmp .L20
.L19:
mov rax, QWORD PTR -200[rbp]
lea rdx, 8[rax]
mov QWORD PTR -200[rbp], rdx
.L20:
mov eax, DWORD PTR [rax]
mov DWORD PTR -244[rbp], eax
mov eax, DWORD PTR -244[rbp]
mov edi, eax
call putchar@PLT
jmp .L5
.L9:
mov eax, DWORD PTR -208[rbp]
cmp eax, 47
ja .L21
mov rax, QWORD PTR -192[rbp]
mov edx, DWORD PTR -208[rbp]
mov edx, edx
add rax, rdx
mov edx, DWORD PTR -208[rbp]
add edx, 8
mov DWORD PTR -208[rbp], edx
jmp .L22
.L21:
mov rax, QWORD PTR -200[rbp]
lea rdx, 8[rax]
mov QWORD PTR -200[rbp], rdx
.L22:
mov eax, DWORD PTR [rax]
mov DWORD PTR -248[rbp], eax
mov eax, DWORD PTR -248[rbp]
mov esi, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
jmp .L5
.L12:
mov eax, DWORD PTR -208[rbp]
cmp eax, 47
ja .L23
mov rax, QWORD PTR -192[rbp]
mov edx, DWORD PTR -208[rbp]
mov edx, edx
add rax, rdx
mov edx, DWORD PTR -208[rbp]
add edx, 8
mov DWORD PTR -208[rbp], edx
jmp .L24
.L23:
mov rax, QWORD PTR -200[rbp]
lea rdx, 8[rax]
mov QWORD PTR -200[rbp], rdx
.L24:
mov eax, DWORD PTR [rax]
mov DWORD PTR -248[rbp], eax
mov eax, DWORD PTR -248[rbp]
mov esi, eax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
jmp .L5
.L7:
mov eax, DWORD PTR -208[rbp]
cmp eax, 47
ja .L25
mov rax, QWORD PTR -192[rbp]
mov edx, DWORD PTR -208[rbp]
mov edx, edx
add rax, rdx
mov edx, DWORD PTR -208[rbp]
add edx, 8
mov DWORD PTR -208[rbp], edx
jmp .L26
.L25:
mov rax, QWORD PTR -200[rbp]
lea rdx, 8[rax]
mov QWORD PTR -200[rbp], rdx
.L26:
mov eax, DWORD PTR [rax]
mov DWORD PTR -248[rbp], eax
mov eax, DWORD PTR -248[rbp]
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
jmp .L5
.L17:
mov eax, DWORD PTR -208[rbp]
cmp eax, 47
ja .L27
mov rax, QWORD PTR -192[rbp]
mov edx, DWORD PTR -208[rbp]
mov edx, edx
add rax, rdx
mov edx, DWORD PTR -208[rbp]
add edx, 8
mov DWORD PTR -208[rbp], edx
jmp .L28
.L27:
mov rax, QWORD PTR -200[rbp]
lea rdx, 8[rax]
mov QWORD PTR -200[rbp], rdx
.L28:
mov eax, DWORD PTR [rax]
mov DWORD PTR -244[rbp], eax
mov eax, DWORD PTR -244[rbp]
mov esi, eax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
jmp .L5
.L13:
mov eax, DWORD PTR -208[rbp]
cmp eax, 47
ja .L29
mov rax, QWORD PTR -192[rbp]
mov edx, DWORD PTR -208[rbp]
mov edx, edx
add rax, rdx
mov edx, DWORD PTR -208[rbp]
add edx, 8
mov DWORD PTR -208[rbp], edx
jmp .L30
.L29:
mov rax, QWORD PTR -200[rbp]
lea rdx, 8[rax]
mov QWORD PTR -200[rbp], rdx
.L30:
mov eax, DWORD PTR [rax]
mov DWORD PTR -244[rbp], eax
mov eax, DWORD PTR -244[rbp]
mov esi, eax
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
jmp .L5
.L14:
mov eax, DWORD PTR -204[rbp]
cmp eax, 175
ja .L31
mov rax, QWORD PTR -192[rbp]
mov edx, DWORD PTR -204[rbp]
mov edx, edx
add rax, rdx
mov edx, DWORD PTR -204[rbp]
add edx, 16
mov DWORD PTR -204[rbp], edx
jmp .L32
.L31:
mov rax, QWORD PTR -200[rbp]
lea rdx, 8[rax]
mov QWORD PTR -200[rbp], rdx
.L32:
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -216[rbp], xmm0
mov rax, QWORD PTR -216[rbp]
movq xmm0, rax
lea rdi, .LC5[rip]
mov eax, 1
call printf@PLT
jmp .L5
.L16:
mov eax, DWORD PTR -204[rbp]
cmp eax, 175
ja .L33
mov rax, QWORD PTR -192[rbp]
mov edx, DWORD PTR -204[rbp]
mov edx, edx
add rax, rdx
mov edx, DWORD PTR -204[rbp]
add edx, 16
mov DWORD PTR -204[rbp], edx
jmp .L34
.L33:
mov rax, QWORD PTR -200[rbp]
lea rdx, 8[rax]
mov QWORD PTR -200[rbp], rdx
.L34:
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -216[rbp], xmm0
mov rax, QWORD PTR -216[rbp]
movq xmm0, rax
lea rdi, .LC6[rip]
mov eax, 1
call printf@PLT
jmp .L5
.L15:
mov eax, DWORD PTR -204[rbp]
cmp eax, 175
ja .L35
mov rax, QWORD PTR -192[rbp]
mov edx, DWORD PTR -204[rbp]
mov edx, edx
add rax, rdx
mov edx, DWORD PTR -204[rbp]
add edx, 16
mov DWORD PTR -204[rbp], edx
jmp .L36
.L35:
mov rax, QWORD PTR -200[rbp]
lea rdx, 8[rax]
mov QWORD PTR -200[rbp], rdx
.L36:
movsd xmm0, QWORD PTR [rax]
movsd QWORD PTR -216[rbp], xmm0
mov rax, QWORD PTR -216[rbp]
movq xmm0, rax
lea rdi, .LC7[rip]
mov eax, 1
call printf@PLT
jmp .L5
.L10:
mov eax, DWORD PTR -208[rbp]
cmp eax, 47
ja .L37
mov rax, QWORD PTR -192[rbp]
mov edx, DWORD PTR -208[rbp]
mov edx, edx
add rax, rdx
mov edx, DWORD PTR -208[rbp]
add edx, 8
mov DWORD PTR -208[rbp], edx
jmp .L38
.L37:
mov rax, QWORD PTR -200[rbp]
lea rdx, 8[rax]
mov QWORD PTR -200[rbp], rdx
.L38:
mov rax, QWORD PTR [rax]
mov QWORD PTR -232[rbp], rax
jmp .L39
.L40:
mov rax, QWORD PTR -232[rbp]
movzx eax, BYTE PTR [rax]
movsx eax, al
mov edi, eax
call putchar@PLT
add QWORD PTR -232[rbp], 1
.L39:
mov rax, QWORD PTR -232[rbp]
movzx eax, BYTE PTR [rax]
test al, al
jne .L40
jmp .L5
.L11:
mov eax, DWORD PTR -208[rbp]
cmp eax, 47
ja .L41
mov rax, QWORD PTR -192[rbp]
mov edx, DWORD PTR -208[rbp]
mov edx, edx
add rax, rdx
mov edx, DWORD PTR -208[rbp]
add edx, 8
mov DWORD PTR -208[rbp], edx
jmp .L42
.L41:
mov rax, QWORD PTR -200[rbp]
lea rdx, 8[rax]
mov QWORD PTR -200[rbp], rdx
.L42:
mov rax, QWORD PTR [rax]
mov QWORD PTR -224[rbp], rax
mov rax, QWORD PTR -224[rbp]
mov rsi, rax
lea rdi, .LC8[rip]
mov eax, 0
call printf@PLT
jmp .L5
.L6:
mov rax, QWORD PTR -240[rbp]
movzx eax, BYTE PTR [rax]
movsx eax, al
mov edi, eax
call putchar@PLT
nop
.L5:
add QWORD PTR -240[rbp], 1
.L3:
mov rax, QWORD PTR -240[rbp]
movzx eax, BYTE PTR [rax]
test al, al
jne .L43
nop
mov rax, QWORD PTR -184[rbp]
sub rax, QWORD PTR fs:40
je .L44
call __stack_chk_fail@PLT
.L44:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size minprintf, .-minprintf
.section .rodata
.LC11:
.string "434"
.LC13:
.string "this is a test"
.LC14:
.string "%s %d %f %s\n %p %e %g %x"
.text
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
movsd xmm1, QWORD PTR .LC9[rip]
movsd xmm0, QWORD PTR .LC10[rip]
mov rax, QWORD PTR .LC12[rip]
mov r9d, 34
movapd xmm2, xmm1
movapd xmm1, xmm0
lea r8, minprintf[rip]
lea rcx, .LC11[rip]
movq xmm0, rax
mov edx, 34
lea rsi, .LC13[rip]
lea rdi, .LC14[rip]
mov eax, 3
call minprintf
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size main, .-main
.section .rodata
.align 8
.LC9:
.long -687194767
.long 1070428323
.align 8
.LC10:
.long 1717986918
.long 1073899110
.align 8
.LC12:
.long 1717986918
.long 1077372518
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "936953.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "%u\000"
.align 2
.LC1:
.ascii "%o\000"
.align 2
.LC2:
.ascii "%x\000"
.align 2
.LC3:
.ascii "%d\000"
.align 2
.LC4:
.ascii "%i\000"
.align 2
.LC5:
.ascii "%g\000"
.align 2
.LC6:
.ascii "%e\000"
.align 2
.LC7:
.ascii "%f\000"
.align 2
.LC8:
.ascii "%p\000"
.align 2
.LC9:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type minprintf, %function
minprintf:
@ args = 4, pretend = 16, frame = 48
@ frame_needed = 1, uses_anonymous_args = 1
push {r0, r1, r2, r3}
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
ldr r3, [fp, #4]
str r3, [fp, #-48]
ldr r3, .L22
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
add r3, fp, #8
str r3, [fp, #-44]
ldr r3, [fp, #-48]
str r3, [fp, #-40]
b .L2
.L20:
ldr r3, [fp, #-40]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #37
beq .L3
ldr r3, [fp, #-40]
ldrb r3, [r3] @ zero_extendqisi2
mov r0, r3
bl putchar
b .L4
.L3:
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
ldr r3, [fp, #-40]
ldrb r3, [r3] @ zero_extendqisi2
sub r3, r3, #69
cmp r3, #51
ldrls pc, [pc, r3, asl #2]
b .L5
.L7:
.word .L15
.word .L5
.word .L13
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L6
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L17
.word .L16
.word .L15
.word .L14
.word .L13
.word .L5
.word .L12
.word .L5
.word .L5
.word .L5
.word .L5
.word .L5
.word .L11
.word .L10
.word .L5
.word .L5
.word .L9
.word .L5
.word .L8
.word .L5
.word .L5
.word .L6
.L17:
ldr r3, [fp, #-44]
add r2, r3, #4
str r2, [fp, #-44]
ldr r3, [r3]
str r3, [fp, #-24]
ldr r0, [fp, #-24]
bl putchar
b .L4
.L8:
ldr r3, [fp, #-44]
add r2, r3, #4
str r2, [fp, #-44]
ldr r3, [r3]
str r3, [fp, #-32]
ldr r1, [fp, #-32]
ldr r0, .L22+4
bl printf
b .L4
.L11:
ldr r3, [fp, #-44]
add r2, r3, #4
str r2, [fp, #-44]
ldr r3, [r3]
str r3, [fp, #-32]
ldr r1, [fp, #-32]
ldr r0, .L22+8
bl printf
b .L4
.L6:
ldr r3, [fp, #-44]
add r2, r3, #4
str r2, [fp, #-44]
ldr r3, [r3]
str r3, [fp, #-32]
ldr r1, [fp, #-32]
ldr r0, .L22+12
bl printf
b .L4
.L16:
ldr r3, [fp, #-44]
add r2, r3, #4
str r2, [fp, #-44]
ldr r3, [r3]
str r3, [fp, #-24]
ldr r1, [fp, #-24]
ldr r0, .L22+16
bl printf
b .L4
.L12:
ldr r3, [fp, #-44]
add r2, r3, #4
str r2, [fp, #-44]
ldr r3, [r3]
str r3, [fp, #-24]
ldr r1, [fp, #-24]
ldr r0, .L22+20
bl printf
b .L4
.L13:
ldr r3, [fp, #-44]
add r3, r3, #7
bic r3, r3, #7
add r2, r3, #8
str r2, [fp, #-44]
ldmia r3, {r2-r3}
str r2, [fp, #-20]
str r3, [fp, #-16]
sub r3, fp, #20
ldmia r3, {r2-r3}
ldr r0, .L22+24
bl printf
b .L4
.L15:
ldr r3, [fp, #-44]
add r3, r3, #7
bic r3, r3, #7
add r2, r3, #8
str r2, [fp, #-44]
ldmia r3, {r2-r3}
str r2, [fp, #-20]
str r3, [fp, #-16]
sub r3, fp, #20
ldmia r3, {r2-r3}
ldr r0, .L22+28
bl printf
b .L4
.L14:
ldr r3, [fp, #-44]
add r3, r3, #7
bic r3, r3, #7
add r2, r3, #8
str r2, [fp, #-44]
ldmia r3, {r2-r3}
str r2, [fp, #-20]
str r3, [fp, #-16]
sub r3, fp, #20
ldmia r3, {r2-r3}
ldr r0, .L22+32
bl printf
b .L4
.L9:
ldr r3, [fp, #-44]
add r2, r3, #4
str r2, [fp, #-44]
ldr r3, [r3]
str r3, [fp, #-36]
b .L18
.L19:
ldr r3, [fp, #-36]
ldrb r3, [r3] @ zero_extendqisi2
mov r0, r3
bl putchar
ldr r3, [fp, #-36]
add r3, r3, #1
str r3, [fp, #-36]
.L18:
ldr r3, [fp, #-36]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L19
b .L4
.L10:
ldr r3, [fp, #-44]
add r2, r3, #4
str r2, [fp, #-44]
ldr r3, [r3]
str r3, [fp, #-28]
ldr r1, [fp, #-28]
ldr r0, .L22+36
bl printf
b .L4
.L5:
ldr r3, [fp, #-40]
ldrb r3, [r3] @ zero_extendqisi2
mov r0, r3
bl putchar
nop
.L4:
ldr r3, [fp, #-40]
add r3, r3, #1
str r3, [fp, #-40]
.L2:
ldr r3, [fp, #-40]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L20
nop
ldr r3, .L22
ldr r2, [r3]
ldr r3, [fp, #-8]
eors r2, r3, r2
mov r3, #0
beq .L21
bl __stack_chk_fail
.L21:
sub sp, fp, #4
@ sp needed
pop {fp, lr}
add sp, sp, #16
bx lr
.L23:
.align 2
.L22:
.word .LC9
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.word .LC6
.word .LC7
.word .LC8
.size minprintf, .-minprintf
.section .rodata
.align 2
.LC10:
.ascii "this is a test\000"
.align 2
.LC11:
.ascii "%s %d %f %s\012 %p %e %g %x\000"
.align 2
.LC12:
.ascii "434\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
mov r3, #34
str r3, [sp, #32]
ldr r2, .L26
ldr r3, .L26+4
str r2, [sp, #24]
str r3, [sp, #28]
ldr r2, .L26+8
ldr r3, .L26+12
str r2, [sp, #16]
str r3, [sp, #20]
ldr r3, .L26+16
str r3, [sp, #12]
ldr r3, .L26+20
str r3, [sp, #8]
ldr r2, .L26+8
ldr r3, .L26+24
stm sp, {r2-r3}
mov r2, #34
ldr r1, .L26+28
ldr r0, .L26+32
bl minprintf
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L27:
.align 2
.L26:
.word -687194767
.word 1070428323
.word 1717986918
.word 1073899110
.word minprintf
.word .LC12
.word 1077372518
.word .LC10
.word .LC11
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "65219.c"
.intel_syntax noprefix
.text
.globl bar
.bss
.align 4
.type bar, @object
.size bar, 4
bar:
.zero 4
.text
.globl foo1
.type foo1, @function
foo1:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, DWORD PTR bar[rip]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size foo1, .-foo1
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "65219.c"
.text
.comm bar,4,4
.align 2
.global foo1
.syntax unified
.arm
.fpu softvfp
.type foo1, %function
foo1:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
ldr r3, .L3
ldr r3, [r3]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L4:
.align 2
.L3:
.word bar
.size foo1, .-foo1
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "632984.c"
.intel_syntax noprefix
.text
.globl read_size
.type read_size, @function
read_size:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
movzx eax, BYTE PTR [rax]
movzx eax, al
sal eax, 8
mov edx, eax
mov rax, QWORD PTR -24[rbp]
add rax, 1
movzx eax, BYTE PTR [rax]
movzx eax, al
or eax, edx
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -4[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size read_size, .-read_size
.globl write_size
.type write_size, @function
write_size:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov DWORD PTR -12[rbp], esi
mov eax, DWORD PTR -12[rbp]
sar eax, 8
mov edx, eax
mov rax, QWORD PTR -8[rbp]
mov BYTE PTR [rax], dl
mov rax, QWORD PTR -8[rbp]
add rax, 1
mov edx, DWORD PTR -12[rbp]
mov BYTE PTR [rax], dl
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size write_size, .-write_size
.globl read_size_32
.type read_size_32, @function
read_size_32:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
movzx eax, BYTE PTR [rax]
movzx edx, al
mov rax, QWORD PTR -24[rbp]
add rax, 1
movzx eax, BYTE PTR [rax]
movzx eax, al
sal eax, 8
or edx, eax
mov rax, QWORD PTR -24[rbp]
add rax, 2
movzx eax, BYTE PTR [rax]
movzx eax, al
sal eax, 16
or edx, eax
mov rax, QWORD PTR -24[rbp]
add rax, 3
movzx eax, BYTE PTR [rax]
movzx eax, al
sal eax, 24
or eax, edx
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -4[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size read_size_32, .-read_size_32
.globl write_size_32
.type write_size_32, @function
write_size_32:
.LFB3:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov DWORD PTR -12[rbp], esi
mov eax, DWORD PTR -12[rbp]
mov edx, eax
mov rax, QWORD PTR -8[rbp]
mov BYTE PTR [rax], dl
mov eax, DWORD PTR -12[rbp]
shr eax, 8
mov edx, eax
mov rax, QWORD PTR -8[rbp]
add rax, 1
mov BYTE PTR [rax], dl
mov eax, DWORD PTR -12[rbp]
shr eax, 16
mov edx, eax
mov rax, QWORD PTR -8[rbp]
add rax, 2
mov BYTE PTR [rax], dl
mov eax, DWORD PTR -12[rbp]
shr eax, 24
mov edx, eax
mov rax, QWORD PTR -8[rbp]
add rax, 3
mov BYTE PTR [rax], dl
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE3:
.size write_size_32, .-write_size_32
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "632984.c"
.text
.align 2
.global read_size
.syntax unified
.arm
.fpu softvfp
.type read_size, %function
read_size:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
ldr r3, [fp, #-16]
ldrb r3, [r3] @ zero_extendqisi2
lsl r3, r3, #8
ldr r2, [fp, #-16]
add r2, r2, #1
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
str r3, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size read_size, .-read_size
.align 2
.global write_size
.syntax unified
.arm
.fpu softvfp
.type write_size, %function
write_size:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r3, [fp, #-12]
asr r3, r3, #8
and r2, r3, #255
ldr r3, [fp, #-8]
strb r2, [r3]
ldr r3, [fp, #-8]
add r3, r3, #1
ldr r2, [fp, #-12]
and r2, r2, #255
strb r2, [r3]
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size write_size, .-write_size
.align 2
.global read_size_32
.syntax unified
.arm
.fpu softvfp
.type read_size_32, %function
read_size_32:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
ldr r3, [fp, #-16]
ldrb r3, [r3] @ zero_extendqisi2
mov r2, r3
ldr r3, [fp, #-16]
add r3, r3, #1
ldrb r3, [r3] @ zero_extendqisi2
lsl r3, r3, #8
orr r2, r2, r3
ldr r3, [fp, #-16]
add r3, r3, #2
ldrb r3, [r3] @ zero_extendqisi2
lsl r3, r3, #16
orr r2, r2, r3
ldr r3, [fp, #-16]
add r3, r3, #3
ldrb r3, [r3] @ zero_extendqisi2
lsl r3, r3, #24
orr r3, r2, r3
str r3, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size read_size_32, .-read_size_32
.align 2
.global write_size_32
.syntax unified
.arm
.fpu softvfp
.type write_size_32, %function
write_size_32:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r3, [fp, #-12]
and r2, r3, #255
ldr r3, [fp, #-8]
strb r2, [r3]
ldr r3, [fp, #-12]
lsr r2, r3, #8
ldr r3, [fp, #-8]
add r3, r3, #1
and r2, r2, #255
strb r2, [r3]
ldr r3, [fp, #-12]
lsr r2, r3, #16
ldr r3, [fp, #-8]
add r3, r3, #2
and r2, r2, #255
strb r2, [r3]
ldr r3, [fp, #-12]
lsr r2, r3, #24
ldr r3, [fp, #-8]
add r3, r3, #3
and r2, r2, #255
strb r2, [r3]
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size write_size_32, .-write_size_32
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "617.c"
.intel_syntax noprefix
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -8[rbp], 1
mov DWORD PTR -4[rbp], 1
.L8:
cmp DWORD PTR -8[rbp], 1
je .L8
cmp DWORD PTR -8[rbp], 2
jne .L3
mov DWORD PTR -8[rbp], 3
jmp .L8
.L3:
cmp DWORD PTR -8[rbp], 3
jne .L4
cmp DWORD PTR -4[rbp], 2
jne .L5
mov DWORD PTR -4[rbp], 3
.L5:
mov DWORD PTR -8[rbp], 4
jmp .L8
.L4:
cmp DWORD PTR -4[rbp], 4
jne .L6
mov eax, 0
call __assert_fail@PLT
mov eax, -1
jmp .L7
.L6:
mov eax, 0
.L7:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "617.c"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
mov r3, #1
str r3, [fp, #-12]
mov r3, #1
str r3, [fp, #-8]
.L8:
ldr r3, [fp, #-12]
cmp r3, #1
beq .L8
ldr r3, [fp, #-12]
cmp r3, #2
bne .L3
mov r3, #3
str r3, [fp, #-12]
b .L8
.L3:
ldr r3, [fp, #-12]
cmp r3, #3
bne .L4
ldr r3, [fp, #-8]
cmp r3, #2
bne .L5
mov r3, #3
str r3, [fp, #-8]
.L5:
mov r3, #4
str r3, [fp, #-12]
b .L8
.L4:
ldr r3, [fp, #-8]
cmp r3, #4
bne .L6
bl __assert_fail
mvn r3, #0
b .L7
.L6:
mov r3, #0
.L7:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "840411.c"
.intel_syntax noprefix
.text
.section .rodata
.LC2:
.string "%ld\n"
.LC3:
.string "%.2f\n"
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], 0
call clock@PLT
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -32[rbp], 0
jmp .L2
.L5:
mov DWORD PTR -28[rbp], 0
jmp .L3
.L4:
mov eax, DWORD PTR -28[rbp]
mov edx, eax
shr edx, 31
add eax, edx
sar eax
neg eax
mov edx, eax
mov eax, DWORD PTR -32[rbp]
add eax, edx
cdqe
add QWORD PTR -24[rbp], rax
add DWORD PTR -28[rbp], 1
.L3:
cmp DWORD PTR -28[rbp], 49999
jle .L4
add DWORD PTR -32[rbp], 1
.L2:
cmp DWORD PTR -32[rbp], 219999
jle .L5
call clock@PLT
sub rax, QWORD PTR -16[rbp]
mov QWORD PTR -16[rbp], rax
pxor xmm0, xmm0
cvtsi2sd xmm0, QWORD PTR -16[rbp]
movsd xmm2, QWORD PTR .LC0[rip]
movapd xmm1, xmm0
divsd xmm1, xmm2
movsd xmm0, QWORD PTR .LC1[rip]
mulsd xmm0, xmm1
movsd QWORD PTR -8[rbp], xmm0
mov rax, QWORD PTR -24[rbp]
mov rsi, rax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -8[rbp]
movq xmm0, rax
lea rdi, .LC3[rip]
mov eax, 1
call printf@PLT
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.section .rodata
.align 8
.LC0:
.long 0
.long 1093567616
.align 8
.LC1:
.long 0
.long 1083129856
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "840411.c"
.text
.global __aeabi_i2d
.global __aeabi_ddiv
.global __aeabi_dmul
.section .rodata
.align 2
.LC0:
.ascii "%ld\012\000"
.align 2
.LC1:
.ascii "%.2f\012\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
mov r3, #0
str r3, [fp, #-28]
bl clock
str r0, [fp, #-16]
mov r3, #0
str r3, [fp, #-24]
b .L2
.L5:
mov r3, #0
str r3, [fp, #-20]
b .L3
.L4:
ldr r3, [fp, #-20]
lsr r2, r3, #31
add r3, r2, r3
asr r3, r3, #1
rsb r3, r3, #0
mov r2, r3
ldr r3, [fp, #-24]
add r3, r2, r3
ldr r2, [fp, #-28]
add r3, r2, r3
str r3, [fp, #-28]
ldr r3, [fp, #-20]
add r3, r3, #1
str r3, [fp, #-20]
.L3:
ldr r3, [fp, #-20]
ldr r2, .L7
cmp r3, r2
ble .L4
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L2:
ldr r3, [fp, #-24]
ldr r2, .L7+4
cmp r3, r2
ble .L5
bl clock
mov r2, r0
ldr r3, [fp, #-16]
sub r3, r2, r3
str r3, [fp, #-16]
ldr r0, [fp, #-16]
bl __aeabi_i2d
mov r2, #0
ldr r3, .L7+8
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L7+12
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [fp, #-12]
str r3, [fp, #-8]
ldr r1, [fp, #-28]
ldr r0, .L7+16
bl printf
sub r3, fp, #12
ldmia r3, {r2-r3}
ldr r0, .L7+20
bl printf
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L8:
.align 2
.L7:
.word 49999
.word 219999
.word 1093567616
.word 1083129856
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "193545.c"
.intel_syntax noprefix
.text
.globl weird_function
.type weird_function, @function
weird_function:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
movss DWORD PTR -20[rbp], xmm0
mov DWORD PTR -24[rbp], edi
cmp DWORD PTR -24[rbp], 3
jg .L2
pxor xmm2, xmm2
cvtss2sd xmm2, DWORD PTR -20[rbp]
movq rax, xmm2
movq xmm0, rax
call sin@PLT
movsd xmm1, QWORD PTR .LC0[rip]
subsd xmm1, xmm0
pxor xmm0, xmm0
cvtsd2ss xmm0, xmm1
movss DWORD PTR -4[rbp], xmm0
jmp .L3
.L2:
cmp DWORD PTR -24[rbp], 7
jg .L4
pxor xmm3, xmm3
cvtss2sd xmm3, DWORD PTR -20[rbp]
movq rax, xmm3
movq xmm0, rax
call cos@PLT
movsd xmm1, QWORD PTR .LC0[rip]
addsd xmm1, xmm0
movsd xmm0, QWORD PTR .LC1[rip]
mulsd xmm0, xmm1
cvtsd2ss xmm0, xmm0
movss DWORD PTR -4[rbp], xmm0
jmp .L3
.L4:
movss xmm0, DWORD PTR -20[rbp]
movaps xmm1, xmm0
mulss xmm1, xmm0
movss xmm0, DWORD PTR .LC2[rip]
addss xmm0, xmm1
pxor xmm4, xmm4
cvtss2sd xmm4, xmm0
movq rax, xmm4
movq xmm0, rax
call sqrt@PLT
cvtsd2ss xmm0, xmm0
movss DWORD PTR -4[rbp], xmm0
.L3:
movss xmm0, DWORD PTR -4[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size weird_function, .-weird_function
.globl tInRange
.type tInRange, @function
tInRange:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov DWORD PTR -4[rbp], edi
cmp DWORD PTR -4[rbp], 0
js .L7
cmp DWORD PTR -4[rbp], 8
jg .L7
mov eax, 1
jmp .L9
.L7:
mov eax, 0
.L9:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size tInRange, .-tInRange
.section .rodata
.align 8
.LC3:
.string "Input parameters alpha and t: "
.LC4:
.string "%f %i"
.align 8
.LC5:
.string "Value of the function for alpha=%f and t=%i is %f\n"
.align 8
.LC6:
.string "Parameter t is out of range - needs to be in <0; 8>"
.text
.globl main
.type main, @function
main:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
lea rdx, -12[rbp]
lea rax, -16[rbp]
mov rsi, rax
lea rdi, .LC4[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov eax, DWORD PTR -12[rbp]
mov edi, eax
call tInRange
test eax, eax
je .L11
mov edx, DWORD PTR -12[rbp]
mov eax, DWORD PTR -16[rbp]
mov edi, edx
movd xmm0, eax
call weird_function
cvtss2sd xmm0, xmm0
mov edx, DWORD PTR -12[rbp]
movss xmm1, DWORD PTR -16[rbp]
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
movq rax, xmm2
movapd xmm1, xmm0
mov esi, edx
movq xmm0, rax
lea rdi, .LC5[rip]
mov eax, 2
call printf@PLT
jmp .L12
.L11:
lea rdi, .LC6[rip]
call puts@PLT
.L12:
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L14
call __stack_chk_fail@PLT
.L14:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size main, .-main
.section .rodata
.align 8
.LC0:
.long 0
.long 1072693248
.align 8
.LC1:
.long 0
.long 1071644672
.align 4
.LC2:
.long 1065353216
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "193545.c"
.text
.global __aeabi_f2d
.global __aeabi_dsub
.global __aeabi_d2f
.global __aeabi_dadd
.global __aeabi_dmul
.global __aeabi_fmul
.global __aeabi_fadd
.align 2
.global weird_function
.syntax unified
.arm
.fpu softvfp
.type weird_function, %function
weird_function:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16] @ float
str r1, [fp, #-20]
ldr r3, [fp, #-20]
cmp r3, #3
bgt .L2
ldr r0, [fp, #-16] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl sin
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L6
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-8] @ float
b .L3
.L2:
ldr r3, [fp, #-20]
cmp r3, #7
bgt .L4
ldr r0, [fp, #-16] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl cos
mov r2, #0
ldr r3, .L6
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
mov r2, #0
ldr r3, .L6+4
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-8] @ float
b .L3
.L4:
ldr r1, [fp, #-16] @ float
ldr r0, [fp, #-16] @ float
bl __aeabi_fmul
mov r3, r0
mov r1, #1065353216
mov r0, r3
bl __aeabi_fadd
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl sqrt
mov r2, r0
mov r3, r1
mov r0, r2
mov r1, r3
bl __aeabi_d2f
mov r3, r0
str r3, [fp, #-8] @ float
.L3:
ldr r3, [fp, #-8] @ float
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L7:
.align 2
.L6:
.word 1072693248
.word 1071644672
.size weird_function, .-weird_function
.align 2
.global tInRange
.syntax unified
.arm
.fpu softvfp
.type tInRange, %function
tInRange:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
blt .L9
ldr r3, [fp, #-8]
cmp r3, #8
bgt .L9
mov r3, #1
b .L11
.L9:
mov r3, #0
.L11:
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size tInRange, .-tInRange
.section .rodata
.align 2
.LC0:
.ascii "Input parameters alpha and t: \000"
.align 2
.LC1:
.ascii "%f %i\000"
.align 2
.LC2:
.ascii "Value of the function for alpha=%f and t=%i is %f\012"
.ascii "\000"
.align 2
.LC3:
.ascii "Parameter t is out of range - needs to be in <0; 8>"
.ascii "\000"
.align 2
.LC4:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, fp, lr}
add fp, sp, #16
sub sp, sp, #36
ldr r3, .L17
ldr r3, [r3]
str r3, [fp, #-24]
mov r3,#0
ldr r0, .L17+4
bl printf
sub r2, fp, #28
sub r3, fp, #32
mov r1, r3
ldr r0, .L17+8
bl __isoc99_scanf
ldr r3, [fp, #-28]
mov r0, r3
bl tInRange
mov r3, r0
cmp r3, #0
beq .L13
ldr r3, [fp, #-32] @ float
mov r0, r3
bl __aeabi_f2d
mov r4, r0
mov r5, r1
ldr r6, [fp, #-28]
ldr r3, [fp, #-32] @ float
ldr r2, [fp, #-28]
mov r1, r2
mov r0, r3
bl weird_function
mov r3, r0
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
str r2, [sp, #8]
str r3, [sp, #12]
str r6, [sp]
mov r2, r4
mov r3, r5
ldr r0, .L17+12
bl printf
b .L14
.L13:
ldr r0, .L17+16
bl puts
.L14:
mov r3, #0
ldr r2, .L17
ldr r1, [r2]
ldr r2, [fp, #-24]
eors r1, r2, r1
mov r2, #0
beq .L16
bl __stack_chk_fail
.L16:
mov r0, r3
sub sp, fp, #16
@ sp needed
pop {r4, r5, r6, fp, pc}
.L18:
.align 2
.L17:
.word .LC4
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "119712.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "w"
.text
.globl xsfopen
.type xsfopen, @function
xsfopen:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
lea rsi, .LC0[rip]
mov rdi, rax
call fopen@PLT
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size xsfopen, .-xsfopen
.globl xsfclose
.type xsfclose, @function
xsfclose:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call fclose@PLT
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size xsfclose, .-xsfclose
.globl xsfprintf
.type xsfprintf, @function
xsfprintf:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov rdx, QWORD PTR -16[rbp]
mov rax, QWORD PTR -8[rbp]
mov rsi, rdx
mov rdi, rax
mov eax, 0
call fprintf@PLT
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size xsfprintf, .-xsfprintf
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "119712.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "w\000"
.text
.align 2
.global xsfopen
.syntax unified
.arm
.fpu softvfp
.type xsfopen, %function
xsfopen:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r1, .L3
ldr r0, [fp, #-16]
bl fopen
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L4:
.align 2
.L3:
.word .LC0
.size xsfopen, .-xsfopen
.align 2
.global xsfclose
.syntax unified
.arm
.fpu softvfp
.type xsfclose, %function
xsfclose:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r0, [fp, #-8]
bl fclose
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size xsfclose, .-xsfclose
.align 2
.global xsfprintf
.syntax unified
.arm
.fpu softvfp
.type xsfprintf, %function
xsfprintf:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r1, [fp, #-12]
ldr r0, [fp, #-8]
bl fprintf
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size xsfprintf, .-xsfprintf
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "842942.c"
.intel_syntax noprefix
.text
.section .rodata
.LC1:
.string "Practice 03"
.LC2:
.string "%d "
.LC3:
.string "- 345 = %d\n"
.LC4:
.string "/ 1000 = %d\n"
.LC5:
.string "(int) %d "
.LC6:
.string "/ 10 = %d\n"
.LC7:
.string "(float) %f "
.LC9:
.string "/ 10 = %f\n"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -8[rbp], 12345
movss xmm0, DWORD PTR .LC0[rip]
movss DWORD PTR -4[rbp], xmm0
lea rdi, .LC1[rip]
call puts@PLT
mov eax, DWORD PTR -8[rbp]
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
sub DWORD PTR -8[rbp], 345
mov eax, DWORD PTR -8[rbp]
mov esi, eax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -8[rbp]
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -8[rbp]
movsx rdx, eax
imul rdx, rdx, 274877907
shr rdx, 32
sar edx, 6
sar eax, 31
mov ecx, eax
mov eax, edx
sub eax, ecx
mov DWORD PTR -8[rbp], eax
mov eax, DWORD PTR -8[rbp]
mov esi, eax
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
pxor xmm0, xmm0
cvtsi2ss xmm0, DWORD PTR -8[rbp]
movss DWORD PTR -4[rbp], xmm0
mov eax, DWORD PTR -8[rbp]
mov esi, eax
lea rdi, .LC5[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -8[rbp]
movsx rdx, eax
imul rdx, rdx, 1717986919
shr rdx, 32
sar edx, 2
sar eax, 31
mov ecx, eax
mov eax, edx
sub eax, ecx
mov DWORD PTR -8[rbp], eax
mov eax, DWORD PTR -8[rbp]
mov esi, eax
lea rdi, .LC6[rip]
mov eax, 0
call printf@PLT
pxor xmm2, xmm2
cvtss2sd xmm2, DWORD PTR -4[rbp]
movq rax, xmm2
movq xmm0, rax
lea rdi, .LC7[rip]
mov eax, 1
call printf@PLT
movss xmm0, DWORD PTR -4[rbp]
movss xmm1, DWORD PTR .LC8[rip]
divss xmm0, xmm1
movss DWORD PTR -4[rbp], xmm0
pxor xmm3, xmm3
cvtss2sd xmm3, DWORD PTR -4[rbp]
movq rax, xmm3
movq xmm0, rax
lea rdi, .LC9[rip]
mov eax, 1
call printf@PLT
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 4
.LC0:
.long 1067320345
.align 4
.LC8:
.long 1092616192
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "842942.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Practice 03\000"
.align 2
.LC1:
.ascii "%d \000"
.align 2
.LC2:
.ascii "- 345 = %d\012\000"
.align 2
.LC3:
.ascii "/ 1000 = %d\012\000"
.global __aeabi_i2f
.align 2
.LC4:
.ascii "(int) %d \000"
.align 2
.LC5:
.ascii "/ 10 = %d\012\000"
.global __aeabi_f2d
.align 2
.LC6:
.ascii "(float) %f \000"
.global __aeabi_fdiv
.align 2
.LC7:
.ascii "/ 10 = %f\012\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
ldr r3, .L3
str r3, [fp, #-12]
ldr r3, .L3+4
str r3, [fp, #-8] @ float
ldr r0, .L3+8
bl puts
ldr r1, [fp, #-12]
ldr r0, .L3+12
bl printf
ldr r3, [fp, #-12]
sub r3, r3, #344
sub r3, r3, #1
str r3, [fp, #-12]
ldr r1, [fp, #-12]
ldr r0, .L3+16
bl printf
ldr r1, [fp, #-12]
ldr r0, .L3+12
bl printf
ldr r3, [fp, #-12]
ldr r2, .L3+20
smull r1, r2, r3, r2
asr r2, r2, #6
asr r3, r3, #31
sub r3, r2, r3
str r3, [fp, #-12]
ldr r1, [fp, #-12]
ldr r0, .L3+24
bl printf
ldr r0, [fp, #-12]
bl __aeabi_i2f
mov r3, r0
str r3, [fp, #-8] @ float
ldr r1, [fp, #-12]
ldr r0, .L3+28
bl printf
ldr r3, [fp, #-12]
ldr r2, .L3+32
smull r1, r2, r3, r2
asr r2, r2, #2
asr r3, r3, #31
sub r3, r2, r3
str r3, [fp, #-12]
ldr r1, [fp, #-12]
ldr r0, .L3+36
bl printf
ldr r0, [fp, #-8] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L3+40
bl printf
ldr r1, .L3+44
ldr r0, [fp, #-8] @ float
bl __aeabi_fdiv
mov r3, r0
str r3, [fp, #-8] @ float
ldr r0, [fp, #-8] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, .L3+48
bl printf
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L4:
.align 2
.L3:
.word 12345
.word 1067320345
.word .LC0
.word .LC1
.word .LC2
.word 274877907
.word .LC3
.word .LC4
.word 1717986919
.word .LC5
.word .LC6
.word 1092616192
.word .LC7
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "578578.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "You are %d miles away.\n"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "578578.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "You are %d miles away.\012\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
ldr r0, .L3
bl printf
mov r3, #0
mov r0, r3
pop {fp, pc}
.L4:
.align 2
.L3:
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "120290.c"
.intel_syntax noprefix
.text
.globl st
.bss
.align 4
.type st, @object
.size st, 4
st:
.zero 4
.text
.globl o_add4
.type o_add4, @function
o_add4:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov DWORD PTR [rax], 42
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size o_add4, .-o_add4
.section .rodata
.LC0:
.string "Hello"
.LC1:
.string "temp: %s\n"
.text
.globl temp
.type temp, @function
temp:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
lea rax, .LC0[rip]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size temp, .-temp
.section .rodata
.LC2:
.string "Hi"
.text
.globl main
.type main, @function
main:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
lea rax, st[rip]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call o_add4
lea rdi, .LC2[rip]
call temp
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "120290.c"
.text
.comm st,4,4
.align 2
.global o_add4
.syntax unified
.arm
.fpu softvfp
.type o_add4, %function
o_add4:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r2, #42
str r2, [r3]
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size o_add4, .-o_add4
.section .rodata
.align 2
.LC0:
.ascii "Hello\000"
.align 2
.LC1:
.ascii "temp: %s\012\000"
.text
.align 2
.global temp
.syntax unified
.arm
.fpu softvfp
.type temp, %function
temp:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r3, .L5
str r3, [fp, #-8]
ldr r1, [fp, #-8]
ldr r0, .L5+4
bl printf
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L6:
.align 2
.L5:
.word .LC0
.word .LC1
.size temp, .-temp
.section .rodata
.align 2
.LC2:
.ascii "Hi\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
ldr r3, .L9
str r3, [fp, #-8]
ldr r0, [fp, #-8]
bl o_add4
ldr r0, .L9+4
bl temp
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L10:
.align 2
.L9:
.word st
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "813682.c"
.intel_syntax noprefix
.text
.globl rmdir
.type rmdir, @function
rmdir:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
call __errno_location@PLT
mov DWORD PTR [rax], 95
mov eax, -1
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size rmdir, .-rmdir
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "813682.c"
.text
.align 2
.global rmdir
.syntax unified
.arm
.fpu softvfp
.type rmdir, %function
rmdir:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
bl __errno_location
mov r3, r0
mov r2, #95
str r2, [r3]
mvn r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size rmdir, .-rmdir
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "446311.c"
.intel_syntax noprefix
.text
.globl insn_size
.data
.align 4
.type insn_size, @object
.size insn_size, 4
insn_size:
.long 4
.globl current_offset
.bss
.align 4
.type current_offset, @object
.size current_offset, 4
current_offset:
.zero 4
.globl last_label_offset
.align 4
.type last_label_offset, @object
.size last_label_offset, 4
last_label_offset:
.zero 4
.globl last_label_name
.align 8
.type last_label_name, @object
.size last_label_name, 8
last_label_name:
.zero 8
.globl skip_list
.align 8
.type skip_list, @object
.size skip_list, 8
skip_list:
.zero 8
.globl randomization_counter
.align 4
.type randomization_counter, @object
.size randomization_counter, 4
randomization_counter:
.zero 4
.text
.globl nothing
.type nothing, @function
nothing:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size nothing, .-nothing
.globl literal
.type literal, @function
literal:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 16[rax]
mov rdi, rax
call strdup@PLT
mov rdx, rax
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR 8[rax], rdx
mov rax, QWORD PTR -16[rbp]
mov rdx, QWORD PTR 8[rax]
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR [rax], rdx
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size literal, .-literal
.globl literal_q
.type literal_q, @function
literal_q:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 16[rax]
mov rdi, rax
call strdup@PLT
mov rdx, rax
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 24[rax]
mov rdi, rax
call strdup@PLT
mov rdx, rax
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR 8[rax], rdx
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size literal_q, .-literal_q
.globl skip_insn
.type skip_insn, @function
skip_insn:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR skip_list[rip]
test rax, rax
jne .L8
mov eax, 0
jmp .L9
.L8:
mov rax, QWORD PTR skip_list[rip]
mov QWORD PTR -8[rbp], rax
jmp .L10
.L12:
mov rax, QWORD PTR -8[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
mov rsi, rdx
mov rdi, rax
call strcmp@PLT
test eax, eax
jne .L11
mov eax, 0
jmp .L9
.L11:
add QWORD PTR -8[rbp], 8
.L10:
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR [rax]
test rax, rax
jne .L12
mov eax, 1
.L9:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size skip_insn, .-skip_insn
.globl insn_bits
.type insn_bits, @function
insn_bits:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 16[rax]
mov rdi, rax
call skip_insn
test eax, eax
je .L14
mov eax, 1
jmp .L15
.L14:
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 16[rax]
mov rdi, rax
call strdup@PLT
mov rdx, rax
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR 8[rax], rdx
mov rax, QWORD PTR -16[rbp]
mov rdx, QWORD PTR 8[rax]
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -8[rbp]
mov rdx, QWORD PTR 32[rax]
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR 16[rax], rdx
mov eax, 0
.L15:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size insn_bits, .-insn_bits
.globl insn_size_bits
.type insn_size_bits, @function
insn_size_bits:
.LFB11:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 16[rax]
mov rdi, rax
call skip_insn
test eax, eax
je .L17
mov eax, 1
jmp .L18
.L17:
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 16[rax]
mov rdi, rax
call strdup@PLT
mov rdx, rax
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR 8[rax], rdx
mov rax, QWORD PTR -16[rbp]
mov rdx, QWORD PTR 8[rax]
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -8[rbp]
mov rdx, QWORD PTR 32[rax]
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR 16[rax], rdx
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR insn_size[rip], eax
mov eax, 0
.L18:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE11:
.size insn_size_bits, .-insn_size_bits
.globl tick_random
.type tick_random, @function
tick_random:
.LFB12:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov eax, DWORD PTR randomization_counter[rip]
add eax, 1
mov DWORD PTR randomization_counter[rip], eax
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE12:
.size tick_random, .-tick_random
.globl random_order_2u
.data
.align 32
.type random_order_2u, @object
.size random_order_2u, 64
random_order_2u:
.long 0
.long 1
.long 3
.long 2
.long 2
.long 0
.long 1
.long 3
.long 1
.long 3
.long 2
.long 0
.long 3
.long 2
.long 0
.long 1
.globl random_order_3u
.align 32
.type random_order_3u, @object
.size random_order_3u, 64
random_order_3u:
.long 0
.long 6
.long 3
.long 1
.long 4
.long 2
.long 7
.long 5
.long 0
.long 2
.long 5
.long 7
.long 4
.long 6
.long 1
.long 3
.globl random_order_4u
.align 32
.type random_order_4u, @object
.size random_order_4u, 128
random_order_4u:
.long 0
.long 5
.long 15
.long 10
.long 9
.long 4
.long 14
.long 3
.long 8
.long 13
.long 7
.long 2
.long 1
.long 12
.long 6
.long 11
.long 0
.long 7
.long 5
.long 14
.long 3
.long 12
.long 10
.long 1
.long 8
.long 15
.long 13
.long 6
.long 11
.long 4
.long 2
.long 9
.globl random_order_5u
.align 32
.type random_order_5u, @object
.size random_order_5u, 128
random_order_5u:
.long 0
.long 26
.long 13
.long 7
.long 20
.long 14
.long 1
.long 27
.long 8
.long 2
.long 21
.long 15
.long 28
.long 22
.long 9
.long 3
.long 16
.long 10
.long 29
.long 23
.long 4
.long 30
.long 17
.long 11
.long 24
.long 18
.long 5
.long 31
.long 12
.long 6
.long 25
.long 19
.globl random_order_7s
.align 32
.type random_order_7s, @object
.size random_order_7s, 64
random_order_7s:
.long 0
.long -1
.long -64
.long 63
.long -32
.long 32
.long 24
.long -20
.long 9
.long -27
.long -31
.long 33
.long 40
.long -2
.long -5
.long 1
.globl random_order_8s
.align 32
.type random_order_8s, @object
.size random_order_8s, 64
random_order_8s:
.long 0
.long -1
.long -128
.long 127
.long -32
.long 32
.long 24
.long -20
.long 73
.long -27
.long -95
.long 33
.long 104
.long -2
.long -69
.long 1
.globl random_order_9s
.align 32
.type random_order_9s, @object
.size random_order_9s, 64
random_order_9s:
.long 0
.long -1
.long -256
.long 255
.long -64
.long 64
.long 72
.long -40
.long 73
.long -137
.long -158
.long 37
.long 104
.long -240
.long -69
.long 1
.globl random_order_16s
.align 32
.type random_order_16s, @object
.size random_order_16s, 32
random_order_16s:
.long -32768
.long 32767
.long -16352
.long 16416
.long 4660
.long -30875
.long 384
.long -32767
.globl random_order_24s
.align 32
.type random_order_24s, @object
.size random_order_24s, 32
random_order_24s:
.long -8388608
.long 4194304
.long -4186096
.long 4202512
.long 1193046
.long -7903933
.long 130944
.long -8323327
.globl random_order_32s
.align 32
.type random_order_32s, @object
.size random_order_32s, 32
random_order_32s:
.long -2147483648
.long 1073741824
.long -1071640568
.long 1075843080
.long 305419896
.long -2023406815
.long 33554304
.long -2130706687
.text
.globl ulen
.type ulen, @function
ulen:
.LFB13:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -4[rbp], 0
cmp QWORD PTR -24[rbp], 0
jne .L24
mov eax, 1
jmp .L23
.L25:
mov ecx, DWORD PTR -28[rbp]
mov rax, QWORD PTR -24[rbp]
mov edx, 0
div rcx
mov QWORD PTR -24[rbp], rax
add DWORD PTR -4[rbp], 1
.L24:
cmp QWORD PTR -24[rbp], 0
jne .L25
mov eax, DWORD PTR -4[rbp]
cdqe
.L23:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE13:
.size ulen, .-ulen
.section .rodata
.LC0:
.string "%ld"
.text
.globl signed_constant
.type signed_constant, @function
signed_constant:
.LFB14:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov rax, QWORD PTR -40[rbp]
mov rcx, QWORD PTR 24[rax]
mov eax, DWORD PTR randomization_counter[rip]
lea edx, 1[rax]
mov DWORD PTR randomization_counter[rip], edx
mov rdx, QWORD PTR -40[rbp]
mov edx, DWORD PTR 8[rdx]
mov esi, edx
mov edx, 0
div esi
mov eax, edx
mov eax, eax
sal rax, 2
add rax, rcx
mov eax, DWORD PTR [rax]
mov eax, eax
mov QWORD PTR -8[rbp], rax
cmp QWORD PTR -8[rbp], 0
js .L27
mov rax, QWORD PTR -8[rbp]
mov esi, 10
mov rdi, rax
call ulen
jmp .L28
.L27:
mov rax, QWORD PTR -8[rbp]
neg rax
mov esi, 10
mov rdi, rax
call ulen
add eax, 1
.L28:
mov DWORD PTR -28[rbp], eax
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR 4[rax]
cdq
xor eax, edx
mov DWORD PTR -32[rbp], eax
sub DWORD PTR -32[rbp], edx
mov eax, DWORD PTR -32[rbp]
sub eax, 1
mov edx, 1
mov ecx, eax
sal rdx, cl
mov rax, rdx
add rax, rax
lea rdx, -1[rax]
mov rax, QWORD PTR -8[rbp]
and rax, rdx
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR -28[rbp]
add eax, 1
cdqe
mov rdi, rax
call malloc@PLT
mov rdx, rax
mov rax, QWORD PTR -48[rbp]
mov QWORD PTR 8[rax], rdx
mov rax, QWORD PTR -48[rbp]
mov rdx, QWORD PTR 8[rax]
mov rax, QWORD PTR -48[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -48[rbp]
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR -8[rbp]
lea rsi, .LC0[rip]
mov rdi, rax
mov eax, 0
call sprintf@PLT
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR 4[rax]
test eax, eax
jns .L29
mov QWORD PTR -16[rbp], 0
.L30:
sal QWORD PTR -16[rbp], 8
mov rax, QWORD PTR -24[rbp]
movzx eax, al
or QWORD PTR -16[rbp], rax
shr QWORD PTR -24[rbp], 8
sub DWORD PTR -32[rbp], 8
cmp DWORD PTR -32[rbp], 0
jg .L30
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR -24[rbp], rax
.L29:
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR [rax]
mov rdx, QWORD PTR -24[rbp]
mov ecx, eax
sal rdx, cl
mov rax, QWORD PTR -48[rbp]
mov QWORD PTR 16[rax], rdx
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE14:
.size signed_constant, .-signed_constant
.section .rodata
.LC1:
.string "%lu"
.text
.globl unsigned_constant
.type unsigned_constant, @function
unsigned_constant:
.LFB15:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR 4[rax]
cdq
xor eax, edx
mov DWORD PTR -32[rbp], eax
sub DWORD PTR -32[rbp], edx
mov rax, QWORD PTR -40[rbp]
mov rcx, QWORD PTR 24[rax]
mov eax, DWORD PTR randomization_counter[rip]
lea edx, 1[rax]
mov DWORD PTR randomization_counter[rip], edx
mov rdx, QWORD PTR -40[rbp]
mov edx, DWORD PTR 8[rdx]
mov esi, edx
mov edx, 0
div esi
mov eax, edx
mov eax, eax
sal rax, 2
add rax, rcx
mov eax, DWORD PTR [rax]
mov esi, eax
mov eax, DWORD PTR -32[rbp]
sub eax, 1
mov edx, 1
mov ecx, eax
sal rdx, cl
mov rax, rdx
add rax, rax
sub rax, 1
and rax, rsi
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov esi, 10
mov rdi, rax
call ulen
mov DWORD PTR -28[rbp], eax
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR -24[rbp], rax
mov eax, DWORD PTR -28[rbp]
add eax, 1
cdqe
mov rdi, rax
call malloc@PLT
mov rdx, rax
mov rax, QWORD PTR -48[rbp]
mov QWORD PTR 8[rax], rdx
mov rax, QWORD PTR -48[rbp]
mov rdx, QWORD PTR 8[rax]
mov rax, QWORD PTR -48[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -48[rbp]
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR -8[rbp]
lea rsi, .LC1[rip]
mov rdi, rax
mov eax, 0
call sprintf@PLT
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR 4[rax]
test eax, eax
jns .L33
mov QWORD PTR -16[rbp], 0
.L34:
sal QWORD PTR -16[rbp], 8
mov rax, QWORD PTR -24[rbp]
movzx eax, al
or QWORD PTR -16[rbp], rax
shr QWORD PTR -24[rbp], 8
sub DWORD PTR -32[rbp], 8
cmp DWORD PTR -32[rbp], 0
jg .L34
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR -24[rbp], rax
.L33:
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR [rax]
mov rdx, QWORD PTR -24[rbp]
mov ecx, eax
sal rdx, cl
mov rax, QWORD PTR -48[rbp]
mov QWORD PTR 16[rax], rdx
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE15:
.size unsigned_constant, .-unsigned_constant
.section .rodata
.LC2:
.string "0*%0*lx <[^>]*>"
.text
.globl absolute_address
.type absolute_address, @function
absolute_address:
.LFB16:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR 4[rax]
cdq
xor eax, edx
mov DWORD PTR -28[rbp], eax
sub DWORD PTR -28[rbp], edx
mov rax, QWORD PTR -40[rbp]
mov rcx, QWORD PTR 24[rax]
mov eax, DWORD PTR randomization_counter[rip]
lea edx, 1[rax]
mov DWORD PTR randomization_counter[rip], edx
mov rdx, QWORD PTR -40[rbp]
mov edx, DWORD PTR 8[rdx]
mov esi, edx
mov edx, 0
div esi
mov eax, edx
mov eax, eax
sal rax, 2
add rax, rcx
mov eax, DWORD PTR [rax]
mov esi, eax
mov eax, DWORD PTR -28[rbp]
sub eax, 1
mov edx, 1
mov ecx, eax
sal rdx, cl
mov rax, rdx
add rax, rax
sub rax, 1
and rax, rsi
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov esi, 10
mov rdi, rax
call ulen
add rax, 1
mov rdi, rax
call malloc@PLT
mov rdx, rax
mov rax, QWORD PTR -48[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -48[rbp]
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR -8[rbp]
lea rsi, .LC1[rip]
mov rdi, rax
mov eax, 0
call sprintf@PLT
mov eax, DWORD PTR -28[rbp]
lea edx, 3[rax]
test eax, eax
cmovs eax, edx
sar eax, 2
add eax, 11
cdqe
mov rdi, rax
call malloc@PLT
mov rdx, rax
mov rax, QWORD PTR -48[rbp]
mov QWORD PTR 8[rax], rdx
mov eax, DWORD PTR -28[rbp]
lea edx, 3[rax]
test eax, eax
cmovs eax, edx
sar eax, 2
mov esi, eax
mov rax, QWORD PTR -48[rbp]
mov rax, QWORD PTR 8[rax]
mov rdx, QWORD PTR -8[rbp]
mov rcx, rdx
mov edx, esi
lea rsi, .LC2[rip]
mov rdi, rax
mov eax, 0
call sprintf@PLT
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR 4[rax]
test eax, eax
jns .L37
mov QWORD PTR -16[rbp], 0
.L38:
sal QWORD PTR -16[rbp], 8
mov rax, QWORD PTR -24[rbp]
movzx eax, al
or QWORD PTR -16[rbp], rax
shr QWORD PTR -24[rbp], 8
sub DWORD PTR -28[rbp], 8
cmp DWORD PTR -28[rbp], 0
jg .L38
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR -24[rbp], rax
.L37:
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR [rax]
mov rdx, QWORD PTR -24[rbp]
mov ecx, eax
sal rdx, cl
mov rax, QWORD PTR -48[rbp]
mov QWORD PTR 16[rax], rdx
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE16:
.size absolute_address, .-absolute_address
.section .rodata
.LC3:
.string "%s%u"
.text
.globl reg_p
.type reg_p, @function
reg_p:
.LFB17:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 40
.cfi_offset 3, -24
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov rax, QWORD PTR -40[rbp]
mov rcx, QWORD PTR 24[rax]
mov eax, DWORD PTR randomization_counter[rip]
lea edx, 1[rax]
mov DWORD PTR randomization_counter[rip], edx
mov rdx, QWORD PTR -40[rbp]
mov edx, DWORD PTR 8[rdx]
mov esi, edx
mov edx, 0
div esi
mov eax, edx
mov eax, eax
sal rax, 2
add rax, rcx
mov eax, DWORD PTR [rax]
mov DWORD PTR -28[rbp], eax
mov rax, QWORD PTR -40[rbp]
mov rax, QWORD PTR 16[rax]
mov QWORD PTR -24[rbp], rax
mov rax, QWORD PTR -24[rbp]
mov rdi, rax
call strlen@PLT
mov rbx, rax
mov eax, DWORD PTR -28[rbp]
mov esi, 10
mov rdi, rax
call ulen
add rax, rbx
add rax, 1
mov rdi, rax
call malloc@PLT
mov rdx, rax
mov rax, QWORD PTR -48[rbp]
mov QWORD PTR 8[rax], rdx
mov rax, QWORD PTR -48[rbp]
mov rdx, QWORD PTR 8[rax]
mov rax, QWORD PTR -48[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -48[rbp]
mov rax, QWORD PTR [rax]
mov ecx, DWORD PTR -28[rbp]
mov rdx, QWORD PTR -24[rbp]
lea rsi, .LC3[rip]
mov rdi, rax
mov eax, 0
call sprintf@PLT
mov edx, DWORD PTR -28[rbp]
mov rax, QWORD PTR -48[rbp]
mov QWORD PTR 16[rax], rdx
mov rax, QWORD PTR -48[rbp]
mov rdx, QWORD PTR 16[rax]
mov rax, QWORD PTR -40[rbp]
mov eax, DWORD PTR [rax]
mov ecx, eax
sal rdx, cl
mov rax, QWORD PTR -48[rbp]
mov QWORD PTR 16[rax], rdx
mov eax, 0
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE17:
.size reg_p, .-reg_p
.globl reg_r
.type reg_r, @function
reg_r:
.LFB18:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov rax, QWORD PTR -24[rbp]
mov rcx, QWORD PTR 24[rax]
mov eax, DWORD PTR randomization_counter[rip]
lea edx, 1[rax]
mov DWORD PTR randomization_counter[rip], edx
mov rdx, QWORD PTR -24[rbp]
mov edx, DWORD PTR 8[rdx]
mov esi, edx
mov edx, 0
div esi
mov eax, edx
mov eax, eax
sal rax, 2
add rax, rcx
mov eax, DWORD PTR [rax]
mov DWORD PTR -4[rbp], eax
mov rax, QWORD PTR -24[rbp]
mov rdx, QWORD PTR 16[rax]
mov eax, DWORD PTR -4[rbp]
sal rax, 3
add rax, rdx
mov rax, QWORD PTR [rax]
mov rdi, rax
call strdup@PLT
mov rdx, rax
mov rax, QWORD PTR -32[rbp]
mov QWORD PTR [rax], rdx
mov rax, QWORD PTR -24[rbp]
mov eax, DWORD PTR 4[rax]
and DWORD PTR -4[rbp], eax
mov rax, QWORD PTR -24[rbp]
mov rdx, QWORD PTR 16[rax]
mov eax, DWORD PTR -4[rbp]
sal rax, 3
add rax, rdx
mov rax, QWORD PTR [rax]
mov rdi, rax
call strdup@PLT
mov rdx, rax
mov rax, QWORD PTR -32[rbp]
mov QWORD PTR 8[rax], rdx
mov edx, DWORD PTR -4[rbp]
mov rax, QWORD PTR -32[rbp]
mov QWORD PTR 16[rax], rdx
mov rax, QWORD PTR -32[rbp]
mov rdx, QWORD PTR 16[rax]
mov rax, QWORD PTR -24[rbp]
mov eax, DWORD PTR [rax]
mov ecx, eax
sal rdx, cl
mov rax, QWORD PTR -32[rbp]
mov QWORD PTR 16[rax], rdx
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE18:
.size reg_r, .-reg_r
.section .rodata
.LC4:
.string "0*%x <"
.LC5:
.string "%s\\+0x%x"
.LC6:
.string "[^>]*"
.LC7:
.string "> "
.LC8:
.string "%02x ?"
.LC9:
.string " *\t"
.text
.globl output_insns
.type output_insns, @function
output_insns:
.LFB19:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov QWORD PTR -72[rbp], rdx
jmp .L45
.L71:
mov rax, QWORD PTR -56[rbp]
mov rax, QWORD PTR [rax]
mov QWORD PTR -16[rbp], rax
mov DWORD PTR -40[rbp], 0
jmp .L46
.L47:
add DWORD PTR -40[rbp], 1
.L46:
mov eax, DWORD PTR -40[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 4
mov rdx, rax
mov rax, QWORD PTR -16[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
test rax, rax
jne .L47
mov eax, DWORD PTR -40[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
mov rdi, rax
call malloc@PLT
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -36[rbp], 0
jmp .L48
.L70:
mov eax, DWORD PTR randomization_counter[rip]
mov DWORD PTR -28[rbp], eax
mov QWORD PTR -24[rbp], 0
mov DWORD PTR -32[rbp], 0
jmp .L49
.L52:
mov eax, DWORD PTR -32[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
add rdx, rax
mov QWORD PTR 8[rdx], 0
mov eax, DWORD PTR -32[rbp]
movsx rcx, eax
mov rax, rcx
add rax, rax
add rax, rcx
sal rax, 3
mov rcx, rax
mov rax, QWORD PTR -8[rbp]
add rcx, rax
mov rax, QWORD PTR 8[rdx]
mov QWORD PTR [rcx], rax
mov eax, DWORD PTR -32[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
add rax, rdx
mov QWORD PTR 16[rax], 0
mov eax, DWORD PTR -32[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 4
mov rdx, rax
mov rax, QWORD PTR -16[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov eax, DWORD PTR -32[rbp]
movsx rcx, eax
mov rax, rcx
add rax, rax
add rax, rcx
sal rax, 3
mov rcx, rax
mov rax, QWORD PTR -8[rbp]
add rcx, rax
mov eax, DWORD PTR -32[rbp]
movsx rsi, eax
mov rax, rsi
add rax, rax
add rax, rsi
sal rax, 4
mov rsi, rax
mov rax, QWORD PTR -16[rbp]
add rax, rsi
add rax, 8
mov rsi, rcx
mov rdi, rax
call rdx
test eax, eax
jne .L72
mov eax, DWORD PTR -32[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
add rax, rdx
mov rax, QWORD PTR 16[rax]
or QWORD PTR -24[rbp], rax
add DWORD PTR -32[rbp], 1
.L49:
mov eax, DWORD PTR -32[rbp]
cmp eax, DWORD PTR -40[rbp]
jl .L52
cmp QWORD PTR -64[rbp], 0
je .L53
mov rax, QWORD PTR -64[rbp]
mov rsi, rax
mov edi, 9
call fputc@PLT
mov DWORD PTR -32[rbp], 0
jmp .L54
.L56:
mov eax, DWORD PTR -32[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
test rax, rax
je .L55
mov eax, DWORD PTR -32[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR -64[rbp]
mov rsi, rdx
mov rdi, rax
call fputs@PLT
.L55:
add DWORD PTR -32[rbp], 1
.L54:
mov eax, DWORD PTR -32[rbp]
cmp eax, DWORD PTR -40[rbp]
jl .L56
mov rax, QWORD PTR -64[rbp]
mov rsi, rax
mov edi, 10
call fputc@PLT
.L53:
cmp QWORD PTR -72[rbp], 0
je .L57
mov edx, DWORD PTR current_offset[rip]
mov rax, QWORD PTR -72[rbp]
lea rsi, .LC4[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov rax, QWORD PTR last_label_name[rip]
test rax, rax
je .L58
mov edx, DWORD PTR current_offset[rip]
mov eax, DWORD PTR last_label_offset[rip]
cmp edx, eax
jne .L59
mov rax, QWORD PTR last_label_name[rip]
mov rdx, QWORD PTR -72[rbp]
mov rsi, rdx
mov rdi, rax
call fputs@PLT
jmp .L60
.L59:
mov eax, DWORD PTR current_offset[rip]
mov edx, DWORD PTR last_label_offset[rip]
sub eax, edx
mov ecx, eax
mov rdx, QWORD PTR last_label_name[rip]
mov rax, QWORD PTR -72[rbp]
lea rsi, .LC5[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
jmp .L60
.L58:
mov rax, QWORD PTR -72[rbp]
mov rcx, rax
mov edx, 5
mov esi, 1
lea rdi, .LC6[rip]
call fwrite@PLT
.L60:
mov rax, QWORD PTR -72[rbp]
mov rcx, rax
mov edx, 2
mov esi, 1
lea rdi, .LC7[rip]
call fwrite@PLT
mov eax, DWORD PTR insn_size[rip]
mov DWORD PTR -32[rbp], eax
jmp .L61
.L62:
mov eax, DWORD PTR -32[rbp]
sal eax, 3
mov rdx, QWORD PTR -24[rbp]
mov ecx, eax
shr rdx, cl
mov rax, rdx
movzx edx, al
mov rax, QWORD PTR -72[rbp]
lea rsi, .LC8[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
.L61:
mov eax, DWORD PTR -32[rbp]
lea edx, -1[rax]
mov DWORD PTR -32[rbp], edx
test eax, eax
jg .L62
mov rax, QWORD PTR -72[rbp]
mov rcx, rax
mov edx, 3
mov esi, 1
lea rdi, .LC9[rip]
call fwrite@PLT
mov DWORD PTR -32[rbp], 0
jmp .L63
.L65:
mov eax, DWORD PTR -32[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
add rax, rdx
mov rax, QWORD PTR 8[rax]
test rax, rax
je .L64
mov eax, DWORD PTR -32[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
add rax, rdx
mov rax, QWORD PTR 8[rax]
mov rdx, QWORD PTR -72[rbp]
mov rsi, rdx
mov rdi, rax
call fputs@PLT
.L64:
add DWORD PTR -32[rbp], 1
.L63:
mov eax, DWORD PTR -32[rbp]
cmp eax, DWORD PTR -40[rbp]
jl .L65
mov rax, QWORD PTR -72[rbp]
mov rsi, rax
mov edi, 10
call fputc@PLT
.L57:
mov edx, DWORD PTR current_offset[rip]
mov eax, DWORD PTR insn_size[rip]
add eax, edx
mov DWORD PTR current_offset[rip], eax
jmp .L66
.L72:
nop
jmp .L51
.L73:
nop
.L51:
mov eax, DWORD PTR -32[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
test rax, rax
je .L67
mov eax, DWORD PTR -32[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov rdi, rax
call free@PLT
.L67:
mov eax, DWORD PTR -32[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
add rax, rdx
mov rax, QWORD PTR 8[rax]
test rax, rax
je .L66
mov eax, DWORD PTR -32[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
add rax, rdx
mov rcx, QWORD PTR 8[rax]
mov eax, DWORD PTR -32[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
cmp rcx, rax
je .L66
mov eax, DWORD PTR -32[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
sal rax, 3
mov rdx, rax
mov rax, QWORD PTR -8[rbp]
add rax, rdx
mov rax, QWORD PTR 8[rax]
mov rdi, rax
call free@PLT
.L66:
mov eax, DWORD PTR -32[rbp]
lea edx, -1[rax]
mov DWORD PTR -32[rbp], edx
test eax, eax
jg .L73
mov eax, DWORD PTR randomization_counter[rip]
cmp DWORD PTR -28[rbp], eax
je .L74
add DWORD PTR -36[rbp], 1
.L48:
cmp DWORD PTR -36[rbp], 4
jle .L70
jmp .L69
.L74:
nop
.L69:
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call free@PLT
add QWORD PTR -56[rbp], 8
.L45:
mov rax, QWORD PTR -56[rbp]
mov rax, QWORD PTR [rax]
test rax, rax
jne .L71
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE19:
.size output_insns, .-output_insns
.section .rodata
.LC10:
.string "%s:\n"
.LC11:
.string "# %s:\n"
.text
.globl output_groups
.type output_groups, @function
output_groups:
.LFB20:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov QWORD PTR -24[rbp], rdx
jmp .L76
.L77:
mov rax, QWORD PTR -8[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -16[rbp]
lea rsi, .LC10[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov rax, QWORD PTR -8[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
lea rsi, .LC11[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
mov eax, DWORD PTR current_offset[rip]
mov DWORD PTR last_label_offset[rip], eax
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR [rax]
mov QWORD PTR last_label_name[rip], rax
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 8[rax]
mov rdx, QWORD PTR -24[rbp]
mov rcx, QWORD PTR -16[rbp]
mov rsi, rcx
mov rdi, rax
call output_insns
add QWORD PTR -8[rbp], 16
.L76:
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR [rax]
test rax, rax
jne .L77
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE20:
.size output_groups, .-output_groups
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "446311.c"
.text
.global insn_size
.data
.align 2
.type insn_size, %object
.size insn_size, 4
insn_size:
.word 4
.global current_offset
.bss
.align 2
.type current_offset, %object
.size current_offset, 4
current_offset:
.space 4
.global last_label_offset
.align 2
.type last_label_offset, %object
.size last_label_offset, 4
last_label_offset:
.space 4
.global last_label_name
.align 2
.type last_label_name, %object
.size last_label_name, 4
last_label_name:
.space 4
.global skip_list
.align 2
.type skip_list, %object
.size skip_list, 4
skip_list:
.space 4
.global randomization_counter
.align 2
.type randomization_counter, %object
.size randomization_counter, 4
randomization_counter:
.space 4
.text
.align 2
.global nothing
.syntax unified
.arm
.fpu softvfp
.type nothing, %function
nothing:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size nothing, .-nothing
.align 2
.global literal
.syntax unified
.arm
.fpu softvfp
.type literal, %function
literal:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r3, [fp, #-8]
ldr r3, [r3, #12]
mov r0, r3
bl strdup
mov r3, r0
mov r2, r3
ldr r3, [fp, #-12]
str r2, [r3, #4]
ldr r3, [fp, #-12]
ldr r2, [r3, #4]
ldr r3, [fp, #-12]
str r2, [r3]
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size literal, .-literal
.align 2
.global literal_q
.syntax unified
.arm
.fpu softvfp
.type literal_q, %function
literal_q:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r3, [fp, #-8]
ldr r3, [r3, #12]
mov r0, r3
bl strdup
mov r3, r0
mov r2, r3
ldr r3, [fp, #-12]
str r2, [r3]
ldr r3, [fp, #-8]
ldr r3, [r3, #16]
mov r0, r3
bl strdup
mov r3, r0
mov r2, r3
ldr r3, [fp, #-12]
str r2, [r3, #4]
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size literal_q, .-literal_q
.align 2
.global skip_insn
.syntax unified
.arm
.fpu softvfp
.type skip_insn, %function
skip_insn:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r3, .L13
ldr r3, [r3]
cmp r3, #0
bne .L8
mov r3, #0
b .L9
.L8:
ldr r3, .L13
ldr r3, [r3]
str r3, [fp, #-8]
b .L10
.L12:
ldr r3, [fp, #-8]
ldr r3, [r3]
mov r1, r3
ldr r0, [fp, #-16]
bl strcmp
mov r3, r0
cmp r3, #0
bne .L11
mov r3, #0
b .L9
.L11:
ldr r3, [fp, #-8]
add r3, r3, #4
str r3, [fp, #-8]
.L10:
ldr r3, [fp, #-8]
ldr r3, [r3]
cmp r3, #0
bne .L12
mov r3, #1
.L9:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L14:
.align 2
.L13:
.word skip_list
.size skip_insn, .-skip_insn
.align 2
.global insn_bits
.syntax unified
.arm
.fpu softvfp
.type insn_bits, %function
insn_bits:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r3, [fp, #-8]
ldr r3, [r3, #12]
mov r0, r3
bl skip_insn
mov r3, r0
cmp r3, #0
beq .L16
mov r3, #1
b .L17
.L16:
ldr r3, [fp, #-8]
ldr r3, [r3, #12]
mov r0, r3
bl strdup
mov r3, r0
mov r2, r3
ldr r3, [fp, #-12]
str r2, [r3, #4]
ldr r3, [fp, #-12]
ldr r2, [r3, #4]
ldr r3, [fp, #-12]
str r2, [r3]
ldr r3, [fp, #-8]
add r3, r3, #24
ldmia r3, {r2-r3}
ldr r1, [fp, #-12]
str r2, [r1, #8]
str r3, [r1, #12]
mov r3, #0
.L17:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size insn_bits, .-insn_bits
.align 2
.global insn_size_bits
.syntax unified
.arm
.fpu softvfp
.type insn_size_bits, %function
insn_size_bits:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r3, [fp, #-8]
ldr r3, [r3, #12]
mov r0, r3
bl skip_insn
mov r3, r0
cmp r3, #0
beq .L19
mov r3, #1
b .L20
.L19:
ldr r3, [fp, #-8]
ldr r3, [r3, #12]
mov r0, r3
bl strdup
mov r3, r0
mov r2, r3
ldr r3, [fp, #-12]
str r2, [r3, #4]
ldr r3, [fp, #-12]
ldr r2, [r3, #4]
ldr r3, [fp, #-12]
str r2, [r3]
ldr r3, [fp, #-8]
add r3, r3, #24
ldmia r3, {r2-r3}
ldr r1, [fp, #-12]
str r2, [r1, #8]
str r3, [r1, #12]
ldr r3, [fp, #-8]
ldr r3, [r3]
ldr r2, .L21
str r3, [r2]
mov r3, #0
.L20:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L22:
.align 2
.L21:
.word insn_size
.size insn_size_bits, .-insn_size_bits
.align 2
.global tick_random
.syntax unified
.arm
.fpu softvfp
.type tick_random, %function
tick_random:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
ldr r3, .L25
ldr r3, [r3]
add r3, r3, #1
ldr r2, .L25
str r3, [r2]
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L26:
.align 2
.L25:
.word randomization_counter
.size tick_random, .-tick_random
.global random_order_2u
.data
.align 2
.type random_order_2u, %object
.size random_order_2u, 64
random_order_2u:
.word 0
.word 1
.word 3
.word 2
.word 2
.word 0
.word 1
.word 3
.word 1
.word 3
.word 2
.word 0
.word 3
.word 2
.word 0
.word 1
.global random_order_3u
.align 2
.type random_order_3u, %object
.size random_order_3u, 64
random_order_3u:
.word 0
.word 6
.word 3
.word 1
.word 4
.word 2
.word 7
.word 5
.word 0
.word 2
.word 5
.word 7
.word 4
.word 6
.word 1
.word 3
.global random_order_4u
.align 2
.type random_order_4u, %object
.size random_order_4u, 128
random_order_4u:
.word 0
.word 5
.word 15
.word 10
.word 9
.word 4
.word 14
.word 3
.word 8
.word 13
.word 7
.word 2
.word 1
.word 12
.word 6
.word 11
.word 0
.word 7
.word 5
.word 14
.word 3
.word 12
.word 10
.word 1
.word 8
.word 15
.word 13
.word 6
.word 11
.word 4
.word 2
.word 9
.global random_order_5u
.align 2
.type random_order_5u, %object
.size random_order_5u, 128
random_order_5u:
.word 0
.word 26
.word 13
.word 7
.word 20
.word 14
.word 1
.word 27
.word 8
.word 2
.word 21
.word 15
.word 28
.word 22
.word 9
.word 3
.word 16
.word 10
.word 29
.word 23
.word 4
.word 30
.word 17
.word 11
.word 24
.word 18
.word 5
.word 31
.word 12
.word 6
.word 25
.word 19
.global random_order_7s
.align 2
.type random_order_7s, %object
.size random_order_7s, 64
random_order_7s:
.word 0
.word -1
.word -64
.word 63
.word -32
.word 32
.word 24
.word -20
.word 9
.word -27
.word -31
.word 33
.word 40
.word -2
.word -5
.word 1
.global random_order_8s
.align 2
.type random_order_8s, %object
.size random_order_8s, 64
random_order_8s:
.word 0
.word -1
.word -128
.word 127
.word -32
.word 32
.word 24
.word -20
.word 73
.word -27
.word -95
.word 33
.word 104
.word -2
.word -69
.word 1
.global random_order_9s
.align 2
.type random_order_9s, %object
.size random_order_9s, 64
random_order_9s:
.word 0
.word -1
.word -256
.word 255
.word -64
.word 64
.word 72
.word -40
.word 73
.word -137
.word -158
.word 37
.word 104
.word -240
.word -69
.word 1
.global random_order_16s
.align 2
.type random_order_16s, %object
.size random_order_16s, 32
random_order_16s:
.word -32768
.word 32767
.word -16352
.word 16416
.word 4660
.word -30875
.word 384
.word -32767
.global random_order_24s
.align 2
.type random_order_24s, %object
.size random_order_24s, 32
random_order_24s:
.word -8388608
.word 4194304
.word -4186096
.word 4202512
.word 1193046
.word -7903933
.word 130944
.word -8323327
.global random_order_32s
.align 2
.type random_order_32s, %object
.size random_order_32s, 32
random_order_32s:
.word -2147483648
.word 1073741824
.word -1071640568
.word 1075843080
.word 305419896
.word -2023406815
.word 33554304
.word -2130706687
.global __aeabi_uidiv
.text
.align 2
.global ulen
.syntax unified
.arm
.fpu softvfp
.type ulen, %function
ulen:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r3, #0
str r3, [fp, #-8]
ldr r3, [fp, #-16]
cmp r3, #0
bne .L30
mov r3, #1
b .L29
.L31:
ldr r1, [fp, #-20]
ldr r0, [fp, #-16]
bl __aeabi_uidiv
mov r3, r0
str r3, [fp, #-16]
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L30:
ldr r3, [fp, #-16]
cmp r3, #0
bne .L31
ldr r3, [fp, #-8]
.L29:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size ulen, .-ulen
.global __aeabi_uidivmod
.section .rodata
.align 2
.LC0:
.ascii "%ld\000"
.text
.align 2
.global signed_constant
.syntax unified
.arm
.fpu softvfp
.type signed_constant, %function
signed_constant:
@ args = 0, pretend = 0, frame = 80
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, fp, lr}
add fp, sp, #28
sub sp, sp, #80
str r0, [fp, #-64]
str r1, [fp, #-68]
ldr r3, [fp, #-64]
ldr r6, [r3, #16]
ldr r3, .L38
ldr r0, [r3]
add r2, r0, #1
ldr r3, .L38
str r2, [r3]
ldr r3, [fp, #-64]
ldr r3, [r3, #8]
mov r1, r3
bl __aeabi_uidivmod
mov r3, r1
lsl r3, r3, #2
add r3, r6, r3
ldr r3, [r3]
str r3, [fp, #-52]
ldr r3, [fp, #-52]
cmp r3, #0
blt .L33
ldr r3, [fp, #-52]
mov r1, #10
mov r0, r3
bl ulen
mov r3, r0
b .L34
.L33:
ldr r3, [fp, #-52]
rsb r3, r3, #0
mov r1, #10
mov r0, r3
bl ulen
mov r3, r0
add r3, r3, #1
.L34:
str r3, [fp, #-48]
ldr r3, [fp, #-64]
ldr r3, [r3, #4]
cmp r3, #0
rsblt r3, r3, #0
str r3, [fp, #-56]
ldr r3, [fp, #-52]
mov r6, r3
asr r7, r6, #31
ldr r3, [fp, #-56]
sub r1, r3, #1
mov r2, #1
mov r3, #0
sub ip, r1, #32
rsb r0, r1, #32
lsl r5, r3, r1
orr r5, r5, r2, lsl ip
orr r5, r5, r2, lsr r0
lsl r4, r2, r1
adds r3, r4, r4
str r3, [fp, #-92]
adc r3, r5, r5
str r3, [fp, #-88]
sub r3, fp, #92
ldmia r3, {r2-r3}
subs r1, r2, #1
str r1, [fp, #-76]
sbc r3, r3, #0
str r3, [fp, #-72]
sub r4, fp, #76
ldmia r4, {r3-r4}
mov r2, r3
and r2, r6, r2
str r2, [fp, #-100]
mov r3, r4
and r3, r3, r7
str r3, [fp, #-96]
sub r4, fp, #100
ldmia r4, {r3-r4}
str r3, [fp, #-44]
str r4, [fp, #-40]
ldr r3, [fp, #-48]
add r3, r3, #1
mov r0, r3
bl malloc
mov r3, r0
mov r2, r3
ldr r3, [fp, #-68]
str r2, [r3, #4]
ldr r3, [fp, #-68]
ldr r2, [r3, #4]
ldr r3, [fp, #-68]
str r2, [r3]
ldr r3, [fp, #-68]
ldr r3, [r3]
ldr r2, [fp, #-52]
ldr r1, .L38+4
mov r0, r3
bl sprintf
ldr r3, [fp, #-64]
ldr r3, [r3, #4]
cmp r3, #0
bge .L35
mov r2, #0
mov r3, #0
str r2, [fp, #-36]
str r3, [fp, #-32]
.L36:
sub r1, fp, #36
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #0
lsl r3, r1, #8
orr r3, r3, r0, lsr #24
lsl r2, r0, #8
str r2, [fp, #-36]
str r3, [fp, #-32]
sub r3, fp, #44
ldmia r3, {r2-r3}
mov r0, #255
mov r1, #0
and ip, r2, r0
str ip, [fp, #-84]
and r3, r3, r1
str r3, [fp, #-80]
sub r3, fp, #36
ldmia r3, {r2-r3}
sub r1, fp, #84
ldmia r1, {r0-r1}
mov ip, r0
orr ip, r2, ip
str ip, [fp, #-108]
orr r3, r3, r1
str r3, [fp, #-104]
sub r4, fp, #108
ldmia r4, {r3-r4}
str r3, [fp, #-36]
str r4, [fp, #-32]
sub r1, fp, #44
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #0
lsr r2, r0, #8
orr r2, r2, r1, lsl #24
lsr r3, r1, #8
str r2, [fp, #-44]
str r3, [fp, #-40]
ldr r3, [fp, #-56]
sub r3, r3, #8
str r3, [fp, #-56]
ldr r3, [fp, #-56]
cmp r3, #0
bgt .L36
sub r3, fp, #36
ldmia r3, {r2-r3}
str r2, [fp, #-44]
str r3, [fp, #-40]
.L35:
ldr r3, [fp, #-64]
ldr r1, [r3]
sub r3, fp, #44
ldmia r3, {r2-r3}
sub ip, r1, #32
rsb r0, r1, #32
lsl r9, r3, r1
orr r9, r9, r2, lsl ip
orr r9, r9, r2, lsr r0
lsl r8, r2, r1
ldr r3, [fp, #-68]
str r8, [r3, #8]
str r9, [r3, #12]
mov r3, #0
mov r0, r3
sub sp, fp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, fp, pc}
.L39:
.align 2
.L38:
.word randomization_counter
.word .LC0
.size signed_constant, .-signed_constant
.section .rodata
.align 2
.LC1:
.ascii "%lu\000"
.text
.align 2
.global unsigned_constant
.syntax unified
.arm
.fpu softvfp
.type unsigned_constant, %function
unsigned_constant:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #52
str r0, [fp, #-72]
str r1, [fp, #-76]
ldr r3, [fp, #-72]
ldr r3, [r3, #4]
cmp r3, #0
rsblt r3, r3, #0
str r3, [fp, #-64]
ldr r3, [fp, #-72]
ldr r10, [r3, #16]
ldr r3, .L44
ldr r3, [r3]
add r2, r3, #1
ldr r1, .L44
str r2, [r1]
ldr r2, [fp, #-72]
ldr r2, [r2, #8]
mov r1, r2
mov r0, r3
bl __aeabi_uidivmod
mov r3, r1
lsl r3, r3, #2
add r3, r10, r3
ldr r0, [r3]
ldr r3, [fp, #-64]
sub r1, r3, #1
mov r2, #1
mov r3, #0
sub lr, r1, #32
rsb ip, r1, #32
lsl r7, r3, r1
orr r7, r7, r2, lsl lr
orr r7, r7, r2, lsr ip
lsl r6, r2, r1
mov r3, r6
lsl r3, r3, #1
sub r3, r3, #1
and r3, r3, r0
str r3, [fp, #-60]
mov r1, #10
ldr r0, [fp, #-60]
bl ulen
mov r3, r0
str r3, [fp, #-56]
ldr r3, [fp, #-60]
mov r2, r3
mov r3, #0
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r3, [fp, #-56]
add r3, r3, #1
mov r0, r3
bl malloc
mov r3, r0
mov r2, r3
ldr r3, [fp, #-76]
str r2, [r3, #4]
ldr r3, [fp, #-76]
ldr r2, [r3, #4]
ldr r3, [fp, #-76]
str r2, [r3]
ldr r3, [fp, #-76]
ldr r3, [r3]
ldr r2, [fp, #-60]
ldr r1, .L44+4
mov r0, r3
bl sprintf
ldr r3, [fp, #-72]
ldr r3, [r3, #4]
cmp r3, #0
bge .L41
mov r2, #0
mov r3, #0
str r2, [fp, #-44]
str r3, [fp, #-40]
.L42:
sub r1, fp, #44
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #0
lsl r3, r1, #8
orr r3, r3, r0, lsr #24
lsl r2, r0, #8
str r2, [fp, #-44]
str r3, [fp, #-40]
sub r3, fp, #52
ldmia r3, {r2-r3}
mov r0, #255
mov r1, #0
and r8, r2, r0
and r9, r3, r1
sub r3, fp, #44
ldmia r3, {r2-r3}
orr r1, r2, r8
str r1, [fp, #-84]
orr r3, r3, r9
str r3, [fp, #-80]
sub r3, fp, #84
ldmia r3, {r2-r3}
str r2, [fp, #-44]
str r3, [fp, #-40]
sub r1, fp, #52
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #0
lsr r2, r0, #8
orr r2, r2, r1, lsl #24
lsr r3, r1, #8
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r3, [fp, #-64]
sub r3, r3, #8
str r3, [fp, #-64]
ldr r3, [fp, #-64]
cmp r3, #0
bgt .L42
sub r3, fp, #44
ldmia r3, {r2-r3}
str r2, [fp, #-52]
str r3, [fp, #-48]
.L41:
ldr r3, [fp, #-72]
ldr r1, [r3]
sub r3, fp, #52
ldmia r3, {r2-r3}
sub ip, r1, #32
rsb r0, r1, #32
lsl r5, r3, r1
orr r5, r5, r2, lsl ip
orr r5, r5, r2, lsr r0
lsl r4, r2, r1
ldr r3, [fp, #-76]
str r4, [r3, #8]
str r5, [r3, #12]
mov r3, #0
mov r0, r3
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L45:
.align 2
.L44:
.word randomization_counter
.word .LC1
.size unsigned_constant, .-unsigned_constant
.section .rodata
.align 2
.LC2:
.ascii "0*%0*lx <[^>]*>\000"
.text
.align 2
.global absolute_address
.syntax unified
.arm
.fpu softvfp
.type absolute_address, %function
absolute_address:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #44
str r0, [fp, #-64]
str r1, [fp, #-68]
ldr r3, [fp, #-64]
ldr r3, [r3, #4]
cmp r3, #0
rsblt r3, r3, #0
str r3, [fp, #-60]
ldr r3, [fp, #-64]
ldr r10, [r3, #16]
ldr r3, .L50
ldr r3, [r3]
add r2, r3, #1
ldr r1, .L50
str r2, [r1]
ldr r2, [fp, #-64]
ldr r2, [r2, #8]
mov r1, r2
mov r0, r3
bl __aeabi_uidivmod
mov r3, r1
lsl r3, r3, #2
add r3, r10, r3
ldr r0, [r3]
ldr r3, [fp, #-60]
sub r1, r3, #1
mov r2, #1
mov r3, #0
sub lr, r1, #32
rsb ip, r1, #32
lsl r7, r3, r1
orr r7, r7, r2, lsl lr
orr r7, r7, r2, lsr ip
lsl r6, r2, r1
mov r3, r6
lsl r3, r3, #1
sub r3, r3, #1
and r3, r3, r0
str r3, [fp, #-56]
ldr r3, [fp, #-56]
mov r2, r3
mov r3, #0
str r2, [fp, #-52]
str r3, [fp, #-48]
mov r1, #10
ldr r0, [fp, #-56]
bl ulen
mov r3, r0
add r3, r3, #1
mov r0, r3
bl malloc
mov r3, r0
mov r2, r3
ldr r3, [fp, #-68]
str r2, [r3]
ldr r3, [fp, #-68]
ldr r3, [r3]
ldr r2, [fp, #-56]
ldr r1, .L50+4
mov r0, r3
bl sprintf
ldr r3, [fp, #-60]
add r2, r3, #3
cmp r3, #0
movlt r3, r2
movge r3, r3
asr r3, r3, #2
add r3, r3, #11
mov r0, r3
bl malloc
mov r3, r0
mov r2, r3
ldr r3, [fp, #-68]
str r2, [r3, #4]
ldr r3, [fp, #-68]
ldr r0, [r3, #4]
ldr r3, [fp, #-60]
add r2, r3, #3
cmp r3, #0
movlt r3, r2
movge r3, r3
asr r3, r3, #2
mov r2, r3
ldr r3, [fp, #-56]
ldr r1, .L50+8
bl sprintf
ldr r3, [fp, #-64]
ldr r3, [r3, #4]
cmp r3, #0
bge .L47
mov r2, #0
mov r3, #0
str r2, [fp, #-44]
str r3, [fp, #-40]
.L48:
sub r1, fp, #44
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #0
lsl r3, r1, #8
orr r3, r3, r0, lsr #24
lsl r2, r0, #8
str r2, [fp, #-44]
str r3, [fp, #-40]
sub r3, fp, #52
ldmia r3, {r2-r3}
mov r0, #255
mov r1, #0
and r8, r2, r0
and r9, r3, r1
sub r3, fp, #44
ldmia r3, {r2-r3}
orr r1, r2, r8
str r1, [fp, #-76]
orr r3, r3, r9
str r3, [fp, #-72]
sub r3, fp, #76
ldmia r3, {r2-r3}
str r2, [fp, #-44]
str r3, [fp, #-40]
sub r1, fp, #52
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #0
lsr r2, r0, #8
orr r2, r2, r1, lsl #24
lsr r3, r1, #8
str r2, [fp, #-52]
str r3, [fp, #-48]
ldr r3, [fp, #-60]
sub r3, r3, #8
str r3, [fp, #-60]
ldr r3, [fp, #-60]
cmp r3, #0
bgt .L48
sub r3, fp, #44
ldmia r3, {r2-r3}
str r2, [fp, #-52]
str r3, [fp, #-48]
.L47:
ldr r3, [fp, #-64]
ldr r1, [r3]
sub r3, fp, #52
ldmia r3, {r2-r3}
sub ip, r1, #32
rsb r0, r1, #32
lsl r5, r3, r1
orr r5, r5, r2, lsl ip
orr r5, r5, r2, lsr r0
lsl r4, r2, r1
ldr r3, [fp, #-68]
str r4, [r3, #8]
str r5, [r3, #12]
mov r3, #0
mov r0, r3
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L51:
.align 2
.L50:
.word randomization_counter
.word .LC1
.word .LC2
.size absolute_address, .-absolute_address
.section .rodata
.align 2
.LC3:
.ascii "%s%u\000"
.text
.align 2
.global reg_p
.syntax unified
.arm
.fpu softvfp
.type reg_p, %function
reg_p:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, fp, lr}
add fp, sp, #16
sub sp, sp, #20
str r0, [fp, #-32]
str r1, [fp, #-36]
ldr r3, [fp, #-32]
ldr r6, [r3, #16]
ldr r3, .L54
ldr r3, [r3]
add r2, r3, #1
ldr r1, .L54
str r2, [r1]
ldr r2, [fp, #-32]
ldr r2, [r2, #8]
mov r1, r2
mov r0, r3
bl __aeabi_uidivmod
mov r3, r1
lsl r3, r3, #2
add r3, r6, r3
ldr r3, [r3]
str r3, [fp, #-28]
ldr r3, [fp, #-32]
ldr r3, [r3, #12]
str r3, [fp, #-24]
ldr r0, [fp, #-24]
bl strlen
mov r6, r0
mov r1, #10
ldr r0, [fp, #-28]
bl ulen
mov r3, r0
add r3, r6, r3
add r3, r3, #1
mov r0, r3
bl malloc
mov r3, r0
mov r2, r3
ldr r3, [fp, #-36]
str r2, [r3, #4]
ldr r3, [fp, #-36]
ldr r2, [r3, #4]
ldr r3, [fp, #-36]
str r2, [r3]
ldr r3, [fp, #-36]
ldr r0, [r3]
ldr r3, [fp, #-28]
ldr r2, [fp, #-24]
ldr r1, .L54+4
bl sprintf
ldr r3, [fp, #-28]
mov r2, r3
mov r3, #0
ldr r1, [fp, #-36]
str r2, [r1, #8]
str r3, [r1, #12]
ldr r3, [fp, #-36]
add r3, r3, #8
ldmia r3, {r2-r3}
ldr r1, [fp, #-32]
ldr r1, [r1]
sub ip, r1, #32
rsb r0, r1, #32
lsl r5, r3, r1
orr r5, r5, r2, lsl ip
orr r5, r5, r2, lsr r0
lsl r4, r2, r1
ldr r3, [fp, #-36]
str r4, [r3, #8]
str r5, [r3, #12]
mov r3, #0
mov r0, r3
sub sp, fp, #16
@ sp needed
pop {r4, r5, r6, fp, pc}
.L55:
.align 2
.L54:
.word randomization_counter
.word .LC3
.size reg_p, .-reg_p
.align 2
.global reg_r
.syntax unified
.arm
.fpu softvfp
.type reg_r, %function
reg_r:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, fp, lr}
add fp, sp, #16
sub sp, sp, #20
str r0, [fp, #-32]
str r1, [fp, #-36]
ldr r3, [fp, #-32]
ldr r6, [r3, #16]
ldr r3, .L58
ldr r3, [r3]
add r2, r3, #1
ldr r1, .L58
str r2, [r1]
ldr r2, [fp, #-32]
ldr r2, [r2, #8]
mov r1, r2
mov r0, r3
bl __aeabi_uidivmod
mov r3, r1
lsl r3, r3, #2
add r3, r6, r3
ldr r3, [r3]
str r3, [fp, #-24]
ldr r3, [fp, #-32]
ldr r2, [r3, #12]
ldr r3, [fp, #-24]
lsl r3, r3, #2
add r3, r2, r3
ldr r3, [r3]
mov r0, r3
bl strdup
mov r3, r0
mov r2, r3
ldr r3, [fp, #-36]
str r2, [r3]
ldr r3, [fp, #-32]
ldr r3, [r3, #4]
mov r2, r3
ldr r3, [fp, #-24]
and r3, r3, r2
str r3, [fp, #-24]
ldr r3, [fp, #-32]
ldr r2, [r3, #12]
ldr r3, [fp, #-24]
lsl r3, r3, #2
add r3, r2, r3
ldr r3, [r3]
mov r0, r3
bl strdup
mov r3, r0
mov r2, r3
ldr r3, [fp, #-36]
str r2, [r3, #4]
ldr r3, [fp, #-24]
mov r2, r3
mov r3, #0
ldr r1, [fp, #-36]
str r2, [r1, #8]
str r3, [r1, #12]
ldr r3, [fp, #-36]
add r3, r3, #8
ldmia r3, {r2-r3}
ldr r1, [fp, #-32]
ldr r1, [r1]
sub ip, r1, #32
rsb r0, r1, #32
lsl r5, r3, r1
orr r5, r5, r2, lsl ip
orr r5, r5, r2, lsr r0
lsl r4, r2, r1
ldr r3, [fp, #-36]
str r4, [r3, #8]
str r5, [r3, #12]
mov r3, #0
mov r0, r3
sub sp, fp, #16
@ sp needed
pop {r4, r5, r6, fp, pc}
.L59:
.align 2
.L58:
.word randomization_counter
.size reg_r, .-reg_r
.section .rodata
.align 2
.LC4:
.ascii "0*%x <\000"
.align 2
.LC5:
.ascii "%s\\+0x%x\000"
.align 2
.LC6:
.ascii "[^>]*\000"
.align 2
.LC7:
.ascii "> \000"
.align 2
.LC8:
.ascii "%02x ?\000"
.align 2
.LC9:
.ascii " *\011\000"
.text
.align 2
.global output_insns
.syntax unified
.arm
.fpu softvfp
.type output_insns, %function
output_insns:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, fp, lr}
add fp, sp, #24
sub sp, sp, #52
str r0, [fp, #-64]
str r1, [fp, #-68]
str r2, [fp, #-72]
b .L61
.L87:
ldr r3, [fp, #-64]
ldr r3, [r3]
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-60]
b .L62
.L63:
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L62:
ldr r2, [fp, #-60]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #3
mov r2, r3
ldr r3, [fp, #-48]
add r3, r3, r2
ldr r3, [r3]
cmp r3, #0
bne .L63
ldr r3, [fp, #-60]
lsl r3, r3, #4
mov r0, r3
bl malloc
mov r3, r0
str r3, [fp, #-44]
mov r3, #0
str r3, [fp, #-56]
b .L64
.L86:
ldr r3, .L91
ldr r3, [r3]
str r3, [fp, #-40]
mov r2, #0
mov r3, #0
str r2, [fp, #-36]
str r3, [fp, #-32]
mov r3, #0
str r3, [fp, #-52]
b .L65
.L68:
ldr r3, [fp, #-52]
lsl r3, r3, #4
ldr r2, [fp, #-44]
add r3, r2, r3
mov r2, #0
str r2, [r3, #4]
ldr r2, [fp, #-52]
lsl r2, r2, #4
ldr r1, [fp, #-44]
add r2, r1, r2
ldr r3, [r3, #4]
str r3, [r2]
ldr r3, [fp, #-52]
lsl r3, r3, #4
ldr r2, [fp, #-44]
add r1, r2, r3
mov r2, #0
mov r3, #0
str r2, [r1, #8]
str r3, [r1, #12]
ldr r2, [fp, #-52]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #3
mov r2, r3
ldr r3, [fp, #-48]
add r3, r3, r2
ldr r8, [r3]
ldr r2, [fp, #-52]
mov r3, r2
lsl r3, r3, #2
add r3, r3, r2
lsl r3, r3, #3
mov r2, r3
ldr r3, [fp, #-48]
add r3, r3, r2
add r0, r3, #8
ldr r3, [fp, #-52]
lsl r3, r3, #4
ldr r2, [fp, #-44]
add r3, r2, r3
mov r1, r3
blx r8
mov r3, r0
cmp r3, #0
bne .L88
ldr r3, [fp, #-52]
lsl r3, r3, #4
ldr r2, [fp, #-44]
add r3, r2, r3
add r3, r3, #8
ldmia r3, {r2-r3}
sub r1, fp, #36
ldmia r1, {r0-r1}
orr r6, r0, r2
orr r7, r1, r3
str r6, [fp, #-36]
str r7, [fp, #-32]
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L65:
ldr r2, [fp, #-52]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L68
ldr r3, [fp, #-68]
cmp r3, #0
beq .L69
ldr r1, [fp, #-68]
mov r0, #9
bl fputc
mov r3, #0
str r3, [fp, #-52]
b .L70
.L72:
ldr r3, [fp, #-52]
lsl r3, r3, #4
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r3, [r3]
cmp r3, #0
beq .L71
ldr r3, [fp, #-52]
lsl r3, r3, #4
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r3, [r3]
ldr r1, [fp, #-68]
mov r0, r3
bl fputs
.L71:
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L70:
ldr r2, [fp, #-52]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L72
ldr r1, [fp, #-68]
mov r0, #10
bl fputc
.L69:
ldr r3, [fp, #-72]
cmp r3, #0
beq .L73
ldr r3, .L91+4
ldr r3, [r3]
mov r2, r3
ldr r1, .L91+8
ldr r0, [fp, #-72]
bl fprintf
ldr r3, .L91+12
ldr r3, [r3]
cmp r3, #0
beq .L74
ldr r3, .L91+4
ldr r2, [r3]
ldr r3, .L91+16
ldr r3, [r3]
cmp r2, r3
bne .L75
ldr r3, .L91+12
ldr r3, [r3]
ldr r1, [fp, #-72]
mov r0, r3
bl fputs
b .L76
.L75:
ldr r3, .L91+12
ldr r1, [r3]
ldr r3, .L91+4
ldr r2, [r3]
ldr r3, .L91+16
ldr r3, [r3]
sub r3, r2, r3
mov r2, r1
ldr r1, .L91+20
ldr r0, [fp, #-72]
bl fprintf
b .L76
.L74:
ldr r3, [fp, #-72]
mov r2, #5
mov r1, #1
ldr r0, .L91+24
bl fwrite
.L76:
ldr r3, [fp, #-72]
mov r2, #2
mov r1, #1
ldr r0, .L91+28
bl fwrite
ldr r3, .L91+32
ldr r3, [r3]
str r3, [fp, #-52]
b .L77
.L78:
ldr r3, [fp, #-52]
lsl r1, r3, #3
sub r3, fp, #36
ldmia r3, {r2-r3}
rsb ip, r1, #32
sub r0, r1, #32
lsr r4, r2, r1
orr r4, r4, r3, lsl ip
orr r4, r4, r3, lsr r0
lsr r5, r3, r1
mov r3, r4
and r3, r3, #255
mov r2, r3
ldr r1, .L91+36
ldr r0, [fp, #-72]
bl fprintf
.L77:
ldr r3, [fp, #-52]
sub r2, r3, #1
str r2, [fp, #-52]
cmp r3, #0
bgt .L78
ldr r3, [fp, #-72]
mov r2, #3
mov r1, #1
ldr r0, .L91+40
bl fwrite
mov r3, #0
str r3, [fp, #-52]
b .L79
.L81:
ldr r3, [fp, #-52]
lsl r3, r3, #4
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r3, [r3, #4]
cmp r3, #0
beq .L80
ldr r3, [fp, #-52]
lsl r3, r3, #4
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r3, [r3, #4]
ldr r1, [fp, #-72]
mov r0, r3
bl fputs
.L80:
ldr r3, [fp, #-52]
add r3, r3, #1
str r3, [fp, #-52]
.L79:
ldr r2, [fp, #-52]
ldr r3, [fp, #-60]
cmp r2, r3
blt .L81
ldr r1, [fp, #-72]
mov r0, #10
bl fputc
.L73:
ldr r3, .L91+4
ldr r2, [r3]
ldr r3, .L91+32
ldr r3, [r3]
add r3, r2, r3
ldr r2, .L91+4
str r3, [r2]
b .L82
.L88:
nop
b .L67
.L89:
nop
.L67:
ldr r3, [fp, #-52]
lsl r3, r3, #4
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r3, [r3]
cmp r3, #0
beq .L83
ldr r3, [fp, #-52]
lsl r3, r3, #4
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r3, [r3]
mov r0, r3
bl free
.L83:
ldr r3, [fp, #-52]
lsl r3, r3, #4
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r3, [r3, #4]
cmp r3, #0
beq .L82
ldr r3, [fp, #-52]
lsl r3, r3, #4
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r2, [r3, #4]
ldr r3, [fp, #-52]
lsl r3, r3, #4
ldr r1, [fp, #-44]
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
beq .L82
ldr r3, [fp, #-52]
lsl r3, r3, #4
ldr r2, [fp, #-44]
add r3, r2, r3
ldr r3, [r3, #4]
mov r0, r3
bl free
.L82:
ldr r3, [fp, #-52]
sub r2, r3, #1
str r2, [fp, #-52]
cmp r3, #0
bgt .L89
ldr r3, .L91
ldr r3, [r3]
ldr r2, [fp, #-40]
cmp r2, r3
beq .L90
ldr r3, [fp, #-56]
add r3, r3, #1
str r3, [fp, #-56]
.L64:
ldr r3, [fp, #-56]
cmp r3, #4
ble .L86
b .L85
.L90:
nop
.L85:
ldr r0, [fp, #-44]
bl free
ldr r3, [fp, #-64]
add r3, r3, #4
str r3, [fp, #-64]
.L61:
ldr r3, [fp, #-64]
ldr r3, [r3]
cmp r3, #0
bne .L87
nop
nop
sub sp, fp, #24
@ sp needed
pop {r4, r5, r6, r7, r8, fp, pc}
.L92:
.align 2
.L91:
.word randomization_counter
.word current_offset
.word .LC4
.word last_label_name
.word last_label_offset
.word .LC5
.word .LC6
.word .LC7
.word insn_size
.word .LC8
.word .LC9
.size output_insns, .-output_insns
.section .rodata
.align 2
.LC10:
.ascii "%s:\012\000"
.align 2
.LC11:
.ascii "# %s:\012\000"
.text
.align 2
.global output_groups
.syntax unified
.arm
.fpu softvfp
.type output_groups, %function
output_groups:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-8]
str r1, [fp, #-12]
str r2, [fp, #-16]
b .L94
.L95:
ldr r3, [fp, #-8]
ldr r3, [r3]
mov r2, r3
ldr r1, .L96
ldr r0, [fp, #-12]
bl fprintf
ldr r3, [fp, #-8]
ldr r3, [r3]
mov r2, r3
ldr r1, .L96+4
ldr r0, [fp, #-16]
bl fprintf
ldr r3, .L96+8
ldr r3, [r3]
ldr r2, .L96+12
str r3, [r2]
ldr r3, [fp, #-8]
ldr r3, [r3]
ldr r2, .L96+16
str r3, [r2]
ldr r3, [fp, #-8]
ldr r3, [r3, #4]
ldr r2, [fp, #-16]
ldr r1, [fp, #-12]
mov r0, r3
bl output_insns
ldr r3, [fp, #-8]
add r3, r3, #8
str r3, [fp, #-8]
.L94:
ldr r3, [fp, #-8]
ldr r3, [r3]
cmp r3, #0
bne .L95
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L97:
.align 2
.L96:
.word .LC10
.word .LC11
.word current_offset
.word last_label_offset
.word last_label_name
.size output_groups, .-output_groups
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "894990.c"
.intel_syntax noprefix
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov DWORD PTR -20[rbp], edi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -8[rbp], 0
mov DWORD PTR -4[rbp], 0
jmp .L2
.L4:
call getchar@PLT
mov BYTE PTR -9[rbp], al
cmp BYTE PTR -9[rbp], 0
je .L3
add DWORD PTR -8[rbp], 2
jmp .L2
.L3:
add DWORD PTR -8[rbp], 1
add DWORD PTR -4[rbp], 1
.L2:
cmp DWORD PTR -8[rbp], 100
jle .L4
mov eax, DWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "894990.c"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
str r1, [fp, #-28]
mov r3, #0
str r3, [fp, #-12]
mov r3, #0
str r3, [fp, #-8]
b .L2
.L4:
bl getchar
mov r3, r0
strb r3, [fp, #-13]
ldrb r3, [fp, #-13] @ zero_extendqisi2
cmp r3, #0
beq .L3
ldr r3, [fp, #-12]
add r3, r3, #2
str r3, [fp, #-12]
b .L2
.L3:
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L2:
ldr r3, [fp, #-12]
cmp r3, #100
ble .L4
ldr r3, [fp, #-12]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "568422.c"
.intel_syntax noprefix
.text
.globl mout0
.bss
.align 4
.type mout0, @object
.size mout0, 4
mout0:
.zero 4
.globl min1
.align 4
.type min1, @object
.size min1, 4
min1:
.zero 4
.globl marray
.align 8
.type marray, @object
.size marray, 8
marray:
.zero 8
.text
.globl single_m
.type single_m, @function
single_m:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
#APP
# 21 "the_stack_data/568422.c" 1
foo DWORD PTR min1[rip],DWORD PTR mout0[rip]
# 0 "" 2
#NO_APP
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size single_m, .-single_m
.globl single_o
.type single_o, @function
single_o:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size single_o, .-single_o
.globl single_V
.type single_V, @function
single_V:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size single_V, .-single_V
.globl single_lt
.type single_lt, @function
single_lt:
.LFB3:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE3:
.size single_lt, .-single_lt
.globl single_gt
.type single_gt, @function
single_gt:
.LFB4:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE4:
.size single_gt, .-single_gt
.globl single_r
.type single_r, @function
single_r:
.LFB5:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE5:
.size single_r, .-single_r
.globl single_i
.type single_i, @function
single_i:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size single_i, .-single_i
.globl single_n
.type single_n, @function
single_n:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size single_n, .-single_n
.globl single_E
.type single_E, @function
single_E:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size single_E, .-single_E
.globl single_F
.type single_F, @function
single_F:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size single_F, .-single_F
.globl single_s
.type single_s, @function
single_s:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size single_s, .-single_s
.globl single_g
.type single_g, @function
single_g:
.LFB11:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE11:
.size single_g, .-single_g
.globl single_X
.type single_X, @function
single_X:
.LFB12:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE12:
.size single_X, .-single_X
.globl single_p
.type single_p, @function
single_p:
.LFB13:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE13:
.size single_p, .-single_p
.globl multi_m
.type multi_m, @function
multi_m:
.LFB14:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, DWORD PTR min1[rip]
#APP
# 154 "the_stack_data/568422.c" 1
foo eax,eax
# 0 "" 2
#NO_APP
mov DWORD PTR mout0[rip], eax
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE14:
.size multi_m, .-multi_m
.globl multi_o
.type multi_o, @function
multi_o:
.LFB15:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE15:
.size multi_o, .-multi_o
.globl multi_V
.type multi_V, @function
multi_V:
.LFB16:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE16:
.size multi_V, .-multi_V
.globl multi_lt
.type multi_lt, @function
multi_lt:
.LFB17:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE17:
.size multi_lt, .-multi_lt
.globl multi_gt
.type multi_gt, @function
multi_gt:
.LFB18:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE18:
.size multi_gt, .-multi_gt
.globl multi_r
.type multi_r, @function
multi_r:
.LFB19:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE19:
.size multi_r, .-multi_r
.globl multi_i
.type multi_i, @function
multi_i:
.LFB20:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE20:
.size multi_i, .-multi_i
.globl multi_n
.type multi_n, @function
multi_n:
.LFB21:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE21:
.size multi_n, .-multi_n
.globl multi_E
.type multi_E, @function
multi_E:
.LFB22:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE22:
.size multi_E, .-multi_E
.globl multi_F
.type multi_F, @function
multi_F:
.LFB23:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE23:
.size multi_F, .-multi_F
.globl multi_s
.type multi_s, @function
multi_s:
.LFB24:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE24:
.size multi_s, .-multi_s
.globl multi_g
.type multi_g, @function
multi_g:
.LFB25:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE25:
.size multi_g, .-multi_g
.globl multi_X
.type multi_X, @function
multi_X:
.LFB26:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE26:
.size multi_X, .-multi_X
.globl multi_p
.type multi_p, @function
multi_p:
.LFB27:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE27:
.size multi_p, .-multi_p
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "568422.c"
.text
.comm mout0,4,4
.comm min1,4,4
.comm marray,8,4
.align 2
.global single_m
.syntax unified
.arm
.fpu softvfp
.type single_m, %function
single_m:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
ldr r3, .L2
ldr r2, .L2+4
.syntax divided
@ 21 "the_stack_data/568422.c" 1
foo [r2],[r3]
@ 0 "" 2
.arm
.syntax unified
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L3:
.align 2
.L2:
.word mout0
.word min1
.size single_m, .-single_m
.align 2
.global single_o
.syntax unified
.arm
.fpu softvfp
.type single_o, %function
single_o:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size single_o, .-single_o
.align 2
.global single_V
.syntax unified
.arm
.fpu softvfp
.type single_V, %function
single_V:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size single_V, .-single_V
.align 2
.global single_lt
.syntax unified
.arm
.fpu softvfp
.type single_lt, %function
single_lt:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size single_lt, .-single_lt
.align 2
.global single_gt
.syntax unified
.arm
.fpu softvfp
.type single_gt, %function
single_gt:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size single_gt, .-single_gt
.align 2
.global single_r
.syntax unified
.arm
.fpu softvfp
.type single_r, %function
single_r:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size single_r, .-single_r
.align 2
.global single_i
.syntax unified
.arm
.fpu softvfp
.type single_i, %function
single_i:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size single_i, .-single_i
.align 2
.global single_n
.syntax unified
.arm
.fpu softvfp
.type single_n, %function
single_n:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size single_n, .-single_n
.align 2
.global single_E
.syntax unified
.arm
.fpu softvfp
.type single_E, %function
single_E:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size single_E, .-single_E
.align 2
.global single_F
.syntax unified
.arm
.fpu softvfp
.type single_F, %function
single_F:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size single_F, .-single_F
.align 2
.global single_s
.syntax unified
.arm
.fpu softvfp
.type single_s, %function
single_s:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size single_s, .-single_s
.align 2
.global single_g
.syntax unified
.arm
.fpu softvfp
.type single_g, %function
single_g:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size single_g, .-single_g
.align 2
.global single_X
.syntax unified
.arm
.fpu softvfp
.type single_X, %function
single_X:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size single_X, .-single_X
.align 2
.global single_p
.syntax unified
.arm
.fpu softvfp
.type single_p, %function
single_p:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size single_p, .-single_p
.align 2
.global multi_m
.syntax unified
.arm
.fpu softvfp
.type multi_m, %function
multi_m:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
ldr r3, .L18
ldr r2, [r3]
ldr r3, .L18+4
.syntax divided
@ 154 "the_stack_data/568422.c" 1
foo r2,r2
@ 0 "" 2
.arm
.syntax unified
str r2, [r3]
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.L19:
.align 2
.L18:
.word min1
.word mout0
.size multi_m, .-multi_m
.align 2
.global multi_o
.syntax unified
.arm
.fpu softvfp
.type multi_o, %function
multi_o:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size multi_o, .-multi_o
.align 2
.global multi_V
.syntax unified
.arm
.fpu softvfp
.type multi_V, %function
multi_V:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size multi_V, .-multi_V
.align 2
.global multi_lt
.syntax unified
.arm
.fpu softvfp
.type multi_lt, %function
multi_lt:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size multi_lt, .-multi_lt
.align 2
.global multi_gt
.syntax unified
.arm
.fpu softvfp
.type multi_gt, %function
multi_gt:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size multi_gt, .-multi_gt
.align 2
.global multi_r
.syntax unified
.arm
.fpu softvfp
.type multi_r, %function
multi_r:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size multi_r, .-multi_r
.align 2
.global multi_i
.syntax unified
.arm
.fpu softvfp
.type multi_i, %function
multi_i:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size multi_i, .-multi_i
.align 2
.global multi_n
.syntax unified
.arm
.fpu softvfp
.type multi_n, %function
multi_n:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size multi_n, .-multi_n
.align 2
.global multi_E
.syntax unified
.arm
.fpu softvfp
.type multi_E, %function
multi_E:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size multi_E, .-multi_E
.align 2
.global multi_F
.syntax unified
.arm
.fpu softvfp
.type multi_F, %function
multi_F:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size multi_F, .-multi_F
.align 2
.global multi_s
.syntax unified
.arm
.fpu softvfp
.type multi_s, %function
multi_s:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size multi_s, .-multi_s
.align 2
.global multi_g
.syntax unified
.arm
.fpu softvfp
.type multi_g, %function
multi_g:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size multi_g, .-multi_g
.align 2
.global multi_X
.syntax unified
.arm
.fpu softvfp
.type multi_X, %function
multi_X:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size multi_X, .-multi_X
.align 2
.global multi_p
.syntax unified
.arm
.fpu softvfp
.type multi_p, %function
multi_p:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size multi_p, .-multi_p
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "527926.c"
.intel_syntax noprefix
.text
.globl printf
.type printf, @function
printf:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
mov DWORD PTR -8[rbp], esi
lea rcx, -8[rbp]
mov eax, DWORD PTR -4[rbp]
mov edx, 0
mov rsi, rcx
mov edi, eax
mov eax, 0
call _doprnt@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size printf, .-printf
.globl _strout
.type _strout, @function
_strout:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r12
push rbx
sub rsp, 16
.cfi_offset 12, -24
.cfi_offset 3, -32
mov rbx, rdi
mov r12d, esi
mov DWORD PTR -20[rbp], edx
mov DWORD PTR -24[rbp], r8d
jmp .L3
.L5:
movzx eax, BYTE PTR [rbx]
cmp al, 45
jne .L4
cmp DWORD PTR -24[rbp], 48
jne .L4
mov rax, rbx
lea rbx, 1[rax]
movzx eax, BYTE PTR [rax]
movsx eax, al
mov edi, eax
call putchar@PLT
sub r12d, 1
.L4:
mov eax, DWORD PTR -24[rbp]
mov edi, eax
call putchar@PLT
add DWORD PTR -20[rbp], 1
.L3:
cmp DWORD PTR -20[rbp], 0
js .L5
jmp .L6
.L7:
mov rax, rbx
lea rbx, 1[rax]
movzx eax, BYTE PTR [rax]
movsx eax, al
mov edi, eax
call putchar@PLT
.L6:
sub r12d, 1
test r12d, r12d
jns .L7
jmp .L8
.L9:
mov eax, DWORD PTR -24[rbp]
mov edi, eax
call putchar@PLT
sub DWORD PTR -20[rbp], 1
.L8:
cmp DWORD PTR -20[rbp], 0
jne .L9
nop
add rsp, 16
pop rbx
pop r12
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size _strout, .-_strout
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "527926.c"
.text
.align 2
.global printf
.syntax unified
.arm
.fpu softvfp
.type printf, %function
printf:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
str r1, [fp, #-12]
sub r3, fp, #12
mov r2, #0
mov r1, r3
ldr r0, [fp, #-8]
bl _doprnt
nop
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size printf, .-printf
.align 2
.global _strout
.syntax unified
.arm
.fpu softvfp
.type _strout, %function
_strout:
@ args = 4, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, fp, lr}
add fp, sp, #12
sub sp, sp, #8
mov r5, r0
mov r4, r1
str r2, [fp, #-16]
b .L3
.L5:
ldrb r3, [r5] @ zero_extendqisi2
cmp r3, #45
bne .L4
ldr r3, [fp, #4]
cmp r3, #48
bne .L4
mov r3, r5
add r5, r3, #1
ldrb r3, [r3] @ zero_extendqisi2
mov r0, r3
bl putchar
sub r4, r4, #1
.L4:
ldr r0, [fp, #4]
bl putchar
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L3:
ldr r3, [fp, #-16]
cmp r3, #0
blt .L5
b .L6
.L7:
mov r3, r5
add r5, r3, #1
ldrb r3, [r3] @ zero_extendqisi2
mov r0, r3
bl putchar
.L6:
sub r4, r4, #1
cmp r4, #0
bge .L7
b .L8
.L9:
ldr r0, [fp, #4]
bl putchar
ldr r3, [fp, #-16]
sub r3, r3, #1
str r3, [fp, #-16]
.L8:
ldr r3, [fp, #-16]
cmp r3, #0
bne .L9
nop
mov r0, r3
sub sp, fp, #12
@ sp needed
pop {r4, r5, fp, pc}
.size _strout, .-_strout
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "27258.c"
.intel_syntax noprefix
.text
.globl swap
.type swap, @function
swap:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov rax, QWORD PTR -24[rbp]
mov eax, DWORD PTR [rax]
mov DWORD PTR -4[rbp], eax
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
mov DWORD PTR [rax], edx
mov rax, QWORD PTR -32[rbp]
mov edx, DWORD PTR -4[rbp]
mov DWORD PTR [rax], edx
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size swap, .-swap
.globl Partition
.type Partition, @function
Partition:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -32[rbp], edx
mov eax, DWORD PTR -32[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -28[rbp]
sub eax, 1
mov DWORD PTR -12[rbp], eax
mov eax, DWORD PTR -28[rbp]
mov DWORD PTR -8[rbp], eax
jmp .L3
.L5:
mov eax, DWORD PTR -8[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
cmp DWORD PTR -4[rbp], eax
jl .L4
add DWORD PTR -12[rbp], 1
mov eax, DWORD PTR -8[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rax, rcx
mov rsi, rdx
mov rdi, rax
call swap
.L4:
add DWORD PTR -8[rbp], 1
.L3:
mov eax, DWORD PTR -8[rbp]
cmp eax, DWORD PTR -32[rbp]
jl .L5
mov eax, DWORD PTR -8[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
cdqe
add rax, 1
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -24[rbp]
add rax, rcx
mov rsi, rdx
mov rdi, rax
call swap
mov eax, DWORD PTR -12[rbp]
add eax, 1
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size Partition, .-Partition
.globl quickSort
.type quickSort, @function
quickSort:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -32[rbp], edx
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -32[rbp]
jge .L9
mov edx, DWORD PTR -32[rbp]
mov ecx, DWORD PTR -28[rbp]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call Partition
mov DWORD PTR -4[rbp], eax
mov eax, DWORD PTR -4[rbp]
lea edx, -1[rax]
mov ecx, DWORD PTR -28[rbp]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call quickSort
mov eax, DWORD PTR -4[rbp]
lea ecx, 1[rax]
mov edx, DWORD PTR -32[rbp]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
call quickSort
.L9:
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size quickSort, .-quickSort
.section .rodata
.LC0:
.string "ARRAY SIZE: %d\n"
.LC1:
.string "%d"
.LC2:
.string "OLD ARRAY: "
.LC3:
.string "%d "
.LC4:
.string "NEW ARRAY: "
.text
.globl main
.type main, @function
main:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov DWORD PTR -20[rbp], edi
mov QWORD PTR -32[rbp], rsi
mov eax, DWORD PTR -20[rbp]
sub eax, 1
mov DWORD PTR -12[rbp], eax
mov eax, DWORD PTR -12[rbp]
mov esi, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -12[rbp]
cdqe
sal rax, 2
mov rdi, rax
call malloc@PLT
mov QWORD PTR -8[rbp], rax
mov DWORD PTR -16[rbp], 1
jmp .L11
.L12:
mov eax, DWORD PTR -16[rbp]
cdqe
sal rax, 2
lea rdx, -4[rax]
mov rax, QWORD PTR -8[rbp]
add rdx, rax
mov eax, DWORD PTR -16[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
lea rsi, .LC1[rip]
mov rdi, rax
mov eax, 0
call __isoc99_sscanf@PLT
add DWORD PTR -16[rbp], 1
.L11:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -12[rbp]
jle .L12
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
mov DWORD PTR -16[rbp], 0
jmp .L13
.L14:
mov eax, DWORD PTR -16[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -8[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
mov esi, eax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -16[rbp], 1
.L13:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -12[rbp]
jl .L14
mov edi, 10
call putchar@PLT
mov eax, DWORD PTR -12[rbp]
lea edx, -1[rax]
mov rax, QWORD PTR -8[rbp]
mov esi, 0
mov rdi, rax
call quickSort
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
mov DWORD PTR -16[rbp], 0
jmp .L15
.L16:
mov eax, DWORD PTR -16[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -8[rbp]
add rax, rdx
mov eax, DWORD PTR [rax]
mov esi, eax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -16[rbp], 1
.L15:
mov eax, DWORD PTR -16[rbp]
cmp eax, DWORD PTR -12[rbp]
jl .L16
mov edi, 10
call putchar@PLT
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "27258.c"
.text
.align 2
.global swap
.syntax unified
.arm
.fpu softvfp
.type swap, %function
swap:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-16]
ldr r3, [r3]
str r3, [fp, #-8]
ldr r3, [fp, #-20]
ldr r2, [r3]
ldr r3, [fp, #-16]
str r2, [r3]
ldr r3, [fp, #-20]
ldr r2, [fp, #-8]
str r2, [r3]
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size swap, .-swap
.align 2
.global Partition
.syntax unified
.arm
.fpu softvfp
.type Partition, %function
Partition:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #32
str r0, [fp, #-24]
str r1, [fp, #-28]
str r2, [fp, #-32]
ldr r3, [fp, #-32]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-8]
ldr r3, [fp, #-28]
sub r3, r3, #1
str r3, [fp, #-16]
ldr r3, [fp, #-28]
str r3, [fp, #-12]
b .L3
.L5:
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r3, [r3]
ldr r2, [fp, #-8]
cmp r2, r3
blt .L4
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r0, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
mov r1, r3
bl swap
.L4:
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L3:
ldr r2, [fp, #-12]
ldr r3, [fp, #-32]
cmp r2, r3
blt .L5
ldr r3, [fp, #-16]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r0, r2, r3
ldr r3, [fp, #-12]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
mov r1, r3
bl swap
ldr r3, [fp, #-16]
add r3, r3, #1
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size Partition, .-Partition
.align 2
.global quickSort
.syntax unified
.arm
.fpu softvfp
.type quickSort, %function
quickSort:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r2, [fp, #-20]
ldr r3, [fp, #-24]
cmp r2, r3
bge .L9
ldr r2, [fp, #-24]
ldr r1, [fp, #-20]
ldr r0, [fp, #-16]
bl Partition
str r0, [fp, #-8]
ldr r3, [fp, #-8]
sub r3, r3, #1
mov r2, r3
ldr r1, [fp, #-20]
ldr r0, [fp, #-16]
bl quickSort
ldr r3, [fp, #-8]
add r3, r3, #1
ldr r2, [fp, #-24]
mov r1, r3
ldr r0, [fp, #-16]
bl quickSort
.L9:
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size quickSort, .-quickSort
.section .rodata
.align 2
.LC0:
.ascii "ARRAY SIZE: %d\012\000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "OLD ARRAY: \000"
.align 2
.LC3:
.ascii "%d \000"
.align 2
.LC4:
.ascii "NEW ARRAY: \000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
str r1, [fp, #-28]
ldr r3, [fp, #-24]
sub r3, r3, #1
str r3, [fp, #-12]
ldr r1, [fp, #-12]
ldr r0, .L18
bl printf
ldr r3, [fp, #-12]
lsl r3, r3, #2
mov r0, r3
bl malloc
mov r3, r0
str r3, [fp, #-8]
mov r3, #1
str r3, [fp, #-16]
b .L11
.L12:
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
ldr r0, [r3]
ldr r3, [fp, #-16]
sub r3, r3, #-1073741823
lsl r3, r3, #2
ldr r2, [fp, #-8]
add r3, r2, r3
mov r2, r3
ldr r1, .L18+4
bl __isoc99_sscanf
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L11:
ldr r2, [fp, #-16]
ldr r3, [fp, #-12]
cmp r2, r3
ble .L12
ldr r0, .L18+8
bl printf
mov r3, #0
str r3, [fp, #-16]
b .L13
.L14:
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-8]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
ldr r0, .L18+12
bl printf
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L13:
ldr r2, [fp, #-16]
ldr r3, [fp, #-12]
cmp r2, r3
blt .L14
mov r0, #10
bl putchar
ldr r3, [fp, #-12]
sub r3, r3, #1
mov r2, r3
mov r1, #0
ldr r0, [fp, #-8]
bl quickSort
ldr r0, .L18+16
bl printf
mov r3, #0
str r3, [fp, #-16]
b .L15
.L16:
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-8]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
ldr r0, .L18+12
bl printf
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L15:
ldr r2, [fp, #-16]
ldr r3, [fp, #-12]
cmp r2, r3
blt .L16
mov r0, #10
bl putchar
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L19:
.align 2
.L18:
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "319852.c"
.intel_syntax noprefix
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "319852.c"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "825316.c"
.intel_syntax noprefix
.text
.globl gccgoRealSyscall
.type gccgoRealSyscall, @function
gccgoRealSyscall:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov QWORD PTR -40[rbp], rdx
mov QWORD PTR -48[rbp], rcx
mov QWORD PTR -56[rbp], r8
mov QWORD PTR -64[rbp], r9
call __errno_location@PLT
mov DWORD PTR [rax], 0
mov rax, QWORD PTR -24[rbp]
mov r8, QWORD PTR -64[rbp]
mov rdi, QWORD PTR -56[rbp]
mov rcx, QWORD PTR -48[rbp]
mov rdx, QWORD PTR -40[rbp]
mov rsi, QWORD PTR -32[rbp]
push QWORD PTR 40[rbp]
push QWORD PTR 32[rbp]
push QWORD PTR 24[rbp]
push QWORD PTR 16[rbp]
mov r9, r8
mov r8, rdi
mov rdi, rax
mov eax, 0
call syscall@PLT
add rsp, 32
mov QWORD PTR -16[rbp], rax
call __errno_location@PLT
mov eax, DWORD PTR [rax]
cdqe
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -16[rbp]
mov rdx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size gccgoRealSyscall, .-gccgoRealSyscall
.globl gccgoRealSyscallNoError
.type gccgoRealSyscallNoError, @function
gccgoRealSyscallNoError:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -8[rbp], rdi
mov QWORD PTR -16[rbp], rsi
mov QWORD PTR -24[rbp], rdx
mov QWORD PTR -32[rbp], rcx
mov QWORD PTR -40[rbp], r8
mov QWORD PTR -48[rbp], r9
mov rax, QWORD PTR -8[rbp]
mov r8, QWORD PTR -48[rbp]
mov rdi, QWORD PTR -40[rbp]
mov rcx, QWORD PTR -32[rbp]
mov rdx, QWORD PTR -24[rbp]
mov rsi, QWORD PTR -16[rbp]
push QWORD PTR 40[rbp]
push QWORD PTR 32[rbp]
push QWORD PTR 24[rbp]
push QWORD PTR 16[rbp]
mov r9, r8
mov r8, rdi
mov rdi, rax
mov eax, 0
call syscall@PLT
add rsp, 32
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size gccgoRealSyscallNoError, .-gccgoRealSyscallNoError
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "825316.c"
.text
.align 2
.global gccgoRealSyscall
.syntax unified
.arm
.fpu softvfp
.type gccgoRealSyscall, %function
gccgoRealSyscall:
@ args = 28, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #48
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
str r3, [fp, #-28]
bl __errno_location
mov r3, r0
mov r2, #0
str r2, [r3]
ldr r0, [fp, #-20]
ldr r3, [fp, #28]
str r3, [sp, #20]
ldr r3, [fp, #24]
str r3, [sp, #16]
ldr r3, [fp, #20]
str r3, [sp, #12]
ldr r3, [fp, #16]
str r3, [sp, #8]
ldr r3, [fp, #12]
str r3, [sp, #4]
ldr r3, [fp, #8]
str r3, [sp]
ldr r3, [fp, #4]
ldr r2, [fp, #-28]
ldr r1, [fp, #-24]
bl syscall
mov r3, r0
str r3, [fp, #-12]
bl __errno_location
mov r3, r0
ldr r3, [r3]
str r3, [fp, #-8]
ldr r3, [fp, #-16]
mov r2, r3
sub r3, fp, #12
ldm r3, {r0, r1}
stm r2, {r0, r1}
ldr r0, [fp, #-16]
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size gccgoRealSyscall, .-gccgoRealSyscall
.align 2
.global gccgoRealSyscallNoError
.syntax unified
.arm
.fpu softvfp
.type gccgoRealSyscallNoError, %function
gccgoRealSyscallNoError:
@ args = 24, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #40
str r0, [fp, #-8]
str r1, [fp, #-12]
str r2, [fp, #-16]
str r3, [fp, #-20]
ldr r0, [fp, #-8]
ldr r3, [fp, #24]
str r3, [sp, #20]
ldr r3, [fp, #20]
str r3, [sp, #16]
ldr r3, [fp, #16]
str r3, [sp, #12]
ldr r3, [fp, #12]
str r3, [sp, #8]
ldr r3, [fp, #8]
str r3, [sp, #4]
ldr r3, [fp, #4]
str r3, [sp]
ldr r3, [fp, #-20]
ldr r2, [fp, #-16]
ldr r1, [fp, #-12]
bl syscall
mov r3, r0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size gccgoRealSyscallNoError, .-gccgoRealSyscallNoError
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "354805.c"
.intel_syntax noprefix
.text
.globl Pods_WYJPush_TestsVersionString
.section .rodata
.align 32
.type Pods_WYJPush_TestsVersionString, @object
.size Pods_WYJPush_TestsVersionString, 48
Pods_WYJPush_TestsVersionString:
.string "@(#)PROGRAM:Pods_WYJPush_Tests PROJECT:Pods-1\n"
.globl Pods_WYJPush_TestsVersionNumber
.align 8
.type Pods_WYJPush_TestsVersionNumber, @object
.size Pods_WYJPush_TestsVersionNumber, 8
Pods_WYJPush_TestsVersionNumber:
.long 0
.long 1072693248
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "354805.c"
.text
.global Pods_WYJPush_TestsVersionString
.section .rodata
.align 2
.type Pods_WYJPush_TestsVersionString, %object
.size Pods_WYJPush_TestsVersionString, 48
Pods_WYJPush_TestsVersionString:
.ascii "@(#)PROGRAM:Pods_WYJPush_Tests PROJECT:Pods-1\012\000"
.global Pods_WYJPush_TestsVersionNumber
.align 3
.type Pods_WYJPush_TestsVersionNumber, %object
.size Pods_WYJPush_TestsVersionNumber, 8
Pods_WYJPush_TestsVersionNumber:
.word 0
.word 1072693248
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "322083.c"
.intel_syntax noprefix
.text
.globl warning_emoji
.section .rodata
.align 4
.type warning_emoji, @object
.size warning_emoji, 4
warning_emoji:
.long 128558
.globl thinking_emoji
.align 4
.type thinking_emoji, @object
.size thinking_emoji, 4
thinking_emoji:
.long 129300
.globl thumbsup_emoji
.align 4
.type thumbsup_emoji, @object
.size thumbsup_emoji, 4
thumbsup_emoji:
.long 128077
.globl hand_right_emoji
.align 4
.type hand_right_emoji, @object
.size hand_right_emoji, 4
hand_right_emoji:
.long 128073
.LC0:
.string "en_US.UTF-8"
.align 8
.LC1:
.string "%lc \033[0;31mDANGER\033[0m. You are about to execute: \n\n%lc \033[0;33m"
.LC2:
.string "\033[0m\n"
.LC3:
.string "%lc Are you sure? [Yy] "
.LC4:
.string "%lc Stopping\n"
.LC5:
.string ": %s\n"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov DWORD PTR -20[rbp], edi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -12[rbp], 1
cmp DWORD PTR -20[rbp], 1
jg .L2
mov eax, 0
call print_usage
mov eax, 1
jmp .L3
.L2:
lea rsi, .LC0[rip]
mov edi, 0
call setlocale@PLT
mov edx, 128073
mov eax, 128558
mov esi, eax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
mov rdx, QWORD PTR -32[rbp]
mov ecx, DWORD PTR -20[rbp]
mov eax, DWORD PTR -12[rbp]
mov esi, ecx
mov edi, eax
call print_argv
lea rdi, .LC2[rip]
call puts@PLT
mov eax, 129300
mov esi, eax
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
call getchar@PLT
mov DWORD PTR -8[rbp], eax
cmp DWORD PTR -8[rbp], 89
je .L4
cmp DWORD PTR -8[rbp], 121
je .L4
mov eax, 128077
mov esi, eax
lea rdi, .LC4[rip]
mov eax, 0
call printf@PLT
mov eax, 1
jmp .L3
.L4:
mov eax, DWORD PTR -12[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
cdqe
lea rcx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
mov rax, QWORD PTR [rax]
mov rsi, rdx
mov rdi, rax
call execvp@PLT
mov DWORD PTR -4[rbp], eax
mov rdx, QWORD PTR -32[rbp]
mov ecx, DWORD PTR -20[rbp]
mov eax, DWORD PTR -12[rbp]
mov esi, ecx
mov edi, eax
call print_argv
call __errno_location@PLT
mov eax, DWORD PTR [rax]
mov edi, eax
call strerror@PLT
mov rsi, rax
lea rdi, .LC5[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -4[rbp]
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 8
.LC6:
.string "Usage: areyousure [OPTION] command ...\n"
.align 8
.LC7:
.string "Prompt the user whether they really want to run the given command.\n"
.text
.globl print_usage
.type print_usage, @function
print_usage:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
lea rdi, .LC6[rip]
call puts@PLT
lea rdi, .LC7[rip]
call puts@PLT
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size print_usage, .-print_usage
.section .rodata
.LC8:
.string "%s"
.LC9:
.string " %s"
.text
.globl print_argv
.type print_argv, @function
print_argv:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov DWORD PTR -20[rbp], edi
mov DWORD PTR -24[rbp], esi
mov QWORD PTR -32[rbp], rdx
mov eax, DWORD PTR -20[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov rsi, rax
lea rdi, .LC8[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -20[rbp]
add eax, 1
mov DWORD PTR -4[rbp], eax
jmp .L7
.L8:
mov eax, DWORD PTR -4[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov rsi, rax
lea rdi, .LC9[rip]
mov eax, 0
call printf@PLT
add DWORD PTR -4[rbp], 1
.L7:
mov eax, DWORD PTR -4[rbp]
cmp eax, DWORD PTR -24[rbp]
jl .L8
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size print_argv, .-print_argv
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "322083.c"
.text
.global warning_emoji
.section .rodata
.align 2
.type warning_emoji, %object
.size warning_emoji, 4
warning_emoji:
.word 128558
.global thinking_emoji
.align 2
.type thinking_emoji, %object
.size thinking_emoji, 4
thinking_emoji:
.word 129300
.global thumbsup_emoji
.align 2
.type thumbsup_emoji, %object
.size thumbsup_emoji, 4
thumbsup_emoji:
.word 128077
.global hand_right_emoji
.align 2
.type hand_right_emoji, %object
.size hand_right_emoji, 4
hand_right_emoji:
.word 128073
.align 2
.LC0:
.ascii "en_US.UTF-8\000"
.align 2
.LC1:
.ascii "%lc \033[0;31mDANGER\033[0m. You are about to execu"
.ascii "te: \012\012%lc \033[0;33m\000"
.align 2
.LC2:
.ascii "\033[0m\012\000"
.align 2
.LC3:
.ascii "%lc Are you sure? [Yy] \000"
.align 2
.LC4:
.ascii "%lc Stopping\012\000"
.align 2
.LC5:
.ascii ": %s\012\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
str r1, [fp, #-28]
mov r3, #1
str r3, [fp, #-16]
ldr r3, [fp, #-24]
cmp r3, #1
bgt .L2
bl print_usage
mov r3, #1
b .L3
.L2:
ldr r1, .L5
mov r0, #0
bl setlocale
ldr r3, .L5+4
ldr r2, .L5+8
mov r1, r3
ldr r0, .L5+12
bl printf
ldr r2, [fp, #-28]
ldr r1, [fp, #-24]
ldr r0, [fp, #-16]
bl print_argv
ldr r0, .L5+16
bl puts
ldr r3, .L5+20
mov r1, r3
ldr r0, .L5+24
bl printf
bl getchar
str r0, [fp, #-12]
ldr r3, [fp, #-12]
cmp r3, #89
beq .L4
ldr r3, [fp, #-12]
cmp r3, #121
beq .L4
ldr r3, .L5+28
mov r1, r3
ldr r0, .L5+32
bl printf
mov r3, #1
b .L3
.L4:
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
ldr r0, [r3]
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
mov r1, r3
bl execvp
mov r3, r0
str r3, [fp, #-8]
ldr r2, [fp, #-28]
ldr r1, [fp, #-24]
ldr r0, [fp, #-16]
bl print_argv
bl __errno_location
mov r3, r0
ldr r3, [r3]
mov r0, r3
bl strerror
mov r3, r0
mov r1, r3
ldr r0, .L5+36
bl printf
ldr r3, [fp, #-8]
.L3:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L6:
.align 2
.L5:
.word .LC0
.word 128558
.word 128073
.word .LC1
.word .LC2
.word 129300
.word .LC3
.word 128077
.word .LC4
.word .LC5
.size main, .-main
.section .rodata
.align 2
.LC6:
.ascii "Usage: areyousure [OPTION] command ...\012\000"
.align 2
.LC7:
.ascii "Prompt the user whether they really want to run the"
.ascii " given command.\012\000"
.text
.align 2
.global print_usage
.syntax unified
.arm
.fpu softvfp
.type print_usage, %function
print_usage:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
ldr r0, .L8
bl puts
ldr r0, .L8+4
bl puts
nop
pop {fp, pc}
.L9:
.align 2
.L8:
.word .LC6
.word .LC7
.size print_usage, .-print_usage
.section .rodata
.align 2
.LC8:
.ascii "%s\000"
.align 2
.LC9:
.ascii " %s\000"
.text
.align 2
.global print_argv
.syntax unified
.arm
.fpu softvfp
.type print_argv, %function
print_argv:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
ldr r0, .L13
bl printf
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-8]
b .L11
.L12:
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r3, [r3]
mov r1, r3
ldr r0, .L13+4
bl printf
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L11:
ldr r2, [fp, #-8]
ldr r3, [fp, #-20]
cmp r2, r3
blt .L12
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L14:
.align 2
.L13:
.word .LC8
.word .LC9
.size print_argv, .-print_argv
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "463904.c"
.intel_syntax noprefix
.text
.globl ft_strdup_range
.type ft_strdup_range, @function
ft_strdup_range:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -32[rbp], edx
cmp QWORD PTR -24[rbp], 0
jne .L2
mov eax, 0
jmp .L3
.L2:
mov eax, DWORD PTR -32[rbp]
sub eax, DWORD PTR -28[rbp]
add eax, 1
cdqe
mov rdi, rax
call malloc@PLT
mov QWORD PTR -8[rbp], rax
cmp QWORD PTR -8[rbp], 0
jne .L4
mov eax, 0
jmp .L3
.L4:
mov DWORD PTR -12[rbp], 0
jmp .L5
.L6:
mov eax, DWORD PTR -28[rbp]
lea edx, 1[rax]
mov DWORD PTR -28[rbp], edx
movsx rdx, eax
mov rax, QWORD PTR -24[rbp]
lea rcx, [rdx+rax]
mov eax, DWORD PTR -12[rbp]
lea edx, 1[rax]
mov DWORD PTR -12[rbp], edx
movsx rdx, eax
mov rax, QWORD PTR -8[rbp]
add rdx, rax
movzx eax, BYTE PTR [rcx]
mov BYTE PTR [rdx], al
.L5:
mov eax, DWORD PTR -28[rbp]
cmp eax, DWORD PTR -32[rbp]
jl .L6
mov eax, DWORD PTR -12[rbp]
movsx rdx, eax
mov rax, QWORD PTR -8[rbp]
add rax, rdx
mov BYTE PTR [rax], 0
mov rax, QWORD PTR -8[rbp]
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size ft_strdup_range, .-ft_strdup_range
.globl ft_ischarset
.type ft_ischarset, @function
ft_ischarset:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, edi
mov QWORD PTR -16[rbp], rsi
mov BYTE PTR -4[rbp], al
jmp .L8
.L10:
mov rax, QWORD PTR -16[rbp]
lea rdx, 1[rax]
mov QWORD PTR -16[rbp], rdx
movzx eax, BYTE PTR [rax]
cmp BYTE PTR -4[rbp], al
jne .L8
mov eax, 1
jmp .L9
.L8:
mov rax, QWORD PTR -16[rbp]
movzx eax, BYTE PTR [rax]
test al, al
jne .L10
mov eax, 0
.L9:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size ft_ischarset, .-ft_ischarset
.globl ft_word_count
.type ft_word_count, @function
ft_word_count:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -4[rbp], 0
jmp .L12
.L15:
add QWORD PTR -24[rbp], 1
.L13:
mov rax, QWORD PTR -24[rbp]
movzx eax, BYTE PTR [rax]
test al, al
je .L14
mov rax, QWORD PTR -24[rbp]
movzx eax, BYTE PTR [rax]
movsx eax, al
mov rdx, QWORD PTR -32[rbp]
mov rsi, rdx
mov edi, eax
call ft_ischarset
test eax, eax
jne .L15
.L14:
mov rax, QWORD PTR -24[rbp]
movzx eax, BYTE PTR [rax]
test al, al
je .L12
mov rax, QWORD PTR -24[rbp]
movzx eax, BYTE PTR [rax]
movsx eax, al
mov rdx, QWORD PTR -32[rbp]
mov rsi, rdx
mov edi, eax
call ft_ischarset
test eax, eax
jne .L12
add DWORD PTR -4[rbp], 1
jmp .L16
.L17:
add QWORD PTR -24[rbp], 1
.L16:
mov rax, QWORD PTR -24[rbp]
movzx eax, BYTE PTR [rax]
test al, al
je .L12
mov rax, QWORD PTR -24[rbp]
movzx eax, BYTE PTR [rax]
movsx eax, al
mov rdx, QWORD PTR -32[rbp]
mov rsi, rdx
mov edi, eax
call ft_ischarset
test eax, eax
je .L17
.L12:
mov rax, QWORD PTR -24[rbp]
movzx eax, BYTE PTR [rax]
test al, al
jne .L13
mov eax, DWORD PTR -4[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size ft_word_count, .-ft_word_count
.globl ft_split
.type ft_split, @function
ft_split:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push rbx
sub rsp, 56
.cfi_offset 3, -24
mov QWORD PTR -56[rbp], rdi
mov QWORD PTR -64[rbp], rsi
mov rdx, QWORD PTR -64[rbp]
mov rax, QWORD PTR -56[rbp]
mov rsi, rdx
mov rdi, rax
call ft_word_count
add eax, 1
mov DWORD PTR -32[rbp], eax
mov eax, DWORD PTR -32[rbp]
cdqe
sal rax, 3
mov rdi, rax
call malloc@PLT
mov QWORD PTR -24[rbp], rax
cmp QWORD PTR -24[rbp], 0
jne .L21
mov QWORD PTR -24[rbp], 0
mov rax, QWORD PTR -24[rbp]
jmp .L22
.L21:
mov DWORD PTR -40[rbp], 0
mov DWORD PTR -36[rbp], 0
jmp .L23
.L26:
add DWORD PTR -40[rbp], 1
.L24:
mov eax, DWORD PTR -40[rbp]
movsx rdx, eax
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
test al, al
je .L25
mov eax, DWORD PTR -40[rbp]
movsx rdx, eax
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
movsx eax, al
mov rdx, QWORD PTR -64[rbp]
mov rsi, rdx
mov edi, eax
call ft_ischarset
test eax, eax
jne .L26
.L25:
mov eax, DWORD PTR -40[rbp]
mov DWORD PTR -28[rbp], eax
jmp .L27
.L29:
add DWORD PTR -40[rbp], 1
.L27:
mov eax, DWORD PTR -40[rbp]
movsx rdx, eax
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
test al, al
je .L28
mov eax, DWORD PTR -40[rbp]
movsx rdx, eax
mov rax, QWORD PTR -56[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
movsx eax, al
mov rdx, QWORD PTR -64[rbp]
mov rsi, rdx
mov edi, eax
call ft_ischarset
test eax, eax
je .L29
.L28:
mov eax, DWORD PTR -36[rbp]
lea edx, 1[rax]
mov DWORD PTR -36[rbp], edx
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -24[rbp]
lea rbx, [rdx+rax]
mov edx, DWORD PTR -40[rbp]
mov ecx, DWORD PTR -28[rbp]
mov rax, QWORD PTR -56[rbp]
mov esi, ecx
mov rdi, rax
call ft_strdup_range
mov QWORD PTR [rbx], rax
mov rax, QWORD PTR [rbx]
test rax, rax
jne .L23
mov QWORD PTR -24[rbp], 0
mov rax, QWORD PTR -24[rbp]
jmp .L22
.L23:
mov eax, DWORD PTR -32[rbp]
sub eax, 1
cmp DWORD PTR -36[rbp], eax
jl .L24
mov eax, DWORD PTR -36[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov QWORD PTR [rax], 0
mov rax, QWORD PTR -24[rbp]
.L22:
mov rbx, QWORD PTR -8[rbp]
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size ft_split, .-ft_split
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "463904.c"
.text
.align 2
.global ft_strdup_range
.syntax unified
.arm
.fpu softvfp
.type ft_strdup_range, %function
ft_strdup_range:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-16]
cmp r3, #0
bne .L2
mov r3, #0
b .L3
.L2:
ldr r2, [fp, #-24]
ldr r3, [fp, #-20]
sub r3, r2, r3
add r3, r3, #1
mov r0, r3
bl malloc
mov r3, r0
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
bne .L4
mov r3, #0
b .L3
.L4:
mov r3, #0
str r3, [fp, #-12]
b .L5
.L6:
ldr r3, [fp, #-20]
add r2, r3, #1
str r2, [fp, #-20]
mov r2, r3
ldr r3, [fp, #-16]
add r2, r3, r2
ldr r3, [fp, #-12]
add r1, r3, #1
str r1, [fp, #-12]
mov r1, r3
ldr r3, [fp, #-8]
add r3, r3, r1
ldrb r2, [r2] @ zero_extendqisi2
strb r2, [r3]
.L5:
ldr r2, [fp, #-20]
ldr r3, [fp, #-24]
cmp r2, r3
blt .L6
ldr r3, [fp, #-12]
ldr r2, [fp, #-8]
add r3, r2, r3
mov r2, #0
strb r2, [r3]
ldr r3, [fp, #-8]
.L3:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size ft_strdup_range, .-ft_strdup_range
.align 2
.global ft_ischarset
.syntax unified
.arm
.fpu softvfp
.type ft_ischarset, %function
ft_ischarset:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
mov r3, r0
str r1, [fp, #-12]
strb r3, [fp, #-5]
b .L8
.L10:
ldr r3, [fp, #-12]
add r2, r3, #1
str r2, [fp, #-12]
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [fp, #-5] @ zero_extendqisi2
cmp r2, r3
bne .L8
mov r3, #1
b .L9
.L8:
ldr r3, [fp, #-12]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L10
mov r3, #0
.L9:
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size ft_ischarset, .-ft_ischarset
.align 2
.global ft_word_count
.syntax unified
.arm
.fpu softvfp
.type ft_word_count, %function
ft_word_count:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r3, #0
str r3, [fp, #-8]
b .L12
.L15:
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L13:
ldr r3, [fp, #-16]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L14
ldr r3, [fp, #-16]
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, [fp, #-20]
mov r0, r3
bl ft_ischarset
mov r3, r0
cmp r3, #0
bne .L15
.L14:
ldr r3, [fp, #-16]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L12
ldr r3, [fp, #-16]
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, [fp, #-20]
mov r0, r3
bl ft_ischarset
mov r3, r0
cmp r3, #0
bne .L12
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
b .L16
.L17:
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L16:
ldr r3, [fp, #-16]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L12
ldr r3, [fp, #-16]
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, [fp, #-20]
mov r0, r3
bl ft_ischarset
mov r3, r0
cmp r3, #0
beq .L17
.L12:
ldr r3, [fp, #-16]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L13
ldr r3, [fp, #-8]
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size ft_word_count, .-ft_word_count
.align 2
.global ft_split
.syntax unified
.arm
.fpu softvfp
.type ft_split, %function
ft_split:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, fp, lr}
add fp, sp, #8
sub sp, sp, #36
str r0, [fp, #-40]
str r1, [fp, #-44]
ldr r1, [fp, #-44]
ldr r0, [fp, #-40]
bl ft_word_count
mov r3, r0
add r3, r3, #1
str r3, [fp, #-24]
ldr r3, [fp, #-24]
lsl r3, r3, #2
mov r0, r3
bl malloc
mov r3, r0
str r3, [fp, #-20]
ldr r3, [fp, #-20]
cmp r3, #0
bne .L21
mov r3, #0
str r3, [fp, #-20]
ldr r3, [fp, #-20]
b .L22
.L21:
mov r3, #0
str r3, [fp, #-32]
mov r3, #0
str r3, [fp, #-28]
b .L23
.L26:
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L24:
ldr r3, [fp, #-32]
ldr r2, [fp, #-40]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L25
ldr r3, [fp, #-32]
ldr r2, [fp, #-40]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, [fp, #-44]
mov r0, r3
bl ft_ischarset
mov r3, r0
cmp r3, #0
bne .L26
.L25:
ldr r3, [fp, #-32]
str r3, [fp, #-16]
b .L27
.L29:
ldr r3, [fp, #-32]
add r3, r3, #1
str r3, [fp, #-32]
.L27:
ldr r3, [fp, #-32]
ldr r2, [fp, #-40]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L28
ldr r3, [fp, #-32]
ldr r2, [fp, #-40]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, [fp, #-44]
mov r0, r3
bl ft_ischarset
mov r3, r0
cmp r3, #0
beq .L29
.L28:
ldr r3, [fp, #-28]
add r2, r3, #1
str r2, [fp, #-28]
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r4, r2, r3
ldr r2, [fp, #-32]
ldr r1, [fp, #-16]
ldr r0, [fp, #-40]
bl ft_strdup_range
mov r3, r0
str r3, [r4]
ldr r3, [r4]
cmp r3, #0
bne .L23
mov r3, #0
str r3, [fp, #-20]
ldr r3, [fp, #-20]
b .L22
.L23:
ldr r3, [fp, #-24]
sub r3, r3, #1
ldr r2, [fp, #-28]
cmp r2, r3
blt .L24
ldr r3, [fp, #-28]
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
mov r2, #0
str r2, [r3]
ldr r3, [fp, #-20]
.L22:
mov r0, r3
sub sp, fp, #8
@ sp needed
pop {r4, fp, pc}
.size ft_split, .-ft_split
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "96995.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "96995.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "914422.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "Hola Mundo..."
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
lea rdi, .LC0[rip]
call puts@PLT
mov edi, 0
call exit@PLT
.cfi_endproc
.LFE6:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "914422.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Hola Mundo...\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
ldr r0, .L2
bl puts
mov r0, #0
bl exit
.L3:
.align 2
.L2:
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "606008.c"
.intel_syntax noprefix
.text
.globl inf_loop
.type inf_loop, @function
inf_loop:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -24[rbp], 0
.L3:
cmp DWORD PTR -24[rbp], 9
jle .L2
mov DWORD PTR -24[rbp], 0
.L2:
mov eax, DWORD PTR -24[rbp]
cdqe
mov BYTE PTR -18[rbp+rax], 97
add DWORD PTR -24[rbp], 1
jmp .L3
.cfi_endproc
.LFE0:
.size inf_loop, .-inf_loop
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "606008.c"
.text
.section .rodata
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global inf_loop
.syntax unified
.arm
.fpu softvfp
.type inf_loop, %function
inf_loop:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
ldr r3, .L5
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-24]
.L3:
ldr r3, [fp, #-24]
cmp r3, #9
ble .L2
mov r3, #0
str r3, [fp, #-24]
.L2:
sub r2, fp, #20
ldr r3, [fp, #-24]
add r3, r2, r3
mov r2, #97
strb r2, [r3]
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
b .L3
.L6:
.align 2
.L5:
.word .LC0
.size inf_loop, .-inf_loop
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "538921.c"
.intel_syntax noprefix
.text
.globl insert_at_front
.type insert_at_front, @function
insert_at_front:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov edi, 24
call malloc@PLT
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov edx, DWORD PTR -28[rbp]
mov DWORD PTR [rax], edx
mov rax, QWORD PTR -24[rbp]
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR 8[rax], rdx
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR 16[rax], 0
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR [rax]
test rax, rax
je .L2
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR [rax]
mov rdx, QWORD PTR -8[rbp]
mov QWORD PTR 16[rax], rdx
.L2:
mov rax, QWORD PTR -24[rbp]
mov rdx, QWORD PTR -8[rbp]
mov QWORD PTR [rax], rdx
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size insert_at_front, .-insert_at_front
.section .rodata
.LC0:
.string " %d <->"
.LC1:
.string " NULL"
.text
.globl display
.type display, @function
display:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
jmp .L4
.L5:
mov rax, QWORD PTR -24[rbp]
mov eax, DWORD PTR [rax]
mov esi, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -24[rbp]
mov rax, QWORD PTR 8[rax]
mov QWORD PTR -24[rbp], rax
.L4:
cmp QWORD PTR -24[rbp], 0
jne .L5
lea rdi, .LC1[rip]
call puts@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size display, .-display
.globl countNodes
.type countNodes, @function
countNodes:
.LFB8:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -12[rbp], 0
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -8[rbp], rax
jmp .L7
.L8:
add DWORD PTR -12[rbp], 1
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 8[rax]
mov QWORD PTR -8[rbp], rax
.L7:
cmp QWORD PTR -8[rbp], 0
jne .L8
mov eax, DWORD PTR -12[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE8:
.size countNodes, .-countNodes
.section .rodata
.LC2:
.string "\nThe middle element = %d\n"
.text
.globl printMiddle
.type printMiddle, @function
printMiddle:
.LFB9:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov rax, QWORD PTR -24[rbp]
mov rdi, rax
call countNodes
mov DWORD PTR -12[rbp], eax
mov rax, QWORD PTR -24[rbp]
mov QWORD PTR -8[rbp], rax
mov eax, DWORD PTR -12[rbp]
mov edx, eax
shr edx, 31
add eax, edx
sar eax
mov DWORD PTR -12[rbp], eax
jmp .L11
.L12:
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 8[rax]
mov QWORD PTR -8[rbp], rax
.L11:
mov eax, DWORD PTR -12[rbp]
lea edx, -1[rax]
mov DWORD PTR -12[rbp], edx
test eax, eax
jne .L12
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR [rax]
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE9:
.size printMiddle, .-printMiddle
.section .rodata
.LC3:
.string "\nCreated DLL is: "
.text
.globl main
.type main, @function
main:
.LFB10:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov QWORD PTR -16[rbp], 0
lea rax, -16[rbp]
mov esi, 6
mov rdi, rax
call insert_at_front
lea rax, -16[rbp]
mov esi, 7
mov rdi, rax
call insert_at_front
lea rax, -16[rbp]
mov esi, 1
mov rdi, rax
call insert_at_front
lea rax, -16[rbp]
mov esi, 3
mov rdi, rax
call insert_at_front
lea rax, -16[rbp]
mov esi, 8
mov rdi, rax
call insert_at_front
lea rdi, .LC3[rip]
mov eax, 0
call printf@PLT
mov rax, QWORD PTR -16[rbp]
mov rdi, rax
call display
mov rax, QWORD PTR -16[rbp]
mov rdi, rax
call printMiddle
mov edi, 10
call putchar@PLT
mov eax, 0
mov rdx, QWORD PTR -8[rbp]
sub rdx, QWORD PTR fs:40
je .L15
call __stack_chk_fail@PLT
.L15:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE10:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "538921.c"
.text
.align 2
.global insert_at_front
.syntax unified
.arm
.fpu softvfp
.type insert_at_front, %function
insert_at_front:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
mov r0, #12
bl malloc
mov r3, r0
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldr r2, [fp, #-20]
str r2, [r3]
ldr r3, [fp, #-16]
ldr r2, [r3]
ldr r3, [fp, #-8]
str r2, [r3, #4]
ldr r3, [fp, #-8]
mov r2, #0
str r2, [r3, #8]
ldr r3, [fp, #-16]
ldr r3, [r3]
cmp r3, #0
beq .L2
ldr r3, [fp, #-16]
ldr r3, [r3]
ldr r2, [fp, #-8]
str r2, [r3, #8]
.L2:
ldr r3, [fp, #-16]
ldr r2, [fp, #-8]
str r2, [r3]
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size insert_at_front, .-insert_at_front
.section .rodata
.align 2
.LC0:
.ascii " %d <->\000"
.align 2
.LC1:
.ascii " NULL\000"
.text
.align 2
.global display
.syntax unified
.arm
.fpu softvfp
.type display, %function
display:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
b .L4
.L5:
ldr r3, [fp, #-16]
ldr r3, [r3]
mov r1, r3
ldr r0, .L6
bl printf
ldr r3, [fp, #-16]
str r3, [fp, #-8]
ldr r3, [fp, #-16]
ldr r3, [r3, #4]
str r3, [fp, #-16]
.L4:
ldr r3, [fp, #-16]
cmp r3, #0
bne .L5
ldr r0, .L6+4
bl puts
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L7:
.align 2
.L6:
.word .LC0
.word .LC1
.size display, .-display
.align 2
.global countNodes
.syntax unified
.arm
.fpu softvfp
.type countNodes, %function
countNodes:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
mov r3, #0
str r3, [fp, #-12]
ldr r3, [fp, #-16]
str r3, [fp, #-8]
b .L9
.L10:
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
ldr r3, [fp, #-8]
ldr r3, [r3, #4]
str r3, [fp, #-8]
.L9:
ldr r3, [fp, #-8]
cmp r3, #0
bne .L10
ldr r3, [fp, #-12]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size countNodes, .-countNodes
.section .rodata
.align 2
.LC2:
.ascii "\012The middle element = %d\012\000"
.text
.align 2
.global printMiddle
.syntax unified
.arm
.fpu softvfp
.type printMiddle, %function
printMiddle:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
ldr r0, [fp, #-16]
bl countNodes
str r0, [fp, #-12]
ldr r3, [fp, #-16]
str r3, [fp, #-8]
ldr r3, [fp, #-12]
lsr r2, r3, #31
add r3, r2, r3
asr r3, r3, #1
str r3, [fp, #-12]
b .L13
.L14:
ldr r3, [fp, #-8]
ldr r3, [r3, #4]
str r3, [fp, #-8]
.L13:
ldr r3, [fp, #-12]
sub r2, r3, #1
str r2, [fp, #-12]
cmp r3, #0
bne .L14
ldr r3, [fp, #-8]
ldr r3, [r3]
mov r1, r3
ldr r0, .L15
bl printf
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L16:
.align 2
.L15:
.word .LC2
.size printMiddle, .-printMiddle
.section .rodata
.align 2
.LC3:
.ascii "\012Created DLL is: \000"
.align 2
.LC4:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
ldr r3, .L20
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-12]
sub r3, fp, #12
mov r1, #6
mov r0, r3
bl insert_at_front
sub r3, fp, #12
mov r1, #7
mov r0, r3
bl insert_at_front
sub r3, fp, #12
mov r1, #1
mov r0, r3
bl insert_at_front
sub r3, fp, #12
mov r1, #3
mov r0, r3
bl insert_at_front
sub r3, fp, #12
mov r1, #8
mov r0, r3
bl insert_at_front
ldr r0, .L20+4
bl printf
ldr r3, [fp, #-12]
mov r0, r3
bl display
ldr r3, [fp, #-12]
mov r0, r3
bl printMiddle
mov r0, #10
bl putchar
mov r3, #0
ldr r2, .L20
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L19
bl __stack_chk_fail
.L19:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L21:
.align 2
.L20:
.word .LC4
.word .LC3
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "323240.c"
.intel_syntax noprefix
.text
.section .rodata
.align 8
.LC0:
.string "Informe a quantidade de numeros da sequencia:\nR:"
.LC1:
.string "%d"
.LC2:
.string "%d "
.text
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -20[rbp], 0
mov DWORD PTR -16[rbp], 1
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
lea rax, -28[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
mov DWORD PTR -24[rbp], 0
jmp .L2
.L3:
mov eax, DWORD PTR -20[rbp]
mov esi, eax
lea rdi, .LC2[rip]
mov eax, 0
call printf@PLT
mov edx, DWORD PTR -20[rbp]
mov eax, DWORD PTR -16[rbp]
add eax, edx
mov DWORD PTR -12[rbp], eax
mov eax, DWORD PTR -16[rbp]
mov DWORD PTR -20[rbp], eax
mov eax, DWORD PTR -12[rbp]
mov DWORD PTR -16[rbp], eax
add DWORD PTR -24[rbp], 1
.L2:
mov eax, DWORD PTR -28[rbp]
cmp DWORD PTR -24[rbp], eax
jl .L3
mov eax, 0
mov rcx, QWORD PTR -8[rbp]
sub rcx, QWORD PTR fs:40
je .L5
call __stack_chk_fail@PLT
.L5:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "323240.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "Informe a quantidade de numeros da sequencia:\012R:"
.ascii "\000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "%d \000"
.align 2
.LC3:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
ldr r3, .L6
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #0
str r3, [fp, #-20]
mov r3, #1
str r3, [fp, #-16]
ldr r0, .L6+4
bl printf
sub r3, fp, #28
mov r1, r3
ldr r0, .L6+8
bl __isoc99_scanf
mov r3, #0
str r3, [fp, #-24]
b .L2
.L3:
ldr r1, [fp, #-20]
ldr r0, .L6+12
bl printf
ldr r2, [fp, #-20]
ldr r3, [fp, #-16]
add r3, r2, r3
str r3, [fp, #-12]
ldr r3, [fp, #-16]
str r3, [fp, #-20]
ldr r3, [fp, #-12]
str r3, [fp, #-16]
ldr r3, [fp, #-24]
add r3, r3, #1
str r3, [fp, #-24]
.L2:
ldr r3, [fp, #-28]
ldr r2, [fp, #-24]
cmp r2, r3
blt .L3
mov r3, #0
ldr r2, .L6
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L5
bl __stack_chk_fail
.L5:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L7:
.align 2
.L6:
.word .LC3
.word .LC0
.word .LC1
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "75208.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "%d\n"
.LC1:
.string "hello!"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 80
mov DWORD PTR -68[rbp], edi
mov QWORD PTR -80[rbp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
lea rax, -48[rbp]
mov QWORD PTR -56[rbp], rax
lea rax, -48[rbp]
mov QWORD PTR -56[rbp], rax
mov rax, QWORD PTR -56[rbp]
mov eax, DWORD PTR [rax]
mov esi, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
lea rdi, .LC1[rip]
call strlenth
mov esi, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov eax, 0
mov rdx, QWORD PTR -8[rbp]
sub rdx, QWORD PTR fs:40
je .L3
call __stack_chk_fail@PLT
.L3:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.globl strlenth
.type strlenth, @function
strlenth:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -4[rbp], 0
jmp .L5
.L6:
add DWORD PTR -4[rbp], 1
add QWORD PTR -24[rbp], 1
.L5:
mov rax, QWORD PTR -24[rbp]
movzx eax, BYTE PTR [rax]
test al, al
jne .L6
mov eax, DWORD PTR -4[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size strlenth, .-strlenth
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "75208.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "%d\012\000"
.align 2
.LC1:
.ascii "hello!\000"
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #56
str r0, [fp, #-56]
str r1, [fp, #-60]
ldr r3, .L4
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
sub r3, fp, #48
str r3, [fp, #-52]
sub r3, fp, #48
str r3, [fp, #-52]
ldr r3, [fp, #-52]
ldr r3, [r3]
mov r1, r3
ldr r0, .L4+4
bl printf
ldr r0, .L4+8
bl strlenth
mov r3, r0
mov r1, r3
ldr r0, .L4+4
bl printf
mov r3, #0
ldr r2, .L4
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L3
bl __stack_chk_fail
.L3:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L5:
.align 2
.L4:
.word .LC2
.word .LC0
.word .LC1
.size main, .-main
.align 2
.global strlenth
.syntax unified
.arm
.fpu softvfp
.type strlenth, %function
strlenth:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #20
str r0, [fp, #-16]
mov r3, #0
str r3, [fp, #-8]
b .L7
.L8:
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L7:
ldr r3, [fp, #-16]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L8
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size strlenth, .-strlenth
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "959475.c"
.intel_syntax noprefix
.text
.globl matGraph
.type matGraph, @function
matGraph:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -16[rbp], 0
jmp .L2
.L6:
mov eax, DWORD PTR -16[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov QWORD PTR [rax], 0
mov DWORD PTR -12[rbp], 0
jmp .L3
.L5:
mov eax, DWORD PTR -16[rbp]
movsx rdx, eax
mov rax, rdx
sal rax, 3
sub rax, rdx
sal rax, 2
mov rdx, rax
mov rax, QWORD PTR -24[rbp]
add rdx, rax
mov eax, DWORD PTR -12[rbp]
cdqe
mov eax, DWORD PTR [rdx+rax*4]
test eax, eax
je .L4
mov edi, 16
call malloc@PLT
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov edx, DWORD PTR -12[rbp]
mov DWORD PTR [rax], edx
mov eax, DWORD PTR -16[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR 8[rax], rdx
mov eax, DWORD PTR -16[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -32[rbp]
add rdx, rax
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR [rdx], rax
.L4:
add DWORD PTR -12[rbp], 1
.L3:
cmp DWORD PTR -12[rbp], 6
jle .L5
add DWORD PTR -16[rbp], 1
.L2:
cmp DWORD PTR -16[rbp], 6
jle .L6
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size matGraph, .-matGraph
.globl reverse
.type reverse, @function
reverse:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -40[rbp], rdi
mov QWORD PTR -48[rbp], rsi
mov DWORD PTR -20[rbp], 0
jmp .L8
.L9:
mov eax, DWORD PTR -20[rbp]
lea edx, 1[rax]
mov DWORD PTR -20[rbp], edx
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
mov QWORD PTR [rax], 0
.L8:
cmp DWORD PTR -20[rbp], 6
jle .L9
mov DWORD PTR -20[rbp], 0
jmp .L10
.L13:
mov eax, DWORD PTR -20[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -40[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov QWORD PTR -16[rbp], rax
jmp .L11
.L12:
mov edi, 16
call malloc@PLT
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov edx, DWORD PTR -20[rbp]
mov DWORD PTR [rax], edx
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR [rax]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rax, rdx
mov rdx, QWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR 8[rax], rdx
mov rax, QWORD PTR -16[rbp]
mov eax, DWORD PTR [rax]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -48[rbp]
add rdx, rax
mov rax, QWORD PTR -8[rbp]
mov QWORD PTR [rdx], rax
mov rax, QWORD PTR -16[rbp]
mov rax, QWORD PTR 8[rax]
mov QWORD PTR -16[rbp], rax
.L11:
cmp QWORD PTR -16[rbp], 0
jne .L12
add DWORD PTR -20[rbp], 1
.L10:
cmp DWORD PTR -20[rbp], 6
jle .L13
nop
nop
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size reverse, .-reverse
.globl isEdge
.type isEdge, @function
isEdge:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -28[rbp], esi
mov DWORD PTR -32[rbp], edx
mov eax, DWORD PTR -28[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov QWORD PTR -8[rbp], rax
jmp .L15
.L17:
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 8[rax]
mov QWORD PTR -8[rbp], rax
.L15:
cmp QWORD PTR -8[rbp], 0
je .L16
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR [rax]
cmp DWORD PTR -32[rbp], eax
jne .L17
.L16:
cmp QWORD PTR -8[rbp], 0
setne al
movzx eax, al
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size isEdge, .-isEdge
.globl pathOK
.type pathOK, @function
pathOK:
.LFB3:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -36[rbp], edx
mov DWORD PTR -4[rbp], 0
jmp .L20
.L22:
add DWORD PTR -4[rbp], 1
.L20:
mov eax, DWORD PTR -4[rbp]
add eax, 1
cmp DWORD PTR -36[rbp], eax
jle .L21
mov eax, DWORD PTR -4[rbp]
cdqe
add rax, 1
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov edx, DWORD PTR [rax]
mov eax, DWORD PTR -4[rbp]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
mov ecx, DWORD PTR [rax]
mov rax, QWORD PTR -24[rbp]
mov esi, ecx
mov rdi, rax
mov eax, 0
call edge@PLT
test eax, eax
jne .L22
.L21:
mov eax, DWORD PTR -4[rbp]
add eax, 1
cmp DWORD PTR -36[rbp], eax
sete al
movzx eax, al
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE3:
.size pathOK, .-pathOK
.globl colorOK
.type colorOK, @function
colorOK:
.LFB4:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov DWORD PTR -12[rbp], 1
mov DWORD PTR -16[rbp], 0
jmp .L25
.L30:
mov eax, DWORD PTR -16[rbp]
cdqe
lea rdx, 0[0+rax*8]
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov rax, QWORD PTR [rax]
mov QWORD PTR -8[rbp], rax
jmp .L26
.L28:
mov eax, DWORD PTR -16[rbp]
cdqe
lea rdx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov edx, DWORD PTR [rax]
mov rax, QWORD PTR -8[rbp]
mov eax, DWORD PTR [rax]
cdqe
lea rcx, 0[0+rax*4]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
mov eax, DWORD PTR [rax]
cmp edx, eax
jne .L27
mov DWORD PTR -12[rbp], 0
.L27:
mov rax, QWORD PTR -8[rbp]
mov rax, QWORD PTR 8[rax]
mov QWORD PTR -8[rbp], rax
.L26:
cmp QWORD PTR -8[rbp], 0
jne .L28
add DWORD PTR -16[rbp], 1
.L25:
cmp DWORD PTR -16[rbp], 6
jg .L29
cmp DWORD PTR -12[rbp], 0
jne .L30
.L29:
mov eax, DWORD PTR -12[rbp]
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE4:
.size colorOK, .-colorOK
.globl main
.type main, @function
main:
.LFB5:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, 0
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE5:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "959475.c"
.text
.align 2
.global matGraph
.syntax unified
.arm
.fpu softvfp
.type matGraph, %function
matGraph:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
str r1, [fp, #-28]
mov r3, #0
str r3, [fp, #-16]
b .L2
.L6:
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
mov r2, #0
str r2, [r3]
mov r3, #0
str r3, [fp, #-12]
b .L3
.L5:
ldr r2, [fp, #-16]
mov r3, r2
lsl r3, r3, #3
sub r3, r3, r2
lsl r3, r3, #2
mov r2, r3
ldr r3, [fp, #-24]
add r3, r3, r2
ldr r2, [fp, #-12]
ldr r3, [r3, r2, lsl #2]
cmp r3, #0
beq .L4
mov r0, #8
bl malloc
mov r3, r0
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldr r2, [fp, #-12]
str r2, [r3]
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-8]
str r2, [r3, #4]
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
ldr r2, [fp, #-8]
str r2, [r3]
.L4:
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L3:
ldr r3, [fp, #-12]
cmp r3, #6
ble .L5
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L2:
ldr r3, [fp, #-16]
cmp r3, #6
ble .L6
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size matGraph, .-matGraph
.align 2
.global reverse
.syntax unified
.arm
.fpu softvfp
.type reverse, %function
reverse:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-24]
str r1, [fp, #-28]
mov r3, #0
str r3, [fp, #-16]
b .L8
.L9:
ldr r3, [fp, #-16]
add r2, r3, #1
str r2, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
mov r2, #0
str r2, [r3]
.L8:
ldr r3, [fp, #-16]
cmp r3, #6
ble .L9
mov r3, #0
str r3, [fp, #-16]
b .L10
.L13:
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-12]
b .L11
.L12:
mov r0, #8
bl malloc
mov r3, r0
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldr r2, [fp, #-16]
str r2, [r3]
ldr r3, [fp, #-12]
ldr r3, [r3]
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-8]
str r2, [r3, #4]
ldr r3, [fp, #-12]
ldr r3, [r3]
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
ldr r2, [fp, #-8]
str r2, [r3]
ldr r3, [fp, #-12]
ldr r3, [r3, #4]
str r3, [fp, #-12]
.L11:
ldr r3, [fp, #-12]
cmp r3, #0
bne .L12
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L10:
ldr r3, [fp, #-16]
cmp r3, #6
ble .L13
nop
nop
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size reverse, .-reverse
.align 2
.global isEdge
.syntax unified
.arm
.fpu softvfp
.type isEdge, %function
isEdge:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
ldr r3, [fp, #-20]
lsl r3, r3, #2
ldr r2, [fp, #-16]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-8]
b .L15
.L17:
ldr r3, [fp, #-8]
ldr r3, [r3, #4]
str r3, [fp, #-8]
.L15:
ldr r3, [fp, #-8]
cmp r3, #0
beq .L16
ldr r3, [fp, #-8]
ldr r3, [r3]
ldr r2, [fp, #-24]
cmp r2, r3
bne .L17
.L16:
ldr r3, [fp, #-8]
cmp r3, #0
movne r3, #1
moveq r3, #0
and r3, r3, #255
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size isEdge, .-isEdge
.align 2
.global pathOK
.syntax unified
.arm
.fpu softvfp
.type pathOK, %function
pathOK:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
mov r3, #0
str r3, [fp, #-8]
b .L20
.L22:
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L20:
ldr r3, [fp, #-8]
add r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
ble .L21
ldr r3, [fp, #-8]
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
ldr r1, [r3]
ldr r3, [fp, #-8]
add r3, r3, #1
lsl r3, r3, #2
ldr r2, [fp, #-20]
add r3, r2, r3
ldr r3, [r3]
mov r2, r3
ldr r0, [fp, #-16]
bl edge
mov r3, r0
cmp r3, #0
bne .L22
.L21:
ldr r3, [fp, #-8]
add r3, r3, #1
ldr r2, [fp, #-24]
cmp r2, r3
moveq r3, #1
movne r3, #0
and r3, r3, #255
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size pathOK, .-pathOK
.align 2
.global colorOK
.syntax unified
.arm
.fpu softvfp
.type colorOK, %function
colorOK:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-24]
str r1, [fp, #-28]
mov r3, #1
str r3, [fp, #-12]
mov r3, #0
str r3, [fp, #-16]
b .L25
.L30:
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-24]
add r3, r2, r3
ldr r3, [r3]
str r3, [fp, #-8]
b .L26
.L28:
ldr r3, [fp, #-16]
lsl r3, r3, #2
ldr r2, [fp, #-28]
add r3, r2, r3
ldr r2, [r3]
ldr r3, [fp, #-8]
ldr r3, [r3]
lsl r3, r3, #2
ldr r1, [fp, #-28]
add r3, r1, r3
ldr r3, [r3]
cmp r2, r3
bne .L27
mov r3, #0
str r3, [fp, #-12]
.L27:
ldr r3, [fp, #-8]
ldr r3, [r3, #4]
str r3, [fp, #-8]
.L26:
ldr r3, [fp, #-8]
cmp r3, #0
bne .L28
ldr r3, [fp, #-16]
add r3, r3, #1
str r3, [fp, #-16]
.L25:
ldr r3, [fp, #-16]
cmp r3, #6
bgt .L29
ldr r3, [fp, #-12]
cmp r3, #0
bne .L30
.L29:
ldr r3, [fp, #-12]
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size colorOK, .-colorOK
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "877346.c"
.intel_syntax noprefix
.text
.section .rodata
.LC1:
.string "%3d %6.1f\n"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], 0
jmp .L2
.L3:
mov eax, DWORD PTR -4[rbp]
sub eax, 32
pxor xmm1, xmm1
cvtsi2sd xmm1, eax
movsd xmm0, QWORD PTR .LC0[rip]
mulsd xmm1, xmm0
movq rdx, xmm1
mov eax, DWORD PTR -4[rbp]
movq xmm0, rdx
mov esi, eax
lea rdi, .LC1[rip]
mov eax, 1
call printf@PLT
add DWORD PTR -4[rbp], 20
.L2:
cmp DWORD PTR -4[rbp], 300
jle .L3
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 8
.LC0:
.long 1908874354
.long 1071761180
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "877346.c"
.text
.global __aeabi_i2d
.global __aeabi_dmul
.section .rodata
.align 2
.LC0:
.ascii "%3d %6.1f\012\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
mov r3, #0
str r3, [fp, #-8]
b .L2
.L3:
ldr r3, [fp, #-8]
sub r3, r3, #32
mov r0, r3
bl __aeabi_i2d
ldr r2, .L5
ldr r3, .L5+4
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldr r1, [fp, #-8]
ldr r0, .L5+8
bl printf
ldr r3, [fp, #-8]
add r3, r3, #20
str r3, [fp, #-8]
.L2:
ldr r3, [fp, #-8]
cmp r3, #300
ble .L3
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L6:
.align 2
.L5:
.word 1908874354
.word 1071761180
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "795370.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "%d"
.text
.globl func
.type func, @function
func:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov DWORD PTR -4[rbp], edi
mov eax, DWORD PTR -4[rbp]
mov esi, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size func, .-func
.globl f
.type f, @function
f:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -8[rbp], rdi
mov rax, QWORD PTR -8[rbp]
mov DWORD PTR [rax], 1
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size f, .-f
.globl main
.type main, @function
main:
.LFB2:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -12[rbp], 1
lea rax, -12[rbp]
mov rdi, rax
call f
mov eax, DWORD PTR -12[rbp]
test eax, eax
je .L5
mov eax, DWORD PTR -12[rbp]
mov edi, eax
call func
.L5:
mov eax, 0
mov rdx, QWORD PTR -8[rbp]
sub rdx, QWORD PTR fs:40
je .L7
call __stack_chk_fail@PLT
.L7:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE2:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "795370.c"
.text
.section .rodata
.align 2
.LC0:
.ascii "%d\000"
.text
.align 2
.global func
.syntax unified
.arm
.fpu softvfp
.type func, %function
func:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
str r0, [fp, #-8]
ldr r1, [fp, #-8]
ldr r0, .L3
bl printf
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L4:
.align 2
.L3:
.word .LC0
.size func, .-func
.align 2
.global f
.syntax unified
.arm
.fpu softvfp
.type f, %function
f:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r2, #1
str r2, [r3]
nop
add sp, fp, #0
@ sp needed
ldr fp, [sp], #4
bx lr
.size f, .-f
.section .rodata
.align 2
.LC1:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
ldr r3, .L10
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
mov r3, #1
str r3, [fp, #-12]
sub r3, fp, #12
mov r0, r3
bl f
ldr r3, [fp, #-12]
cmp r3, #0
beq .L7
ldr r3, [fp, #-12]
mov r0, r3
bl func
.L7:
mov r3, #0
ldr r2, .L10
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L9
bl __stack_chk_fail
.L9:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L11:
.align 2
.L10:
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "277338.c"
.intel_syntax noprefix
.text
.section .rodata
.LC0:
.string "The max is:%d \n"
.LC1:
.string "The min is:%d \n"
.text
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 64
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
mov DWORD PTR -48[rbp], 4
mov DWORD PTR -44[rbp], 4
mov DWORD PTR -40[rbp], 34
mov DWORD PTR -36[rbp], 37
mov DWORD PTR -32[rbp], 3
mov DWORD PTR -28[rbp], 12
mov DWORD PTR -24[rbp], 5
mov DWORD PTR -20[rbp], 6
mov DWORD PTR -16[rbp], 5
mov DWORD PTR -56[rbp], 0
mov eax, DWORD PTR -48[rbp]
mov DWORD PTR -52[rbp], eax
mov DWORD PTR -64[rbp], 0
jmp .L2
.L7:
mov DWORD PTR -60[rbp], 0
jmp .L3
.L6:
mov eax, DWORD PTR -60[rbp]
movsx rcx, eax
mov eax, DWORD PTR -64[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
add rax, rcx
mov eax, DWORD PTR -48[rbp+rax*4]
cmp DWORD PTR -52[rbp], eax
jle .L4
mov eax, DWORD PTR -60[rbp]
movsx rcx, eax
mov eax, DWORD PTR -64[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
add rax, rcx
mov eax, DWORD PTR -48[rbp+rax*4]
mov DWORD PTR -52[rbp], eax
.L4:
mov eax, DWORD PTR -60[rbp]
movsx rcx, eax
mov eax, DWORD PTR -64[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
add rax, rcx
mov eax, DWORD PTR -48[rbp+rax*4]
cmp DWORD PTR -56[rbp], eax
jge .L5
mov eax, DWORD PTR -60[rbp]
movsx rcx, eax
mov eax, DWORD PTR -64[rbp]
movsx rdx, eax
mov rax, rdx
add rax, rax
add rax, rdx
add rax, rcx
mov eax, DWORD PTR -48[rbp+rax*4]
mov DWORD PTR -56[rbp], eax
.L5:
add DWORD PTR -60[rbp], 1
.L3:
cmp DWORD PTR -60[rbp], 2
jle .L6
add DWORD PTR -64[rbp], 1
.L2:
cmp DWORD PTR -64[rbp], 2
jle .L7
mov eax, DWORD PTR -56[rbp]
mov esi, eax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
mov eax, DWORD PTR -52[rbp]
mov esi, eax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
mov eax, 0
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L9
call __stack_chk_fail@PLT
.L9:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "277338.c"
.text
.section .rodata
.align 2
.LC1:
.ascii "The max is:%d \012\000"
.align 2
.LC2:
.ascii "The min is:%d \012\000"
.align 2
.LC0:
.word 4
.word 4
.word 34
.word 37
.word 3
.word 12
.word 5
.word 6
.word 5
.align 2
.LC3:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #56
ldr r3, .L10
ldr r3, [r3]
str r3, [fp, #-8]
mov r3,#0
ldr r3, .L10+4
sub ip, fp, #44
mov lr, r3
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldr r3, [lr]
str r3, [ip]
mov r3, #0
str r3, [fp, #-52]
ldr r3, [fp, #-44]
str r3, [fp, #-48]
mov r3, #0
str r3, [fp, #-60]
b .L2
.L7:
mov r3, #0
str r3, [fp, #-56]
b .L3
.L6:
ldr r2, [fp, #-60]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
ldr r2, [fp, #-56]
add r3, r3, r2
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-40]
ldr r2, [fp, #-48]
cmp r2, r3
ble .L4
ldr r2, [fp, #-60]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
ldr r2, [fp, #-56]
add r3, r3, r2
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-40]
str r3, [fp, #-48]
.L4:
ldr r2, [fp, #-60]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
ldr r2, [fp, #-56]
add r3, r3, r2
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-40]
ldr r2, [fp, #-52]
cmp r2, r3
bge .L5
ldr r2, [fp, #-60]
mov r3, r2
lsl r3, r3, #1
add r3, r3, r2
ldr r2, [fp, #-56]
add r3, r3, r2
lsl r3, r3, #2
sub r2, fp, #4
add r3, r2, r3
ldr r3, [r3, #-40]
str r3, [fp, #-52]
.L5:
ldr r3, [fp, #-56]
add r3, r3, #1
str r3, [fp, #-56]
.L3:
ldr r3, [fp, #-56]
cmp r3, #2
ble .L6
ldr r3, [fp, #-60]
add r3, r3, #1
str r3, [fp, #-60]
.L2:
ldr r3, [fp, #-60]
cmp r3, #2
ble .L7
ldr r1, [fp, #-52]
ldr r0, .L10+8
bl printf
ldr r1, [fp, #-48]
ldr r0, .L10+12
bl printf
mov r3, #0
ldr r2, .L10
ldr r1, [r2]
ldr r2, [fp, #-8]
eors r1, r2, r1
mov r2, #0
beq .L9
bl __stack_chk_fail
.L9:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L11:
.align 2
.L10:
.word .LC3
.word .LC0
.word .LC1
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "842809.c"
.intel_syntax noprefix
.text
.globl ft_strdup
.type ft_strdup, @function
ft_strdup:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov QWORD PTR -24[rbp], rdi
mov DWORD PTR -12[rbp], 0
jmp .L2
.L3:
add DWORD PTR -12[rbp], 1
.L2:
mov eax, DWORD PTR -12[rbp]
movsx rdx, eax
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
test al, al
jne .L3
mov eax, DWORD PTR -12[rbp]
add eax, 1
cdqe
mov rdi, rax
call malloc@PLT
mov QWORD PTR -8[rbp], rax
cmp QWORD PTR -8[rbp], 0
jne .L4
mov eax, 0
jmp .L5
.L4:
mov DWORD PTR -12[rbp], 0
jmp .L6
.L7:
mov eax, DWORD PTR -12[rbp]
movsx rdx, eax
mov rax, QWORD PTR -24[rbp]
add rax, rdx
mov edx, DWORD PTR -12[rbp]
movsx rcx, edx
mov rdx, QWORD PTR -8[rbp]
add rdx, rcx
movzx eax, BYTE PTR [rax]
mov BYTE PTR [rdx], al
add DWORD PTR -12[rbp], 1
.L6:
mov eax, DWORD PTR -12[rbp]
movsx rdx, eax
mov rax, QWORD PTR -24[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
test al, al
jne .L7
mov rax, QWORD PTR -8[rbp]
.L5:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size ft_strdup, .-ft_strdup
.section .rodata
.LC0:
.string "coucou"
.LC1:
.string "%s \n"
.text
.globl main
.type main, @function
main:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
lea rax, .LC0[rip]
mov QWORD PTR -8[rbp], rax
mov rax, QWORD PTR -8[rbp]
mov rdi, rax
call ft_strdup
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call printf@PLT
mov eax, 0
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "842809.c"
.text
.align 2
.global ft_strdup
.syntax unified
.arm
.fpu softvfp
.type ft_strdup, %function
ft_strdup:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
mov r3, #0
str r3, [fp, #-12]
b .L2
.L3:
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L2:
ldr r3, [fp, #-12]
ldr r2, [fp, #-16]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L3
ldr r3, [fp, #-12]
add r3, r3, #1
mov r0, r3
bl malloc
mov r3, r0
str r3, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
bne .L4
mov r3, #0
b .L5
.L4:
mov r3, #0
str r3, [fp, #-12]
b .L6
.L7:
ldr r3, [fp, #-12]
ldr r2, [fp, #-16]
add r2, r2, r3
ldr r3, [fp, #-12]
ldr r1, [fp, #-8]
add r3, r1, r3
ldrb r2, [r2] @ zero_extendqisi2
strb r2, [r3]
ldr r3, [fp, #-12]
add r3, r3, #1
str r3, [fp, #-12]
.L6:
ldr r3, [fp, #-12]
ldr r2, [fp, #-16]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7
ldr r3, [fp, #-8]
.L5:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size ft_strdup, .-ft_strdup
.section .rodata
.align 2
.LC0:
.ascii "coucou\000"
.align 2
.LC1:
.ascii "%s \012\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #8
ldr r3, .L10
str r3, [fp, #-8]
ldr r0, [fp, #-8]
bl ft_strdup
mov r3, r0
mov r1, r3
ldr r0, .L10+4
bl printf
mov r3, #0
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L11:
.align 2
.L10:
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "28305.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "28305.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "904578.c"
.intel_syntax noprefix
.text
.globl algo
.type algo, @function
algo:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -8[rbp], 0
.L6:
cmp QWORD PTR -24[rbp], 1
jne .L2
add QWORD PTR -8[rbp], 1
mov rax, QWORD PTR -8[rbp]
jmp .L7
.L2:
add QWORD PTR -8[rbp], 1
mov rax, QWORD PTR -24[rbp]
and eax, 1
test rax, rax
je .L4
mov rdx, QWORD PTR -24[rbp]
mov rax, rdx
add rax, rax
add rax, rdx
add rax, 1
mov QWORD PTR -24[rbp], rax
jmp .L6
.L4:
mov rax, QWORD PTR -24[rbp]
shr rax
mov QWORD PTR -24[rbp], rax
jmp .L6
.L7:
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size algo, .-algo
.section .rodata
.LC0:
.string "%llu %llu %llu\n"
.LC1:
.string "%llu %llu"
.text
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
jmp .L9
.L18:
mov QWORD PTR -24[rbp], 0
mov rdx, QWORD PTR -48[rbp]
mov rax, QWORD PTR -40[rbp]
cmp rdx, rax
jnb .L10
mov rax, QWORD PTR -48[rbp]
mov QWORD PTR -32[rbp], rax
jmp .L11
.L13:
mov rax, QWORD PTR -32[rbp]
mov rdi, rax
call algo
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -16[rbp]
cmp rax, QWORD PTR -24[rbp]
jbe .L12
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR -24[rbp], rax
.L12:
add QWORD PTR -32[rbp], 1
.L11:
mov rax, QWORD PTR -40[rbp]
cmp QWORD PTR -32[rbp], rax
jbe .L13
jmp .L14
.L10:
mov rax, QWORD PTR -40[rbp]
mov QWORD PTR -32[rbp], rax
jmp .L15
.L17:
mov rax, QWORD PTR -32[rbp]
mov rdi, rax
call algo
mov QWORD PTR -16[rbp], rax
mov rax, QWORD PTR -16[rbp]
cmp rax, QWORD PTR -24[rbp]
jbe .L16
mov rax, QWORD PTR -16[rbp]
mov QWORD PTR -24[rbp], rax
.L16:
add QWORD PTR -32[rbp], 1
.L15:
mov rax, QWORD PTR -48[rbp]
cmp QWORD PTR -32[rbp], rax
jbe .L17
.L14:
mov rdx, QWORD PTR -40[rbp]
mov rax, QWORD PTR -48[rbp]
mov rcx, QWORD PTR -24[rbp]
mov rsi, rax
lea rdi, .LC0[rip]
mov eax, 0
call printf@PLT
.L9:
lea rdx, -40[rbp]
lea rax, -48[rbp]
mov rsi, rax
lea rdi, .LC1[rip]
mov eax, 0
call __isoc99_scanf@PLT
cmp eax, 2
je .L18
mov eax, 0
mov rsi, QWORD PTR -8[rbp]
sub rsi, QWORD PTR fs:40
je .L20
call __stack_chk_fail@PLT
.L20:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE1:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "904578.c"
.text
.align 2
.global algo
.syntax unified
.arm
.fpu softvfp
.type algo, %function
algo:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
push {r4, r5, r6, r7, r8, r9, fp}
add fp, sp, #24
sub sp, sp, #44
str r0, [fp, #-44]
str r1, [fp, #-40]
mov r2, #0
mov r3, #0
str r2, [fp, #-36]
str r3, [fp, #-32]
.L6:
sub r3, fp, #44
ldmia r3, {r2-r3}
cmp r3, #0
cmpeq r2, #1
bne .L2
sub r3, fp, #36
ldmia r3, {r2-r3}
adds r8, r2, #1
adc r9, r3, #0
str r8, [fp, #-36]
str r9, [fp, #-32]
sub r3, fp, #36
ldmia r3, {r2-r3}
b .L7
.L2:
sub r3, fp, #36
ldmia r3, {r2-r3}
adds r1, r2, #1
str r1, [fp, #-52]
adc r3, r3, #0
str r3, [fp, #-48]
sub r3, fp, #52
ldmia r3, {r2-r3}
str r2, [fp, #-36]
str r3, [fp, #-32]
sub r1, fp, #44
ldmia r1, {r0-r1}
mov r2, #1
mov r3, #0
and r6, r0, r2
and r7, r1, r3
orrs r3, r6, r7
beq .L4
sub r1, fp, #44
ldmia r1, {r0-r1}
mov r2, r0
mov r3, r1
adds ip, r2, r2
str ip, [fp, #-60]
adc r3, r3, r3
str r3, [fp, #-56]
sub r3, fp, #60
ldmia r3, {r2-r3}
adds r4, r2, r0
adc r5, r3, r1
adds r3, r4, #1
str r3, [fp, #-68]
adc r3, r5, #0
str r3, [fp, #-64]
sub r3, fp, #68
ldmia r3, {r2-r3}
str r2, [fp, #-44]
str r3, [fp, #-40]
b .L6
.L4:
sub r3, fp, #44
ldmia r3, {r2-r3}
mov r0, #0
mov r1, #0
lsr r0, r2, #1
orr r0, r0, r3, lsl #31
lsr r1, r3, #1
str r0, [fp, #-44]
str r1, [fp, #-40]
b .L6
.L7:
mov r0, r2
mov r1, r3
sub sp, fp, #24
@ sp needed
pop {r4, r5, r6, r7, r8, r9, fp}
bx lr
.size algo, .-algo
.section .rodata
.align 2
.LC0:
.ascii "%llu %llu %llu\012\000"
.align 2
.LC1:
.ascii "%llu %llu\000"
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, fp, lr}
add fp, sp, #28
sub sp, sp, #64
ldr r3, .L21
ldr r3, [r3]
str r3, [fp, #-32]
mov r3,#0
b .L9
.L18:
mov r2, #0
mov r3, #0
str r2, [fp, #-52]
str r3, [fp, #-48]
sub r1, fp, #76
ldmia r1, {r0-r1}
sub r3, fp, #68
ldmia r3, {r2-r3}
cmp r1, r3
cmpeq r0, r2
bcs .L10
sub r3, fp, #76
ldmia r3, {r2-r3}
str r2, [fp, #-60]
str r3, [fp, #-56]
b .L11
.L13:
sub r1, fp, #60
ldmia r1, {r0-r1}
bl algo
str r0, [fp, #-44]
str r1, [fp, #-40]
sub r1, fp, #44
ldmia r1, {r0-r1}
sub r3, fp, #52
ldmia r3, {r2-r3}
cmp r1, r3
cmpeq r0, r2
bls .L12
sub r3, fp, #44
ldmia r3, {r2-r3}
str r2, [fp, #-52]
str r3, [fp, #-48]
.L12:
sub r3, fp, #60
ldmia r3, {r2-r3}
adds r4, r2, #1
adc r5, r3, #0
str r4, [fp, #-60]
str r5, [fp, #-56]
.L11:
sub r3, fp, #68
ldmia r3, {r2-r3}
sub r1, fp, #60
ldmia r1, {r0-r1}
cmp r1, r3
cmpeq r0, r2
bls .L13
b .L14
.L10:
sub r3, fp, #68
ldmia r3, {r2-r3}
str r2, [fp, #-60]
str r3, [fp, #-56]
b .L15
.L17:
sub r1, fp, #60
ldmia r1, {r0-r1}
bl algo
str r0, [fp, #-44]
str r1, [fp, #-40]
sub r1, fp, #44
ldmia r1, {r0-r1}
sub r3, fp, #52
ldmia r3, {r2-r3}
cmp r1, r3
cmpeq r0, r2
bls .L16
sub r3, fp, #44
ldmia r3, {r2-r3}
str r2, [fp, #-52]
str r3, [fp, #-48]
.L16:
sub r3, fp, #60
ldmia r3, {r2-r3}
adds r6, r2, #1
adc r7, r3, #0
str r6, [fp, #-60]
str r7, [fp, #-56]
.L15:
sub r3, fp, #76
ldmia r3, {r2-r3}
sub r1, fp, #60
ldmia r1, {r0-r1}
cmp r1, r3
cmpeq r0, r2
bls .L17
.L14:
sub r9, fp, #76
ldmia r9, {r8-r9}
sub r3, fp, #68
ldmia r3, {r2-r3}
sub r1, fp, #52
ldmia r1, {r0-r1}
str r0, [sp, #8]
str r1, [sp, #12]
stm sp, {r2-r3}
mov r2, r8
mov r3, r9
ldr r0, .L21+4
bl printf
.L9:
sub r2, fp, #68
sub r3, fp, #76
mov r1, r3
ldr r0, .L21+8
bl __isoc99_scanf
mov r3, r0
cmp r3, #2
beq .L18
mov r3, #0
ldr r2, .L21
ldr r1, [r2]
ldr r2, [fp, #-32]
eors r1, r2, r1
mov r2, #0
beq .L20
bl __stack_chk_fail
.L20:
mov r0, r3
sub sp, fp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, fp, pc}
.L22:
.align 2
.L21:
.word .LC2
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "954930.c"
.intel_syntax noprefix
.text
.local line
.comm line,8192,32
.globl TextInputLine
.type TextInputLine, @function
TextInputLine:
.LFB6:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 48
mov QWORD PTR -24[rbp], rdi
mov QWORD PTR -32[rbp], rsi
mov QWORD PTR -40[rbp], rdx
mov QWORD PTR -8[rbp], 0
sub QWORD PTR -40[rbp], 1
jmp .L2
.L9:
mov rax, QWORD PTR -24[rbp]
mov rdi, rax
call fgetc@PLT
mov edx, eax
mov rcx, QWORD PTR -8[rbp]
mov rax, QWORD PTR -32[rbp]
add rax, rcx
mov BYTE PTR [rax], dl
mov rax, QWORD PTR -24[rbp]
mov rdi, rax
call feof@PLT
test eax, eax
jne .L3
mov rax, QWORD PTR -24[rbp]
mov rdi, rax
call ferror@PLT
test eax, eax
je .L4
.L3:
mov rax, -1
jmp .L5
.L4:
mov rdx, QWORD PTR -8[rbp]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
cmp al, 10
jne .L6
mov rdx, QWORD PTR -8[rbp]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov BYTE PTR [rax], 0
cmp QWORD PTR -8[rbp], 0
jle .L10
mov rax, QWORD PTR -8[rbp]
lea rdx, -1[rax]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
movzx eax, BYTE PTR [rax]
cmp al, 13
jne .L10
sub QWORD PTR -8[rbp], 1
mov rdx, QWORD PTR -8[rbp]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov BYTE PTR [rax], 0
jmp .L10
.L6:
add QWORD PTR -8[rbp], 1
.L2:
mov rax, QWORD PTR -8[rbp]
cmp rax, QWORD PTR -40[rbp]
jl .L9
jmp .L8
.L10:
nop
.L8:
mov rdx, QWORD PTR -8[rbp]
mov rax, QWORD PTR -32[rbp]
add rax, rdx
mov BYTE PTR [rax], 0
mov rax, QWORD PTR -8[rbp]
.L5:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE6:
.size TextInputLine, .-TextInputLine
.section .rodata
.LC0:
.string "usage: rawrm <file-list\n"
.LC1:
.string "%s not removed\n"
.text
.globl main
.type main, @function
main:
.LFB7:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 32
mov DWORD PTR -20[rbp], edi
mov QWORD PTR -32[rbp], rsi
cmp DWORD PTR -20[rbp], 1
je .L14
mov rax, QWORD PTR stderr[rip]
mov rcx, rax
mov edx, 24
mov esi, 1
lea rdi, .LC0[rip]
call fwrite@PLT
mov eax, 2
jmp .L13
.L15:
cmp QWORD PTR -8[rbp], 0
je .L14
lea rdi, line[rip]
mov eax, 0
call unlink@PLT
test eax, eax
je .L14
mov rax, QWORD PTR stdout[rip]
lea rdx, line[rip]
lea rsi, .LC1[rip]
mov rdi, rax
mov eax, 0
call fprintf@PLT
.L14:
mov rax, QWORD PTR stdin[rip]
mov edx, 8192
lea rsi, line[rip]
mov rdi, rax
call TextInputLine
mov QWORD PTR -8[rbp], rax
cmp QWORD PTR -8[rbp], 0
jns .L15
mov eax, 0
.L13:
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE7:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "954930.c"
.text
.local line
.comm line,8192,4
.align 2
.global TextInputLine
.syntax unified
.arm
.fpu softvfp
.type TextInputLine, %function
TextInputLine:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #24
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
mov r3, #0
str r3, [fp, #-8]
ldr r3, [fp, #-24]
sub r3, r3, #1
str r3, [fp, #-24]
b .L2
.L9:
ldr r0, [fp, #-16]
bl fgetc
mov r1, r0
ldr r3, [fp, #-8]
ldr r2, [fp, #-20]
add r3, r2, r3
and r2, r1, #255
strb r2, [r3]
ldr r0, [fp, #-16]
bl feof
mov r3, r0
cmp r3, #0
bne .L3
ldr r0, [fp, #-16]
bl ferror
mov r3, r0
cmp r3, #0
beq .L4
.L3:
mvn r3, #0
b .L5
.L4:
ldr r3, [fp, #-8]
ldr r2, [fp, #-20]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #10
bne .L6
ldr r3, [fp, #-8]
ldr r2, [fp, #-20]
add r3, r2, r3
mov r2, #0
strb r2, [r3]
ldr r3, [fp, #-8]
cmp r3, #0
ble .L10
ldr r3, [fp, #-8]
sub r3, r3, #1
ldr r2, [fp, #-20]
add r3, r2, r3
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #13
bne .L10
ldr r3, [fp, #-8]
sub r3, r3, #1
str r3, [fp, #-8]
ldr r3, [fp, #-8]
ldr r2, [fp, #-20]
add r3, r2, r3
mov r2, #0
strb r2, [r3]
b .L10
.L6:
ldr r3, [fp, #-8]
add r3, r3, #1
str r3, [fp, #-8]
.L2:
ldr r2, [fp, #-8]
ldr r3, [fp, #-24]
cmp r2, r3
blt .L9
b .L8
.L10:
nop
.L8:
ldr r3, [fp, #-8]
ldr r2, [fp, #-20]
add r3, r2, r3
mov r2, #0
strb r2, [r3]
ldr r3, [fp, #-8]
.L5:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.size TextInputLine, .-TextInputLine
.section .rodata
.align 2
.LC0:
.ascii "usage: rawrm <file-list\012\000"
.align 2
.LC1:
.ascii "%s not removed\012\000"
.text
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
sub sp, sp, #16
str r0, [fp, #-16]
str r1, [fp, #-20]
ldr r3, [fp, #-16]
cmp r3, #1
beq .L14
ldr r3, .L16
ldr r3, [r3]
mov r2, #24
mov r1, #1
ldr r0, .L16+4
bl fwrite
mov r3, #2
b .L13
.L15:
ldr r3, [fp, #-8]
cmp r3, #0
beq .L14
ldr r0, .L16+8
bl unlink
mov r3, r0
cmp r3, #0
beq .L14
ldr r3, .L16+12
ldr r3, [r3]
ldr r2, .L16+8
ldr r1, .L16+16
mov r0, r3
bl fprintf
.L14:
ldr r3, .L16+20
ldr r3, [r3]
mov r2, #8192
ldr r1, .L16+8
mov r0, r3
bl TextInputLine
str r0, [fp, #-8]
ldr r3, [fp, #-8]
cmp r3, #0
bge .L15
mov r3, #0
.L13:
mov r0, r3
sub sp, fp, #4
@ sp needed
pop {fp, pc}
.L17:
.align 2
.L16:
.word stderr
.word .LC0
.word line
.word stdout
.word .LC1
.word stdin
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "346547.c"
.intel_syntax noprefix
.text
.globl foo
.type foo, @function
foo:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
mov eax, 0
call bar@PLT
nop
pop rbp
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.LFE0:
.size foo, .-foo
.section .init_array,"aw"
.align 8
.quad foo
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 6
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "346547.c"
.text
.align 2
.global foo
.syntax unified
.arm
.fpu softvfp
.type foo, %function
foo:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
push {fp, lr}
add fp, sp, #4
bl bar
nop
pop {fp, pc}
.size foo, .-foo
.section .init_array,"aw",%init_array
.align 2
.word foo(target1)
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
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