x86
stringlengths 320
23.7M
| arm
stringlengths 334
24.4M
| source
stringclasses 2
values |
|---|---|---|
.file "99876.c"
.intel_syntax noprefix
.text
.p2align 4
.globl sys_tmpnam
.type sys_tmpnam, @function
sys_tmpnam:
.LFB23:
.cfi_startproc
endbr64
jmp tmpnam@PLT
.cfi_endproc
.LFE23:
.size sys_tmpnam, .-sys_tmpnam
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99876.c"
.text
.align 2
.global sys_tmpnam
.syntax unified
.arm
.fpu softvfp
.type sys_tmpnam, %function
sys_tmpnam:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
b tmpnam
.size sys_tmpnam, .-sys_tmpnam
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "998761.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB16:
.cfi_startproc
endbr64
mov eax, DWORD PTR ds:0
ud2
.cfi_endproc
.LFE16:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "998761.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r3, #0
ldr r3, [r3]
.inst 0xe7f000f0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "998762.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Illegal Argument Exception!"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "Dorminhoco com pid: %d, vai dormir: %d segundos.\n"
.section .rodata.str1.1
.LC2:
.string "Dorminhoco: %d, acabou.\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB61:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
cmp edi, 2
jne .L5
mov rdi, QWORD PTR 8[rsi]
mov edx, 10
xor esi, esi
call strtol@PLT
mov rbx, rax
call getpid@PLT
mov ecx, ebx
mov edi, 1
lea rsi, .LC1[rip]
mov edx, eax
xor eax, eax
call __printf_chk@PLT
mov edi, ebx
call sleep@PLT
call getpid@PLT
lea rsi, .LC2[rip]
mov edi, 1
mov edx, eax
xor eax, eax
call __printf_chk@PLT
xor eax, eax
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
lea rdi, .LC0[rip]
call puts@PLT
mov edi, 1
call exit@PLT
.cfi_endproc
.LFE61:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "998762.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Illegal Argument Exception!\000"
.align 2
.LC1:
.ascii "Dorminhoco com pid: %d, vai dormir: %d segundos.\012"
.ascii "\000"
.align 2
.LC2:
.ascii "Dorminhoco: %d, acabou.\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r0, #2
push {r4, lr}
bne .L5
mov r2, #10
ldr r0, [r1, #4]
mov r1, #0
bl strtol
mov r4, r0
bl getpid
mov r3, r4
mov r2, r0
ldr r1, .L6
mov r0, #1
bl __printf_chk
mov r0, r4
bl sleep
bl getpid
ldr r1, .L6+4
mov r2, r0
mov r0, #1
bl __printf_chk
mov r0, #0
pop {r4, pc}
.L5:
ldr r0, .L6+8
bl puts
mov r0, #1
bl exit
.L7:
.align 2
.L6:
.word .LC1
.word .LC2
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99877.c"
.intel_syntax noprefix
.text
.p2align 4
.globl initial_data
.type initial_data, @function
initial_data:
.LFB16:
.cfi_startproc
endbr64
ret
.cfi_endproc
.LFE16:
.size initial_data, .-initial_data
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB17:
.cfi_startproc
endbr64
xor eax, eax
ret
.cfi_endproc
.LFE17:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99877.c"
.text
.align 2
.global initial_data
.syntax unified
.arm
.fpu softvfp
.type initial_data, %function
initial_data:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
bx lr
.size initial_data, .-initial_data
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #0
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "998771.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "x = %d \n y = %d \n z= %d\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov ecx, 1
mov edx, 10
xor eax, eax
mov r8d, 27
lea rsi, .LC0[rip]
mov edi, 1
call __printf_chk@PLT
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE39:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "998771.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "x = %d \012 y = %d \012 z= %d\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r3, #1
mov r2, #27
str lr, [sp, #-4]!
sub sp, sp, #12
str r2, [sp]
mov r0, r3
mov r2, #10
ldr r1, .L4
bl __printf_chk
mov r0, #0
add sp, sp, #12
@ sp needed
ldr pc, [sp], #4
.L5:
.align 2
.L4:
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "998772.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "998772.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "998780.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC4:
.string "O valor de PI \303\251: %f\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov rdx, QWORD PTR num_passos[rip]
pxor xmm0, xmm0
pxor xmm1, xmm1
movsd xmm4, QWORD PTR .LC1[rip]
cvtsi2sd xmm0, rdx
movapd xmm3, xmm4
divsd xmm3, xmm0
movsd QWORD PTR passo[rip], xmm3
test rdx, rdx
jle .L2
movsd xmm6, QWORD PTR .LC2[rip]
movsd xmm5, QWORD PTR .LC3[rip]
xor eax, eax
.p2align 4,,10
.p2align 3
.L3:
pxor xmm0, xmm0
movapd xmm2, xmm5
cvtsi2sd xmm0, rax
add rax, 1
addsd xmm0, xmm6
mulsd xmm0, xmm3
mulsd xmm0, xmm0
addsd xmm0, xmm4
divsd xmm2, xmm0
addsd xmm1, xmm2
cmp rdx, rax
jne .L3
.L2:
mulsd xmm3, xmm1
lea rdi, .LC4[rip]
mov eax, 1
movapd xmm0, xmm3
call printf@PLT
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.globl passo
.bss
.align 8
.type passo, @object
.size passo, 8
passo:
.zero 8
.globl num_passos
.data
.align 8
.type num_passos, @object
.size num_passos, 8
num_passos:
.quad 10000000000
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC1:
.long 0
.long 1072693248
.align 8
.LC2:
.long 0
.long 1071644672
.align 8
.LC3:
.long 0
.long 1074790400
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "998780.c"
.text
.global __aeabi_l2d
.global __aeabi_ddiv
.global __aeabi_dadd
.global __aeabi_dmul
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "O valor de PI \303\251: %f\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L8
sub sp, sp, #12
ldmia r3, {r4-r5}
mov r0, r4
mov r1, r5
stm sp, {r4-r5}
bl __aeabi_l2d
mov r3, r1
mov r2, r0
ldr r1, .L8+4
mov r0, #0
bl __aeabi_ddiv
mov r6, r0
mov r7, r1
cmp r4, #1
sbcs r3, r5, #0
ldr r3, .L8+8
mov r8, #0
mov r9, #0
stm r3, {r6-r7}
blt .L2
mov r4, #0
mov r5, #0
mov r10, #0
ldr fp, .L8+12
.L3:
mov r0, r4
mov r1, r5
bl __aeabi_l2d
mov r2, r10
mov r3, fp
bl __aeabi_dadd
mov r2, r6
mov r3, r7
bl __aeabi_dmul
mov r2, r0
mov r3, r1
bl __aeabi_dmul
mov r2, #0
ldr r3, .L8+4
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L8+16
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dadd
ldmia sp, {r2-r3}
adds r4, r4, #1
adc r5, r5, #0
cmp r3, r5
cmpeq r2, r4
mov r8, r0
mov r9, r1
bne .L3
.L2:
mov r2, r8
mov r3, r9
mov r0, r6
mov r1, r7
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldr r0, .L8+20
bl printf
mov r0, #0
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L9:
.align 2
.L8:
.word .LANCHOR0
.word 1072693248
.word passo
.word 1071644672
.word 1074790400
.word .LC0
.size main, .-main
.comm passo,8,8
.global num_passos
.data
.align 3
.set .LANCHOR0,. + 0
.type num_passos, %object
.size num_passos, 8
num_passos:
.word 1410065408
.word 2
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99880.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "\n\tc = %d s = %d u = %d\n\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov ecx, -1
mov edx, -1
xor eax, eax
mov r8d, 255
lea rsi, .LC0[rip]
mov edi, 1
call __printf_chk@PLT
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE39:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99880.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "\012\011c = %d s = %d u = %d\012\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r2, #255
str lr, [sp, #-4]!
sub sp, sp, #12
mvn r3, #0
ldr r1, .L4
str r2, [sp]
mov r0, #1
bl __printf_chk
mov r0, #0
add sp, sp, #12
@ sp needed
ldr pc, [sp], #4
.L5:
.align 2
.L4:
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "998802.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
xor r12d, r12d
jmp .L2
.p2align 4,,10
.p2align 3
.L4:
cmp eax, 10
sete al
movzx eax, al
add r12d, eax
.L2:
mov rdi, QWORD PTR stdin[rip]
call getc@PLT
cmp eax, -1
jne .L4
mov edx, r12d
lea rsi, .LC0[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
xor eax, eax
pop r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "998802.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r5, #0
ldr r4, .L7
b .L2
.L4:
cmp r0, #10
addeq r5, r5, #1
.L2:
ldr r0, [r4]
bl getc
cmn r0, #1
bne .L4
mov r2, r5
ldr r1, .L7+4
mov r0, #1
bl __printf_chk
mov r0, #0
pop {r4, r5, r6, pc}
.L8:
.align 2
.L7:
.word stdin
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99881.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%x: %d\n"
.text
.p2align 4
.globl doit
.type doit, @function
doit:
.LFB41:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
lea r13, .LC0[rip]
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 8
.cfi_def_cfa_offset 48
call pthread_self@PLT
mov ebp, DWORD PTR counter[rip]
mov r12d, eax
lea ebx, 1[rbp]
add ebp, 5001
.p2align 4,,10
.p2align 3
.L2:
mov ecx, ebx
mov edx, r12d
mov rsi, r13
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov DWORD PTR counter[rip], ebx
add ebx, 1
cmp ebx, ebp
jne .L2
add rsp, 8
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE41:
.size doit, .-doit
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB40:
.cfi_startproc
endbr64
sub rsp, 40
.cfi_def_cfa_offset 48
xor ecx, ecx
lea rdx, doit[rip]
xor esi, esi
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
lea rdi, 8[rsp]
call pthread_create@PLT
xor ecx, ecx
xor esi, esi
lea rdi, 16[rsp]
lea rdx, doit[rip]
call pthread_create@PLT
mov rdi, QWORD PTR 8[rsp]
xor esi, esi
call pthread_join@PLT
mov rdi, QWORD PTR 16[rsp]
xor esi, esi
call pthread_join@PLT
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L9
xor eax, eax
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE40:
.size main, .-main
.globl counter
.bss
.align 4
.type counter, @object
.size counter, 4
counter:
.zero 4
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99881.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%x: %d\012\000"
.text
.align 2
.global doit
.syntax unified
.arm
.fpu softvfp
.type doit, %function
doit:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
bl pthread_self
mov r6, r0
ldr r7, .L6
ldr r8, .L6+4
ldr r4, [r7]
add r5, r4, #4992
add r5, r5, #9
add r4, r4, #1
.L2:
mov r3, r4
mov r2, r6
mov r1, r8
mov r0, #1
bl __printf_chk
str r4, [r7]
add r4, r4, #1
cmp r4, r5
bne .L2
mov r0, #0
pop {r4, r5, r6, r7, r8, pc}
.L7:
.align 2
.L6:
.word counter
.word .LC0
.size doit, .-doit
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC1:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
mov r3, #0
str lr, [sp, #-4]!
ldr ip, .L12
sub sp, sp, #20
mov r1, r3
ldr r2, .L12+4
add r0, sp, #4
ldr ip, [ip]
str ip, [sp, #12]
mov ip,#0
bl pthread_create
mov r3, #0
ldr r2, .L12+4
mov r1, r3
add r0, sp, #8
bl pthread_create
mov r1, #0
ldr r0, [sp, #4]
bl pthread_join
mov r1, #0
ldr r0, [sp, #8]
bl pthread_join
ldr r3, .L12
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L11
mov r0, #0
add sp, sp, #20
@ sp needed
ldr pc, [sp], #4
.L11:
bl __stack_chk_fail
.L13:
.align 2
.L12:
.word .LC1
.word doit
.size main, .-main
.comm counter,4,4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "998818.c"
.intel_syntax noprefix
.text
.p2align 4
.globl parse_long
.type parse_long, @function
parse_long:
.LFB16:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov r12, rsi
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
mov rbx, rdi
sub rsp, 16
.cfi_def_cfa_offset 48
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
mov QWORD PTR [rsp], 0
call __errno_location@PLT
xor edx, edx
mov rsi, rsp
mov rdi, rbx
mov DWORD PTR [rax], 0
mov rbp, rax
call strtol@PLT
mov rdx, QWORD PTR [rsp]
xor r8d, r8d
cmp rdx, rbx
je .L1
cmp DWORD PTR 0[rbp], 34
je .L1
cmp BYTE PTR [rdx], 0
jne .L1
mov QWORD PTR [r12], rax
mov r8d, 1
.L1:
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L9
add rsp, 16
.cfi_remember_state
.cfi_def_cfa_offset 32
mov eax, r8d
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE16:
.size parse_long, .-parse_long
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "998818.c"
.text
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global parse_long
.syntax unified
.arm
.fpu softvfp
.type parse_long, %function
parse_long:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
mov r4, #0
ldr r3, .L10
sub sp, sp, #12
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
mov r5, r0
mov r7, r1
str r4, [sp]
bl __errno_location
mov r6, r0
mov r2, r4
mov r0, r5
mov r1, sp
str r4, [r6]
bl strtol
ldr r3, [sp]
cmp r3, r5
beq .L6
ldr r2, [r6]
cmp r2, #34
beq .L6
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, r4
streq r0, [r7]
moveq r0, #1
beq .L1
.L6:
mov r0, r4
.L1:
ldr r3, .L10
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L9
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, pc}
.L9:
bl __stack_chk_fail
.L11:
.align 2
.L10:
.word .LC0
.size parse_long, .-parse_long
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99882.c"
.intel_syntax noprefix
.text
.p2align 4
.globl liveinfo_send
.type liveinfo_send, @function
liveinfo_send:
.LFB56:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov rbp, rdi
sub rsp, 136
.cfi_def_cfa_offset 160
movdqa xmm0, XMMWORD PTR .LC0[rip]
mov edx, DWORD PTR init.1[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 120[rsp], rax
xor eax, eax
mov eax, 1
mov DWORD PTR 106[rsp], 0
movups XMMWORD PTR 2[rsp], xmm0
pxor xmm0, xmm0
mov WORD PTR [rsp], ax
mov QWORD PTR 98[rsp], 0
movups XMMWORD PTR 18[rsp], xmm0
movups XMMWORD PTR 34[rsp], xmm0
movups XMMWORD PTR 50[rsp], xmm0
movups XMMWORD PTR 66[rsp], xmm0
movups XMMWORD PTR 82[rsp], xmm0
test edx, edx
je .L10
mov r12d, DWORD PTR sock.0[rip]
cmp r12d, -1
je .L1
call strlen@PLT
mov edi, r12d
mov r9d, 110
xor ecx, ecx
mov rdx, rax
mov r8, rsp
mov rsi, rbp
xor r12d, r12d
call sendto@PLT
.L1:
mov rax, QWORD PTR 120[rsp]
sub rax, QWORD PTR fs:40
jne .L11
add rsp, 136
.cfi_remember_state
.cfi_def_cfa_offset 24
mov eax, r12d
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L10:
.cfi_restore_state
xor edx, edx
mov esi, 2
mov edi, 1
mov DWORD PTR init.1[rip], 1
call socket@PLT
mov rdi, rbp
mov r12d, eax
mov DWORD PTR sock.0[rip], eax
call strlen@PLT
mov rsi, rbp
mov edi, r12d
mov r8, rsp
mov rdx, rax
mov r9d, 110
xor ecx, ecx
call sendto@PLT
mov edi, DWORD PTR sock.0[rip]
mov edx, 2048
mov esi, 4
mov r12d, eax
xor eax, eax
call fcntl@PLT
jmp .L1
.L11:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE56:
.size liveinfo_send, .-liveinfo_send
.local sock.0
.comm sock.0,4,4
.local init.1
.comm init.1,4,4
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC0:
.quad 7380952723806055424
.quad 111
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99882.c"
.text
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC1:
.word __stack_chk_guard
.text
.align 2
.global liveinfo_send
.syntax unified
.arm
.fpu softvfp
.type liveinfo_send, %function
liveinfo_send:
@ args = 0, pretend = 0, frame = 120
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
mov r7, #110
sub sp, sp, #128
ldr r3, .L12
ldr r6, .L12+4
mov r4, r0
mov r2, r7
ldr r1, .L12+8
add r0, sp, #12
ldr r3, [r3]
str r3, [sp, #124]
mov r3,#0
bl memcpy
ldr r5, [r6]
cmp r5, #0
beq .L10
ldr r5, [r6, #4]
cmn r5, #1
beq .L1
mov r0, r4
bl strlen
add r3, sp, #12
mov r2, r0
str r3, [sp]
mov r0, r5
mov r1, r4
mov r3, #0
str r7, [sp, #4]
bl sendto
mov r5, #0
.L1:
ldr r3, .L12
ldr r2, [r3]
ldr r3, [sp, #124]
eors r2, r3, r2
mov r3, #0
bne .L11
mov r0, r5
add sp, sp, #128
@ sp needed
pop {r4, r5, r6, r7, r8, pc}
.L10:
mov r0, #1
mov r2, r5
mov r1, #2
str r0, [r6]
bl socket
mov r8, r0
mov r0, r4
str r8, [r6, #4]
bl strlen
add r3, sp, #12
mov r2, r0
mov r1, r4
str r3, [sp]
mov r0, r8
mov r3, r5
str r7, [sp, #4]
bl sendto
mov r2, #2048
mov r5, r0
mov r1, #4
ldr r0, [r6, #4]
bl fcntl
b .L1
.L11:
bl __stack_chk_fail
.L13:
.align 2
.L12:
.word .LC1
.word .LANCHOR1
.word .LANCHOR0
.size liveinfo_send, .-liveinfo_send
.section .rodata
.align 2
.set .LANCHOR0,. + 0
.LC0:
.short 1
.ascii "\000liveinfo\000"
.space 98
.bss
.align 2
.set .LANCHOR1,. + 0
.type init.6345, %object
.size init.6345, 4
init.6345:
.space 4
.type sock.6346, %object
.size sock.6346, 4
sock.6346:
.space 4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "998820.c"
.intel_syntax noprefix
.text
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "dec = %d, octal = %o, hex = %x\n"
.align 8
.LC1:
.string "dec = %d, octal = %#o, hex = %#x\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov ecx, 100
mov edx, 100
xor eax, eax
mov r8d, 100
lea rsi, .LC0[rip]
mov edi, 1
call __printf_chk@PLT
mov r8d, 100
xor eax, eax
mov ecx, 100
mov edx, 100
lea rsi, .LC1[rip]
mov edi, 1
call __printf_chk@PLT
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "998820.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "dec = %d, octal = %o, hex = %x\012\000"
.align 2
.LC1:
.ascii "dec = %d, octal = %#o, hex = %#x\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, #100
sub sp, sp, #8
mov r3, r4
mov r2, r4
ldr r1, .L4
str r4, [sp]
mov r0, #1
bl __printf_chk
mov r3, r4
mov r2, r4
ldr r1, .L4+4
str r4, [sp]
mov r0, #1
bl __printf_chk
mov r0, #0
add sp, sp, #8
@ sp needed
pop {r4, pc}
.L5:
.align 2
.L4:
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "998821.c"
.intel_syntax noprefix
.text
.p2align 4
.globl execve
.type execve, @function
execve:
.LFB11:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov rcx, rdx
xor eax, eax
mov rdx, rsi
mov rsi, rdi
mov edi, 59
call syscall@PLT
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE11:
.size execve, .-execve
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "998821.c"
.text
.align 2
.global execve
.syntax unified
.arm
.fpu softvfp
.type execve, %function
execve:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov ip, r1
mov r3, r2
mov r1, r0
mov r2, ip
mov r0, #11
b syscall
.size execve, .-execve
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "998828.c"
.intel_syntax noprefix
.text
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Listing prime numbers up to %d:\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%d "
.LC2:
.string "\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
mov edx, 1000
lea rsi, .LC0[rip]
xor eax, eax
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov edi, 1
mov r12d, 2
lea r13, .LC1[rip]
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
mov ebp, 3
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 8
.cfi_def_cfa_offset 48
call __printf_chk@PLT
.p2align 4,,10
.p2align 3
.L2:
mov ebx, 2
jmp .L6
.p2align 4,,10
.p2align 3
.L3:
mov eax, r12d
cdq
idiv ebx
test edx, edx
je .L7
add ebx, 1
cmp ebx, ebp
je .L7
.L6:
cmp r12d, ebx
jne .L3
mov edx, r12d
mov rsi, r13
mov edi, 1
xor eax, eax
call __printf_chk@PLT
add ebx, 1
cmp ebx, ebp
jne .L6
.p2align 4,,10
.p2align 3
.L7:
add r12d, 1
add ebp, 1
cmp r12d, 1001
jne .L2
lea rdi, .LC2[rip]
call puts@PLT
add rsp, 8
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "998828.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Listing prime numbers up to %d:\012\000"
.align 2
.LC1:
.ascii "%d \000"
.global __aeabi_uidivmod
.global __aeabi_idivmod
.align 2
.LC2:
.ascii "\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
mov r2, #1000
mov r0, #1
ldr r1, .L13
bl __printf_chk
mov r6, #3
mov r5, #2
ldr r7, .L13+4
ldr r8, .L13+8
.L2:
mov r4, #2
b .L6
.L3:
mov r1, r4
mov r0, r5
bl __aeabi_idivmod
cmp r1, #0
beq .L7
add r4, r4, #1
cmp r4, r6
beq .L7
.L6:
cmp r5, r4
bne .L3
mov r2, r5
mov r1, r7
mov r0, #1
add r4, r4, #1
bl __printf_chk
cmp r4, r6
bne .L6
.L7:
add r5, r5, #1
cmp r5, r8
add r6, r6, #1
bne .L2
ldr r0, .L13+12
bl puts
mov r0, #0
pop {r4, r5, r6, r7, r8, pc}
.L14:
.align 2
.L13:
.word .LC0
.word .LC1
.word 1001
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99885.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "the_stack_data/99885.c"
.LC1:
.string "err >= 0"
.LC2:
.string "%s %s %s %s %s\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
sub rsp, 400
.cfi_def_cfa_offset 416
mov rax, QWORD PTR fs:40
mov QWORD PTR 392[rsp], rax
xor eax, eax
mov r12, rsp
mov rdi, r12
call uname@PLT
test eax, eax
js .L6
lea rcx, 65[rsp]
sub rsp, 8
.cfi_def_cfa_offset 424
mov rdx, r12
mov edi, 1
lea rax, 268[rsp]
lea rsi, .LC2[rip]
push rax
.cfi_def_cfa_offset 432
xor eax, eax
lea r9, 211[rsp]
lea r8, 146[rsp]
call __printf_chk@PLT
pop rax
.cfi_def_cfa_offset 424
pop rdx
.cfi_def_cfa_offset 416
mov rax, QWORD PTR 392[rsp]
sub rax, QWORD PTR fs:40
jne .L7
add rsp, 400
.cfi_remember_state
.cfi_def_cfa_offset 16
xor eax, eax
pop r12
.cfi_def_cfa_offset 8
ret
.L6:
.cfi_restore_state
lea rcx, __PRETTY_FUNCTION__.0[rip]
mov edx, 10
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.L7:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.section .rodata
.type __PRETTY_FUNCTION__.0, @object
.size __PRETTY_FUNCTION__.0, 5
__PRETTY_FUNCTION__.0:
.string "main"
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99885.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "the_stack_data/99885.c\000"
.align 2
.LC1:
.ascii "err >= 0\000"
.align 2
.LC2:
.ascii "%s %s %s %s %s\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC3:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 400
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr r3, .L8
sub sp, sp, #420
add r0, sp, #20
ldr r3, [r3]
str r3, [sp, #412]
mov r3,#0
bl uname
cmp r0, #0
blt .L6
add r1, sp, #280
add r2, sp, #215
add r3, sp, #150
str r1, [sp, #8]
str r2, [sp, #4]
str r3, [sp]
add r2, sp, #20
add r3, sp, #85
mov r0, #1
ldr r1, .L8+4
bl __printf_chk
ldr r3, .L8
ldr r2, [r3]
ldr r3, [sp, #412]
eors r2, r3, r2
mov r3, #0
bne .L7
mov r0, #0
add sp, sp, #420
@ sp needed
ldr pc, [sp], #4
.L6:
mov r2, #10
ldr r3, .L8+8
ldr r1, .L8+12
ldr r0, .L8+16
bl __assert_fail
.L7:
bl __stack_chk_fail
.L9:
.align 2
.L8:
.word .LC3
.word .LC2
.word .LANCHOR0
.word .LC0
.word .LC1
.size main, .-main
.section .rodata
.align 2
.set .LANCHOR0,. + 0
.type __PRETTY_FUNCTION__.4822, %object
.size __PRETTY_FUNCTION__.4822, 5
__PRETTY_FUNCTION__.4822:
.ascii "main\000"
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "998850.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
xor eax, eax
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "998850.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #0
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99888.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d%d"
.LC1:
.string "%d"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "you are so fucking stupid just get out,please!"
.section .rodata.str1.1
.LC3:
.string "pause"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
lea rdi, .LC0[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
lea rdx, 4[rsp]
mov rsi, rsp
call __isoc99_scanf@PLT
mov edx, DWORD PTR 4[rsp]
add edx, DWORD PTR [rsp]
test edx, edx
jle .L2
lea rsi, .LC1[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
.L3:
lea rdi, .LC3[rip]
call system@PLT
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L7
xor eax, eax
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L2:
.cfi_restore_state
lea rsi, .LC2[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L3
.L7:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE39:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99888.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d%d\000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "you are so fucking stupid just get out,please!\000"
.align 2
.LC3:
.ascii "pause\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC4:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr r3, .L8
sub sp, sp, #20
add r2, sp, #8
ldr r0, .L8+4
add r1, sp, #4
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
bl __isoc99_scanf
ldmib sp, {r2, r3}
add r2, r2, r3
cmp r2, #0
ble .L2
mov r0, #1
ldr r1, .L8+8
bl __printf_chk
.L3:
ldr r0, .L8+12
bl system
ldr r3, .L8
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L7
mov r0, #0
add sp, sp, #20
@ sp needed
ldr pc, [sp], #4
.L2:
ldr r1, .L8+16
mov r0, #1
bl __printf_chk
b .L3
.L7:
bl __stack_chk_fail
.L9:
.align 2
.L8:
.word .LC4
.word .LC0
.word .LC1
.word .LC3
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99889.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB27:
.cfi_startproc
endbr64
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
sub rsp, 24
.cfi_def_cfa_offset 32
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
lea eax, -1[rdi]
cmp eax, 1
jbe .L2
cmp edi, 3
je .L11
.L3:
mov edi, 101
call exit@PLT
.L2:
xor edi, edi
lea rsi, 7[rsp]
mov edx, 1
call read@PLT
test eax, eax
je .L9
jg .L3
mov edi, 102
call exit@PLT
.L11:
mov rdi, QWORD PTR 8[rsi]
mov edx, 10
xor esi, esi
call strtol@PLT
cmp eax, -1
je .L2
mov edi, eax
call sleep@PLT
.L9:
xor edi, edi
call exit@PLT
.cfi_endproc
.LFE27:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99889.c"
.text
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC0:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
sub r3, r0, #1
cmp r3, #1
ldr r3, .L15
sub sp, sp, #12
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
bls .L2
cmp r0, #3
beq .L14
.L3:
mov r0, #101
bl exit
.L2:
mov r2, #1
mov r1, sp
mov r0, #0
bl read
cmp r0, #0
beq .L12
bgt .L3
mov r0, #102
.L12:
bl exit
.L14:
ldr r0, [r1, #4]
mov r2, #10
mov r1, #0
bl strtol
cmn r0, #1
beq .L2
bl sleep
mov r0, #0
bl exit
.L16:
.align 2
.L15:
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "9989.c"
.intel_syntax noprefix
.text
.p2align 4
.globl __VERIFIER_nondet_bool
.type __VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
call __VERIFIER_nondet_int@PLT
test eax, eax
setne al
add rsp, 8
.cfi_def_cfa_offset 8
movzx eax, al
ret
.cfi_endproc
.LFE0:
.size __VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 376
.cfi_def_cfa_offset 432
call __VERIFIER_nondet_int@PLT
mov r14d, eax
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 224[rsp], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
mov ebx, eax
setne al
movzx eax, al
mov DWORD PTR 12[rsp], eax
call __VERIFIER_nondet_int@PLT
test eax, eax
mov ebp, eax
setne al
movzx eax, al
mov DWORD PTR 32[rsp], eax
call __VERIFIER_nondet_int@PLT
test eax, eax
mov r13d, eax
setne al
movzx eax, al
mov DWORD PTR 232[rsp], eax
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 184[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 240[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 192[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 248[rsp], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
mov r12d, eax
setne al
movzx eax, al
mov DWORD PTR 236[rsp], eax
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 144[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 160[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 256[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 208[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 264[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 200[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 272[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 16[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 280[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 216[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 288[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 296[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 304[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 312[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 320[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 168[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 328[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 176[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 152[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 336[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 344[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 352[rsp], xmm0
call __VERIFIER_nondet_float@PLT
pxor xmm1, xmm1
movsd xmm2, QWORD PTR .LC0[rip]
movss DWORD PTR 356[rsp], xmm0
pxor xmm0, xmm0
cvtss2sd xmm1, DWORD PTR 144[rsp]
cvtss2sd xmm0, DWORD PTR 160[rsp]
subsd xmm0, xmm1
comisd xmm2, xmm0
jnb .L5
test r12d, r12d
je .L968
.L5:
or ebp, ebx
jne .L900
test r14d, r14d
js .L900
mov ebx, r14d
.p2align 4,,10
.p2align 3
.L439:
mov eax, DWORD PTR 12[rsp]
sub ebx, 1
and eax, DWORD PTR 32[rsp]
mov DWORD PTR 360[rsp], eax
jne .L969
.L9:
call __VERIFIER_nondet_float@PLT
xor r12d, r12d
movss DWORD PTR 36[rsp], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne r12b
xor r14d, r14d
call __VERIFIER_nondet_int@PLT
test eax, eax
mov ebp, eax
setne r14b
xor r15d, r15d
call __VERIFIER_nondet_int@PLT
test eax, eax
mov r13d, eax
setne r15b
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 40[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 44[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 48[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 52[rsp], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
mov DWORD PTR 364[rsp], eax
setne al
movzx eax, al
mov DWORD PTR 140[rsp], eax
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 56[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 60[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 64[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 68[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 72[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 76[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 80[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 84[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 88[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 92[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 96[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 100[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 104[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 108[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 112[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 116[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 120[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 124[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 128[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 24[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 132[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 136[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss xmm15, DWORD PTR 24[rsp]
pxor xmm2, xmm2
movsd xmm7, QWORD PTR .LC2[rip]
movaps xmm1, xmm0
pxor xmm0, xmm0
cvtss2sd xmm0, DWORD PTR 16[rsp]
movapd xmm3, xmm0
cvtss2sd xmm2, xmm15
subsd xmm3, xmm2
comisd xmm7, xmm3
jb .L900
pxor xmm12, xmm12
movsd xmm5, QWORD PTR .LC3[rip]
cvtss2sd xmm12, DWORD PTR 144[rsp]
movapd xmm4, xmm12
subsd xmm4, xmm2
comisd xmm5, xmm4
jb .L900
pxor xmm13, xmm13
movsd xmm6, QWORD PTR .LC4[rip]
cvtss2sd xmm13, DWORD PTR 152[rsp]
movapd xmm5, xmm13
subsd xmm5, xmm2
comisd xmm6, xmm5
jb .L900
pxor xmm11, xmm11
movsd xmm7, QWORD PTR .LC5[rip]
cvtss2sd xmm11, DWORD PTR 168[rsp]
movapd xmm6, xmm11
subsd xmm6, xmm2
comisd xmm7, xmm6
jb .L900
movsd xmm10, QWORD PTR .LC3[rip]
pxor xmm14, xmm14
cvtss2sd xmm14, DWORD PTR 176[rsp]
movapd xmm7, xmm14
subsd xmm7, xmm2
comisd xmm10, xmm7
jb .L900
movsd xmm10, QWORD PTR .LC6[rip]
pxor xmm9, xmm9
cvtss2sd xmm9, DWORD PTR 200[rsp]
movapd xmm8, xmm9
movq rsi, xmm9
subsd xmm8, xmm2
comisd xmm10, xmm8
jb .L900
movsd xmm10, QWORD PTR .LC7[rip]
pxor xmm9, xmm9
cvtss2sd xmm9, DWORD PTR 208[rsp]
movq rcx, xmm9
subsd xmm9, xmm2
movsd QWORD PTR 176[rsp], xmm9
comisd xmm10, xmm9
jb .L900
movsd xmm9, QWORD PTR .LC8[rip]
pxor xmm10, xmm10
cvtss2sd xmm10, DWORD PTR 216[rsp]
movsd QWORD PTR 16[rsp], xmm10
subsd xmm10, xmm2
movsd QWORD PTR 200[rsp], xmm10
comisd xmm9, xmm10
jb .L900
movsd xmm10, QWORD PTR .LC9[rip]
pxor xmm9, xmm9
cvtss2sd xmm9, DWORD PTR 224[rsp]
movq r11, xmm9
subsd xmm9, xmm2
movsd QWORD PTR 208[rsp], xmm9
comisd xmm10, xmm9
jb .L900
movsd xmm9, QWORD PTR .LC9[rip]
pxor xmm10, xmm10
cvtss2sd xmm10, DWORD PTR 192[rsp]
movsd QWORD PTR 24[rsp], xmm10
subsd xmm10, xmm2
movsd QWORD PTR 192[rsp], xmm10
comisd xmm9, xmm10
jb .L900
movsd xmm9, QWORD PTR .LC1[rip]
pxor xmm10, xmm10
cvtss2sd xmm10, DWORD PTR 288[rsp]
movsd QWORD PTR 144[rsp], xmm10
subsd xmm10, xmm2
movsd QWORD PTR 216[rsp], xmm10
comisd xmm9, xmm10
jb .L900
movsd xmm9, QWORD PTR .LC8[rip]
pxor xmm10, xmm10
cvtss2sd xmm10, DWORD PTR 280[rsp]
movsd QWORD PTR 152[rsp], xmm10
subsd xmm10, xmm2
movsd QWORD PTR 224[rsp], xmm10
comisd xmm9, xmm10
jb .L900
movsd xmm9, QWORD PTR .LC4[rip]
pxor xmm10, xmm10
cvtss2sd xmm10, DWORD PTR 160[rsp]
movsd QWORD PTR 160[rsp], xmm10
subsd xmm10, xmm2
movsd QWORD PTR 280[rsp], xmm10
comisd xmm9, xmm10
jb .L900
movsd xmm9, QWORD PTR .LC10[rip]
pxor xmm10, xmm10
cvtss2sd xmm10, DWORD PTR 352[rsp]
movsd QWORD PTR 168[rsp], xmm10
subsd xmm10, xmm2
comisd xmm9, xmm10
movapd xmm2, xmm10
jb .L900
ucomisd xmm4, QWORD PTR .LC3[rip]
mov r9d, 0
movsd xmm9, QWORD PTR 208[rsp]
movsd xmm10, QWORD PTR 192[rsp]
mov eax, DWORD PTR 364[rsp]
setnp r8b
cmovne r8d, r9d
ucomisd xmm3, QWORD PTR .LC2[rip]
movsd xmm3, QWORD PTR 216[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm5, QWORD PTR .LC4[rip]
movsd xmm5, QWORD PTR 176[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm6, QWORD PTR .LC5[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm7, QWORD PTR .LC3[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm8, QWORD PTR .LC6[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm5, QWORD PTR .LC7[rip]
movsd xmm5, QWORD PTR 200[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm5, QWORD PTR .LC8[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm9, QWORD PTR .LC9[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm10, QWORD PTR .LC9[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm3, QWORD PTR .LC1[rip]
movsd xmm3, QWORD PTR 224[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm3, QWORD PTR .LC8[rip]
movsd xmm3, QWORD PTR 280[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm3, QWORD PTR .LC4[rip]
setnp dil
cmovne edi, r9d
or dil, r8b
jne .L462
ucomisd xmm2, QWORD PTR .LC10[rip]
setnp r8b
cmove edi, r8d
test dil, dil
je .L900
.L462:
pxor xmm3, xmm3
movsd xmm2, QWORD PTR .LC11[rip]
cvtss2sd xmm3, DWORD PTR 356[rsp]
movapd xmm5, xmm3
movsd QWORD PTR 176[rsp], xmm3
pxor xmm3, xmm3
cvtss2sd xmm3, DWORD PTR 52[rsp]
subsd xmm5, xmm3
movsd QWORD PTR 200[rsp], xmm5
comisd xmm2, xmm5
jb .L900
movapd xmm4, xmm0
movsd xmm2, QWORD PTR .LC10[rip]
subsd xmm4, xmm3
movsd QWORD PTR 216[rsp], xmm4
comisd xmm2, xmm4
jb .L900
movapd xmm6, xmm13
movsd xmm2, QWORD PTR .LC12[rip]
subsd xmm6, xmm3
comisd xmm2, xmm6
jb .L900
movapd xmm7, xmm14
movsd xmm2, QWORD PTR .LC13[rip]
subsd xmm7, xmm3
comisd xmm2, xmm7
jb .L900
pxor xmm2, xmm2
cvtss2sd xmm2, DWORD PTR 184[rsp]
movsd QWORD PTR 184[rsp], xmm2
subsd xmm2, xmm3
movapd xmm8, xmm2
movsd xmm2, QWORD PTR .LC14[rip]
comisd xmm2, xmm8
jb .L900
pxor xmm4, xmm4
movsd xmm2, QWORD PTR .LC4[rip]
cvtss2sd xmm4, DWORD PTR 296[rsp]
movsd QWORD PTR 288[rsp], xmm4
subsd xmm4, xmm3
comisd xmm2, xmm4
movapd xmm9, xmm4
jb .L900
movsd xmm10, QWORD PTR 16[rsp]
movsd xmm2, QWORD PTR .LC5[rip]
subsd xmm10, xmm3
comisd xmm2, xmm10
jb .L900
pxor xmm2, xmm2
movsd xmm4, QWORD PTR .LC15[rip]
cvtss2sd xmm2, DWORD PTR 240[rsp]
movsd QWORD PTR 240[rsp], xmm2
subsd xmm2, xmm3
movsd QWORD PTR 224[rsp], xmm2
comisd xmm4, xmm2
jb .L900
pxor xmm2, xmm2
movsd xmm4, QWORD PTR .LC6[rip]
cvtss2sd xmm2, DWORD PTR 320[rsp]
movsd QWORD PTR 280[rsp], xmm2
subsd xmm2, xmm3
movsd QWORD PTR 296[rsp], xmm2
comisd xmm4, xmm2
jb .L900
pxor xmm2, xmm2
movsd xmm4, QWORD PTR .LC12[rip]
cvtss2sd xmm2, DWORD PTR 312[rsp]
movsd QWORD PTR 208[rsp], xmm2
subsd xmm2, xmm3
movsd QWORD PTR 312[rsp], xmm2
comisd xmm4, xmm2
jb .L900
movsd xmm2, QWORD PTR 152[rsp]
movsd xmm4, QWORD PTR .LC3[rip]
subsd xmm2, xmm3
movsd QWORD PTR 320[rsp], xmm2
comisd xmm4, xmm2
jb .L900
pxor xmm4, xmm4
cvtss2sd xmm4, DWORD PTR 272[rsp]
movsd QWORD PTR 192[rsp], xmm4
subsd xmm4, xmm3
movapd xmm2, xmm4
movsd xmm4, QWORD PTR .LC7[rip]
comisd xmm4, xmm2
jb .L900
pxor xmm4, xmm4
movsd xmm5, QWORD PTR .LC16[rip]
cvtss2sd xmm4, DWORD PTR 336[rsp]
movq r10, xmm4
subsd xmm4, xmm3
movsd QWORD PTR 272[rsp], xmm4
comisd xmm5, xmm4
jb .L900
movsd xmm4, QWORD PTR 160[rsp]
subsd xmm4, xmm3
movsd QWORD PTR 336[rsp], xmm4
comisd xmm5, xmm4
jb .L900
movsd xmm5, QWORD PTR 216[rsp]
mov r9d, 0
ucomisd xmm5, QWORD PTR .LC10[rip]
movsd xmm5, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR 224[rsp]
movsd xmm4, QWORD PTR 272[rsp]
setnp r8b
cmovne r8d, r9d
ucomisd xmm5, QWORD PTR .LC11[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm6, QWORD PTR .LC12[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm7, QWORD PTR .LC13[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm8, QWORD PTR .LC14[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm9, QWORD PTR .LC4[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm10, QWORD PTR .LC5[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm3, QWORD PTR .LC15[rip]
movsd xmm3, QWORD PTR 296[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm3, QWORD PTR .LC6[rip]
movsd xmm3, QWORD PTR 312[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm3, QWORD PTR .LC12[rip]
movsd xmm3, QWORD PTR 320[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm3, QWORD PTR .LC3[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm2, QWORD PTR .LC7[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm4, QWORD PTR .LC16[rip]
setnp dil
cmovne edi, r9d
or dil, r8b
jne .L477
movsd xmm3, QWORD PTR 336[rsp]
ucomisd xmm3, QWORD PTR .LC16[rip]
setnp r8b
cmove edi, r8d
test dil, dil
je .L900
.L477:
movsd xmm5, QWORD PTR 176[rsp]
pxor xmm3, xmm3
movsd xmm2, QWORD PTR .LC13[rip]
cvtss2sd xmm3, DWORD PTR 60[rsp]
subsd xmm5, xmm3
comisd xmm2, xmm5
jb .L900
pxor xmm2, xmm2
cvtss2sd xmm2, DWORD PTR 344[rsp]
movsd QWORD PTR 216[rsp], xmm2
subsd xmm2, xmm3
movapd xmm4, xmm2
movsd xmm2, QWORD PTR .LC4[rip]
movsd QWORD PTR 224[rsp], xmm4
comisd xmm2, xmm4
jb .L900
movapd xmm6, xmm0
movsd xmm2, QWORD PTR .LC2[rip]
subsd xmm6, xmm3
comisd xmm2, xmm6
jb .L900
movapd xmm7, xmm11
movsd xmm2, QWORD PTR .LC0[rip]
subsd xmm7, xmm3
comisd xmm2, xmm7
jb .L900
movq xmm8, rsi
movsd xmm2, QWORD PTR .LC9[rip]
subsd xmm8, xmm3
comisd xmm2, xmm8
jb .L900
pxor xmm2, xmm2
cvtss2sd xmm2, DWORD PTR 304[rsp]
movsd QWORD PTR 272[rsp], xmm2
subsd xmm2, xmm3
movapd xmm9, xmm2
movsd xmm2, QWORD PTR .LC7[rip]
comisd xmm2, xmm9
jb .L900
pxor xmm2, xmm2
cvtss2sd xmm2, DWORD PTR 328[rsp]
movsd QWORD PTR 200[rsp], xmm2
subsd xmm2, xmm3
movapd xmm10, xmm2
movsd xmm2, QWORD PTR .LC12[rip]
comisd xmm2, xmm10
jb .L900
movsd xmm2, QWORD PTR 184[rsp]
movsd xmm4, QWORD PTR .LC4[rip]
subsd xmm2, xmm3
movsd QWORD PTR 296[rsp], xmm2
comisd xmm4, xmm2
jb .L900
movsd xmm2, QWORD PTR 280[rsp]
movsd xmm4, QWORD PTR .LC12[rip]
subsd xmm2, xmm3
movsd QWORD PTR 304[rsp], xmm2
comisd xmm4, xmm2
jb .L900
movq xmm2, r11
movsd xmm4, QWORD PTR .LC17[rip]
subsd xmm2, xmm3
movsd QWORD PTR 312[rsp], xmm2
comisd xmm4, xmm2
jb .L900
movsd xmm2, QWORD PTR 144[rsp]
movsd xmm4, QWORD PTR .LC11[rip]
subsd xmm2, xmm3
movsd QWORD PTR 320[rsp], xmm2
comisd xmm4, xmm2
jb .L900
movsd xmm2, QWORD PTR 152[rsp]
movsd xmm4, QWORD PTR .LC6[rip]
subsd xmm2, xmm3
movsd QWORD PTR 328[rsp], xmm2
comisd xmm4, xmm2
jb .L900
movq xmm2, r10
movsd xmm4, QWORD PTR .LC12[rip]
subsd xmm2, xmm3
movsd QWORD PTR 336[rsp], xmm2
comisd xmm4, xmm2
jb .L900
pxor xmm2, xmm2
movsd xmm4, QWORD PTR .LC4[rip]
cvtss2sd xmm2, DWORD PTR 248[rsp]
movsd QWORD PTR 248[rsp], xmm2
subsd xmm2, xmm3
comisd xmm4, xmm2
jb .L900
movsd xmm4, QWORD PTR 224[rsp]
mov r9d, 0
ucomisd xmm4, QWORD PTR .LC4[rip]
movsd xmm3, QWORD PTR 296[rsp]
setnp r8b
cmovne r8d, r9d
ucomisd xmm5, QWORD PTR .LC13[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm6, QWORD PTR .LC2[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm7, QWORD PTR .LC0[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm8, QWORD PTR .LC9[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm9, QWORD PTR .LC7[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm10, QWORD PTR .LC12[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm3, QWORD PTR .LC4[rip]
movsd xmm3, QWORD PTR 304[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm3, QWORD PTR .LC12[rip]
movsd xmm3, QWORD PTR 312[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm3, QWORD PTR .LC17[rip]
movsd xmm3, QWORD PTR 320[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm3, QWORD PTR .LC11[rip]
movsd xmm3, QWORD PTR 328[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm3, QWORD PTR .LC6[rip]
movsd xmm3, QWORD PTR 336[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm3, QWORD PTR .LC12[rip]
setnp dil
cmovne edi, r9d
or dil, r8b
jne .L492
ucomisd xmm2, QWORD PTR .LC4[rip]
setnp r8b
cmove edi, r8d
test dil, dil
je .L900
.L492:
movsd xmm5, QWORD PTR 176[rsp]
pxor xmm3, xmm3
movsd xmm2, QWORD PTR .LC18[rip]
cvtss2sd xmm3, DWORD PTR 136[rsp]
subsd xmm5, xmm3
comisd xmm2, xmm5
jb .L900
movapd xmm4, xmm0
movsd xmm2, QWORD PTR .LC13[rip]
subsd xmm4, xmm3
comisd xmm2, xmm4
jb .L900
movapd xmm6, xmm13
movsd xmm2, QWORD PTR .LC0[rip]
subsd xmm6, xmm3
movsd QWORD PTR 296[rsp], xmm6
comisd xmm2, xmm6
jb .L900
movapd xmm7, xmm11
movsd xmm2, QWORD PTR .LC16[rip]
subsd xmm7, xmm3
movsd QWORD PTR 304[rsp], xmm7
comisd xmm2, xmm7
jb .L900
movapd xmm2, xmm14
subsd xmm2, xmm3
movapd xmm7, xmm2
movsd xmm2, QWORD PTR .LC8[rip]
comisd xmm2, xmm7
jb .L900
movsd xmm8, QWORD PTR 272[rsp]
movsd xmm2, QWORD PTR .LC11[rip]
subsd xmm8, xmm3
comisd xmm2, xmm8
jb .L900
movsd xmm9, QWORD PTR 184[rsp]
movsd xmm2, QWORD PTR .LC0[rip]
subsd xmm9, xmm3
comisd xmm2, xmm9
jb .L900
movsd xmm10, QWORD PTR 288[rsp]
movsd xmm2, QWORD PTR .LC15[rip]
subsd xmm10, xmm3
comisd xmm2, xmm10
jb .L900
movsd xmm2, QWORD PTR 240[rsp]
movsd xmm6, QWORD PTR .LC7[rip]
subsd xmm2, xmm3
movsd QWORD PTR 312[rsp], xmm2
comisd xmm6, xmm2
jb .L900
movq xmm2, r11
movsd xmm6, QWORD PTR .LC6[rip]
subsd xmm2, xmm3
movsd QWORD PTR 320[rsp], xmm2
comisd xmm6, xmm2
jb .L900
movsd xmm2, QWORD PTR 24[rsp]
movsd xmm6, QWORD PTR .LC0[rip]
subsd xmm2, xmm3
movsd QWORD PTR 328[rsp], xmm2
comisd xmm6, xmm2
jb .L900
pxor xmm2, xmm2
movsd xmm6, QWORD PTR .LC7[rip]
cvtss2sd xmm2, DWORD PTR 264[rsp]
movsd QWORD PTR 224[rsp], xmm2
subsd xmm2, xmm3
movsd QWORD PTR 264[rsp], xmm2
comisd xmm6, xmm2
jb .L900
movsd xmm2, QWORD PTR 248[rsp]
movsd xmm6, QWORD PTR .LC6[rip]
subsd xmm2, xmm3
movsd QWORD PTR 336[rsp], xmm2
comisd xmm6, xmm2
jb .L900
movsd xmm2, QWORD PTR 160[rsp]
movsd xmm6, QWORD PTR .LC13[rip]
subsd xmm2, xmm3
comisd xmm6, xmm2
jb .L900
ucomisd xmm4, xmm6
mov r9d, 0
movsd xmm4, QWORD PTR 304[rsp]
movsd xmm3, QWORD PTR 264[rsp]
setnp r8b
cmovne r8d, r9d
ucomisd xmm5, QWORD PTR .LC18[rip]
movsd xmm5, QWORD PTR 296[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm5, QWORD PTR .LC0[rip]
movsd xmm5, QWORD PTR 312[rsp]
setnp dil
cmovne edi, r9d
or edi, r8d
ucomisd xmm4, QWORD PTR .LC16[rip]
setnp r8b
cmovne r8d, r9d
or r8d, edi
ucomisd xmm7, QWORD PTR .LC8[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm8, QWORD PTR .LC11[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm9, QWORD PTR .LC0[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm10, QWORD PTR .LC15[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm5, QWORD PTR .LC7[rip]
movsd xmm5, QWORD PTR 320[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm5, QWORD PTR .LC6[rip]
movsd xmm5, QWORD PTR 328[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm5, QWORD PTR .LC0[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm3, QWORD PTR .LC7[rip]
movsd xmm3, QWORD PTR 336[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm3, QWORD PTR .LC6[rip]
setnp dil
cmovne edi, r9d
or dil, r8b
jne .L507
ucomisd xmm2, xmm6
setnp r8b
cmove edi, r8d
test dil, dil
je .L900
.L507:
movsd xmm4, QWORD PTR 176[rsp]
pxor xmm3, xmm3
movsd xmm5, QWORD PTR .LC18[rip]
cvtss2sd xmm3, DWORD PTR 64[rsp]
subsd xmm4, xmm3
movsd QWORD PTR 264[rsp], xmm4
comisd xmm5, xmm4
jb .L900
movapd xmm5, xmm0
movsd xmm7, QWORD PTR .LC16[rip]
subsd xmm5, xmm3
movsd QWORD PTR 296[rsp], xmm5
comisd xmm7, xmm5
jb .L900
movapd xmm7, xmm14
movsd xmm2, QWORD PTR .LC19[rip]
subsd xmm7, xmm3
comisd xmm2, xmm7
movapd xmm5, xmm7
jb .L900
movq xmm6, rsi
movsd xmm7, QWORD PTR .LC1[rip]
subsd xmm6, xmm3
comisd xmm7, xmm6
jb .L900
movq xmm7, rcx
movsd xmm2, QWORD PTR .LC3[rip]
subsd xmm7, xmm3
comisd xmm2, xmm7
jb .L900
movsd xmm8, QWORD PTR 16[rsp]
movsd xmm2, QWORD PTR .LC10[rip]
subsd xmm8, xmm3
comisd xmm2, xmm8
jb .L900
movq xmm9, r11
movsd xmm2, QWORD PTR .LC13[rip]
subsd xmm9, xmm3
comisd xmm2, xmm9
jb .L900
movsd xmm10, QWORD PTR 208[rsp]
movsd xmm2, QWORD PTR .LC18[rip]
subsd xmm10, xmm3
comisd xmm2, xmm10
jb .L900
movsd xmm2, QWORD PTR 144[rsp]
movsd xmm4, QWORD PTR .LC3[rip]
subsd xmm2, xmm3
movsd QWORD PTR 304[rsp], xmm2
comisd xmm4, xmm2
jb .L900
movsd xmm2, QWORD PTR 192[rsp]
movsd xmm4, QWORD PTR .LC9[rip]
subsd xmm2, xmm3
movsd QWORD PTR 312[rsp], xmm2
comisd xmm4, xmm2
jb .L900
pxor xmm4, xmm4
cvtss2sd xmm4, DWORD PTR 256[rsp]
movapd xmm2, xmm4
movq rdi, xmm4
movsd xmm4, QWORD PTR .LC2[rip]
subsd xmm2, xmm3
movsd QWORD PTR 256[rsp], xmm2
comisd xmm4, xmm2
jb .L900
movsd xmm2, QWORD PTR 168[rsp]
movsd xmm4, QWORD PTR .LC7[rip]
subsd xmm2, xmm3
movsd QWORD PTR 320[rsp], xmm2
comisd xmm4, xmm2
jb .L900
movq xmm2, r10
movsd xmm4, QWORD PTR .LC2[rip]
subsd xmm2, xmm3
movsd QWORD PTR 328[rsp], xmm2
comisd xmm4, xmm2
jb .L900
movsd xmm2, QWORD PTR 160[rsp]
movsd xmm4, QWORD PTR .LC3[rip]
subsd xmm2, xmm3
comisd xmm4, xmm2
jb .L900
movsd xmm3, QWORD PTR 296[rsp]
mov edx, 0
ucomisd xmm3, QWORD PTR .LC16[rip]
movsd xmm4, QWORD PTR 264[rsp]
movsd xmm3, QWORD PTR 304[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm4, QWORD PTR .LC18[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC19[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC1[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC3[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC10[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC13[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC18[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm3, QWORD PTR .LC3[rip]
movsd xmm3, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm3, QWORD PTR .LC9[rip]
movsd xmm3, QWORD PTR 256[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm3, QWORD PTR .LC2[rip]
movsd xmm3, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm3, QWORD PTR .LC7[rip]
movsd xmm3, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm3, QWORD PTR .LC2[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L522
ucomisd xmm2, QWORD PTR .LC3[rip]
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L522:
pxor xmm2, xmm2
movapd xmm5, xmm13
movsd xmm3, QWORD PTR .LC14[rip]
cvtss2sd xmm2, DWORD PTR 72[rsp]
subsd xmm5, xmm2
comisd xmm3, xmm5
jb .L900
movapd xmm4, xmm14
movsd xmm3, QWORD PTR .LC9[rip]
subsd xmm4, xmm2
movsd QWORD PTR 256[rsp], xmm4
comisd xmm3, xmm4
jb .L900
movsd xmm6, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC1[rip]
subsd xmm6, xmm2
comisd xmm3, xmm6
jb .L900
movsd xmm7, QWORD PTR 288[rsp]
movsd xmm3, QWORD PTR .LC15[rip]
subsd xmm7, xmm2
comisd xmm3, xmm7
jb .L900
movsd xmm8, QWORD PTR 16[rsp]
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm8, xmm2
comisd xmm3, xmm8
jb .L900
movsd xmm9, QWORD PTR 280[rsp]
movsd xmm3, QWORD PTR .LC5[rip]
subsd xmm9, xmm2
comisd xmm3, xmm9
jb .L900
movsd xmm10, QWORD PTR 208[rsp]
movsd xmm3, QWORD PTR .LC11[rip]
subsd xmm10, xmm2
comisd xmm3, xmm10
jb .L900
movsd xmm3, QWORD PTR 24[rsp]
movsd xmm4, QWORD PTR .LC13[rip]
subsd xmm3, xmm2
movsd QWORD PTR 264[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 152[rsp]
movsd xmm4, QWORD PTR .LC12[rip]
subsd xmm3, xmm2
movsd QWORD PTR 296[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 192[rsp]
movsd xmm4, QWORD PTR .LC14[rip]
subsd xmm3, xmm2
movsd QWORD PTR 304[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 224[rsp]
movsd xmm4, QWORD PTR .LC12[rip]
subsd xmm3, xmm2
movsd QWORD PTR 312[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, rdi
movsd xmm4, QWORD PTR .LC19[rip]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm4, r10
subsd xmm4, xmm2
movapd xmm3, xmm4
movsd xmm4, QWORD PTR .LC1[rip]
comisd xmm4, xmm3
jb .L900
movsd xmm4, QWORD PTR 160[rsp]
subsd xmm4, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
comisd xmm2, xmm4
jb .L900
movsd xmm2, QWORD PTR 256[rsp]
mov edx, 0
ucomisd xmm2, QWORD PTR .LC9[rip]
movsd xmm2, QWORD PTR 264[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm5, QWORD PTR .LC14[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC1[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC15[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC12[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC5[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC11[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC13[rip]
movsd xmm2, QWORD PTR 296[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC12[rip]
movsd xmm2, QWORD PTR 304[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC14[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC12[rip]
movsd xmm2, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC19[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm3, QWORD PTR .LC1[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L537
ucomisd xmm4, QWORD PTR .LC16[rip]
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L537:
pxor xmm2, xmm2
movapd xmm5, xmm0
movsd xmm7, QWORD PTR .LC18[rip]
cvtss2sd xmm2, DWORD PTR 80[rsp]
subsd xmm5, xmm2
comisd xmm7, xmm5
jb .L900
movapd xmm4, xmm12
movsd xmm3, QWORD PTR .LC6[rip]
subsd xmm4, xmm2
movsd QWORD PTR 256[rsp], xmm4
comisd xmm3, xmm4
jb .L900
movapd xmm6, xmm13
movsd xmm7, QWORD PTR .LC11[rip]
subsd xmm6, xmm2
comisd xmm7, xmm6
jb .L900
movapd xmm7, xmm14
movsd xmm3, QWORD PTR .LC1[rip]
subsd xmm7, xmm2
comisd xmm3, xmm7
jb .L900
movq xmm8, rsi
movsd xmm3, QWORD PTR .LC7[rip]
subsd xmm8, xmm2
comisd xmm3, xmm8
jb .L900
movsd xmm9, QWORD PTR 184[rsp]
movsd xmm3, QWORD PTR .LC15[rip]
subsd xmm9, xmm2
comisd xmm3, xmm9
jb .L900
movsd xmm10, QWORD PTR 288[rsp]
movsd xmm3, QWORD PTR .LC9[rip]
subsd xmm10, xmm2
comisd xmm3, xmm10
jb .L900
movsd xmm3, QWORD PTR 240[rsp]
movsd xmm4, QWORD PTR .LC3[rip]
subsd xmm3, xmm2
movsd QWORD PTR 264[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, r11
movsd xmm4, QWORD PTR .LC6[rip]
subsd xmm3, xmm2
movsd QWORD PTR 296[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 152[rsp]
movsd xmm4, QWORD PTR .LC13[rip]
subsd xmm3, xmm2
movsd QWORD PTR 304[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 224[rsp]
movsd xmm4, QWORD PTR .LC0[rip]
subsd xmm3, xmm2
movsd QWORD PTR 312[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, rdi
movsd xmm4, QWORD PTR .LC7[rip]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 248[rsp]
movsd xmm4, QWORD PTR .LC5[rip]
subsd xmm3, xmm2
movsd QWORD PTR 328[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 168[rsp]
movsd xmm4, QWORD PTR .LC6[rip]
subsd xmm3, xmm2
comisd xmm4, xmm3
jb .L900
movsd xmm4, QWORD PTR 256[rsp]
mov edx, 0
ucomisd xmm4, QWORD PTR .LC6[rip]
movsd xmm2, QWORD PTR 264[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm5, QWORD PTR .LC18[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC11[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC1[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC7[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC15[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC9[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC3[rip]
movsd xmm2, QWORD PTR 296[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC6[rip]
movsd xmm2, QWORD PTR 304[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC13[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC0[rip]
movsd xmm2, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC7[rip]
movsd xmm2, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC5[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L552
ucomisd xmm3, QWORD PTR .LC6[rip]
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L552:
movsd xmm4, QWORD PTR 176[rsp]
pxor xmm2, xmm2
movsd xmm5, QWORD PTR .LC0[rip]
cvtss2sd xmm2, DWORD PTR 88[rsp]
subsd xmm4, xmm2
movsd QWORD PTR 256[rsp], xmm4
comisd xmm5, xmm4
jb .L900
movapd xmm3, xmm12
movsd xmm5, QWORD PTR .LC16[rip]
subsd xmm3, xmm2
movsd QWORD PTR 264[rsp], xmm3
comisd xmm5, xmm3
jb .L900
movapd xmm5, xmm11
movsd xmm7, QWORD PTR .LC12[rip]
subsd xmm5, xmm2
comisd xmm7, xmm5
jb .L900
movapd xmm6, xmm14
movsd xmm7, QWORD PTR .LC3[rip]
subsd xmm6, xmm2
comisd xmm7, xmm6
jb .L900
movsd xmm8, QWORD PTR .LC17[rip]
movq xmm7, rsi
subsd xmm7, xmm2
comisd xmm8, xmm7
jb .L900
movsd xmm8, QWORD PTR 200[rsp]
movsd xmm9, QWORD PTR .LC4[rip]
subsd xmm8, xmm2
comisd xmm9, xmm8
jb .L900
movsd xmm9, QWORD PTR 184[rsp]
movsd xmm10, QWORD PTR .LC13[rip]
subsd xmm9, xmm2
comisd xmm10, xmm9
jb .L900
movsd xmm10, QWORD PTR 280[rsp]
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm10, xmm2
comisd xmm3, xmm10
jb .L900
movsd xmm3, QWORD PTR 24[rsp]
movsd xmm4, QWORD PTR .LC2[rip]
subsd xmm3, xmm2
movsd QWORD PTR 296[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 144[rsp]
movsd xmm4, QWORD PTR .LC9[rip]
subsd xmm3, xmm2
movsd QWORD PTR 304[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 224[rsp]
movsd xmm4, QWORD PTR .LC3[rip]
subsd xmm3, xmm2
movsd QWORD PTR 312[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, rdi
movsd xmm4, QWORD PTR .LC13[rip]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, r10
movsd xmm4, QWORD PTR .LC7[rip]
subsd xmm3, xmm2
movsd QWORD PTR 328[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 168[rsp]
movsd xmm4, QWORD PTR .LC13[rip]
subsd xmm3, xmm2
comisd xmm4, xmm3
jb .L900
movsd xmm2, QWORD PTR 264[rsp]
mov edx, 0
ucomisd xmm2, QWORD PTR .LC16[rip]
movsd xmm2, QWORD PTR 256[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm2, QWORD PTR .LC0[rip]
movsd xmm2, QWORD PTR 296[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC12[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC3[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC17[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC4[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, xmm4
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC12[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC2[rip]
movsd xmm2, QWORD PTR 304[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC9[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC3[rip]
movsd xmm2, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, xmm4
movsd xmm2, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC7[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L567
ucomisd xmm3, xmm4
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L567:
movsd xmm3, QWORD PTR 176[rsp]
pxor xmm2, xmm2
movsd xmm5, QWORD PTR .LC16[rip]
cvtss2sd xmm2, DWORD PTR 96[rsp]
subsd xmm3, xmm2
movsd QWORD PTR 256[rsp], xmm3
comisd xmm5, xmm3
jb .L900
movsd xmm5, QWORD PTR 216[rsp]
subsd xmm5, xmm2
movapd xmm4, xmm5
movsd xmm5, QWORD PTR .LC15[rip]
comisd xmm5, xmm4
jb .L900
movapd xmm5, xmm13
movsd xmm7, QWORD PTR .LC1[rip]
subsd xmm5, xmm2
movsd QWORD PTR 264[rsp], xmm5
comisd xmm7, xmm5
jb .L900
movapd xmm6, xmm11
movsd xmm7, QWORD PTR .LC4[rip]
subsd xmm6, xmm2
comisd xmm7, xmm6
jb .L900
movsd xmm8, QWORD PTR .LC7[rip]
movapd xmm7, xmm14
subsd xmm7, xmm2
comisd xmm8, xmm7
jb .L900
movsd xmm8, QWORD PTR 272[rsp]
movsd xmm9, QWORD PTR .LC5[rip]
subsd xmm8, xmm2
comisd xmm9, xmm8
jb .L900
movsd xmm9, QWORD PTR 200[rsp]
movsd xmm10, QWORD PTR .LC17[rip]
subsd xmm9, xmm2
comisd xmm10, xmm9
jb .L900
movsd xmm10, QWORD PTR 240[rsp]
movsd xmm3, QWORD PTR .LC11[rip]
subsd xmm10, xmm2
comisd xmm3, xmm10
jb .L900
movsd xmm3, QWORD PTR 280[rsp]
movsd xmm5, QWORD PTR .LC7[rip]
subsd xmm3, xmm2
movsd QWORD PTR 296[rsp], xmm3
comisd xmm5, xmm3
jb .L900
movq xmm3, r11
movsd xmm5, QWORD PTR .LC3[rip]
subsd xmm3, xmm2
movsd QWORD PTR 304[rsp], xmm3
comisd xmm5, xmm3
jb .L900
movsd xmm3, QWORD PTR 192[rsp]
movsd xmm5, QWORD PTR .LC15[rip]
subsd xmm3, xmm2
movsd QWORD PTR 312[rsp], xmm3
comisd xmm5, xmm3
jb .L900
movsd xmm3, QWORD PTR 224[rsp]
movsd xmm5, QWORD PTR .LC18[rip]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm5, xmm3
jb .L900
movq xmm3, r10
movsd xmm5, QWORD PTR .LC19[rip]
subsd xmm3, xmm2
movsd QWORD PTR 328[rsp], xmm3
comisd xmm5, xmm3
jb .L900
movsd xmm3, QWORD PTR 160[rsp]
movsd xmm5, QWORD PTR .LC2[rip]
subsd xmm3, xmm2
comisd xmm5, xmm3
jb .L900
ucomisd xmm4, QWORD PTR .LC15[rip]
mov edx, 0
movsd xmm4, QWORD PTR 256[rsp]
movsd xmm5, QWORD PTR 264[rsp]
movsd xmm2, QWORD PTR 296[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm4, QWORD PTR .LC16[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC1[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC4[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC7[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC5[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC17[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC11[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC7[rip]
movsd xmm2, QWORD PTR 304[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC3[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC15[rip]
movsd xmm2, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC18[rip]
movsd xmm2, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC19[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L582
ucomisd xmm3, QWORD PTR .LC2[rip]
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L582:
movsd xmm2, QWORD PTR 216[rsp]
pxor xmm3, xmm3
movsd xmm5, QWORD PTR .LC6[rip]
cvtss2sd xmm3, DWORD PTR 48[rsp]
movsd QWORD PTR 256[rsp], xmm3
subsd xmm2, xmm3
movsd QWORD PTR 296[rsp], xmm2
comisd xmm5, xmm2
jb .L900
movapd xmm5, xmm13
movsd xmm7, QWORD PTR .LC2[rip]
subsd xmm5, xmm3
movsd QWORD PTR 304[rsp], xmm5
comisd xmm7, xmm5
jb .L900
movapd xmm4, xmm11
movsd xmm7, QWORD PTR .LC18[rip]
movapd xmm2, xmm3
subsd xmm4, xmm3
movsd QWORD PTR 312[rsp], xmm4
comisd xmm7, xmm4
jb .L900
movq xmm10, rsi
movsd xmm7, QWORD PTR .LC4[rip]
subsd xmm10, xmm3
comisd xmm7, xmm10
jb .L900
movq xmm7, rcx
movsd xmm6, QWORD PTR .LC16[rip]
subsd xmm7, xmm3
movsd QWORD PTR 320[rsp], xmm7
comisd xmm6, xmm7
jb .L900
movsd xmm9, QWORD PTR 200[rsp]
movsd xmm6, QWORD PTR .LC2[rip]
subsd xmm9, xmm3
comisd xmm6, xmm9
jb .L900
movsd xmm8, QWORD PTR .LC16[rip]
movq xmm6, r11
subsd xmm6, xmm3
movsd QWORD PTR 328[rsp], xmm6
comisd xmm8, xmm6
jb .L900
movsd xmm8, QWORD PTR 24[rsp]
movsd xmm5, QWORD PTR .LC4[rip]
subsd xmm8, xmm3
comisd xmm5, xmm8
jb .L900
movsd xmm7, QWORD PTR 144[rsp]
movsd xmm5, QWORD PTR .LC9[rip]
subsd xmm7, xmm3
comisd xmm5, xmm7
jb .L900
movsd xmm6, QWORD PTR 152[rsp]
movsd xmm5, QWORD PTR .LC10[rip]
subsd xmm6, xmm3
comisd xmm5, xmm6
jb .L900
movq xmm5, rdi
movsd xmm4, QWORD PTR .LC18[rip]
subsd xmm5, xmm3
comisd xmm4, xmm5
jb .L900
movsd xmm4, QWORD PTR 168[rsp]
subsd xmm4, xmm3
movsd xmm3, QWORD PTR .LC11[rip]
comisd xmm3, xmm4
jb .L900
movq xmm3, r10
subsd xmm3, xmm2
movsd QWORD PTR 264[rsp], xmm3
movsd xmm3, QWORD PTR .LC13[rip]
comisd xmm3, QWORD PTR 264[rsp]
jb .L900
movsd xmm3, QWORD PTR 160[rsp]
subsd xmm3, xmm2
movapd xmm2, xmm3
movsd xmm3, QWORD PTR .LC2[rip]
comisd xmm3, xmm2
jb .L900
movsd xmm3, QWORD PTR 304[rsp]
mov edx, 0
ucomisd xmm3, QWORD PTR .LC2[rip]
movsd xmm3, QWORD PTR 296[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm3, QWORD PTR .LC6[rip]
movsd xmm3, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm3, QWORD PTR .LC18[rip]
movsd xmm3, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC4[rip]
setnp r8b
cmovne r8d, edx
or r8d, r9d
ucomisd xmm3, QWORD PTR .LC16[rip]
movsd xmm3, QWORD PTR 328[rsp]
setnp r9b
cmovne r9d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC2[rip]
setnp r8b
cmovne r8d, edx
or r8d, r9d
ucomisd xmm3, QWORD PTR .LC16[rip]
setnp r9b
cmovne r9d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC4[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC9[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC10[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC18[rip]
movsd xmm5, QWORD PTR 264[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm4, QWORD PTR .LC11[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC13[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L597
ucomisd xmm2, QWORD PTR .LC2[rip]
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L597:
movsd xmm5, QWORD PTR 176[rsp]
pxor xmm2, xmm2
movsd xmm7, QWORD PTR .LC13[rip]
cvtss2sd xmm2, DWORD PTR 108[rsp]
subsd xmm5, xmm2
comisd xmm7, xmm5
jb .L900
movapd xmm4, xmm13
movsd xmm7, QWORD PTR .LC2[rip]
subsd xmm4, xmm2
movsd QWORD PTR 264[rsp], xmm4
comisd xmm7, xmm4
jb .L900
movq xmm6, rsi
movsd xmm3, QWORD PTR .LC17[rip]
subsd xmm6, xmm2
comisd xmm3, xmm6
jb .L900
movsd xmm7, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm7, xmm2
comisd xmm3, xmm7
jb .L900
movsd xmm8, QWORD PTR 184[rsp]
movsd xmm3, QWORD PTR .LC17[rip]
subsd xmm8, xmm2
comisd xmm3, xmm8
jb .L900
movq xmm9, r11
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm9, xmm2
comisd xmm3, xmm9
jb .L900
movsd xmm10, QWORD PTR 24[rsp]
movsd xmm3, QWORD PTR .LC17[rip]
subsd xmm10, xmm2
comisd xmm3, xmm10
jb .L900
movsd xmm3, QWORD PTR 152[rsp]
movsd xmm4, QWORD PTR .LC9[rip]
subsd xmm3, xmm2
movsd QWORD PTR 296[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 192[rsp]
movsd xmm4, QWORD PTR .LC1[rip]
subsd xmm3, xmm2
movsd QWORD PTR 304[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, rdi
movsd xmm4, QWORD PTR .LC17[rip]
subsd xmm3, xmm2
movsd QWORD PTR 312[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 168[rsp]
movsd xmm4, QWORD PTR .LC19[rip]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 160[rsp]
subsd xmm3, xmm2
movsd QWORD PTR 328[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, r10
movsd xmm4, QWORD PTR .LC0[rip]
subsd xmm3, xmm2
movsd QWORD PTR 336[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 248[rsp]
movsd xmm4, QWORD PTR .LC3[rip]
subsd xmm3, xmm2
comisd xmm4, xmm3
jb .L900
movsd xmm2, QWORD PTR 264[rsp]
mov edx, 0
ucomisd xmm2, QWORD PTR .LC2[rip]
movsd xmm2, QWORD PTR 296[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm5, QWORD PTR .LC13[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC17[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC19[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC17[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC4[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC17[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC9[rip]
movsd xmm2, QWORD PTR 304[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC1[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC17[rip]
movsd xmm2, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC19[rip]
movsd xmm2, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC19[rip]
movsd xmm2, QWORD PTR 336[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC0[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L612
ucomisd xmm3, xmm4
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L612:
pxor xmm2, xmm2
movapd xmm5, xmm0
movsd xmm7, QWORD PTR .LC10[rip]
cvtss2sd xmm2, DWORD PTR 36[rsp]
subsd xmm5, xmm2
comisd xmm7, xmm5
jb .L900
movapd xmm4, xmm12
movsd xmm7, QWORD PTR .LC17[rip]
subsd xmm4, xmm2
movsd QWORD PTR 264[rsp], xmm4
comisd xmm7, xmm4
jb .L900
movq xmm6, rsi
movsd xmm7, QWORD PTR .LC3[rip]
subsd xmm6, xmm2
comisd xmm7, xmm6
jb .L900
movq xmm7, rcx
movsd xmm3, QWORD PTR .LC11[rip]
subsd xmm7, xmm2
comisd xmm3, xmm7
jb .L900
movsd xmm3, QWORD PTR 184[rsp]
movsd xmm8, QWORD PTR .LC16[rip]
subsd xmm3, xmm2
movsd QWORD PTR 296[rsp], xmm3
comisd xmm8, xmm3
jb .L900
movsd xmm9, QWORD PTR .LC7[rip]
movq xmm8, r11
subsd xmm8, xmm2
comisd xmm9, xmm8
jb .L900
movsd xmm10, QWORD PTR .LC17[rip]
movsd xmm9, QWORD PTR 24[rsp]
subsd xmm9, xmm2
comisd xmm10, xmm9
jb .L900
movsd xmm10, QWORD PTR 152[rsp]
movsd xmm3, QWORD PTR .LC1[rip]
subsd xmm10, xmm2
comisd xmm3, xmm10
jb .L900
movsd xmm3, QWORD PTR 192[rsp]
movsd xmm4, QWORD PTR .LC12[rip]
subsd xmm3, xmm2
movsd QWORD PTR 304[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, rdi
movsd xmm4, QWORD PTR .LC9[rip]
subsd xmm3, xmm2
movsd QWORD PTR 312[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 168[rsp]
movsd xmm4, QWORD PTR .LC6[rip]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 160[rsp]
movsd xmm4, QWORD PTR .LC8[rip]
subsd xmm3, xmm2
movsd QWORD PTR 328[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, r10
movsd xmm4, QWORD PTR .LC13[rip]
subsd xmm3, xmm2
movsd QWORD PTR 336[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 248[rsp]
movsd xmm4, QWORD PTR .LC15[rip]
subsd xmm3, xmm2
comisd xmm4, xmm3
jb .L900
movsd xmm2, QWORD PTR 264[rsp]
mov edx, 0
ucomisd xmm2, QWORD PTR .LC17[rip]
movsd xmm2, QWORD PTR 304[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm5, QWORD PTR .LC10[rip]
movsd xmm5, QWORD PTR 296[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC3[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC11[rip]
setnp r8b
cmovne r8d, edx
or r8d, r9d
ucomisd xmm5, QWORD PTR .LC16[rip]
setnp r9b
cmovne r9d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC7[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC17[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC1[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC12[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC9[rip]
movsd xmm2, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC6[rip]
movsd xmm2, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC8[rip]
movsd xmm2, QWORD PTR 336[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC13[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L627
ucomisd xmm3, xmm4
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L627:
pxor xmm2, xmm2
movapd xmm5, xmm11
movsd xmm7, QWORD PTR .LC13[rip]
cvtss2sd xmm2, DWORD PTR 112[rsp]
subsd xmm5, xmm2
comisd xmm7, xmm5
jb .L900
movq xmm4, rcx
movsd xmm7, QWORD PTR .LC6[rip]
subsd xmm4, xmm2
movsd QWORD PTR 264[rsp], xmm4
comisd xmm7, xmm4
jb .L900
movsd xmm6, QWORD PTR 272[rsp]
subsd xmm6, xmm2
comisd xmm7, xmm6
jb .L900
movsd xmm7, QWORD PTR 184[rsp]
movsd xmm3, QWORD PTR .LC9[rip]
subsd xmm7, xmm2
comisd xmm3, xmm7
jb .L900
movsd xmm8, QWORD PTR 16[rsp]
movsd xmm3, QWORD PTR .LC3[rip]
subsd xmm8, xmm2
comisd xmm3, xmm8
jb .L900
movq xmm9, r11
movsd xmm3, QWORD PTR .LC15[rip]
subsd xmm9, xmm2
comisd xmm3, xmm9
jb .L900
movsd xmm10, QWORD PTR 208[rsp]
movsd xmm3, QWORD PTR .LC3[rip]
subsd xmm10, xmm2
comisd xmm3, xmm10
jb .L900
movsd xmm3, QWORD PTR 144[rsp]
movsd xmm4, QWORD PTR .LC9[rip]
subsd xmm3, xmm2
movsd QWORD PTR 296[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 152[rsp]
movsd xmm4, QWORD PTR .LC17[rip]
subsd xmm3, xmm2
movsd QWORD PTR 304[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 192[rsp]
movsd xmm4, QWORD PTR .LC15[rip]
subsd xmm3, xmm2
movsd QWORD PTR 312[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, rdi
movsd xmm4, QWORD PTR .LC6[rip]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 168[rsp]
movsd xmm4, QWORD PTR .LC9[rip]
subsd xmm3, xmm2
movsd QWORD PTR 328[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, r10
movsd xmm4, QWORD PTR .LC17[rip]
subsd xmm3, xmm2
movsd QWORD PTR 336[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 248[rsp]
subsd xmm3, xmm2
comisd xmm4, xmm3
jb .L900
movsd xmm4, QWORD PTR 264[rsp]
mov edx, 0
ucomisd xmm4, QWORD PTR .LC6[rip]
movsd xmm2, QWORD PTR 296[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm5, QWORD PTR .LC13[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC6[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC9[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC3[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC15[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC3[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC9[rip]
movsd xmm2, QWORD PTR 304[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC17[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC15[rip]
movsd xmm2, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC6[rip]
movsd xmm2, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC9[rip]
movsd xmm2, QWORD PTR 336[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC17[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L642
ucomisd xmm3, QWORD PTR .LC17[rip]
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L642:
movsd xmm5, QWORD PTR 176[rsp]
pxor xmm2, xmm2
movsd xmm7, QWORD PTR .LC8[rip]
cvtss2sd xmm2, DWORD PTR 44[rsp]
subsd xmm5, xmm2
comisd xmm7, xmm5
jb .L900
movapd xmm4, xmm0
movsd xmm7, QWORD PTR .LC9[rip]
subsd xmm4, xmm2
movsd QWORD PTR 264[rsp], xmm4
comisd xmm7, xmm4
jb .L900
movapd xmm6, xmm12
movsd xmm7, QWORD PTR .LC14[rip]
subsd xmm6, xmm2
comisd xmm7, xmm6
jb .L900
movapd xmm7, xmm13
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm7, xmm2
comisd xmm3, xmm7
jb .L900
movapd xmm8, xmm11
movsd xmm3, QWORD PTR .LC7[rip]
subsd xmm8, xmm2
comisd xmm3, xmm8
jb .L900
movsd xmm9, QWORD PTR 272[rsp]
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm9, xmm2
comisd xmm3, xmm9
jb .L900
movsd xmm10, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC5[rip]
subsd xmm10, xmm2
comisd xmm3, xmm10
jb .L900
movsd xmm3, QWORD PTR 184[rsp]
movsd xmm4, QWORD PTR .LC14[rip]
subsd xmm3, xmm2
movsd QWORD PTR 296[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 16[rsp]
movsd xmm4, QWORD PTR .LC4[rip]
subsd xmm3, xmm2
movsd QWORD PTR 304[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, r11
movsd xmm4, QWORD PTR .LC9[rip]
subsd xmm3, xmm2
movsd QWORD PTR 312[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 144[rsp]
movsd xmm4, QWORD PTR .LC10[rip]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 224[rsp]
movsd xmm4, QWORD PTR .LC4[rip]
subsd xmm3, xmm2
movsd QWORD PTR 328[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, r10
movsd xmm4, QWORD PTR .LC2[rip]
subsd xmm3, xmm2
movsd QWORD PTR 336[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 168[rsp]
movsd xmm4, QWORD PTR .LC9[rip]
subsd xmm3, xmm2
comisd xmm4, xmm3
jb .L900
movsd xmm2, QWORD PTR 264[rsp]
mov edx, 0
ucomisd xmm2, xmm4
movsd xmm2, QWORD PTR 296[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm5, QWORD PTR .LC8[rip]
movsd xmm5, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC14[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC4[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC7[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC12[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC5[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC14[rip]
movsd xmm2, QWORD PTR 304[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC4[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, xmm4
movsd xmm2, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC10[rip]
movsd xmm5, QWORD PTR 336[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC4[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC2[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L657
ucomisd xmm3, xmm4
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L657:
pxor xmm2, xmm2
movapd xmm5, xmm12
movsd xmm7, QWORD PTR .LC7[rip]
cvtss2sd xmm2, DWORD PTR 92[rsp]
subsd xmm5, xmm2
comisd xmm7, xmm5
jb .L900
movapd xmm4, xmm11
movsd xmm7, QWORD PTR .LC13[rip]
subsd xmm4, xmm2
movsd QWORD PTR 264[rsp], xmm4
comisd xmm7, xmm4
jb .L900
movapd xmm6, xmm14
movsd xmm7, QWORD PTR .LC10[rip]
subsd xmm6, xmm2
comisd xmm7, xmm6
jb .L900
movq xmm7, rsi
movsd xmm3, QWORD PTR .LC11[rip]
subsd xmm7, xmm2
comisd xmm3, xmm7
jb .L900
movsd xmm8, QWORD PTR 272[rsp]
subsd xmm8, xmm2
comisd xmm3, xmm8
jb .L900
movsd xmm9, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC17[rip]
subsd xmm9, xmm2
comisd xmm3, xmm9
jb .L900
movsd xmm10, QWORD PTR 184[rsp]
movsd xmm3, QWORD PTR .LC3[rip]
subsd xmm10, xmm2
comisd xmm3, xmm10
jb .L900
movsd xmm3, QWORD PTR 240[rsp]
movsd xmm4, QWORD PTR .LC17[rip]
subsd xmm3, xmm2
movsd QWORD PTR 296[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 208[rsp]
movsd xmm4, QWORD PTR .LC11[rip]
subsd xmm3, xmm2
movsd QWORD PTR 304[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 24[rsp]
movsd xmm4, QWORD PTR .LC0[rip]
subsd xmm3, xmm2
movsd QWORD PTR 312[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 144[rsp]
movsd xmm4, QWORD PTR .LC11[rip]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 152[rsp]
movsd xmm4, QWORD PTR .LC6[rip]
subsd xmm3, xmm2
movsd QWORD PTR 328[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, r10
movsd xmm4, QWORD PTR .LC19[rip]
subsd xmm3, xmm2
movsd QWORD PTR 336[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 168[rsp]
subsd xmm3, xmm2
comisd xmm4, xmm3
jb .L900
movsd xmm2, QWORD PTR 264[rsp]
mov edx, 0
ucomisd xmm2, QWORD PTR .LC13[rip]
movsd xmm2, QWORD PTR 296[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm5, QWORD PTR .LC7[rip]
movsd xmm5, QWORD PTR 304[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC10[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC11[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC11[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC17[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC3[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC17[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC11[rip]
movsd xmm5, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC0[rip]
movsd xmm2, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC11[rip]
movsd xmm5, QWORD PTR 336[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC6[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, xmm4
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L672
ucomisd xmm3, xmm4
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L672:
movsd xmm5, QWORD PTR 216[rsp]
pxor xmm2, xmm2
movsd xmm7, QWORD PTR .LC1[rip]
cvtss2sd xmm2, DWORD PTR 100[rsp]
subsd xmm5, xmm2
comisd xmm7, xmm5
jb .L900
movapd xmm4, xmm11
movsd xmm7, QWORD PTR .LC3[rip]
subsd xmm4, xmm2
movsd QWORD PTR 264[rsp], xmm4
comisd xmm7, xmm4
jb .L900
movapd xmm6, xmm14
movsd xmm7, QWORD PTR .LC1[rip]
subsd xmm6, xmm2
comisd xmm7, xmm6
jb .L900
movq xmm7, rsi
movsd xmm3, QWORD PTR .LC6[rip]
subsd xmm7, xmm2
comisd xmm3, xmm7
jb .L900
movsd xmm8, QWORD PTR 240[rsp]
movsd xmm3, QWORD PTR .LC14[rip]
subsd xmm8, xmm2
comisd xmm3, xmm8
jb .L900
movsd xmm9, QWORD PTR 280[rsp]
movsd xmm3, QWORD PTR .LC13[rip]
subsd xmm9, xmm2
comisd xmm3, xmm9
jb .L900
movq xmm10, r11
movsd xmm3, QWORD PTR .LC15[rip]
subsd xmm10, xmm2
comisd xmm3, xmm10
jb .L900
movsd xmm3, QWORD PTR 208[rsp]
movsd xmm4, QWORD PTR .LC10[rip]
subsd xmm3, xmm2
movsd QWORD PTR 296[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 24[rsp]
movsd xmm4, QWORD PTR .LC7[rip]
subsd xmm3, xmm2
movsd QWORD PTR 304[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 144[rsp]
movsd xmm4, QWORD PTR .LC14[rip]
subsd xmm3, xmm2
movsd QWORD PTR 312[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 192[rsp]
movsd xmm4, QWORD PTR .LC9[rip]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 224[rsp]
movsd xmm4, QWORD PTR .LC2[rip]
subsd xmm3, xmm2
movsd QWORD PTR 328[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 248[rsp]
movsd xmm4, QWORD PTR .LC6[rip]
subsd xmm3, xmm2
movsd QWORD PTR 336[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, rdi
movsd xmm4, QWORD PTR .LC8[rip]
subsd xmm3, xmm2
comisd xmm4, xmm3
jb .L900
movsd xmm2, QWORD PTR 264[rsp]
mov edx, 0
ucomisd xmm2, QWORD PTR .LC3[rip]
movsd xmm2, QWORD PTR 296[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm5, QWORD PTR .LC1[rip]
movsd xmm5, QWORD PTR 304[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC1[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC6[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC14[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC13[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC15[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC10[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC7[rip]
movsd xmm5, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC14[rip]
movsd xmm2, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC9[rip]
movsd xmm5, QWORD PTR 336[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC2[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC6[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L687
ucomisd xmm3, xmm4
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L687:
movsd xmm2, QWORD PTR 176[rsp]
pxor xmm3, xmm3
movsd xmm5, QWORD PTR .LC4[rip]
cvtss2sd xmm3, DWORD PTR 40[rsp]
movsd QWORD PTR 264[rsp], xmm3
subsd xmm2, xmm3
movsd QWORD PTR 304[rsp], xmm2
comisd xmm5, xmm2
jb .L900
movapd xmm5, xmm0
movsd xmm7, QWORD PTR .LC5[rip]
subsd xmm5, xmm3
movsd QWORD PTR 312[rsp], xmm5
comisd xmm7, xmm5
jb .L900
movapd xmm4, xmm12
movsd xmm7, QWORD PTR .LC17[rip]
movapd xmm2, xmm3
subsd xmm4, xmm3
movsd QWORD PTR 320[rsp], xmm4
comisd xmm7, xmm4
jb .L900
movapd xmm7, xmm13
movsd xmm6, QWORD PTR .LC10[rip]
subsd xmm7, xmm3
movsd QWORD PTR 328[rsp], xmm7
comisd xmm6, xmm7
jb .L900
movapd xmm10, xmm14
subsd xmm10, xmm3
comisd xmm6, xmm10
jb .L900
movq xmm9, rsi
movsd xmm6, QWORD PTR .LC12[rip]
subsd xmm9, xmm3
comisd xmm6, xmm9
jb .L900
movsd xmm6, QWORD PTR 272[rsp]
movsd xmm8, QWORD PTR .LC16[rip]
subsd xmm6, xmm3
movsd QWORD PTR 336[rsp], xmm6
comisd xmm8, xmm6
jb .L900
movsd xmm8, QWORD PTR 240[rsp]
movsd xmm5, QWORD PTR .LC7[rip]
subsd xmm8, xmm3
comisd xmm5, xmm8
jb .L900
movsd xmm7, QWORD PTR 280[rsp]
movsd xmm5, QWORD PTR .LC4[rip]
subsd xmm7, xmm3
comisd xmm5, xmm7
jb .L900
movsd xmm6, QWORD PTR 144[rsp]
movsd xmm5, QWORD PTR .LC19[rip]
subsd xmm6, xmm3
comisd xmm5, xmm6
jb .L900
movsd xmm5, QWORD PTR 168[rsp]
movsd xmm4, QWORD PTR .LC9[rip]
subsd xmm5, xmm3
comisd xmm4, xmm5
jb .L900
movsd xmm4, QWORD PTR 160[rsp]
subsd xmm4, xmm3
movsd xmm3, QWORD PTR .LC17[rip]
comisd xmm3, xmm4
jb .L900
movq xmm3, r10
subsd xmm3, xmm2
movsd QWORD PTR 296[rsp], xmm3
movsd xmm3, QWORD PTR .LC15[rip]
comisd xmm3, QWORD PTR 296[rsp]
jb .L900
movsd xmm3, QWORD PTR 248[rsp]
subsd xmm3, xmm2
movapd xmm2, xmm3
movsd xmm3, QWORD PTR .LC4[rip]
comisd xmm3, xmm2
jb .L900
movsd xmm3, QWORD PTR 312[rsp]
mov edx, 0
ucomisd xmm3, QWORD PTR .LC5[rip]
movsd xmm3, QWORD PTR 304[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm3, QWORD PTR .LC4[rip]
movsd xmm3, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm3, QWORD PTR .LC17[rip]
movsd xmm3, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm3, QWORD PTR .LC10[rip]
movsd xmm3, QWORD PTR 336[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC10[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC12[rip]
setnp r8b
cmovne r8d, edx
or r8d, r9d
ucomisd xmm3, QWORD PTR .LC16[rip]
setnp r9b
cmovne r9d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC7[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC4[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC19[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC9[rip]
movsd xmm5, QWORD PTR 296[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm4, QWORD PTR .LC17[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC15[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L702
ucomisd xmm2, QWORD PTR .LC4[rip]
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L702:
movsd xmm5, QWORD PTR 176[rsp]
pxor xmm2, xmm2
movsd xmm7, QWORD PTR .LC17[rip]
cvtss2sd xmm2, DWORD PTR 120[rsp]
subsd xmm5, xmm2
comisd xmm7, xmm5
jb .L900
movsd xmm4, QWORD PTR 216[rsp]
movsd xmm7, QWORD PTR .LC2[rip]
subsd xmm4, xmm2
movsd QWORD PTR 296[rsp], xmm4
comisd xmm7, xmm4
jb .L900
movapd xmm6, xmm0
movsd xmm7, QWORD PTR .LC3[rip]
subsd xmm6, xmm2
comisd xmm7, xmm6
jb .L900
movapd xmm7, xmm11
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm7, xmm2
comisd xmm3, xmm7
jb .L900
movapd xmm8, xmm14
movsd xmm3, QWORD PTR .LC10[rip]
subsd xmm8, xmm2
comisd xmm3, xmm8
jb .L900
movq xmm9, rsi
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm9, xmm2
comisd xmm3, xmm9
jb .L900
movq xmm10, rcx
movsd xmm3, QWORD PTR .LC1[rip]
subsd xmm10, xmm2
comisd xmm3, xmm10
jb .L900
movsd xmm3, QWORD PTR 272[rsp]
movsd xmm4, QWORD PTR .LC10[rip]
subsd xmm3, xmm2
movsd QWORD PTR 304[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 288[rsp]
movsd xmm4, QWORD PTR .LC0[rip]
subsd xmm3, xmm2
movsd QWORD PTR 312[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 16[rsp]
movsd xmm4, QWORD PTR .LC5[rip]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 24[rsp]
movsd xmm4, QWORD PTR .LC6[rip]
subsd xmm3, xmm2
movsd QWORD PTR 328[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 144[rsp]
movsd xmm4, QWORD PTR .LC18[rip]
subsd xmm3, xmm2
movsd QWORD PTR 336[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 224[rsp]
movsd xmm4, QWORD PTR .LC4[rip]
subsd xmm3, xmm2
movsd QWORD PTR 344[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 192[rsp]
movsd xmm4, QWORD PTR .LC15[rip]
subsd xmm3, xmm2
comisd xmm4, xmm3
jb .L900
movsd xmm2, QWORD PTR 296[rsp]
mov edx, 0
ucomisd xmm2, QWORD PTR .LC2[rip]
movsd xmm2, QWORD PTR 304[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm5, QWORD PTR .LC17[rip]
movsd xmm5, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC3[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC4[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC10[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC12[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC1[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC10[rip]
movsd xmm2, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC0[rip]
movsd xmm5, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC5[rip]
movsd xmm2, QWORD PTR 336[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC6[rip]
movsd xmm5, QWORD PTR 344[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC18[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC4[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L717
ucomisd xmm3, xmm4
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L717:
movsd xmm5, QWORD PTR 216[rsp]
pxor xmm2, xmm2
movsd xmm7, QWORD PTR .LC3[rip]
cvtss2sd xmm2, DWORD PTR 104[rsp]
subsd xmm5, xmm2
comisd xmm7, xmm5
jb .L900
movapd xmm4, xmm0
movsd xmm7, QWORD PTR .LC13[rip]
subsd xmm4, xmm2
comisd xmm7, xmm4
jb .L900
movapd xmm6, xmm13
movsd xmm7, QWORD PTR .LC4[rip]
subsd xmm6, xmm2
movsd QWORD PTR 296[rsp], xmm6
comisd xmm7, xmm6
jb .L900
movapd xmm3, xmm11
movsd xmm7, QWORD PTR .LC16[rip]
subsd xmm3, xmm2
movsd QWORD PTR 304[rsp], xmm3
comisd xmm7, xmm3
jb .L900
movsd xmm8, QWORD PTR .LC12[rip]
movq xmm7, rcx
subsd xmm7, xmm2
comisd xmm8, xmm7
jb .L900
movsd xmm8, QWORD PTR 288[rsp]
movsd xmm9, QWORD PTR .LC6[rip]
subsd xmm8, xmm2
comisd xmm9, xmm8
jb .L900
movsd xmm9, QWORD PTR 240[rsp]
movsd xmm10, QWORD PTR .LC16[rip]
subsd xmm9, xmm2
movsd QWORD PTR 312[rsp], xmm9
comisd xmm10, xmm9
jb .L900
movsd xmm10, QWORD PTR 24[rsp]
subsd xmm10, xmm2
movapd xmm9, xmm10
movsd xmm10, QWORD PTR .LC19[rip]
comisd xmm10, xmm9
jb .L900
movsd xmm10, QWORD PTR 192[rsp]
movsd xmm3, QWORD PTR .LC11[rip]
subsd xmm10, xmm2
comisd xmm3, xmm10
jb .L900
movsd xmm3, QWORD PTR 224[rsp]
movsd xmm6, QWORD PTR .LC8[rip]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm6, xmm3
jb .L900
movq xmm3, rdi
movsd xmm6, QWORD PTR .LC15[rip]
subsd xmm3, xmm2
movsd QWORD PTR 328[rsp], xmm3
comisd xmm6, xmm3
jb .L900
movsd xmm3, QWORD PTR 168[rsp]
movsd xmm6, QWORD PTR .LC1[rip]
subsd xmm3, xmm2
movsd QWORD PTR 336[rsp], xmm3
comisd xmm6, xmm3
jb .L900
movq xmm3, r10
movsd xmm6, QWORD PTR .LC6[rip]
subsd xmm3, xmm2
movsd QWORD PTR 344[rsp], xmm3
comisd xmm6, xmm3
jb .L900
movsd xmm3, QWORD PTR 160[rsp]
movsd xmm6, QWORD PTR .LC9[rip]
subsd xmm3, xmm2
comisd xmm6, xmm3
jb .L900
ucomisd xmm4, QWORD PTR .LC13[rip]
mov edx, 0
movsd xmm4, QWORD PTR 304[rsp]
movsd xmm2, QWORD PTR 320[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm5, QWORD PTR .LC3[rip]
movsd xmm5, QWORD PTR 296[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC4[rip]
movsd xmm5, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r8d, r9d
ucomisd xmm4, QWORD PTR .LC16[rip]
movsd xmm4, QWORD PTR 312[rsp]
setnp r9b
cmovne r9d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC12[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC6[rip]
setnp r8b
cmovne r8d, edx
or r8d, r9d
ucomisd xmm4, QWORD PTR .LC16[rip]
setnp r9b
cmovne r9d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC19[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC11[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC8[rip]
movsd xmm2, QWORD PTR 336[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC15[rip]
movsd xmm5, QWORD PTR 344[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC1[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC6[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L732
ucomisd xmm3, xmm6
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L732:
movsd xmm4, QWORD PTR 176[rsp]
pxor xmm2, xmm2
movsd xmm5, QWORD PTR .LC11[rip]
cvtss2sd xmm2, DWORD PTR 68[rsp]
subsd xmm4, xmm2
movsd QWORD PTR 296[rsp], xmm4
comisd xmm5, xmm4
jb .L900
movsd xmm5, QWORD PTR 216[rsp]
movsd xmm7, QWORD PTR .LC16[rip]
subsd xmm5, xmm2
movsd QWORD PTR 304[rsp], xmm5
comisd xmm7, xmm5
jb .L900
movapd xmm3, xmm0
movsd xmm7, QWORD PTR .LC6[rip]
subsd xmm3, xmm2
comisd xmm7, xmm3
movapd xmm5, xmm3
jb .L900
movapd xmm6, xmm12
movsd xmm7, QWORD PTR .LC10[rip]
subsd xmm6, xmm2
comisd xmm7, xmm6
jb .L900
movapd xmm7, xmm13
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm7, xmm2
comisd xmm3, xmm7
jb .L900
movapd xmm8, xmm14
movsd xmm3, QWORD PTR .LC0[rip]
subsd xmm8, xmm2
comisd xmm3, xmm8
jb .L900
movq xmm9, rsi
movsd xmm3, QWORD PTR .LC15[rip]
subsd xmm9, xmm2
comisd xmm3, xmm9
jb .L900
movsd xmm10, QWORD PTR 288[rsp]
movsd xmm3, QWORD PTR .LC7[rip]
subsd xmm10, xmm2
comisd xmm3, xmm10
jb .L900
movsd xmm3, QWORD PTR 16[rsp]
movsd xmm4, QWORD PTR .LC14[rip]
subsd xmm3, xmm2
movsd QWORD PTR 312[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 240[rsp]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 280[rsp]
movsd xmm4, QWORD PTR .LC2[rip]
subsd xmm3, xmm2
movsd QWORD PTR 328[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 24[rsp]
movsd xmm4, QWORD PTR .LC18[rip]
subsd xmm3, xmm2
movsd QWORD PTR 336[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 168[rsp]
movsd xmm4, QWORD PTR .LC13[rip]
subsd xmm3, xmm2
movsd QWORD PTR 344[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 144[rsp]
movsd xmm4, QWORD PTR .LC1[rip]
subsd xmm3, xmm2
comisd xmm4, xmm3
jb .L900
movsd xmm2, QWORD PTR 304[rsp]
mov edx, 0
ucomisd xmm2, QWORD PTR .LC16[rip]
movsd xmm2, QWORD PTR 296[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm2, QWORD PTR .LC11[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC6[rip]
movsd xmm5, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC10[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC12[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC0[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC15[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC7[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC14[rip]
movsd xmm2, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC14[rip]
movsd xmm5, QWORD PTR 336[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC2[rip]
movsd xmm2, QWORD PTR 344[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC18[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC13[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L747
ucomisd xmm3, xmm4
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L747:
movsd xmm5, QWORD PTR 176[rsp]
pxor xmm2, xmm2
movsd xmm7, QWORD PTR .LC19[rip]
cvtss2sd xmm2, DWORD PTR 76[rsp]
subsd xmm5, xmm2
comisd xmm7, xmm5
jb .L900
movsd xmm4, QWORD PTR 216[rsp]
movsd xmm7, QWORD PTR .LC1[rip]
subsd xmm4, xmm2
movsd QWORD PTR 296[rsp], xmm4
comisd xmm7, xmm4
jb .L900
movapd xmm6, xmm11
movsd xmm7, QWORD PTR .LC6[rip]
subsd xmm6, xmm2
comisd xmm7, xmm6
jb .L900
movapd xmm7, xmm14
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm7, xmm2
comisd xmm3, xmm7
jb .L900
movsd xmm8, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC6[rip]
subsd xmm8, xmm2
comisd xmm3, xmm8
jb .L900
movsd xmm9, QWORD PTR 184[rsp]
movsd xmm3, QWORD PTR .LC2[rip]
subsd xmm9, xmm2
comisd xmm3, xmm9
jb .L900
movsd xmm10, QWORD PTR 288[rsp]
movsd xmm3, QWORD PTR .LC14[rip]
subsd xmm10, xmm2
comisd xmm3, xmm10
jb .L900
movsd xmm3, QWORD PTR 240[rsp]
movsd xmm4, QWORD PTR .LC12[rip]
subsd xmm3, xmm2
movsd QWORD PTR 304[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, r11
movsd xmm4, QWORD PTR .LC6[rip]
subsd xmm3, xmm2
movsd QWORD PTR 312[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 208[rsp]
movsd xmm4, QWORD PTR .LC12[rip]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 144[rsp]
movsd xmm4, QWORD PTR .LC3[rip]
subsd xmm3, xmm2
movsd QWORD PTR 328[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 152[rsp]
movsd xmm4, QWORD PTR .LC11[rip]
subsd xmm3, xmm2
movsd QWORD PTR 336[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 224[rsp]
movsd xmm4, QWORD PTR .LC10[rip]
subsd xmm3, xmm2
movsd QWORD PTR 344[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 192[rsp]
movsd xmm4, QWORD PTR .LC18[rip]
subsd xmm3, xmm2
comisd xmm4, xmm3
jb .L900
movsd xmm2, QWORD PTR 296[rsp]
mov edx, 0
ucomisd xmm2, QWORD PTR .LC1[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm5, QWORD PTR .LC19[rip]
movsd xmm5, QWORD PTR 304[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC6[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC12[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC6[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC2[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC14[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC12[rip]
movsd xmm5, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC6[rip]
movsd xmm2, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC12[rip]
movsd xmm5, QWORD PTR 336[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC3[rip]
movsd xmm2, QWORD PTR 344[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC11[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC10[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L762
ucomisd xmm3, xmm4
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L762:
movsd xmm5, QWORD PTR 216[rsp]
pxor xmm2, xmm2
movsd xmm7, QWORD PTR .LC16[rip]
cvtss2sd xmm2, DWORD PTR 124[rsp]
subsd xmm5, xmm2
movsd QWORD PTR 296[rsp], xmm5
comisd xmm7, xmm5
jb .L900
movapd xmm3, xmm13
movsd xmm7, QWORD PTR .LC13[rip]
subsd xmm3, xmm2
comisd xmm7, xmm3
movapd xmm4, xmm3
jb .L900
movapd xmm3, xmm14
movsd xmm7, QWORD PTR .LC0[rip]
subsd xmm3, xmm2
comisd xmm7, xmm3
movapd xmm5, xmm3
jb .L900
movq xmm6, rsi
movsd xmm7, QWORD PTR .LC17[rip]
subsd xmm6, xmm2
movsd QWORD PTR 304[rsp], xmm6
comisd xmm7, xmm6
jb .L900
movsd xmm7, QWORD PTR 272[rsp]
movsd xmm3, QWORD PTR .LC11[rip]
subsd xmm7, xmm2
comisd xmm3, xmm7
jb .L900
movsd xmm8, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC3[rip]
subsd xmm8, xmm2
comisd xmm3, xmm8
jb .L900
movsd xmm9, QWORD PTR 184[rsp]
subsd xmm9, xmm2
comisd xmm3, xmm9
jb .L900
movsd xmm10, QWORD PTR 16[rsp]
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm10, xmm2
comisd xmm3, xmm10
jb .L900
movsd xmm3, QWORD PTR 208[rsp]
movsd xmm6, QWORD PTR .LC14[rip]
subsd xmm3, xmm2
movsd QWORD PTR 312[rsp], xmm3
comisd xmm6, xmm3
jb .L900
movsd xmm3, QWORD PTR 152[rsp]
movsd xmm6, QWORD PTR .LC9[rip]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm6, xmm3
jb .L900
movsd xmm3, QWORD PTR 224[rsp]
movsd xmm6, QWORD PTR .LC8[rip]
subsd xmm3, xmm2
movsd QWORD PTR 328[rsp], xmm3
comisd xmm6, xmm3
jb .L900
movq xmm3, rdi
movsd xmm6, QWORD PTR .LC14[rip]
subsd xmm3, xmm2
movsd QWORD PTR 336[rsp], xmm3
comisd xmm6, xmm3
jb .L900
movsd xmm3, QWORD PTR 248[rsp]
movsd xmm6, QWORD PTR .LC15[rip]
subsd xmm3, xmm2
movsd QWORD PTR 344[rsp], xmm3
comisd xmm6, xmm3
jb .L900
movsd xmm3, QWORD PTR 160[rsp]
movsd xmm6, QWORD PTR .LC10[rip]
subsd xmm3, xmm2
comisd xmm6, xmm3
jb .L900
ucomisd xmm4, QWORD PTR .LC13[rip]
mov edx, 0
movsd xmm4, QWORD PTR 296[rsp]
movsd xmm2, QWORD PTR 320[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm4, QWORD PTR .LC16[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC0[rip]
movsd xmm5, QWORD PTR 304[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC17[rip]
movsd xmm5, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC11[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC3[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC3[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC4[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC14[rip]
movsd xmm5, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC9[rip]
movsd xmm2, QWORD PTR 336[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC8[rip]
movsd xmm5, QWORD PTR 344[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC14[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC15[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L777
ucomisd xmm3, xmm6
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L777:
movsd xmm4, QWORD PTR 176[rsp]
pxor xmm2, xmm2
movsd xmm5, QWORD PTR .LC7[rip]
cvtss2sd xmm2, DWORD PTR 116[rsp]
subsd xmm4, xmm2
movsd QWORD PTR 296[rsp], xmm4
comisd xmm5, xmm4
jb .L900
movsd xmm5, QWORD PTR 216[rsp]
movsd xmm7, QWORD PTR .LC16[rip]
subsd xmm5, xmm2
movsd QWORD PTR 304[rsp], xmm5
comisd xmm7, xmm5
jb .L900
movapd xmm3, xmm0
movsd xmm7, QWORD PTR .LC17[rip]
subsd xmm3, xmm2
comisd xmm7, xmm3
movapd xmm5, xmm3
jb .L900
movapd xmm6, xmm12
movsd xmm7, QWORD PTR .LC2[rip]
subsd xmm6, xmm2
comisd xmm7, xmm6
jb .L900
movsd xmm7, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC0[rip]
subsd xmm7, xmm2
comisd xmm3, xmm7
jb .L900
movsd xmm8, QWORD PTR 16[rsp]
movsd xmm3, QWORD PTR .LC2[rip]
subsd xmm8, xmm2
comisd xmm3, xmm8
jb .L900
movsd xmm9, QWORD PTR 240[rsp]
movsd xmm3, QWORD PTR .LC8[rip]
subsd xmm9, xmm2
comisd xmm3, xmm9
jb .L900
movq xmm10, r11
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm10, xmm2
comisd xmm3, xmm10
jb .L900
movsd xmm3, QWORD PTR 24[rsp]
movsd xmm4, QWORD PTR .LC11[rip]
subsd xmm3, xmm2
movsd QWORD PTR 312[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 144[rsp]
movsd xmm4, QWORD PTR .LC7[rip]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 192[rsp]
movsd xmm4, QWORD PTR .LC10[rip]
subsd xmm3, xmm2
movsd QWORD PTR 328[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 168[rsp]
movsd xmm4, QWORD PTR .LC4[rip]
subsd xmm3, xmm2
movsd QWORD PTR 336[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movq xmm3, r10
movsd xmm4, QWORD PTR .LC19[rip]
subsd xmm3, xmm2
movsd QWORD PTR 344[rsp], xmm3
comisd xmm4, xmm3
jb .L900
movsd xmm3, QWORD PTR 248[rsp]
movsd xmm4, QWORD PTR .LC7[rip]
subsd xmm3, xmm2
comisd xmm4, xmm3
jb .L900
movsd xmm2, QWORD PTR 304[rsp]
mov edx, 0
ucomisd xmm2, QWORD PTR .LC16[rip]
movsd xmm2, QWORD PTR 296[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm2, xmm4
movsd xmm2, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC17[rip]
movsd xmm5, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm6, QWORD PTR .LC2[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC0[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC2[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC8[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC19[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC11[rip]
movsd xmm2, QWORD PTR 328[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, xmm4
movsd xmm5, QWORD PTR 336[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC10[rip]
movsd xmm2, QWORD PTR 344[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC4[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC19[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L792
ucomisd xmm3, xmm4
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L792:
movsd xmm5, QWORD PTR 176[rsp]
pxor xmm2, xmm2
movsd xmm7, QWORD PTR .LC5[rip]
cvtss2sd xmm2, DWORD PTR 128[rsp]
subsd xmm5, xmm2
comisd xmm7, xmm5
jb .L900
movapd xmm4, xmm13
movsd xmm7, QWORD PTR .LC1[rip]
subsd xmm4, xmm2
comisd xmm7, xmm4
jb .L900
movq xmm6, rsi
movsd xmm7, QWORD PTR .LC4[rip]
subsd xmm6, xmm2
movsd QWORD PTR 296[rsp], xmm6
comisd xmm7, xmm6
jb .L900
movsd xmm7, QWORD PTR 272[rsp]
movsd xmm3, QWORD PTR .LC0[rip]
subsd xmm7, xmm2
comisd xmm3, xmm7
jb .L900
movsd xmm8, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC8[rip]
subsd xmm8, xmm2
comisd xmm3, xmm8
jb .L900
movsd xmm9, QWORD PTR 280[rsp]
movsd xmm3, QWORD PTR .LC13[rip]
subsd xmm9, xmm2
comisd xmm3, xmm9
jb .L900
movsd xmm3, QWORD PTR 208[rsp]
movsd xmm6, QWORD PTR .LC16[rip]
subsd xmm3, xmm2
movsd QWORD PTR 304[rsp], xmm3
comisd xmm6, xmm3
jb .L900
movsd xmm10, QWORD PTR 24[rsp]
subsd xmm10, xmm2
movsd QWORD PTR 312[rsp], xmm10
comisd xmm6, xmm10
jb .L900
movsd xmm6, QWORD PTR 144[rsp]
subsd xmm6, xmm2
movapd xmm10, xmm6
movsd xmm6, QWORD PTR .LC18[rip]
comisd xmm6, xmm10
jb .L900
movsd xmm3, QWORD PTR 152[rsp]
movsd xmm6, QWORD PTR .LC6[rip]
subsd xmm3, xmm2
movsd QWORD PTR 320[rsp], xmm3
comisd xmm6, xmm3
jb .L900
movq xmm3, rdi
movsd xmm6, QWORD PTR .LC17[rip]
subsd xmm3, xmm2
movsd QWORD PTR 328[rsp], xmm3
comisd xmm6, xmm3
jb .L900
movsd xmm3, QWORD PTR 168[rsp]
movsd xmm6, QWORD PTR .LC6[rip]
subsd xmm3, xmm2
movsd QWORD PTR 336[rsp], xmm3
comisd xmm6, xmm3
jb .L900
movq xmm6, r10
subsd xmm6, xmm2
movapd xmm3, xmm6
movsd xmm6, QWORD PTR .LC10[rip]
comisd xmm6, xmm3
jb .L900
movsd xmm6, QWORD PTR 160[rsp]
subsd xmm6, xmm2
movsd xmm2, QWORD PTR .LC16[rip]
comisd xmm2, xmm6
jb .L900
ucomisd xmm4, QWORD PTR .LC1[rip]
mov edx, 0
movsd xmm4, QWORD PTR 304[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm5, QWORD PTR .LC5[rip]
movsd xmm5, QWORD PTR 296[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC4[rip]
movsd xmm5, QWORD PTR 320[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC0[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC8[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC13[rip]
setnp r8b
cmovne r8d, edx
or r8d, r9d
ucomisd xmm4, xmm2
movsd xmm4, QWORD PTR 312[rsp]
setnp r9b
cmovne r9d, edx
or r8d, r9d
ucomisd xmm4, xmm2
movsd xmm2, QWORD PTR 328[rsp]
setnp r9b
cmovne r9d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC18[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC6[rip]
movsd xmm5, QWORD PTR 336[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm2, QWORD PTR .LC17[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC6[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm3, QWORD PTR .LC10[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L807
ucomisd xmm6, QWORD PTR .LC16[rip]
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L807:
movsd xmm5, QWORD PTR 216[rsp]
pxor xmm3, xmm3
movsd xmm2, QWORD PTR .LC14[rip]
cvtss2sd xmm3, DWORD PTR 56[rsp]
subsd xmm5, xmm3
comisd xmm2, xmm5
jb .L900
movapd xmm4, xmm0
movsd xmm2, QWORD PTR .LC9[rip]
subsd xmm4, xmm3
comisd xmm2, xmm4
jb .L900
movapd xmm6, xmm11
movsd xmm2, QWORD PTR .LC12[rip]
subsd xmm6, xmm3
movsd QWORD PTR 296[rsp], xmm6
comisd xmm2, xmm6
jb .L900
movapd xmm7, xmm14
movsd xmm2, QWORD PTR .LC6[rip]
subsd xmm7, xmm3
comisd xmm2, xmm7
jb .L900
movq xmm8, rsi
movsd xmm2, QWORD PTR .LC18[rip]
subsd xmm8, xmm3
comisd xmm2, xmm8
jb .L900
movsd xmm11, QWORD PTR .LC16[rip]
movq xmm2, rcx
subsd xmm2, xmm3
movsd QWORD PTR 304[rsp], xmm2
comisd xmm11, xmm2
jb .L900
movsd xmm9, QWORD PTR 272[rsp]
movsd xmm11, QWORD PTR .LC4[rip]
subsd xmm9, xmm3
comisd xmm11, xmm9
jb .L900
movsd xmm10, QWORD PTR 288[rsp]
movsd xmm11, QWORD PTR .LC17[rip]
subsd xmm10, xmm3
comisd xmm11, xmm10
jb .L900
movsd xmm11, QWORD PTR 16[rsp]
movsd xmm2, QWORD PTR .LC7[rip]
subsd xmm11, xmm3
comisd xmm2, xmm11
jb .L900
movq xmm2, r11
movsd xmm6, QWORD PTR .LC4[rip]
subsd xmm2, xmm3
comisd xmm6, xmm2
movsd QWORD PTR 16[rsp], xmm2
jb .L900
movsd xmm2, QWORD PTR 208[rsp]
movsd xmm6, QWORD PTR .LC8[rip]
subsd xmm2, xmm3
movsd QWORD PTR 272[rsp], xmm2
comisd xmm6, xmm2
jb .L900
movsd xmm2, QWORD PTR 152[rsp]
movsd xmm6, QWORD PTR .LC1[rip]
subsd xmm2, xmm3
movsd QWORD PTR 288[rsp], xmm2
comisd xmm6, xmm2
jb .L900
movq xmm2, r10
movsd xmm6, QWORD PTR .LC11[rip]
subsd xmm2, xmm3
movsd QWORD PTR 312[rsp], xmm2
comisd xmm6, xmm2
jb .L900
movsd xmm2, QWORD PTR 160[rsp]
subsd xmm2, xmm3
movsd xmm3, QWORD PTR .LC17[rip]
comisd xmm3, xmm2
jb .L900
ucomisd xmm4, QWORD PTR .LC9[rip]
mov edx, 0
movsd xmm4, QWORD PTR 304[rsp]
setnp r9b
cmovne r9d, edx
ucomisd xmm5, QWORD PTR .LC14[rip]
movsd xmm5, QWORD PTR 296[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC12[rip]
movsd xmm5, QWORD PTR 16[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC6[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC18[rip]
setnp r8b
cmovne r8d, edx
or r8d, r9d
ucomisd xmm4, QWORD PTR .LC16[rip]
setnp r9b
cmovne r9d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC4[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm10, xmm3
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm11, QWORD PTR .LC7[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC4[rip]
movsd xmm5, QWORD PTR 272[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC8[rip]
movsd xmm5, QWORD PTR 288[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC1[rip]
movsd xmm5, QWORD PTR 312[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, xmm6
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L822
ucomisd xmm2, xmm3
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L822:
pxor xmm3, xmm3
movapd xmm4, xmm12
movsd xmm5, QWORD PTR .LC3[rip]
cvtss2sd xmm3, DWORD PTR 84[rsp]
subsd xmm4, xmm3
comisd xmm5, xmm4
jb .L900
movsd xmm5, QWORD PTR 184[rsp]
movsd xmm2, QWORD PTR .LC16[rip]
subsd xmm5, xmm3
comisd xmm2, xmm5
movsd QWORD PTR 16[rsp], xmm5
jb .L900
movsd xmm7, QWORD PTR 240[rsp]
subsd xmm7, xmm3
movsd QWORD PTR 240[rsp], xmm7
comisd xmm2, xmm7
jb .L900
movsd xmm2, QWORD PTR 280[rsp]
subsd xmm2, xmm3
movapd xmm5, xmm2
movsd xmm2, QWORD PTR .LC14[rip]
comisd xmm2, xmm5
jb .L900
movq xmm6, r11
movsd xmm2, QWORD PTR .LC18[rip]
subsd xmm6, xmm3
movsd QWORD PTR 272[rsp], xmm6
comisd xmm2, xmm6
jb .L900
movsd xmm2, QWORD PTR 208[rsp]
subsd xmm2, xmm3
movapd xmm7, xmm2
movsd xmm2, QWORD PTR .LC9[rip]
comisd xmm2, xmm7
jb .L900
movsd xmm8, QWORD PTR 144[rsp]
movsd xmm2, QWORD PTR .LC15[rip]
subsd xmm8, xmm3
comisd xmm2, xmm8
jb .L900
movsd xmm9, QWORD PTR 152[rsp]
movsd xmm2, QWORD PTR .LC14[rip]
subsd xmm9, xmm3
comisd xmm2, xmm9
jb .L900
movsd xmm2, QWORD PTR 192[rsp]
movsd xmm11, QWORD PTR .LC16[rip]
subsd xmm2, xmm3
movsd QWORD PTR 288[rsp], xmm2
comisd xmm11, xmm2
jb .L900
movsd xmm10, QWORD PTR 224[rsp]
movsd xmm11, QWORD PTR .LC18[rip]
subsd xmm10, xmm3
comisd xmm11, xmm10
jb .L900
movq xmm11, rdi
movsd xmm2, QWORD PTR .LC4[rip]
subsd xmm11, xmm3
comisd xmm2, xmm11
jb .L900
movsd xmm2, QWORD PTR 168[rsp]
movsd xmm6, QWORD PTR .LC16[rip]
subsd xmm2, xmm3
movsd QWORD PTR 168[rsp], xmm2
comisd xmm6, xmm2
jb .L900
movq xmm2, r10
movsd xmm6, QWORD PTR .LC8[rip]
subsd xmm2, xmm3
movsd QWORD PTR 296[rsp], xmm2
comisd xmm6, xmm2
jb .L900
movsd xmm2, QWORD PTR 248[rsp]
movsd xmm6, QWORD PTR .LC7[rip]
subsd xmm2, xmm3
comisd xmm6, xmm2
jb .L900
movsd xmm3, QWORD PTR 16[rsp]
ucomisd xmm3, QWORD PTR .LC16[rip]
mov edx, 0
movsd xmm3, QWORD PTR 296[rsp]
setnp r8b
mov r9d, r8d
cmovne r9d, edx
ucomisd xmm4, QWORD PTR .LC3[rip]
movsd xmm4, QWORD PTR 240[rsp]
setnp r8b
cmovne r8d, edx
or r8d, r9d
ucomisd xmm4, QWORD PTR .LC16[rip]
movsd xmm4, QWORD PTR 288[rsp]
setnp r9b
cmovne r9d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC14[rip]
movsd xmm5, QWORD PTR 272[rsp]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC18[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC9[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC15[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC14[rip]
setnp r8b
cmovne r8d, edx
or r8d, r9d
ucomisd xmm4, QWORD PTR .LC16[rip]
movsd xmm4, QWORD PTR 168[rsp]
setnp r9b
cmovne r9d, edx
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC18[rip]
setnp r8b
cmovne r8d, edx
or r9d, r8d
ucomisd xmm11, QWORD PTR .LC4[rip]
setnp r8b
cmovne r8d, edx
or r8d, r9d
ucomisd xmm4, QWORD PTR .LC16[rip]
setnp r9b
cmovne r9d, edx
or r9d, r8d
ucomisd xmm3, QWORD PTR .LC8[rip]
setnp r8b
cmovne r8d, edx
or r8b, r9b
jne .L837
ucomisd xmm2, xmm6
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L837:
movsd xmm4, QWORD PTR 216[rsp]
pxor xmm2, xmm2
movsd xmm5, QWORD PTR .LC10[rip]
cvtss2sd xmm2, DWORD PTR 132[rsp]
subsd xmm4, xmm2
comisd xmm5, xmm4
jb .L900
movapd xmm3, xmm0
movsd xmm5, QWORD PTR .LC4[rip]
subsd xmm3, xmm2
comisd xmm5, xmm3
jb .L900
movapd xmm5, xmm12
movsd xmm7, QWORD PTR .LC12[rip]
subsd xmm5, xmm2
comisd xmm7, xmm5
jb .L900
movq xmm6, rsi
movsd xmm7, QWORD PTR .LC0[rip]
subsd xmm6, xmm2
comisd xmm7, xmm6
movsd QWORD PTR 16[rsp], xmm6
jb .L900
movq xmm7, rcx
movsd xmm0, QWORD PTR .LC19[rip]
subsd xmm7, xmm2
comisd xmm0, xmm7
jb .L900
movsd xmm8, QWORD PTR 200[rsp]
movsd xmm0, QWORD PTR .LC3[rip]
subsd xmm8, xmm2
comisd xmm0, xmm8
jb .L900
movsd xmm9, QWORD PTR 184[rsp]
movsd xmm0, QWORD PTR .LC12[rip]
subsd xmm9, xmm2
comisd xmm0, xmm9
jb .L900
movsd xmm10, QWORD PTR 280[rsp]
subsd xmm10, xmm2
comisd xmm0, xmm10
jb .L900
movsd xmm11, QWORD PTR 208[rsp]
movsd xmm0, QWORD PTR .LC4[rip]
subsd xmm11, xmm2
comisd xmm0, xmm11
jb .L900
movsd xmm12, QWORD PTR 24[rsp]
movsd xmm0, QWORD PTR .LC11[rip]
subsd xmm12, xmm2
comisd xmm0, xmm12
jb .L900
movsd xmm0, QWORD PTR 152[rsp]
movsd xmm6, QWORD PTR .LC7[rip]
subsd xmm0, xmm2
movsd QWORD PTR 168[rsp], xmm0
comisd xmm6, xmm0
jb .L900
movq xmm0, rdi
movsd xmm6, QWORD PTR .LC11[rip]
subsd xmm0, xmm2
movsd QWORD PTR 240[rsp], xmm0
comisd xmm6, xmm0
jb .L900
movsd xmm0, QWORD PTR 248[rsp]
movsd xmm6, QWORD PTR .LC16[rip]
subsd xmm0, xmm2
movsd QWORD PTR 248[rsp], xmm0
comisd xmm6, xmm0
jb .L900
movsd xmm0, QWORD PTR 160[rsp]
subsd xmm0, xmm2
movsd xmm2, QWORD PTR .LC5[rip]
comisd xmm2, xmm0
jb .L900
ucomisd xmm3, QWORD PTR .LC4[rip]
mov r10d, 0
movsd xmm3, QWORD PTR 240[rsp]
setnp r9b
cmovne r9d, r10d
ucomisd xmm4, QWORD PTR .LC10[rip]
movsd xmm4, QWORD PTR 248[rsp]
setnp r8b
cmovne r8d, r10d
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC12[rip]
movsd xmm5, QWORD PTR 16[rsp]
setnp r8b
cmovne r8d, r10d
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC0[rip]
movsd xmm5, QWORD PTR 168[rsp]
setnp r8b
cmovne r8d, r10d
or r9d, r8d
ucomisd xmm7, QWORD PTR .LC19[rip]
setnp r8b
cmovne r8d, r10d
or r9d, r8d
ucomisd xmm8, QWORD PTR .LC3[rip]
setnp r8b
cmovne r8d, r10d
or r9d, r8d
ucomisd xmm9, QWORD PTR .LC12[rip]
setnp r8b
cmovne r8d, r10d
or r9d, r8d
ucomisd xmm10, QWORD PTR .LC12[rip]
setnp r8b
cmovne r8d, r10d
or r9d, r8d
ucomisd xmm11, QWORD PTR .LC4[rip]
setnp r8b
cmovne r8d, r10d
or r9d, r8d
ucomisd xmm12, QWORD PTR .LC11[rip]
setnp r8b
cmovne r8d, r10d
or r9d, r8d
ucomisd xmm5, QWORD PTR .LC7[rip]
setnp r8b
cmovne r8d, r10d
or r9d, r8d
ucomisd xmm3, QWORD PTR .LC11[rip]
setnp r8b
cmovne r8d, r10d
or r9d, r8d
ucomisd xmm4, xmm6
setnp r8b
cmovne r8d, r10d
or r8b, r9b
jne .L852
ucomisd xmm0, xmm2
setnp r9b
cmove r8d, r9d
test r8b, r8b
je .L900
.L852:
movsd xmm4, QWORD PTR 176[rsp]
pxor xmm0, xmm0
movsd xmm5, QWORD PTR .LC8[rip]
cvtss2sd xmm0, xmm1
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L900
movsd xmm3, QWORD PTR 216[rsp]
movsd xmm5, QWORD PTR .LC17[rip]
subsd xmm3, xmm0
comisd xmm5, xmm3
movsd QWORD PTR 16[rsp], xmm3
jb .L900
movapd xmm5, xmm13
movsd xmm2, QWORD PTR .LC10[rip]
subsd xmm5, xmm0
comisd xmm2, xmm5
jb .L900
movapd xmm6, xmm14
movsd xmm2, QWORD PTR .LC0[rip]
subsd xmm6, xmm0
comisd xmm2, xmm6
jb .L900
movsd xmm7, QWORD PTR 200[rsp]
movsd xmm2, QWORD PTR .LC13[rip]
subsd xmm7, xmm0
comisd xmm2, xmm7
jb .L900
movsd xmm8, QWORD PTR 280[rsp]
movsd xmm2, QWORD PTR .LC17[rip]
subsd xmm8, xmm0
comisd xmm2, xmm8
jb .L900
movsd xmm9, QWORD PTR 208[rsp]
movsd xmm2, QWORD PTR .LC0[rip]
subsd xmm9, xmm0
comisd xmm2, xmm9
jb .L900
movsd xmm10, QWORD PTR 24[rsp]
movsd xmm2, QWORD PTR .LC9[rip]
subsd xmm10, xmm0
comisd xmm2, xmm10
jb .L900
movsd xmm11, QWORD PTR 144[rsp]
movsd xmm2, QWORD PTR .LC6[rip]
subsd xmm11, xmm0
comisd xmm2, xmm11
jb .L900
movsd xmm12, QWORD PTR 152[rsp]
movsd xmm2, QWORD PTR .LC1[rip]
subsd xmm12, xmm0
comisd xmm2, xmm12
jb .L900
movsd xmm13, QWORD PTR 192[rsp]
movsd xmm2, QWORD PTR .LC5[rip]
subsd xmm13, xmm0
comisd xmm2, xmm13
jb .L900
movsd xmm14, QWORD PTR 224[rsp]
movsd xmm2, QWORD PTR .LC4[rip]
subsd xmm14, xmm0
comisd xmm2, xmm14
jb .L900
movsd xmm2, QWORD PTR 160[rsp]
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm2, xmm0
movsd QWORD PTR 144[rsp], xmm2
comisd xmm3, xmm2
jb .L900
movq xmm2, rdi
movsd xmm3, QWORD PTR .LC14[rip]
subsd xmm2, xmm0
comisd xmm3, xmm2
jb .L900
movsd xmm3, QWORD PTR 16[rsp]
ucomisd xmm3, QWORD PTR .LC17[rip]
mov r9d, 0
setnp r8b
cmovne r8d, r9d
ucomisd xmm4, QWORD PTR .LC8[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm5, QWORD PTR .LC10[rip]
movsd xmm5, QWORD PTR 144[rsp]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm6, QWORD PTR .LC0[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm7, QWORD PTR .LC13[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm8, QWORD PTR .LC17[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm9, QWORD PTR .LC0[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm10, QWORD PTR .LC9[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm11, QWORD PTR .LC6[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm12, QWORD PTR .LC1[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm13, QWORD PTR .LC5[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm14, QWORD PTR .LC4[rip]
setnp dil
cmovne edi, r9d
or r8d, edi
ucomisd xmm5, QWORD PTR .LC19[rip]
setnp dil
cmovne edi, r9d
or r8b, dil
jne .L867
ucomisd xmm2, QWORD PTR .LC14[rip]
setnp dil
cmove r8d, edi
test r8b, r8b
je .L900
.L867:
mov edi, 1
test r13d, r13d
jne .L430
movsd xmm0, QWORD PTR 256[rsp]
xor edi, edi
subsd xmm0, QWORD PTR 264[rsp]
comisd xmm0, QWORD PTR .LC1[rip]
setb dil
.L430:
cmp DWORD PTR 232[rsp], edi
jne .L900
test eax, eax
jne .L443
test r13d, r13d
jne .L431
movsd xmm0, QWORD PTR 256[rsp]
xor eax, eax
subsd xmm0, QWORD PTR 264[rsp]
comisd xmm0, QWORD PTR .LC1[rip]
setnb al
.L431:
cmp DWORD PTR 236[rsp], eax
jne .L900
mov esi, DWORD PTR 32[rsp]
mov eax, DWORD PTR 12[rsp]
mov ecx, esi
xor eax, 1
xor ecx, 1
or ecx, eax
je .L432
cmp DWORD PTR 360[rsp], 0
jne .L433
mov eax, DWORD PTR 232[rsp]
movsd xmm0, QWORD PTR 24[rsp]
subsd xmm0, QWORD PTR 184[rsp]
xor eax, 1
mov ecx, eax
and ecx, 1
comisd xmm0, QWORD PTR .LC1[rip]
setnb r8b
setb dil
or eax, esi
test al, 1
jne .L434
test dil, dil
je .L970
.L434:
test ebp, ebp
je .L900
test cl, cl
je .L441
mov ebp, 1
test r8b, r8b
jne .L436
.L441:
cmp DWORD PTR 236[rsp], 0
jne .L438
test BYTE PTR 232[rsp], 1
jne .L447
test dil, dil
je .L438
.L447:
mov ebp, 1
.L436:
cmp r12d, ebp
jne .L900
test ebx, ebx
js .L900
movss xmm6, DWORD PTR 136[rsp]
movss xmm7, DWORD PTR 116[rsp]
movss DWORD PTR 356[rsp], xmm1
movss xmm5, DWORD PTR 132[rsp]
movss xmm1, DWORD PTR 120[rsp]
movss DWORD PTR 336[rsp], xmm15
movss xmm4, DWORD PTR 128[rsp]
movss xmm2, DWORD PTR 104[rsp]
movss DWORD PTR 352[rsp], xmm6
movss DWORD PTR 344[rsp], xmm5
movss xmm6, DWORD PTR 124[rsp]
movss xmm5, DWORD PTR 112[rsp]
movss DWORD PTR 152[rsp], xmm4
movss xmm4, DWORD PTR 108[rsp]
movss DWORD PTR 176[rsp], xmm6
movss xmm6, DWORD PTR 100[rsp]
movss DWORD PTR 328[rsp], xmm1
movss xmm1, DWORD PTR 96[rsp]
movss DWORD PTR 168[rsp], xmm7
movss xmm7, DWORD PTR 92[rsp]
movss DWORD PTR 320[rsp], xmm5
movss xmm5, DWORD PTR 88[rsp]
movss DWORD PTR 312[rsp], xmm4
movss xmm4, DWORD PTR 84[rsp]
movss DWORD PTR 304[rsp], xmm2
movss xmm2, DWORD PTR 80[rsp]
movss DWORD PTR 296[rsp], xmm6
movss DWORD PTR 288[rsp], xmm1
movss DWORD PTR 216[rsp], xmm7
movss DWORD PTR 280[rsp], xmm5
movss DWORD PTR 16[rsp], xmm4
movss DWORD PTR 272[rsp], xmm2
movss xmm3, DWORD PTR 76[rsp]
movss xmm6, DWORD PTR 72[rsp]
movss xmm1, DWORD PTR 68[rsp]
movss xmm7, DWORD PTR 64[rsp]
mov DWORD PTR 232[rsp], r15d
movss xmm5, DWORD PTR 60[rsp]
movss xmm4, DWORD PTR 56[rsp]
mov DWORD PTR 32[rsp], r14d
mov eax, DWORD PTR 140[rsp]
movss xmm2, DWORD PTR 52[rsp]
movss DWORD PTR 200[rsp], xmm3
movss DWORD PTR 264[rsp], xmm6
movss xmm3, DWORD PTR 48[rsp]
movss xmm6, DWORD PTR 44[rsp]
movss DWORD PTR 208[rsp], xmm1
movss xmm1, DWORD PTR 40[rsp]
movss DWORD PTR 256[rsp], xmm7
movss xmm7, DWORD PTR 36[rsp]
mov DWORD PTR 236[rsp], eax
mov DWORD PTR 12[rsp], r12d
movss DWORD PTR 160[rsp], xmm5
movss DWORD PTR 144[rsp], xmm4
movss DWORD PTR 248[rsp], xmm2
movss DWORD PTR 192[rsp], xmm3
movss DWORD PTR 240[rsp], xmm6
movss DWORD PTR 184[rsp], xmm1
movss DWORD PTR 224[rsp], xmm7
jmp .L439
.L968:
pxor xmm0, xmm0
pxor xmm1, xmm1
cvtss2sd xmm0, DWORD PTR 192[rsp]
cvtss2sd xmm1, DWORD PTR 184[rsp]
subsd xmm0, xmm1
comisd xmm0, QWORD PTR .LC1[rip]
jb .L900
test r13d, r13d
je .L5
.L900:
add rsp, 376
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L969:
.cfi_restore_state
call __VERIFIER_nondet_int@PLT
mov ebx, eax
jmp .L9
.L438:
mov ebp, DWORD PTR 12[rsp]
jmp .L436
.L433:
test ebp, ebp
je .L900
jmp .L447
.L432:
test ebp, ebp
jne .L900
jmp .L436
.L443:
mov eax, 1
jmp .L431
.L970:
test ebp, ebp
jne .L900
jmp .L441
.cfi_endproc
.LFE1:
.size main, .-main
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long 0
.long -1070596096
.align 8
.LC1:
.long 0
.long -1071120384
.align 8
.LC2:
.long 0
.long -1071251456
.align 8
.LC3:
.long 0
.long -1070727168
.align 8
.LC4:
.long 0
.long -1071513600
.align 8
.LC5:
.long 0
.long -1070989312
.align 8
.LC6:
.long 0
.long -1073741824
.align 8
.LC7:
.long 0
.long -1070465024
.align 8
.LC8:
.long 0
.long -1070858240
.align 8
.LC9:
.long 0
.long -1071644672
.align 8
.LC10:
.long 0
.long -1070530560
.align 8
.LC11:
.long 0
.long -1072168960
.align 8
.LC12:
.long 0
.long -1070333952
.align 8
.LC13:
.long 0
.long -1071382528
.align 8
.LC14:
.long 0
.long -1071906816
.align 8
.LC15:
.long 0
.long -1072431104
.align 8
.LC16:
.long 0
.long -1074790400
.align 8
.LC17:
.long 0
.long -1072693248
.align 8
.LC18:
.long 0
.long -1073217536
.align 8
.LC19:
.long 0
.long -1070399488
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "9989.c"
.text
.align 2
.global __VERIFIER_nondet_bool
.syntax unified
.arm
.fpu softvfp
.type __VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
pop {r4, pc}
.size __VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
.global __aeabi_f2d
.global __aeabi_dsub
.global __aeabi_dcmple
.global __aeabi_dcmpge
.global __aeabi_dcmpeq
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 496
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #500
bl __VERIFIER_nondet_int
mov fp, r0
bl __VERIFIER_nondet_float
str r0, [sp, #208] @ float
bl __VERIFIER_nondet_int
subs r3, r0, #0
movne r3, #1
mov r9, r0
str r3, [sp, #4]
bl __VERIFIER_nondet_int
subs r3, r0, #0
movne r3, #1
mov r8, r0
str r3, [sp, #8]
bl __VERIFIER_nondet_int
subs r3, r0, #0
movne r3, #1
mov r10, r0
str r3, [sp, #224]
bl __VERIFIER_nondet_float
str r0, [sp, #168] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #232] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #176] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #240] @ float
bl __VERIFIER_nondet_int
subs r3, r0, #0
movne r3, #1
mov r5, r0
str r3, [sp, #228]
bl __VERIFIER_nondet_float
str r0, [sp, #136] @ float
bl __VERIFIER_nondet_float
mov r6, r0
str r0, [sp, #248] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #256] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #192] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #264] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #184] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #272] @ float
bl __VERIFIER_nondet_float
mov r4, r0
bl __VERIFIER_nondet_float
str r0, [sp, #280] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #200] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #288] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #296] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #304] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #312] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #320] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #152] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #328] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #160] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #144] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #336] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #344] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #352] @ float
bl __VERIFIER_nondet_float
mov r3, r0
mov r0, r6
str r3, [sp, #360] @ float
bl __aeabi_f2d
mov r6, r0
ldr r0, [sp, #136] @ float
mov r7, r1
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r2, #0
ldr r3, .L1302
bl __aeabi_dcmple
cmp r0, #0
bne .L5
cmp r5, #0
beq .L1299
.L5:
orrs r3, r8, r9
bne .L1266
cmp fp, #0
blt .L1266
mov r10, fp
.L805:
ldr r3, [sp, #4]
ldr r2, [sp, #8]
ands r3, r3, r2
str r3, [sp, #380]
subeq r10, r10, #1
bne .L1300
.L9:
bl __VERIFIER_nondet_float
str r0, [sp, #12] @ float
bl __VERIFIER_nondet_int
subs r3, r0, #0
movne r3, #1
str r3, [sp, #120]
bl __VERIFIER_nondet_int
subs r3, r0, #0
movne r3, #1
mov fp, r0
str r3, [sp, #132]
bl __VERIFIER_nondet_int
subs r2, r0, #0
movne r2, #1
str r0, [sp, #376]
str r2, [sp, #128]
bl __VERIFIER_nondet_float
str r0, [sp, #16] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #20] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #24] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #28] @ float
bl __VERIFIER_nondet_int
subs r2, r0, #0
movne r2, #1
mov r9, r0
str r2, [sp, #124]
bl __VERIFIER_nondet_float
str r0, [sp, #32] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #36] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #40] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #44] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #48] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #52] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #56] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #60] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #64] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #68] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #72] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #76] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #80] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #84] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #88] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #92] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #96] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #100] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #104] @ float
bl __VERIFIER_nondet_float
mov r8, r0
bl __VERIFIER_nondet_float
str r0, [sp, #108] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #112] @ float
bl __VERIFIER_nondet_float
mov r3, r0
mov r0, r4
str r3, [sp, #116] @ float
bl __aeabi_f2d
mov r2, r0
mov r0, r8
mov r6, r2
mov r7, r1
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r0, r6
mov r1, r7
mov r2, r4
mov r3, r5
str r6, [sp, #216]
str r7, [sp, #220]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1302+32
str r6, [sp, #368]
str r7, [sp, #372]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #136] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #136]
str r7, [sp, #140]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1302+36
str r6, [sp, #384]
str r7, [sp, #388]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #144] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #144]
str r7, [sp, #148]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1302+8
str r6, [sp, #392]
str r7, [sp, #396]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #152] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #152]
str r7, [sp, #156]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1302+44
str r6, [sp, #400]
str r7, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #160] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #160]
str r7, [sp, #164]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1302+36
str r6, [sp, #408]
str r7, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #184] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #184]
str r7, [sp, #188]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
mov r3, #-1073741824
str r6, [sp, #416]
str r7, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #192] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #192]
str r7, [sp, #196]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1302+28
str r6, [sp, #432]
str r7, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #200] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #424]
str r7, [sp, #428]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1302+12
str r6, [sp, #440]
str r7, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #208] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #200]
str r7, [sp, #204]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1302+76
str r6, [sp, #448]
str r7, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #176] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #176]
str r7, [sp, #180]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1302+76
str r6, [sp, #456]
str r7, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #288] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #208]
str r7, [sp, #212]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1302+68
str r6, [sp, #464]
str r7, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #280] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #280]
str r7, [sp, #284]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1302+12
str r6, [sp, #472]
str r7, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #248] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #248]
str r7, [sp, #252]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1302+8
str r6, [sp, #480]
str r7, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #352] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #288]
str r7, [sp, #292]
bl __aeabi_dsub
mov r2, #0
ldr r3, .L1302+20
mov r6, r0
mov r7, r1
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #368
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+32
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1302+36
add r1, sp, #384
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #392
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
mov r2, #0
mov r0, r6
mov r1, r7
ldr r3, .L1302+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #360] @ float
bl __aeabi_f2d
mov r2, r0
ldr r0, [sp, #28] @ float
mov r4, r2
mov r5, r1
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r0, r4
mov r1, r5
mov r2, r6
mov r3, r7
str r4, [sp, #352]
str r5, [sp, #356]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+48
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #216
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+20
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #144
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+60
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #160
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+52
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #168] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, r6
mov r3, r7
str r4, [sp, #360]
str r5, [sp, #364]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+56
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #296] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, r6
mov r3, r7
str r4, [sp, #392]
str r5, [sp, #396]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+8
str r4, [sp, #296]
str r5, [sp, #300]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+44
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #232] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, r6
mov r3, r7
str r4, [sp, #368]
str r5, [sp, #372]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+40
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #320] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, r6
mov r3, r7
str r4, [sp, #384]
str r5, [sp, #388]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #320]
str r5, [sp, #324]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #312] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, r6
mov r3, r7
str r4, [sp, #312]
str r5, [sp, #316]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+60
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #280
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+36
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #272] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, r6
mov r3, r7
str r4, [sp, #272]
str r5, [sp, #276]
str r6, [sp, #168]
str r7, [sp, #172]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+28
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #336] @ float
bl __aeabi_f2d
add r3, sp, #168
ldmia r3, {r2-r3}
mov r6, r0
mov r7, r1
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+72
str r4, [sp, #336]
str r5, [sp, #340]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #248
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+72
str r4, [sp, #168]
str r5, [sp, #172]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+20
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1302+48
add r1, sp, #400
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #296
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #232
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #320
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #336
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #168
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #36] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #352
ldmia r1, {r0-r1}
str r2, [sp, #168]
str r3, [sp, #172]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+52
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #344] @ float
bl __aeabi_f2d
add r3, sp, #168
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #320]
str r5, [sp, #324]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+8
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #216
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+32
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+76
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #304] @ float
bl __aeabi_f2d
add r3, sp, #168
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #336]
str r5, [sp, #340]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+28
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #328] @ float
bl __aeabi_f2d
add r3, sp, #168
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #296]
str r5, [sp, #300]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+60
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+8
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #384
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+60
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+4
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+48
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
b .L1303
.L1304:
.align 2
.L1302:
.word -1070596096
.word -1072693248
.word -1071513600
.word -1070858240
.word -1070596096
.word -1070530560
.word -1073217536
.word -1070465024
.word -1071251456
.word -1070727168
.word -1072431104
.word -1070989312
.word -1072168960
.word -1071382528
.word -1071906816
.word -1070333952
.word -1070399488
.word -1071120384
.word -1074790400
.word -1071644672
.L1303:
add r3, sp, #168
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+60
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #240] @ float
bl __aeabi_f2d
add r3, sp, #168
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+8
str r4, [sp, #168]
str r5, [sp, #172]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+8
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1302+52
add r1, sp, #232
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #168
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #112] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #352
ldmia r1, {r0-r1}
str r2, [sp, #168]
str r3, [sp, #172]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+24
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #216
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+52
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+16
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+72
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+12
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+48
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+16
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #392
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+40
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+28
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+16
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #264] @ float
bl __aeabi_f2d
add r3, sp, #168
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #264]
str r5, [sp, #268]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+28
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #304
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #248
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+52
str r4, [sp, #168]
str r5, [sp, #172]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+52
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1302+24
add r1, sp, #232
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #168
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #40] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #352
ldmia r1, {r0-r1}
str r2, [sp, #168]
str r3, [sp, #172]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+24
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #216
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+72
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+64
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+68
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #192
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+36
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #424
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+20
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+52
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+24
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+36
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+76
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
ldr r0, [sp, #256] @ float
bl __aeabi_f2d
add r3, sp, #168
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+32
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+28
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+32
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #248
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+36
str r4, [sp, #168]
str r5, [sp, #172]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+72
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1302+24
add r1, sp, #232
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #168
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #48] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #144
ldmia r1, {r0-r1}
str r2, [sp, #168]
str r3, [sp, #172]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+56
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+76
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+68
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #392
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+40
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #424
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+60
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #384
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+44
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+48
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+52
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+60
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+56
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+60
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #240
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+64
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+68
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #248
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1302+72
str r4, [sp, #168]
str r5, [sp, #172]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1302+76
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1305
add r1, sp, #232
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #168
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #56] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #216
ldmia r1, {r0-r1}
str r2, [sp, #168]
str r3, [sp, #172]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+12
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+48
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+4
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+56
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+36
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #392
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+72
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+44
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+32
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+28
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #240
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+56
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #304
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+8
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #168]
str r5, [sp, #172]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1305+12
add r1, sp, #232
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #168
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #64] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #352
ldmia r1, {r0-r1}
str r2, [sp, #168]
str r3, [sp, #172]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+28
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+52
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+68
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+44
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+60
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+20
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+32
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #384
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+68
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+16
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+72
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+44
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #240
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+32
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+56
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+32
str r4, [sp, #168]
str r5, [sp, #172]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+52
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1305+28
add r1, sp, #232
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #168
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #72] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #352
ldmia r1, {r0-r1}
str r2, [sp, #168]
str r3, [sp, #172]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+52
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+36
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+4
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+20
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+56
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+8
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+60
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+48
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #384
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+56
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+44
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+36
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+12
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+24
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #248
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+16
str r4, [sp, #168]
str r5, [sp, #172]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+36
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1305+52
add r1, sp, #232
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+60
b .L1306
.L1307:
.align 2
.L1305:
.word -1071906816
.word -1071120384
.word -1070989312
.word -1073217536
.word -1071251456
.word -1071513600
.word -1070399488
.word -1070596096
.word -1071382528
.word -1072431104
.word -1070530560
.word -1070727168
.word -1072168960
.word -1074790400
.word -1070465024
.word -1072693248
.word -1071120384
.word -1070333952
.word -1071644672
.word -1070858240
.L1306:
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #168
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #24] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #320
ldmia r1, {r0-r1}
str r2, [sp, #168]
str r3, [sp, #172]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+16
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+12
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+20
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #192
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+52
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+16
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+52
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+20
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+72
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+40
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #240
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+12
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+48
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+32
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #168
ldmia r3, {r2-r3}
add r1, sp, #248
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+16
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+16
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
mov r3, #-1073741824
add r1, sp, #232
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #84] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #352
ldmia r1, {r0-r1}
str r2, [sp, #232]
str r3, [sp, #236]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+32
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+16
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+60
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+24
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+60
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+20
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+60
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+72
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+64
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #240
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+60
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+24
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #248
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+24
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+28
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #304
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+44
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+16
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1305+32
add r1, sp, #256
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #232
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #12] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #216
ldmia r1, {r0-r1}
str r2, [sp, #232]
str r3, [sp, #236]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+40
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+60
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+44
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #192
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+48
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+52
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+56
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+60
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+64
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+68
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #240
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+72
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #248
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+76
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+32
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #304
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1305+36
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+60
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1305+40
add r1, sp, #256
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1305+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #232
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #88] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #152
ldmia r1, {r0-r1}
str r2, [sp, #232]
str r3, [sp, #236]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #192
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+28
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #424
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+64
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+4
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+64
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+28
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+36
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+4
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #240
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+28
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+36
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #304
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+36
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1308
add r1, sp, #256
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #232
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #20] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #352
ldmia r1, {r0-r1}
str r2, [sp, #232]
str r3, [sp, #236]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+16
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #216
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+28
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+12
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+72
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+20
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+80
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+52
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+12
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #424
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+72
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+28
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+44
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+72
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+32
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+28
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+28
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1308+16
add r1, sp, #256
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #232
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #68] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #136
ldmia r1, {r0-r1}
str r2, [sp, #232]
str r3, [sp, #236]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+20
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+44
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+8
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+8
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+36
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+64
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+36
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+8
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+48
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+8
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+24
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+24
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1308+20
add r1, sp, #256
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #232
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #76] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #320
ldmia r1, {r0-r1}
str r2, [sp, #232]
str r3, [sp, #236]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+40
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+64
str r4, [sp, #328]
str r5, [sp, #332]
b .L1309
.L1310:
.align 2
.L1308:
.word -1071382528
.word -1072431104
.word -1072168960
.word -1071906816
.word -1070858240
.word -1070465024
.word -1070399488
.word -1071644672
.word -1071251456
.word -1072693248
.word -1071120384
.word -1070530560
.word -1070596096
.word -1070989312
.word -1073217536
.word -1072431104
.word -1070727168
.word -1071382528
.word -1071513600
.word -1074790400
.word -1070333952
.L1309:
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+40
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+12
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #384
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+68
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+60
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+44
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+20
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+12
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+28
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+32
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #304
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #240
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+16
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+64
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1308+40
add r1, sp, #256
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #232
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #16] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #352
ldmia r1, {r0-r1}
str r2, [sp, #232]
str r3, [sp, #236]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+72
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #216
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+52
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+36
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+44
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+44
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+80
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+76
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+20
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #384
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+72
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+24
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+28
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #248
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+36
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+60
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #304
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+72
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+52
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1308+72
add r1, sp, #256
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #96] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
add r1, sp, #352
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+36
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+32
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #216
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+64
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+72
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+44
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+80
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #192
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+40
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+44
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #392
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+48
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #424
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+52
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+56
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+72
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+60
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+32
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1308+36
add r1, sp, #328
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1308+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #80] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
add r1, sp, #320
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+64
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #216
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+68
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+72
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+76
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #192
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1308+80
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #392
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+20
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+16
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+72
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #240
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+8
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+76
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #248
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+44
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+32
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1311+4
add r1, sp, #328
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #44] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
add r1, sp, #352
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+16
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #216
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+36
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+48
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+28
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+8
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #392
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+64
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #424
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+40
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+40
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #384
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+12
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+52
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+32
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+76
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1311+16
add r1, sp, #328
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #52] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
add r1, sp, #352
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+20
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+76
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+48
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+12
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #392
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+40
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+48
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+48
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+4
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+16
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+36
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+52
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+76
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1311+20
add r1, sp, #328
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #100] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
add r1, sp, #320
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+32
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+28
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+60
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+16
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+4
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+4
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #424
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+68
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+40
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
b .L1312
.L1313:
.align 2
.L1311:
.word -1074790400
.word -1070727168
.word -1072431104
.word -1071251456
.word -1072168960
.word -1070399488
.word -1070989312
.word -1070596096
.word -1071382528
.word -1070530560
.word -1071906816
.word -1071644672
.word -1070333952
.word -1073217536
.word -1074790400
.word -1072693248
.word -1070465024
.word -1071513600
.word -1070858240
.word -1071120384
.L1312:
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+44
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+72
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #240
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+40
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #304
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+8
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #248
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+36
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+32
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1311+56
add r1, sp, #328
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #92] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
add r1, sp, #352
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+64
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+56
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #216
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+60
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+12
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+28
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #424
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+12
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+72
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+20
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+16
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+64
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+36
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+68
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+20
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #304
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+64
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+56
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1311+64
add r1, sp, #328
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #104] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
add r1, sp, #352
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+24
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+76
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+68
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+28
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+72
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #384
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+32
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+56
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+56
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+52
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #240
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+60
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+36
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #248
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+56
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+76
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1311+24
add r1, sp, #328
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1311+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #32] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
add r1, sp, #320
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+40
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #216
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+44
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+48
str r4, [sp, #152]
str r5, [sp, #156]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+52
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #192
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+56
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+68
str r4, [sp, #336]
str r5, [sp, #340]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #392
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+60
str r4, [sp, #392]
str r5, [sp, #396]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #424
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+64
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+68
str r4, [sp, #432]
str r5, [sp, #436]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+72
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1311+76
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #248
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+4
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+52
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1314+68
add r1, sp, #328
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #152
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #336
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #392
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #432
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #60] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
add r1, sp, #136
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #152]
str r5, [sp, #156]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+28
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #152
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+16
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #152
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+16
str r4, [sp, #336]
str r5, [sp, #340]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #152
ldmia r3, {r2-r3}
add r1, sp, #384
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+68
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #152
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+12
str r4, [sp, #200]
str r5, [sp, #204]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #152
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+52
str r4, [sp, #368]
str r5, [sp, #372]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #152
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+32
str r4, [sp, #392]
str r5, [sp, #396]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #152
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+68
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #152
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+16
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #152
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+12
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #152
ldmia r3, {r2-r3}
add r1, sp, #240
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+60
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r3, sp, #152
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+16
str r4, [sp, #288]
str r5, [sp, #292]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r5, sp, #152
ldmia r5, {r4-r5}
mov r0, r6
mov r1, r7
mov r2, r4
mov r3, r5
bl __aeabi_dsub
mov r2, #0
ldr r3, .L1314+24
mov r6, r0
mov r7, r1
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+20
str r4, [sp, #152]
str r5, [sp, #156]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+16
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1314+28
add r1, sp, #256
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #336
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #200
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #368
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #392
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #288
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
mov r2, #0
mov r1, r7
ldr r3, .L1314+24
mov r0, r6
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #152
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #108] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
add r1, sp, #320
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+36
str r4, [sp, #152]
str r5, [sp, #156]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #216
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+60
str r4, [sp, #200]
str r5, [sp, #204]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #136
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+8
str r4, [sp, #136]
str r5, [sp, #140]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #184
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+48
str r4, [sp, #184]
str r5, [sp, #188]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #192
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+64
str r4, [sp, #192]
str r5, [sp, #196]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #296
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+28
str r4, [sp, #216]
str r5, [sp, #220]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #360
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+8
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #384
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+8
str r4, [sp, #288]
str r5, [sp, #292]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #312
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+60
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #176
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314
str r4, [sp, #336]
str r5, [sp, #340]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #280
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+20
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314
str r4, [sp, #368]
str r5, [sp, #372]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+16
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #248
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r2, #0
ldr r3, .L1314+56
mov r6, r0
mov r7, r1
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #200
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+60
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1314+36
add r1, sp, #152
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #136
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #184
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #192
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #216
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #288
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #328
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #336
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #368
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
mov r2, #0
mov r0, r6
mov r1, r7
ldr r3, .L1314+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r0, [sp, #116] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
add r1, sp, #352
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+24
str r4, [sp, #136]
str r5, [sp, #140]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #320
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+4
str r4, [sp, #152]
str r5, [sp, #156]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #144
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+36
str r4, [sp, #144]
str r5, [sp, #148]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #160
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+48
str r4, [sp, #160]
str r5, [sp, #164]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #296
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+40
str r4, [sp, #184]
str r5, [sp, #188]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #384
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+4
str r4, [sp, #192]
str r5, [sp, #196]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #312
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+48
str r4, [sp, #200]
str r5, [sp, #204]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #176
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+52
str r4, [sp, #216]
str r5, [sp, #220]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #208
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #208]
str r5, [sp, #212]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #280
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+72
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #272
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+56
str r4, [sp, #272]
str r5, [sp, #276]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #264
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+60
str r4, [sp, #264]
str r5, [sp, #268]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #248
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1314+64
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r2, #0
ldr r3, .L1314+68
mov r6, r0
mov r7, r1
bl __aeabi_dcmple
cmp r0, #0
beq .L1266
add r1, sp, #152
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+4
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1314+24
add r1, sp, #136
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #144
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #160
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
b .L1315
.L1316:
.align 2
.L1314:
.word -1072168960
.word -1072693248
.word -1070333952
.word -1073217536
.word -1074790400
.word -1070465024
.word -1070858240
.word -1070727168
.word -1072431104
.word -1070530560
.word -1071382528
.word -1072693248
.word -1070596096
.word -1071644672
.word -1070989312
.word -1071513600
.word -1070399488
.word -1071906816
.word -1071120384
.L1315:
mov ip, r0
add r1, sp, #184
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #192
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #200
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #216
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #208
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #272
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #264
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #248
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1314+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
mov r2, #0
mov r0, r6
mov r1, r7
ldr r3, .L1314+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L1266
ldr r3, [sp, #376]
cmp r3, #0
movne r3, #1
bne .L794
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
ldr r3, .L1314+72
mov r2, #0
bl __aeabi_dcmpge
clz r3, r0
lsr r3, r3, #5
.L794:
ldr r2, [sp, #224]
cmp r2, r3
bne .L1266
cmp r9, #0
movne r9, #1
bne .L796
ldr r3, [sp, #376]
cmp r3, #0
bne .L796
add r3, sp, #232
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L1314+72
bl __aeabi_dcmpge
subs r9, r0, #0
movne r9, #1
.L796:
ldr r3, [sp, #228]
cmp r3, r9
bne .L1266
ldr r4, [sp, #8]
ldr r2, [sp, #4]
eor r3, r4, #1
eor r2, r2, #1
orrs r3, r3, r2
beq .L798
ldr r3, [sp, #380]
cmp r3, #0
bne .L799
add r3, sp, #360
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L1314+72
bl __aeabi_dcmpge
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #224]
eor r0, r2, #1
eor r3, r3, #1
orr r1, r3, r4
and r1, r1, #1
orrs r1, r0, r1
and r3, r3, #1
beq .L1301
cmp fp, #0
beq .L1266
tst r3, r2
bne .L813
.L807:
ldr r3, [sp, #228]
cmp r3, #0
bne .L804
ldr r3, [sp, #224]
and r3, r3, #1
orrs r3, r0, r3
beq .L804
.L813:
mov fp, #1
.L803:
ldr r3, [sp, #120]
cmp r3, fp
bne .L1266
cmp r10, #0
blt .L1266
ldr r3, [sp, #116] @ float
ldr r4, [sp, #60] @ float
str r3, [sp, #360] @ float
ldr r3, [sp, #112] @ float
str r8, [sp, #336] @ float
str r3, [sp, #352] @ float
ldr r3, [sp, #108] @ float
str r3, [sp, #344] @ float
ldr r3, [sp, #104] @ float
str r3, [sp, #144] @ float
ldr r3, [sp, #100] @ float
str r3, [sp, #160] @ float
ldr r3, [sp, #96] @ float
str r3, [sp, #328] @ float
ldr r3, [sp, #92] @ float
str r3, [sp, #152] @ float
ldr r3, [sp, #88] @ float
str r3, [sp, #320] @ float
ldr r3, [sp, #84] @ float
str r3, [sp, #312] @ float
ldr r3, [sp, #80] @ float
str r3, [sp, #304] @ float
ldr r3, [sp, #76] @ float
str r3, [sp, #296] @ float
ldr r3, [sp, #72] @ float
str r3, [sp, #288] @ float
ldr r3, [sp, #68] @ float
str r3, [sp, #200] @ float
ldr r3, [sp, #64] @ float
str r3, [sp, #280] @ float
ldr r3, [sp, #56] @ float
str r3, [sp, #272] @ float
ldr r3, [sp, #52] @ float
str r3, [sp, #184] @ float
ldr r3, [sp, #48] @ float
str r3, [sp, #264] @ float
ldr r3, [sp, #44] @ float
str r3, [sp, #192] @ float
ldr r3, [sp, #40] @ float
str r3, [sp, #256] @ float
ldr r3, [sp, #36] @ float
str r3, [sp, #248] @ float
ldr r3, [sp, #32] @ float
str r3, [sp, #136] @ float
ldr r3, [sp, #124]
str r3, [sp, #228]
ldr r3, [sp, #28] @ float
str r3, [sp, #240] @ float
ldr r3, [sp, #24] @ float
str r3, [sp, #176] @ float
ldr r3, [sp, #20] @ float
str r3, [sp, #232] @ float
ldr r3, [sp, #16] @ float
str r3, [sp, #168] @ float
ldr r3, [sp, #128]
str r3, [sp, #224]
ldr r3, [sp, #132]
str r3, [sp, #8]
ldr r3, [sp, #120]
str r3, [sp, #4]
ldr r3, [sp, #12] @ float
str r3, [sp, #208] @ float
b .L805
.L1299:
ldr r0, [sp, #176] @ float
bl __aeabi_f2d
mov r6, r0
ldr r0, [sp, #168] @ float
mov r7, r1
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r2, #0
ldr r3, .L1314+72
bl __aeabi_dcmpge
clz r10, r10
cmp r0, #0
lsr r10, r10, #5
moveq r10, #0
cmp r10, #0
bne .L5
.L1266:
mov r0, #0
add sp, sp, #500
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1300:
bl __VERIFIER_nondet_int
mov r10, r0
b .L9
.L1301:
cmp fp, #0
bne .L1266
b .L807
.L799:
cmp fp, #0
beq .L1266
b .L813
.L798:
cmp fp, #0
bne .L1266
b .L803
.L804:
ldr fp, [sp, #4]
b .L803
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99890.c"
.intel_syntax noprefix
.text
.p2align 4
.globl test
.type test, @function
test:
.LFB0:
.cfi_startproc
endbr64
mov eax, DWORD PTR j[rip]
add eax, DWORD PTR i[rip]
ret
.cfi_endproc
.LFE0:
.size test, .-test
.globl j
.bss
.align 4
.type j, @object
.size j, 4
j:
.zero 4
.globl i
.align 4
.type i, @object
.size i, 4
i:
.zero 4
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99890.c"
.text
.align 2
.global test
.syntax unified
.arm
.fpu softvfp
.type test, %function
test:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r2, .L3
ldr r3, .L3+4
ldr r0, [r2]
ldr r3, [r3]
add r0, r0, r3
bx lr
.L4:
.align 2
.L3:
.word i
.word j
.size test, .-test
.comm j,4,4
.comm i,4,4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "998902.c"
.intel_syntax noprefix
.text
.p2align 4
.globl do_nothing_useful
.type do_nothing_useful, @function
do_nothing_useful:
.LFB0:
.cfi_startproc
endbr64
mov eax, edi
shr eax, 31
ret
.cfi_endproc
.LFE0:
.size do_nothing_useful, .-do_nothing_useful
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "998902.c"
.text
.align 2
.global do_nothing_useful
.syntax unified
.arm
.fpu softvfp
.type do_nothing_useful, %function
do_nothing_useful:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
lsr r0, r0, #31
bx lr
.size do_nothing_useful, .-do_nothing_useful
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "998908.c"
.intel_syntax noprefix
.text
.p2align 4
.globl herwig6_addressc_
.type herwig6_addressc_, @function
herwig6_addressc_:
.LFB0:
.cfi_startproc
endbr64
mov rax, rdi
ret
.cfi_endproc
.LFE0:
.size herwig6_addressc_, .-herwig6_addressc_
.p2align 4
.globl herwig6_addressi_
.type herwig6_addressi_, @function
herwig6_addressi_:
.LFB7:
.cfi_startproc
endbr64
mov rax, rdi
ret
.cfi_endproc
.LFE7:
.size herwig6_addressi_, .-herwig6_addressi_
.p2align 4
.globl herwig6_addressf_
.type herwig6_addressf_, @function
herwig6_addressf_:
.LFB9:
.cfi_startproc
endbr64
mov rax, rdi
ret
.cfi_endproc
.LFE9:
.size herwig6_addressf_, .-herwig6_addressf_
.p2align 4
.globl herwig6_addressd_
.type herwig6_addressd_, @function
herwig6_addressd_:
.LFB11:
.cfi_startproc
endbr64
mov rax, rdi
ret
.cfi_endproc
.LFE11:
.size herwig6_addressd_, .-herwig6_addressd_
.p2align 4
.globl herwig6_addressl_
.type herwig6_addressl_, @function
herwig6_addressl_:
.LFB13:
.cfi_startproc
endbr64
mov rax, rdi
ret
.cfi_endproc
.LFE13:
.size herwig6_addressl_, .-herwig6_addressl_
.p2align 4
.globl herwig6_addressdc_
.type herwig6_addressdc_, @function
herwig6_addressdc_:
.LFB15:
.cfi_startproc
endbr64
mov rax, rdi
ret
.cfi_endproc
.LFE15:
.size herwig6_addressdc_, .-herwig6_addressdc_
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "998908.c"
.text
.align 2
.global herwig6_addressc_
.syntax unified
.arm
.fpu softvfp
.type herwig6_addressc_, %function
herwig6_addressc_:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
bx lr
.size herwig6_addressc_, .-herwig6_addressc_
.align 2
.global herwig6_addressi_
.syntax unified
.arm
.fpu softvfp
.type herwig6_addressi_, %function
herwig6_addressi_:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
bx lr
.size herwig6_addressi_, .-herwig6_addressi_
.align 2
.global herwig6_addressf_
.syntax unified
.arm
.fpu softvfp
.type herwig6_addressf_, %function
herwig6_addressf_:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
bx lr
.size herwig6_addressf_, .-herwig6_addressf_
.align 2
.global herwig6_addressd_
.syntax unified
.arm
.fpu softvfp
.type herwig6_addressd_, %function
herwig6_addressd_:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
bx lr
.size herwig6_addressd_, .-herwig6_addressd_
.align 2
.global herwig6_addressl_
.syntax unified
.arm
.fpu softvfp
.type herwig6_addressl_, %function
herwig6_addressl_:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
bx lr
.size herwig6_addressl_, .-herwig6_addressl_
.align 2
.global herwig6_addressdc_
.syntax unified
.arm
.fpu softvfp
.type herwig6_addressdc_, %function
herwig6_addressdc_:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
bx lr
.size herwig6_addressdc_, .-herwig6_addressdc_
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99891.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99891.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99892.c"
.intel_syntax noprefix
.text
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "---------------------------------"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Address of arr[%d][%d] = %d\n"
.text
.p2align 4
.globl display
.type display, @function
display:
.LFB40:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
movsx rax, esi
mov r15d, edi
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
xor r13d, r13d
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
lea r12, .LC1[rip]
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov rbp, rax
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
xor ebx, ebx
sub rsp, 40
.cfi_def_cfa_offset 96
mov DWORD PTR 20[rsp], edi
lea rdi, .LC0[rip]
mov QWORD PTR 24[rsp], rdx
mov QWORD PTR 8[rsp], rax
call puts@PLT
test r15d, r15d
jle .L3
.p2align 4,,10
.p2align 3
.L2:
mov rax, QWORD PTR 24[rsp]
xor r14d, r14d
lea r15, [rax+r13*4]
test ebp, ebp
jle .L6
.p2align 4,,10
.p2align 3
.L4:
mov r8, r15
mov ecx, r14d
mov edx, ebx
mov rsi, r12
mov edi, 1
xor eax, eax
add r14d, 1
add r15, 4
call __printf_chk@PLT
cmp ebp, r14d
jne .L4
.L6:
mov edi, 10
add ebx, 1
call putchar@PLT
add r13, QWORD PTR 8[rsp]
cmp DWORD PTR 20[rsp], ebx
jne .L2
.L3:
add rsp, 40
.cfi_def_cfa_offset 56
lea rdi, .LC0[rip]
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
jmp puts@PLT
.cfi_endproc
.LFE40:
.size display, .-display
.section .rodata.str1.1
.LC2:
.string "value at arr[2] = %d\n"
.LC3:
.string "address of arr[1][3] = %d\n"
.LC4:
.string "value of arr[0][1] = %d\n"
.LC5:
.string "pause"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
sub rsp, 72
.cfi_def_cfa_offset 80
mov esi, 4
mov edi, 3
mov rax, QWORD PTR fs:40
mov QWORD PTR 56[rsp], rax
movabs rax, 8589934593
mov rdx, rsp
mov QWORD PTR [rsp], rax
movabs rax, 17179869187
mov QWORD PTR 8[rsp], rax
movabs rax, 85899345930
mov QWORD PTR 16[rsp], rax
movabs rax, 171798691870
mov QWORD PTR 24[rsp], rax
movabs rax, 858993459300
mov QWORD PTR 32[rsp], rax
movabs rax, 1717986918700
mov QWORD PTR 40[rsp], rax
call display
mov edx, DWORD PTR 32[rsp]
mov edi, 1
xor eax, eax
lea rsi, .LC2[rip]
call __printf_chk@PLT
lea rdx, 28[rsp]
lea rsi, .LC3[rip]
xor eax, eax
mov edi, 1
call __printf_chk@PLT
mov edx, DWORD PTR 4[rsp]
mov edi, 1
xor eax, eax
lea rsi, .LC4[rip]
call __printf_chk@PLT
lea rdi, .LC5[rip]
call system@PLT
mov rax, QWORD PTR 56[rsp]
sub rax, QWORD PTR fs:40
jne .L17
xor eax, eax
add rsp, 72
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE39:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99892.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC1:
.ascii "---------------------------------\000"
.align 2
.LC2:
.ascii "Address of arr[%d][%d] = %d\012\000"
.text
.align 2
.global display
.syntax unified
.arm
.fpu softvfp
.type display, %function
display:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r10, r0
sub sp, sp, #12
ldr r0, .L11
mov r7, r1
mov fp, r2
bl puts
cmp r10, #0
ble .L3
mov r9, #0
mov r6, r9
ldr r8, .L11+4
.L2:
cmp r7, #0
movgt r4, #0
addgt r5, fp, r9, lsl #2
ble .L6
.L4:
mov r3, r4
str r5, [sp]
mov r2, r6
mov r1, r8
mov r0, #1
add r4, r4, #1
bl __printf_chk
cmp r7, r4
add r5, r5, #4
bne .L4
.L6:
mov r0, #10
add r6, r6, #1
bl putchar
cmp r10, r6
add r9, r9, r7
bne .L2
.L3:
ldr r0, .L11
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
b puts
.L12:
.align 2
.L11:
.word .LC1
.word .LC2
.size display, .-display
.section .rodata.str1.4
.align 2
.LC3:
.ascii "value at arr[2] = %d\012\000"
.align 2
.LC4:
.ascii "address of arr[1][3] = %d\012\000"
.align 2
.LC5:
.ascii "value of arr[0][1] = %d\012\000"
.align 2
.LC6:
.ascii "pause\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC7:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr lr, .L17
sub sp, sp, #60
add ip, sp, #4
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldm lr, {r0, r1, r2, r3}
stm ip, {r0, r1, r2, r3}
ldr r3, .L17+4
mov r1, #4
mov r0, #3
add r2, sp, #4
ldr r3, [r3]
str r3, [sp, #52]
mov r3,#0
bl display
ldr r2, [sp, #36]
ldr r1, .L17+8
mov r0, #1
bl __printf_chk
ldr r1, .L17+12
add r2, sp, #32
mov r0, #1
bl __printf_chk
ldr r2, [sp, #8]
ldr r1, .L17+16
mov r0, #1
bl __printf_chk
ldr r0, .L17+20
bl system
ldr r3, .L17+4
ldr r2, [r3]
ldr r3, [sp, #52]
eors r2, r3, r2
mov r3, #0
bne .L16
mov r0, #0
add sp, sp, #60
@ sp needed
ldr pc, [sp], #4
.L16:
bl __stack_chk_fail
.L18:
.align 2
.L17:
.word .LANCHOR0
.word .LC7
.word .LC3
.word .LC4
.word .LC5
.word .LC6
.size main, .-main
.section .rodata
.align 2
.set .LANCHOR0,. + 0
.LC0:
.word 1
.word 2
.word 3
.word 4
.word 10
.word 20
.word 30
.word 40
.word 100
.word 200
.word 300
.word 400
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "998929.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Addition: %d\n"
.text
.p2align 4
.globl add
.type add, @function
add:
.LFB24:
.cfi_startproc
endbr64
lea edx, [rdi+rsi]
xor eax, eax
lea rsi, .LC0[rip]
mov edi, 1
jmp __printf_chk@PLT
.cfi_endproc
.LFE24:
.size add, .-add
.section .rodata.str1.1
.LC1:
.string "Subtraction: %d\n"
.text
.p2align 4
.globl sub
.type sub, @function
sub:
.LFB25:
.cfi_startproc
endbr64
mov edx, edi
xor eax, eax
mov edi, 1
sub edx, esi
lea rsi, .LC1[rip]
jmp __printf_chk@PLT
.cfi_endproc
.LFE25:
.size sub, .-sub
.section .rodata.str1.1
.LC2:
.string "Multiplication: %d\n"
.text
.p2align 4
.globl mul
.type mul, @function
mul:
.LFB26:
.cfi_startproc
endbr64
mov edx, edi
xor eax, eax
mov edi, 1
imul edx, esi
lea rsi, .LC2[rip]
jmp __printf_chk@PLT
.cfi_endproc
.LFE26:
.size mul, .-mul
.section .rodata.str1.1
.LC3:
.string "Division: %f\n"
.text
.p2align 4
.globl div
.type div, @function
div:
.LFB27:
.cfi_startproc
endbr64
pxor xmm0, xmm0
pxor xmm1, xmm1
mov eax, 1
cvtsi2ss xmm0, edi
mov edi, 1
cvtsi2ss xmm1, esi
lea rsi, .LC3[rip]
divss xmm0, xmm1
cvtss2sd xmm0, xmm0
jmp __printf_chk@PLT
.cfi_endproc
.LFE27:
.size div, .-div
.section .rodata.str1.1
.LC4:
.string "First number: "
.LC5:
.string "%d"
.LC6:
.string "Second number: "
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
lea rsi, .LC4[rip]
mov edi, 1
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
call __printf_chk@PLT
mov rsi, rsp
lea rdi, .LC5[rip]
xor eax, eax
call __isoc99_scanf@PLT
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
lea rsi, 4[rsp]
lea rdi, .LC5[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov edx, DWORD PTR [rsp]
mov edi, 1
xor eax, eax
add edx, DWORD PTR 4[rsp]
lea rsi, .LC0[rip]
call __printf_chk@PLT
mov edx, DWORD PTR [rsp]
mov edi, 1
xor eax, eax
sub edx, DWORD PTR 4[rsp]
lea rsi, .LC1[rip]
call __printf_chk@PLT
mov edx, DWORD PTR 4[rsp]
imul edx, DWORD PTR [rsp]
xor eax, eax
lea rsi, .LC2[rip]
mov edi, 1
call __printf_chk@PLT
mov esi, DWORD PTR 4[rsp]
mov edi, DWORD PTR [rsp]
call div
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L9
xor eax, eax
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "998929.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "First number: \000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "Second number: \000"
.align 2
.LC3:
.ascii "Addition: %d\012\000"
.align 2
.LC4:
.ascii "Subtraction: %d\012\000"
.align 2
.LC5:
.ascii "Multiplication: %d\012\000"
.global __aeabi_i2f
.global __aeabi_fdiv
.global __aeabi_f2d
.align 2
.LC6:
.ascii "Division: %f\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC7:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r3, .L6
sub sp, sp, #16
ldr r1, .L6+4
mov r0, #1
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
bl __printf_chk
add r1, sp, #4
ldr r0, .L6+8
bl __isoc99_scanf
ldr r1, .L6+12
mov r0, #1
bl __printf_chk
add r1, sp, #8
ldr r0, .L6+8
bl __isoc99_scanf
ldmib sp, {r2, r3}
ldr r1, .L6+16
add r2, r2, r3
mov r0, #1
bl __printf_chk
ldmib sp, {r2, r3}
ldr r1, .L6+20
sub r2, r2, r3
mov r0, #1
bl __printf_chk
ldr r3, [sp, #4]
ldr r2, [sp, #8]
ldr r1, .L6+24
mul r2, r3, r2
mov r0, #1
bl __printf_chk
ldr r0, [sp, #4]
bl __aeabi_i2f
mov r4, r0
ldr r0, [sp, #8]
bl __aeabi_i2f
mov r1, r0
mov r0, r4
bl __aeabi_fdiv
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, #1
ldr r1, .L6+28
bl __printf_chk
ldr r3, .L6
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L5
mov r0, #0
add sp, sp, #16
@ sp needed
pop {r4, pc}
.L5:
bl __stack_chk_fail
.L7:
.align 2
.L6:
.word .LC7
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.word .LC6
.size main, .-main
.text
.align 2
.global add
.syntax unified
.arm
.fpu softvfp
.type add, %function
add:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r2, r0
mov r0, #1
add r2, r2, r1
ldr r1, .L9
b __printf_chk
.L10:
.align 2
.L9:
.word .LC3
.size add, .-add
.align 2
.global sub
.syntax unified
.arm
.fpu softvfp
.type sub, %function
sub:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r2, r0
mov r0, #1
sub r2, r2, r1
ldr r1, .L12
b __printf_chk
.L13:
.align 2
.L12:
.word .LC4
.size sub, .-sub
.align 2
.global mul
.syntax unified
.arm
.fpu softvfp
.type mul, %function
mul:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r2, r0
mov r0, #1
mul r2, r1, r2
ldr r1, .L15
b __printf_chk
.L16:
.align 2
.L15:
.word .LC5
.size mul, .-mul
.align 2
.global div
.syntax unified
.arm
.fpu softvfp
.type div, %function
div:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r5, r1
bl __aeabi_i2f
mov r4, r0
mov r0, r5
bl __aeabi_i2f
mov r1, r0
mov r0, r4
bl __aeabi_fdiv
bl __aeabi_f2d
pop {r4, r5, r6, lr}
mov r2, r0
mov r3, r1
mov r0, #1
ldr r1, .L19
b __printf_chk
.L20:
.align 2
.L19:
.word .LC6
.size div, .-div
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99893.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string ""
.LC1:
.string " "
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string " /*************** conv_gen.c ************/"
.align 8
.LC3:
.string "const int ucs2fontmap(char *s, unsigned int ucs, int enc)"
.section .rodata.str1.1
.LC4:
.string "{"
.LC5:
.string " switch(enc) {"
.LC6:
.string " case 0:"
.section .rodata.str1.8
.align 8
.LC7:
.string " s[0] = (char) ((ucs & 0xFF00) >> 8);"
.align 8
.LC8:
.string " s[1] = (char) (ucs & 0xFF);"
.section .rodata.str1.1
.LC9:
.string " return 0;"
.LC10:
.string "\n break;"
.LC11:
.string "\n case %d:\n"
.LC12:
.string " "
.LC13:
.string " else "
.LC14:
.string "if (ucs <= 0x%s) {\n"
.LC15:
.string " if (ucs >= 0x%s) {\n"
.section .rodata.str1.8
.align 8
.LC16:
.string " int i = (ucs - 0x%s) * 2;\n"
.section .rodata.str1.1
.LC17:
.string " s[0] = %s_%s[i++];\n"
.LC18:
.string " s[1] = %s_%s[i];\n"
.section .rodata.str1.8
.align 8
.LC19:
.string " if (s[0] || s[1]) return %d;\n"
.section .rodata.str1.1
.LC20:
.string " s[0] = 0;"
.section .rodata.str1.8
.align 8
.LC21:
.string " s[1] = %s_%s[ucs - 0x%s];\n"
.section .rodata.str1.1
.LC22:
.string " if (s[1]) return %d;\n"
.LC23:
.string " }"
.LC24:
.string " }"
.LC25:
.string "\n default:"
.LC26:
.string " break;"
.LC27:
.string " };"
.LC28:
.string " return -1;"
.LC29:
.string "};\n"
.section .rodata.str1.8
.align 8
.LC30:
.string "const int encoding_number(const char *enc)\n{"
.align 8
.LC31:
.string " if (!enc || !strcmp(enc, \"iso10646-1\")) {"
.align 8
.LC32:
.string " } else if (!strcmp(enc, \"%s\")"
.section .rodata.str1.1
.LC33:
.string "big5-0"
.section .rodata.str1.8
.align 8
.LC34:
.string " || !strcmp(enc, \"big5.eten-0\")"
.section .rodata.str1.1
.LC35:
.string "dingbats"
.section .rodata.str1.8
.align 8
.LC36:
.string " || !strcmp(enc, \"zapfdingbats\")"
.align 8
.LC37:
.string " || !strcmp(enc, \"zapf dingbats\")"
.align 8
.LC38:
.string " || !strcmp(enc, \"itc zapf dingbats\")"
.section .rodata.str1.1
.LC39:
.string "jisx0208.1983-0"
.section .rodata.str1.8
.align 8
.LC40:
.string " || !strcmp(enc, \"jisx0208.1990-0\")"
.section .rodata.str1.1
.LC41:
.string ") {"
.LC42:
.string " return %d;\n"
.LC43:
.string " case %d:\n"
.LC44:
.string " return \"%s\";\n"
.LC45:
.string " return \"iso10646-1\";"
.LC46:
.string "*/"
.LC47:
.string "/*"
.section .rodata.str1.8
.align 8
.LC48:
.string "const char *encoding_name(int num)\n{"
.section .rodata.str1.1
.LC49:
.string " switch (num) {"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB45:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov edx, 1000000
mov esi, 1
lea rdi, buffer[rip]
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
xor r12d, r12d
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
lea rbp, buffer[rip]
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 2072
.cfi_def_cfa_offset 2128
mov rcx, QWORD PTR stdin[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 2056[rsp], rax
xor eax, eax
call fread@PLT
lea rdi, .LC1[rip]
mov r14, rax
mov ebx, eax
call puts@PLT
lea rdi, .LC2[rip]
call puts@PLT
movsx rax, r14d
lea rdi, .LC3[rip]
mov BYTE PTR 0[rbp+rax], 0
call puts@PLT
lea rdi, .LC4[rip]
call puts@PLT
lea rdi, .LC5[rip]
call puts@PLT
lea rdi, .LC6[rip]
call puts@PLT
lea rdi, .LC7[rip]
call puts@PLT
lea rdi, .LC8[rip]
call puts@PLT
mov edi, 1
lea rsi, .LC9[rip]
xor eax, eax
call __printf_chk@PLT
lea rdi, .LC0[rip]
test r14d, r14d
jle .L55
.p2align 4,,10
.p2align 3
.L2:
cmp BYTE PTR 0[rbp], 93
mov r13, rbp
je .L13
.p2align 4,,10
.p2align 3
.L4:
add r13, 1
cmp BYTE PTR 0[r13], 93
jne .L4
.L13:
mov BYTE PTR -1[r13], 0
lea r15, -5[r13]
mov rax, r13
mov BYTE PTR -6[r13], 0
.p2align 4,,10
.p2align 3
.L5:
mov r14, rax
add rax, 1
cmp BYTE PTR [rax], 43
jne .L5
mov BYTE PTR 5[rax], 0
mov rsi, rbp
add r14, 2
call strcmp@PLT
test eax, eax
je .L6
add r12d, 1
lea rsi, .LC10[rip]
mov edi, 1
movsx rax, r12d
mov QWORD PTR [rsp+rax*8], rbp
xor eax, eax
call __printf_chk@PLT
mov edi, 1
mov edx, r12d
xor eax, eax
lea rsi, .LC11[rip]
call __printf_chk@PLT
lea rsi, .LC12[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
.L7:
mov rdx, r14
lea rsi, .LC14[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
xor eax, eax
mov rdx, r15
mov edi, 1
lea rsi, .LC15[rip]
call __printf_chk@PLT
cmp BYTE PTR -8[r13], 50
je .L56
lea rdi, .LC20[rip]
call puts@PLT
mov rdx, rbp
mov edi, 1
mov r8, r15
lea rsi, .LC21[rip]
mov rcx, r15
xor eax, eax
call __printf_chk@PLT
mov edx, r12d
mov edi, 1
xor eax, eax
lea rsi, .LC22[rip]
call __printf_chk@PLT
.L9:
lea rdi, .LC23[rip]
call puts@PLT
xor eax, eax
mov edi, 1
lea rsi, .LC24[rip]
call __printf_chk@PLT
cmp BYTE PTR 0[rbp], 10
mov rax, rbp
je .L10
lea edx, [rbx+rbp]
.p2align 4,,10
.p2align 3
.L11:
add rax, 1
mov ebx, edx
sub ebx, eax
cmp BYTE PTR [rax], 10
jne .L11
.L10:
sub ebx, 1
add rax, 1
mov rdi, rbp
test ebx, ebx
jle .L12
mov rbp, rax
jmp .L2
.p2align 4,,10
.p2align 3
.L6:
lea rsi, .LC13[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L7
.p2align 4,,10
.p2align 3
.L56:
mov rdx, r15
lea rsi, .LC16[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov r8, r15
mov rcx, r15
mov rdx, rbp
lea rsi, .LC17[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov rdx, rbp
mov r8, r15
mov rcx, r15
lea rsi, .LC18[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov edx, r12d
mov edi, 1
xor eax, eax
lea rsi, .LC19[rip]
call __printf_chk@PLT
jmp .L9
.p2align 4,,10
.p2align 3
.L12:
lea rdi, .LC10[rip]
call puts@PLT
lea rdi, .LC25[rip]
call puts@PLT
lea rdi, .LC26[rip]
call puts@PLT
lea rdi, .LC27[rip]
call puts@PLT
lea rdi, .LC28[rip]
call puts@PLT
lea rdi, .LC29[rip]
call puts@PLT
lea rdi, .LC30[rip]
call puts@PLT
lea rdi, .LC31[rip]
call puts@PLT
lea rdi, .LC9[rip]
call puts@PLT
test r12d, r12d
je .L14
lea ebp, 1[r12]
mov ebx, 1
mov r12, rsp
lea r14, .LC33[rip]
.p2align 4,,10
.p2align 3
.L24:
mov r15, QWORD PTR [r12+rbx*8]
mov r13d, ebx
mov rdi, r15
call strlen@PLT
sub eax, 3
cdqe
add rax, r15
mov BYTE PTR [rax], 0
sub rax, 1
jmp .L53
.p2align 4,,10
.p2align 3
.L15:
movzx edx, BYTE PTR [rax]
mov rcx, rax
sub rax, 1
cmp dl, 95
je .L57
.L53:
cmp r15, rax
jne .L15
.L20:
add r15, 11
lea rsi, .LC32[rip]
mov edi, 1
xor eax, eax
mov rdx, r15
call __printf_chk@PLT
mov ecx, 7
mov rsi, r15
mov rdi, r14
repz cmpsb
seta al
sbb al, 0
test al, al
je .L58
mov ecx, 9
mov rsi, r15
lea rdi, .LC35[rip]
repz cmpsb
seta al
sbb al, 0
test al, al
je .L59
mov ecx, 16
mov rsi, r15
lea rdi, .LC39[rip]
repz cmpsb
seta al
sbb al, 0
test al, al
je .L60
.L22:
lea rdi, .LC41[rip]
add rbx, 1
call puts@PLT
mov edx, r13d
mov edi, 1
xor eax, eax
lea rsi, .LC42[rip]
call __printf_chk@PLT
cmp rbp, rbx
jne .L24
lea rdi, .LC27[rip]
mov ebx, 1
lea r13, .LC43[rip]
call puts@PLT
lea rdi, .LC28[rip]
call puts@PLT
lea rdi, .LC29[rip]
call puts@PLT
lea rdi, .LC47[rip]
call puts@PLT
lea rdi, .LC48[rip]
call puts@PLT
lea rdi, .LC49[rip]
call puts@PLT
.p2align 4,,10
.p2align 3
.L26:
mov edx, ebx
mov rsi, r13
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov rax, QWORD PTR [r12+rbx*8]
mov edi, 1
lea rsi, .LC44[rip]
add rbx, 1
lea rdx, 11[rax]
xor eax, eax
call __printf_chk@PLT
cmp rbp, rbx
jne .L26
.L27:
lea rdi, .LC27[rip]
call puts@PLT
lea rdi, .LC45[rip]
call puts@PLT
lea rdi, .LC29[rip]
call puts@PLT
lea rdi, .LC46[rip]
call puts@PLT
mov rax, QWORD PTR 2056[rsp]
sub rax, QWORD PTR fs:40
jne .L61
add rsp, 2072
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L57:
.cfi_restore_state
mov BYTE PTR [rcx], 45
cmp r15, rax
je .L20
.p2align 4,,10
.p2align 3
.L19:
cmp BYTE PTR [rax], 95
jne .L21
mov BYTE PTR [rax], 46
.L21:
sub rax, 1
cmp r15, rax
jne .L19
jmp .L20
.p2align 4,,10
.p2align 3
.L58:
lea rsi, .LC34[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L22
.p2align 4,,10
.p2align 3
.L59:
lea rsi, .LC36[rip]
mov edi, 1
call __printf_chk@PLT
lea rsi, .LC37[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
lea rsi, .LC38[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L22
.p2align 4,,10
.p2align 3
.L60:
lea rsi, .LC40[rip]
mov edi, 1
call __printf_chk@PLT
jmp .L22
.L55:
lea rdi, .LC10[rip]
call puts@PLT
lea rdi, .LC25[rip]
call puts@PLT
lea rdi, .LC26[rip]
call puts@PLT
lea rdi, .LC27[rip]
call puts@PLT
lea rdi, .LC28[rip]
call puts@PLT
lea rdi, .LC29[rip]
call puts@PLT
lea rdi, .LC30[rip]
call puts@PLT
lea rdi, .LC31[rip]
call puts@PLT
lea rdi, .LC9[rip]
call puts@PLT
.L14:
lea rdi, .LC27[rip]
call puts@PLT
lea rdi, .LC28[rip]
call puts@PLT
lea rdi, .LC29[rip]
call puts@PLT
lea rdi, .LC47[rip]
call puts@PLT
lea rdi, .LC48[rip]
call puts@PLT
lea rdi, .LC49[rip]
call puts@PLT
jmp .L27
.L61:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE45:
.size main, .-main
.globl buffer
.bss
.align 32
.type buffer, @object
.size buffer, 1000000
buffer:
.zero 1000000
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99893.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "\000"
.align 2
.LC1:
.ascii " \000"
.align 2
.LC2:
.ascii " /*************** conv_gen.c ************/\000"
.align 2
.LC3:
.ascii "const int ucs2fontmap(char *s, unsigned int ucs, in"
.ascii "t enc)\000"
.align 2
.LC4:
.ascii "{\000"
.align 2
.LC5:
.ascii " switch(enc) {\000"
.align 2
.LC6:
.ascii " case 0:\000"
.align 2
.LC7:
.ascii " s[0] = (char) ((ucs & 0xFF00) >> 8);\000"
.align 2
.LC8:
.ascii " s[1] = (char) (ucs & 0xFF);\000"
.align 2
.LC9:
.ascii " return 0;\000"
.align 2
.LC10:
.ascii "\012 break;\000"
.align 2
.LC11:
.ascii "\012 case %d:\012\000"
.align 2
.LC12:
.ascii " \000"
.align 2
.LC13:
.ascii " else \000"
.align 2
.LC14:
.ascii "if (ucs <= 0x%s) {\012\000"
.align 2
.LC15:
.ascii " if (ucs >= 0x%s) {\012\000"
.align 2
.LC16:
.ascii " int i = (ucs - 0x%s) * 2;\012\000"
.align 2
.LC17:
.ascii " s[0] = %s_%s[i++];\012\000"
.align 2
.LC18:
.ascii " s[1] = %s_%s[i];\012\000"
.align 2
.LC19:
.ascii " if (s[0] || s[1]) return %d;\012\000"
.align 2
.LC20:
.ascii " s[0] = 0;\000"
.align 2
.LC21:
.ascii " s[1] = %s_%s[ucs - 0x%s];\012\000"
.align 2
.LC22:
.ascii " if (s[1]) return %d;\012\000"
.align 2
.LC23:
.ascii " }\000"
.align 2
.LC24:
.ascii " }\000"
.align 2
.LC25:
.ascii "\012 default:\000"
.align 2
.LC26:
.ascii " break;\000"
.align 2
.LC27:
.ascii " };\000"
.align 2
.LC28:
.ascii " return -1;\000"
.align 2
.LC29:
.ascii "};\012\000"
.align 2
.LC30:
.ascii "const int encoding_number(const char *enc)\012{\000"
.align 2
.LC31:
.ascii " if (!enc || !strcmp(enc, \"iso10646-1\")) {\000"
.align 2
.LC32:
.ascii " } else if (!strcmp(enc, \"%s\")\000"
.align 2
.LC33:
.ascii "big5-0\000"
.align 2
.LC34:
.ascii " || !strcmp(enc, \"big5.eten-0\")\000"
.align 2
.LC35:
.ascii "dingbats\000"
.align 2
.LC36:
.ascii " || !strcmp(enc, \"zapfdingbats\")\000"
.align 2
.LC37:
.ascii " || !strcmp(enc, \"zapf dingbats\")\000"
.align 2
.LC38:
.ascii " || !strcmp(enc, \"itc zapf dingbats\")\000"
.align 2
.LC39:
.ascii "jisx0208.1983-0\000"
.align 2
.LC40:
.ascii " || !strcmp(enc, \"jisx0208.1990-0\")\000"
.align 2
.LC41:
.ascii ") {\000"
.align 2
.LC42:
.ascii " return %d;\012\000"
.align 2
.LC43:
.ascii " case %d:\012\000"
.align 2
.LC44:
.ascii " return \"%s\";\012\000"
.align 2
.LC45:
.ascii " return \"iso10646-1\";\000"
.align 2
.LC46:
.ascii "*/\000"
.align 2
.LC47:
.ascii "/*\000"
.align 2
.LC48:
.ascii "const char *encoding_name(int num)\012{\000"
.align 2
.LC49:
.ascii " switch (num) {\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC50:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 1032
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L57
ldr r6, .L57+4
ldr r2, [r3]
sub sp, sp, #1040
ldr r3, .L57+8
sub sp, sp, #4
ldr ip, .L57+12
mov r1, r3
str r2, [sp]
mov r0, r6
mov r2, #1
ldr ip, [ip]
str ip, [sp, #1036]
mov ip,#0
bl __fread_chk
mov r7, #0
mov r4, r0
ldr r0, .L57+16
bl puts
ldr r0, .L57+20
bl puts
ldr r0, .L57+24
strb r7, [r6, r4]
bl puts
ldr r0, .L57+28
bl puts
ldr r0, .L57+32
bl puts
ldr r0, .L57+36
bl puts
ldr r0, .L57+40
bl puts
ldr r0, .L57+44
bl puts
mov r0, #1
ldr r1, .L57+48
bl __printf_chk
cmp r4, r7
ble .L51
ldr r0, .L57+52
ldr fp, .L57+56
ldr r9, .L57+60
.L2:
ldrb r3, [r6] @ zero_extendqisi2
mov r5, r6
cmp r3, #93
beq .L13
.L4:
ldrb r3, [r5, #1]! @ zero_extendqisi2
cmp r3, #93
bne .L4
.L13:
mov r2, #0
mov r3, r5
strb r2, [r5, #-1]
strb r2, [r5, #-6]
sub r8, r5, #5
.L5:
mov r2, r3
ldrb r1, [r3, #1]! @ zero_extendqisi2
cmp r1, #43
bne .L5
mov r1, #0
strb r1, [r3, #5]
mov r1, r6
add r10, r2, #2
bl strcmp
cmp r0, #0
beq .L6
add r7, r7, #1
add r3, sp, #1040
add r3, r3, r7, lsl #2
ldr r1, .L57+64
mov r0, #1
str r6, [r3, #-1028]
bl __printf_chk
ldr r1, .L57+68
mov r2, r7
mov r0, #1
bl __printf_chk
mov r0, #1
ldr r1, .L57+72
bl __printf_chk
.L7:
mov r2, r10
mov r1, r9
mov r0, #1
bl __printf_chk
mov r2, r8
mov r0, #1
ldr r1, .L57+76
bl __printf_chk
ldrb r3, [r5, #-8] @ zero_extendqisi2
cmp r3, #50
beq .L52
ldr r0, .L57+80
bl puts
mov r2, r6
ldr r1, .L57+84
mov r3, r8
mov r0, #1
str r8, [sp]
bl __printf_chk
mov r2, r7
mov r0, #1
ldr r1, .L57+88
bl __printf_chk
.L9:
ldr r0, .L57+92
bl puts
mov r0, #1
ldr r1, .L57+96
bl __printf_chk
ldrb r3, [r6] @ zero_extendqisi2
cmp r3, #10
beq .L31
add r0, r6, r4
add r3, r6, #1
.L11:
ldrb r1, [r3] @ zero_extendqisi2
mov r2, r3
cmp r1, #10
sub r4, r0, r3
add r3, r3, #1
bne .L11
.L10:
sub r4, r4, #1
cmp r4, #0
mov r0, r6
add r2, r2, #1
ble .L12
mov r6, r2
b .L2
.L6:
mov r1, fp
mov r0, #1
bl __printf_chk
b .L7
.L52:
mov r2, r8
ldr r1, .L57+100
mov r0, #1
bl __printf_chk
mov r3, r8
mov r2, r6
ldr r1, .L57+104
str r8, [sp]
mov r0, #1
bl __printf_chk
mov r2, r6
mov r3, r8
ldr r1, .L57+108
str r8, [sp]
mov r0, #1
bl __printf_chk
mov r2, r7
ldr r1, .L57+112
mov r0, #1
bl __printf_chk
b .L9
.L31:
mov r2, r6
b .L10
.L12:
ldr r0, .L57+64
bl puts
ldr r0, .L57+116
bl puts
ldr r0, .L57+120
bl puts
ldr r0, .L57+124
bl puts
ldr r0, .L57+128
bl puts
ldr r0, .L57+132
bl puts
ldr r0, .L57+136
bl puts
ldr r0, .L57+140
bl puts
ldr r0, .L57+48
bl puts
cmp r7, #0
beq .L14
add r5, sp, #16
mov r6, r5
mov r4, #1
ldr r9, .L57+144
ldr r8, .L57+148
ldr r10, .L57+152
.L25:
ldr fp, [r6], #4
mov r0, fp
bl strlen
mov r2, #0
sub r0, r0, #3
add r3, fp, r0
sub r3, r3, #1
cmp fp, r3
strb r2, [fp, r0]
bne .L15
b .L20
.L18:
cmp fp, r3
beq .L20
.L15:
ldrb r1, [r3] @ zero_extendqisi2
mov r2, r3
cmp r1, #95
sub r3, r3, #1
bne .L18
mov r1, #45
cmp fp, r3
strb r1, [r2]
movne r3, r2
movne r0, #46
addne r1, fp, #1
beq .L20
.L22:
ldrb r2, [r3, #-1]! @ zero_extendqisi2
cmp r2, #95
strbeq r0, [r3]
cmp r3, r1
bne .L22
.L20:
add fp, fp, #11
mov r2, fp
mov r1, r9
mov r0, #1
bl __printf_chk
mov r1, r8
mov r0, fp
bl strcmp
cmp r0, #0
beq .L53
mov r1, r10
mov r0, fp
bl strcmp
cmp r0, #0
beq .L54
mov r0, fp
ldr r1, .L57+156
bl strcmp
cmp r0, #0
beq .L55
.L23:
ldr r0, .L57+160
bl puts
mov r2, r4
mov r0, #1
ldr r1, .L57+164
bl __printf_chk
cmp r7, r4
add r4, r4, #1
bne .L25
ldr r0, .L57+124
bl puts
ldr r0, .L57+128
bl puts
ldr r0, .L57+132
bl puts
ldr r0, .L57+168
bl puts
ldr r0, .L57+172
bl puts
ldr r0, .L57+176
bl puts
mov r4, #1
ldr r8, .L57+180
ldr r6, .L57+184
.L27:
mov r2, r4
mov r1, r8
mov r0, #1
bl __printf_chk
ldr r2, [r5], #4
mov r1, r6
mov r0, #1
add r2, r2, #11
bl __printf_chk
cmp r7, r4
add r4, r4, #1
bne .L27
.L28:
ldr r0, .L57+124
bl puts
ldr r0, .L57+188
bl puts
ldr r0, .L57+132
bl puts
ldr r0, .L57+192
bl puts
ldr r3, .L57+12
ldr r2, [r3]
ldr r3, [sp, #1036]
eors r2, r3, r2
mov r3, #0
bne .L56
mov r0, #0
add sp, sp, #1040
add sp, sp, #4
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L53:
ldr r1, .L57+196
mov r0, #1
bl __printf_chk
b .L23
.L54:
ldr r1, .L57+200
mov r0, #1
bl __printf_chk
ldr r1, .L57+204
mov r0, #1
bl __printf_chk
ldr r1, .L57+208
mov r0, #1
bl __printf_chk
b .L23
.L55:
ldr r1, .L57+212
mov r0, #1
bl __printf_chk
b .L23
.L51:
ldr r0, .L57+64
bl puts
ldr r0, .L57+116
bl puts
ldr r0, .L57+120
bl puts
ldr r0, .L57+124
bl puts
ldr r0, .L57+128
bl puts
ldr r0, .L57+132
bl puts
ldr r0, .L57+136
bl puts
ldr r0, .L57+140
bl puts
ldr r0, .L57+48
bl puts
.L14:
ldr r0, .L57+124
bl puts
ldr r0, .L57+128
bl puts
ldr r0, .L57+132
bl puts
ldr r0, .L57+168
bl puts
ldr r0, .L57+172
bl puts
ldr r0, .L57+176
bl puts
b .L28
.L56:
bl __stack_chk_fail
.L58:
.align 2
.L57:
.word stdin
.word buffer
.word 1000000
.word .LC50
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.word .LC6
.word .LC7
.word .LC8
.word .LC9
.word .LC0
.word .LC13
.word .LC14
.word .LC10
.word .LC11
.word .LC12
.word .LC15
.word .LC20
.word .LC21
.word .LC22
.word .LC23
.word .LC24
.word .LC16
.word .LC17
.word .LC18
.word .LC19
.word .LC25
.word .LC26
.word .LC27
.word .LC28
.word .LC29
.word .LC30
.word .LC31
.word .LC32
.word .LC33
.word .LC35
.word .LC39
.word .LC41
.word .LC42
.word .LC47
.word .LC48
.word .LC49
.word .LC43
.word .LC44
.word .LC45
.word .LC46
.word .LC34
.word .LC36
.word .LC37
.word .LC38
.word .LC40
.size main, .-main
.comm buffer,1000000,4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "998953.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%lf\n"
.LC3:
.string "\nfor a sample of size %ld\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC4:
.string "mean ................. = %7.3f\n"
.align 8
.LC5:
.string "standard deviation ... = %7.3f\n"
.align 8
.LC6:
.string "minimum .............. = %7.3f\n"
.align 8
.LC7:
.string "maximum .............. = %7.3f\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
lea rdi, .LC1[rip]
xor r12d, r12d
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
sub rsp, 56
.cfi_def_cfa_offset 80
mov rax, QWORD PTR fs:40
mov QWORD PTR 40[rsp], rax
xor eax, eax
lea rbx, 32[rsp]
mov rsi, rbx
call __isoc99_scanf@PLT
mov rdi, QWORD PTR stdin[rip]
call feof@PLT
test eax, eax
jne .L2
movsd xmm7, QWORD PTR 32[rsp]
mov r12d, 1
movsd QWORD PTR 8[rsp], xmm7
movsd QWORD PTR 16[rsp], xmm7
movsd QWORD PTR 24[rsp], xmm7
.L2:
pxor xmm7, xmm7
movsd QWORD PTR [rsp], xmm7
.p2align 4,,10
.p2align 3
.L3:
mov rdi, QWORD PTR stdin[rip]
call feof@PLT
test eax, eax
jne .L18
.L6:
xor eax, eax
mov rsi, rbx
lea rdi, .LC1[rip]
add r12, 1
call __isoc99_scanf@PLT
movsd xmm2, QWORD PTR 32[rsp]
movsd xmm5, QWORD PTR 8[rsp]
pxor xmm3, xmm3
cvtsi2sd xmm3, r12
comisd xmm2, QWORD PTR 16[rsp]
movapd xmm0, xmm2
subsd xmm0, xmm5
movapd xmm4, xmm3
subsd xmm4, QWORD PTR .LC2[rip]
movapd xmm1, xmm0
mulsd xmm1, xmm0
divsd xmm0, xmm3
mulsd xmm1, xmm4
divsd xmm1, xmm3
addsd xmm0, xmm5
movsd QWORD PTR 8[rsp], xmm0
addsd xmm1, QWORD PTR [rsp]
movsd QWORD PTR [rsp], xmm1
ja .L10
minsd xmm2, QWORD PTR 24[rsp]
mov rdi, QWORD PTR stdin[rip]
movsd QWORD PTR 24[rsp], xmm2
call feof@PLT
test eax, eax
je .L6
.L18:
test r12, r12
je .L7
pxor xmm1, xmm1
movsd xmm0, QWORD PTR [rsp]
cvtsi2sd xmm1, r12
divsd xmm0, xmm1
call sqrt@PLT
mov rdx, r12
mov edi, 1
xor eax, eax
lea rsi, .LC3[rip]
movsd QWORD PTR [rsp], xmm0
call __printf_chk@PLT
movsd xmm0, QWORD PTR 8[rsp]
mov edi, 1
lea rsi, .LC4[rip]
mov eax, 1
call __printf_chk@PLT
movsd xmm1, QWORD PTR [rsp]
mov edi, 1
lea rsi, .LC5[rip]
mov eax, 1
movapd xmm0, xmm1
call __printf_chk@PLT
movsd xmm0, QWORD PTR 24[rsp]
mov edi, 1
lea rsi, .LC6[rip]
mov eax, 1
call __printf_chk@PLT
movsd xmm0, QWORD PTR 16[rsp]
mov edi, 1
lea rsi, .LC7[rip]
mov eax, 1
call __printf_chk@PLT
.L7:
mov rax, QWORD PTR 40[rsp]
sub rax, QWORD PTR fs:40
jne .L19
add rsp, 56
.cfi_remember_state
.cfi_def_cfa_offset 24
xor eax, eax
pop rbx
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L10:
.cfi_restore_state
movsd QWORD PTR 16[rsp], xmm2
jmp .L3
.L19:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC2:
.long 0
.long 1072693248
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "998953.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%lf\012\000"
.global __aeabi_dsub
.global __aeabi_i2d
.global __aeabi_dmul
.global __aeabi_ddiv
.global __aeabi_dadd
.global __aeabi_dcmpgt
.global __aeabi_dcmplt
.align 2
.LC1:
.ascii "\012for a sample of size %ld\012\000"
.align 2
.LC2:
.ascii "mean ................. = %7.3f\012\000"
.align 2
.LC3:
.ascii "standard deviation ... = %7.3f\012\000"
.align 2
.LC4:
.ascii "minimum .............. = %7.3f\012\000"
.align 2
.LC5:
.ascii "maximum .............. = %7.3f\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC6:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L19
sub sp, sp, #60
add r1, sp, #40
ldr r0, .L19+4
ldr r3, [r3]
str r3, [sp, #52]
mov r3,#0
bl __isoc99_scanf
ldr r3, .L19+8
ldr r0, [r3]
bl feof
cmp r0, #0
movne r3, #0
strne r3, [sp, #12]
bne .L2
add r4, sp, #40
ldmia r4, {r3-r4}
mov r2, #1
stm sp, {r3-r4}
str r3, [sp, #24]
str r4, [sp, #28]
str r3, [sp, #32]
str r4, [sp, #36]
str r2, [sp, #12]
.L2:
mov r10, #0
mov fp, #0
.L3:
ldr r3, .L19+8
ldr r0, [r3]
bl feof
cmp r0, #0
bne .L17
add r1, sp, #40
ldr r0, .L19+4
bl __isoc99_scanf
ldmia sp, {r2-r3}
add r7, sp, #40
ldmia r7, {r6-r7}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
ldr r3, [sp, #12]
mov r8, r0
add r3, r3, #1
mov r0, r3
mov r9, r1
str r3, [sp, #12]
bl __aeabi_i2d
mov r2, r8
mov r4, r0
mov r5, r1
mov r3, r9
mov r0, r8
mov r1, r9
bl __aeabi_dmul
mov r2, #0
str r0, [sp, #16]
str r1, [sp, #20]
ldr r3, .L19+12
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r2, r0
mov r3, r1
add r1, sp, #16
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r4
mov r3, r5
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r10
mov r1, fp
bl __aeabi_dadd
mov r2, r4
mov r3, r5
mov r10, r0
mov fp, r1
mov r0, r8
mov r1, r9
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
ldmia sp, {r0-r1}
bl __aeabi_dadd
add r3, sp, #24
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
mov r0, r6
mov r1, r7
stm sp, {r4-r5}
bl __aeabi_dcmpgt
cmp r0, #0
bne .L10
add r3, sp, #32
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dcmplt
cmp r0, #0
strne r6, [sp, #32]
strne r7, [sp, #36]
b .L3
.L10:
str r6, [sp, #24]
str r7, [sp, #28]
b .L3
.L17:
ldr r6, [sp, #12]
cmp r6, #0
beq .L7
mov r0, r6
bl __aeabi_i2d
mov r3, r1
mov r2, r0
mov r1, fp
mov r0, r10
bl __aeabi_ddiv
bl sqrt
mov r4, r0
mov r5, r1
mov r2, r6
ldr r1, .L19+16
mov r0, #1
bl __printf_chk
ldmia sp, {r2-r3}
ldr r1, .L19+20
mov r0, #1
bl __printf_chk
mov r2, r4
mov r3, r5
ldr r1, .L19+24
mov r0, #1
bl __printf_chk
add r3, sp, #32
ldmia r3, {r2-r3}
ldr r1, .L19+28
mov r0, #1
bl __printf_chk
add r3, sp, #24
ldmia r3, {r2-r3}
mov r0, #1
ldr r1, .L19+32
bl __printf_chk
.L7:
ldr r3, .L19
ldr r2, [r3]
ldr r3, [sp, #52]
eors r2, r3, r2
mov r3, #0
bne .L18
mov r0, #0
add sp, sp, #60
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L18:
bl __stack_chk_fail
.L20:
.align 2
.L19:
.word .LC6
.word .LC0
.word stdin
.word 1072693248
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "998959.c"
.intel_syntax noprefix
.text
.p2align 4
.globl isprime
.type isprime, @function
isprime:
.LFB23:
.cfi_startproc
endbr64
mov esi, edi
shr esi, 31
add esi, edi
sar esi
cmp edi, 5
jle .L5
mov ecx, 2
mov r8d, 1
xor r9d, r9d
.p2align 4,,10
.p2align 3
.L4:
mov eax, edi
cdq
idiv ecx
test edx, edx
cmove r8d, r9d
add ecx, 1
cmp ecx, esi
jl .L4
mov eax, r8d
ret
.p2align 4,,10
.p2align 3
.L5:
mov r8d, 1
mov eax, r8d
ret
.cfi_endproc
.LFE23:
.size isprime, .-isprime
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB24:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
lea rdi, .LC0[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
lea rsi, 4[rsp]
call __isoc99_scanf@PLT
mov eax, DWORD PTR 4[rsp]
xor r9d, r9d
lea r8d, 1[rax]
cmp r8d, 1999999
jg .L10
.p2align 4,,10
.p2align 3
.L9:
mov edi, r8d
shr edi, 31
add edi, r8d
sar edi
cmp r8d, 5
jle .L14
mov esi, 1
mov ecx, 2
.p2align 4,,10
.p2align 3
.L12:
mov eax, r8d
cdq
idiv ecx
test edx, edx
cmove esi, r9d
add ecx, 1
cmp ecx, edi
jl .L12
test esi, esi
jne .L14
add r8d, 1
cmp r8d, 2000000
jne .L9
.L10:
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L25
xor eax, eax
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L14:
.cfi_restore_state
mov edx, r8d
lea rsi, .LC0[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L10
.L25:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE24:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "998959.c"
.text
.global __aeabi_idivmod
.align 2
.global isprime
.syntax unified
.arm
.fpu softvfp
.type isprime, %function
isprime:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r0, #5
push {r4, r5, r6, r7, r8, lr}
add r7, r0, r0, lsr #31
ble .L5
mov r6, r0
mov r4, #2
mov r5, #1
asr r7, r7, #1
.L4:
mov r1, r4
mov r0, r6
bl __aeabi_idivmod
add r4, r4, #1
cmp r1, #0
moveq r5, #0
cmp r4, r7
blt .L4
mov r0, r5
pop {r4, r5, r6, r7, r8, pc}
.L5:
mov r5, #1
mov r0, r5
pop {r4, r5, r6, r7, r8, pc}
.size isprime, .-isprime
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC1:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
ldr r3, .L23
sub sp, sp, #8
mov r1, sp
ldr r0, .L23+4
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
bl __isoc99_scanf
ldr r6, [sp]
ldr r8, .L23+8
add r6, r6, #1
cmp r6, r8
bge .L11
.L10:
add r7, r6, r6, lsr #31
cmp r6, #5
asr r7, r7, #1
ble .L15
mov r5, #1
mov r4, #2
.L13:
mov r1, r4
mov r0, r6
bl __aeabi_idivmod
add r4, r4, #1
cmp r1, #0
moveq r5, #0
cmp r4, r7
blt .L13
cmp r5, #0
bne .L15
add r6, r6, #1
cmp r6, r8
bne .L10
.L11:
ldr r3, .L23
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L22
mov r0, #0
add sp, sp, #8
@ sp needed
pop {r4, r5, r6, r7, r8, pc}
.L15:
mov r2, r6
ldr r1, .L23+4
mov r0, #1
bl __printf_chk
b .L11
.L22:
bl __stack_chk_fail
.L24:
.align 2
.L23:
.word .LC1
.word .LC0
.word 2000000
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99898.c"
.intel_syntax noprefix
.text
.p2align 4
.globl get_joystick_val
.type get_joystick_val, @function
get_joystick_val:
.LFB39:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov edi, 32
call malloc@PLT
movsd xmm0, QWORD PTR .LC0[rip]
mov rdx, QWORD PTR .LC1[rip]
mov DWORD PTR 24[rax], 1
mov QWORD PTR 16[rax], rdx
movsd QWORD PTR [rax], xmm0
movsd QWORD PTR 8[rax], xmm0
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE39:
.size get_joystick_val, .-get_joystick_val
.p2align 4
.globl free_joy_vel
.type free_joy_vel, @function
free_joy_vel:
.LFB40:
.cfi_startproc
endbr64
jmp free@PLT
.cfi_endproc
.LFE40:
.size free_joy_vel, .-free_joy_vel
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long 0
.long 1072693248
.align 8
.LC1:
.long 0
.long 1073741824
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99898.c"
.text
.align 2
.global get_joystick_val
.syntax unified
.arm
.fpu softvfp
.type get_joystick_val, %function
get_joystick_val:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
sub sp, sp, #32
mov ip, sp
ldr lr, .L4
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldm lr, {r0, r1, r2, r3}
stm ip, {r0, r1, r2, r3}
mov r0, #32
bl malloc
mov lr, sp
mov ip, r0
mov r4, r0
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldm lr, {r0, r1, r2, r3}
stm ip, {r0, r1, r2, r3}
mov r0, r4
add sp, sp, #32
@ sp needed
pop {r4, pc}
.L5:
.align 2
.L4:
.word .LANCHOR0
.size get_joystick_val, .-get_joystick_val
.align 2
.global free_joy_vel
.syntax unified
.arm
.fpu softvfp
.type free_joy_vel, %function
free_joy_vel:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
b free
.size free_joy_vel, .-free_joy_vel
.section .rodata
.align 3
.set .LANCHOR0,. + 0
.LC0:
.word 0
.word 1072693248
.word 0
.word 1072693248
.word 0
.word 1073741824
.word 1
.space 4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99899.c"
.intel_syntax noprefix
.text
.p2align 4
.globl sig_chld
.type sig_chld, @function
sig_chld:
.LFB70:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
.p2align 4,,10
.p2align 3
.L2:
xor esi, esi
xor edi, edi
mov edx, 1
call waitpid@PLT
test eax, eax
jg .L2
lea rsi, sig_chld[rip]
mov edi, 17
add rsp, 8
.cfi_def_cfa_offset 8
jmp signal@PLT
.cfi_endproc
.LFE70:
.size sig_chld, .-sig_chld
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Communication Crashed"
.text
.p2align 4
.globl setupfail
.type setupfail, @function
setupfail:
.LFB66:
.cfi_startproc
endbr64
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
lea rdi, .LC0[rip]
sub rsp, 8
.cfi_def_cfa_offset 16
call perror@PLT
mov edi, -1
call exit@PLT
.cfi_endproc
.LFE66:
.size setupfail, .-setupfail
.section .rodata
.LC1:
.string ""
.string ""
.text
.p2align 4
.globl get
.type get, @function
get:
.LFB67:
.cfi_startproc
endbr64
movsx rdx, DWORD PTR data[rip]
lea rax, .LC1[rip]
test edx, edx
jle .L15
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
lea rax, [rdx+rdx*4]
lea r13, KEYY[rip]
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
lea r12, [rax+rax*4]
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
add r12, r12
mov rbp, rdi
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
xor ebx, ebx
sub rsp, 8
.cfi_def_cfa_offset 48
jmp .L11
.p2align 4,,10
.p2align 3
.L10:
add rbx, 50
cmp rbx, r12
je .L18
.L11:
lea rdi, 0[r13+rbx]
mov rsi, rbp
call strcmp@PLT
test eax, eax
jne .L10
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 40
lea rax, VALUEE[rip]
add rax, rbx
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L18:
.cfi_restore_state
add rsp, 8
.cfi_def_cfa_offset 40
lea rax, .LC1[rip]
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
ret
.cfi_endproc
.LFE67:
.size get, .-get
.p2align 4
.globl put
.type put, @function
put:
.LFB68:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
mov r14, rdi
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
lea rbp, KEYY[rip]
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 24
.cfi_def_cfa_offset 80
mov r13d, DWORD PTR data[rip]
mov QWORD PTR 8[rsp], rsi
movsx r15, r13d
test r13d, r13d
jle .L20
lea rax, [r15+r15*4]
xor ebx, ebx
lea rbp, KEYY[rip]
lea r12, [rax+rax*4]
add r12, r12
jmp .L22
.p2align 4,,10
.p2align 3
.L21:
add rbx, 50
cmp rbx, r12
je .L20
.L22:
lea rdi, 0[rbp+rbx]
mov rsi, r14
call strcmp@PLT
test eax, eax
jne .L21
mov rsi, QWORD PTR 8[rsp]
lea rdi, VALUEE[rip]
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 56
add rdi, rbx
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
jmp strcpy@PLT
.p2align 4,,10
.p2align 3
.L20:
.cfi_restore_state
lea rax, [r15+r15*4]
mov rsi, r14
add r13d, 1
lea rbx, [rax+rax*4]
add rbx, rbx
lea rdi, 0[rbp+rbx]
call strcpy@PLT
mov rsi, QWORD PTR 8[rsp]
lea rdi, VALUEE[rip]
add rdi, rbx
call strcpy@PLT
mov DWORD PTR data[rip], r13d
add rsp, 24
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE68:
.size put, .-put
.p2align 4
.globl writen
.type writen, @function
writen:
.LFB69:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
mov r13, rdx
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov r12d, edi
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
mov rbp, rsi
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
mov rbx, rdx
sub rsp, 8
.cfi_def_cfa_offset 48
test rdx, rdx
je .L32
.p2align 4,,10
.p2align 3
.L28:
mov rdx, rbx
mov rsi, rbp
mov edi, r12d
call write@PLT
test rax, rax
jle .L30
add rbp, rax
sub rbx, rax
jne .L28
.L32:
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 40
mov rax, r13
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L30:
.cfi_restore_state
je .L35
call __errno_location@PLT
cmp DWORD PTR [rax], 4
je .L28
.L35:
add rsp, 8
.cfi_def_cfa_offset 40
mov rax, -1
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE69:
.size writen, .-writen
.section .rodata.str1.1
.LC2:
.string "n"
.LC3:
.string "You didn't specify PORT"
.LC4:
.string "PORT out of bounds"
.LC5:
.string "ERROR Reading"
.LC6:
.string "ERROR Writing"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB71:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 1112
.cfi_def_cfa_offset 1168
mov rax, QWORD PTR fs:40
mov QWORD PTR 1096[rsp], rax
xor eax, eax
cmp edi, 1
jle .L123
mov rdi, QWORD PTR 8[rsi]
mov edx, 10
xor esi, esi
call strtol@PLT
mov rbp, rax
cmp eax, 80808
ja .L124
xor edx, edx
mov esi, 1
mov edi, 2
call socket@PLT
mov ebx, eax
cmp eax, -1
je .L43
pxor xmm0, xmm0
rol bp, 8
lea rsi, 32[rsp]
mov edi, eax
mov edx, 16
movups XMMWORD PTR 32[rsp], xmm0
mov WORD PTR 32[rsp], 2
mov WORD PTR 34[rsp], bp
call bind@PLT
add eax, 1
je .L43
mov esi, 200
mov edi, ebx
call listen@PLT
add eax, 1
je .L43
mov edi, 17
lea r12, 28[rsp]
lea rbp, 48[rsp]
lea rsi, sig_chld[rip]
call signal@PLT
.p2align 4,,10
.p2align 3
.L44:
mov rdx, r12
mov rsi, rbp
mov edi, ebx
mov DWORD PTR 28[rsp], 16
call accept@PLT
mov DWORD PTR sockfd[rip], eax
test eax, eax
js .L44
call fork@PLT
test eax, eax
je .L125
mov edi, DWORD PTR sockfd[rip]
call close@PLT
jmp .L44
.L124:
lea rdi, .LC4[rip]
call puts@PLT
.L40:
mov rax, QWORD PTR 1096[rsp]
sub rax, QWORD PTR fs:40
jne .L126
add rsp, 1112
.cfi_remember_state
.cfi_def_cfa_offset 56
or eax, -1
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L125:
.cfi_restore_state
lea rax, 64[rsp]
lea r13, KEYY[rip]
mov QWORD PTR [rsp], rax
lea r14, 63[rsp]
.p2align 4,,10
.p2align 3
.L45:
mov rdi, QWORD PTR [rsp]
xor eax, eax
mov ecx, 31
xor r8d, r8d
mov rsi, QWORD PTR [rsp]
mov edx, 255
rep stosq
mov DWORD PTR [rdi], 0
mov WORD PTR 4[rdi], r8w
mov BYTE PTR 6[rdi], 0
mov edi, DWORD PTR sockfd[rip]
call read@PLT
mov DWORD PTR 12[rsp], eax
test eax, eax
js .L127
je .L49
xor r12d, r12d
movsx r8, r12d
movzx eax, BYTE PTR 64[rsp+r8]
cmp al, 112
je .L128
.p2align 4,,10
.p2align 3
.L50:
cmp al, 103
jne .L49
lea r15, 320[rsp]
xor eax, eax
mov ecx, 31
xor edx, edx
mov rdi, r15
rep stosq
lea eax, 1[r12]
mov WORD PTR 4[rdi], dx
movsx rdx, eax
movzx edx, BYTE PTR 64[rsp+rdx]
mov DWORD PTR [rdi], 0
mov BYTE PTR 6[rdi], 0
test dl, dl
je .L45
cmp eax, 254
jg .L80
mov ecx, 253
mov eax, 1
lea rdi, 319[rsp]
add r8, QWORD PTR [rsp]
sub ecx, r12d
add rcx, 1
.p2align 4,,10
.p2align 3
.L61:
mov BYTE PTR [rdi+rax], dl
mov esi, eax
cmp rcx, rax
je .L60
add rax, 1
movzx edx, BYTE PTR [r8+rax]
test dl, dl
jne .L61
.L60:
mov rdi, r15
lea r12d, 2[r12+rsi]
call strlen@PLT
cmp rax, 50
ja .L49
cmp BYTE PTR 320[rsp], 0
je .L49
movsx rax, DWORD PTR data[rip]
test eax, eax
jle .L121
lea rax, [rax+rax*4]
xor ebp, ebp
lea rbx, [rax+rax*4]
add rbx, rbx
jmp .L66
.p2align 4,,10
.p2align 3
.L64:
add rbp, 50
cmp rbx, rbp
je .L121
.L66:
lea rdi, 0[r13+rbp]
mov rsi, r15
call strcmp@PLT
test eax, eax
jne .L64
lea rax, VALUEE[rip]
lea rbx, 0[rbp+rax]
mov ebp, DWORD PTR sockfd[rip]
cmp BYTE PTR [rbx], 0
je .L63
lea r15, 832[rsp]
xor eax, eax
mov ecx, 31
mov rdi, r15
rep stosq
xor eax, eax
mov BYTE PTR 832[rsp], 102
mov DWORD PTR [rdi], 0
mov WORD PTR 4[rdi], ax
mov BYTE PTR 6[rdi], 0
mov rdi, r15
call strlen@PLT
mov rsi, rbx
mov edx, 255
lea rdi, [r15+rax]
call __stpcpy_chk@PLT
sub rax, r15
lea rbx, 1[rax]
.p2align 4,,10
.p2align 3
.L74:
mov rdx, rbx
mov rsi, r15
mov edi, ebp
call write@PLT
test rax, rax
jle .L71
add r15, rax
sub rbx, rax
jne .L74
.L59:
cmp r12d, DWORD PTR 12[rsp]
jge .L45
.L122:
movsx r8, r12d
movzx eax, BYTE PTR 64[rsp+r8]
cmp al, 112
jne .L50
.L128:
lea r15, 320[rsp]
xor eax, eax
mov ecx, 31
xor esi, esi
mov rdi, r15
lea rbp, 576[rsp]
rep stosq
xor ecx, ecx
mov WORD PTR 4[rdi], cx
mov ecx, 31
mov DWORD PTR [rdi], 0
mov BYTE PTR 6[rdi], 0
mov rdi, rbp
rep stosq
lea ecx, 1[r12]
movsx rax, ecx
movzx edx, BYTE PTR 64[rsp+rax]
mov DWORD PTR [rdi], 0
mov WORD PTR 4[rdi], si
mov BYTE PTR 6[rdi], 0
test dl, dl
je .L45
cmp ecx, 254
jg .L78
lea edi, 2[r12]
mov r9, r15
not r12d
movsx rax, edi
sub r9, r8
.p2align 4,,10
.p2align 3
.L53:
mov BYTE PTR -2[r9+rax], dl
lea esi, [r12+rax]
mov ecx, eax
cmp eax, 254
jg .L52
add rax, 1
movzx edx, BYTE PTR [r14+rax]
test dl, dl
jne .L53
.L52:
lea eax, 1[rcx]
add edi, esi
movsx rdx, eax
movzx edx, BYTE PTR 64[rsp+rdx]
test dl, dl
je .L45
cmp eax, 254
jg .L79
mov esi, 253
mov eax, 1
lea r8, 575[rsp]
sub esi, ecx
movsx rcx, ecx
add rcx, QWORD PTR [rsp]
add rsi, 1
.p2align 4,,10
.p2align 3
.L56:
mov BYTE PTR [r8+rax], dl
mov r9d, eax
cmp rax, rsi
je .L55
add rax, 1
movzx edx, BYTE PTR [rcx+rax]
test dl, dl
jne .L56
.L55:
lea r12d, 1[rdi+r9]
mov rdi, r15
call strlen@PLT
cmp rax, 50
ja .L49
cmp BYTE PTR 320[rsp], 0
je .L49
mov rdi, rbp
call strlen@PLT
cmp rax, 50
ja .L49
cmp BYTE PTR 576[rsp], 0
je .L49
mov rsi, rbp
mov rdi, r15
call put
cmp r12d, DWORD PTR 12[rsp]
jl .L122
jmp .L45
.p2align 4,,10
.p2align 3
.L71:
je .L73
call __errno_location@PLT
cmp DWORD PTR [rax], 4
je .L74
.L73:
lea rdi, .LC6[rip]
call perror@PLT
.L129:
cmp r12d, DWORD PTR 12[rsp]
jl .L122
jmp .L45
.p2align 4,,10
.p2align 3
.L121:
mov ebp, DWORD PTR sockfd[rip]
.L63:
mov ebx, 1
lea r15, .LC2[rip]
.p2align 4,,10
.p2align 3
.L70:
mov rdx, rbx
mov rsi, r15
mov edi, ebp
call write@PLT
test rax, rax
jle .L67
add r15, rax
sub rbx, rax
jne .L70
jmp .L59
.p2align 4,,10
.p2align 3
.L67:
je .L73
call __errno_location@PLT
cmp DWORD PTR [rax], 4
je .L70
lea rdi, .LC6[rip]
call perror@PLT
jmp .L129
.L80:
xor esi, esi
jmp .L60
.L127:
lea rdi, .LC5[rip]
call perror@PLT
jmp .L45
.L49:
xor edi, edi
call exit@PLT
.L79:
xor r9d, r9d
jmp .L55
.L78:
xor esi, esi
lea edi, 2[r12]
jmp .L52
.L123:
lea rdi, .LC3[rip]
call puts@PLT
jmp .L40
.L43:
xor eax, eax
call setupfail
.L126:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE71:
.size main, .-main
.globl VALUEE
.bss
.align 32
.type VALUEE, @object
.size VALUEE, 5000
VALUEE:
.zero 5000
.globl KEYY
.align 32
.type KEYY, @object
.size KEYY, 5000
KEYY:
.zero 5000
.globl data
.align 4
.type data, @object
.size data, 4
data:
.zero 4
.globl sockfd
.align 4
.type sockfd, @object
.size sockfd, 4
sockfd:
.zero 4
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99899.c"
.text
.align 2
.global sig_chld
.syntax unified
.arm
.fpu softvfp
.type sig_chld, %function
sig_chld:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
.L2:
mov r1, #0
mov r2, #1
mov r0, r1
bl waitpid
cmp r0, #0
bgt .L2
pop {r4, lr}
mov r0, #17
ldr r1, .L6
b signal
.L7:
.align 2
.L6:
.word sig_chld
.size sig_chld, .-sig_chld
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Communication Crashed\000"
.text
.align 2
.global setupfail
.syntax unified
.arm
.fpu softvfp
.type setupfail, %function
setupfail:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r0, .L10
push {r4, lr}
bl perror
mvn r0, #0
bl exit
.L11:
.align 2
.L10:
.word .LC0
.size setupfail, .-setupfail
.align 2
.global get
.syntax unified
.arm
.fpu softvfp
.type get, %function
get:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, .L19
push {r4, r5, r6, r7, r8, lr}
ldr r6, [r3]
cmp r6, #0
ble .L16
add r6, r6, r6, lsl #2
add r6, r6, r6, lsl #2
mov r7, r0
mov r4, #0
ldr r5, .L19+4
lsl r6, r6, #1
b .L15
.L14:
add r4, r4, #50
cmp r6, r4
add r5, r5, #50
beq .L16
.L15:
mov r1, r7
mov r0, r5
bl strcmp
cmp r0, #0
bne .L14
ldr r0, .L19+8
add r0, r4, r0
pop {r4, r5, r6, r7, r8, pc}
.L16:
ldr r0, .L19+12
pop {r4, r5, r6, r7, r8, pc}
.L20:
.align 2
.L19:
.word .LANCHOR1
.word KEYY
.word VALUEE
.word .LANCHOR0
.size get, .-get
.align 2
.global put
.syntax unified
.arm
.fpu softvfp
.type put, %function
put:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r10, .L29
ldr r3, .L29+4
ldr r7, [r10]
sub sp, sp, #12
cmp r7, #0
mov fp, r0
mov r9, r1
str r3, [sp, #4]
lslle r8, r7, #2
ble .L22
add r6, r7, r7, lsl #2
add r6, r6, r6, lsl #2
mov r4, #0
mov r5, r3
lsl r6, r6, #1
lsl r8, r7, #2
b .L24
.L23:
add r4, r4, #50
cmp r6, r4
add r5, r5, #50
beq .L22
.L24:
mov r1, fp
mov r0, r5
bl strcmp
cmp r0, #0
bne .L23
mov r1, r9
ldr r0, .L29+8
add r0, r0, r4
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
b strcpy
.L22:
ldr r3, [sp, #4]
add r8, r8, r7
add r8, r8, r8, lsl #2
add r0, r3, r8, lsl #1
mov r1, fp
bl strcpy
ldr r0, .L29+8
lsl r8, r8, #1
mov r1, r9
add r0, r0, r8
bl strcpy
add r7, r7, #1
str r7, [r10]
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L30:
.align 2
.L29:
.word .LANCHOR1
.word KEYY
.word VALUEE
.size put, .-put
.align 2
.global writen
.syntax unified
.arm
.fpu softvfp
.type writen, %function
writen:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
subs r7, r2, #0
movne r6, r0
movne r5, r1
movne r4, r7
beq .L36
.L32:
mov r2, r4
mov r1, r5
mov r0, r6
bl write
cmp r0, #0
ble .L34
subs r4, r4, r0
add r5, r5, r0
bne .L32
.L36:
mov r0, r7
pop {r4, r5, r6, r7, r8, pc}
.L34:
beq .L39
bl __errno_location
ldr r3, [r0]
cmp r3, #4
beq .L32
.L39:
mvn r0, #0
pop {r4, r5, r6, r7, r8, pc}
.size writen, .-writen
.section .rodata.str1.4
.align 2
.LC2:
.ascii "You didn't specify PORT\000"
.align 2
.LC3:
.ascii "PORT out of bounds\000"
.align 2
.LC4:
.ascii "ERROR Reading\000"
.align 2
.LC5:
.ascii "n\000"
.align 2
.LC6:
.ascii "ERROR Writing\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC7:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 1064
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L130
sub sp, sp, #1056
sub sp, sp, #12
cmp r0, #1
ldr r3, [r3]
str r3, [sp, #1060]
mov r3,#0
ble .L124
ldr r0, [r1, #4]
mov r2, #10
mov r1, #0
bl strtol
ldr r3, .L130+4
mov r5, r0
cmp r0, r3
bhi .L125
mov r2, #0
mov r1, #1
mov r0, #2
bl socket
cmn r0, #1
mov r4, r0
beq .L46
mov r2, #2
mov ip, #0
lsl r3, r5, #16
lsr r3, r3, #24
orr r5, r3, r5, lsl #8
strh r2, [sp, #4] @ movhi
add r1, sp, #4
mov r2, #16
strh r5, [sp, #6] @ movhi
str ip, [sp, #16]
str ip, [sp, #12]
str ip, [sp, #8]
bl bind
cmn r0, #1
beq .L46
mov r1, #200
mov r0, r4
bl listen
cmn r0, #1
beq .L46
mov r0, #17
ldr r1, .L130+8
bl signal
mov r5, #16
ldr r8, .L130+12
.L47:
mov r2, sp
mov r0, r4
add r1, sp, #20
str r5, [sp]
bl accept
cmp r0, #0
str r0, [r8]
blt .L47
bl fork
cmp r0, #0
beq .L126
ldr r0, [r8]
bl close
b .L47
.L125:
ldr r0, .L130+16
bl puts
.L43:
ldr r3, .L130
ldr r2, [r3]
ldr r3, [sp, #1060]
eors r2, r3, r2
mov r3, #0
bne .L127
mvn r0, #0
add sp, sp, #1056
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L126:
ldr r10, .L130+20
ldr r9, .L130+24
.L48:
mov r2, #255
mov r1, #0
add r0, sp, #36
bl memset
mov r2, #255
ldr r0, [r8]
add r1, sp, #36
bl read
subs r5, r0, #0
blt .L128
beq .L52
mov r4, #0
.L70:
add r3, sp, #1056
add r3, r3, #8
add r3, r3, r4
ldrb r3, [r3, #-1028] @ zero_extendqisi2
cmp r3, #112
beq .L129
cmp r3, #103
bne .L52
mov r2, #255
mov r1, #0
add r0, sp, #292
bl memset
add r3, sp, #1056
add r1, r4, #1
add r3, r3, #8
add r3, r3, r1
ldrb r2, [r3, #-1028] @ zero_extendqisi2
cmp r2, #0
beq .L48
cmp r1, #254
bgt .L75
add r3, sp, #36
add r1, r3, r1
add r3, sp, #292
sub r0, r3, #1
mov r3, #0
rsb ip, r4, #254
.L64:
add r3, r3, #1
cmp r3, ip
strb r2, [r0, #1]!
beq .L63
ldrb r2, [r1, #1]! @ zero_extendqisi2
cmp r2, #0
bne .L64
.L63:
add r4, r4, #2
add r0, sp, #292
add r4, r4, r3
bl strlen
cmp r0, #50
bhi .L52
ldrb r3, [sp, #292] @ zero_extendqisi2
cmp r3, #0
beq .L52
ldr r6, [r10]
cmp r6, #0
ble .L66
add r6, r6, r6, lsl #2
add r6, r6, r6, lsl #2
mov r7, #0
ldr fp, .L130+28
lsl r6, r6, #1
b .L69
.L67:
add r7, r7, #50
cmp r7, r6
add fp, fp, #50
beq .L66
.L69:
mov r0, fp
add r1, sp, #292
bl strcmp
cmp r0, #0
bne .L67
ldrb r3, [r7, r9] @ zero_extendqisi2
ldr fp, [r8]
cmp r3, #0
add r7, r7, r9
beq .L66
add r6, sp, #804
mov r1, r0
mov r2, #255
mov r0, r6
bl memset
mov r3, #102
mov r0, r6
strb r3, [sp, #804]
bl strlen
mov r1, r7
mov r2, #255
add r0, r6, r0
bl __stpcpy_chk
sub r2, r0, r6
mov r1, r6
mov r0, fp
add r2, r2, #1
bl writen
cmp r0, #0
blt .L123
.L62:
cmp r5, r4
bgt .L70
b .L48
.L66:
mov r2, #1
ldr r1, .L130+32
ldr r0, [r8]
bl writen
cmp r0, #0
bge .L62
.L123:
ldr r0, .L130+36
bl perror
b .L62
.L129:
mov r2, #255
mov r1, #0
add r0, sp, #292
bl memset
mov r2, #255
mov r1, #0
add r0, sp, #548
bl memset
add r2, sp, #1056
add r3, r4, #1
add r2, r2, #8
add r2, r2, r3
ldrb r2, [r2, #-1028] @ zero_extendqisi2
cmp r2, #0
beq .L48
cmp r3, #254
bgt .L73
mov r0, #0
add r1, sp, #36
add ip, r1, r3
add r3, sp, #292
sub r1, r3, #1
rsb lr, r4, #254
.L56:
mov r3, r0
add r0, r0, #1
add r3, r3, #2
cmp r0, lr
strb r2, [r1, #1]!
add r3, r3, r4
beq .L55
ldrb r2, [ip, #1]! @ zero_extendqisi2
cmp r2, #0
bne .L56
.L55:
add r2, sp, #1056
add ip, r3, #1
add r2, r2, #8
add r2, r2, ip
ldrb r1, [r2, #-1028] @ zero_extendqisi2
add r4, r4, #2
cmp r1, #0
add r4, r4, r0
beq .L48
cmp ip, #254
bgt .L74
add r2, sp, #36
add ip, r2, ip
add r2, sp, #548
sub lr, r2, #1
mov r2, #0
rsb r3, r3, #254
.L59:
add r2, r2, #1
cmp r3, r2
strb r1, [lr, #1]!
beq .L58
ldrb r1, [ip, #1]! @ zero_extendqisi2
cmp r1, #0
bne .L59
.L58:
add r4, r4, #1
add r0, sp, #292
add r4, r4, r2
bl strlen
cmp r0, #50
bhi .L52
ldrb r3, [sp, #292] @ zero_extendqisi2
cmp r3, #0
beq .L52
add r0, sp, #548
bl strlen
cmp r0, #50
bhi .L52
ldrb r3, [sp, #548] @ zero_extendqisi2
cmp r3, #0
beq .L52
add r1, sp, #548
add r0, sp, #292
bl put
b .L62
.L75:
mov r3, #0
b .L63
.L128:
ldr r0, .L130+40
bl perror
b .L48
.L52:
mov r0, #0
bl exit
.L74:
mov r2, #0
b .L58
.L73:
mov r0, #0
b .L55
.L124:
ldr r0, .L130+44
bl puts
b .L43
.L46:
bl setupfail
.L127:
bl __stack_chk_fail
.L131:
.align 2
.L130:
.word .LC7
.word 80808
.word sig_chld
.word sockfd
.word .LC3
.word .LANCHOR1
.word VALUEE
.word KEYY
.word .LC5
.word .LC6
.word .LC4
.word .LC2
.size main, .-main
.comm VALUEE,5000,4
.comm KEYY,5000,4
.global data
.comm sockfd,4,4
.section .rodata
.align 2
.set .LANCHOR0,. + 0
.LC1:
.ascii "\000\000"
.bss
.align 2
.set .LANCHOR1,. + 0
.type data, %object
.size data, 4
data:
.space 4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99902.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "01"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
lea r12, .LC0[rip]
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov ebp, 1
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
.p2align 4,,10
.p2align 3
.L2:
xor ebx, ebx
.p2align 4,,10
.p2align 3
.L3:
mov rsi, r12
mov edi, 1
xor eax, eax
add ebx, 1
call __printf_chk@PLT
cmp ebx, ebp
jne .L3
mov edi, 10
lea ebp, 1[rbx]
call putchar@PLT
cmp ebx, 6
jne .L2
pop rbx
.cfi_def_cfa_offset 24
xor eax, eax
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99902.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "01\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r5, #1
ldr r6, .L8
.L2:
mov r4, #0
.L3:
mov r1, r6
mov r0, #1
add r4, r4, #1
bl __printf_chk
cmp r4, r5
bne .L3
mov r0, #10
bl putchar
cmp r4, #6
add r5, r4, #1
bne .L2
mov r0, #0
pop {r4, r5, r6, pc}
.L9:
.align 2
.L8:
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999021.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
test edi, edi
jle .L6
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
lea eax, -1[rdi]
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
lea rbp, 8[rsi+rax*8]
mov rbx, rsi
sub rsp, 8
.cfi_def_cfa_offset 32
.p2align 4,,10
.p2align 3
.L3:
mov rdi, QWORD PTR [rbx]
add rbx, 8
call puts@PLT
cmp rbx, rbp
jne .L3
add rsp, 8
.cfi_def_cfa_offset 24
xor eax, eax
pop rbx
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
ret
.L6:
.cfi_restore 3
.cfi_restore 6
xor eax, eax
ret
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999021.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r0, #0
ble .L6
push {r4, r5, r6, lr}
sub r4, r1, #4
add r5, r4, r0, lsl #2
.L3:
ldr r0, [r4, #4]!
bl puts
cmp r4, r5
bne .L3
mov r0, #0
pop {r4, r5, r6, pc}
.L6:
mov r0, #0
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99904.c"
.intel_syntax noprefix
.text
.p2align 4
.globl pop
.type pop, @function
pop:
.LFB50:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
test rdi, rdi
je .L3
mov r12, QWORD PTR [rdi]
call free@PLT
mov rax, r12
pop r12
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L3:
.cfi_restore_state
xor r12d, r12d
mov rax, r12
pop r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE50:
.size pop, .-pop
.p2align 4
.globl push
.type push, @function
push:
.LFB51:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
mov r13, rdi
mov edi, 16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
mov rbp, rsi
call malloc@PLT
mov rdi, rbp
mov QWORD PTR [rax], r13
mov r12, rax
call strlen@PLT
lea r13, 1[rax]
mov rdi, r13
call malloc@PLT
mov rdx, r13
mov rsi, rbp
mov rdi, rax
mov QWORD PTR 8[r12], rax
call memcpy@PLT
mov rax, r12
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE51:
.size push, .-push
.p2align 4
.globl destroy
.type destroy, @function
destroy:
.LFB52:
.cfi_startproc
endbr64
test rdi, rdi
je .L16
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
mov rbx, rdi
.p2align 4,,10
.p2align 3
.L10:
mov rdi, rbx
mov rbx, QWORD PTR [rbx]
call free@PLT
test rbx, rbx
jne .L10
xor eax, eax
pop rbx
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L16:
.cfi_restore 3
xor eax, eax
ret
.cfi_endproc
.LFE52:
.size destroy, .-destroy
.p2align 4
.globl print
.type print, @function
print:
.LFB53:
.cfi_startproc
endbr64
test rdi, rdi
je .L27
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
mov rbx, rdi
.p2align 4,,10
.p2align 3
.L21:
mov rdi, QWORD PTR 8[rbx]
call puts@PLT
mov rbx, QWORD PTR [rbx]
test rbx, rbx
jne .L21
pop rbx
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L27:
.cfi_restore 3
ret
.cfi_endproc
.LFE53:
.size print, .-print
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%s"
.LC1:
.string "x"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB54:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
lea rdi, .LC0[rip]
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
lea r12, .LC0[rip]
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
xor ebx, ebx
sub rsp, 1016
.cfi_def_cfa_offset 1056
mov rax, QWORD PTR fs:40
mov QWORD PTR 1000[rsp], rax
xor eax, eax
mov r13, rsp
mov rsi, r13
call __isoc99_scanf@PLT
jmp .L31
.p2align 4,,10
.p2align 3
.L36:
mov edi, 16
call malloc@PLT
mov rdi, r13
mov QWORD PTR [rax], rbx
mov rbp, rax
call strlen@PLT
lea rbx, 1[rax]
mov rdi, rbx
call malloc@PLT
mov QWORD PTR 8[rbp], rax
cmp ebx, 8
jb .L51
mov edx, ebx
mov rdi, rax
mov rsi, r13
mov rcx, QWORD PTR -8[r13+rdx]
mov QWORD PTR -8[rax+rdx], rcx
lea ecx, -1[rbx]
shr ecx, 3
rep movsq
.L33:
mov rsi, r13
mov rdi, r12
xor eax, eax
mov rbx, rbp
call __isoc99_scanf@PLT
.L31:
cmp WORD PTR 0[r13], 120
jne .L36
mov rdi, rbx
call print
test rbx, rbx
je .L39
.L40:
mov rdi, rbx
mov rbx, QWORD PTR [rbx]
call free@PLT
test rbx, rbx
jne .L40
.L39:
mov rax, QWORD PTR 1000[rsp]
sub rax, QWORD PTR fs:40
jne .L52
add rsp, 1016
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L51:
.cfi_restore_state
test bl, 4
jne .L53
test ebx, ebx
je .L33
movzx edx, BYTE PTR 0[r13]
mov BYTE PTR [rax], dl
test bl, 2
je .L33
mov ebx, ebx
movzx edx, WORD PTR -2[r13+rbx]
mov WORD PTR -2[rax+rbx], dx
jmp .L33
.L53:
mov edx, DWORD PTR 0[r13]
mov ebx, ebx
mov DWORD PTR [rax], edx
mov edx, DWORD PTR -4[r13+rbx]
mov DWORD PTR -4[rax+rbx], edx
jmp .L33
.L52:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE54:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99904.c"
.text
.align 2
.global pop
.syntax unified
.arm
.fpu softvfp
.type pop, %function
pop:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
subs r4, r0, #0
beq .L1
ldr r4, [r4]
bl free
.L1:
mov r0, r4
pop {r4, pc}
.size pop, .-pop
.align 2
.global push
.syntax unified
.arm
.fpu softvfp
.type push, %function
push:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r6, r0
mov r0, #8
mov r5, r1
bl malloc
mov r4, r0
mov r0, r5
str r6, [r4]
bl strlen
add r6, r0, #1
mov r0, r6
bl malloc
mov r2, r6
mov r1, r5
str r0, [r4, #4]
bl memcpy
mov r0, r4
pop {r4, r5, r6, pc}
.size push, .-push
.align 2
.global destroy
.syntax unified
.arm
.fpu softvfp
.type destroy, %function
destroy:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
subs r4, r0, #0
beq .L9
.L10:
mov r0, r4
ldr r4, [r4]
bl free
cmp r4, #0
bne .L10
.L9:
mov r0, #0
pop {r4, pc}
.size destroy, .-destroy
.align 2
.global print
.syntax unified
.arm
.fpu softvfp
.type print, %function
print:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
subs r4, r0, #0
popeq {r4, pc}
.L18:
ldr r0, [r4, #4]
bl puts
ldr r4, [r4]
cmp r4, #0
bne .L18
pop {r4, pc}
.size print, .-print
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%s\000"
.align 2
.LC1:
.ascii "x\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 1008
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, lr}
ldr r3, .L41
sub sp, sp, #1012
ldr r0, .L41+4
add r1, sp, #4
ldr r3, [r3]
str r3, [sp, #1004]
mov r3,#0
mov r4, #0
bl __isoc99_scanf
ldr r5, .L41+4
b .L25
.L35:
mov r0, r4
add r1, sp, #4
bl push
add r1, sp, #4
mov r4, r0
mov r0, r5
bl __isoc99_scanf
.L25:
ldrh r3, [sp, #4]
cmp r3, #120
bne .L35
cmp r4, #0
beq .L29
mov r5, r4
.L30:
ldr r0, [r5, #4]
bl puts
ldr r5, [r5]
cmp r5, #0
bne .L30
.L31:
mov r0, r4
ldr r4, [r4]
bl free
cmp r4, #0
bne .L31
.L29:
ldr r3, .L41
ldr r2, [r3]
ldr r3, [sp, #1004]
eors r2, r3, r2
mov r3, #0
bne .L40
mov r0, #0
add sp, sp, #1012
@ sp needed
pop {r4, r5, pc}
.L40:
bl __stack_chk_fail
.L42:
.align 2
.L41:
.word .LC2
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99905.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
lea rdi, .LC0[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
lea rsi, 4[rsp]
call __isoc99_scanf@PLT
mov r8d, DWORD PTR 4[rsp]
cmp r8d, 1
je .L2
cmp r8d, 7
jle .L6
mov edx, 12
mov eax, 7
mov ecx, 1
.p2align 4,,10
.p2align 3
.L4:
add eax, edx
add ecx, 1
add edx, 6
cmp r8d, eax
jg .L4
.L3:
lea r8d, 1[rcx]
.L2:
xor eax, eax
mov edx, r8d
mov edi, 1
lea rsi, .LC0[rip]
call __printf_chk@PLT
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L13
xor eax, eax
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L6:
.cfi_restore_state
mov ecx, 1
jmp .L3
.L13:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.text
.p2align 4
.globl inp
.type inp, @function
inp:
.LFB24:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
lea rdi, .LC0[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
lea rsi, 4[rsp]
call __isoc99_scanf@PLT
mov eax, DWORD PTR 4[rsp]
mov rdx, QWORD PTR 8[rsp]
sub rdx, QWORD PTR fs:40
jne .L17
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE24:
.size inp, .-inp
.p2align 4
.globl cal
.type cal, @function
cal:
.LFB25:
.cfi_startproc
endbr64
mov eax, 1
cmp edi, 1
je .L18
cmp edi, 7
jle .L23
mov ecx, 12
mov edx, 7
.p2align 4,,10
.p2align 3
.L21:
add edx, ecx
mov esi, eax
add ecx, 6
add eax, 1
cmp edi, edx
jg .L21
lea eax, 2[rsi]
ret
.p2align 4,,10
.p2align 3
.L23:
mov eax, 2
.L18:
ret
.cfi_endproc
.LFE25:
.size cal, .-cal
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99905.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC1:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr r3, .L14
sub sp, sp, #12
mov r1, sp
ldr r0, .L14+4
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
bl __isoc99_scanf
ldr r2, [sp]
cmp r2, #1
beq .L2
cmp r2, #7
ble .L6
mov r0, #12
mov r1, #7
mov r3, #1
.L4:
add r1, r1, r0
cmp r2, r1
mov ip, r3
add r0, r0, #6
add r3, r3, #1
bgt .L4
add r2, ip, #2
.L2:
mov r0, #1
ldr r1, .L14+4
bl __printf_chk
ldr r3, .L14
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L13
mov r0, #0
add sp, sp, #12
@ sp needed
ldr pc, [sp], #4
.L6:
mov r2, #2
b .L2
.L13:
bl __stack_chk_fail
.L15:
.align 2
.L14:
.word .LC1
.word .LC0
.size main, .-main
.section .rodata.cst4
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global inp
.syntax unified
.arm
.fpu softvfp
.type inp, %function
inp:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr r3, .L20
sub sp, sp, #12
mov r1, sp
ldr r0, .L20+4
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
bl __isoc99_scanf
ldr r3, .L20
ldr r0, [sp]
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L19
add sp, sp, #12
@ sp needed
ldr pc, [sp], #4
.L19:
bl __stack_chk_fail
.L21:
.align 2
.L20:
.word .LC2
.word .LC0
.size inp, .-inp
.align 2
.global cal
.syntax unified
.arm
.fpu softvfp
.type cal, %function
cal:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r0, #1
bxeq lr
cmp r0, #7
ble .L27
mov r1, #12
mov r2, #7
mov r3, #1
.L25:
add r2, r2, r1
cmp r0, r2
mov ip, r3
add r1, r1, #6
add r3, r3, #1
bgt .L25
add r0, ip, #2
bx lr
.L27:
mov r0, #2
bx lr
.size cal, .-cal
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999051.c"
.intel_syntax noprefix
.text
.p2align 4
.globl delay
.type delay, @function
delay:
.LFB0:
.cfi_startproc
endbr64
ret
.cfi_endproc
.LFE0:
.size delay, .-delay
.p2align 4
.globl getpid
.type getpid, @function
getpid:
.LFB1:
.cfi_startproc
endbr64
#APP
# 10 "the_stack_data/999051.c" 1
svc 1
mov rax, x0
# 0 "" 2
#NO_APP
ret
.cfi_endproc
.LFE1:
.size getpid, .-getpid
.p2align 4
.globl uart_read
.type uart_read, @function
uart_read:
.LFB2:
.cfi_startproc
endbr64
#APP
# 19 "the_stack_data/999051.c" 1
svc 2
mov rax, x0
# 0 "" 2
#NO_APP
ret
.cfi_endproc
.LFE2:
.size uart_read, .-uart_read
.p2align 4
.globl uart_write
.type uart_write, @function
uart_write:
.LFB3:
.cfi_startproc
endbr64
#APP
# 28 "the_stack_data/999051.c" 1
svc 3
mov rax, x0
# 0 "" 2
#NO_APP
ret
.cfi_endproc
.LFE3:
.size uart_write, .-uart_write
.p2align 4
.globl uart_printf
.type uart_printf, @function
uart_printf:
.LFB4:
.cfi_startproc
endbr64
sub rsp, 328
.cfi_def_cfa_offset 336
mov r10, rdi
mov QWORD PTR 152[rsp], rsi
mov QWORD PTR 160[rsp], rdx
mov QWORD PTR 168[rsp], rcx
mov QWORD PTR 176[rsp], r8
mov QWORD PTR 184[rsp], r9
test al, al
je .L7
movaps XMMWORD PTR 192[rsp], xmm0
movaps XMMWORD PTR 208[rsp], xmm1
movaps XMMWORD PTR 224[rsp], xmm2
movaps XMMWORD PTR 240[rsp], xmm3
movaps XMMWORD PTR 256[rsp], xmm4
movaps XMMWORD PTR 272[rsp], xmm5
movaps XMMWORD PTR 288[rsp], xmm6
movaps XMMWORD PTR 304[rsp], xmm7
.L7:
mov rax, QWORD PTR fs:40
mov QWORD PTR 136[rsp], rax
xor eax, eax
lea rdx, 8[rsp]
lea rdi, 32[rsp]
mov rsi, r10
lea rax, 336[rsp]
mov DWORD PTR 8[rsp], 8
mov QWORD PTR 16[rsp], rax
lea rax, 144[rsp]
mov DWORD PTR 12[rsp], 48
mov QWORD PTR 24[rsp], rax
call vsprintf@PLT
#APP
# 28 "the_stack_data/999051.c" 1
svc 3
mov rdx, x0
# 0 "" 2
#NO_APP
mov rcx, QWORD PTR 136[rsp]
sub rcx, QWORD PTR fs:40
jne .L10
add rsp, 328
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L10:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4:
.size uart_printf, .-uart_printf
.p2align 4
.globl exec
.type exec, @function
exec:
.LFB5:
.cfi_startproc
endbr64
#APP
# 48 "the_stack_data/999051.c" 1
svc 4
mov rax, x0
# 0 "" 2
#NO_APP
ret
.cfi_endproc
.LFE5:
.size exec, .-exec
.p2align 4
.globl self_exit
.type self_exit, @function
self_exit:
.LFB6:
.cfi_startproc
endbr64
#APP
# 56 "the_stack_data/999051.c" 1
svc 5
# 0 "" 2
#NO_APP
.L13:
jmp .L13
.cfi_endproc
.LFE6:
.size self_exit, .-self_exit
.p2align 4
.globl fork
.type fork, @function
fork:
.LFB7:
.cfi_startproc
endbr64
#APP
# 62 "the_stack_data/999051.c" 1
svc 6
mov rax, x0
# 0 "" 2
#NO_APP
ret
.cfi_endproc
.LFE7:
.size fork, .-fork
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999051.c"
.text
.align 2
.global delay
.syntax unified
.arm
.fpu softvfp
.type delay, %function
delay:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
bx lr
.size delay, .-delay
.align 2
.global getpid
.syntax unified
.arm
.fpu softvfp
.type getpid, %function
getpid:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
.syntax divided
@ 10 "the_stack_data/999051.c" 1
svc 1
mov r0, x0
@ 0 "" 2
.arm
.syntax unified
bx lr
.size getpid, .-getpid
.align 2
.global uart_read
.syntax unified
.arm
.fpu softvfp
.type uart_read, %function
uart_read:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
.syntax divided
@ 19 "the_stack_data/999051.c" 1
svc 2
mov r0, x0
@ 0 "" 2
.arm
.syntax unified
bx lr
.size uart_read, .-uart_read
.align 2
.global uart_write
.syntax unified
.arm
.fpu softvfp
.type uart_write, %function
uart_write:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
.syntax divided
@ 28 "the_stack_data/999051.c" 1
svc 3
mov r0, x0
@ 0 "" 2
.arm
.syntax unified
bx lr
.size uart_write, .-uart_write
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global uart_printf
.syntax unified
.arm
.fpu softvfp
.type uart_printf, %function
uart_printf:
@ args = 4, pretend = 16, frame = 112
@ frame_needed = 0, uses_anonymous_args = 1
push {r0, r1, r2, r3}
str lr, [sp, #-4]!
ldr r3, .L10
sub sp, sp, #116
add r2, sp, #124
ldr r1, [sp, #120]
add r0, sp, #8
ldr r3, [r3]
str r3, [sp, #108]
mov r3,#0
str r2, [sp, #4]
bl vsprintf
.syntax divided
@ 28 "the_stack_data/999051.c" 1
svc 3
mov r3, x0
@ 0 "" 2
.arm
.syntax unified
ldr r3, .L10
ldr r2, [r3]
ldr r3, [sp, #108]
eors r2, r3, r2
mov r3, #0
bne .L9
add sp, sp, #116
@ sp needed
ldr lr, [sp], #4
add sp, sp, #16
bx lr
.L9:
bl __stack_chk_fail
.L11:
.align 2
.L10:
.word .LC0
.size uart_printf, .-uart_printf
.align 2
.global exec
.syntax unified
.arm
.fpu softvfp
.type exec, %function
exec:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
.syntax divided
@ 48 "the_stack_data/999051.c" 1
svc 4
mov r0, x0
@ 0 "" 2
.arm
.syntax unified
bx lr
.size exec, .-exec
.align 2
.global self_exit
.syntax unified
.arm
.fpu softvfp
.type self_exit, %function
self_exit:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
.syntax divided
@ 56 "the_stack_data/999051.c" 1
svc 5
@ 0 "" 2
.arm
.syntax unified
.L14:
b .L14
.size self_exit, .-self_exit
.align 2
.global fork
.syntax unified
.arm
.fpu softvfp
.type fork, %function
fork:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
.syntax divided
@ 62 "the_stack_data/999051.c" 1
svc 6
mov r0, x0
@ 0 "" 2
.arm
.syntax unified
bx lr
.size fork, .-fork
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99906.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
xor eax, eax
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99906.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #0
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999063.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d%d"
.LC1:
.string "%d\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
lea rdi, .LC0[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
lea rsi, 4[rsp]
mov rdx, rsp
call __isoc99_scanf@PLT
mov r9d, DWORD PTR 4[rsp]
mov esi, DWORD PTR [rsp]
mov edi, r9d
sub edi, esi
add edi, 1
cmp r9d, edi
jl .L8
add r9d, 1
mov r8d, 1
mov ecx, 2
.p2align 4,,10
.p2align 3
.L6:
imul r8d, edi
mov eax, r8d
cdq
idiv ecx
test edx, edx
je .L21
jmp .L3
.p2align 4,,10
.p2align 3
.L23:
mov eax, r8d
cdq
idiv ecx
add ecx, 1
cdq
mov r8d, eax
idiv ecx
test edx, edx
jne .L3
.L21:
cmp esi, ecx
jge .L23
.L3:
add edi, 1
cmp edi, r9d
jne .L6
.L2:
xor eax, eax
mov edx, r8d
mov edi, 1
lea rsi, .LC1[rip]
call __printf_chk@PLT
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L24
xor eax, eax
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore_state
mov r8d, 1
jmp .L2
.L24:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999063.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d%d\000"
.global __aeabi_idivmod
.global __aeabi_idiv
.align 2
.LC1:
.ascii "%d\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
ldr r3, .L16
sub sp, sp, #16
ldr r0, .L16+4
add r2, sp, #4
add r1, sp, #8
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
bl __isoc99_scanf
ldmib sp, {r6, r8}
sub r7, r8, r6
add r7, r7, #1
cmp r8, r7
mov r5, #1
blt .L2
mov r4, #2
add r8, r8, r5
.L5:
mul r5, r7, r5
mov r1, r4
mov r0, r5
bl __aeabi_idivmod
cmp r6, r4
cmpge r1, #0
bne .L3
.L4:
mov r1, r4
mov r0, r5
bl __aeabi_idiv
add r4, r4, #1
mov r1, r4
mov r5, r0
bl __aeabi_idivmod
cmp r6, r4
cmpge r1, #0
beq .L4
.L3:
add r7, r7, #1
cmp r7, r8
bne .L5
.L2:
mov r2, r5
mov r0, #1
ldr r1, .L16+8
bl __printf_chk
ldr r3, .L16
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L15
mov r0, #0
add sp, sp, #16
@ sp needed
pop {r4, r5, r6, r7, r8, pc}
.L15:
bl __stack_chk_fail
.L17:
.align 2
.L16:
.word .LC2
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999065.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Enter year, month and day "
.LC1:
.string "Year: "
.LC2:
.string "%d"
.LC3:
.string "Month: "
.LC4:
.string "Day: "
.LC5:
.string "\nYour age in days: %d"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 40
.cfi_def_cfa_offset 48
lea rdi, .LC0[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
call puts@PLT
lea rsi, .LC1[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
lea rsi, 12[rsp]
lea rdi, .LC2[rip]
xor eax, eax
call __isoc99_scanf@PLT
lea rsi, .LC3[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
lea rsi, 16[rsp]
lea rdi, .LC2[rip]
xor eax, eax
call __isoc99_scanf@PLT
lea rsi, .LC4[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
lea rsi, 20[rsp]
lea rdi, .LC2[rip]
xor eax, eax
call __isoc99_scanf@PLT
imul eax, DWORD PTR 16[rsp], 30
mov edi, 1
lea rsi, .LC5[rip]
imul edx, DWORD PTR 12[rsp], 365
add edx, eax
xor eax, eax
add edx, DWORD PTR 20[rsp]
call __printf_chk@PLT
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L5
xor eax, eax
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999065.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Enter year, month and day \000"
.align 2
.LC1:
.ascii "Year: \000"
.align 2
.LC2:
.ascii "%d\000"
.align 2
.LC3:
.ascii "Month: \000"
.align 2
.LC4:
.ascii "Day: \000"
.align 2
.LC5:
.ascii "\012Your age in days: %d\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC6:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr r3, .L6
sub sp, sp, #20
ldr r0, .L6+4
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
bl puts
ldr r1, .L6+8
mov r0, #1
bl __printf_chk
mov r1, sp
ldr r0, .L6+12
bl __isoc99_scanf
ldr r1, .L6+16
mov r0, #1
bl __printf_chk
add r1, sp, #4
ldr r0, .L6+12
bl __isoc99_scanf
ldr r1, .L6+20
mov r0, #1
bl __printf_chk
add r1, sp, #8
ldr r0, .L6+12
bl __isoc99_scanf
ldr r3, [sp]
ldr r2, [sp, #4]
add r1, r3, r3, lsl #3
add r3, r3, r1, lsl #3
add r3, r3, r3, lsl #2
ldr r1, [sp, #8]
rsb r2, r2, r2, lsl #4
add r2, r3, r2, lsl #1
add r2, r2, r1
mov r0, #1
ldr r1, .L6+24
bl __printf_chk
ldr r3, .L6
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L5
mov r0, #0
add sp, sp, #20
@ sp needed
ldr pc, [sp], #4
.L5:
bl __stack_chk_fail
.L7:
.align 2
.L6:
.word .LC6
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99907.c"
.intel_syntax noprefix
.text
.p2align 4
.globl sighold
.type sighold, @function
sighold:
.LFB0:
.cfi_startproc
endbr64
xor eax, eax
ret
.cfi_endproc
.LFE0:
.size sighold, .-sighold
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99907.c"
.text
.align 2
.global sighold
.syntax unified
.arm
.fpu softvfp
.type sighold, %function
sighold:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #0
bx lr
.size sighold, .-sighold
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999084.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Gimme a name: "
.LC1:
.string "%90[a-z',.!\"/ \\ A-Z]"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB36:
.cfi_startproc
endbr64
sub rsp, 120
.cfi_def_cfa_offset 128
lea rsi, .LC0[rip]
mov edi, 1
mov rax, QWORD PTR fs:40
mov QWORD PTR 104[rsp], rax
xor eax, eax
call __printf_chk@PLT
xor eax, eax
mov rsi, rsp
lea rdi, .LC1[rip]
call __isoc99_scanf@PLT
mov rax, QWORD PTR 104[rsp]
sub rax, QWORD PTR fs:40
jne .L5
xor eax, eax
add rsp, 120
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE36:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999084.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Gimme a name: \000"
.align 2
.LC1:
.ascii "%90[a-z',.!\"/ \\ A-Z]\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 104
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr r3, .L6
sub sp, sp, #108
ldr r1, .L6+4
mov r0, #1
ldr r3, [r3]
str r3, [sp, #100]
mov r3,#0
bl __printf_chk
mov r1, sp
ldr r0, .L6+8
bl __isoc99_scanf
ldr r3, .L6
ldr r2, [r3]
ldr r3, [sp, #100]
eors r2, r3, r2
mov r3, #0
bne .L5
mov r0, #0
add sp, sp, #108
@ sp needed
ldr pc, [sp], #4
.L5:
bl __stack_chk_fail
.L7:
.align 2
.L6:
.word .LC2
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999100.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Victor Mu\303\261oz"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "Welcome to the File Copy Program by %s!\n"
.section .rodata.str1.1
.LC2:
.string "ERROR running write:"
.LC3:
.string "ERROR file does not exist:"
.LC4:
.string "%s"
.LC5:
.string "ERROR reading file:"
.LC6:
.string "ERROR writing to file:"
.LC7:
.string "ERROR closing copy from file:"
.LC8:
.string "ERROR closing copy to file:"
.section .rodata.str1.8
.align 8
.LC9:
.string "File Copy Successful, %d bytes copied\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB36:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov edx, 100
mov esi, 1
lea r8, .LC0[rip]
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
lea rcx, .LC1[rip]
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 280
.cfi_def_cfa_offset 336
mov rax, QWORD PTR fs:40
mov QWORD PTR 264[rsp], rax
xor eax, eax
lea r15, 160[rsp]
mov rdi, r15
call __sprintf_chk@PLT
mov edx, 51
mov rsi, r15
mov edi, 1
call write@PLT
cmp eax, -1
je .L28
.L2:
movdqa xmm0, XMMWORD PTR .LC10[rip]
mov edx, 41
mov rsi, r15
mov edi, 1
movabs rax, 4210143763791640944
movups XMMWORD PTR 160[rsp], xmm0
movdqa xmm0, XMMWORD PTR .LC11[rip]
mov QWORD PTR 192[rsp], rax
mov eax, 10
mov WORD PTR 200[rsp], ax
movups XMMWORD PTR 176[rsp], xmm0
call write@PLT
cmp eax, -1
je .L29
.L3:
lea rbp, 32[rsp]
lea rdi, .LC4[rip]
xor eax, eax
mov rsi, rbp
call __isoc99_scanf@PLT
xor edx, edx
xor esi, esi
mov rdi, rbp
xor eax, eax
call open@PLT
mov r13d, eax
cmp eax, -1
je .L5
movdqa xmm0, XMMWORD PTR .LC10[rip]
mov edx, 39
mov rsi, r15
mov edi, 1
movabs rax, 2879000131172720
movups XMMWORD PTR 160[rsp], xmm0
movdqa xmm0, XMMWORD PTR .LC11[rip]
mov QWORD PTR 192[rsp], rax
movups XMMWORD PTR 176[rsp], xmm0
call write@PLT
cmp eax, -1
je .L30
.L14:
lea rbp, 96[rsp]
lea rdi, .LC4[rip]
xor eax, eax
mov rsi, rbp
call __isoc99_scanf@PLT
xor edx, edx
mov esi, 513
mov rdi, rbp
xor eax, eax
call open@PLT
mov r14d, eax
cmp eax, -1
je .L5
xor ebp, ebp
mov r12, rsp
.p2align 4,,10
.p2align 3
.L9:
mov edx, 27
mov rsi, r12
mov edi, r13d
call read@PLT
mov rbx, rax
cmp eax, -1
je .L31
movsx rdx, eax
mov rsi, r12
mov edi, r14d
call write@PLT
cmp eax, -1
je .L32
add ebp, eax
test ebx, ebx
jne .L9
.L7:
mov edi, r13d
call close@PLT
cmp eax, -1
je .L33
.L10:
mov edi, r14d
call close@PLT
cmp eax, -1
je .L34
.L11:
mov edx, 100
mov esi, 1
mov rdi, r15
xor eax, eax
mov r8d, ebp
lea rcx, .LC9[rip]
call __sprintf_chk@PLT
mov rsi, r15
mov edi, 1
movsx rdx, eax
call write@PLT
cmp eax, -1
je .L12
xor eax, eax
.L1:
mov rcx, QWORD PTR 264[rsp]
sub rcx, QWORD PTR fs:40
jne .L35
add rsp, 280
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L31:
.cfi_restore_state
lea rdi, .LC5[rip]
call perror@PLT
jmp .L7
.L32:
lea rdi, .LC6[rip]
call perror@PLT
jmp .L7
.L29:
lea rdi, .LC2[rip]
call perror@PLT
jmp .L3
.L28:
lea rdi, .LC2[rip]
call perror@PLT
jmp .L2
.L30:
lea rdi, .LC2[rip]
call perror@PLT
jmp .L14
.L33:
lea rdi, .LC7[rip]
call perror@PLT
jmp .L10
.L12:
lea rdi, .LC2[rip]
call perror@PLT
xor eax, eax
jmp .L1
.L34:
lea rdi, .LC8[rip]
call perror@PLT
jmp .L11
.L5:
lea rdi, .LC3[rip]
call perror@PLT
or eax, -1
jmp .L1
.L35:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE36:
.size main, .-main
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC10:
.quad 7526676552943431237
.quad 8007511657925189733
.align 16
.LC11:
.quad 7594793441523146854
.quad 8026294623966094700
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999100.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Welcome to the File Copy Program by %s!\012\000"
.align 2
.LC1:
.ascii "Victor Mu\303\261oz\000"
.align 2
.LC2:
.ascii "ERROR running write:\000"
.align 2
.LC3:
.ascii "Enter the name of the file to copy from:\012\000"
.align 2
.LC4:
.ascii "%s\000"
.align 2
.LC5:
.ascii "ERROR file does not exist:\000"
.align 2
.LC6:
.ascii "Enter the name of the file to copy to:\012\000"
.align 2
.LC7:
.ascii "ERROR reading file:\000"
.align 2
.LC8:
.ascii "ERROR writing to file:\000"
.align 2
.LC9:
.ascii "ERROR closing copy from file:\000"
.align 2
.LC10:
.ascii "ERROR closing copy to file:\000"
.align 2
.LC11:
.ascii "File Copy Successful, %d bytes copied\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC12:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 240
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
ldr r3, .L31
sub sp, sp, #252
ldr ip, .L31+4
str r3, [sp]
mov r2, #100
mov r1, #1
ldr r3, .L31+8
add r0, sp, #144
ldr ip, [ip]
str ip, [sp, #244]
mov ip,#0
bl __sprintf_chk
mov r2, #51
mov r0, #1
add r1, sp, #144
bl write
cmn r0, #1
beq .L22
.L2:
ldr lr, .L31+12
add ip, sp, #144
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldm lr, {r0, r1, r2}
stmia ip!, {r0, r1}
mov r0, #1
strh r2, [ip] @ movhi
add r1, sp, #144
mov r2, #41
bl write
cmn r0, #1
beq .L23
.L3:
add r1, sp, #40
ldr r0, .L31+16
bl __isoc99_scanf
mov r2, #0
add r0, sp, #40
mov r1, r2
bl open
cmn r0, #1
mov r6, r0
beq .L7
ldr lr, .L31+20
add ip, sp, #144
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldm lr, {r0, r1}
mov r2, #39
stm ip, {r0, r1}
mov r0, #1
add r1, sp, #144
bl write
cmn r0, #1
beq .L24
.L6:
add r1, sp, #92
ldr r0, .L31+16
bl __isoc99_scanf
mov r2, #0
ldr r1, .L31+24
add r0, sp, #92
bl open
cmn r0, #1
mov r7, r0
beq .L7
mov r5, #0
.L11:
mov r2, #27
mov r0, r6
add r1, sp, #12
bl read
cmn r0, #1
mov r4, r0
beq .L25
mov r2, r0
add r1, sp, #12
mov r0, r7
bl write
cmn r0, #1
beq .L26
cmp r4, #0
add r5, r5, r0
bne .L11
.L9:
mov r0, r6
bl close
cmn r0, #1
beq .L27
.L12:
mov r0, r7
bl close
cmn r0, #1
beq .L28
.L13:
mov r2, #100
mov r1, #1
ldr r3, .L31+28
str r5, [sp]
add r0, sp, #144
bl __sprintf_chk
add r1, sp, #144
mov r2, r0
mov r0, #1
bl write
cmn r0, #1
movne r0, #0
beq .L29
.L1:
ldr r3, .L31+4
ldr r2, [r3]
ldr r3, [sp, #244]
eors r2, r3, r2
mov r3, #0
bne .L30
add sp, sp, #252
@ sp needed
pop {r4, r5, r6, r7, pc}
.L25:
ldr r0, .L31+32
bl perror
b .L9
.L26:
ldr r0, .L31+36
bl perror
b .L9
.L23:
ldr r0, .L31+40
bl perror
b .L3
.L22:
ldr r0, .L31+40
bl perror
b .L2
.L24:
ldr r0, .L31+40
bl perror
b .L6
.L27:
ldr r0, .L31+44
bl perror
b .L12
.L29:
ldr r0, .L31+40
bl perror
mov r0, #0
b .L1
.L28:
ldr r0, .L31+48
bl perror
b .L13
.L7:
ldr r0, .L31+52
bl perror
mvn r0, #0
b .L1
.L30:
bl __stack_chk_fail
.L32:
.align 2
.L31:
.word .LC1
.word .LC12
.word .LC0
.word .LC3
.word .LC4
.word .LC6
.word 513
.word .LC11
.word .LC7
.word .LC8
.word .LC2
.word .LC9
.word .LC10
.word .LC5
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99912.c"
.intel_syntax noprefix
.text
.p2align 4
.globl N
.type N, @function
N:
.LFB34:
.cfi_startproc
endbr64
mov eax, esi
mov esi, ecx
cmp edi, eax
jg .L4
movsx r8, edi
sub eax, edi
add rax, r8
lea rcx, [rdx+r8*4]
lea rdi, 4[rdx+rax*4]
xor edx, edx
.p2align 4,,10
.p2align 3
.L3:
mov eax, DWORD PTR [rcx]
add rcx, 4
add eax, edx
cdq
idiv esi
cmp rcx, rdi
jne .L3
mov eax, edx
ret
.p2align 4,,10
.p2align 3
.L4:
xor edx, edx
mov eax, edx
ret
.cfi_endproc
.LFE34:
.size N, .-N
.p2align 4
.globl M
.type M, @function
M:
.LFB35:
.cfi_startproc
endbr64
mov eax, esi
mov esi, ecx
cmp edi, eax
jg .L10
movsx r8, edi
sub eax, edi
add rax, r8
lea rcx, [rdx+r8*4]
lea rdi, 4[rdx+rax*4]
mov edx, 1
.p2align 4,,10
.p2align 3
.L9:
mov eax, DWORD PTR [rcx]
add rcx, 4
imul eax, edx
cdq
idiv esi
cmp rcx, rdi
jne .L9
mov eax, edx
ret
.p2align 4,,10
.p2align 3
.L10:
mov edx, 1
mov eax, edx
ret
.cfi_endproc
.LFE35:
.size M, .-M
.p2align 4
.globl H
.type H, @function
H:
.LFB36:
.cfi_startproc
endbr64
movsx rax, edi
add edi, 1
mov r8d, DWORD PTR [rdx+rax*4]
cmp edi, esi
jg .L12
movsx rax, edi
.p2align 4,,10
.p2align 3
.L14:
xor r8d, DWORD PTR [rdx+rax*4]
add rax, 1
cmp esi, eax
jge .L14
.L12:
mov eax, r8d
ret
.cfi_endproc
.LFE36:
.size H, .-H
.p2align 4
.globl max
.type max, @function
max:
.LFB37:
.cfi_startproc
endbr64
cmp edi, esi
mov eax, esi
cmovge eax, edi
ret
.cfi_endproc
.LFE37:
.size max, .-max
.p2align 4
.globl min
.type min, @function
min:
.LFB38:
.cfi_startproc
endbr64
cmp edi, esi
mov eax, esi
cmovle eax, edi
ret
.cfi_endproc
.LFE38:
.size min, .-min
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d%d"
.LC1:
.string "%d"
.LC2:
.string "%d\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
lea rdi, .LC0[rip]
mov rbp, rsp
.cfi_def_cfa_register 6
push r14
push r13
lea rdx, -52[rbp]
lea rsi, -56[rbp]
push r12
push rbx
sub rsp, 32
.cfi_offset 14, -24
.cfi_offset 13, -32
.cfi_offset 12, -40
.cfi_offset 3, -48
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
call __isoc99_scanf@PLT
movsx rax, DWORD PTR -56[rbp]
mov rsi, rsp
mov rcx, rax
lea rax, 15[0+rax*4]
mov rdx, rax
and rax, -4096
sub rsi, rax
and rdx, -16
cmp rsp, rsi
je .L20
.L53:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rsi
jne .L53
.L20:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L54
.L21:
mov rbx, rsp
xor r12d, r12d
lea r14, .LC1[rip]
mov r13, rbx
test ecx, ecx
jle .L26
.p2align 4,,10
.p2align 3
.L25:
mov rsi, r13
mov rdi, r14
xor eax, eax
add r12d, 1
call __isoc99_scanf@PLT
add r13, 4
cmp DWORD PTR -56[rbp], r12d
jg .L25
.L26:
mov eax, DWORD PTR -52[rbp]
xor r12d, r12d
lea r14, -44[rbp]
lea r13, -48[rbp]
test eax, eax
jle .L24
.p2align 4,,10
.p2align 3
.L23:
mov rdx, r14
mov rsi, r13
lea rdi, .LC0[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov eax, DWORD PTR -44[rbp]
mov edx, DWORD PTR -48[rbp]
mov ecx, DWORD PTR -56[rbp]
cmp eax, edx
jl .L27
movsx rdi, edx
sub eax, edx
lea rsi, [rbx+rdi*4]
lea rax, 1[rdi+rax]
lea rdi, [rbx+rax*4]
mov r8, rsi
mov eax, 1
.p2align 4,,10
.p2align 3
.L28:
imul eax, DWORD PTR [r8]
add r8, 4
cdq
idiv ecx
mov r9d, edx
mov eax, edx
cmp r8, rdi
jne .L28
mov r10, rsi
xor edx, edx
.p2align 4,,10
.p2align 3
.L29:
mov eax, DWORD PTR [r10]
add r10, 4
add eax, edx
cdq
idiv ecx
cmp r10, rdi
jne .L29
cmp edx, r9d
mov r8d, r9d
mov eax, 1
mov r9, rsi
cmovge r8d, edx
.p2align 4,,10
.p2align 3
.L31:
imul eax, DWORD PTR [r9]
add r9, 4
cdq
idiv ecx
mov r10d, edx
mov eax, edx
cmp r9, rdi
jne .L31
xor edx, edx
.p2align 4,,10
.p2align 3
.L32:
mov eax, DWORD PTR [rsi]
add rsi, 4
add eax, edx
cdq
idiv ecx
cmp rsi, rdi
jne .L32
cmp edx, r10d
mov eax, r10d
cmovle eax, edx
lea ecx, 1[rax]
cdqe
mov r9d, DWORD PTR [rbx+rax*4]
cmp r8d, ecx
jl .L33
.L35:
movsx rax, ecx
sub r8d, ecx
add r8, rax
lea rdx, [rbx+rax*4]
lea rax, 4[rbx+r8*4]
.p2align 4,,10
.p2align 3
.L34:
xor r9d, DWORD PTR [rdx]
add rdx, 4
cmp rax, rdx
jne .L34
.L33:
mov edx, r9d
lea rsi, .LC2[rip]
xor eax, eax
add r12d, 1
mov edi, 1
call __printf_chk@PLT
cmp DWORD PTR -52[rbp], r12d
jg .L23
.L24:
mov rax, QWORD PTR -40[rbp]
sub rax, QWORD PTR fs:40
jne .L55
lea rsp, -32[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop r14
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.p2align 4,,10
.p2align 3
.L27:
.cfi_restore_state
mov r9d, DWORD PTR [rbx]
mov ecx, 1
mov r8d, 1
jmp .L35
.L54:
or QWORD PTR -8[rsp+rdx], 0
jmp .L21
.L55:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE39:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99912.c"
.text
.global __aeabi_idivmod
.align 2
.global N
.syntax unified
.arm
.fpu softvfp
.type N, %function
N:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r0, r1
bgt .L4
push {r4, r5, r6, lr}
mov r4, r0
mov r6, r3
mov r0, #0
sub r4, r4, #-1073741823
add r4, r2, r4, lsl #2
add r5, r2, r1, lsl #2
.L3:
ldr r2, [r4, #4]!
mov r1, r6
add r0, r0, r2
bl __aeabi_idivmod
cmp r4, r5
mov r0, r1
bne .L3
pop {r4, r5, r6, pc}
.L4:
mov r0, #0
bx lr
.size N, .-N
.align 2
.global M
.syntax unified
.arm
.fpu softvfp
.type M, %function
M:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r0, r1
bgt .L15
push {r4, r5, r6, lr}
mov r4, r0
mov r6, r3
mov r0, #1
sub r4, r4, #-1073741823
add r4, r2, r4, lsl #2
add r5, r2, r1, lsl #2
.L14:
ldr r2, [r4, #4]!
mov r1, r6
mul r0, r2, r0
bl __aeabi_idivmod
cmp r4, r5
mov r0, r1
bne .L14
pop {r4, r5, r6, pc}
.L15:
mov r0, #1
bx lr
.size M, .-M
.align 2
.global H
.syntax unified
.arm
.fpu softvfp
.type H, %function
H:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r0, r1
mov r3, r0
ldr r0, [r2, r0, lsl #2]
bxge lr
add r3, r2, r3, lsl #2
add r1, r2, r1, lsl #2
.L24:
ldr r2, [r3, #4]!
cmp r3, r1
eor r0, r0, r2
bne .L24
bx lr
.size H, .-H
.align 2
.global max
.syntax unified
.arm
.fpu softvfp
.type max, %function
max:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r0, r1
movlt r0, r1
bx lr
.size max, .-max
.align 2
.global min
.syntax unified
.arm
.fpu softvfp
.type min, %function
min:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r0, r1
movge r0, r1
bx lr
.size min, .-min
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d%d\000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "%d\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC3:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #36
ldr r3, .L56
sub r2, fp, #52
ldr r0, .L56+4
sub r1, fp, #56
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
bl __isoc99_scanf
ldr r2, [fp, #-56]
lsl r3, r2, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
cmp r2, #0
mov r8, sp
ble .L33
mov r5, r8
mov r4, #0
ldr r6, .L56+8
.L32:
mov r1, r5
mov r0, r6
bl __isoc99_scanf
ldr r3, [fp, #-56]
add r4, r4, #1
cmp r3, r4
add r5, r5, #4
bgt .L32
.L33:
ldr r3, [fp, #-52]
cmp r3, #0
movgt r9, #0
ble .L31
.L30:
ldr r0, .L56+4
sub r2, fp, #44
sub r1, fp, #48
bl __isoc99_scanf
ldr r7, [fp, #-48]
ldr r5, [fp, #-44]
ldr r6, [fp, #-56]
cmp r7, r5
bgt .L34
sub r7, r7, #-1073741823
add r7, r8, r7, lsl #2
mov r10, r7
mov r4, #0
add r5, r8, r5, lsl #2
.L35:
ldr r0, [r10, #4]!
mov r1, r6
add r0, r4, r0
bl __aeabi_idivmod
cmp r5, r10
mov r4, r1
bne .L35
mov r10, r7
mov r0, #1
.L36:
ldr r2, [r10, #4]!
mov r1, r6
mul r0, r2, r0
bl __aeabi_idivmod
cmp r5, r10
mov r0, r1
bne .L36
cmp r1, r4
movge r3, r4
movlt r3, r1
mov r4, r7
mov r10, #0
str r3, [fp, #-64]
.L38:
ldr r0, [r4, #4]!
mov r1, r6
add r0, r10, r0
bl __aeabi_idivmod
cmp r5, r4
mov r10, r1
bne .L38
mov r0, #1
.L39:
ldr r2, [r7, #4]!
mov r1, r6
mul r0, r2, r0
bl __aeabi_idivmod
cmp r5, r7
mov r0, r1
bne .L39
cmp r1, r10
movlt r0, r10
ldr r2, [fp, #-64]
add r3, r2, #1
cmp r3, r0
ldr r2, [r8, r2, lsl #2]
bgt .L40
.L42:
sub r3, r3, #-1073741823
add r3, r8, r3, lsl #2
add r0, r8, r0, lsl #2
.L41:
ldr r1, [r3, #4]!
cmp r0, r3
eor r2, r2, r1
bne .L41
.L40:
mov r0, #1
ldr r1, .L56+12
bl __printf_chk
ldr r3, [fp, #-52]
add r9, r9, #1
cmp r3, r9
bgt .L30
.L31:
ldr r3, .L56
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L55
mov r0, #0
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L34:
mov r0, #1
ldr r2, [r8]
mov r3, r0
b .L42
.L55:
bl __stack_chk_fail
.L57:
.align 2
.L56:
.word .LC3
.word .LC0
.word .LC1
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999120.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
lea rbp, .LC0[rip]
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
xor ebx, ebx
sub rsp, 8
.cfi_def_cfa_offset 32
jmp .L2
.p2align 4,,10
.p2align 3
.L4:
sub ebx, 1
.L2:
imul eax, ebx, 585698849
add eax, 5376
ror eax, 8
cmp eax, 42
ja .L4
mov edx, ebx
mov rsi, rbp
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L4
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999120.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r4, #0
ldr r5, .L7
ldr r6, .L7+4
b .L2
.L4:
sub r4, r4, #1
.L2:
mul r3, r5, r4
add r3, r3, #5376
ror r3, r3, #8
cmp r3, #42
bhi .L4
mov r2, r4
mov r1, r6
mov r0, #1
bl __printf_chk
b .L4
.L8:
.align 2
.L7:
.word 585698849
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99914.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB16:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov edi, 400
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
sub rsp, 8
.cfi_def_cfa_offset 32
call malloc@PLT
mov rbx, rax
lea rbp, 400[rax]
.p2align 4,,10
.p2align 3
.L2:
mov rdi, rbx
xor eax, eax
add rbx, 4
call validptr@PLT
mov DWORD PTR -4[rbx], 0
cmp rbp, rbx
jne .L2
add rsp, 8
.cfi_def_cfa_offset 24
pop rbx
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE16:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99914.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r0, #400
bl malloc
mov r6, #0
mov r4, r0
add r5, r0, #400
.L2:
mov r0, r4
bl validptr
str r6, [r4], #4
cmp r5, r4
bne .L2
pop {r4, r5, r6, pc}
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99915.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "A soma eh 2"
.LC1:
.string " + %d"
.LC2:
.string " = %d"
.text
.p2align 4
.globl somaprimo
.type somaprimo, @function
somaprimo:
.LFB23:
.cfi_startproc
endbr64
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
xor eax, eax
lea rsi, .LC0[rip]
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
mov r13d, edi
mov edi, 1
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
call __printf_chk@PLT
cmp r13d, 1
jle .L7
mov ebx, 4
mov r14d, 2
mov r12d, 1
lea rbp, .LC1[rip]
.p2align 4,,10
.p2align 3
.L6:
lea r8d, -1[rbx]
xor esi, esi
mov ecx, 1
.p2align 4,,10
.p2align 3
.L4:
mov eax, r8d
cdq
idiv ecx
cmp edx, 1
adc esi, 0
add ecx, 1
cmp ecx, ebx
jne .L4
cmp esi, 2
jne .L5
mov edx, r8d
mov rsi, rbp
mov edi, 1
xor eax, eax
add r14d, r8d
add r12d, 1
call __printf_chk@PLT
.L5:
add ebx, 1
cmp r12d, r13d
jl .L6
.L2:
mov edx, r14d
lea rsi, .LC2[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 40
mov eax, r14d
pop rbp
.cfi_def_cfa_offset 32
pop r12
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
mov r14d, 2
jmp .L2
.cfi_endproc
.LFE23:
.size somaprimo, .-somaprimo
.p2align 4
.globl primo
.type primo, @function
primo:
.LFB24:
.cfi_startproc
endbr64
test edi, edi
jle .L16
lea r8d, 1[rdi]
xor esi, esi
mov ecx, 1
.p2align 4,,10
.p2align 3
.L15:
mov eax, edi
cdq
idiv ecx
cmp edx, 1
adc esi, 0
add ecx, 1
cmp r8d, ecx
jne .L15
xor eax, eax
cmp esi, 2
sete al
ret
.p2align 4,,10
.p2align 3
.L16:
xor eax, eax
ret
.cfi_endproc
.LFE24:
.size primo, .-primo
.section .rodata.str1.1
.LC3:
.string "Insira o valor: "
.LC4:
.string "%d"
.LC5:
.string "N\303\272mero inv\303\241lido"
.LC6:
.string "Apenas 2 eh numero primo"
.LC7:
.string "pause"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB25:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
lea rsi, .LC3[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
lea rdi, .LC4[rip]
lea rsi, A[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov edi, DWORD PTR A[rip]
test edi, edi
jle .L23
cmp edi, 1
je .L24
call somaprimo
.L20:
mov edi, 10
call putchar@PLT
lea rdi, .LC7[rip]
xor eax, eax
call system@PLT
xor eax, eax
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L24:
.cfi_restore_state
lea rsi, .LC6[rip]
xor eax, eax
call __printf_chk@PLT
jmp .L20
.L23:
lea rsi, .LC5[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L20
.cfi_endproc
.LFE25:
.size main, .-main
.globl B
.bss
.align 4
.type B, @object
.size B, 4
B:
.zero 4
.globl A
.align 4
.type A, @object
.size A, 4
A:
.zero 4
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99915.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "A soma eh 2\000"
.global __aeabi_uidivmod
.global __aeabi_idivmod
.align 2
.LC1:
.ascii " + %d\000"
.align 2
.LC2:
.ascii " = %d\000"
.text
.align 2
.global somaprimo
.syntax unified
.arm
.fpu softvfp
.type somaprimo, %function
somaprimo:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r9, r0
ldr r1, .L12
mov r0, #1
bl __printf_chk
cmp r9, #1
ble .L7
mov r5, #4
mov r10, #2
mov r8, #1
ldr fp, .L12+4
.L6:
mov r6, #0
mov r4, #1
sub r7, r5, #1
.L4:
mov r1, r4
mov r0, r7
bl __aeabi_idivmod
add r4, r4, #1
cmp r1, #0
addeq r6, r6, #1
cmp r4, r5
bne .L4
cmp r6, #2
bne .L5
mov r2, r7
mov r1, fp
mov r0, #1
bl __printf_chk
add r10, r10, r7
add r8, r8, #1
.L5:
cmp r8, r9
add r5, r5, #1
blt .L6
.L2:
mov r2, r10
ldr r1, .L12+8
mov r0, #1
bl __printf_chk
mov r0, r10
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L7:
mov r10, #2
b .L2
.L13:
.align 2
.L12:
.word .LC0
.word .LC1
.word .LC2
.size somaprimo, .-somaprimo
.align 2
.global primo
.syntax unified
.arm
.fpu softvfp
.type primo, %function
primo:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
subs r5, r0, #0
ble .L18
mov r4, #1
mov r6, #0
add r7, r5, r4
.L17:
mov r1, r4
mov r0, r5
bl __aeabi_idivmod
add r4, r4, #1
cmp r1, #0
addeq r6, r6, #1
cmp r7, r4
bne .L17
sub r0, r6, #2
clz r0, r0
lsr r0, r0, #5
pop {r4, r5, r6, r7, r8, pc}
.L18:
mov r0, #0
pop {r4, r5, r6, r7, r8, pc}
.size primo, .-primo
.section .rodata.str1.4
.align 2
.LC3:
.ascii "Insira o valor: \000"
.align 2
.LC4:
.ascii "%d\000"
.align 2
.LC5:
.ascii "N\303\272mero inv\303\241lido\000"
.align 2
.LC6:
.ascii "Apenas 2 eh numero primo\000"
.align 2
.LC7:
.ascii "pause\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r4, .L28
ldr r1, .L28+4
mov r0, #1
bl __printf_chk
mov r1, r4
ldr r0, .L28+8
bl __isoc99_scanf
ldr r0, [r4]
cmp r0, #0
ble .L26
cmp r0, #1
beq .L27
bl somaprimo
.L23:
mov r0, #10
bl putchar
ldr r0, .L28+12
bl system
mov r0, #0
pop {r4, pc}
.L27:
ldr r1, .L28+16
bl __printf_chk
b .L23
.L26:
ldr r1, .L28+20
mov r0, #1
bl __printf_chk
b .L23
.L29:
.align 2
.L28:
.word A
.word .LC3
.word .LC4
.word .LC7
.word .LC6
.word .LC5
.size main, .-main
.comm B,4,4
.comm A,4,4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99916.c"
.intel_syntax noprefix
.text
.p2align 4
.globl fseek
.type fseek, @function
fseek:
.LFB23:
.cfi_startproc
endbr64
mov eax, -1
ret
.cfi_endproc
.LFE23:
.size fseek, .-fseek
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99916.c"
.text
.align 2
.global fseek
.syntax unified
.arm
.fpu softvfp
.type fseek, %function
fseek:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mvn r0, #0
bx lr
.size fseek, .-fseek
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999162.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d%d"
.LC1:
.string "%d"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
lea rdi, .LC0[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
lea rdx, 4[rsp]
mov rsi, rsp
call __isoc99_scanf@PLT
mov edi, DWORD PTR [rsp]
test edi, edi
je .L2
mov eax, 1
jle .L4
lea edx, 1[rdi]
mov ecx, 1
mov eax, 1
.p2align 4,,10
.p2align 3
.L6:
imul rax, rcx
add rcx, 1
cmp rcx, rdx
jne .L6
.L4:
mov r8d, DWORD PTR 4[rsp]
test r8d, r8d
jle .L12
lea esi, 1[r8]
mov ecx, 1
mov edx, 1
.p2align 4,,10
.p2align 3
.L8:
imul rdx, rcx
add rcx, 1
cmp rcx, rsi
jne .L8
.L7:
sub edi, r8d
test edi, edi
jle .L13
add edi, 1
mov ecx, 1
mov esi, 1
.p2align 4,,10
.p2align 3
.L10:
imul rsi, rcx
add rcx, 1
cmp rdi, rcx
jne .L10
.L9:
imul rsi, rdx
cqo
mov edi, 1
idiv rsi
lea rsi, .LC1[rip]
mov edx, eax
xor eax, eax
call __printf_chk@PLT
.L5:
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L19
xor eax, eax
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L2:
.cfi_restore_state
mov edi, 48
call putchar@PLT
jmp .L5
.L12:
mov edx, 1
jmp .L7
.L13:
mov esi, 1
jmp .L9
.L19:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999162.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d%d\000"
.global __aeabi_uldivmod
.global __aeabi_ldivmod
.align 2
.LC1:
.ascii "%d\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
ldr r3, .L20
sub sp, sp, #16
ldr r0, .L20+4
add r2, sp, #8
add r1, sp, #4
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
bl __isoc99_scanf
ldr lr, [sp, #4]
cmp lr, #0
beq .L2
movle r0, #1
movle r1, #0
ble .L4
mov r3, #1
mov ip, #0
mov r0, r3
mov r1, ip
.L3:
mov r4, r0
mul r2, r0, ip
mla r2, r3, r1, r2
umull r0, r1, r4, r3
adds r3, r3, #1
adc ip, ip, #0
cmp lr, r3
add r1, r2, r1
bge .L3
.L4:
ldr r6, [sp, #8]
cmp r6, #0
ble .L12
mov r3, #1
mov ip, #0
mov r4, r3
mov r5, ip
.L7:
mov r7, r4
mul r2, r4, ip
mla r2, r3, r5, r2
umull r4, r5, r7, r3
adds r3, r3, #1
adc ip, ip, #0
cmp r6, r3
add r5, r2, r5
bge .L7
.L6:
sub lr, lr, r6
cmp lr, #0
ble .L13
mov r3, #1
mov ip, #0
mov r6, r3
mov r7, ip
.L9:
mov r8, r6
mul r2, r6, ip
mla r2, r3, r7, r2
umull r6, r7, r8, r3
adds r3, r3, #1
adc ip, ip, #0
cmp lr, r3
add r7, r2, r7
bge .L9
.L8:
mul ip, r6, r5
umull r2, r3, r6, r4
mla ip, r4, r7, ip
add r3, ip, r3
bl __aeabi_ldivmod
ldr r1, .L20+8
mov r2, r0
mov r0, #1
bl __printf_chk
.L5:
ldr r3, .L20
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L19
mov r0, #0
add sp, sp, #16
@ sp needed
pop {r4, r5, r6, r7, r8, pc}
.L2:
mov r0, #48
bl putchar
b .L5
.L12:
mov r4, #1
mov r5, #0
b .L6
.L13:
mov r6, #1
mov r7, #0
b .L8
.L19:
bl __stack_chk_fail
.L21:
.align 2
.L20:
.word .LC2
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999163.c"
.intel_syntax noprefix
.text
.p2align 4
.globl fence
.type fence, @function
fence:
.LFB0:
.cfi_startproc
endbr64
#APP
# 3 "the_stack_data/999163.c" 1
sync
# 0 "" 2
#NO_APP
ret
.cfi_endproc
.LFE0:
.size fence, .-fence
.p2align 4
.globl lwfence
.type lwfence, @function
lwfence:
.LFB1:
.cfi_startproc
endbr64
#APP
# 7 "the_stack_data/999163.c" 1
lwsync
# 0 "" 2
#NO_APP
ret
.cfi_endproc
.LFE1:
.size lwfence, .-lwfence
.p2align 4
.globl isync
.type isync, @function
isync:
.LFB2:
.cfi_startproc
endbr64
#APP
# 11 "the_stack_data/999163.c" 1
isync
# 0 "" 2
#NO_APP
ret
.cfi_endproc
.LFE2:
.size isync, .-isync
.p2align 4
.globl P0
.type P0, @function
P0:
.LFB3:
.cfi_startproc
endbr64
mov DWORD PTR __unbuffered_p0_r1[rip], 2
mov DWORD PTR z[rip], 2
#APP
# 7 "the_stack_data/999163.c" 1
lwsync
# 0 "" 2
#NO_APP
mov DWORD PTR __unbuffered_p0_r3[rip], 1
mov DWORD PTR x[rip], 1
#APP
# 3 "the_stack_data/999163.c" 1
sync
# 0 "" 2
#NO_APP
add DWORD PTR __unbuffered_cnt[rip], 1
ret
.cfi_endproc
.LFE3:
.size P0, .-P0
.p2align 4
.globl P1
.type P1, @function
P1:
.LFB4:
.cfi_startproc
endbr64
mov DWORD PTR __unbuffered_p1_r1[rip], 2
mov DWORD PTR x[rip], 2
#APP
# 3 "the_stack_data/999163.c" 1
sync
# 0 "" 2
#NO_APP
mov DWORD PTR __unbuffered_p1_r3[rip], 1
mov DWORD PTR y[rip], 1
#APP
# 3 "the_stack_data/999163.c" 1
sync
# 0 "" 2
#NO_APP
add DWORD PTR __unbuffered_cnt[rip], 1
ret
.cfi_endproc
.LFE4:
.size P1, .-P1
.p2align 4
.globl P2
.type P2, @function
P2:
.LFB5:
.cfi_startproc
endbr64
mov eax, DWORD PTR y[rip]
mov DWORD PTR __unbuffered_p2_r1[rip], eax
#APP
# 3 "the_stack_data/999163.c" 1
sync
# 0 "" 2
#NO_APP
mov DWORD PTR __unbuffered_p2_r3[rip], 1
mov DWORD PTR z[rip], 1
#APP
# 3 "the_stack_data/999163.c" 1
sync
# 0 "" 2
#NO_APP
add DWORD PTR __unbuffered_cnt[rip], 1
ret
.cfi_endproc
.LFE5:
.size P2, .-P2
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Program was expected to be safe for PPC, model checker should have said NO.\nThis likely is a bug in the tool chain."
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB6:
.cfi_startproc
endbr64
.L9:
sub rsp, 8
.cfi_def_cfa_offset 16
xor edi, edi
call P0
call P1
call P2
xor edi, edi
cmp DWORD PTR __unbuffered_cnt[rip], 3
sete dil
xor eax, eax
call __CPROVER_assume@PLT
#APP
# 3 "the_stack_data/999163.c" 1
sync
# 0 "" 2
#NO_APP
cmp DWORD PTR x[rip], 2
mov edi, 1
je .L14
.L10:
lea rsi, .LC0[rip]
xor eax, eax
call __CPROVER_assert@PLT
xor eax, eax
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
cmp DWORD PTR z[rip], 2
jne .L10
xor edi, edi
cmp DWORD PTR __unbuffered_p2_r1[rip], 1
setne dil
jmp .L10
.cfi_endproc
.LFE6:
.size main, .-main
.globl z
.bss
.align 4
.type z, @object
.size z, 4
z:
.zero 4
.globl y
.align 4
.type y, @object
.size y, 4
y:
.zero 4
.globl x
.align 4
.type x, @object
.size x, 4
x:
.zero 4
.globl __unbuffered_p2_r3
.align 4
.type __unbuffered_p2_r3, @object
.size __unbuffered_p2_r3, 4
__unbuffered_p2_r3:
.zero 4
.globl __unbuffered_p2_r1
.align 4
.type __unbuffered_p2_r1, @object
.size __unbuffered_p2_r1, 4
__unbuffered_p2_r1:
.zero 4
.globl __unbuffered_p1_r3
.align 4
.type __unbuffered_p1_r3, @object
.size __unbuffered_p1_r3, 4
__unbuffered_p1_r3:
.zero 4
.globl __unbuffered_p1_r1
.align 4
.type __unbuffered_p1_r1, @object
.size __unbuffered_p1_r1, 4
__unbuffered_p1_r1:
.zero 4
.globl __unbuffered_p0_r3
.align 4
.type __unbuffered_p0_r3, @object
.size __unbuffered_p0_r3, 4
__unbuffered_p0_r3:
.zero 4
.globl __unbuffered_p0_r1
.align 4
.type __unbuffered_p0_r1, @object
.size __unbuffered_p0_r1, 4
__unbuffered_p0_r1:
.zero 4
.globl __unbuffered_cnt
.align 4
.type __unbuffered_cnt, @object
.size __unbuffered_cnt, 4
__unbuffered_cnt:
.zero 4
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999163.c"
.text
.align 2
.global fence
.syntax unified
.arm
.fpu softvfp
.type fence, %function
fence:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
.syntax divided
@ 3 "the_stack_data/999163.c" 1
sync
@ 0 "" 2
.arm
.syntax unified
bx lr
.size fence, .-fence
.align 2
.global lwfence
.syntax unified
.arm
.fpu softvfp
.type lwfence, %function
lwfence:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
.syntax divided
@ 7 "the_stack_data/999163.c" 1
lwsync
@ 0 "" 2
.arm
.syntax unified
bx lr
.size lwfence, .-lwfence
.align 2
.global isync
.syntax unified
.arm
.fpu softvfp
.type isync, %function
isync:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
.syntax divided
@ 11 "the_stack_data/999163.c" 1
isync
@ 0 "" 2
.arm
.syntax unified
bx lr
.size isync, .-isync
.align 2
.global P0
.syntax unified
.arm
.fpu softvfp
.type P0, %function
P0:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r2, #2
ldr r3, .L6
str r2, [r3]
str r2, [r3, #4]
.syntax divided
@ 7 "the_stack_data/999163.c" 1
lwsync
@ 0 "" 2
.arm
.syntax unified
mov r2, #1
str r2, [r3, #8]
str r2, [r3, #12]
.syntax divided
@ 3 "the_stack_data/999163.c" 1
sync
@ 0 "" 2
.arm
.syntax unified
ldr r2, [r3, #16]
add r2, r2, #1
str r2, [r3, #16]
bx lr
.L7:
.align 2
.L6:
.word .LANCHOR0
.size P0, .-P0
.align 2
.global P1
.syntax unified
.arm
.fpu softvfp
.type P1, %function
P1:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r2, #2
ldr r3, .L9
str r2, [r3, #20]
str r2, [r3, #12]
.syntax divided
@ 3 "the_stack_data/999163.c" 1
sync
@ 0 "" 2
.arm
.syntax unified
mov r2, #1
str r2, [r3, #24]
str r2, [r3, #28]
.syntax divided
@ 3 "the_stack_data/999163.c" 1
sync
@ 0 "" 2
.arm
.syntax unified
ldr r2, [r3, #16]
add r2, r2, #1
str r2, [r3, #16]
bx lr
.L10:
.align 2
.L9:
.word .LANCHOR0
.size P1, .-P1
.align 2
.global P2
.syntax unified
.arm
.fpu softvfp
.type P2, %function
P2:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r3, .L12
ldr r2, [r3, #28]
str r2, [r3, #32]
.syntax divided
@ 3 "the_stack_data/999163.c" 1
sync
@ 0 "" 2
.arm
.syntax unified
mov r2, #1
str r2, [r3, #36]
str r2, [r3, #4]
.syntax divided
@ 3 "the_stack_data/999163.c" 1
sync
@ 0 "" 2
.arm
.syntax unified
ldr r2, [r3, #16]
add r2, r2, #1
str r2, [r3, #16]
bx lr
.L13:
.align 2
.L12:
.word .LANCHOR0
.size P2, .-P2
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Program was expected to be safe for PPC, model chec"
.ascii "ker should have said NO.\012This likely is a bug in"
.ascii " the tool chain.\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
.L15:
mov r3, #2
push {r4, r5, r6, lr}
ldr r4, .L21
str r3, [r4]
str r3, [r4, #4]
.syntax divided
@ 7 "the_stack_data/999163.c" 1
lwsync
@ 0 "" 2
.arm
.syntax unified
mov r5, #1
str r5, [r4, #8]
str r5, [r4, #12]
.syntax divided
@ 3 "the_stack_data/999163.c" 1
sync
@ 0 "" 2
.arm
.syntax unified
ldr r2, [r4, #16]
str r3, [r4, #20]
add r2, r2, r5
str r3, [r4, #12]
str r2, [r4, #16]
.syntax divided
@ 3 "the_stack_data/999163.c" 1
sync
@ 0 "" 2
.arm
.syntax unified
str r5, [r4, #24]
str r5, [r4, #28]
.syntax divided
@ 3 "the_stack_data/999163.c" 1
sync
@ 0 "" 2
.arm
.syntax unified
ldr r3, [r4, #16]
ldr r2, [r4, #28]
add r3, r3, r5
str r3, [r4, #16]
str r2, [r4, #32]
.syntax divided
@ 3 "the_stack_data/999163.c" 1
sync
@ 0 "" 2
.arm
.syntax unified
str r5, [r4, #36]
str r5, [r4, #4]
.syntax divided
@ 3 "the_stack_data/999163.c" 1
sync
@ 0 "" 2
.arm
.syntax unified
ldr r3, [r4, #16]
add r3, r3, r5
sub r0, r3, #3
clz r0, r0
lsr r0, r0, #5
str r3, [r4, #16]
bl __CPROVER_assume
.syntax divided
@ 3 "the_stack_data/999163.c" 1
sync
@ 0 "" 2
.arm
.syntax unified
ldr r3, [r4, #12]
cmp r3, #2
beq .L20
.L18:
mov r0, r5
.L16:
ldr r1, .L21+4
bl __CPROVER_assert
mov r0, #0
pop {r4, r5, r6, pc}
.L20:
ldr r3, [r4, #4]
cmp r3, #2
bne .L18
ldr r5, [r4, #32]
subs r0, r5, #1
movne r0, #1
b .L16
.L22:
.align 2
.L21:
.word .LANCHOR0
.word .LC0
.size main, .-main
.global z
.global y
.global x
.global __unbuffered_p2_r3
.global __unbuffered_p2_r1
.global __unbuffered_p1_r3
.global __unbuffered_p1_r1
.global __unbuffered_p0_r3
.global __unbuffered_p0_r1
.global __unbuffered_cnt
.bss
.align 2
.set .LANCHOR0,. + 0
.type __unbuffered_p0_r1, %object
.size __unbuffered_p0_r1, 4
__unbuffered_p0_r1:
.space 4
.type z, %object
.size z, 4
z:
.space 4
.type __unbuffered_p0_r3, %object
.size __unbuffered_p0_r3, 4
__unbuffered_p0_r3:
.space 4
.type x, %object
.size x, 4
x:
.space 4
.type __unbuffered_cnt, %object
.size __unbuffered_cnt, 4
__unbuffered_cnt:
.space 4
.type __unbuffered_p1_r1, %object
.size __unbuffered_p1_r1, 4
__unbuffered_p1_r1:
.space 4
.type __unbuffered_p1_r3, %object
.size __unbuffered_p1_r3, 4
__unbuffered_p1_r3:
.space 4
.type y, %object
.size y, 4
y:
.space 4
.type __unbuffered_p2_r1, %object
.size __unbuffered_p2_r1, 4
__unbuffered_p2_r1:
.space 4
.type __unbuffered_p2_r3, %object
.size __unbuffered_p2_r3, 4
__unbuffered_p2_r3:
.space 4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99917.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99917.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999176.c"
.intel_syntax noprefix
.text
.p2align 4
.globl func_exit
.type func_exit, @function
func_exit:
.LFB39:
.cfi_startproc
endbr64
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
lea rdi, __func__.1[rip]
sub rsp, 8
.cfi_def_cfa_offset 16
call puts@PLT
xor edi, edi
call exit@PLT
.cfi_endproc
.LFE39:
.size func_exit, .-func_exit
.p2align 4
.globl func_call
.type func_call, @function
func_call:
.LFB40:
.cfi_startproc
endbr64
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
lea rdi, __func__.0[rip]
sub rsp, 8
.cfi_def_cfa_offset 16
call puts@PLT
xor edi, edi
call exit@PLT
.cfi_endproc
.LFE40:
.size func_call, .-func_call
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%016lx\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB41:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
sub rsp, 8
.cfi_def_cfa_offset 32
#APP
# 20 "the_stack_data/999176.c" 1
moveli r9, 9269
shl16insli r9, r9, 23416
shl16insli r9, r9, -14988
shl16insli r9, r9, 22168
moveli r44, -12324
shl16insli r44, r44, -28627
shl16insli r44, r44, 16604
shl16insli r44, r44, -17536
moveli r1, 7448
shl16insli r1, r1, 10894
shl16insli r1, r1, 29909
shl16insli r1, r1, 28991
move rdx, r9
move r13, r44
move r12, r1
# 0 "" 2
#NO_APP
lea rsi, .LC0[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov rdx, r13
mov edi, 1
xor eax, eax
lea rsi, .LC0[rip]
call __printf_chk@PLT
mov rdx, r12
mov edi, 1
xor eax, eax
lea rsi, .LC0[rip]
call __printf_chk@PLT
add rsp, 8
.cfi_def_cfa_offset 24
xor eax, eax
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE41:
.size main, .-main
.section .rodata
.align 8
.type __func__.0, @object
.size __func__.0, 10
__func__.0:
.string "func_call"
.align 8
.type __func__.1, @object
.size __func__.1, 10
__func__.1:
.string "func_exit"
.globl mem
.data
.align 16
.type mem, @object
.size mem, 16
mem:
.quad -4003619800745076510
.quad -2399834498802101438
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999176.c"
.text
.align 2
.global func_exit
.syntax unified
.arm
.fpu softvfp
.type func_exit, %function
func_exit:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r0, .L4
bl puts
mov r0, #0
bl exit
.L5:
.align 2
.L4:
.word .LANCHOR0
.size func_exit, .-func_exit
.align 2
.global func_call
.syntax unified
.arm
.fpu softvfp
.type func_call, %function
func_call:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r0, .L8
bl puts
mov r0, #0
bl exit
.L9:
.align 2
.L8:
.word .LANCHOR0+12
.size func_call, .-func_call
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%016lx\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
.syntax divided
@ 20 "the_stack_data/999176.c" 1
moveli r9, 9269
shl16insli r9, r9, 23416
shl16insli r9, r9, -14988
shl16insli r9, r9, 22168
moveli r44, -12324
shl16insli r44, r44, -28627
shl16insli r44, r44, 16604
shl16insli r44, r44, -17536
moveli r1, 7448
shl16insli r1, r1, 10894
shl16insli r1, r1, 29909
shl16insli r1, r1, 28991
{ fnop ; shl3add r9, r44, r1 }
move r2, r9
move r6, r44
move r5, r1
@ 0 "" 2
.arm
.syntax unified
ldr r4, .L12
mov r0, #1
mov r1, r4
bl __printf_chk
mov r2, r6
mov r1, r4
mov r0, #1
bl __printf_chk
mov r2, r5
mov r1, r4
mov r0, #1
bl __printf_chk
mov r0, #0
pop {r4, r5, r6, pc}
.L13:
.align 2
.L12:
.word .LC0
.size main, .-main
.global mem
.section .rodata
.align 2
.set .LANCHOR0,. + 0
.type __func__.5429, %object
.size __func__.5429, 10
__func__.5429:
.ascii "func_exit\000"
.space 2
.type __func__.5433, %object
.size __func__.5433, 10
__func__.5433:
.ascii "func_call\000"
.data
.align 2
.type mem, %object
.size mem, 8
mem:
.word -656500510
.word -80981182
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99918.c"
.intel_syntax noprefix
.text
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "enter the distance van has travelled :"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%d"
.LC2:
.string "amount to be paid :%d"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
lea rsi, .LC0[rip]
mov edi, 1
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
call __printf_chk@PLT
lea rsi, 4[rsp]
lea rdi, .LC1[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov edx, DWORD PTR 4[rsp]
cmp edx, 30
jg .L2
imul edx, edx, 50
.L3:
xor eax, eax
lea rsi, .LC2[rip]
mov edi, 1
call __printf_chk@PLT
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L7
xor eax, eax
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L2:
.cfi_restore_state
sub edx, 30
imul edx, edx, 40
add edx, 1500
jmp .L3
.L7:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99918.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "enter the distance van has travelled :\000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "amount to be paid :%d\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC3:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr r3, .L8
sub sp, sp, #12
ldr r1, .L8+4
mov r0, #1
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
bl __printf_chk
mov r1, sp
ldr r0, .L8+8
bl __isoc99_scanf
ldr r2, [sp]
mov r0, #1
cmp r2, #30
movgt r3, #40
movle r3, #50
subgt r2, r2, #30
mulgt r2, r3, r2
addgt r2, r2, #1488
mulle r2, r3, r2
addgt r2, r2, #12
ldr r1, .L8+12
bl __printf_chk
ldr r3, .L8
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L7
mov r0, #0
add sp, sp, #12
@ sp needed
ldr pc, [sp], #4
.L7:
bl __stack_chk_fail
.L9:
.align 2
.L8:
.word .LC3
.word .LC0
.word .LC1
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999181.c"
.intel_syntax noprefix
.text
.p2align 4
.globl test
.type test, @function
test:
.LFB0:
.cfi_startproc
endbr64
ret
.cfi_endproc
.LFE0:
.size test, .-test
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999181.c"
.text
.align 2
.global test
.syntax unified
.arm
.fpu softvfp
.type test, %function
test:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
bx lr
.size test, .-test
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999215.c"
.intel_syntax noprefix
.text
.p2align 4
.globl array_task
.type array_task, @function
array_task:
.LFB0:
.cfi_startproc
endbr64
mov ecx, DWORD PTR in[rip]
mov eax, DWORD PTR ar[rip]
mov edx, DWORD PTR ar[rip+4]
cmp ecx, 1
je .L5
cmp ecx, 2
jne .L3
add edx, 1
mov DWORD PTR ar[rip+4], edx
.L3:
mov DWORD PTR out1[rip], eax
add eax, edx
mov DWORD PTR out2[rip], edx
mov DWORD PTR out3[rip], eax
ret
.p2align 4,,10
.p2align 3
.L5:
add eax, 1
mov DWORD PTR ar[rip], eax
jmp .L3
.cfi_endproc
.LFE0:
.size array_task, .-array_task
.globl out3
.bss
.align 4
.type out3, @object
.size out3, 4
out3:
.zero 4
.globl out2
.align 4
.type out2, @object
.size out2, 4
out2:
.zero 4
.globl out1
.align 4
.type out1, @object
.size out1, 4
out1:
.zero 4
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999215.c"
.text
.align 2
.global array_task
.syntax unified
.arm
.fpu softvfp
.type array_task, %function
array_task:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, .L6
ldr r1, .L6+4
ldr r0, [r3]
ldr r2, [r1]
cmp r0, #1
addeq r2, r2, #1
str lr, [sp, #-4]!
ldr r3, [r1, #4]
streq r2, [r1]
beq .L3
cmp r0, #2
addeq r3, r3, #1
streq r3, [r1, #4]
.L3:
ldr lr, .L6+8
ldr r0, .L6+12
ldr r1, .L6+16
add ip, r2, r3
str r2, [lr]
str ip, [r0]
str r3, [r1]
ldr pc, [sp], #4
.L7:
.align 2
.L6:
.word in
.word ar
.word out1
.word out3
.word out2
.size array_task, .-array_task
.comm out3,4,4
.comm out2,4,4
.comm out1,4,4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999227.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "\n Socket creation error "
.LC1:
.string "127.0.0.1"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "\nInvalid address/ Address not supported "
.section .rodata.str1.1
.LC3:
.string "\nConnection Failed "
.LC4:
.string "Hello from client"
.LC5:
.string "Hello message sent"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB54:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov ecx, 126
pxor xmm0, xmm0
xor edx, edx
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov esi, 1
sub rsp, 1064
.cfi_def_cfa_offset 1088
mov rax, QWORD PTR fs:40
mov QWORD PTR 1048[rsp], rax
xor eax, eax
lea rdi, 32[rsp]
movups XMMWORD PTR 16[rsp], xmm0
rep stosq
mov edi, 2
call socket@PLT
test eax, eax
js .L9
lea rdx, 4[rsp]
mov edi, 2
mov ebp, eax
mov r12, rsp
lea rsi, .LC1[rip]
mov DWORD PTR [rsp], -2012020734
call inet_pton@PLT
test eax, eax
jle .L10
mov edx, 16
mov rsi, r12
mov edi, ebp
call connect@PLT
test eax, eax
js .L11
xor ecx, ecx
mov edx, 17
lea rsi, .LC4[rip]
mov edi, ebp
call send@PLT
lea r12, 16[rsp]
lea rdi, .LC5[rip]
call puts@PLT
mov edx, 1024
mov rsi, r12
mov edi, ebp
call read@PLT
mov rdi, r12
call puts@PLT
xor eax, eax
.L1:
mov rcx, QWORD PTR 1048[rsp]
sub rcx, QWORD PTR fs:40
jne .L12
add rsp, 1064
.cfi_remember_state
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
lea rdi, .LC0[rip]
call puts@PLT
or eax, -1
jmp .L1
.L11:
lea rdi, .LC3[rip]
call puts@PLT
or eax, -1
jmp .L1
.L10:
lea rdi, .LC2[rip]
call puts@PLT
or eax, -1
jmp .L1
.L12:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE54:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999227.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "\012 Socket creation error \000"
.align 2
.LC1:
.ascii "127.0.0.1\000"
.align 2
.LC2:
.ascii "\012Invalid address/ Address not supported \000"
.align 2
.LC3:
.ascii "\012Connection Failed \000"
.align 2
.LC4:
.ascii "Hello from client\000"
.align 2
.LC5:
.ascii "Hello message sent\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC6:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 1056
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, lr}
mov r4, #0
sub sp, sp, #1056
sub sp, sp, #4
ldr r3, .L13
mov r1, r4
mov r2, #1020
add r0, sp, #32
ldr r3, [r3]
str r3, [sp, #1052]
mov r3,#0
str r4, [sp, #28]
bl memset
mov r2, r4
mov r1, #1
mov r0, #2
bl socket
subs r5, r0, #0
blt .L9
ldr r3, .L13+4
add r2, sp, #16
str r3, [sp, #12]
mov r0, #2
sub r3, r2, #4
ldr r1, .L13+8
str r3, [sp, #4]
bl inet_pton
cmp r0, #0
ble .L10
mov r2, #16
mov r0, r5
ldr r1, [sp, #4]
bl connect
cmp r0, #0
blt .L11
add ip, sp, #28
mov r3, r4
mov r2, #17
ldr r1, .L13+12
mov r0, r5
str ip, [sp, #4]
bl send
ldr r0, .L13+16
bl puts
mov r2, #1024
ldr r1, [sp, #4]
mov r0, r5
bl read
ldr r0, [sp, #4]
bl puts
mov r0, r4
.L1:
ldr r3, .L13
ldr r2, [r3]
ldr r3, [sp, #1052]
eors r2, r3, r2
mov r3, #0
bne .L12
add sp, sp, #1056
add sp, sp, #4
@ sp needed
pop {r4, r5, pc}
.L9:
ldr r0, .L13+20
bl puts
mvn r0, #0
b .L1
.L11:
ldr r0, .L13+24
bl puts
mvn r0, #0
b .L1
.L10:
ldr r0, .L13+28
bl puts
mvn r0, #0
b .L1
.L12:
bl __stack_chk_fail
.L14:
.align 2
.L13:
.word .LC6
.word -2012020734
.word .LC1
.word .LC4
.word .LC5
.word .LC0
.word .LC3
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99923.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
mov eax, 42
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99923.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #42
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99924.c"
.intel_syntax noprefix
.text
.p2align 4
.globl return_input
.type return_input, @function
return_input:
.LFB23:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
sub rsp, 48
.cfi_def_cfa_offset 64
mov rax, QWORD PTR fs:40
mov QWORD PTR 40[rsp], rax
xor eax, eax
mov rbp, rsp
mov rdi, rbp
call gets@PLT
mov rdi, rbp
call puts@PLT
mov rax, QWORD PTR 40[rsp]
sub rax, QWORD PTR fs:40
jne .L5
add rsp, 48
.cfi_remember_state
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size return_input, .-return_input
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB24:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
call return_input
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE24:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99924.c"
.text
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global return_input
.syntax unified
.arm
.fpu softvfp
.type return_input, %function
return_input:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr r3, .L6
sub sp, sp, #44
add r0, sp, #4
ldr r3, [r3]
str r3, [sp, #36]
mov r3,#0
bl gets
add r0, sp, #4
bl puts
ldr r3, .L6
ldr r2, [r3]
ldr r3, [sp, #36]
eors r2, r3, r2
mov r3, #0
bne .L5
add sp, sp, #44
@ sp needed
ldr pc, [sp], #4
.L5:
bl __stack_chk_fail
.L7:
.align 2
.L6:
.word .LC0
.size return_input, .-return_input
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
bl return_input
mov r0, #0
pop {r4, pc}
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99925.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov ebp, 2
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
sub rsp, 8
.cfi_def_cfa_offset 32
.L2:
mov ebx, 1
.L3:
mov rsi, QWORD PTR stdout[rip]
mov edi, 42
add ebx, 1
call putc@PLT
cmp ebx, ebp
jne .L3
mov rsi, QWORD PTR stdout[rip]
mov edi, 10
lea ebp, 1[rbx]
call putc@PLT
cmp ebx, 6
jne .L2
add rsp, 8
.cfi_def_cfa_offset 24
xor eax, eax
pop rbx
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99925.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r6, #2
ldr r5, .L8
.L2:
mov r4, #1
.L3:
mov r0, #42
ldr r1, [r5]
add r4, r4, #1
bl putc
cmp r4, r6
bne .L3
mov r0, #10
ldr r1, [r5]
bl putc
cmp r4, #6
add r6, r4, #1
bne .L2
mov r0, #0
pop {r4, r5, r6, pc}
.L9:
.align 2
.L8:
.word stdout
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99926.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Hello World"
.LC1:
.string "\nEnter two numbers to add: "
.LC2:
.string "%f %f"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC3:
.string "The sum of %.3f and %.3f is %.2f"
.align 8
.LC4:
.string "\nEnter the radius of the circle: "
.section .rodata.str1.1
.LC5:
.string "%f"
.section .rodata.str1.8
.align 8
.LC7:
.string "The area of the circle with radius %.2f is %.2f"
.section .rodata.str1.1
.LC8:
.string "\nInput the 3 sides:"
.LC9:
.string "%f %f %f"
.LC12:
.string "Area of the triangle= %.2f"
.section .rodata.str1.8
.align 8
.LC13:
.string "Such a trianle does not exists"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 40
.cfi_def_cfa_offset 48
lea rsi, .LC0[rip]
mov edi, 1
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
call __printf_chk@PLT
lea rsi, .LC1[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
lea rdx, 4[rsp]
mov rsi, rsp
xor eax, eax
lea rdi, .LC2[rip]
call __isoc99_scanf@PLT
movss xmm0, DWORD PTR [rsp]
movss xmm1, DWORD PTR 4[rsp]
lea rsi, .LC3[rip]
mov edi, 1
mov eax, 3
movaps xmm2, xmm0
cvtss2sd xmm0, xmm0
addss xmm2, xmm1
cvtss2sd xmm1, xmm1
cvtss2sd xmm2, xmm2
call __printf_chk@PLT
mov edi, 1
xor eax, eax
lea rsi, .LC4[rip]
call __printf_chk@PLT
lea rsi, 8[rsp]
lea rdi, .LC5[rip]
xor eax, eax
call __isoc99_scanf@PLT
movss xmm0, DWORD PTR 8[rsp]
mov edi, 1
lea rsi, .LC7[rip]
mov eax, 2
movaps xmm1, xmm0
mulss xmm1, xmm0
cvtss2sd xmm0, xmm0
cvtss2sd xmm1, xmm1
mulsd xmm1, QWORD PTR .LC6[rip]
cvtsd2ss xmm1, xmm1
cvtss2sd xmm1, xmm1
call __printf_chk@PLT
xor eax, eax
lea rsi, .LC8[rip]
mov edi, 1
call __printf_chk@PLT
xor eax, eax
lea rcx, 20[rsp]
lea rdx, 16[rsp]
lea rsi, 12[rsp]
lea rdi, .LC9[rip]
call __isoc99_scanf@PLT
movss xmm1, DWORD PTR 12[rsp]
movss xmm0, DWORD PTR 16[rsp]
movss xmm2, DWORD PTR 20[rsp]
movaps xmm3, xmm1
addss xmm3, xmm0
comiss xmm3, xmm2
jbe .L2
movaps xmm3, xmm0
addss xmm3, xmm2
comiss xmm3, xmm1
ja .L13
.L2:
lea rsi, .LC13[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
.L1:
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L14
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L13:
.cfi_restore_state
movaps xmm3, xmm1
addss xmm3, xmm2
comiss xmm3, xmm0
jbe .L2
mulss xmm2, xmm2
movaps xmm3, xmm1
movaps xmm4, xmm0
mulss xmm4, xmm0
mulss xmm3, xmm1
addss xmm3, xmm4
subss xmm3, xmm2
movss xmm2, DWORD PTR .LC10[rip]
mulss xmm2, xmm1
cvtss2sd xmm3, xmm3
mulsd xmm3, xmm3
mulss xmm1, xmm2
mulss xmm1, xmm0
mulss xmm0, xmm1
cvtss2sd xmm0, xmm0
subsd xmm0, xmm3
cvtsd2ss xmm0, xmm0
cvtss2sd xmm0, xmm0
call sqrt@PLT
mulsd xmm0, QWORD PTR .LC11[rip]
lea rsi, .LC12[rip]
mov edi, 1
mov eax, 1
cvtsd2ss xmm0, xmm0
cvtss2sd xmm0, xmm0
call __printf_chk@PLT
jmp .L1
.L14:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC6:
.long 1374389535
.long 1074339512
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC10:
.long 1082130432
.section .rodata.cst8
.align 8
.LC11:
.long 0
.long 1070596096
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99926.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Hello World\000"
.align 2
.LC1:
.ascii "\012Enter two numbers to add: \000"
.align 2
.LC2:
.ascii "%f %f\000"
.global __aeabi_f2d
.align 2
.LC3:
.ascii "The sum of %.3f and %.3f is %.2f\000"
.global __aeabi_fadd
.align 2
.LC4:
.ascii "\012Enter the radius of the circle: \000"
.align 2
.LC5:
.ascii "%f\000"
.align 2
.LC6:
.ascii "The area of the circle with radius %.2f is %.2f\000"
.global __aeabi_fmul
.global __aeabi_dmul
.global __aeabi_d2f
.align 2
.LC7:
.ascii "\012Input the 3 sides:\000"
.align 2
.LC8:
.ascii "%f %f %f\000"
.global __aeabi_fcmpgt
.global __aeabi_fcmplt
.global __aeabi_fsub
.global __aeabi_dsub
.align 2
.LC9:
.ascii "Area of the triangle= %.2f\000"
.align 2
.LC10:
.ascii "Such a trianle does not exists\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC11:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
ldr r3, .L15
sub sp, sp, #52
ldr r1, .L15+4
mov r0, #1
ldr r3, [r3]
str r3, [sp, #44]
mov r3,#0
bl __printf_chk
ldr r1, .L15+8
mov r0, #1
bl __printf_chk
add r2, sp, #24
add r1, sp, #20
ldr r0, .L15+12
bl __isoc99_scanf
ldr r7, [sp, #20] @ float
ldr r6, [sp, #24] @ float
mov r0, r7
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r0, r7
mov r1, r6
bl __aeabi_fadd
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r6
str r2, [sp, #8]
str r3, [sp, #12]
bl __aeabi_f2d
mov r2, r4
mov r3, r5
stm sp, {r0-r1}
ldr r1, .L15+16
mov r0, #1
bl __printf_chk
ldr r1, .L15+20
mov r0, #1
bl __printf_chk
add r1, sp, #28
ldr r0, .L15+24
bl __isoc99_scanf
ldr r6, [sp, #28] @ float
mov r0, r6
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r0, r6
mov r1, r6
bl __aeabi_fmul
bl __aeabi_f2d
ldr r2, .L15+28
ldr r3, .L15+32
bl __aeabi_dmul
bl __aeabi_d2f
bl __aeabi_f2d
mov r2, r4
mov r3, r5
stm sp, {r0-r1}
ldr r1, .L15+36
mov r0, #1
bl __printf_chk
ldr r1, .L15+40
mov r0, #1
bl __printf_chk
add r3, sp, #40
add r2, sp, #36
add r1, sp, #32
ldr r0, .L15+44
bl __isoc99_scanf
ldr r5, [sp, #32] @ float
ldr r4, [sp, #36] @ float
ldr r6, [sp, #40] @ float
mov r1, r4
mov r0, r5
bl __aeabi_fadd
mov r1, r6
bl __aeabi_fcmpgt
cmp r0, #0
beq .L2
mov r1, r6
mov r0, r4
bl __aeabi_fadd
mov r1, r0
mov r0, r5
bl __aeabi_fcmplt
cmp r0, #0
bne .L13
.L2:
mov r0, #1
ldr r1, .L15+48
bl __printf_chk
.L1:
ldr r3, .L15
ldr r2, [r3]
ldr r3, [sp, #44]
eors r2, r3, r2
mov r3, #0
bne .L14
add sp, sp, #52
@ sp needed
pop {r4, r5, r6, r7, pc}
.L13:
mov r1, r6
mov r0, r5
bl __aeabi_fadd
mov r1, r0
mov r0, r4
bl __aeabi_fcmplt
cmp r0, #0
beq .L2
mov r1, r5
mov r0, r5
bl __aeabi_fmul
mov r1, r4
mov r7, r0
mov r0, r4
bl __aeabi_fmul
mov r1, r0
mov r0, r7
bl __aeabi_fadd
mov r1, r6
mov r6, r0
mov r0, r1
bl __aeabi_fmul
mov r1, r0
mov r0, r6
bl __aeabi_fsub
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r0, r5
ldr r1, .L15+52
bl __aeabi_fmul
mov r1, r5
bl __aeabi_fmul
mov r1, r4
bl __aeabi_fmul
mov r1, r4
bl __aeabi_fmul
bl __aeabi_f2d
mov r2, r6
mov r3, r7
mov r4, r0
mov r5, r1
mov r0, r6
mov r1, r7
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
bl __aeabi_d2f
bl __aeabi_f2d
bl sqrt
mov r2, #0
ldr r3, .L15+56
bl __aeabi_dmul
bl __aeabi_d2f
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, #1
ldr r1, .L15+60
bl __printf_chk
b .L1
.L14:
bl __stack_chk_fail
.L16:
.align 2
.L15:
.word .LC11
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.word 1374389535
.word 1074339512
.word .LC6
.word .LC7
.word .LC8
.word .LC10
.word 1082130432
.word 1070596096
.word .LC9
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999262.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Enter the character: "
.LC1:
.string "%c"
.LC2:
.string "\n Is Lower case "
.LC3:
.string "\n Not Lower case "
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
lea rsi, .LC0[rip]
mov edi, 1
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
call __printf_chk@PLT
lea rsi, 7[rsp]
lea rdi, .LC1[rip]
xor eax, eax
call __isoc99_scanf@PLT
movzx eax, BYTE PTR 7[rsp]
sub eax, 97
cmp al, 25
ja .L2
lea rdi, .LC2[rip]
call puts@PLT
.L3:
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L7
xor eax, eax
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L2:
.cfi_restore_state
lea rdi, .LC3[rip]
call puts@PLT
jmp .L3
.L7:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE39:
.size main, .-main
.text
.p2align 4
.globl LowerCheck
.type LowerCheck, @function
LowerCheck:
.LFB40:
.cfi_startproc
endbr64
sub edi, 97
xor eax, eax
cmp dil, 25
setbe al
ret
.cfi_endproc
.LFE40:
.size LowerCheck, .-LowerCheck
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999262.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Enter the character: \000"
.align 2
.LC1:
.ascii "%c\000"
.align 2
.LC2:
.ascii "\012 Is Lower case \000"
.align 2
.LC3:
.ascii "\012 Not Lower case \000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC4:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr r3, .L8
sub sp, sp, #12
ldr r1, .L8+4
mov r0, #1
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
bl __printf_chk
add r1, sp, #3
ldr r0, .L8+8
bl __isoc99_scanf
ldrb r3, [sp, #3] @ zero_extendqisi2
sub r3, r3, #97
cmp r3, #25
ldrls r0, .L8+12
ldrhi r0, .L8+16
bl puts
ldr r3, .L8
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L7
mov r0, #0
add sp, sp, #12
@ sp needed
ldr pc, [sp], #4
.L7:
bl __stack_chk_fail
.L9:
.align 2
.L8:
.word .LC4
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.size main, .-main
.text
.align 2
.global LowerCheck
.syntax unified
.arm
.fpu softvfp
.type LowerCheck, %function
LowerCheck:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
sub r0, r0, #97
cmp r0, #25
movhi r0, #0
movls r0, #1
bx lr
.size LowerCheck, .-LowerCheck
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999266.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d"
.LC1:
.string "%d %d"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
lea r11, -397312[rsp]
.cfi_def_cfa 11, 397352
.LPSRL0:
sub rsp, 4096
or DWORD PTR [rsp], 0
cmp rsp, r11
jne .LPSRL0
.cfi_def_cfa_register 7
sub rsp, 2728
.cfi_def_cfa_offset 400080
mov edx, 400000
xor esi, esi
xor ebx, ebx
lea r12, .LC0[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 400024[rsp], rax
xor eax, eax
lea rbp, 16[rsp]
lea r13, 12[rsp]
mov rdi, rbp
call memset@PLT
lea rsi, 4[rsp]
lea rdi, .LC0[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov eax, DWORD PTR 4[rsp]
test eax, eax
jle .L4
.p2align 4,,10
.p2align 3
.L2:
mov rsi, r13
mov rdi, r12
xor eax, eax
add ebx, 1
call __isoc99_scanf@PLT
movsx rax, DWORD PTR 12[rsp]
add DWORD PTR 16[rsp+rax*4], 1
cmp DWORD PTR 4[rsp], ebx
jg .L2
.L4:
lea rsi, 8[rsp]
lea rdi, .LC0[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov esi, DWORD PTR 8[rsp]
mov eax, 99999
xor edx, edx
jmp .L3
.p2align 4,,10
.p2align 3
.L5:
sub rax, 1
jb .L18
.L3:
mov ecx, DWORD PTR 0[rbp+rax*4]
mov r8d, eax
test ecx, ecx
je .L5
add edx, 1
cmp esi, edx
jne .L5
.L6:
xor eax, eax
mov edx, r8d
mov edi, 1
lea rsi, .LC1[rip]
call __printf_chk@PLT
mov rax, QWORD PTR 400024[rsp]
sub rax, QWORD PTR fs:40
jne .L19
add rsp, 400040
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L18:
.cfi_restore_state
mov ecx, DWORD PTR 12[rsp]
or r8d, -1
jmp .L6
.L19:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE39:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999266.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d\000"
.align 2
.LC1:
.ascii "%d %d\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 400016
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, lr}
sub sp, sp, #397312
sub sp, sp, #2704
sub sp, sp, #4
ldr r3, .L18
ldr ip, .L18+4
add r0, sp, #16
add r3, sp, r3
mov r1, #0
ldr r2, .L18+8
sub r0, r0, #4
ldr ip, [ip]
str ip, [r3]
mov ip,#0
bl memset
mov r1, sp
ldr r0, .L18+12
bl __isoc99_scanf
ldr r3, [sp, #0]
cmp r3, #0
movgt r4, #0
ldrgt r5, .L18+12
ble .L4
.L2:
add r1, sp, #8
mov r0, r5
bl __isoc99_scanf
ldr r3, [sp, #8]
add r2, sp, #2704
add r3, r2, r3, lsl #2
ldr r2, [r3, #-2692]
ldr r1, [sp, #0]
add r4, r4, #1
add r2, r2, #1
cmp r1, r4
str r2, [r3, #-2692]
bgt .L2
.L4:
add r1, sp, #4
ldr r0, .L18+12
bl __isoc99_scanf
ldr r0, .L18+16
mov r1, #0
ldr ip, [sp, #4]
ldr r2, .L18+20
add r0, sp, r0
b .L3
.L5:
subs r2, r2, #1
bcc .L16
.L3:
ldr r3, [r0], #-4
cmp r3, #0
beq .L5
add r1, r1, #1
cmp ip, r1
bne .L5
.L6:
ldr r1, .L18+24
mov r0, #1
bl __printf_chk
ldr r3, .L18
ldr r2, .L18+4
add r3, sp, r3
ldr r1, [r2]
ldr r2, [r3]
eors r1, r2, r1
mov r2, #0
bne .L17
mov r0, #0
add sp, sp, #397312
add sp, sp, #2704
add sp, sp, #4
@ sp needed
pop {r4, r5, pc}
.L16:
ldr r3, [sp, #8]
b .L6
.L17:
bl __stack_chk_fail
.L19:
.align 2
.L18:
.word 400012
.word .LC2
.word 400000
.word .LC0
.word 400008
.word 99999
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99927.c"
.intel_syntax noprefix
.text
.p2align 4
.globl selectionSort
.type selectionSort, @function
selectionSort:
.LFB23:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
lea r13d, -1[rsi]
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
test r13d, r13d
jle .L1
mov r11, rdi
mov r8d, esi
mov rbx, rdi
xor r10d, r10d
.p2align 4,,10
.p2align 3
.L6:
mov r9d, r10d
add r10d, 1
mov ebp, DWORD PTR [rbx]
cmp r8d, r10d
jle .L8
lea r12, 4[rbx]
mov esi, ebp
mov edx, r10d
mov rax, r12
jmp .L5
.p2align 4,,10
.p2align 3
.L15:
movsx rcx, r9d
add edx, 1
add rax, 4
lea rdi, [r11+rcx*4]
cmp r8d, edx
je .L3
.L5:
mov ecx, DWORD PTR [rax]
mov rdi, rax
cmp ecx, esi
jge .L15
mov r9d, edx
add edx, 1
mov esi, ecx
add rax, 4
cmp r8d, edx
jne .L5
.L3:
mov DWORD PTR [rdi], ebp
mov DWORD PTR [rbx], esi
mov rbx, r12
cmp r10d, r13d
jne .L6
.L1:
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L8:
.cfi_restore_state
mov rdi, rbx
mov esi, ebp
lea r12, 4[rbx]
mov DWORD PTR [rdi], ebp
mov DWORD PTR [rbx], esi
mov rbx, r12
cmp r10d, r13d
jne .L6
jmp .L1
.cfi_endproc
.LFE23:
.size selectionSort, .-selectionSort
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d "
.text
.p2align 4
.globl printArr
.type printArr, @function
printArr:
.LFB24:
.cfi_startproc
endbr64
test esi, esi
jle .L21
lea eax, -1[rsi]
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
lea r12, 4[rdi+rax*4]
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
lea rbp, .LC0[rip]
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
mov rbx, rdi
.p2align 4,,10
.p2align 3
.L18:
mov edx, DWORD PTR [rbx]
mov rsi, rbp
mov edi, 1
xor eax, eax
add rbx, 4
call __printf_chk@PLT
cmp rbx, r12
jne .L18
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L21:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
ret
.cfi_endproc
.LFE24:
.size printArr, .-printArr
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB25:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov esi, 6
sub rsp, 32
.cfi_def_cfa_offset 48
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
movabs rax, -42949672930
mov rbp, rsp
mov QWORD PTR 8[rsp], 15
mov rdi, rbp
mov QWORD PTR [rsp], rax
movabs rax, 322122547250
mov QWORD PTR 16[rsp], rax
call selectionSort
mov esi, 6
mov rdi, rbp
call printArr
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L27
add rsp, 32
.cfi_remember_state
.cfi_def_cfa_offset 16
xor eax, eax
pop rbp
.cfi_def_cfa_offset 8
ret
.L27:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE25:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99927.c"
.text
.align 2
.global selectionSort
.syntax unified
.arm
.fpu softvfp
.type selectionSort, %function
selectionSort:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r1, #1
bxle lr
push {r4, r5, r6, r7, r8, r9, lr}
mov r7, r0
mov r6, #0
sub r9, r1, #1
.L6:
mov r5, r6
add r6, r6, #1
cmp r1, r6
mov lr, r7
ldr r8, [r7], #4
ble .L8
mov r2, r7
mov r4, r8
mov r3, r6
.L5:
mov lr, r2
ldr ip, [r2], #4
cmp ip, r4
movlt r5, r3
add r3, r3, #1
movlt r4, ip
addge lr, r0, r5, lsl #2
cmp r1, r3
bne .L5
.L3:
cmp r6, r9
str r8, [lr]
str r4, [r7, #-4]
bne .L6
pop {r4, r5, r6, r7, r8, r9, pc}
.L8:
mov r4, r8
b .L3
.size selectionSort, .-selectionSort
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC1:
.ascii "%d \000"
.text
.align 2
.global printArr
.syntax unified
.arm
.fpu softvfp
.type printArr, %function
printArr:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
subs r5, r1, #0
pople {r4, r5, r6, pc}
sub r4, r0, #4
ldr r6, .L22
add r5, r4, r5, lsl #2
.L19:
ldr r2, [r4, #4]!
mov r1, r6
mov r0, #1
bl __printf_chk
cmp r4, r5
bne .L19
pop {r4, r5, r6, pc}
.L23:
.align 2
.L22:
.word .LC1
.size printArr, .-printArr
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr lr, .L30
sub sp, sp, #32
add ip, sp, #4
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldm lr, {r0, r1}
stm ip, {r0, r1}
ldr r3, .L30+4
mov r1, #6
add r0, sp, #4
ldr r3, [r3]
str r3, [sp, #28]
mov r3,#0
mov r4, sp
bl selectionSort
ldr r6, .L30+8
add r5, sp, #24
.L25:
ldr r2, [r4, #4]!
mov r1, r6
mov r0, #1
bl __printf_chk
cmp r4, r5
bne .L25
ldr r3, .L30+4
ldr r2, [r3]
ldr r3, [sp, #28]
eors r2, r3, r2
mov r3, #0
bne .L29
mov r0, #0
add sp, sp, #32
@ sp needed
pop {r4, r5, r6, pc}
.L29:
bl __stack_chk_fail
.L31:
.align 2
.L30:
.word .LANCHOR0
.word .LC2
.word .LC1
.size main, .-main
.section .rodata
.align 2
.set .LANCHOR0,. + 0
.LC0:
.word 30
.word -10
.word 15
.word 0
.word 50
.word 75
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999272.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "\nHello World"
.LC1:
.string "\n\tHello World\t"
.LC2:
.string "\n\rHello World\r Hello World"
.LC3:
.string "\n\\Hello World\\"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
lea rdi, .LC0[rip]
call puts@PLT
lea rsi, .LC1[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
lea rsi, .LC2[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
lea rsi, .LC3[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999272.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "\012Hello World\000"
.align 2
.LC1:
.ascii "\012\011Hello World\011\000"
.align 2
.LC2:
.ascii "\012\015Hello World\015 Hello World\000"
.align 2
.LC3:
.ascii "\012\\Hello World\\\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r0, .L4
bl puts
ldr r1, .L4+4
mov r0, #1
bl __printf_chk
ldr r1, .L4+8
mov r0, #1
bl __printf_chk
ldr r1, .L4+12
mov r0, #1
bl __printf_chk
mov r0, #0
pop {r4, pc}
.L5:
.align 2
.L4:
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "9993.c"
.intel_syntax noprefix
.text
.p2align 4
.globl print_uint
.type print_uint, @function
print_uint:
.LFB0:
.cfi_startproc
endbr64
test edi, edi
jne .L13
ret
.p2align 4,,10
.p2align 3
.L13:
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov ebp, edi
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov ebx, edi
sub rsp, 24
.cfi_def_cfa_offset 80
cmp edi, 9
jbe .L3
mov eax, 3435973837
mov r12, rbp
imul r12, rax
shr r12, 35
mov r13d, r12d
cmp edi, 99
ja .L14
.L4:
mov eax, 3435973837
imul rax, r13
shr rax, 35
lea eax, [rax+rax*4]
add eax, eax
sub r12d, eax
lea edi, 48[r12]
call putchar@PLT
.L3:
mov eax, 3435973837
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 56
imul rax, rbp
shr rax, 35
lea eax, [rax+rax*4]
add eax, eax
sub ebx, eax
lea edi, 48[rbx]
pop rbx
.cfi_restore 3
.cfi_def_cfa_offset 48
pop rbp
.cfi_restore 6
.cfi_def_cfa_offset 40
pop r12
.cfi_restore 12
.cfi_def_cfa_offset 32
pop r13
.cfi_restore 13
.cfi_def_cfa_offset 24
pop r14
.cfi_restore 14
.cfi_def_cfa_offset 16
pop r15
.cfi_restore 15
.cfi_def_cfa_offset 8
jmp putchar@PLT
.p2align 4,,10
.p2align 3
.L14:
.cfi_restore_state
mov r14, r13
imul r14, rax
shr r14, 35
mov r15d, r14d
cmp edi, 999
jbe .L5
mov rdx, r15
imul rdx, rax
shr rdx, 35
mov ecx, edx
mov DWORD PTR 12[rsp], edx
imul rax, rcx
shr rax, 35
mov edi, eax
mov DWORD PTR 8[rsp], eax
call print_uint
mov eax, DWORD PTR 8[rsp]
mov edx, DWORD PTR 12[rsp]
lea eax, [rax+rax*4]
add eax, eax
sub edx, eax
lea edi, 48[rdx]
call putchar@PLT
.L5:
mov eax, 3435973837
imul rax, r15
shr rax, 35
lea eax, [rax+rax*4]
add eax, eax
sub r14d, eax
lea edi, 48[r14]
call putchar@PLT
jmp .L4
.cfi_endproc
.LFE0:
.size print_uint, .-print_uint
.p2align 4
.globl print
.type print, @function
print:
.LFB1:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
mov rbx, rdi
movsx edi, BYTE PTR [rdi]
test dil, dil
je .L15
.p2align 4,,10
.p2align 3
.L17:
call putchar@PLT
movsx edi, BYTE PTR 1[rbx]
add rbx, 1
test dil, dil
jne .L17
.L15:
pop rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE1:
.size print, .-print
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Please input your guess in 1..100\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "\nInput is invalid\n"
.text
.p2align 4
.globl get_input
.type get_input, @function
get_input:
.LFB2:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
.p2align 4,,10
.p2align 3
.L24:
lea r12, .LC0[rip]
mov edi, 80
.p2align 4,,10
.p2align 3
.L25:
call putchar@PLT
movsx edi, BYTE PTR 1[r12]
add r12, 1
test dil, dil
jne .L25
xor r12d, r12d
jmp .L33
.p2align 4,,10
.p2align 3
.L31:
lea edx, [r12+r12*4]
lea r12d, -48[rax+rdx*2]
.L33:
call getchar@PLT
test eax, eax
js .L34
cmp eax, 10
je .L34
lea edx, -48[rax]
cmp edx, 9
jbe .L31
lea r12, .LC1[rip]
mov edi, 10
.p2align 4,,10
.p2align 3
.L32:
call putchar@PLT
movsx edi, BYTE PTR 1[r12]
add r12, 1
test dil, dil
jne .L32
jmp .L24
.p2align 4,,10
.p2align 3
.L34:
lea eax, -1[r12]
cmp eax, 99
jbe .L23
lea r12, .LC1[rip]
mov edi, 10
.p2align 4,,10
.p2align 3
.L29:
call putchar@PLT
movsx edi, BYTE PTR 1[r12]
add r12, 1
test dil, dil
jne .L29
jmp .L24
.L23:
mov eax, r12d
pop r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2:
.size get_input, .-get_input
.section .rodata.str1.1
.LC2:
.string "Guess the number!\n\n"
.LC3:
.string "Too small!\n\n"
.LC4:
.string "Too big!\n\n"
.LC5:
.string "\nYou win! Tries: "
.text
.p2align 4
.globl _start
.type _start, @function
_start:
.LFB3:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov edi, 71
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
lea rbx, .LC2[rip]
sub rsp, 24
.cfi_def_cfa_offset 80
.p2align 4,,10
.p2align 3
.L40:
call putchar@PLT
movsx edi, BYTE PTR 1[rbx]
add rbx, 1
test dil, dil
jne .L40
mov ebp, 1
call get_input
cmp eax, 74
jbe .L63
.p2align 4,,10
.p2align 3
.L41:
cmp eax, 75
je .L51
lea rbx, .LC4[rip]
mov edi, 84
.p2align 4,,10
.p2align 3
.L45:
call putchar@PLT
movsx edi, BYTE PTR 1[rbx]
add rbx, 1
test dil, dil
jne .L45
add ebp, 1
.L64:
call get_input
cmp eax, 74
ja .L41
.L63:
lea rbx, .LC3[rip]
mov edi, 84
.p2align 4,,10
.p2align 3
.L42:
call putchar@PLT
movsx edi, BYTE PTR 1[rbx]
add rbx, 1
test dil, dil
jne .L42
add ebp, 1
jmp .L64
.p2align 4,,10
.p2align 3
.L51:
lea rbx, .LC5[rip]
mov edi, 10
.p2align 4,,10
.p2align 3
.L44:
call putchar@PLT
movsx edi, BYTE PTR 1[rbx]
add rbx, 1
test dil, dil
jne .L44
test ebp, ebp
jne .L65
.L46:
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 56
mov edi, 10
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
jmp putchar@PLT
.L65:
.cfi_restore_state
mov ebx, ebp
cmp ebp, 9
jbe .L47
mov eax, 3435973837
mov r12, rbx
imul r12, rax
shr r12, 35
mov r13d, r12d
cmp ebp, 99
ja .L66
.L48:
mov eax, 3435973837
imul rax, r13
shr rax, 35
lea eax, [rax+rax*4]
add eax, eax
sub r12d, eax
lea edi, 48[r12]
call putchar@PLT
.L47:
mov eax, 3435973837
imul rax, rbx
shr rax, 35
lea eax, [rax+rax*4]
add eax, eax
sub ebp, eax
lea edi, 48[rbp]
call putchar@PLT
jmp .L46
.L66:
mov r14, r13
imul r14, rax
shr r14, 35
mov edx, r14d
cmp ebp, 999
jbe .L49
mov r15, rdx
mov QWORD PTR 8[rsp], rdx
imul r15, rax
shr r15, 35
mov ecx, r15d
imul rax, rcx
shr rax, 35
mov edi, eax
mov DWORD PTR 4[rsp], eax
call print_uint
mov eax, DWORD PTR 4[rsp]
mov edi, r15d
lea eax, [rax+rax*4]
add eax, eax
sub edi, eax
add edi, 48
call putchar@PLT
mov rdx, QWORD PTR 8[rsp]
.L49:
mov eax, 3435973837
mov edi, r14d
imul rax, rdx
shr rax, 35
lea eax, [rax+rax*4]
add eax, eax
sub edi, eax
add edi, 48
call putchar@PLT
jmp .L48
.cfi_endproc
.LFE3:
.size _start, .-_start
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "9993.c"
.text
.align 2
.global print_uint
.syntax unified
.arm
.fpu softvfp
.type print_uint, %function
print_uint:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
subs r4, r0, #0
popeq {r4, r5, r6, pc}
ldr r5, .L5
umull r3, r5, r4, r5
lsr r5, r5, #3
mov r0, r5
bl print_uint
add r0, r5, r5, lsl #2
sub r0, r4, r0, lsl #1
add r0, r0, #48
pop {r4, r5, r6, lr}
b putchar
.L6:
.align 2
.L5:
.word -858993459
.size print_uint, .-print_uint
.align 2
.global print
.syntax unified
.arm
.fpu softvfp
.type print, %function
print:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, r0
ldrb r0, [r0] @ zero_extendqisi2
cmp r0, #0
popeq {r4, pc}
.L9:
bl putchar
ldrb r0, [r4, #1]! @ zero_extendqisi2
cmp r0, #0
bne .L9
pop {r4, pc}
.size print, .-print
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Please input your guess in 1..100\012\000"
.align 2
.LC1:
.ascii "\012Input is invalid\012\000"
.text
.align 2
.global get_input
.syntax unified
.arm
.fpu softvfp
.type get_input, %function
get_input:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
.L16:
mov r0, #80
ldr r4, .L30
.L17:
bl putchar
ldrb r0, [r4, #1]! @ zero_extendqisi2
cmp r0, #0
bne .L17
mov r4, r0
b .L24
.L18:
cmp r1, #9
bhi .L29
sub r4, r0, #48
.L24:
bl getchar
sub r2, r0, #10
clz r2, r2
lsr r2, r2, #5
add r3, r4, r4, lsl #2
orrs r2, r2, r0, lsr #31
sub r1, r0, #48
add r0, r0, r3, lsl #1
beq .L18
sub r3, r4, #1
cmp r3, #99
bls .L15
mov r0, #10
ldr r4, .L30+4
.L20:
bl putchar
ldrb r0, [r4, #1]! @ zero_extendqisi2
cmp r0, #0
bne .L20
b .L16
.L29:
mov r0, #10
ldr r4, .L30+4
.L23:
bl putchar
ldrb r0, [r4, #1]! @ zero_extendqisi2
cmp r0, #0
bne .L23
b .L16
.L15:
mov r0, r4
pop {r4, pc}
.L31:
.align 2
.L30:
.word .LC0
.word .LC1
.size get_input, .-get_input
.section .rodata.str1.4
.align 2
.LC2:
.ascii "Guess the number!\012\012\000"
.align 2
.LC3:
.ascii "Too small!\012\012\000"
.align 2
.LC4:
.ascii "Too big!\012\012\000"
.align 2
.LC5:
.ascii "\012You win! Tries: \000"
.text
.align 2
.global _start
.syntax unified
.arm
.fpu softvfp
.type _start, %function
_start:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r0, #71
push {r4, r5, r6, lr}
ldr r4, .L52
.L33:
bl putchar
ldrb r0, [r4, #1]! @ zero_extendqisi2
cmp r0, #0
bne .L33
bl get_input
cmp r0, #74
mov r5, #1
bls .L50
.L34:
cmp r0, #75
beq .L41
mov r0, #84
ldr r4, .L52+4
.L38:
bl putchar
ldrb r0, [r4, #1]! @ zero_extendqisi2
cmp r0, #0
bne .L38
add r5, r5, #1
.L51:
bl get_input
cmp r0, #74
bhi .L34
.L50:
mov r0, #84
ldr r4, .L52+8
.L35:
bl putchar
ldrb r0, [r4, #1]! @ zero_extendqisi2
cmp r0, #0
bne .L35
add r5, r5, #1
b .L51
.L41:
mov r0, #10
ldr r4, .L52+12
.L37:
bl putchar
ldrb r0, [r4, #1]! @ zero_extendqisi2
cmp r0, #0
bne .L37
cmp r5, #0
beq .L39
ldr r4, .L52+16
umull r3, r4, r5, r4
lsr r4, r4, #3
mov r0, r4
bl print_uint
add r0, r4, r4, lsl #2
sub r0, r5, r0, lsl #1
add r0, r0, #48
bl putchar
.L39:
pop {r4, r5, r6, lr}
mov r0, #10
b putchar
.L53:
.align 2
.L52:
.word .LC2
.word .LC4
.word .LC3
.word .LC5
.word -858993459
.size _start, .-_start
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999307.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "hello, how are you?"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB34:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov ecx, 19
mov edx, 20
lea rsi, .LC0[rip]
sub rsp, 32
.cfi_def_cfa_offset 48
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
mov rbp, rsp
mov rdi, rbp
call __memcpy_chk@PLT
lea rdi, .LC0[rip]
call puts@PLT
mov rdi, rbp
call puts@PLT
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L5
add rsp, 32
.cfi_remember_state
.cfi_def_cfa_offset 16
xor eax, eax
pop rbp
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE34:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999307.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "hello, how are you?\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC1:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr ip, .L6
sub sp, sp, #28
mov r3, #19
mov r2, #20
ldr r1, .L6+4
mov r0, sp
ldr ip, [ip]
str ip, [sp, #20]
mov ip,#0
bl __memcpy_chk
ldr r0, .L6+4
bl puts
mov r0, sp
bl puts
ldr r3, .L6
ldr r2, [r3]
ldr r3, [sp, #20]
eors r2, r3, r2
mov r3, #0
bne .L5
mov r0, #0
add sp, sp, #28
@ sp needed
ldr pc, [sp], #4
.L5:
bl __stack_chk_fail
.L7:
.align 2
.L6:
.word .LC1
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999308.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
jmp booleforce_main@PLT
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999308.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
b booleforce_main
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99934.c"
.intel_syntax noprefix
.text
.p2align 4
.type _rtl88e_phy_init_bb_rf_register_definition, @function
_rtl88e_phy_init_bb_rf_register_definition:
.LFB0:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
call rtl_priv@PLT
mov rsi, QWORD PTR RFPGA0_XAB_RFINTERFACESW[rip]
mov r8, QWORD PTR RFPGA0_XCD_RFINTERFACESW[rip]
mov rcx, QWORD PTR [rax]
mov rax, QWORD PTR RF90_PATH_A[rip]
lea rdx, [rax+rax*2]
lea rax, [rax+rdx*4]
lea rdx, [rcx+rax*8]
mov rax, QWORD PTR RF90_PATH_B[rip]
mov QWORD PTR 96[rdx], rsi
lea rdi, [rax+rax*2]
lea rax, [rax+rdi*4]
lea rax, [rcx+rax*8]
mov QWORD PTR 96[rax], rsi
mov rsi, QWORD PTR RF90_PATH_C[rip]
lea rdi, [rsi+rsi*2]
lea rsi, [rsi+rdi*4]
mov rdi, QWORD PTR RF90_PATH_D[rip]
lea rsi, [rcx+rsi*8]
lea r9, [rdi+rdi*2]
mov QWORD PTR 96[rsi], r8
lea rdi, [rdi+r9*4]
lea rcx, [rcx+rdi*8]
mov rdi, QWORD PTR RFPGA0_XAB_RFINTERFACERB[rip]
mov QWORD PTR 96[rcx], r8
mov r8, QWORD PTR RFPGA0_XA_RFINTERFACEOE[rip]
mov QWORD PTR 88[rdx], rdi
mov QWORD PTR 88[rax], rdi
mov rdi, QWORD PTR RFPGA0_XCD_RFINTERFACERB[rip]
mov QWORD PTR 88[rsi], rdi
mov QWORD PTR 88[rcx], rdi
mov rdi, QWORD PTR RFPGA0_XB_RFINTERFACEOE[rip]
mov QWORD PTR 80[rdx], r8
mov QWORD PTR 80[rax], rdi
mov QWORD PTR 72[rdx], r8
mov QWORD PTR 72[rax], rdi
mov edi, DWORD PTR RFPGA0_XA_LSSIPARAMETER[rip]
mov DWORD PTR 64[rdx], edi
mov edi, DWORD PTR RFPGA0_XB_LSSIPARAMETER[rip]
mov DWORD PTR 64[rax], edi
mov rdi, QWORD PTR RFPGA0_XAB_RFPARAMETER[rip]
mov QWORD PTR 56[rdx], rdi
mov QWORD PTR 56[rax], rdi
mov rdi, QWORD PTR RFPGA0_XCD_RFPARAMETER[rip]
mov QWORD PTR 56[rsi], rdi
mov QWORD PTR 56[rcx], rdi
mov rdi, QWORD PTR RFPGA0_TXGAINSTAGE[rip]
mov QWORD PTR 48[rdx], rdi
mov QWORD PTR 48[rax], rdi
mov QWORD PTR 48[rsi], rdi
mov QWORD PTR 48[rcx], rdi
mov edi, DWORD PTR RFPGA0_XA_HSSIPARAMETER1[rip]
mov DWORD PTR 44[rdx], edi
mov edi, DWORD PTR RFPGA0_XB_HSSIPARAMETER1[rip]
mov DWORD PTR 44[rax], edi
mov edi, DWORD PTR RFPGA0_XA_HSSIPARAMETER2[rip]
mov DWORD PTR 40[rdx], edi
mov edi, DWORD PTR RFPGA0_XB_HSSIPARAMETER2[rip]
mov DWORD PTR 40[rax], edi
mov rdi, QWORD PTR RFPGA0_XAB_SWITCHCONTROL[rip]
mov QWORD PTR 32[rdx], rdi
mov QWORD PTR 32[rax], rdi
mov rdi, QWORD PTR RFPGA0_XCD_SWITCHCONTROL[rip]
mov QWORD PTR 32[rsi], rdi
mov QWORD PTR 32[rcx], rdi
mov edi, DWORD PTR ROFDM0_XAAGCCORE1[rip]
mov DWORD PTR 28[rdx], edi
mov edi, DWORD PTR ROFDM0_XBAGCCORE1[rip]
mov DWORD PTR 28[rax], edi
mov edi, DWORD PTR ROFDM0_XCAGCCORE1[rip]
mov DWORD PTR 28[rsi], edi
mov edi, DWORD PTR ROFDM0_XDAGCCORE1[rip]
mov DWORD PTR 28[rcx], edi
mov edi, DWORD PTR ROFDM0_XAAGCCORE2[rip]
mov DWORD PTR 24[rdx], edi
mov edi, DWORD PTR ROFDM0_XBAGCCORE2[rip]
mov DWORD PTR 24[rax], edi
mov edi, DWORD PTR ROFDM0_XCAGCCORE2[rip]
mov DWORD PTR 24[rsi], edi
mov edi, DWORD PTR ROFDM0_XDAGCCORE2[rip]
mov DWORD PTR 24[rcx], edi
mov edi, DWORD PTR ROFDM0_XARXIQIMBALANCE[rip]
mov DWORD PTR 20[rdx], edi
mov edi, DWORD PTR ROFDM0_XBRXIQIMBALANCE[rip]
mov DWORD PTR 20[rax], edi
mov edi, DWORD PTR ROFDM0_XCRXIQIMBANLANCE[rip]
mov DWORD PTR 20[rsi], edi
mov edi, DWORD PTR ROFDM0_XDRXIQIMBALANCE[rip]
mov DWORD PTR 20[rcx], edi
mov edi, DWORD PTR ROFDM0_XARXAFE[rip]
mov DWORD PTR 16[rdx], edi
mov edi, DWORD PTR ROFDM0_XBRXAFE[rip]
mov DWORD PTR 16[rax], edi
mov edi, DWORD PTR ROFDM0_XCRXAFE[rip]
mov DWORD PTR 16[rsi], edi
mov edi, DWORD PTR ROFDM0_XDRXAFE[rip]
mov DWORD PTR 16[rcx], edi
mov edi, DWORD PTR ROFDM0_XATXIQIMBALANCE[rip]
mov DWORD PTR 12[rdx], edi
mov edi, DWORD PTR ROFDM0_XBTXIQIMBALANCE[rip]
mov DWORD PTR 12[rax], edi
mov edi, DWORD PTR ROFDM0_XCTXIQIMBALANCE[rip]
mov DWORD PTR 12[rsi], edi
mov esi, DWORD PTR ROFDM0_XDTXIQIMBALANCE[rip]
mov DWORD PTR 12[rcx], esi
mov ecx, DWORD PTR ROFDM0_XATXAFE[rip]
mov DWORD PTR 8[rdx], ecx
mov ecx, DWORD PTR ROFDM0_XBTXAFE[rip]
mov DWORD PTR 8[rax], ecx
mov ecx, DWORD PTR RFPGA0_XA_LSSIREADBACK[rip]
mov DWORD PTR 4[rdx], ecx
mov ecx, DWORD PTR RFPGA0_XB_LSSIREADBACK[rip]
mov DWORD PTR 4[rax], ecx
mov ecx, DWORD PTR TRANSCEIVEA_HSPI_READBACK[rip]
mov DWORD PTR [rdx], ecx
mov edx, DWORD PTR TRANSCEIVEB_HSPI_READBACK[rip]
mov DWORD PTR [rax], edx
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE0:
.size _rtl88e_phy_init_bb_rf_register_definition, .-_rtl88e_phy_init_bb_rf_register_definition
.globl TRANSCEIVEB_HSPI_READBACK
.bss
.align 4
.type TRANSCEIVEB_HSPI_READBACK, @object
.size TRANSCEIVEB_HSPI_READBACK, 4
TRANSCEIVEB_HSPI_READBACK:
.zero 4
.globl TRANSCEIVEA_HSPI_READBACK
.align 4
.type TRANSCEIVEA_HSPI_READBACK, @object
.size TRANSCEIVEA_HSPI_READBACK, 4
TRANSCEIVEA_HSPI_READBACK:
.zero 4
.globl ROFDM0_XDTXIQIMBALANCE
.align 4
.type ROFDM0_XDTXIQIMBALANCE, @object
.size ROFDM0_XDTXIQIMBALANCE, 4
ROFDM0_XDTXIQIMBALANCE:
.zero 4
.globl ROFDM0_XDRXIQIMBALANCE
.align 4
.type ROFDM0_XDRXIQIMBALANCE, @object
.size ROFDM0_XDRXIQIMBALANCE, 4
ROFDM0_XDRXIQIMBALANCE:
.zero 4
.globl ROFDM0_XDRXAFE
.align 4
.type ROFDM0_XDRXAFE, @object
.size ROFDM0_XDRXAFE, 4
ROFDM0_XDRXAFE:
.zero 4
.globl ROFDM0_XDAGCCORE2
.align 4
.type ROFDM0_XDAGCCORE2, @object
.size ROFDM0_XDAGCCORE2, 4
ROFDM0_XDAGCCORE2:
.zero 4
.globl ROFDM0_XDAGCCORE1
.align 4
.type ROFDM0_XDAGCCORE1, @object
.size ROFDM0_XDAGCCORE1, 4
ROFDM0_XDAGCCORE1:
.zero 4
.globl ROFDM0_XCTXIQIMBALANCE
.align 4
.type ROFDM0_XCTXIQIMBALANCE, @object
.size ROFDM0_XCTXIQIMBALANCE, 4
ROFDM0_XCTXIQIMBALANCE:
.zero 4
.globl ROFDM0_XCRXIQIMBANLANCE
.align 4
.type ROFDM0_XCRXIQIMBANLANCE, @object
.size ROFDM0_XCRXIQIMBANLANCE, 4
ROFDM0_XCRXIQIMBANLANCE:
.zero 4
.globl ROFDM0_XCRXAFE
.align 4
.type ROFDM0_XCRXAFE, @object
.size ROFDM0_XCRXAFE, 4
ROFDM0_XCRXAFE:
.zero 4
.globl ROFDM0_XCAGCCORE2
.align 4
.type ROFDM0_XCAGCCORE2, @object
.size ROFDM0_XCAGCCORE2, 4
ROFDM0_XCAGCCORE2:
.zero 4
.globl ROFDM0_XCAGCCORE1
.align 4
.type ROFDM0_XCAGCCORE1, @object
.size ROFDM0_XCAGCCORE1, 4
ROFDM0_XCAGCCORE1:
.zero 4
.globl ROFDM0_XBTXIQIMBALANCE
.align 4
.type ROFDM0_XBTXIQIMBALANCE, @object
.size ROFDM0_XBTXIQIMBALANCE, 4
ROFDM0_XBTXIQIMBALANCE:
.zero 4
.globl ROFDM0_XBTXAFE
.align 4
.type ROFDM0_XBTXAFE, @object
.size ROFDM0_XBTXAFE, 4
ROFDM0_XBTXAFE:
.zero 4
.globl ROFDM0_XBRXIQIMBALANCE
.align 4
.type ROFDM0_XBRXIQIMBALANCE, @object
.size ROFDM0_XBRXIQIMBALANCE, 4
ROFDM0_XBRXIQIMBALANCE:
.zero 4
.globl ROFDM0_XBRXAFE
.align 4
.type ROFDM0_XBRXAFE, @object
.size ROFDM0_XBRXAFE, 4
ROFDM0_XBRXAFE:
.zero 4
.globl ROFDM0_XBAGCCORE2
.align 4
.type ROFDM0_XBAGCCORE2, @object
.size ROFDM0_XBAGCCORE2, 4
ROFDM0_XBAGCCORE2:
.zero 4
.globl ROFDM0_XBAGCCORE1
.align 4
.type ROFDM0_XBAGCCORE1, @object
.size ROFDM0_XBAGCCORE1, 4
ROFDM0_XBAGCCORE1:
.zero 4
.globl ROFDM0_XATXIQIMBALANCE
.align 4
.type ROFDM0_XATXIQIMBALANCE, @object
.size ROFDM0_XATXIQIMBALANCE, 4
ROFDM0_XATXIQIMBALANCE:
.zero 4
.globl ROFDM0_XATXAFE
.align 4
.type ROFDM0_XATXAFE, @object
.size ROFDM0_XATXAFE, 4
ROFDM0_XATXAFE:
.zero 4
.globl ROFDM0_XARXIQIMBALANCE
.align 4
.type ROFDM0_XARXIQIMBALANCE, @object
.size ROFDM0_XARXIQIMBALANCE, 4
ROFDM0_XARXIQIMBALANCE:
.zero 4
.globl ROFDM0_XARXAFE
.align 4
.type ROFDM0_XARXAFE, @object
.size ROFDM0_XARXAFE, 4
ROFDM0_XARXAFE:
.zero 4
.globl ROFDM0_XAAGCCORE2
.align 4
.type ROFDM0_XAAGCCORE2, @object
.size ROFDM0_XAAGCCORE2, 4
ROFDM0_XAAGCCORE2:
.zero 4
.globl ROFDM0_XAAGCCORE1
.align 4
.type ROFDM0_XAAGCCORE1, @object
.size ROFDM0_XAAGCCORE1, 4
ROFDM0_XAAGCCORE1:
.zero 4
.globl RFPGA0_XCD_SWITCHCONTROL
.align 8
.type RFPGA0_XCD_SWITCHCONTROL, @object
.size RFPGA0_XCD_SWITCHCONTROL, 8
RFPGA0_XCD_SWITCHCONTROL:
.zero 8
.globl RFPGA0_XCD_RFPARAMETER
.align 8
.type RFPGA0_XCD_RFPARAMETER, @object
.size RFPGA0_XCD_RFPARAMETER, 8
RFPGA0_XCD_RFPARAMETER:
.zero 8
.globl RFPGA0_XCD_RFINTERFACESW
.align 8
.type RFPGA0_XCD_RFINTERFACESW, @object
.size RFPGA0_XCD_RFINTERFACESW, 8
RFPGA0_XCD_RFINTERFACESW:
.zero 8
.globl RFPGA0_XCD_RFINTERFACERB
.align 8
.type RFPGA0_XCD_RFINTERFACERB, @object
.size RFPGA0_XCD_RFINTERFACERB, 8
RFPGA0_XCD_RFINTERFACERB:
.zero 8
.globl RFPGA0_XB_RFINTERFACEOE
.align 8
.type RFPGA0_XB_RFINTERFACEOE, @object
.size RFPGA0_XB_RFINTERFACEOE, 8
RFPGA0_XB_RFINTERFACEOE:
.zero 8
.globl RFPGA0_XB_LSSIREADBACK
.align 4
.type RFPGA0_XB_LSSIREADBACK, @object
.size RFPGA0_XB_LSSIREADBACK, 4
RFPGA0_XB_LSSIREADBACK:
.zero 4
.globl RFPGA0_XB_LSSIPARAMETER
.align 4
.type RFPGA0_XB_LSSIPARAMETER, @object
.size RFPGA0_XB_LSSIPARAMETER, 4
RFPGA0_XB_LSSIPARAMETER:
.zero 4
.globl RFPGA0_XB_HSSIPARAMETER2
.align 4
.type RFPGA0_XB_HSSIPARAMETER2, @object
.size RFPGA0_XB_HSSIPARAMETER2, 4
RFPGA0_XB_HSSIPARAMETER2:
.zero 4
.globl RFPGA0_XB_HSSIPARAMETER1
.align 4
.type RFPGA0_XB_HSSIPARAMETER1, @object
.size RFPGA0_XB_HSSIPARAMETER1, 4
RFPGA0_XB_HSSIPARAMETER1:
.zero 4
.globl RFPGA0_XA_RFINTERFACEOE
.align 8
.type RFPGA0_XA_RFINTERFACEOE, @object
.size RFPGA0_XA_RFINTERFACEOE, 8
RFPGA0_XA_RFINTERFACEOE:
.zero 8
.globl RFPGA0_XA_LSSIREADBACK
.align 4
.type RFPGA0_XA_LSSIREADBACK, @object
.size RFPGA0_XA_LSSIREADBACK, 4
RFPGA0_XA_LSSIREADBACK:
.zero 4
.globl RFPGA0_XA_LSSIPARAMETER
.align 4
.type RFPGA0_XA_LSSIPARAMETER, @object
.size RFPGA0_XA_LSSIPARAMETER, 4
RFPGA0_XA_LSSIPARAMETER:
.zero 4
.globl RFPGA0_XA_HSSIPARAMETER2
.align 4
.type RFPGA0_XA_HSSIPARAMETER2, @object
.size RFPGA0_XA_HSSIPARAMETER2, 4
RFPGA0_XA_HSSIPARAMETER2:
.zero 4
.globl RFPGA0_XA_HSSIPARAMETER1
.align 4
.type RFPGA0_XA_HSSIPARAMETER1, @object
.size RFPGA0_XA_HSSIPARAMETER1, 4
RFPGA0_XA_HSSIPARAMETER1:
.zero 4
.globl RFPGA0_XAB_SWITCHCONTROL
.align 8
.type RFPGA0_XAB_SWITCHCONTROL, @object
.size RFPGA0_XAB_SWITCHCONTROL, 8
RFPGA0_XAB_SWITCHCONTROL:
.zero 8
.globl RFPGA0_XAB_RFPARAMETER
.align 8
.type RFPGA0_XAB_RFPARAMETER, @object
.size RFPGA0_XAB_RFPARAMETER, 8
RFPGA0_XAB_RFPARAMETER:
.zero 8
.globl RFPGA0_XAB_RFINTERFACESW
.align 8
.type RFPGA0_XAB_RFINTERFACESW, @object
.size RFPGA0_XAB_RFINTERFACESW, 8
RFPGA0_XAB_RFINTERFACESW:
.zero 8
.globl RFPGA0_XAB_RFINTERFACERB
.align 8
.type RFPGA0_XAB_RFINTERFACERB, @object
.size RFPGA0_XAB_RFINTERFACERB, 8
RFPGA0_XAB_RFINTERFACERB:
.zero 8
.globl RFPGA0_TXGAINSTAGE
.align 8
.type RFPGA0_TXGAINSTAGE, @object
.size RFPGA0_TXGAINSTAGE, 8
RFPGA0_TXGAINSTAGE:
.zero 8
.globl RF90_PATH_D
.align 8
.type RF90_PATH_D, @object
.size RF90_PATH_D, 8
RF90_PATH_D:
.zero 8
.globl RF90_PATH_C
.align 8
.type RF90_PATH_C, @object
.size RF90_PATH_C, 8
RF90_PATH_C:
.zero 8
.globl RF90_PATH_B
.align 8
.type RF90_PATH_B, @object
.size RF90_PATH_B, 8
RF90_PATH_B:
.zero 8
.globl RF90_PATH_A
.align 8
.type RF90_PATH_A, @object
.size RF90_PATH_A, 8
RF90_PATH_A:
.zero 8
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99934.c"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type _rtl88e_phy_init_bb_rf_register_definition, %function
_rtl88e_phy_init_bb_rf_register_definition:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
bl rtl_priv
ldr r1, .L4
ldr r3, .L4+4
ldr ip, .L4+8
ldr r2, .L4+12
ldr r4, [r1]
ldr r1, [r3]
ldr r3, .L4+16
ldr r5, [ip]
ldr r6, .L4+20
ldr ip, [r2]
ldr r7, .L4+24
ldr lr, [r0]
ldr r2, .L4+28
ldr r0, [r3]
ldr r3, .L4+32
ldr r8, [r6]
ldr r7, [r7]
add r5, r5, r5, lsl #3
add r4, r4, r4, lsl #3
add ip, ip, ip, lsl #3
add r1, r1, r1, lsl #3
add ip, lr, ip, lsl #3
add r1, lr, r1, lsl #3
ldr r9, [r2]
ldr r6, [r3]
add r2, lr, r5, lsl #3
add r3, lr, r4, lsl #3
str r7, [r2, #68]
ldr r10, .L4+36
str r7, [r3, #68]
str r8, [ip, #68]
ldr r7, .L4+40
str r8, [r1, #68]
ldr r8, .L4+44
str r9, [r2, #64]
ldr r10, [r10]
str r9, [r3, #64]
ldr r7, [r7]
str r0, [ip, #64]
ldr r8, [r8]
str r0, [r1, #64]
ldr r9, .L4+48
ldr r0, .L4+52
str r6, [r2, #60]
ldr r9, [r9]
str r10, [r3, #60]
ldr r0, [r0]
str r6, [r2, #56]
str r10, [r3, #56]
ldr r6, .L4+56
str r7, [r2, #52]
ldr r10, .L4+60
str r8, [r3, #52]
ldr r8, .L4+64
str r9, [r2, #48]
ldr r7, .L4+68
str r9, [r3, #48]
str r0, [ip, #48]
str r0, [r1, #48]
ldr r0, [r10]
ldr r10, [r8]
ldr r8, [r6]
ldr r6, .L4+72
str r0, [r2, #44]
ldr r9, [r6]
str r0, [r3, #44]
ldr r7, [r7]
str r0, [ip, #44]
ldr r6, .L4+76
str r0, [r1, #44]
ldr r0, .L4+80
str r10, [r2, #40]
ldr r6, [r6]
str r7, [r3, #40]
ldr r0, [r0]
ldr r7, .L4+84
str r8, [r2, #36]
ldr r7, [r7]
str r9, [r3, #36]
ldr r8, .L4+88
str r6, [r2, #32]
str r6, [r3, #32]
str r0, [ip, #32]
str r0, [r1, #32]
ldr r0, .L4+92
str r7, [r2, #28]
ldr r10, [r8]
ldr r7, [r0]
ldr r8, .L4+96
ldr r6, .L4+100
ldr r0, .L4+104
ldr r9, [r8]
ldr r8, [r6]
ldr r6, [r0]
ldr r0, .L4+108
str r10, [r3, #28]
ldr r0, [r0]
str r9, [ip, #28]
str r8, [r1, #28]
str r7, [r2, #24]
str r6, [r3, #24]
ldr r7, .L4+112
str r0, [ip, #24]
ldr r6, .L4+116
ldr r0, .L4+120
ldr r9, [r6]
ldr r7, [r7]
ldr r6, [r0]
ldr r8, .L4+124
ldr r0, .L4+128
str r7, [r1, #24]
ldr r8, [r8]
ldr r7, [r0]
ldr r0, .L4+132
str r8, [r2, #20]
ldr r8, [r0]
ldr r0, .L4+136
str r9, [r3, #20]
ldr r9, [r0]
ldr r0, .L4+140
str r6, [ip, #20]
ldr r6, [r0]
ldr r0, .L4+144
str r7, [r1, #20]
ldr r7, [r0]
ldr r0, .L4+148
str r8, [r2, #16]
ldr r8, [r0]
ldr r0, .L4+152
str r9, [r3, #16]
ldr r9, [r0]
ldr r0, .L4+156
str r6, [ip, #16]
ldr r0, [r0]
str r7, [r1, #16]
ldr r6, .L4+160
ldr r7, .L4+164
str r8, [r2, #12]
ldr r6, [r6]
str r9, [r3, #12]
ldr r8, [r7]
str r0, [ip, #12]
ldr r7, .L4+168
ldr r0, .L4+172
str r6, [r1, #12]
ldr r7, [r7]
ldr r6, [r0]
ldr r1, .L4+176
ldr r0, .L4+180
ldr ip, .L4+184
str r8, [r2, #8]
str r7, [r3, #8]
str r6, [r2, #4]
ldr r0, [r0]
ldr r1, [r1]
ldr r2, [ip]
str r0, [r3, #4]
str r1, [lr, r5, lsl #3]
str r2, [lr, r4, lsl #3]
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L5:
.align 2
.L4:
.word RF90_PATH_B
.word RF90_PATH_D
.word RF90_PATH_A
.word RF90_PATH_C
.word RFPGA0_XCD_RFINTERFACERB
.word RFPGA0_XCD_RFINTERFACESW
.word RFPGA0_XAB_RFINTERFACESW
.word RFPGA0_XAB_RFINTERFACERB
.word RFPGA0_XA_RFINTERFACEOE
.word RFPGA0_XB_RFINTERFACEOE
.word RFPGA0_XA_LSSIPARAMETER
.word RFPGA0_XB_LSSIPARAMETER
.word RFPGA0_XAB_RFPARAMETER
.word RFPGA0_XCD_RFPARAMETER
.word RFPGA0_XA_HSSIPARAMETER2
.word RFPGA0_TXGAINSTAGE
.word RFPGA0_XA_HSSIPARAMETER1
.word RFPGA0_XB_HSSIPARAMETER1
.word RFPGA0_XB_HSSIPARAMETER2
.word RFPGA0_XAB_SWITCHCONTROL
.word RFPGA0_XCD_SWITCHCONTROL
.word ROFDM0_XAAGCCORE1
.word ROFDM0_XBAGCCORE1
.word ROFDM0_XAAGCCORE2
.word ROFDM0_XCAGCCORE1
.word ROFDM0_XDAGCCORE1
.word ROFDM0_XBAGCCORE2
.word ROFDM0_XCAGCCORE2
.word ROFDM0_XDAGCCORE2
.word ROFDM0_XBRXIQIMBALANCE
.word ROFDM0_XCRXIQIMBANLANCE
.word ROFDM0_XARXIQIMBALANCE
.word ROFDM0_XDRXIQIMBALANCE
.word ROFDM0_XARXAFE
.word ROFDM0_XBRXAFE
.word ROFDM0_XCRXAFE
.word ROFDM0_XDRXAFE
.word ROFDM0_XATXIQIMBALANCE
.word ROFDM0_XBTXIQIMBALANCE
.word ROFDM0_XCTXIQIMBALANCE
.word ROFDM0_XDTXIQIMBALANCE
.word ROFDM0_XATXAFE
.word ROFDM0_XBTXAFE
.word RFPGA0_XA_LSSIREADBACK
.word TRANSCEIVEA_HSPI_READBACK
.word RFPGA0_XB_LSSIREADBACK
.word TRANSCEIVEB_HSPI_READBACK
.size _rtl88e_phy_init_bb_rf_register_definition, .-_rtl88e_phy_init_bb_rf_register_definition
.comm TRANSCEIVEB_HSPI_READBACK,4,4
.comm TRANSCEIVEA_HSPI_READBACK,4,4
.comm ROFDM0_XDTXIQIMBALANCE,4,4
.comm ROFDM0_XDRXIQIMBALANCE,4,4
.comm ROFDM0_XDRXAFE,4,4
.comm ROFDM0_XDAGCCORE2,4,4
.comm ROFDM0_XDAGCCORE1,4,4
.comm ROFDM0_XCTXIQIMBALANCE,4,4
.comm ROFDM0_XCRXIQIMBANLANCE,4,4
.comm ROFDM0_XCRXAFE,4,4
.comm ROFDM0_XCAGCCORE2,4,4
.comm ROFDM0_XCAGCCORE1,4,4
.comm ROFDM0_XBTXIQIMBALANCE,4,4
.comm ROFDM0_XBTXAFE,4,4
.comm ROFDM0_XBRXIQIMBALANCE,4,4
.comm ROFDM0_XBRXAFE,4,4
.comm ROFDM0_XBAGCCORE2,4,4
.comm ROFDM0_XBAGCCORE1,4,4
.comm ROFDM0_XATXIQIMBALANCE,4,4
.comm ROFDM0_XATXAFE,4,4
.comm ROFDM0_XARXIQIMBALANCE,4,4
.comm ROFDM0_XARXAFE,4,4
.comm ROFDM0_XAAGCCORE2,4,4
.comm ROFDM0_XAAGCCORE1,4,4
.comm RFPGA0_XCD_SWITCHCONTROL,4,4
.comm RFPGA0_XCD_RFPARAMETER,4,4
.comm RFPGA0_XCD_RFINTERFACESW,4,4
.comm RFPGA0_XCD_RFINTERFACERB,4,4
.comm RFPGA0_XB_RFINTERFACEOE,4,4
.comm RFPGA0_XB_LSSIREADBACK,4,4
.comm RFPGA0_XB_LSSIPARAMETER,4,4
.comm RFPGA0_XB_HSSIPARAMETER2,4,4
.comm RFPGA0_XB_HSSIPARAMETER1,4,4
.comm RFPGA0_XA_RFINTERFACEOE,4,4
.comm RFPGA0_XA_LSSIREADBACK,4,4
.comm RFPGA0_XA_LSSIPARAMETER,4,4
.comm RFPGA0_XA_HSSIPARAMETER2,4,4
.comm RFPGA0_XA_HSSIPARAMETER1,4,4
.comm RFPGA0_XAB_SWITCHCONTROL,4,4
.comm RFPGA0_XAB_RFPARAMETER,4,4
.comm RFPGA0_XAB_RFINTERFACESW,4,4
.comm RFPGA0_XAB_RFINTERFACERB,4,4
.comm RFPGA0_TXGAINSTAGE,4,4
.comm RF90_PATH_D,4,4
.comm RF90_PATH_C,4,4
.comm RF90_PATH_B,4,4
.comm RF90_PATH_A,4,4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99935.c"
.intel_syntax noprefix
.text
.p2align 4
.globl strtol
.type strtol, @function
strtol:
.LFB16:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov r11, rdi
mov r9d, edx
mov rcx, rdi
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
mov rbx, rsi
.L5:
movzx eax, BYTE PTR [rcx]
cmp al, 13
jg .L2
cmp al, 8
jg .L3
.L4:
lea edx, -43[rax]
xor ebp, ebp
and edx, 253
jne .L6
xor ebp, ebp
add rcx, 1
cmp al, 45
sete bpl
.L6:
test r9d, r9d
jne .L7
movsx edx, BYTE PTR [rcx]
mov r9d, 10
cmp dl, 48
je .L37
.L8:
xor edi, edi
xor esi, esi
xor r8d, r8d
movsx r12, r9d
mov r10d, 1
jmp .L16
.p2align 4,,10
.p2align 3
.L38:
lea eax, -87[rdx]
.L12:
cmp eax, r9d
jge .L14
mov rdx, r12
cdqe
imul rdx, r8
add rax, rdx
cmp r8, rax
mov r8, rax
cmovg esi, r10d
movsx edx, BYTE PTR 1[rcx]
add rcx, 1
add edi, 1
.L16:
lea eax, -48[rdx]
cmp eax, 9
jbe .L12
lea eax, -97[rdx]
cmp eax, 25
jbe .L38
lea eax, -65[rdx]
cmp eax, 25
jbe .L39
.L14:
test edi, edi
cmove rcx, r11
test rbx, rbx
je .L18
mov QWORD PTR [rbx], rcx
.L18:
test esi, esi
je .L19
call __errno_location@PLT
test ebp, ebp
movabs r8, -9223372036854775808
mov DWORD PTR [rax], 34
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
movabs rax, 9223372036854775807
cmove r8, rax
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L2:
.cfi_restore_state
cmp al, 32
jne .L4
.L3:
add rcx, 1
jmp .L5
.p2align 4,,10
.p2align 3
.L39:
lea eax, -55[rdx]
jmp .L12
.p2align 4,,10
.p2align 3
.L7:
cmp r9d, 16
je .L40
cmp r9d, 36
jbe .L41
xor r8d, r8d
test rbx, rbx
je .L19
mov QWORD PTR [rbx], r11
.L19:
mov rax, r8
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
neg rax
test ebp, ebp
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
cmovne r8, rax
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L41:
.cfi_restore_state
movsx edx, BYTE PTR [rcx]
jmp .L8
.p2align 4,,10
.p2align 3
.L37:
movzx eax, BYTE PTR 1[rcx]
mov r9d, 8
and eax, -33
cmp al, 88
jne .L8
movsx edx, BYTE PTR 2[rcx]
mov r9d, 16
add rcx, 2
jmp .L8
.p2align 4,,10
.p2align 3
.L40:
movsx edx, BYTE PTR [rcx]
cmp dl, 48
jne .L8
movzx eax, BYTE PTR 1[rcx]
and eax, -33
cmp al, 88
jne .L8
movsx edx, BYTE PTR 2[rcx]
add rcx, 2
jmp .L8
.cfi_endproc
.LFE16:
.size strtol, .-strtol
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99935.c"
.text
.align 2
.global strtol
.syntax unified
.arm
.fpu softvfp
.type strtol, %function
strtol:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
mov r8, r0
.L2:
ldrb r3, [r0] @ zero_extendqisi2
mov lr, r0
cmp r3, #13
add r0, r0, #1
bhi .L3
cmp r3, #8
bhi .L2
.L20:
cmp r2, #0
mov r7, #0
bne .L6
.L41:
ldrb ip, [lr] @ zero_extendqisi2
cmp ip, #48
movne r2, #10
beq .L39
.L7:
mov r4, #0
mov r5, r4
mov r0, r4
.L15:
sub r3, ip, #48
cmp r3, #9
sub r6, ip, #97
bls .L11
cmp r6, #25
sub r3, ip, #65
subls r3, ip, #87
bls .L11
cmp r3, #25
bls .L40
.L13:
cmp r4, #0
moveq lr, r8
cmp r1, #0
strne lr, [r1]
cmp r5, #0
beq .L18
bl __errno_location
mov r3, #34
cmp r7, #0
str r3, [r0]
movne r0, #-2147483648
mvneq r0, #-2147483648
pop {r4, r5, r6, r7, r8, pc}
.L40:
sub r3, ip, #55
.L11:
cmp r3, r2
bge .L13
mla r3, r2, r0, r3
cmp r0, r3
movgt r5, #1
mov r0, r3
ldrb ip, [lr, #1]! @ zero_extendqisi2
add r4, r4, #1
b .L15
.L3:
cmp r3, #32
beq .L2
sub ip, r3, #43
tst ip, #253
bne .L20
sub r7, r3, #45
clz r7, r7
cmp r2, #0
mov lr, r0
lsr r7, r7, #5
beq .L41
.L6:
cmp r2, #16
beq .L42
cmp r2, #36
ldrbls ip, [lr] @ zero_extendqisi2
bls .L7
.L9:
cmp r1, #0
moveq r0, r1
movne r0, #0
strne r8, [r1]
.L18:
cmp r7, #0
rsbne r0, r0, #0
pop {r4, r5, r6, r7, r8, pc}
.L39:
ldrb r3, [lr, #1] @ zero_extendqisi2
and r3, r3, #223
cmp r3, #88
movne r2, #8
ldrbeq ip, [lr, #2] @ zero_extendqisi2
moveq r2, #16
addeq lr, lr, #2
b .L7
.L42:
ldrb ip, [lr] @ zero_extendqisi2
cmp ip, #48
bne .L7
ldrb r3, [lr, #1] @ zero_extendqisi2
and r3, r3, #223
cmp r3, #88
ldrbeq ip, [lr, #2] @ zero_extendqisi2
addeq lr, lr, #2
b .L7
.size strtol, .-strtol
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999350.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
call __VERIFIER_nondet_int@PLT
test eax, eax
js .L3
call __VERIFIER_nondet_int@PLT
test eax, eax
js .L3
call __VERIFIER_nondet_int@PLT
.L3:
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE0:
.size main, .-main
.text
.p2align 4
.globl random
.type random, @function
random:
.LFB1:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
call __VERIFIER_nondet_int@PLT
add rsp, 8
.cfi_def_cfa_offset 8
cdq
xor eax, edx
sub eax, edx
ret
.cfi_endproc
.LFE1:
.size random, .-random
.p2align 4
.globl _log
.type _log, @function
_log:
.LFB2:
.cfi_startproc
endbr64
mov eax, edi
cmp esi, 1
jle .L12
cmp esi, edi
jg .L12
mov ecx, 1
.p2align 4,,10
.p2align 3
.L11:
cdq
mov r8d, ecx
add ecx, 1
idiv esi
cmp eax, esi
jge .L11
mov eax, r8d
ret
.p2align 4,,10
.p2align 3
.L12:
xor r8d, r8d
mov eax, r8d
ret
.cfi_endproc
.LFE2:
.size _log, .-_log
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999350.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
bl __VERIFIER_nondet_int
cmp r0, #0
blt .L3
bl __VERIFIER_nondet_int
cmp r0, #0
blt .L3
bl __VERIFIER_nondet_int
.L3:
mov r0, #0
pop {r4, pc}
.size main, .-main
.text
.align 2
.global random
.syntax unified
.arm
.fpu softvfp
.type random, %function
random:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
bl __VERIFIER_nondet_int
cmp r0, #0
rsblt r0, r0, #0
pop {r4, pc}
.size random, .-random
.global __aeabi_idiv
.align 2
.global _log
.syntax unified
.arm
.fpu softvfp
.type _log, %function
_log:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r0, r1
cmpge r1, #1
movgt r3, #1
movle r3, #0
ble .L15
push {r4, r5, r6, lr}
mov r5, r1
mov r4, #1
.L11:
mov r1, r5
bl __aeabi_idiv
cmp r0, r5
mov r3, r4
add r4, r4, #1
bge .L11
mov r0, r3
pop {r4, r5, r6, pc}
.L15:
mov r0, r3
bx lr
.size _log, .-_log
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99936.c"
.intel_syntax noprefix
.text
.p2align 4
.globl test_signed
.type test_signed, @function
test_signed:
.LFB0:
.cfi_startproc
endbr64
movsx rsi, esi
movsx rdi, edi
neg rsi
imul rsi, rdi
mov QWORD PTR r[rip], rsi
ret
.cfi_endproc
.LFE0:
.size test_signed, .-test_signed
.p2align 4
.globl test_unsigned
.type test_unsigned, @function
test_unsigned:
.LFB1:
.cfi_startproc
endbr64
mov esi, esi
mov edi, edi
neg rsi
imul rsi, rdi
mov QWORD PTR r[rip], rsi
ret
.cfi_endproc
.LFE1:
.size test_unsigned, .-test_unsigned
.globl r
.bss
.align 8
.type r, @object
.size r, 8
r:
.zero 8
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99936.c"
.text
.align 2
.global test_signed
.syntax unified
.arm
.fpu softvfp
.type test_signed, %function
test_signed:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
push {r4, r5, fp}
rsb fp, r1, #0
asr r5, r0, #31
bic ip, fp, r1
mul r1, fp, r5
asr ip, ip, #31
umull r4, r5, fp, r0
mla r3, r0, ip, r1
ldr r2, .L4
add r5, r3, r5
stm r2, {r4-r5}
pop {r4, r5, fp}
bx lr
.L5:
.align 2
.L4:
.word r
.size test_signed, .-test_signed
.align 2
.global test_unsigned
.syntax unified
.arm
.fpu softvfp
.type test_unsigned, %function
test_unsigned:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
rsbs r2, r1, #0
push {r4, r5}
umull r4, r5, r2, r0
sbc r3, r3, r3
mla r5, r0, r3, r5
ldr r3, .L8
stm r3, {r4-r5}
pop {r4, r5}
bx lr
.L9:
.align 2
.L8:
.word r
.size test_unsigned, .-test_unsigned
.comm r,8,8
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99937.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "SAFE"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
lea rdi, .LC0[rip]
call puts@PLT
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE39:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99937.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "SAFE\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r0, .L4
bl puts
mov r0, #0
pop {r4, pc}
.L5:
.align 2
.L4:
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99939.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "fork"
.LC1:
.string "%s"
.LC2:
.string "Received string: %s\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB61:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
sub rsp, 136
.cfi_def_cfa_offset 160
mov rax, QWORD PTR fs:40
mov QWORD PTR 120[rsp], rax
xor eax, eax
lea rdi, 8[rsp]
call pipe@PLT
call fork@PLT
cmp eax, -1
je .L7
test eax, eax
je .L8
mov edi, DWORD PTR 12[rsp]
lea r12, 16[rsp]
call close@PLT
mov edi, DWORD PTR 8[rsp]
mov edx, 80
mov rsi, r12
call read@PLT
xor eax, eax
mov rdx, r12
mov edi, 1
lea rsi, .LC2[rip]
call __printf_chk@PLT
mov rax, QWORD PTR 120[rsp]
sub rax, QWORD PTR fs:40
jne .L9
add rsp, 136
.cfi_remember_state
.cfi_def_cfa_offset 24
xor eax, eax
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore_state
mov edi, DWORD PTR 8[rsp]
lea rbp, 16[rsp]
call close@PLT
mov rsi, rbp
lea rdi, .LC1[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov rdi, rbp
call strlen@PLT
mov edi, DWORD PTR 12[rsp]
mov rsi, rbp
lea rdx, 1[rax]
call write@PLT
xor edi, edi
call exit@PLT
.L7:
lea rdi, .LC0[rip]
call perror@PLT
mov edi, 1
call exit@PLT
.L9:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE61:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99939.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "fork\000"
.align 2
.LC1:
.ascii "%s\000"
.align 2
.LC2:
.ascii "Received string: %s\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC3:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 112
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r3, .L10
sub sp, sp, #112
mov r0, sp
ldr r3, [r3]
str r3, [sp, #108]
mov r3,#0
bl pipe
bl fork
cmn r0, #1
beq .L7
cmp r0, #0
mov r4, r0
beq .L8
ldr r0, [sp, #4]
bl close
mov r2, #80
add r1, sp, #8
ldr r0, [sp]
bl read
add r2, sp, #8
mov r0, #1
ldr r1, .L10+4
bl __printf_chk
ldr r3, .L10
ldr r2, [r3]
ldr r3, [sp, #108]
eors r2, r3, r2
mov r3, #0
bne .L9
mov r0, #0
add sp, sp, #112
@ sp needed
pop {r4, pc}
.L8:
ldr r0, [sp]
bl close
add r1, sp, #8
ldr r0, .L10+8
bl __isoc99_scanf
add r0, sp, #8
bl strlen
add r1, sp, #8
add r2, r0, #1
ldr r0, [sp, #4]
bl write
mov r0, r4
bl exit
.L7:
ldr r0, .L10+12
bl perror
mov r0, #1
bl exit
.L9:
bl __stack_chk_fail
.L11:
.align 2
.L10:
.word .LC3
.word .LC2
.word .LC1
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "9994.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov ebp, 2
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
sub rsp, 8
.cfi_def_cfa_offset 32
.p2align 4,,10
.p2align 3
.L2:
mov ebx, 1
.p2align 4,,10
.p2align 3
.L3:
mov edi, 42
add ebx, 1
call putchar@PLT
cmp ebx, ebp
jne .L3
mov edi, 10
lea ebp, 1[rbx]
call putchar@PLT
cmp ebx, 11
jne .L2
add rsp, 8
.cfi_def_cfa_offset 24
xor eax, eax
pop rbx
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "9994.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r5, #2
.L2:
mov r4, #1
.L3:
mov r0, #42
add r4, r4, #1
bl putchar
cmp r4, r5
bne .L3
mov r0, #10
bl putchar
cmp r4, #11
add r5, r4, #1
bne .L2
mov r0, #0
pop {r4, r5, r6, pc}
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99940.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "b must be 2.000000"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
xor edi, edi
movss xmm0, DWORD PTR .LC0[rip]
addss xmm0, DWORD PTR b[rip]
mov eax, 0
ucomiss xmm0, DWORD PTR .LC0[rip]
lea rsi, .LC1[rip]
movss DWORD PTR b[rip], xmm0
setnp dil
cmovne edi, eax
jmp assert@PLT
.cfi_endproc
.LFE0:
.size main, .-main
.globl b
.bss
.align 4
.type b, @object
.size b, 4
b:
.zero 4
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 1073741824
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99940.c"
.text
.global __aeabi_fadd
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "b must be 2.000000\000"
.global __aeabi_fcmpeq
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r4, .L5
mov r1, #1073741824
ldr r0, [r4] @ float
bl __aeabi_fadd
mov r1, #1073741824
str r0, [r4] @ float
bl __aeabi_fcmpeq
pop {r4, lr}
subs r0, r0, #0
movne r0, #1
ldr r1, .L5+4
b assert
.L6:
.align 2
.L5:
.word b
.word .LC0
.size main, .-main
.comm b,4,4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999412.c"
.intel_syntax noprefix
.text
.p2align 4
.globl foo
.type foo, @function
foo:
.LFB23:
.cfi_startproc
endbr64
xor eax, eax
ret
.cfi_endproc
.LFE23:
.size foo, .-foo
.p2align 4
.globl bar
.type bar, @function
bar:
.LFB27:
.cfi_startproc
endbr64
xor eax, eax
ret
.cfi_endproc
.LFE27:
.size bar, .-bar
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB29:
.cfi_startproc
endbr64
xor eax, eax
ret
.cfi_endproc
.LFE29:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999412.c"
.text
.align 2
.global foo
.syntax unified
.arm
.fpu softvfp
.type foo, %function
foo:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #0
bx lr
.size foo, .-foo
.align 2
.global bar
.syntax unified
.arm
.fpu softvfp
.type bar, %function
bar:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #0
bx lr
.size bar, .-bar
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #0
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999414.c"
.intel_syntax noprefix
.text
.p2align 4
.globl T_serial
.type T_serial, @function
T_serial:
.LFB40:
.cfi_startproc
endbr64
pxor xmm0, xmm0
cvtsi2sd xmm0, edi
mulsd xmm0, xmm0
ret
.cfi_endproc
.LFE40:
.size T_serial, .-T_serial
.p2align 4
.globl T_parallel
.type T_parallel, @function
T_parallel:
.LFB41:
.cfi_startproc
endbr64
pxor xmm2, xmm2
pxor xmm1, xmm1
sub rsp, 24
.cfi_def_cfa_offset 32
cvtsi2sd xmm2, esi
cvtsi2sd xmm1, edi
movapd xmm0, xmm2
movsd QWORD PTR [rsp], xmm2
movsd QWORD PTR 8[rsp], xmm1
call log2@PLT
movsd xmm1, QWORD PTR 8[rsp]
movsd xmm2, QWORD PTR [rsp]
add rsp, 24
.cfi_def_cfa_offset 8
mulsd xmm1, xmm1
divsd xmm1, xmm2
addsd xmm0, xmm1
ret
.cfi_endproc
.LFE41:
.size T_parallel, .-T_parallel
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%s:\n "
.LC1:
.string "%d "
.LC2:
.string "%d\t"
.LC3:
.string "%.2e "
.LC4:
.string "\n"
.text
.p2align 4
.globl Print_table
.type Print_table, @function
Print_table:
.LFB42:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
xor eax, eax
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
mov r13d, ecx
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
mov r12d, r8d
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov ebx, r9d
sub rsp, 24
.cfi_def_cfa_offset 80
mov QWORD PTR 8[rsp], rsi
lea rsi, .LC0[rip]
mov DWORD PTR 4[rsp], edx
mov rdx, rdi
mov edi, 1
call __printf_chk@PLT
test r12d, r12d
jle .L6
xor r14d, r14d
lea rbp, .LC1[rip]
.p2align 4,,10
.p2align 3
.L7:
mov edx, ebx
mov rsi, rbp
mov edi, 1
xor eax, eax
call __printf_chk@PLT
add r14d, 1
add ebx, ebx
cmp r12d, r14d
jne .L7
.L6:
mov edi, 10
call putchar@PLT
mov eax, DWORD PTR 4[rsp]
test eax, eax
jle .L8
mov DWORD PTR [rsp], 0
xor r14d, r14d
lea rbp, .LC3[rip]
.p2align 4,,10
.p2align 3
.L11:
xor eax, eax
mov edx, r13d
mov edi, 1
lea rsi, .LC2[rip]
call __printf_chk@PLT
test r12d, r12d
jle .L9
movsx rcx, DWORD PTR [rsp]
mov rdx, QWORD PTR 8[rsp]
lea eax, -1[r12]
add rax, rcx
lea r15, [rdx+rcx*8]
lea rbx, 8[rdx+rax*8]
.p2align 4,,10
.p2align 3
.L10:
movsd xmm0, QWORD PTR [r15]
mov rsi, rbp
mov edi, 1
mov eax, 1
add r15, 8
call __printf_chk@PLT
cmp rbx, r15
jne .L10
.L9:
mov edi, 10
add r14d, 1
add r13d, r13d
call putchar@PLT
add DWORD PTR [rsp], r12d
cmp DWORD PTR 4[rsp], r14d
jne .L11
.L8:
add rsp, 24
.cfi_def_cfa_offset 56
lea rdi, .LC4[rip]
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
jmp puts@PLT
.cfi_endproc
.LFE42:
.size Print_table, .-Print_table
.section .rodata.str1.1
.LC5:
.string "Speedups"
.LC6:
.string "Efficiencies"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov edi, 384
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
mov r12d, 1
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 40
.cfi_def_cfa_offset 96
call malloc@PLT
mov edi, 384
mov rbx, rax
mov QWORD PTR 16[rsp], rax
call malloc@PLT
lea r13, 384[rbx]
mov QWORD PTR 24[rsp], rax
mov rbp, rax
.p2align 4,,10
.p2align 3
.L17:
pxor xmm3, xmm3
xor r14d, r14d
mov r15d, 10
cvtsi2sd xmm3, r12d
.p2align 4,,10
.p2align 3
.L18:
pxor xmm0, xmm0
movsd QWORD PTR [rsp], xmm3
cvtsi2sd xmm0, r15d
add r15d, r15d
movapd xmm1, xmm0
mulsd xmm1, xmm0
movapd xmm0, xmm3
movsd QWORD PTR 8[rsp], xmm1
call log2@PLT
movsd xmm1, QWORD PTR 8[rsp]
movsd xmm3, QWORD PTR [rsp]
movapd xmm2, xmm0
movapd xmm0, xmm1
divsd xmm0, xmm3
addsd xmm2, xmm0
divsd xmm1, xmm2
movapd xmm0, xmm1
movsd QWORD PTR [rbx+r14], xmm1
divsd xmm0, xmm3
movsd QWORD PTR 0[rbp+r14], xmm0
add r14, 8
cmp r14, 48
jne .L18
add rbx, 48
add r12d, r12d
add rbp, 48
cmp r13, rbx
jne .L17
mov r15, QWORD PTR 16[rsp]
mov r9d, 10
mov r8d, 6
mov ecx, 1
mov edx, 8
lea rdi, .LC5[rip]
mov rsi, r15
call Print_table
mov rbx, QWORD PTR 24[rsp]
mov r9d, 10
mov r8d, 6
mov ecx, 1
mov edx, 8
lea rdi, .LC6[rip]
mov rsi, rbx
call Print_table
mov rdi, r15
call free@PLT
mov rdi, rbx
call free@PLT
add rsp, 40
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE39:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999414.c"
.text
.global __aeabi_i2d
.global __aeabi_dmul
.align 2
.global T_serial
.syntax unified
.arm
.fpu softvfp
.type T_serial, %function
T_serial:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
bl __aeabi_i2d
mov r2, r0
mov r3, r1
bl __aeabi_dmul
pop {r4, pc}
.size T_serial, .-T_serial
.global __aeabi_ddiv
.global __aeabi_dadd
.align 2
.global T_parallel
.syntax unified
.arm
.fpu softvfp
.type T_parallel, %function
T_parallel:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
mov r4, r1
bl __aeabi_i2d
mov r8, r0
mov r0, r4
mov r9, r1
bl __aeabi_i2d
mov r6, r0
mov r7, r1
bl log2
mov r4, r0
mov r5, r1
mov r2, r8
mov r3, r9
mov r0, r8
mov r1, r9
bl __aeabi_dmul
mov r2, r6
mov r3, r7
bl __aeabi_ddiv
mov r2, r4
mov r3, r5
bl __aeabi_dadd
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.size T_parallel, .-T_parallel
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%s:\012 \000"
.align 2
.LC1:
.ascii "%d \000"
.align 2
.LC2:
.ascii "%d\011\000"
.align 2
.LC3:
.ascii "%.2e \000"
.align 2
.LC4:
.ascii "\012\000"
.text
.align 2
.global Print_table
.syntax unified
.arm
.fpu softvfp
.type Print_table, %function
Print_table:
@ args = 8, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov ip, r2
mov lr, r1
sub sp, sp, #20
ldr r7, [sp, #56]
mov r2, r0
ldr r1, .L17
mov r0, #1
mov r8, r3
ldr r4, [sp, #60]
str lr, [sp, #12]
str ip, [sp, #4]
bl __printf_chk
cmp r7, #0
ble .L7
mov r5, #0
ldr r6, .L17+4
.L8:
mov r2, r4
mov r1, r6
mov r0, #1
add r5, r5, #1
bl __printf_chk
cmp r7, r5
lsl r4, r4, #1
bne .L8
.L7:
mov r0, #10
bl putchar
ldr r3, [sp, #4]
cmp r3, #0
ble .L9
mov r10, #0
mov r9, r10
lsl r3, r7, #3
str r3, [sp, #8]
ldr r3, [sp, #12]
ldr fp, .L17+8
ldr r6, .L17+12
add r5, r3, r7, lsl #3
.L12:
mov r2, r8
mov r1, fp
mov r0, #1
bl __printf_chk
cmp r7, #0
ble .L10
ldr r3, [sp, #12]
add r4, r3, r10, lsl #3
.L11:
ldmia r4!, {r2-r3}
mov r1, r6
mov r0, #1
bl __printf_chk
cmp r4, r5
bne .L11
.L10:
mov r0, #10
bl putchar
ldr r3, [sp, #4]
add r9, r9, #1
cmp r3, r9
ldr r3, [sp, #8]
lsl r8, r8, #1
add r10, r10, r7
add r5, r5, r3
bne .L12
.L9:
ldr r0, .L17+16
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
b puts
.L18:
.align 2
.L17:
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.size Print_table, .-Print_table
.section .rodata.str1.4
.align 2
.LC5:
.ascii "Speedups\000"
.align 2
.LC6:
.ascii "Efficiencies\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r0, #384
sub sp, sp, #44
bl malloc
mov r3, r0
mov r4, r3
mov r0, #384
str r3, [sp, #36]
bl malloc
add r3, r4, #432
str r3, [sp, #32]
mov r3, #0
str r3, [sp, #24]
mov r3, #1
add fp, r4, #48
str r0, [sp, #28]
str r3, [sp, #20]
.L20:
ldr r0, [sp, #20]
bl __aeabi_i2d
mov r9, #10
mov r6, r0
mov r7, r1
ldr r3, [sp, #28]
ldr r2, [sp, #24]
sub r8, fp, #48
add r10, r3, r2, lsl #3
str r10, [sp, #12]
str fp, [sp, #16]
.L21:
mov r0, r9
bl __aeabi_i2d
mov r2, r0
mov r3, r1
bl __aeabi_dmul
mov r4, r0
mov r5, r1
mov r0, r6
mov r1, r7
bl log2
mov r10, r0
mov fp, r1
mov r2, r6
mov r3, r7
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r2, r10
mov r3, fp
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r4, r0
mov r5, r1
mov r3, r7
stm r8!, {r4-r5}
mov r2, r6
bl __aeabi_ddiv
ldr r3, [sp, #16]
lsl r9, r9, #1
cmp r8, r3
ldr r3, [sp, #12]
stm r3!, {r0-r1}
str r3, [sp, #12]
bne .L21
ldr r3, [sp, #32]
add fp, r8, #48
cmp fp, r3
ldr r3, [sp, #20]
lsl r3, r3, #1
str r3, [sp, #20]
ldr r3, [sp, #24]
add r3, r3, #6
str r3, [sp, #24]
bne .L20
mov r4, #6
mov r5, #10
ldr r6, [sp, #36]
stm sp, {r4, r5}
mov r1, r6
mov r3, #1
mov r2, #8
ldr r0, .L25
bl Print_table
stm sp, {r4, r5}
ldr r4, [sp, #28]
mov r3, #1
mov r2, #8
mov r1, r4
ldr r0, .L25+4
bl Print_table
mov r0, r6
bl free
mov r0, r4
bl free
mov r0, #0
add sp, sp, #44
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L26:
.align 2
.L25:
.word .LC5
.word .LC6
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999418.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "var1 \345\217\230\351\207\217\347\232\204\345\234\260\345\235\200\357\274\232 %x\n"
.LC1:
.string "var2 \345\217\230\351\207\217\347\232\204\345\234\260\345\235\200\357\274\232 %x\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 40
.cfi_def_cfa_offset 48
lea rsi, .LC0[rip]
mov edi, 1
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
lea rdx, 8[rsp]
call __printf_chk@PLT
xor eax, eax
lea rdx, 14[rsp]
lea rsi, .LC1[rip]
mov edi, 1
call __printf_chk@PLT
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L5
xor eax, eax
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999418.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "var1 \345\217\230\351\207\217\347\232\204\345\234\260"
.ascii "\345\235\200\357\274\232 %x\012\000"
.align 2
.LC1:
.ascii "var2 \345\217\230\351\207\217\347\232\204\345\234\260"
.ascii "\345\235\200\357\274\232 %x\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr r3, .L6
sub sp, sp, #28
ldr r1, .L6+4
add r2, sp, #4
mov r0, #1
ldr r3, [r3]
str r3, [sp, #20]
mov r3,#0
bl __printf_chk
add r2, sp, #8
mov r0, #1
ldr r1, .L6+8
bl __printf_chk
ldr r3, .L6
ldr r2, [r3]
ldr r3, [sp, #20]
eors r2, r3, r2
mov r3, #0
bne .L5
mov r0, #0
add sp, sp, #28
@ sp needed
ldr pc, [sp], #4
.L5:
bl __stack_chk_fail
.L7:
.align 2
.L6:
.word .LC2
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99944.c"
.intel_syntax noprefix
.text
.p2align 4
.globl memzero
.type memzero, @function
memzero:
.LFB17:
.cfi_startproc
endbr64
mov rdx, -1
jmp __explicit_bzero_chk@PLT
.cfi_endproc
.LFE17:
.size memzero, .-memzero
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99944.c"
.text
.align 2
.global memzero
.syntax unified
.arm
.fpu softvfp
.type memzero, %function
memzero:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mvn r2, #0
b __explicit_bzero_chk
.size memzero, .-memzero
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999445.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string " "
.text
.p2align 4
.globl space_printer
.type space_printer, @function
space_printer:
.LFB23:
.cfi_startproc
endbr64
test edi, edi
jle .L6
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
lea r12, .LC0[rip]
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov ebp, edi
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
mov ebx, 1
.p2align 4,,10
.p2align 3
.L3:
mov rsi, r12
mov edi, 1
xor eax, eax
add ebx, 1
call __printf_chk@PLT
cmp ebp, ebx
jge .L3
pop rbx
.cfi_def_cfa_offset 24
xor eax, eax
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L6:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
xor eax, eax
ret
.cfi_endproc
.LFE23:
.size space_printer, .-space_printer
.p2align 4
.globl leap_year
.type leap_year, @function
leap_year:
.LFB24:
.cfi_startproc
endbr64
xor eax, eax
test dil, 3
jne .L10
imul edi, edi, -1030792151
mov eax, 1
add edi, 85899344
mov edx, edi
ror edx, 2
cmp edx, 42949672
ja .L10
ror edi, 4
xor eax, eax
cmp edi, 10737418
setbe al
.L10:
ret
.cfi_endproc
.LFE24:
.size leap_year, .-leap_year
.p2align 4
.globl months_last
.type months_last, @function
months_last:
.LFB25:
.cfi_startproc
endbr64
mov edx, edi
mov eax, 30
and edx, -3
cmp edx, 4
je .L14
cmp edx, 9
je .L14
cmp edi, 2
jne .L20
mov eax, 28
test sil, 3
jne .L14
imul esi, esi, -1030792151
mov eax, 29
add esi, 85899344
mov edx, esi
ror edx, 2
cmp edx, 42949672
ja .L14
ror esi, 4
mov edx, 28
cmp esi, 10737419
sbb eax, eax
and eax, -2
add eax, 31
cmp esi, 10737419
cmovnb eax, edx
ret
.L20:
mov eax, 31
.L14:
ret
.cfi_endproc
.LFE25:
.size months_last, .-months_last
.section .rodata.str1.1
.LC1:
.string "JANUARY"
.LC2:
.string "FEBRUARY"
.LC3:
.string "MARCH"
.LC4:
.string "APRIL"
.LC5:
.string "MAY"
.LC6:
.string "JUNE"
.LC7:
.string "JULY"
.LC8:
.string "AUGUST"
.LC9:
.string "SEPTEMBER"
.LC10:
.string "OCTOBER"
.LC11:
.string "NOVEMBER"
.LC12:
.string "DECEMBER"
.text
.p2align 4
.globl month_name
.type month_name, @function
month_name:
.LFB26:
.cfi_startproc
endbr64
cmp edi, 12
ja .L41
lea rdx, .L28[rip]
mov edi, edi
sub rsp, 8
.cfi_def_cfa_offset 16
movsx rax, DWORD PTR [rdx+rdi*4]
add rax, rdx
notrack jmp rax
.section .rodata
.align 4
.align 4
.L28:
.long .L26-.L28
.long .L39-.L28
.long .L38-.L28
.long .L37-.L28
.long .L36-.L28
.long .L35-.L28
.long .L34-.L28
.long .L33-.L28
.long .L32-.L28
.long .L31-.L28
.long .L30-.L28
.long .L29-.L28
.long .L27-.L28
.text
.p2align 4,,10
.p2align 3
.L27:
lea rsi, .LC12[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
.L26:
xor eax, eax
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L39:
.cfi_restore_state
lea rsi, .LC1[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L26
.p2align 4,,10
.p2align 3
.L38:
lea rsi, .LC2[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L26
.p2align 4,,10
.p2align 3
.L37:
lea rsi, .LC3[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L26
.p2align 4,,10
.p2align 3
.L36:
lea rsi, .LC4[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L26
.p2align 4,,10
.p2align 3
.L35:
lea rsi, .LC5[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L26
.p2align 4,,10
.p2align 3
.L34:
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L26
.p2align 4,,10
.p2align 3
.L33:
lea rsi, .LC7[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L26
.p2align 4,,10
.p2align 3
.L32:
lea rsi, .LC8[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L26
.p2align 4,,10
.p2align 3
.L31:
lea rsi, .LC9[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L26
.p2align 4,,10
.p2align 3
.L30:
lea rsi, .LC10[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L26
.p2align 4,,10
.p2align 3
.L29:
lea rsi, .LC11[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L26
.L41:
.cfi_def_cfa_offset 8
xor eax, eax
ret
.cfi_endproc
.LFE26:
.size month_name, .-month_name
.p2align 4
.globl Day_of_week
.type Day_of_week, @function
Day_of_week:
.LFB27:
.cfi_startproc
endbr64
lea eax, -1[rsi]
cmp eax, 1
jbe .L45
add esi, 1
imul esi, esi, 26
movsx rax, esi
sar esi, 31
imul rax, rax, 1717986919
sar rax, 34
sub eax, esi
.L46:
add eax, edx
test edi, edi
lea edx, [rax+rdi]
lea eax, 3[rdi]
cmovns eax, edi
sar eax, 2
add eax, edx
movsx rdx, edi
sar edi, 31
imul rdx, rdx, 1374389535
mov rsi, rdx
sar rdx, 39
sar rsi, 37
sub edx, edi
mov rcx, rsi
sub ecx, edi
lea ecx, [rcx+rcx*2]
lea eax, [rax+rcx*2]
add edx, eax
movsx rax, edx
mov ecx, edx
imul rax, rax, -1840700269
sar ecx, 31
shr rax, 32
add eax, edx
sar eax, 2
sub eax, ecx
lea ecx, 0[0+rax*8]
sub ecx, eax
mov eax, edx
sub eax, ecx
ret
.p2align 4,,10
.p2align 3
.L45:
xor eax, eax
sub edi, 1
cmp esi, 1
setne al
lea eax, 36[rax+rax*2]
jmp .L46
.cfi_endproc
.LFE27:
.size Day_of_week, .-Day_of_week
.section .rodata.str1.1
.LC13:
.string "Please Enter Month(1-12):"
.LC14:
.string "%d"
.LC15:
.string "Please Enter Year:"
.LC16:
.string "Calendar for:"
.LC17:
.string " %d\n"
.LC18:
.string "SAT SUN MON TUE WED THU FRI"
.LC19:
.string " %d "
.LC20:
.string " %d "
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB28:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
lea r13, .LC20[rip]
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
lea rbp, .LC0[rip]
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 40
.cfi_def_cfa_offset 96
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
lea rax, 16[rsp]
lea r15, 20[rsp]
mov QWORD PTR 8[rsp], rax
.p2align 4,,10
.p2align 3
.L55:
lea rdi, .LC13[rip]
call puts@PLT
mov rsi, r15
lea rdi, .LC14[rip]
xor eax, eax
call __isoc99_scanf@PLT
lea rdi, .LC15[rip]
call puts@PLT
mov rsi, QWORD PTR 8[rsp]
lea rdi, .LC14[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov edi, 10
call putchar@PLT
lea rdi, .LC16[rip]
call puts@PLT
mov edi, 10
call putchar@PLT
mov edi, DWORD PTR 20[rsp]
call month_name
mov edi, 1
movsx rsi, eax
xor eax, eax
call __printf_chk@PLT
mov edx, DWORD PTR 16[rsp]
mov edi, 1
xor eax, eax
lea rsi, .LC17[rip]
call __printf_chk@PLT
mov edi, 10
call putchar@PLT
lea rdi, .LC18[rip]
call puts@PLT
mov edi, 10
call putchar@PLT
mov ecx, DWORD PTR 16[rsp]
mov edi, DWORD PTR 20[rsp]
mov esi, ecx
call months_last
mov r12d, eax
lea eax, -1[rdi]
cmp eax, 1
jbe .L49
add edi, 1
imul edi, edi, 26
movsx rax, edi
sar edi, 31
imul rax, rax, 1717986919
sar rax, 34
sub eax, edi
add eax, 1
.L50:
test ecx, ecx
lea edx, [rcx+rax]
lea eax, 3[rcx]
mov r14d, 1
cmovns eax, ecx
sar eax, 2
add eax, edx
movsx rdx, ecx
sar ecx, 31
imul rdx, rdx, 1374389535
mov rsi, rdx
sar rdx, 39
sar rsi, 37
sub edx, ecx
sub esi, ecx
lea esi, [rsi+rsi*2]
lea eax, [rax+rsi*2]
add edx, eax
movsx rbx, edx
mov eax, edx
imul rbx, rbx, -1840700269
sar eax, 31
shr rbx, 32
add ebx, edx
sar ebx, 2
sub ebx, eax
lea eax, 0[0+rbx*8]
sub eax, ebx
sub edx, eax
mov ebx, edx
test edx, edx
jle .L54
.p2align 4,,10
.p2align 3
.L51:
mov rsi, rbp
mov edi, 1
xor eax, eax
add r14d, 1
call __printf_chk@PLT
cmp r14d, ebx
jle .L51
.L54:
xor esi, esi
mov edi, 1
xor eax, eax
mov r14d, 1
call __printf_chk@PLT
test r12d, r12d
jle .L53
.L52:
mov eax, DWORD PTR 20[rsp]
mov esi, DWORD PTR 16[rsp]
lea ecx, -1[rax]
cmp ecx, 1
jbe .L56
add eax, 1
imul ecx, eax, 26
movsx rax, ecx
sar ecx, 31
imul rax, rax, 1717986919
sar rax, 34
sub eax, ecx
.L57:
add eax, r14d
test esi, esi
lea ecx, [rax+rsi]
lea eax, 3[rsi]
cmovns eax, esi
sar eax, 2
add eax, ecx
movsx rcx, esi
sar esi, 31
imul rcx, rcx, 1374389535
mov rdx, rcx
sar rcx, 39
sar rdx, 37
sub ecx, esi
mov rdi, rdx
mov edx, r14d
sub edi, esi
lea edi, [rdi+rdi*2]
lea eax, [rax+rdi*2]
add ecx, eax
movsx rbx, ecx
mov eax, ecx
imul rbx, rbx, -1840700269
sar eax, 31
shr rbx, 32
add ebx, ecx
sar ebx, 2
sub ebx, eax
lea eax, 0[0+rbx*8]
sub eax, ebx
mov ebx, ecx
sub ebx, eax
cmp r14d, 9
jle .L71
xor eax, eax
mov rsi, r13
mov edi, 1
call __printf_chk@PLT
cmp ebx, 6
je .L72
.L60:
add r14d, 1
cmp r12d, r14d
jge .L52
.L53:
mov edi, 10
call putchar@PLT
jmp .L55
.p2align 4,,10
.p2align 3
.L56:
sub esi, 1
cmp eax, 1
setne al
movzx eax, al
lea eax, 36[rax+rax*2]
jmp .L57
.p2align 4,,10
.p2align 3
.L71:
xor eax, eax
lea rsi, .LC19[rip]
mov edi, 1
call __printf_chk@PLT
cmp ebx, 6
jne .L60
.L72:
mov edi, 10
call putchar@PLT
jmp .L60
.p2align 4,,10
.p2align 3
.L49:
xor eax, eax
sub ecx, 1
cmp edi, 1
setne al
lea eax, 37[rax+rax*2]
jmp .L50
.cfi_endproc
.LFE28:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999445.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii " \000"
.text
.align 2
.global space_printer
.syntax unified
.arm
.fpu softvfp
.type space_printer, %function
space_printer:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r0, #0
ble .L6
push {r4, r5, r6, lr}
mov r4, #1
ldr r6, .L10
add r5, r0, r4
.L3:
mov r1, r6
mov r0, #1
add r4, r4, #1
bl __printf_chk
cmp r4, r5
bne .L3
mov r0, #0
pop {r4, r5, r6, pc}
.L6:
mov r0, #0
bx lr
.L11:
.align 2
.L10:
.word .LC0
.size space_printer, .-space_printer
.align 2
.global leap_year
.syntax unified
.arm
.fpu softvfp
.type leap_year, %function
leap_year:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
tst r0, #3
bne .L14
ldr r1, .L16
ldr r2, .L16+4
ldr r3, .L16+8
mla r0, r1, r0, r2
cmp r3, r0, ror #2
bcc .L15
ldr r3, .L16+12
cmp r3, r0, ror #4
movcs r0, #1
movcc r0, #0
bx lr
.L15:
mov r0, #1
bx lr
.L14:
mov r0, #0
bx lr
.L17:
.align 2
.L16:
.word -1030792151
.word 85899344
.word 42949672
.word 10737418
.size leap_year, .-leap_year
.align 2
.global months_last
.syntax unified
.arm
.fpu softvfp
.type months_last, %function
months_last:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
bic r3, r0, #2
cmp r3, #4
beq .L23
cmp r3, #9
beq .L23
cmp r0, #2
bne .L24
tst r1, #3
bne .L25
ldr r2, .L27
ldr r0, .L27+4
ldr r3, .L27+8
mla r1, r2, r1, r0
cmp r3, r1, ror #2
bcc .L26
ldr r0, .L27+12
ror r1, r1, #4
cmp r1, r0
movls r0, #29
movhi r0, #28
bx lr
.L23:
mov r0, #30
bx lr
.L26:
mov r0, #29
bx lr
.L25:
mov r0, #28
bx lr
.L24:
mov r0, #31
bx lr
.L28:
.align 2
.L27:
.word -1030792151
.word 85899344
.word 42949672
.word 10737418
.size months_last, .-months_last
.section .rodata.str1.4
.align 2
.LC1:
.ascii "JANUARY\000"
.align 2
.LC2:
.ascii "FEBRUARY\000"
.align 2
.LC3:
.ascii "MARCH\000"
.align 2
.LC4:
.ascii "APRIL\000"
.align 2
.LC5:
.ascii "MAY\000"
.align 2
.LC6:
.ascii "JUNE\000"
.align 2
.LC7:
.ascii "JULY\000"
.align 2
.LC8:
.ascii "AUGUST\000"
.align 2
.LC9:
.ascii "SEPTEMBER\000"
.align 2
.LC10:
.ascii "OCTOBER\000"
.align 2
.LC11:
.ascii "NOVEMBER\000"
.align 2
.LC12:
.ascii "DECEMBER\000"
.text
.align 2
.global month_name
.syntax unified
.arm
.fpu softvfp
.type month_name, %function
month_name:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
sub r0, r0, #1
push {r4, lr}
cmp r0, #11
ldrls pc, [pc, r0, asl #2]
b .L30
.L32:
.word .L43
.word .L42
.word .L41
.word .L40
.word .L39
.word .L38
.word .L37
.word .L36
.word .L35
.word .L34
.word .L33
.word .L31
.L31:
mov r0, #1
ldr r1, .L45
bl __printf_chk
.L30:
mov r0, #0
pop {r4, pc}
.L43:
ldr r1, .L45+4
mov r0, #1
bl __printf_chk
b .L30
.L42:
ldr r1, .L45+8
mov r0, #1
bl __printf_chk
b .L30
.L41:
ldr r1, .L45+12
mov r0, #1
bl __printf_chk
b .L30
.L40:
ldr r1, .L45+16
mov r0, #1
bl __printf_chk
b .L30
.L39:
ldr r1, .L45+20
mov r0, #1
bl __printf_chk
b .L30
.L38:
ldr r1, .L45+24
mov r0, #1
bl __printf_chk
b .L30
.L37:
ldr r1, .L45+28
mov r0, #1
bl __printf_chk
b .L30
.L36:
ldr r1, .L45+32
mov r0, #1
bl __printf_chk
b .L30
.L35:
ldr r1, .L45+36
mov r0, #1
bl __printf_chk
b .L30
.L34:
ldr r1, .L45+40
mov r0, #1
bl __printf_chk
b .L30
.L33:
ldr r1, .L45+44
mov r0, #1
bl __printf_chk
b .L30
.L46:
.align 2
.L45:
.word .LC12
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.word .LC6
.word .LC7
.word .LC8
.word .LC9
.word .LC10
.word .LC11
.size month_name, .-month_name
.align 2
.global Day_of_week
.syntax unified
.arm
.fpu softvfp
.type Day_of_week, %function
Day_of_week:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
sub r3, r1, #1
cmp r3, #1
bls .L48
add r1, r1, #1
add r3, r1, r1, lsl #1
add r1, r1, r3, lsl #2
ldr r3, .L51
lsl r1, r1, #1
smull ip, r3, r1, r3
asr r1, r1, #31
rsb r3, r1, r3, asr #2
.L49:
cmp r0, #0
add ip, r0, #3
movge ip, r0
ldr r1, .L51+4
add r3, r2, r3
smull r2, r1, r0, r1
asr r2, r0, #31
add r3, r3, r0
rsb r0, r2, r1, asr #5
add r3, r3, ip, asr #2
add r0, r0, r0, lsl #1
add r3, r3, r0, lsl #1
rsb r0, r2, r1, asr #7
ldr r2, .L51+8
add r3, r3, r0
smull r1, r2, r3, r2
asr r0, r3, #31
add r2, r2, r3
rsb r0, r0, r2, asr #2
rsb r0, r0, r0, lsl #3
sub r0, r3, r0
bx lr
.L48:
cmp r1, #1
movne r3, #39
moveq r3, #36
sub r0, r0, #1
b .L49
.L52:
.align 2
.L51:
.word 1717986919
.word 1374389535
.word -1840700269
.size Day_of_week, .-Day_of_week
.section .rodata.str1.4
.align 2
.LC13:
.ascii "Please Enter Month(1-12):\000"
.align 2
.LC14:
.ascii "%d\000"
.align 2
.LC15:
.ascii "Please Enter Year:\000"
.align 2
.LC16:
.ascii "Calendar for:\000"
.align 2
.LC17:
.ascii " %d\012\000"
.align 2
.LC18:
.ascii "SAT SUN MON TUE WED THU FRI\000"
.align 2
.LC19:
.ascii " %d \000"
.align 2
.LC20:
.ascii " %d \000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC21:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L75
sub sp, sp, #20
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
ldr r7, .L75+4
ldr r6, .L75+8
ldr r5, .L75+12
.L61:
ldr r0, .L75+16
bl puts
add r1, sp, #8
mov r0, r7
bl __isoc99_scanf
ldr r0, .L75+20
bl puts
add r1, sp, #4
mov r0, r7
bl __isoc99_scanf
mov r0, #10
bl putchar
ldr r0, .L75+24
bl puts
mov r0, #10
bl putchar
ldr r0, [sp, #8]
bl month_name
mov r1, r0
mov r0, #1
bl __printf_chk
ldr r2, [sp, #4]
ldr r1, .L75+28
mov r0, #1
bl __printf_chk
mov r0, #10
bl putchar
ldr r0, .L75+32
bl puts
mov r0, #10
bl putchar
ldmib sp, {r8, r9}
mov r0, r9
mov r1, r8
bl months_last
sub r3, r9, #1
cmp r3, #1
mov r4, r0
bls .L54
add r9, r9, #1
add r3, r9, r9, lsl #1
add r9, r9, r3, lsl #2
ldr r2, .L75+36
lsl r9, r9, #1
smull r3, r2, r9, r2
asr r3, r9, #31
rsb r3, r3, r2, asr #2
add r3, r3, #1
.L55:
cmp r8, #0
add r0, r8, #3
movge r0, r8
smull r2, ip, r6, r8
asr r2, r8, #31
rsb r1, r2, ip, asr #5
add r8, r8, r3
add r1, r1, r1, lsl #1
add r3, r8, r0, asr #2
add r3, r3, r1, lsl #1
rsb r2, r2, ip, asr #7
add r3, r3, r2
smull r1, r2, r5, r3
asr r9, r3, #31
add r2, r2, r3
rsb r9, r9, r2, asr #2
rsb r9, r9, r9, lsl #3
sub r9, r3, r9
cmp r9, #0
ble .L60
mov r8, #1
ldr r10, .L75+40
add r9, r9, r8
.L59:
mov r1, r10
mov r0, #1
add r8, r8, #1
bl __printf_chk
cmp r8, r9
bne .L59
.L60:
mov r1, #0
mov r0, #1
bl __printf_chk
cmp r4, #0
ble .L58
mov r10, #1
ldr r8, .L75+44
ldr r9, .L75+48
add r4, r4, r10
.L67:
ldr r0, [sp, #8]
ldr r1, [sp, #4]
add r2, r0, #1
add r3, r2, r2, lsl #1
add r2, r2, r3, lsl #2
sub r3, r0, #1
lsl r2, r2, #1
cmp r3, #1
asr r3, r2, #31
bls .L62
ldr r0, .L75+36
smull ip, r0, r2, r0
rsb r3, r3, r0, asr #2
.L63:
cmp r1, #0
add ip, r1, #3
movge ip, r1
smull r0, r2, r6, r1
add r3, r10, r3
asr r0, r1, #31
add r3, r3, r1
rsb r1, r0, r2, asr #5
add r1, r1, r1, lsl #1
add r3, r3, ip, asr #2
add r3, r3, r1, lsl #1
rsb r2, r0, r2, asr #7
add r3, r3, r2
smull r1, r2, r5, r3
asr fp, r3, #31
add r2, r2, r3
rsb fp, fp, r2, asr #2
cmp r10, #9
rsb fp, fp, fp, lsl #3
movle r2, r10
movgt r2, r10
movle r1, r9
movle r0, #1
movgt r0, #1
movgt r1, r8
sub fp, r3, fp
bl __printf_chk
cmp fp, #6
add r10, r10, #1
beq .L74
.L66:
cmp r10, r4
bne .L67
.L58:
mov r0, #10
bl putchar
b .L61
.L62:
cmp r0, #1
movne r3, #39
moveq r3, #36
sub r1, r1, #1
b .L63
.L74:
mov r0, #10
bl putchar
b .L66
.L54:
cmp r9, #1
movne r3, #40
moveq r3, #37
sub r8, r8, #1
b .L55
.L76:
.align 2
.L75:
.word .LC21
.word .LC14
.word 1374389535
.word -1840700269
.word .LC13
.word .LC15
.word .LC16
.word .LC17
.word .LC18
.word 1717986919
.word .LC0
.word .LC20
.word .LC19
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99945.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99945.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999450.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999450.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99946.c"
.intel_syntax noprefix
.text
.p2align 4
.type logencode, @function
logencode:
.LFB123:
.cfi_startproc
movzx eax, BYTE PTR [rdi]
mov r8, rsi
test al, al
je .L2
xor edx, edx
lea r9, hex.0[rip]
jmp .L6
.p2align 4,,10
.p2align 3
.L3:
add rdi, 1
mov BYTE PTR [rcx], al
mov edx, esi
movzx eax, BYTE PTR [rdi]
test al, al
je .L13
.L6:
movsx rcx, edx
lea r10d, -32[rax]
lea esi, 1[rdx]
add rcx, r8
cmp r10b, 94
ja .L7
cmp al, 34
jne .L3
.L7:
mov BYTE PTR [rcx], 37
movzx eax, BYTE PTR [rdi]
lea ecx, 2[rdx]
movsx rsi, esi
add rdi, 1
add edx, 3
shr al, 4
and eax, 15
movzx eax, BYTE PTR [r9+rax]
mov BYTE PTR [r8+rsi], al
movsx rax, ecx
movzx ecx, BYTE PTR -1[rdi]
and ecx, 15
movzx ecx, BYTE PTR [r9+rcx]
mov BYTE PTR [r8+rax], cl
movzx eax, BYTE PTR [rdi]
test al, al
jne .L6
.L13:
movsx rdx, edx
add r8, rdx
.L2:
mov BYTE PTR [r8], 0
ret
.cfi_endproc
.LFE123:
.size logencode, .-logencode
.p2align 4
.type stop_running, @function
stop_running:
.LFB157:
.cfi_startproc
endbr64
mov DWORD PTR running[rip], 0
ret
.cfi_endproc
.LFE157:
.size stop_running, .-stop_running
.p2align 4
.type mime_mapping_cmp, @function
mime_mapping_cmp:
.LFB106:
.cfi_startproc
endbr64
mov rsi, QWORD PTR [rsi]
mov rdi, QWORD PTR [rdi]
jmp strcmp@PLT
.cfi_endproc
.LFE106:
.size mime_mapping_cmp, .-mime_mapping_cmp
.p2align 4
.type dlent_cmp, @function
dlent_cmp:
.LFB139:
.cfi_startproc
endbr64
mov rdx, QWORD PTR [rsi]
mov rax, QWORD PTR [rdi]
mov rsi, QWORD PTR [rdx]
mov rdi, QWORD PTR [rax]
jmp strcmp@PLT
.cfi_endproc
.LFE139:
.size dlent_cmp, .-dlent_cmp
.p2align 4
.type url_content_type, @function
url_content_type:
.LFB113:
.cfi_startproc
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov rbx, rdi
sub rsp, 8
.cfi_def_cfa_offset 64
call strlen@PLT
lea ecx, -1[rax]
test ecx, ecx
jle .L18
mov esi, DWORD PTR longest_ext[rip]
movsx rax, ecx
jmp .L19
.p2align 4,,10
.p2align 3
.L34:
mov edx, ecx
sub edx, eax
cmp esi, edx
jl .L24
lea edx, -1[rax]
sub rax, 1
je .L20
.L19:
cmp BYTE PTR [rbx+rax], 46
jne .L34
.L21:
mov r15, QWORD PTR mime_map_size[rip]
mov r12, QWORD PTR mime_map[rip]
lea r14, 1[rbx+rax]
xor r13d, r13d
.p2align 4,,10
.p2align 3
.L26:
cmp r15, r13
jbe .L24
.L28:
lea rbx, [r15+r13]
mov rdi, r14
shr rbx
mov rbp, rbx
sal rbp, 4
add rbp, r12
mov rsi, QWORD PTR 0[rbp]
call strcmp@PLT
test eax, eax
js .L29
je .L27
lea r13, 1[rbx]
cmp r15, r13
ja .L28
.L24:
mov rax, QWORD PTR default_mimetype[rip]
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L29:
.cfi_restore_state
mov r15, rbx
jmp .L26
.L18:
mov edx, ecx
test ecx, ecx
jne .L24
.p2align 4,,10
.p2align 3
.L20:
movsx rax, edx
cmp BYTE PTR [rbx+rax], 46
jne .L24
jmp .L21
.p2align 4,,10
.p2align 3
.L27:
mov rax, QWORD PTR 8[rbp]
add rsp, 8
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE113:
.size url_content_type, .-url_content_type
.p2align 4
.type str_to_num, @function
str_to_num:
.LFB117:
.cfi_startproc
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov r12, rsi
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov rbp, rdi
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
sub rsp, 16
.cfi_def_cfa_offset 48
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
call __errno_location@PLT
mov edx, 10
mov rsi, rsp
mov rdi, rbp
mov DWORD PTR [rax], 0
mov rbx, rax
call strtoll@PLT
mov rdx, QWORD PTR [rsp]
xor r8d, r8d
cmp BYTE PTR [rdx], 0
jne .L35
movabs rdx, -9223372036854775808
cmp rax, rdx
je .L44
movabs rdx, 9223372036854775807
cmp rax, rdx
jne .L38
.L44:
cmp DWORD PTR [rbx], 34
je .L35
.L38:
mov QWORD PTR [r12], rax
mov r8d, 1
.L35:
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L45
add rsp, 16
.cfi_remember_state
.cfi_def_cfa_offset 32
mov eax, r8d
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L45:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE117:
.size str_to_num, .-str_to_num
.p2align 4
.type poll_send_reply, @function
poll_send_reply:
.LFB150:
.cfi_startproc
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
mov rbx, rdi
sub rsp, 24
.cfi_def_cfa_offset 64
mov r13, QWORD PTR 216[rdi]
mov r12, QWORD PTR 208[rdi]
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
mov eax, DWORD PTR 176[rdi]
mov rbp, QWORD PTR 200[rdi]
sub r12, r13
test eax, eax
jne .L47
lea rsi, 0[rbp+r13]
add rsi, QWORD PTR 184[rdi]
mov edi, DWORD PTR 16[rdi]
mov rdx, r12
xor ecx, ecx
call send@PLT
mov rdx, QWORD PTR now[rip]
mov QWORD PTR 40[rbx], rdx
test rax, rax
jle .L55
.L49:
mov rdx, QWORD PTR 216[rbx]
add QWORD PTR 224[rbx], rax
add QWORD PTR total_out[rip], rax
add rdx, rax
mov QWORD PTR 216[rbx], rdx
cmp rdx, QWORD PTR 208[rbx]
je .L56
.L46:
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L57
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 40
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L56:
.cfi_restore_state
mov DWORD PTR 48[rbx], 3
jmp .L46
.p2align 4,,10
.p2align 3
.L47:
call __errno_location@PLT
add rbp, r13
mov ecx, 1048576
mov rdx, rsp
mov DWORD PTR [rax], 0
cmp r12, 1048576
mov esi, DWORD PTR 196[rbx]
mov edi, DWORD PTR 16[rbx]
cmovbe rcx, r12
mov QWORD PTR [rsp], rbp
call sendfile64@PLT
mov rdx, QWORD PTR now[rip]
mov QWORD PTR 40[rbx], rdx
test rax, rax
jg .L49
.L55:
cmp rax, -1
jne .L50
call __errno_location@PLT
cmp DWORD PTR [rax], 11
je .L46
.L50:
mov DWORD PTR 172[rbx], 1
mov DWORD PTR 48[rbx], 3
jmp .L46
.L57:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE150:
.size poll_send_reply, .-poll_send_reply
.p2align 4
.type poll_send_header, @function
poll_send_header:
.LFB148:
.cfi_startproc
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rsi, QWORD PTR 152[rdi]
mov rbp, rdi
xor ecx, ecx
mov rdx, QWORD PTR 144[rdi]
sub rdx, rsi
add rsi, QWORD PTR 136[rdi]
mov edi, DWORD PTR 16[rdi]
call send@PLT
mov rdx, QWORD PTR now[rip]
mov QWORD PTR 40[rbp], rdx
test rax, rax
jle .L65
mov rdx, QWORD PTR 152[rbp]
add QWORD PTR 224[rbp], rax
add QWORD PTR total_out[rip], rax
add rdx, rax
mov QWORD PTR 152[rbp], rdx
cmp rdx, QWORD PTR 144[rbp]
je .L66
.L58:
pop rbp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L66:
.cfi_restore_state
mov eax, DWORD PTR 164[rbp]
test eax, eax
je .L63
mov DWORD PTR 48[rbp], 3
pop rbp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L65:
.cfi_restore_state
cmp rax, -1
jne .L60
call __errno_location@PLT
cmp DWORD PTR [rax], 11
je .L58
.L60:
mov DWORD PTR 172[rbp], 1
mov DWORD PTR 48[rbp], 3
pop rbp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L63:
.cfi_restore_state
mov DWORD PTR 48[rbp], 2
mov rdi, rbp
pop rbp
.cfi_def_cfa_offset 8
jmp poll_send_reply
.cfi_endproc
.LFE148:
.size poll_send_header, .-poll_send_header
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "can't reallocate %zu bytes"
.text
.p2align 4
.type xrealloc.part.0, @function
xrealloc.part.0:
.LFB161:
.cfi_startproc
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
lea rsi, .LC0[rip]
xor eax, eax
mov rdx, rdi
sub rsp, 8
.cfi_def_cfa_offset 16
mov edi, 1
call errx@PLT
.cfi_endproc
.LFE161:
.size xrealloc.part.0, .-xrealloc.part.0
.section .rodata.str1.1
.LC1:
.string "number \"%s\" is invalid"
.text
.p2align 4
.type xstr_to_num, @function
xstr_to_num:
.LFB118:
.cfi_startproc
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov r12, rdi
sub rsp, 16
.cfi_def_cfa_offset 32
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
mov rsi, rsp
call str_to_num
test eax, eax
je .L73
mov rax, QWORD PTR [rsp]
mov rcx, QWORD PTR 8[rsp]
sub rcx, QWORD PTR fs:40
jne .L74
add rsp, 16
.cfi_remember_state
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L73:
.cfi_restore_state
mov rdx, r12
lea rsi, .LC1[rip]
mov edi, 1
call errx@PLT
.L74:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE118:
.size xstr_to_num, .-xstr_to_num
.p2align 4
.type get_address_text, @function
get_address_text:
.LFB114:
.cfi_startproc
mov eax, DWORD PTR inet6[rip]
mov rsi, rdi
test eax, eax
jne .L79
mov edi, DWORD PTR [rdi]
jmp inet_ntoa@PLT
.p2align 4,,10
.p2align 3
.L79:
sub rsp, 8
.cfi_def_cfa_offset 16
mov ecx, 46
mov edi, 10
lea rdx, text_addr.2[rip]
call inet_ntop@PLT
lea rax, text_addr.2[rip]
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE114:
.size get_address_text, .-get_address_text
.section .rodata.str1.1
.LC2:
.string "close()"
.text
.p2align 4
.type xclose.part.0, @function
xclose.part.0:
.LFB164:
.cfi_startproc
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
lea rsi, .LC2[rip]
mov edi, 1
xor eax, eax
sub rsp, 8
.cfi_def_cfa_offset 16
call err@PLT
.cfi_endproc
.LFE164:
.size xclose.part.0, .-xclose.part.0
.p2align 4
.type xclose, @function
xclose:
.LFB91:
.cfi_startproc
sub rsp, 8
.cfi_def_cfa_offset 16
call close@PLT
cmp eax, -1
je .L87
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L87:
.cfi_restore_state
call xclose.part.0
.cfi_endproc
.LFE91:
.size xclose, .-xclose
.section .rodata.str1.1
.LC3:
.string "unlink(pidfile) failed"
.text
.p2align 4
.type pidfile_remove, @function
pidfile_remove:
.LFB154:
.cfi_startproc
sub rsp, 8
.cfi_def_cfa_offset 16
mov rdi, QWORD PTR pidfile_name[rip]
call unlink@PLT
cmp eax, -1
je .L91
mov edi, DWORD PTR pidfile_fd[rip]
call xclose
mov DWORD PTR pidfile_fd[rip], -1
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L91:
.cfi_restore_state
lea rsi, .LC3[rip]
mov edi, 1
xor eax, eax
call err@PLT
.cfi_endproc
.LFE154:
.size pidfile_remove, .-pidfile_remove
.p2align 4
.type appendl, @function
appendl:
.LFB98:
.cfi_startproc
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
mov r13, rsi
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov r12, rdx
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
mov rbx, rdi
sub rsp, 8
.cfi_def_cfa_offset 48
mov rdx, QWORD PTR [rdi]
mov rbp, QWORD PTR 8[rdi]
mov rdi, QWORD PTR 16[rdi]
lea rax, [rdx+r12]
cmp rbp, rax
jb .L94
.L93:
add rdi, rdx
mov rsi, r13
mov rdx, r12
call memcpy@PLT
add QWORD PTR [rbx], r12
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 40
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L94:
.cfi_restore_state
add rbp, 4096
cmp rbp, rax
jb .L94
mov QWORD PTR 8[rbx], rbp
mov rsi, rbp
call realloc@PLT
mov rdi, rax
test rax, rax
je .L98
mov QWORD PTR 16[rbx], rax
mov rdx, QWORD PTR [rbx]
jmp .L93
.L98:
mov rdi, rbp
call xrealloc.part.0
.cfi_endproc
.LFE98:
.size appendl, .-appendl
.section .rodata.str1.1
.LC4:
.string "out of memory in vasprintf()"
.text
.p2align 4
.type xasprintf, @function
xasprintf:
.LFB96:
.cfi_startproc
sub rsp, 216
.cfi_def_cfa_offset 224
mov r10, rsi
mov QWORD PTR 48[rsp], rdx
mov QWORD PTR 56[rsp], rcx
mov QWORD PTR 64[rsp], r8
mov QWORD PTR 72[rsp], r9
test al, al
je .L100
movaps XMMWORD PTR 80[rsp], xmm0
movaps XMMWORD PTR 96[rsp], xmm1
movaps XMMWORD PTR 112[rsp], xmm2
movaps XMMWORD PTR 128[rsp], xmm3
movaps XMMWORD PTR 144[rsp], xmm4
movaps XMMWORD PTR 160[rsp], xmm5
movaps XMMWORD PTR 176[rsp], xmm6
movaps XMMWORD PTR 192[rsp], xmm7
.L100:
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
lea rax, 224[rsp]
mov rcx, rsp
mov rdx, r10
mov QWORD PTR 8[rsp], rax
mov esi, 1
lea rax, 32[rsp]
mov DWORD PTR [rsp], 16
mov DWORD PTR 4[rsp], 48
mov QWORD PTR 16[rsp], rax
call __vasprintf_chk@PLT
cmp eax, -1
je .L104
mov rdx, QWORD PTR 24[rsp]
sub rdx, QWORD PTR fs:40
jne .L105
add rsp, 216
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L104:
.cfi_restore_state
lea rsi, .LC4[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L105:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE96:
.size xasprintf, .-xasprintf
.section .rodata.str1.1
.LC5:
.string "%10llu\n"
.text
.p2align 4
.type appendf.constprop.0, @function
appendf.constprop.0:
.LFB167:
.cfi_startproc
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rdi
sub rsp, 224
.cfi_def_cfa_offset 240
mov QWORD PTR 64[rsp], rdx
mov QWORD PTR 72[rsp], rcx
mov QWORD PTR 80[rsp], r8
mov QWORD PTR 88[rsp], r9
test al, al
je .L107
movaps XMMWORD PTR 96[rsp], xmm0
movaps XMMWORD PTR 112[rsp], xmm1
movaps XMMWORD PTR 128[rsp], xmm2
movaps XMMWORD PTR 144[rsp], xmm3
movaps XMMWORD PTR 160[rsp], xmm4
movaps XMMWORD PTR 176[rsp], xmm5
movaps XMMWORD PTR 192[rsp], xmm6
movaps XMMWORD PTR 208[rsp], xmm7
.L107:
mov rax, QWORD PTR fs:40
mov QWORD PTR 40[rsp], rax
xor eax, eax
lea rax, 240[rsp]
lea rcx, 16[rsp]
mov esi, 1
mov QWORD PTR 24[rsp], rax
lea rdi, 8[rsp]
lea rax, 48[rsp]
lea rdx, .LC5[rip]
mov DWORD PTR 16[rsp], 16
mov DWORD PTR 20[rsp], 48
mov QWORD PTR 32[rsp], rax
call __vasprintf_chk@PLT
cmp eax, -1
je .L111
mov rsi, QWORD PTR 8[rsp]
mov edx, eax
mov rdi, rbp
call appendl
mov rdi, QWORD PTR 8[rsp]
call free@PLT
mov rax, QWORD PTR 40[rsp]
sub rax, QWORD PTR fs:40
jne .L112
add rsp, 224
.cfi_remember_state
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
ret
.L111:
.cfi_restore_state
lea rsi, .LC4[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L112:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE167:
.size appendf.constprop.0, .-appendf.constprop.0
.section .rodata.str1.1
.LC6:
.string "can't allocate %zu bytes"
.text
.p2align 4
.type xstrdup, @function
xstrdup:
.LFB94:
.cfi_startproc
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov rbp, rdi
sub rsp, 8
.cfi_def_cfa_offset 32
call strlen@PLT
lea r12, 1[rax]
mov rdi, r12
call malloc@PLT
test rax, rax
je .L116
mov rdx, r12
mov rsi, rbp
mov rdi, rax
call memcpy@PLT
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L116:
.cfi_restore_state
mov rdx, r12
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.cfi_endproc
.LFE94:
.size xstrdup, .-xstrdup
.p2align 4
.type parse_mimetype_line, @function
parse_mimetype_line:
.LFB108:
.cfi_startproc
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov rbp, rdi
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 56
.cfi_def_cfa_offset 112
movzx edx, BYTE PTR [rdi]
cmp dl, 32
je .L140
cmp dl, 9
jne .L138
.L140:
xor eax, eax
.p2align 4,,10
.p2align 3
.L157:
lea ecx, 1[rax]
lea rsi, 0[rbp+rcx]
mov rax, rcx
movzx edx, BYTE PTR [rsi]
mov QWORD PTR 24[rsp], rsi
cmp dl, 32
je .L157
cmp dl, 9
je .L157
.L118:
test dl, dl
je .L117
cmp dl, 35
je .L117
lea r13d, 1[rax]
movzx edx, BYTE PTR 0[rbp+r13]
mov rax, r13
cmp dl, 9
je .L122
cmp dl, 32
jne .L123
jmp .L122
.p2align 4,,10
.p2align 3
.L165:
lea r13d, 1[rax]
movzx edx, BYTE PTR 0[rbp+r13]
mov rax, r13
cmp dl, 32
je .L122
cmp dl, 9
je .L122
.L123:
test dl, dl
jne .L165
.L117:
add rsp, 56
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L122:
.cfi_restore_state
mov rbx, r13
sub rbx, rcx
mov QWORD PTR 32[rsp], rbx
cmp dl, 32
je .L126
.p2align 4,,10
.p2align 3
.L170:
cmp dl, 9
je .L126
test dl, dl
jne .L127
jmp .L117
.p2align 4,,10
.p2align 3
.L166:
cmp dl, 9
je .L141
.L127:
lea r15d, 1[rax]
mov r14d, eax
lea rbx, 0[rbp+r15]
mov rax, r15
movzx edx, BYTE PTR [rbx]
test dl, -33
jne .L166
.L141:
mov rax, QWORD PTR 32[rsp]
lea rdx, 1[rax]
mov rdi, rdx
mov QWORD PTR 8[rsp], rdx
call malloc@PLT
mov rdx, QWORD PTR 8[rsp]
test rax, rax
mov QWORD PTR 16[rsp], rax
je .L167
mov r12, QWORD PTR 16[rsp]
mov rdx, QWORD PTR 32[rsp]
sub r15, r13
mov rsi, QWORD PTR 24[rsp]
mov rdi, r12
call memcpy@PLT
mov rcx, QWORD PTR 32[rsp]
lea r8, 1[r15]
mov rdi, r8
mov QWORD PTR 8[rsp], r8
mov BYTE PTR [r12+rcx], 0
call malloc@PLT
mov r8, QWORD PTR 8[rsp]
test rax, rax
mov r12, rax
je .L168
lea rsi, 0[rbp+r13]
mov rdx, r15
mov rdi, rax
call memcpy@PLT
mov BYTE PTR [r12+r15], 0
mov rdi, r12
call strlen@PLT
cmp rax, QWORD PTR longest_ext[rip]
jbe .L131
mov QWORD PTR longest_ext[rip], rax
.L131:
mov rax, QWORD PTR mime_map_size[rip]
mov r13, QWORD PTR mime_map[rip]
mov QWORD PTR 8[rsp], rax
mov QWORD PTR 40[rsp], r13
test rax, rax
je .L139
xor r15d, r15d
jmp .L135
.p2align 4,,10
.p2align 3
.L133:
add r15, 1
add r13, 16
cmp r15, QWORD PTR 8[rsp]
je .L169
.L135:
mov rdi, QWORD PTR 0[r13]
mov rsi, r12
call strcmp@PLT
test eax, eax
jne .L133
mov rdi, QWORD PTR 8[r13]
call free@PLT
mov rdi, QWORD PTR 16[rsp]
call xstrdup
mov QWORD PTR 8[r13], rax
.L134:
mov rdi, QWORD PTR 16[rsp]
call free@PLT
mov rdi, r12
call free@PLT
cmp BYTE PTR [rbx], 0
je .L117
lea eax, 2[r14]
.L137:
mov r13d, eax
movzx edx, BYTE PTR 0[rbp+r13]
cmp dl, 32
jne .L170
.L126:
add eax, 1
jmp .L137
.p2align 4,,10
.p2align 3
.L169:
lea rdx, 1[r15]
mov r13, rdx
sal r13, 4
.L132:
mov rdi, QWORD PTR 40[rsp]
mov rsi, r13
mov QWORD PTR mime_map_size[rip], rdx
call realloc@PLT
test rax, rax
je .L171
mov rdi, r12
lea r13, -16[rax+r13]
mov QWORD PTR mime_map[rip], rax
call xstrdup
mov rdi, QWORD PTR 16[rsp]
mov QWORD PTR 0[r13], rax
call xstrdup
mov QWORD PTR 8[r13], rax
jmp .L134
.L138:
mov QWORD PTR 24[rsp], rdi
xor eax, eax
xor ecx, ecx
jmp .L118
.L139:
mov r13d, 16
mov edx, 1
jmp .L132
.L171:
mov rdi, r13
call xrealloc.part.0
.L167:
lea rsi, .LC6[rip]
mov edi, 1
call errx@PLT
.L168:
mov rdx, r8
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.cfi_endproc
.LFE108:
.size parse_mimetype_line, .-parse_mimetype_line
.p2align 4
.type parse_field, @function
parse_field:
.LFB135:
.cfi_startproc
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
mov r13, rsi
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
mov rbp, QWORD PTR 56[rdi]
mov rbx, rdi
mov rdi, rbp
call strstr@PLT
mov r12, rax
test rax, rax
je .L172
mov rdi, r13
sub r12, rbp
mov r14d, 1
call strlen@PLT
mov rcx, QWORD PTR 64[rbx]
xor ebx, ebx
lea r13, [r12+rax]
mov rax, r13
cmp r13, rcx
jb .L174
jmp .L175
.p2align 4,,10
.p2align 3
.L190:
cmp dl, 13
je .L180
add rax, 1
cmp rax, rcx
je .L180
.L174:
movzx edx, BYTE PTR 0[rbp+rax]
cmp dl, 10
jne .L190
.L180:
sub rax, r13
mov rbx, rax
lea r14, 1[rax]
.L175:
mov rdi, r14
call malloc@PLT
mov r12, rax
test rax, rax
je .L191
lea rsi, 0[rbp+r13]
mov rdx, rbx
mov rdi, rax
call memcpy@PLT
mov BYTE PTR [r12+rbx], 0
.L172:
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 40
mov rax, r12
pop rbp
.cfi_def_cfa_offset 32
pop r12
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
ret
.L191:
.cfi_restore_state
mov rdx, r14
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.cfi_endproc
.LFE135:
.size parse_field, .-parse_field
.section .rodata.str1.1
.LC7:
.string ""
.LC8:
.string "Connection: close\r\n"
.LC9:
.string "%a, %d %b %Y %H:%M:%S GMT"
.LC10:
.string "strftime() failed [%s]"
.LC11:
.string "Generated by %s on %s\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC12:
.string "<html><head><title>301 Moved Permanently</title></head><body>\n<h1>Moved Permanently</h1>\nMoved to: <a href=\"%s\">%s</a>\n<hr>\n%s</body></html>\n"
.align 8
.LC13:
.string "HTTP/1.1 301 Moved Permanently\r\nDate: %s\r\n%sLocation: %s\r\n%sContent-Length: %llu\r\nContent-Type: text/html; charset=UTF-8\r\n\r\n"
.text
.p2align 4
.type redirect, @function
redirect:
.LFB134:
.cfi_startproc
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov r10, rsi
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
mov rbx, rdi
sub rsp, 280
.cfi_def_cfa_offset 304
mov QWORD PTR 112[rsp], rdx
mov QWORD PTR 120[rsp], rcx
mov QWORD PTR 128[rsp], r8
mov QWORD PTR 136[rsp], r9
test al, al
je .L193
movaps XMMWORD PTR 144[rsp], xmm0
movaps XMMWORD PTR 160[rsp], xmm1
movaps XMMWORD PTR 176[rsp], xmm2
movaps XMMWORD PTR 192[rsp], xmm3
movaps XMMWORD PTR 208[rsp], xmm4
movaps XMMWORD PTR 224[rsp], xmm5
movaps XMMWORD PTR 240[rsp], xmm6
movaps XMMWORD PTR 256[rsp], xmm7
.L193:
mov rax, QWORD PTR fs:40
mov QWORD PTR 88[rsp], rax
xor eax, eax
lea rcx, 24[rsp]
lea rdi, 8[rsp]
mov rdx, r10
lea rax, 304[rsp]
mov esi, 1
mov DWORD PTR 24[rsp], 16
mov QWORD PTR 32[rsp], rax
lea rax, 96[rsp]
mov DWORD PTR 28[rsp], 48
mov QWORD PTR 40[rsp], rax
call __vasprintf_chk@PLT
cmp eax, -1
je .L202
mov rax, QWORD PTR now[rip]
lea rdi, 16[rsp]
lea r12, 48[rsp]
mov QWORD PTR 16[rsp], rax
call gmtime@PLT
lea rdx, .LC9[rip]
mov esi, 30
mov rdi, r12
mov rcx, rax
call strftime@PLT
test rax, rax
je .L203
mov r9d, DWORD PTR want_server_id[rip]
lea r8, .LC7[rip]
test r9d, r9d
je .L196
sub rsp, 8
.cfi_def_cfa_offset 312
mov esi, 72
mov ecx, 72
xor eax, eax
push r12
.cfi_def_cfa_offset 320
lea r8, .LC11[rip]
lea rdi, _generated_on_buf[rip]
mov edx, 1
lea r9, pkgname[rip]
call __snprintf_chk@PLT
pop rsi
.cfi_def_cfa_offset 312
lea r8, _generated_on_buf[rip]
pop rdi
.cfi_def_cfa_offset 304
.L196:
mov rdx, QWORD PTR 8[rsp]
lea rsi, .LC12[rip]
lea rdi, 184[rbx]
xor eax, eax
mov rcx, rdx
call xasprintf
mov ecx, DWORD PTR 172[rbx]
lea r9, .LC8[rip]
mov esi, eax
mov eax, eax
mov QWORD PTR 208[rbx], rsi
test ecx, ecx
je .L204
.L197:
sub rsp, 8
.cfi_def_cfa_offset 312
mov rcx, QWORD PTR server_hdr[rip]
mov rdx, r12
lea rdi, 136[rbx]
push rax
.cfi_def_cfa_offset 320
mov r8, QWORD PTR 24[rsp]
lea rsi, .LC13[rip]
xor eax, eax
call xasprintf
mov rdi, QWORD PTR 24[rsp]
mov eax, eax
mov QWORD PTR 144[rbx], rax
call free@PLT
pop rax
.cfi_def_cfa_offset 312
pop rdx
.cfi_def_cfa_offset 304
mov DWORD PTR 176[rbx], 0
mov DWORD PTR 168[rbx], 301
mov rax, QWORD PTR 88[rsp]
sub rax, QWORD PTR fs:40
jne .L205
add rsp, 280
.cfi_remember_state
.cfi_def_cfa_offset 24
pop rbx
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L204:
.cfi_restore_state
mov r9, QWORD PTR keep_alive_field[rip]
jmp .L197
.L205:
call __stack_chk_fail@PLT
.L203:
mov rdx, r12
lea rsi, .LC10[rip]
mov edi, 1
call errx@PLT
.L202:
lea rsi, .LC4[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.cfi_endproc
.LFE134:
.size redirect, .-redirect
.section .rodata.str1.8
.align 8
.LC14:
.string "<html><head><title>%d %s</title></head><body>\n<h1>%s</h1>\n%s\n<hr>\n%s</body></html>\n"
.align 8
.LC15:
.string "HTTP/1.1 %d %s\r\nDate: %s\r\n%sAccept-Ranges: bytes\r\n%sContent-Length: %llu\r\nContent-Type: text/html; charset=UTF-8\r\n\r\n"
.text
.p2align 4
.type default_reply, @function
default_reply:
.LFB133:
.cfi_startproc
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov r12, rdx
mov rdx, rcx
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
mov ebp, esi
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
mov rbx, rdi
sub rsp, 280
.cfi_def_cfa_offset 320
mov QWORD PTR 128[rsp], r8
mov QWORD PTR 136[rsp], r9
test al, al
je .L207
movaps XMMWORD PTR 144[rsp], xmm0
movaps XMMWORD PTR 160[rsp], xmm1
movaps XMMWORD PTR 176[rsp], xmm2
movaps XMMWORD PTR 192[rsp], xmm3
movaps XMMWORD PTR 208[rsp], xmm4
movaps XMMWORD PTR 224[rsp], xmm5
movaps XMMWORD PTR 240[rsp], xmm6
movaps XMMWORD PTR 256[rsp], xmm7
.L207:
mov rax, QWORD PTR fs:40
mov QWORD PTR 88[rsp], rax
xor eax, eax
lea rcx, 24[rsp]
lea rdi, 8[rsp]
mov esi, 1
lea rax, 320[rsp]
mov DWORD PTR 24[rsp], 32
mov QWORD PTR 32[rsp], rax
lea rax, 96[rsp]
mov DWORD PTR 28[rsp], 48
mov QWORD PTR 40[rsp], rax
call __vasprintf_chk@PLT
cmp eax, -1
je .L216
mov rax, QWORD PTR now[rip]
lea rdi, 16[rsp]
lea r13, 48[rsp]
mov QWORD PTR 16[rsp], rax
call gmtime@PLT
lea rdx, .LC9[rip]
mov esi, 30
mov rdi, r13
mov rcx, rax
call strftime@PLT
test rax, rax
je .L217
mov r10d, DWORD PTR want_server_id[rip]
lea rax, .LC7[rip]
test r10d, r10d
je .L210
sub rsp, 8
.cfi_def_cfa_offset 328
mov ecx, 72
mov edx, 1
xor eax, eax
push r13
.cfi_def_cfa_offset 336
lea r9, pkgname[rip]
lea r8, .LC11[rip]
mov esi, 72
lea rdi, _generated_on_buf[rip]
call __snprintf_chk@PLT
pop r8
.cfi_def_cfa_offset 328
lea rax, _generated_on_buf[rip]
pop r9
.cfi_def_cfa_offset 320
.L210:
sub rsp, 8
.cfi_def_cfa_offset 328
mov rcx, r12
mov edx, ebp
mov r8, r12
push rax
.cfi_def_cfa_offset 336
mov r9, QWORD PTR 24[rsp]
lea rsi, .LC14[rip]
xor eax, eax
lea rdi, 184[rbx]
call xasprintf
mov rdi, QWORD PTR 24[rsp]
mov eax, eax
mov QWORD PTR 208[rbx], rax
call free@PLT
mov edi, DWORD PTR 172[rbx]
pop rcx
.cfi_def_cfa_offset 328
lea rax, .LC8[rip]
mov rdx, QWORD PTR 208[rbx]
pop rsi
.cfi_def_cfa_offset 320
test edi, edi
je .L218
.L211:
push rdx
.cfi_def_cfa_offset 328
mov r9, QWORD PTR server_hdr[rip]
mov edx, ebp
mov r8, r13
push rax
.cfi_def_cfa_offset 336
lea rdi, 136[rbx]
mov rcx, r12
xor eax, eax
lea rsi, .LC15[rip]
call xasprintf
mov DWORD PTR 168[rbx], ebp
mov DWORD PTR 176[rbx], 0
mov eax, eax
mov QWORD PTR 144[rbx], rax
pop rax
.cfi_def_cfa_offset 328
pop rdx
.cfi_def_cfa_offset 320
mov rax, QWORD PTR 88[rsp]
sub rax, QWORD PTR fs:40
jne .L219
add rsp, 280
.cfi_remember_state
.cfi_def_cfa_offset 40
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L218:
.cfi_restore_state
mov rax, QWORD PTR keep_alive_field[rip]
jmp .L211
.L219:
call __stack_chk_fail@PLT
.L217:
mov rdx, r13
lea rsi, .LC10[rip]
mov edi, 1
call errx@PLT
.L216:
lea rsi, .LC4[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.cfi_endproc
.LFE133:
.size default_reply, .-default_reply
.section .rodata.str1.8
.align 8
.LC16:
.string "%lu %s \"%s %s\" %d %llu \"%s\" \"%s\"\n"
.text
.p2align 4
.type free_connection, @function
free_connection:
.LFB125:
.cfi_startproc
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov rbx, rdi
sub rsp, 56
.cfi_def_cfa_offset 112
mov r13, QWORD PTR logfile[rip]
test r13, r13
je .L222
mov esi, DWORD PTR 168[rdi]
test esi, esi
je .L222
mov rbp, QWORD PTR 72[rdi]
test rbp, rbp
je .L222
mov rdi, rbp
call strlen@PLT
lea r14, 1[rax+rax*2]
mov rdi, r14
call malloc@PLT
mov r12, rax
test rax, rax
je .L305
mov rdi, rbp
mov rsi, rax
call logencode
mov rbp, QWORD PTR 80[rbx]
test rbp, rbp
je .L225
mov rdi, rbp
call strlen@PLT
lea r14, 1[rax+rax*2]
mov rdi, r14
call malloc@PLT
mov r11, rax
test rax, rax
je .L305
mov rdi, rbp
mov rsi, rax
mov rbp, r11
call logencode
.L225:
mov r14, QWORD PTR 88[rbx]
test r14, r14
je .L227
mov rdi, r14
call strlen@PLT
lea r15, 1[rax+rax*2]
mov rdi, r15
call malloc@PLT
mov QWORD PTR 8[rsp], rax
test rax, rax
je .L306
mov r15, QWORD PTR 8[rsp]
mov rdi, r14
mov rsi, r15
call logencode
mov r14, QWORD PTR 96[rbx]
lea r9, .LC7[rip]
test r14, r14
je .L230
mov rdi, r14
call strlen@PLT
lea rdx, 1[rax+rax*2]
mov rdi, rdx
mov QWORD PTR 16[rsp], rdx
call malloc@PLT
mov rdx, QWORD PTR 16[rsp]
test rax, rax
mov r9, rax
je .L247
mov rsi, r9
mov rdi, r14
mov QWORD PTR 16[rsp], r9
call logencode
mov r9, QWORD PTR 16[rsp]
mov r15, QWORD PTR 8[rsp]
mov r14, r9
.L230:
mov rax, QWORD PTR 224[rbx]
test rbp, rbp
lea rsi, 20[rbx]
mov ecx, DWORD PTR inet6[rip]
mov r11d, DWORD PTR 168[rbx]
mov QWORD PTR 40[rsp], r9
mov QWORD PTR 16[rsp], rax
lea rax, .LC7[rip]
cmovne rax, rbp
test ecx, ecx
mov DWORD PTR 36[rsp], r11d
mov QWORD PTR 24[rsp], rax
je .L232
mov ecx, 46
lea rdx, text_addr.2[rip]
mov edi, 10
call inet_ntop@PLT
mov r11d, DWORD PTR 36[rsp]
mov r9, QWORD PTR 40[rsp]
lea r8, text_addr.2[rip]
.L233:
sub rsp, 8
.cfi_def_cfa_offset 120
mov rcx, QWORD PTR now[rip]
mov rdi, r13
xor eax, eax
push r9
.cfi_def_cfa_offset 128
lea rdx, .LC16[rip]
mov r9, r12
mov esi, 1
push QWORD PTR 24[rsp]
.cfi_def_cfa_offset 136
push QWORD PTR 40[rsp]
.cfi_def_cfa_offset 144
push r11
.cfi_def_cfa_offset 152
push QWORD PTR 64[rsp]
.cfi_def_cfa_offset 160
call __fprintf_chk@PLT
mov rdi, QWORD PTR logfile[rip]
add rsp, 48
.cfi_def_cfa_offset 112
call fflush@PLT
mov rdi, r12
call free@PLT
test rbp, rbp
je .L234
mov rdi, rbp
call free@PLT
.L234:
test r15, r15
je .L235
mov rdi, r15
call free@PLT
.L235:
test r14, r14
je .L222
mov rdi, r14
call free@PLT
.p2align 4,,10
.p2align 3
.L222:
mov edi, DWORD PTR 16[rbx]
cmp edi, -1
jne .L307
.L236:
mov rdi, QWORD PTR 56[rbx]
test rdi, rdi
je .L237
call free@PLT
.L237:
mov rdi, QWORD PTR 72[rbx]
test rdi, rdi
je .L238
call free@PLT
.L238:
mov rdi, QWORD PTR 80[rbx]
test rdi, rdi
je .L239
call free@PLT
.L239:
mov rdi, QWORD PTR 88[rbx]
test rdi, rdi
je .L240
call free@PLT
.L240:
mov rdi, QWORD PTR 96[rbx]
test rdi, rdi
je .L241
call free@PLT
.L241:
mov rdi, QWORD PTR 136[rbx]
test rdi, rdi
je .L242
mov edx, DWORD PTR 160[rbx]
test edx, edx
je .L308
.L242:
mov rdi, QWORD PTR 184[rbx]
test rdi, rdi
je .L243
mov eax, DWORD PTR 192[rbx]
test eax, eax
je .L309
.L243:
mov edi, DWORD PTR 196[rbx]
cmp edi, -1
jne .L310
.L220:
add rsp, 56
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L309:
.cfi_restore_state
call free@PLT
mov edi, DWORD PTR 196[rbx]
cmp edi, -1
je .L220
.L310:
call close@PLT
cmp eax, -1
jne .L220
.L245:
call xclose.part.0
.p2align 4,,10
.p2align 3
.L308:
call free@PLT
jmp .L242
.p2align 4,,10
.p2align 3
.L307:
call close@PLT
cmp eax, -1
jne .L236
jmp .L245
.p2align 4,,10
.p2align 3
.L227:
mov r15, QWORD PTR 96[rbx]
test r15, r15
je .L311
mov rdi, r15
call strlen@PLT
lea rdx, 1[rax+rax*2]
mov rdi, rdx
mov QWORD PTR 8[rsp], rdx
call malloc@PLT
mov rdx, QWORD PTR 8[rsp]
test rax, rax
mov r9, rax
jne .L312
.L247:
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.p2align 4,,10
.p2align 3
.L232:
mov edi, DWORD PTR 20[rbx]
call inet_ntoa@PLT
mov r9, QWORD PTR 40[rsp]
mov r11d, DWORD PTR 36[rsp]
mov r8, rax
jmp .L233
.p2align 4,,10
.p2align 3
.L311:
lea r9, .LC7[rip]
xor r14d, r14d
mov QWORD PTR 8[rsp], r9
jmp .L230
.p2align 4,,10
.p2align 3
.L312:
mov rsi, r9
mov rdi, r15
mov QWORD PTR 8[rsp], r9
xor r15d, r15d
call logencode
mov r9, QWORD PTR 8[rsp]
lea rax, .LC7[rip]
mov QWORD PTR 8[rsp], rax
mov r14, r9
jmp .L230
.L305:
mov rdx, r14
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L306:
mov rdx, r15
lea rsi, .LC6[rip]
mov edi, 1
call errx@PLT
.cfi_endproc
.LFE125:
.size free_connection, .-free_connection
.section .rodata.str1.8
.align 8
.LC17:
.string "You requested an invalid URL: %s"
.section .rodata.str1.1
.LC18:
.string "Bad Request"
.LC19:
.string "Host: "
.LC20:
.string "%s%s"
.LC21:
.string "%s%s%s"
.section .rodata.str1.8
.align 8
.LC22:
.string "The URL you requested (%s) was not found."
.section .rodata.str1.1
.LC23:
.string "Not Found"
.LC24:
.string "Couldn't list directory: %s"
.LC25:
.string "Internal Server Error"
.LC26:
.string "<html>\n<head>\n <title>"
.LC27:
.string "</title>\n</head>\n<body>\n<h1>"
.LC28:
.string "</h1>\n<tt><pre>\n"
.LC29:
.string "</pre></tt>\n<hr>\n"
.LC30:
.string "<a href=\""
.LC31:
.string "\">"
.LC32:
.string "</a>"
.LC33:
.string "/\n"
.LC34:
.string "</body>\n</html>\n"
.section .rodata.str1.8
.align 8
.LC35:
.string "HTTP/1.1 200 OK\r\nDate: %s\r\n%sAccept-Ranges: bytes\r\n%sContent-Length: %llu\r\nContent-Type: text/html; charset=UTF-8\r\n\r\n"
.align 8
.LC36:
.string "You don't have permission to access (%s)."
.section .rodata.str1.1
.LC37:
.string "Forbidden"
.section .rodata.str1.8
.align 8
.LC38:
.string "The URL you requested (%s) cannot be returned: %s."
.section .rodata.str1.1
.LC39:
.string "fstat() failed: %s."
.LC40:
.string "%s/"
.LC41:
.string "Not a regular file."
.LC42:
.string "If-Modified-Since: "
.section .rodata.str1.8
.align 8
.LC43:
.string "HTTP/1.1 304 Not Modified\r\nDate: %s\r\n%sAccept-Ranges: bytes\r\n%s\r\n"
.align 8
.LC44:
.string "You requested a range outside of the file."
.align 8
.LC45:
.string "Requested Range Not Satisfiable"
.align 8
.LC46:
.string "You requested a backward range."
.align 8
.LC47:
.string "HTTP/1.1 206 Partial Content\r\nDate: %s\r\n%sAccept-Ranges: bytes\r\n%sContent-Length: %llu\r\nContent-Range: bytes %llu-%llu/%llu\r\nContent-Type: %s\r\nLast-Modified: %s\r\n\r\n"
.align 8
.LC48:
.string "HTTP/1.1 200 OK\r\nDate: %s\r\n%sAccept-Ranges: bytes\r\n%sContent-Length: %llu\r\nContent-Type: %s\r\nLast-Modified: %s\r\n\r\n"
.text
.p2align 4
.type process_get, @function
process_get:
.LFB145:
.cfi_startproc
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
mov r12, rdi
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 1064
.cfi_def_cfa_offset 1120
mov rcx, QWORD PTR 80[rdi]
mov rax, QWORD PTR fs:40
mov QWORD PTR 1048[rsp], rax
xor eax, eax
mov rdi, rcx
mov QWORD PTR 8[rsp], rcx
call strlen@PLT
lea r13, 1[rax]
mov QWORD PTR [rsp], rax
mov rdi, r13
call malloc@PLT
test rax, rax
je .L515
mov rdx, QWORD PTR [rsp]
xor ebx, ebx
mov rcx, QWORD PTR 8[rsp]
mov rbp, rax
mov r13d, 1
test rdx, rdx
je .L518
mov rax, rdx
mov QWORD PTR 16[rsp], r12
mov rdx, rbp
mov r12, rcx
mov rbp, rax
jmp .L315
.p2align 4,,10
.p2align 3
.L317:
mov rbx, r15
mov BYTE PTR -1[rdx+r13], r14b
lea rax, 1[r13]
cmp rbp, rbx
jbe .L519
.L422:
mov r13, rax
.L315:
movzx r14d, BYTE PTR [r12+rbx]
lea r15, 1[rbx]
cmp r14b, 37
jne .L317
lea rsi, 2[rbx]
cmp rbp, rsi
mov QWORD PTR [rsp], rsi
jbe .L317
mov QWORD PTR 8[rsp], rdx
call __ctype_b_loc@PLT
movsx r8, BYTE PTR [r12+r15]
mov rdx, QWORD PTR 8[rsp]
mov rdi, QWORD PTR [rax]
mov rax, r8
test BYTE PTR 1[rdi+r8*2], 16
je .L317
mov rsi, QWORD PTR [rsp]
movsx r8, BYTE PTR [r12+rsi]
mov rsi, r8
test BYTE PTR 1[rdi+r8*2], 16
je .L317
lea edi, -65[rax]
cmp dil, 5
jbe .L520
lea r8d, -97[rax]
lea edi, -87[rax]
sal eax, 4
sal edi, 4
cmp r8b, 5
cmovbe eax, edi
lea edi, -65[rsi]
cmp dil, 5
ja .L321
.L537:
sub esi, 55
.L322:
add eax, esi
add rbx, 3
mov BYTE PTR -1[rdx+r13], al
lea rax, 1[r13]
cmp rbp, rbx
ja .L422
.p2align 4,,10
.p2align 3
.L519:
mov r12, QWORD PTR 16[rsp]
mov rbp, rdx
add r13, rdx
.L316:
mov BYTE PTR 0[r13], 0
movzx ecx, BYTE PTR 0[rbp]
test cl, cl
je .L345
mov rax, rbp
mov edx, ecx
jmp .L328
.p2align 4,,10
.p2align 3
.L326:
movzx edx, BYTE PTR 1[rax]
add rax, 1
test dl, dl
je .L327
.L328:
cmp dl, 63
jne .L326
mov BYTE PTR [rax], 0
movzx ecx, BYTE PTR 0[rbp]
.L327:
cmp cl, 47
jne .L345
xor edx, edx
xor eax, eax
xor edi, edi
jmp .L332
.p2align 4,,10
.p2align 3
.L522:
add rax, 1
cmp cl, 47
je .L330
mov BYTE PTR 0[rbp+rdx], cl
movzx ecx, BYTE PTR 0[rbp+rax]
lea rsi, 1[rdx]
test cl, cl
je .L521
.L329:
mov BYTE PTR 0[rbp+rsi], cl
xor edi, edi
cmp cl, 47
lea rdx, 1[rsi]
sete dil
add rax, 1
.L330:
movzx ecx, BYTE PTR 0[rbp+rax]
test cl, cl
je .L331
.L332:
test edi, edi
jne .L522
mov rsi, rdx
jmp .L329
.L521:
mov rdx, rsi
.L331:
mov BYTE PTR 0[rbp+rdx], 0
mov rdi, rbp
call strlen@PLT
mov rbx, rax
mov r15, rax
test rax, rax
je .L333
movzx eax, BYTE PTR -1[rbp+rax]
mov rdx, rbp
lea rsi, 0[rbp+rbx]
mov BYTE PTR 8[rsp], al
xor eax, eax
.L335:
xor ecx, ecx
cmp BYTE PTR [rdx], 47
sete cl
add rdx, 1
add eax, ecx
cmp rsi, rdx
jne .L335
mov r15d, eax
sal r15, 4
mov rdi, r15
call malloc@PLT
mov r14, rax
test rax, rax
je .L336
cmp rbx, 1
je .L338
xor esi, esi
mov edx, 1
.p2align 4,,10
.p2align 3
.L337:
mov rax, rdx
cmp rbx, rdx
ja .L347
jmp .L339
.p2align 4,,10
.p2align 3
.L340:
add rax, 1
cmp rbx, rax
je .L339
.L347:
cmp BYTE PTR 0[rbp+rax], 47
jne .L340
.L339:
lea rcx, 1[rdx]
lea rdi, 0[rbp+rdx]
cmp rcx, rax
je .L523
lea r8, 2[rdx]
cmp r8, rax
je .L524
.L343:
mov ecx, esi
add esi, 1
sal rcx, 4
add rcx, r14
mov QWORD PTR [rcx], rdi
mov rdi, rax
sub rdi, rdx
mov QWORD PTR 8[rcx], rdi
.L342:
lea rdx, 1[rax]
cmp rbx, rdx
ja .L337
test rsi, rsi
je .L338
sal rsi, 4
mov QWORD PTR [rsp], r12
mov r15, r14
xor r13d, r13d
lea rbx, [rsi+r14]
mov r12, rbx
jmp .L349
.p2align 4,,10
.p2align 3
.L348:
add rbx, QWORD PTR 8[r15]
add r15, 16
mov r13, rbx
cmp r12, r15
je .L525
.L349:
mov BYTE PTR 0[rbp+r13], 47
lea rbx, 1[r13]
mov rsi, QWORD PTR [r15]
lea rdi, 0[rbp+rbx]
cmp rdi, rsi
jnb .L348
mov rdx, QWORD PTR 8[r15]
add r15, 16
call memmove@PLT
add rbx, QWORD PTR -8[r15]
mov r13, rbx
cmp r12, r15
jne .L349
.L525:
mov rdi, r14
mov r12, QWORD PTR [rsp]
call free@PLT
cmp BYTE PTR 8[rsp], 47
je .L526
.L350:
mov rbx, QWORD PTR forward_map[rip]
mov BYTE PTR 0[rbp+r13], 0
test rbx, rbx
je .L417
lea rsi, .LC19[rip]
mov rdi, r12
call parse_field
mov r15, rax
test rax, rax
je .L417
mov r14, QWORD PTR forward_map_size[rip]
test r14, r14
je .L353
xor r13d, r13d
jmp .L356
.p2align 4,,10
.p2align 3
.L354:
add r13, 1
add rbx, 16
cmp r13, r14
je .L353
.L356:
mov rdi, QWORD PTR [rbx]
mov rsi, r15
call strcasecmp@PLT
test eax, eax
jne .L354
mov r13, QWORD PTR 8[rbx]
mov rdi, r15
call free@PLT
test r13, r13
je .L417
.L355:
xor eax, eax
mov rcx, rbp
mov rdx, r13
mov rdi, r12
lea rsi, .LC20[rip]
call redirect
mov rax, QWORD PTR 1048[rsp]
sub rax, QWORD PTR fs:40
jne .L516
.L396:
add rsp, 1064
.cfi_remember_state
.cfi_def_cfa_offset 56
mov rdi, rbp
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
jmp free@PLT
.L333:
.cfi_restore_state
xor edi, edi
call malloc@PLT
mov r14, rax
test rax, rax
jne .L338
.L336:
mov rdx, r15
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.p2align 4,,10
.p2align 3
.L523:
cmp BYTE PTR [rdi], 46
jne .L343
jmp .L342
.p2align 4,,10
.p2align 3
.L524:
cmp BYTE PTR [rdi], 46
jne .L343
cmp BYTE PTR 0[rbp+rcx], 46
jne .L343
test esi, esi
je .L527
sub esi, 1
jmp .L342
.L353:
mov rdi, r15
call free@PLT
.L417:
mov r13, QWORD PTR forward_all_url[rip]
test r13, r13
jne .L355
mov rdi, rbp
call strlen@PLT
mov r13, QWORD PTR wwwroot[rip]
cmp BYTE PTR -1[rbp+rax], 47
je .L528
lea rdi, 64[rsp]
mov rcx, rbp
mov rdx, r13
xor eax, eax
lea rsi, .LC20[rip]
call xasprintf
mov rdi, rbp
call url_content_type
mov QWORD PTR [rsp], rax
.L362:
mov rdi, rbp
call free@PLT
mov rdi, QWORD PTR 64[rsp]
mov esi, 2048
xor eax, eax
call open64@PLT
mov rdi, QWORD PTR 64[rsp]
mov DWORD PTR 196[r12], eax
call free@PLT
mov esi, DWORD PTR 196[r12]
cmp esi, -1
je .L529
lea rdx, 96[rsp]
mov edi, 1
call __fxstat64@PLT
cmp eax, -1
je .L530
mov eax, DWORD PTR 120[rsp]
and eax, 61440
cmp eax, 16384
je .L531
cmp eax, 32768
jne .L532
mov rax, QWORD PTR 184[rsp]
lea r13, 88[rsp]
mov DWORD PTR 176[r12], 1
lea rbx, 272[rsp]
mov rdi, r13
mov QWORD PTR 88[rsp], rax
call gmtime@PLT
lea rdx, .LC9[rip]
mov esi, 30
mov rdi, rbx
mov rcx, rax
call strftime@PLT
test rax, rax
je .L533
lea rsi, .LC42[rip]
mov rdi, r12
call parse_field
mov rbp, rax
test rax, rax
je .L404
mov rsi, rbx
mov rdi, rax
call strcmp@PLT
test eax, eax
je .L534
.L404:
mov rdi, rbp
call free@PLT
cmp QWORD PTR 120[r12], 0
mov rbp, QWORD PTR 144[rsp]
je .L535
cmp QWORD PTR 128[r12], 0
mov r14, QWORD PTR 104[r12]
lea r15, -1[rbp]
je .L411
mov r15, QWORD PTR 112[r12]
lea rax, -1[rbp]
cmp r15, rbp
cmovge r15, rax
.L411:
lea rcx, .LC44[rip]
cmp r14, rbp
jge .L514
cmp r14, r15
jg .L536
mov r9, r15
mov esi, DWORD PTR 172[r12]
mov QWORD PTR 200[r12], r14
lea r8, .LC8[rip]
sub r9, r14
add r9, 1
mov QWORD PTR 208[r12], r9
test esi, esi
jne .L414
mov r8, QWORD PTR keep_alive_field[rip]
.L414:
mov r11, QWORD PTR server_hdr[rip]
lea rdi, 80[rsp]
mov QWORD PTR 24[rsp], r8
lea r13, 240[rsp]
mov rax, QWORD PTR now[rip]
mov QWORD PTR 16[rsp], r9
mov QWORD PTR 8[rsp], r11
mov QWORD PTR 80[rsp], rax
call gmtime@PLT
lea rdx, .LC9[rip]
mov esi, 30
mov rdi, r13
mov rcx, rax
call strftime@PLT
test rax, rax
je .L415
sub rsp, 8
.cfi_def_cfa_offset 1128
mov rdx, r13
lea rsi, .LC47[rip]
xor eax, eax
push rbx
.cfi_def_cfa_offset 1136
lea rdi, 136[r12]
push QWORD PTR 16[rsp]
.cfi_def_cfa_offset 1144
push rbp
.cfi_def_cfa_offset 1152
push r15
.cfi_def_cfa_offset 1160
push r14
.cfi_def_cfa_offset 1168
mov r11, QWORD PTR 56[rsp]
mov r9, QWORD PTR 64[rsp]
mov r8, QWORD PTR 72[rsp]
mov rcx, r11
call xasprintf
add rsp, 48
.cfi_def_cfa_offset 1120
mov DWORD PTR 168[r12], 206
mov eax, eax
mov QWORD PTR 144[r12], rax
jmp .L313
.L526:
lea rdx, 0[rbp+rbx]
add r13, 1
.L419:
mov BYTE PTR [rdx], 47
jmp .L350
.L520:
sub eax, 55
lea edi, -65[rsi]
sal eax, 4
cmp dil, 5
jbe .L537
.L321:
lea r8d, -97[rsi]
lea edi, -87[rsi]
sub esi, 48
cmp r8b, 5
cmovbe esi, edi
jmp .L322
.L532:
lea rcx, .LC41[rip]
lea rdx, .LC37[rip]
mov rdi, r12
xor eax, eax
mov esi, 403
call default_reply
.L313:
mov rax, QWORD PTR 1048[rsp]
sub rax, QWORD PTR fs:40
jne .L516
add rsp, 1064
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L528:
.cfi_restore_state
mov r15, QWORD PTR index_name[rip]
mov rdx, r13
xor eax, eax
mov rcx, rbp
lea r14, 64[rsp]
lea rsi, .LC21[rip]
mov rdi, r14
mov r8, r15
call xasprintf
lea rax, 96[rsp]
mov rsi, QWORD PTR 64[rsp]
mov edi, 1
mov rdx, rax
mov QWORD PTR 8[rsp], rax
call __xstat64@PLT
cmp eax, -1
jne .L360
call __errno_location@PLT
mov rdi, QWORD PTR 64[rsp]
cmp DWORD PTR [rax], 2
mov QWORD PTR 40[rsp], rax
je .L361
.L360:
mov rdi, r15
call url_content_type
mov QWORD PTR [rsp], rax
jmp .L362
.L529:
call __errno_location@PLT
mov edi, DWORD PTR [rax]
cmp edi, 13
je .L538
cmp edi, 2
je .L513
call strerror@PLT
mov r8, QWORD PTR 80[r12]
mov esi, 500
mov rdi, r12
mov r9, rax
lea rcx, .LC38[rip]
lea rdx, .LC25[rip]
xor eax, eax
call default_reply
jmp .L313
.L518:
mov r13, rax
jmp .L316
.L527:
mov rdi, r14
call free@PLT
.L345:
mov r8, QWORD PTR 80[r12]
xor eax, eax
mov esi, 400
mov rdi, r12
lea rcx, .LC17[rip]
lea rdx, .LC18[rip]
call default_reply
mov rax, QWORD PTR 1048[rsp]
sub rax, QWORD PTR fs:40
je .L396
jmp .L516
.p2align 4,,10
.p2align 3
.L361:
call free@PLT
mov r8d, DWORD PTR no_listing[rip]
test r8d, r8d
je .L363
mov rdi, rbp
call free@PLT
.L513:
mov r8, QWORD PTR 80[r12]
mov esi, 404
mov rdi, r12
xor eax, eax
lea rcx, .LC22[rip]
lea rdx, .LC23[rip]
call default_reply
jmp .L313
.L338:
mov rdi, r14
mov r13d, 1
call free@PLT
mov rdx, rbp
jmp .L419
.L363:
mov rdi, r14
mov rcx, rbp
mov rdx, r13
xor eax, eax
lea rsi, .LC20[rip]
call xasprintf
mov r14, QWORD PTR 64[rsp]
mov rdi, r14
mov QWORD PTR 16[rsp], r14
call opendir@PLT
mov rbx, rax
test rax, rax
je .L365
mov rdi, r14
call strlen@PLT
lea r13, 256[rax]
mov rdi, r13
call malloc@PLT
mov r15, rax
test rax, rax
je .L515
mov edi, 1024
call malloc@PLT
mov r14, rax
test rax, rax
je .L539
mov QWORD PTR 24[rsp], 128
mov QWORD PTR [rsp], 0
mov QWORD PTR 48[rsp], rbp
mov QWORD PTR 56[rsp], r12
.L367:
mov rdi, rbx
call readdir64@PLT
test rax, rax
je .L540
.L373:
movabs rdx, 1099494850560
and rdx, QWORD PTR 16[rax]
cmp rdx, 771751936
je .L367
lea rbp, 19[rax]
mov r8, QWORD PTR 16[rsp]
mov rdi, r15
xor eax, eax
mov rdx, -1
mov esi, 1
mov r9, rbp
lea rcx, .LC20[rip]
call __sprintf_chk@PLT
mov rdx, QWORD PTR 8[rsp]
mov rsi, r15
mov edi, 1
call __xstat64@PLT
cmp eax, -1
je .L367
mov rsi, QWORD PTR 24[rsp]
cmp QWORD PTR [rsp], rsi
je .L541
.L369:
mov rax, QWORD PTR [rsp]
mov edi, 24
lea r13, [r14+rax*8]
call malloc@PLT
mov r12, rax
test rax, rax
je .L378
mov QWORD PTR 0[r13], rax
mov rdi, rbp
call strlen@PLT
lea rdx, 1[rax]
mov rdi, rdx
mov QWORD PTR 32[rsp], rdx
call malloc@PLT
mov rdx, QWORD PTR 32[rsp]
test rax, rax
mov rdi, rax
je .L542
mov rsi, rbp
call memcpy@PLT
mov rdx, QWORD PTR 0[r13]
mov rdi, rbx
mov QWORD PTR [r12], rax
mov eax, DWORD PTR 120[rsp]
and eax, 61440
cmp eax, 16384
sete al
add QWORD PTR [rsp], 1
movzx eax, al
mov DWORD PTR 8[rdx], eax
mov rax, QWORD PTR 144[rsp]
mov QWORD PTR 16[rdx], rax
call readdir64@PLT
test rax, rax
jne .L373
.L540:
mov rdi, rbx
mov rbp, QWORD PTR 48[rsp]
mov r12, QWORD PTR 56[rsp]
call closedir@PLT
mov rdi, r15
call free@PLT
mov rbx, QWORD PTR [rsp]
mov edx, 8
mov rdi, r14
lea rcx, dlent_cmp[rip]
mov rsi, rbx
call qsort@PLT
cmp rbx, -1
je .L365
test rbx, rbx
jle .L543
mov rax, QWORD PTR [rsp]
mov r13, r14
mov r15d, 2
lea rbx, [r14+rax*8]
.L377:
mov rax, QWORD PTR 0[r13]
mov rdi, QWORD PTR [rax]
call strlen@PLT
cmp r15, rax
cmovb r15, rax
add r13, 8
cmp rbx, r13
jne .L377
mov QWORD PTR 8[rsp], r15
.L375:
mov edi, 24
call malloc@PLT
mov r13, rax
test rax, rax
je .L378
mov QWORD PTR [rax], 0
mov edi, 4096
mov QWORD PTR 8[rax], 4096
call malloc@PLT
test rax, rax
je .L544
mov QWORD PTR 16[r13], rax
mov edx, 22
lea rsi, .LC26[rip]
mov rdi, r13
call appendl
mov r15, QWORD PTR 80[r12]
mov rdi, r15
call strlen@PLT
mov rsi, r15
mov rdi, r13
mov rdx, rax
call appendl
mov edx, 28
lea rsi, .LC27[rip]
mov rdi, r13
call appendl
mov r15, QWORD PTR 80[r12]
mov rdi, r15
call strlen@PLT
mov rsi, r15
mov rdi, r13
mov rdx, rax
call appendl
mov edx, 16
lea rsi, .LC28[rip]
mov rdi, r13
call appendl
mov rdi, QWORD PTR 8[rsp]
call malloc@PLT
mov rdx, QWORD PTR 8[rsp]
mov QWORD PTR 16[rsp], rax
test rax, rax
je .L545
mov rdi, QWORD PTR 16[rsp]
mov esi, 32
xor r15d, r15d
lea rbx, 272[rsp]
call memset@PLT
cmp QWORD PTR [rsp], 0
lea rcx, hex.1[rip]
jle .L393
mov QWORD PTR 24[rsp], rbp
mov rbp, rbx
mov rbx, r15
mov r15, r12
.L381:
mov rax, QWORD PTR [r14+rbx*8]
mov rsi, QWORD PTR [rax]
movzx eax, BYTE PTR [rsi]
test al, al
je .L432
xor edx, edx
jmp .L389
.p2align 4,,10
.p2align 3
.L547:
lea r8d, -48[rax]
cmp r8b, 9
jbe .L385
cmp al, 95
je .L385
jg .L386
lea r8d, -45[rax]
cmp r8b, 1
jbe .L385
.L387:
mov BYTE PTR [rdi], 37
movzx eax, BYTE PTR [rsi]
lea edi, 2[rdx]
movsx r9, r9d
add rsi, 1
add edx, 3
shr al, 4
and eax, 15
movzx eax, BYTE PTR [rcx+rax]
mov BYTE PTR 272[rsp+r9], al
movsx rax, edi
movzx edi, BYTE PTR -1[rsi]
and edi, 15
movzx edi, BYTE PTR [rcx+rdi]
mov BYTE PTR 272[rsp+rax], dil
movzx eax, BYTE PTR [rsi]
test al, al
je .L546
.L389:
mov r8d, eax
movsx rdi, edx
lea r9d, 1[rdx]
and r8d, -33
add rdi, rbp
sub r8d, 65
cmp r8b, 25
ja .L547
.L385:
mov BYTE PTR [rdi], al
mov edx, r9d
.L549:
movzx eax, BYTE PTR 1[rsi]
add rsi, 1
test al, al
jne .L389
.L546:
movsx rax, edx
add rax, rbp
.L384:
mov BYTE PTR [rax], 0
mov edx, 9
lea rsi, .LC30[rip]
mov rdi, r13
call appendl
mov rdi, rbp
call strlen@PLT
mov rsi, rbp
mov rdi, r13
mov rdx, rax
call appendl
mov edx, 2
lea rsi, .LC31[rip]
mov rdi, r13
call appendl
mov rax, QWORD PTR [r14+rbx*8]
mov r12, QWORD PTR [rax]
mov rdi, r12
call strlen@PLT
mov rsi, r12
mov rdi, r13
mov rdx, rax
call appendl
mov rdi, r13
mov edx, 4
lea rsi, .LC32[rip]
call appendl
mov rax, QWORD PTR [r14+rbx*8]
mov edi, DWORD PTR 8[rax]
test edi, edi
je .L390
mov edx, 2
lea rsi, .LC33[rip]
mov rdi, r13
call appendl
lea rcx, hex.1[rip]
.L391:
add rbx, 1
cmp QWORD PTR [rsp], rbx
jne .L381
mov rax, QWORD PTR [rsp]
mov rbx, rbp
mov rbp, QWORD PTR 24[rsp]
mov r12, r15
lea rax, [r14+rax*8]
mov QWORD PTR [rsp], rax
mov rax, rbx
mov rbx, r14
mov r15, rax
.L392:
mov rdx, QWORD PTR [rbx]
add rbx, 8
mov rdi, QWORD PTR [rdx]
call free@PLT
mov rdi, QWORD PTR -8[rbx]
call free@PLT
cmp QWORD PTR [rsp], rbx
jne .L392
mov rbx, r15
.L393:
mov rdi, r14
call free@PLT
mov rdi, QWORD PTR 16[rsp]
call free@PLT
mov edx, 17
lea rsi, .LC29[rip]
mov rdi, r13
call appendl
mov rax, QWORD PTR now[rip]
lea rdi, 88[rsp]
mov QWORD PTR 88[rsp], rax
call gmtime@PLT
lea rdx, .LC9[rip]
mov esi, 30
mov rdi, rbx
mov rcx, rax
call strftime@PLT
test rax, rax
je .L548
mov esi, DWORD PTR want_server_id[rip]
xor r14d, r14d
lea r15, .LC7[rip]
test esi, esi
je .L394
sub rsp, 8
.cfi_def_cfa_offset 1128
mov ecx, 72
mov edx, 1
xor eax, eax
push rbx
.cfi_def_cfa_offset 1136
lea r9, pkgname[rip]
lea r8, .LC11[rip]
mov esi, 72
lea rdi, _generated_on_buf[rip]
call __snprintf_chk@PLT
lea rdi, _generated_on_buf[rip]
call strlen@PLT
mov ecx, DWORD PTR want_server_id[rip]
mov r14, rax
pop rax
.cfi_def_cfa_offset 1128
pop rdx
.cfi_def_cfa_offset 1120
test ecx, ecx
je .L394
sub rsp, 8
.cfi_def_cfa_offset 1128
mov ecx, 72
mov edx, 1
xor eax, eax
push rbx
.cfi_def_cfa_offset 1136
lea r9, pkgname[rip]
lea r8, .LC11[rip]
mov esi, 72
lea rdi, _generated_on_buf[rip]
lea r15, _generated_on_buf[rip]
call __snprintf_chk@PLT
pop r10
.cfi_def_cfa_offset 1128
pop r11
.cfi_def_cfa_offset 1120
.L394:
mov rdx, r14
mov rsi, r15
mov rdi, r13
call appendl
mov edx, 16
lea rsi, .LC34[rip]
mov rdi, r13
call appendl
mov rax, QWORD PTR 16[r13]
mov r14, QWORD PTR 0[r13]
mov rdi, r13
mov QWORD PTR 184[r12], rax
mov QWORD PTR 208[r12], r14
call free@PLT
mov r9d, DWORD PTR 172[r12]
lea r8, .LC8[rip]
test r9d, r9d
jne .L395
mov r8, QWORD PTR keep_alive_field[rip]
.L395:
mov rcx, QWORD PTR server_hdr[rip]
mov r9, r14
mov rdx, rbx
xor eax, eax
lea rdi, 136[r12]
lea rsi, .LC35[rip]
call xasprintf
mov DWORD PTR 176[r12], 0
mov DWORD PTR 168[r12], 200
mov eax, eax
mov QWORD PTR 144[r12], rax
.L376:
mov rdi, QWORD PTR 64[rsp]
call free@PLT
mov rax, QWORD PTR 1048[rsp]
sub rax, QWORD PTR fs:40
je .L396
.L516:
call __stack_chk_fail@PLT
.p2align 4,,10
.p2align 3
.L535:
cmp QWORD PTR 128[r12], 0
jne .L408
mov ecx, DWORD PTR 172[r12]
mov QWORD PTR 208[r12], rbp
lea r15, .LC8[rip]
test ecx, ecx
jne .L416
mov r15, QWORD PTR keep_alive_field[rip]
.L416:
mov rax, QWORD PTR now[rip]
mov rdi, r13
mov r14, QWORD PTR server_hdr[rip]
lea r13, 240[rsp]
mov QWORD PTR 88[rsp], rax
call gmtime@PLT
lea rdx, .LC9[rip]
mov esi, 30
mov rdi, r13
mov rcx, rax
call strftime@PLT
test rax, rax
je .L415
push rbx
.cfi_def_cfa_offset 1128
mov rdx, r13
lea rdi, 136[r12]
mov r9, rbp
push QWORD PTR 8[rsp]
.cfi_def_cfa_offset 1136
mov r8, r15
mov rcx, r14
xor eax, eax
lea rsi, .LC48[rip]
call xasprintf
mov DWORD PTR 168[r12], 200
mov eax, eax
mov QWORD PTR 144[r12], rax
pop rax
.cfi_def_cfa_offset 1128
pop rdx
.cfi_def_cfa_offset 1120
jmp .L313
.p2align 4,,10
.p2align 3
.L386:
cmp al, 126
jne .L387
mov BYTE PTR [rdi], al
mov edx, r9d
jmp .L549
.L390:
mov rdi, QWORD PTR [rax]
call strlen@PLT
mov rdx, QWORD PTR 8[rsp]
mov rsi, QWORD PTR 16[rsp]
mov rdi, r13
sub rdx, rax
call appendl
mov rax, QWORD PTR [r14+rbx*8]
lea rsi, .LC5[rip]
mov rdi, r13
mov rdx, QWORD PTR 16[rax]
xor eax, eax
call appendf.constprop.0
lea rcx, hex.1[rip]
jmp .L391
.L541:
mov rax, QWORD PTR [rsp]
mov rdi, r14
lea r12, [rax+rax]
sal rax, 4
mov rsi, rax
mov r13, rax
call realloc@PLT
mov r14, rax
test rax, rax
je .L550
mov QWORD PTR 24[rsp], r12
jmp .L369
.L432:
mov rax, rbp
jmp .L384
.L408:
mov r14, rbp
mov eax, 0
lea r15, -1[rbp]
sub r14, QWORD PTR 112[r12]
cmovs r14, rax
jmp .L411
.L538:
mov r8, QWORD PTR 80[r12]
mov esi, 403
mov rdi, r12
xor eax, eax
lea rcx, .LC36[rip]
lea rdx, .LC37[rip]
call default_reply
jmp .L313
.L531:
mov rdx, QWORD PTR 80[r12]
lea rsi, .LC40[rip]
mov rdi, r12
xor eax, eax
call redirect
jmp .L313
.L530:
call __errno_location@PLT
mov edi, DWORD PTR [rax]
call strerror@PLT
lea rcx, .LC39[rip]
mov esi, 500
mov rdi, r12
mov r8, rax
lea rdx, .LC25[rip]
xor eax, eax
call default_reply
jmp .L313
.L534:
mov edi, DWORD PTR 172[r12]
lea rbx, .LC8[rip]
mov DWORD PTR 168[r12], 304
test edi, edi
jne .L405
mov rbx, QWORD PTR keep_alive_field[rip]
.L405:
mov rax, QWORD PTR now[rip]
lea rdi, 72[rsp]
mov r14, QWORD PTR server_hdr[rip]
lea r13, 240[rsp]
mov QWORD PTR 72[rsp], rax
call gmtime@PLT
lea rdx, .LC9[rip]
mov esi, 30
mov rdi, r13
mov rcx, rax
call strftime@PLT
test rax, rax
je .L415
lea rdi, 136[r12]
mov r8, rbx
mov rcx, r14
xor eax, eax
mov rdx, r13
lea rsi, .LC43[rip]
call xasprintf
mov rdi, rbp
mov QWORD PTR 208[r12], 0
mov DWORD PTR 176[r12], 0
mov eax, eax
mov QWORD PTR 144[r12], rax
mov DWORD PTR 164[r12], 1
call free@PLT
jmp .L313
.L536:
lea rcx, .LC46[rip]
.L514:
lea rdx, .LC45[rip]
mov esi, 416
mov rdi, r12
xor eax, eax
call default_reply
jmp .L313
.L543:
mov QWORD PTR 8[rsp], 2
jmp .L375
.L365:
mov rax, QWORD PTR 40[rsp]
mov edi, DWORD PTR [rax]
call strerror@PLT
lea rcx, .LC24[rip]
mov esi, 500
mov rdi, r12
mov r8, rax
lea rdx, .LC25[rip]
xor eax, eax
call default_reply
jmp .L376
.L533:
mov rdx, rbx
lea rsi, .LC10[rip]
mov edi, 1
call errx@PLT
.L515:
mov rdx, r13
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L539:
mov edx, 1024
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L415:
mov rdx, r13
lea rsi, .LC10[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L542:
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L378:
mov edx, 24
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L545:
lea rsi, .LC6[rip]
mov edi, 1
call errx@PLT
.L544:
mov edx, 4096
lea rsi, .LC6[rip]
mov edi, 1
call errx@PLT
.L548:
mov rdx, rbx
lea rsi, .LC10[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L550:
mov rdi, r13
call xrealloc.part.0
.cfi_endproc
.LFE145:
.size process_get, .-process_get
.section .rodata.str1.8
.align 8
.LC49:
.string "You sent a request that the server couldn't understand."
.section .rodata.str1.1
.LC50:
.string "HTTP/1.1"
.LC51:
.string "Connection: "
.LC52:
.string "close"
.LC53:
.string "keep-alive"
.LC54:
.string "Referer: "
.LC55:
.string "User-Agent: "
.LC56:
.string "Range: bytes="
.LC57:
.string "GET"
.LC58:
.string "HEAD"
.LC59:
.string "OPTIONS"
.LC60:
.string "POST"
.LC61:
.string "PUT"
.LC62:
.string "DELETE"
.LC63:
.string "TRACE"
.LC64:
.string "CONNECT"
.section .rodata.str1.8
.align 8
.LC65:
.string "The method you specified (%s) is not implemented."
.section .rodata.str1.1
.LC66:
.string "Not Implemented"
.section .rodata.str1.8
.align 8
.LC67:
.string "%s is not a valid HTTP/1.1 method."
.text
.p2align 4
.type process_request, @function
process_request:
.LFB146:
.cfi_startproc
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
xor edx, edx
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
mov r12, rdi
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 24
.cfi_def_cfa_offset 80
mov r14, QWORD PTR 64[rdi]
add QWORD PTR num_requests[rip], 1
mov r15, QWORD PTR 56[rdi]
test r14, r14
jne .L552
jmp .L675
.p2align 4,,10
.p2align 3
.L555:
cmp r14, rdx
je .L554
.L552:
movzx eax, BYTE PTR [r15+rdx]
mov rbx, rdx
lea rdx, 1[rdx]
cmp al, 32
jne .L555
mov rdi, rdx
mov r13, rdx
call malloc@PLT
mov rbp, rax
test rax, rax
je .L598
mov rdx, rbx
mov rsi, r15
mov rdi, rax
call memcpy@PLT
mov BYTE PTR 0[rbp+rbx], 0
mov QWORD PTR 72[r12], rbp
test rbx, rbx
je .L560
.L600:
call __ctype_toupper_loc@PLT
lea rcx, 0[rbp+rbx]
mov rsi, QWORD PTR [rax]
mov rax, rbp
.p2align 4,,10
.p2align 3
.L558:
movsx rdx, BYTE PTR [rax]
add rax, 1
mov edx, DWORD PTR [rsi+rdx*4]
mov BYTE PTR -1[rax], dl
cmp rcx, rax
jne .L558
.p2align 4,,10
.p2align 3
.L561:
cmp r14, rbx
jbe .L559
.L560:
movzx eax, BYTE PTR [r15+rbx]
mov rbp, rbx
add rbx, 1
cmp al, 32
je .L561
.L562:
movabs rdx, 4294976512
lea rbx, 1[rbp]
cmp rbx, r14
jb .L564
jmp .L676
.p2align 4,,10
.p2align 3
.L566:
add rbx, 1
cmp rbx, r14
jnb .L673
.L564:
movzx eax, BYTE PTR [r15+rbx]
cmp al, 32
ja .L566
bt rdx, rax
jnc .L566
.L673:
mov r13, rbx
sub r13, rbp
lea rdx, 1[r13]
.L565:
mov rdi, rdx
mov QWORD PTR 8[rsp], rdx
call malloc@PLT
mov rdx, QWORD PTR 8[rsp]
test rax, rax
je .L674
lea rsi, [r15+rbp]
mov rdx, r13
mov rdi, rax
call memcpy@PLT
mov BYTE PTR [rax+r13], 0
mov QWORD PTR 80[r12], rax
cmp BYTE PTR [r15+rbx], 32
je .L677
.L568:
lea rsi, .LC51[rip]
mov rdi, r12
call parse_field
mov rbp, rax
test rax, rax
je .L577
lea rsi, .LC52[rip]
mov rdi, rax
call strcasecmp@PLT
test eax, eax
jne .L578
mov DWORD PTR 172[r12], 1
.L579:
mov rdi, rbp
call free@PLT
.L577:
mov eax, DWORD PTR want_keepalive[rip]
test eax, eax
jne .L580
mov DWORD PTR 172[r12], 1
.L580:
lea rsi, .LC54[rip]
mov rdi, r12
call parse_field
lea rsi, .LC55[rip]
mov rdi, r12
mov QWORD PTR 88[r12], rax
call parse_field
lea rsi, .LC56[rip]
mov rdi, r12
mov QWORD PTR 96[r12], rax
call parse_field
mov rbp, rax
test rax, rax
je .L581
mov rdi, rax
xor ebx, ebx
call strlen@PLT
mov r13, rax
call __ctype_b_loc@PLT
mov rcx, QWORD PTR [rax]
mov r14, rax
jmp .L582
.p2align 4,,10
.p2align 3
.L678:
cmp r13, rbx
jbe .L607
add rbx, 1
.L582:
movsx rdx, BYTE PTR 0[rbp+rbx]
mov rax, rdx
test BYTE PTR 1[rcx+rdx*2], 8
jne .L678
.L607:
cmp al, 45
jne .L587
cmp r13, rbx
jne .L679
.L587:
mov rdi, rbp
call free@PLT
.L581:
mov r8, QWORD PTR 72[r12]
mov ecx, 4
lea rdi, .LC57[rip]
mov rsi, r8
repz cmpsb
seta al
sbb al, 0
test al, al
je .L680
mov ecx, 5
lea rdi, .LC58[rip]
mov rsi, r8
repz cmpsb
seta al
sbb al, 0
test al, al
je .L681
mov ecx, 8
lea rdi, .LC59[rip]
mov rsi, r8
repz cmpsb
seta al
sbb al, 0
test al, al
je .L595
mov ecx, 5
lea rdi, .LC60[rip]
mov rsi, r8
repz cmpsb
seta al
sbb al, 0
test al, al
jne .L682
.L595:
lea rcx, .LC65[rip]
lea rdx, .LC66[rip]
mov rdi, r12
xor eax, eax
mov esi, 501
call default_reply
.L563:
mov DWORD PTR 48[r12], 1
mov rdi, QWORD PTR 56[r12]
call free@PLT
mov QWORD PTR 56[r12], 0
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L554:
.cfi_restore_state
lea r13, 2[rbx]
mov rdi, r13
call malloc@PLT
mov rbp, rax
test rax, rax
je .L598
mov rdx, r14
mov rsi, r15
mov rdi, rbp
mov rbx, r14
call memcpy@PLT
mov BYTE PTR 0[rbp+r14], 0
mov QWORD PTR 72[r12], rbp
jmp .L600
.p2align 4,,10
.p2align 3
.L559:
mov rbp, rbx
cmp rbx, r14
jne .L562
.L597:
lea rcx, .LC49[rip]
lea rdx, .LC18[rip]
mov rdi, r12
xor eax, eax
mov esi, 400
call default_reply
jmp .L563
.p2align 4,,10
.p2align 3
.L578:
lea rsi, .LC53[rip]
mov rdi, rbp
call strcasecmp@PLT
test eax, eax
jne .L579
mov DWORD PTR 172[r12], 0
jmp .L579
.p2align 4,,10
.p2align 3
.L677:
cmp rbx, r14
jnb .L569
.p2align 4,,10
.p2align 3
.L570:
add rbx, 1
cmp rbx, r14
je .L569
cmp BYTE PTR [r15+rbx], 32
je .L570
.L569:
lea rax, 1[rbx]
cmp rax, r14
jb .L571
jmp .L683
.p2align 4,,10
.p2align 3
.L684:
cmp dl, 13
je .L606
add rax, 1
cmp rax, r14
jnb .L606
.L571:
movzx edx, BYTE PTR [r15+rax]
cmp dl, 32
jne .L684
.L606:
sub rax, rbx
mov rbp, rax
lea r14, 1[rax]
.L572:
mov rdi, r14
call malloc@PLT
mov r13, rax
test rax, rax
je .L685
lea rsi, [r15+rbx]
mov rdi, rax
mov rdx, rbp
call memcpy@PLT
mov BYTE PTR 0[r13+rbp], 0
lea rsi, .LC50[rip]
mov rdi, r13
call strcasecmp@PLT
test eax, eax
jne .L576
mov DWORD PTR 172[r12], 0
.L576:
mov rdi, r13
call free@PLT
jmp .L568
.p2align 4,,10
.p2align 3
.L680:
mov rdi, r12
call process_get
jmp .L563
.p2align 4,,10
.p2align 3
.L682:
mov ecx, 4
lea rdi, .LC61[rip]
mov rsi, r8
repz cmpsb
seta al
sbb al, 0
test al, al
je .L595
mov ecx, 7
lea rdi, .LC62[rip]
mov rsi, r8
repz cmpsb
seta al
sbb al, 0
test al, al
je .L595
mov ecx, 6
lea rdi, .LC63[rip]
mov rsi, r8
repz cmpsb
seta al
sbb al, 0
test al, al
je .L595
mov ecx, 8
lea rdi, .LC64[rip]
mov rsi, r8
repz cmpsb
seta al
sbb al, 0
test al, al
je .L595
lea rcx, .LC67[rip]
lea rdx, .LC18[rip]
mov rdi, r12
xor eax, eax
mov esi, 400
call default_reply
jmp .L563
.p2align 4,,10
.p2align 3
.L681:
mov rdi, r12
call process_get
mov DWORD PTR 164[r12], 1
jmp .L563
.p2align 4,,10
.p2align 3
.L679:
test rbx, rbx
jne .L686
.L588:
lea rax, 1[rbx]
lea r8, 0[rbp+rax]
movsx rdx, BYTE PTR [r8]
test BYTE PTR 1[rcx+rdx*2], 8
je .L587
cmp r13, rax
ja .L590
jmp .L587
.p2align 4,,10
.p2align 3
.L687:
cmp r13, rax
jbe .L608
.L590:
mov rdi, rax
add rax, 1
movsx rsi, BYTE PTR 0[rbp+rax]
mov rdx, rsi
test BYTE PTR 1[rcx+rsi*2], 8
jne .L687
.L608:
cmp r13, rax
je .L609
cmp dl, 44
jne .L587
.L609:
cmp rbx, rdi
je .L587
mov edx, 10
xor esi, esi
mov rdi, r8
mov QWORD PTR 128[r12], 1
call strtoll@PLT
mov QWORD PTR 112[r12], rax
jmp .L587
.L675:
mov edi, 1
call malloc@PLT
test rax, rax
je .L688
mov BYTE PTR [rax], 0
mov QWORD PTR 72[r12], rax
jmp .L597
.L686:
mov QWORD PTR 120[r12], 1
mov edx, 10
xor esi, esi
mov rdi, rbp
call strtoll@PLT
mov rcx, QWORD PTR [r14]
mov QWORD PTR 104[r12], rax
jmp .L588
.L676:
mov edx, 2
mov r13d, 1
jmp .L565
.L683:
mov r14d, 2
mov ebp, 1
jmp .L572
.L688:
mov r13d, 1
.L598:
mov rdx, r13
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L685:
mov rdx, r14
.L674:
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.cfi_endproc
.LFE146:
.size process_request, .-process_request
.section .rodata.str1.8
.align 8
.LC68:
.string "Your request was dropped because it was too long."
.section .rodata.str1.1
.LC69:
.string "Request Entity Too Large"
.text
.p2align 4
.type poll_recv_request, @function
poll_recv_request:
.LFB147:
.cfi_startproc
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
lea r11, -32768[rsp]
.cfi_def_cfa 11, 32808
.LPSRL0:
sub rsp, 4096
or DWORD PTR [rsp], 0
cmp rsp, r11
jne .LPSRL0
.cfi_def_cfa_register 7
sub rsp, 24
.cfi_def_cfa_offset 32832
xor ecx, ecx
mov edx, 32768
mov rax, QWORD PTR fs:40
mov QWORD PTR 32776[rsp], rax
xor eax, eax
mov rbp, rdi
mov r12, rsp
mov edi, DWORD PTR 16[rdi]
mov rsi, r12
call recv@PLT
mov rbx, rax
test rax, rax
jg .L690
cmp rax, -1
je .L702
.L691:
mov DWORD PTR 172[rbp], 1
mov DWORD PTR 48[rbp], 3
.L689:
mov rax, QWORD PTR 32776[rsp]
sub rax, QWORD PTR fs:40
jne .L703
add rsp, 32792
.cfi_remember_state
.cfi_def_cfa_offset 40
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L702:
.cfi_restore_state
call __errno_location@PLT
cmp DWORD PTR [rax], 11
jne .L691
jmp .L689
.p2align 4,,10
.p2align 3
.L690:
mov rax, QWORD PTR now[rip]
mov rdi, QWORD PTR 56[rbp]
mov QWORD PTR 40[rbp], rax
mov rax, QWORD PTR 64[rbp]
lea r13, 1[rbx+rax]
mov rsi, r13
call realloc@PLT
test rax, rax
je .L704
mov QWORD PTR 56[rbp], rax
add rax, QWORD PTR 64[rbp]
mov rdx, rbx
mov rsi, r12
mov rdi, rax
call memcpy@PLT
mov rax, QWORD PTR 64[rbp]
mov rdx, QWORD PTR 56[rbp]
add QWORD PTR total_in[rip], rbx
add rax, rbx
mov QWORD PTR 64[rbp], rax
mov BYTE PTR [rdx+rax], 0
mov rax, QWORD PTR 64[rbp]
cmp rax, 2
jbe .L695
mov rdx, QWORD PTR 56[rbp]
cmp WORD PTR -2[rdx+rax], 2570
je .L698
cmp rax, 4
jbe .L697
cmp DWORD PTR -4[rdx+rax], 168626701
je .L698
.L697:
cmp rax, 4000
jbe .L695
lea rcx, .LC68[rip]
lea rdx, .LC69[rip]
mov rdi, rbp
xor eax, eax
mov esi, 413
call default_reply
mov DWORD PTR 48[rbp], 1
.L699:
mov rdi, rbp
call poll_send_header
jmp .L689
.p2align 4,,10
.p2align 3
.L695:
cmp DWORD PTR 48[rbp], 1
jne .L689
jmp .L699
.p2align 4,,10
.p2align 3
.L698:
mov rdi, rbp
call process_request
mov rax, QWORD PTR 64[rbp]
jmp .L697
.L703:
call __stack_chk_fail@PLT
.L704:
mov rdi, r13
call xrealloc.part.0
.cfi_endproc
.LFE147:
.size poll_recv_request, .-poll_recv_request
.section .rodata.str1.1
.LC70:
.string "application/ogg ogg"
.LC71:
.string "::"
.LC72:
.string "%s, %s.\n"
.LC73:
.string "--help"
.section .rodata.str1.8
.align 8
.LC74:
.string "usage:\t%s /path/to/wwwroot [flags]\n\n"
.align 8
.LC75:
.string "flags:\t--port number (default: %u, or 80 if running as root)\n\t\tSpecifies which port to listen on for connections.\n\t\tPass 0 to let the system choose any free port for you.\n\n"
.align 8
.LC76:
.string "\t--addr ip (default: all)\n\t\tIf multiple interfaces are present, specifies\n\t\twhich one to bind the listening port to.\n"
.align 8
.LC77:
.string "\t--maxconn number (default: system maximum)\n\t\tSpecifies how many concurrent connections to accept.\n"
.align 8
.LC78:
.string "\t--log filename (default: stdout)\n\t\tSpecifies which file to append the request log to.\n"
.align 8
.LC79:
.string "\t--chroot (default: don't chroot)\n\t\tLocks server into wwwroot directory for added security.\n"
.align 8
.LC80:
.string "\t--daemon (default: don't daemonize)\n\t\tDetach from the controlling terminal and run in the background.\n"
.align 8
.LC81:
.string "\t--index filename (default: %s)\n\t\tDefault file to serve when a directory is requested.\n\n"
.align 8
.LC82:
.string "\t--no-listing\n\t\tDo not serve listing if directory is requested.\n"
.align 8
.LC83:
.string "\t--mimetypes filename (optional)\n\t\tParses specified file for extension-MIME associations.\n"
.align 8
.LC84:
.string "\t--default-mimetype string (optional, default: %s)\n\t\tFiles with unknown extensions are served as this mimetype.\n\n"
.align 8
.LC85:
.string "\t--uid uid/uname, --gid gid/gname (default: don't privdrop)\n\t\tDrops privileges to given uid:gid after initialization.\n"
.align 8
.LC86:
.string "\t--pidfile filename (default: no pidfile)\n\t\tWrite PID to the specified file. Note that if you are\n\t\tusing --chroot, then the pidfile must be relative to,\n\t\tand inside the wwwroot.\n"
.align 8
.LC87:
.string "\t--no-keepalive\n\t\tDisables HTTP Keep-Alive functionality.\n"
.align 8
.LC88:
.string "\t--forward host url (default: don't forward)\n\t\tWeb forward (301 redirect).\n\t\tRequests to the host are redirected to the corresponding url.\n\t\tThe option may be specified multiple times, in which case\n\t\tthe host is matched in order of appearance.\n"
.align 8
.LC89:
.string "\t--forward-all url (default: don't forward)\n\t\tWeb forward (301 redirect).\n\t\tAll requests are redirected to the corresponding url.\n"
.align 8
.LC90:
.string "\t--no-server-id\n\t\tDon't identify the server type in headers\n\t\tor directory listings.\n"
.align 8
.LC91:
.string "\t--ipv6\n\t\tListen on IPv6 address.\n"
.section .rodata.str1.1
.LC92:
.string "Keep-Alive: timeout=%d\r\n"
.LC93:
.string "--port"
.LC94:
.string "missing number after --port"
.LC95:
.string "--addr"
.LC96:
.string "missing ip after --addr"
.LC97:
.string "--maxconn"
.section .rodata.str1.8
.align 8
.LC98:
.string "missing number after --maxconn"
.section .rodata.str1.1
.LC99:
.string "--log"
.LC100:
.string "missing filename after --log"
.LC101:
.string "--chroot"
.LC102:
.string "--daemon"
.LC103:
.string "--index"
.section .rodata.str1.8
.align 8
.LC104:
.string "missing filename after --index"
.section .rodata.str1.1
.LC105:
.string "--no-listing"
.LC106:
.string "--mimetypes"
.section .rodata.str1.8
.align 8
.LC107:
.string "missing filename after --mimetypes"
.section .rodata.str1.1
.LC108:
.string "rb"
.LC109:
.string "fopen(\"%s\")"
.LC110:
.string "ftell()"
.LC111:
.string "fseek()"
.section .rodata.str1.8
.align 8
.LC112:
.string "fread() %zu bytes, expecting %zu bytes"
.section .rodata.str1.1
.LC113:
.string "--default-mimetype"
.section .rodata.str1.8
.align 8
.LC114:
.string "missing string after --default-mimetype"
.section .rodata.str1.1
.LC115:
.string "--uid"
.LC116:
.string "missing uid after --uid"
.LC117:
.string "no such uid: `%s'"
.LC118:
.string "--gid"
.LC119:
.string "missing gid after --gid"
.LC120:
.string "no such gid: `%s'"
.LC121:
.string "--pidfile"
.section .rodata.str1.8
.align 8
.LC122:
.string "missing filename after --pidfile"
.section .rodata.str1.1
.LC123:
.string "--no-keepalive"
.LC124:
.string "--accf"
.LC125:
.string "--forward"
.LC126:
.string "missing host after --forward"
.LC127:
.string "missing url after --forward"
.LC128:
.string "--forward-all"
.section .rodata.str1.8
.align 8
.LC129:
.string "missing url after --forward-all"
.section .rodata.str1.1
.LC130:
.string "--no-server-id"
.LC131:
.string "--ipv6"
.LC132:
.string "unknown argument `%s'"
.LC133:
.string "Server: %s\r\n"
.LC134:
.string "malformed --addr argument"
.LC135:
.string "socket()"
.LC136:
.string "setsockopt(SO_REUSEADDR)"
.LC137:
.string "bind(port %u)"
.LC138:
.string "getsockname()"
.section .rodata.str1.8
.align 8
.LC139:
.string "listening on: http://[%s]:%u/\n"
.section .rodata.str1.1
.LC140:
.string "listening on: http://%s:%u/\n"
.LC141:
.string "listen()"
.section .rodata.str1.8
.align 8
.LC142:
.string "this platform doesn't support acceptfilter"
.section .rodata.str1.1
.LC143:
.string "ab"
.LC144:
.string "opening logfile: fopen(\"%s\")"
.LC145:
.string "pipe(lifeline)"
.LC146:
.string "/dev/null"
.LC147:
.string "open(/dev/null)"
.LC148:
.string "fork"
.LC149:
.string "close lifeline in parent"
.LC150:
.string "read lifeline in parent"
.LC151:
.string "waitpid"
.LC152:
.string "signal(ignore SIGPIPE)"
.LC153:
.string "signal(SIGINT)"
.LC154:
.string "signal(SIGTERM)"
.LC155:
.string "chdir(%s)"
.LC156:
.string "chroot(%s)"
.LC157:
.string "chrooted to `%s'\n"
.LC158:
.string "setgroups([%d])"
.LC159:
.string "setgid(%d)"
.LC160:
.string "set gid to %d\n"
.LC161:
.string "setuid(%d)"
.LC162:
.string "set uid to %d\n"
.LC163:
.string " after create failed"
.LC164:
.string "read from pidfile failed"
.section .rodata.str1.8
.align 8
.LC165:
.string "invalid pidfile contents: \"%s\""
.align 8
.LC166:
.string "daemon already running with PID %d"
.section .rodata.str1.1
.LC167:
.string "can't create pidfile %s"
.LC168:
.string "ftruncate() failed"
.LC169:
.string "%d"
.LC170:
.string "pwrite() failed"
.LC171:
.string "setsid"
.section .rodata.str1.8
.align 8
.LC172:
.string "close read end of lifeline in child"
.section .rodata.str1.1
.LC173:
.string "couldn't cut the lifeline"
.LC174:
.string "dup2(stdin)"
.LC175:
.string "dup2(stdout)"
.LC176:
.string "dup2(stderr)"
.LC177:
.string "select() timed out"
.LC178:
.string "select() failed"
.LC179:
.string "accept()"
.LC180:
.string "fcntl(F_GETFL)"
.LC181:
.string "fcntl() to set O_NONBLOCK"
.section .rodata.str1.8
.align 8
.LC182:
.string "CPU time used: %u.%02u user, %u.%02u system\n"
.section .rodata.str1.1
.LC183:
.string "Requests: %llu\n"
.LC184:
.string "Bytes: %llu in, %llu out\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB158:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
lea rcx, copyright[rip]
lea rdx, pkgname[rip]
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
lea r12, default_extension_map[rip+8]
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov rbp, rsi
lea rsi, .LC72[rip]
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov ebx, edi
mov edi, 1
sub rsp, 536
.cfi_def_cfa_offset 592
mov rax, QWORD PTR fs:40
mov QWORD PTR 520[rsp], rax
xor eax, eax
call __printf_chk@PLT
lea rdi, .LC70[rip]
.p2align 4,,10
.p2align 3
.L706:
call parse_mimetype_line
mov rdi, QWORD PTR [r12]
add r12, 8
test rdi, rdi
jne .L706
cmp ebx, 1
jle .L707
cmp ebx, 2
jne .L708
mov rdi, QWORD PTR 8[rbp]
lea rsi, .LC73[rip]
call strcmp@PLT
test eax, eax
jne .L708
.L707:
mov rdx, QWORD PTR 0[rbp]
lea rsi, .LC74[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
movzx edx, WORD PTR bindport[rip]
lea rsi, .LC75[rip]
xor eax, eax
mov edi, 1
call __printf_chk@PLT
lea rdi, .LC76[rip]
call puts@PLT
lea rdi, .LC77[rip]
call puts@PLT
lea rdi, .LC78[rip]
call puts@PLT
lea rdi, .LC79[rip]
call puts@PLT
lea rdi, .LC80[rip]
call puts@PLT
mov rdx, QWORD PTR index_name[rip]
lea rsi, .LC81[rip]
xor eax, eax
mov edi, 1
call __printf_chk@PLT
lea rdi, .LC82[rip]
call puts@PLT
lea rdi, .LC83[rip]
call puts@PLT
lea rdx, octet_stream[rip]
lea rsi, .LC84[rip]
xor eax, eax
mov edi, 1
call __printf_chk@PLT
lea rdi, .LC85[rip]
call puts@PLT
lea rdi, .LC86[rip]
call puts@PLT
lea rdi, .LC87[rip]
call puts@PLT
lea rdi, .LC88[rip]
call puts@PLT
lea rdi, .LC89[rip]
call puts@PLT
lea rdi, .LC90[rip]
call puts@PLT
lea rdi, .LC91[rip]
call puts@PLT
xor edi, edi
call exit@PLT
.L708:
call getuid@PLT
test eax, eax
jne .L709
mov WORD PTR bindport[rip], 80
.L709:
mov rdi, QWORD PTR 8[rbp]
call xstrdup
mov rdi, rax
mov QWORD PTR wwwroot[rip], rax
mov r12, rax
call strlen@PLT
test rax, rax
jne .L951
.L710:
mov r13d, 2
lea r12, .LC93[rip]
mov r15, rbp
cmp ebx, 2
jne .L711
jmp .L766
.p2align 4,,10
.p2align 3
.L953:
add r13d, 1
cmp ebx, r13d
jle .L952
mov r14, QWORD PTR 8[r15+rbp]
lea rsi, 48[rsp]
mov rdi, r14
call str_to_num
test eax, eax
je .L949
mov rax, QWORD PTR 48[rsp]
mov WORD PTR bindport[rip], ax
.L717:
add r13d, 1
cmp ebx, r13d
jle .L766
.L711:
movsx rax, r13d
mov ecx, 7
mov rdi, r12
mov r14, QWORD PTR [r15+rax*8]
lea rbp, 0[0+rax*8]
mov rsi, r14
repz cmpsb
seta al
sbb al, 0
test al, al
je .L953
mov ecx, 7
mov rsi, r14
lea rdi, .LC95[rip]
repz cmpsb
seta al
sbb al, 0
test al, al
jne .L718
add r13d, 1
cmp ebx, r13d
jle .L954
mov rax, QWORD PTR 8[r15+rbp]
add r13d, 1
mov QWORD PTR bindaddr[rip], rax
cmp ebx, r13d
jg .L711
.L766:
mov rsi, QWORD PTR mime_map_size[rip]
mov rdi, QWORD PTR mime_map[rip]
mov edx, 16
lea rcx, mime_mapping_cmp[rip]
call qsort@PLT
xor eax, eax
mov edx, 60
lea rsi, .LC92[rip]
lea rdi, keep_alive_field[rip]
call xasprintf
cmp DWORD PTR want_server_id[rip], 0
jne .L712
lea rdi, .LC7[rip]
call xstrdup
mov QWORD PTR server_hdr[rip], rax
.L767:
mov r13d, DWORD PTR inet6[rip]
mov rsi, QWORD PTR bindaddr[rip]
test r13d, r13d
je .L768
lea r12, 368[rsp]
mov ecx, 7
xor eax, eax
mov rdi, r12
rep stosd
test rsi, rsi
je .L955
.L769:
lea rdx, 376[rsp]
mov edi, 10
call inet_pton@PLT
add eax, 1
je .L773
xor edx, edx
mov esi, 1
mov edi, 10
call socket@PLT
mov DWORD PTR sockin[rip], eax
.L771:
mov ebp, DWORD PTR sockin[rip]
cmp ebp, -1
je .L956
lea rax, 48[rsp]
mov r8d, 4
mov edx, 2
mov edi, ebp
mov rcx, rax
mov esi, 1
mov DWORD PTR 48[rsp], 1
mov QWORD PTR [rsp], rax
call setsockopt@PLT
add eax, 1
je .L957
movzx ebx, WORD PTR bindport[rip]
mov eax, ebx
rol ax, 8
test r13d, r13d
je .L776
lea r12, 368[rsp]
mov edx, 28
mov edi, ebp
mov WORD PTR 368[rsp], 10
mov rsi, r12
mov WORD PTR 370[rsp], ax
call bind@PLT
add eax, 1
je .L950
lea rax, 44[rsp]
mov rsi, r12
mov edi, ebp
mov DWORD PTR 44[rsp], 28
mov rdx, rax
mov QWORD PTR 8[rsp], rax
call getsockname@PLT
add eax, 1
je .L781
lea rdi, 376[rsp]
call get_address_text
mov ecx, ebx
mov edi, 1
lea rsi, .LC139[rip]
mov rdx, rax
xor eax, eax
call __printf_chk@PLT
.L779:
mov esi, DWORD PTR max_connections[rip]
mov edi, DWORD PTR sockin[rip]
call listen@PLT
add eax, 1
je .L958
cmp DWORD PTR want_accf[rip], 0
jne .L959
.L783:
mov rdi, QWORD PTR logfile_name[rip]
test rdi, rdi
je .L960
lea rsi, .LC143[rip]
call fopen64@PLT
mov QWORD PTR logfile[rip], rax
test rax, rax
je .L961
.L785:
cmp DWORD PTR want_daemon[rip], 0
jne .L962
.L786:
mov esi, 1
mov edi, 13
call signal@PLT
add rax, 1
je .L963
lea rsi, stop_running[rip]
mov edi, 2
call signal@PLT
add rax, 1
je .L964
lea rsi, stop_running[rip]
mov edi, 15
call signal@PLT
add rax, 1
je .L965
cmp DWORD PTR want_chroot[rip], 0
jne .L966
.L797:
mov r13d, DWORD PTR drop_gid[rip]
cmp r13d, -1
je .L800
lea r12, 368[rsp]
mov edi, 1
mov DWORD PTR 368[rsp], r13d
mov rsi, r12
call setgroups@PLT
add eax, 1
je .L967
mov edi, r13d
call setgid@PLT
mov edx, r13d
add eax, 1
je .L968
lea rsi, .LC160[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
.L800:
mov r12d, DWORD PTR drop_uid[rip]
cmp r12d, -1
je .L803
mov edi, r12d
call setuid@PLT
mov edx, r12d
add eax, 1
je .L969
lea rsi, .LC162[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
.L803:
mov rdi, QWORD PTR pidfile_name[rip]
test rdi, rdi
je .L805
mov edx, 384
mov esi, 2753
xor eax, eax
call open64@PLT
mov ebp, eax
cmp eax, -1
jne .L806
call __errno_location@PLT
mov rdx, QWORD PTR pidfile_name[rip]
mov eax, DWORD PTR [rax]
cmp eax, 11
je .L878
cmp eax, 17
je .L878
lea rsi, .LC167[rip]
mov edi, 1
xor eax, eax
call err@PLT
.p2align 4,,10
.p2align 3
.L718:
mov ecx, 10
mov rsi, r14
lea rdi, .LC97[rip]
repz cmpsb
seta al
sbb al, 0
test al, al
jne .L720
add r13d, 1
cmp ebx, r13d
jle .L970
mov r14, QWORD PTR 8[r15+rbp]
lea rsi, 48[rsp]
mov rdi, r14
call str_to_num
test eax, eax
je .L949
mov rax, QWORD PTR 48[rsp]
mov DWORD PTR max_connections[rip], eax
jmp .L717
.p2align 4,,10
.p2align 3
.L720:
mov ecx, 6
mov rsi, r14
lea rdi, .LC99[rip]
repz cmpsb
seta al
sbb al, 0
test al, al
jne .L723
add r13d, 1
cmp ebx, r13d
jle .L971
mov rax, QWORD PTR 8[r15+rbp]
mov QWORD PTR logfile_name[rip], rax
jmp .L717
.p2align 4,,10
.p2align 3
.L723:
mov ecx, 9
mov rsi, r14
lea rdi, .LC101[rip]
repz cmpsb
seta al
sbb al, 0
test al, al
jne .L725
mov DWORD PTR want_chroot[rip], 1
jmp .L717
.p2align 4,,10
.p2align 3
.L725:
mov ecx, 9
lea rdi, .LC102[rip]
mov rsi, r14
repz cmpsb
seta al
sbb al, 0
test al, al
je .L972
lea rsi, .LC103[rip]
mov rdi, r14
call strcmp@PLT
test eax, eax
jne .L727
add r13d, 1
cmp ebx, r13d
jle .L973
mov rax, QWORD PTR 8[r15+rbp]
mov QWORD PTR index_name[rip], rax
jmp .L717
.L972:
mov DWORD PTR want_daemon[rip], 1
jmp .L717
.L951:
lea rax, -1[r12+rax]
cmp BYTE PTR [rax], 47
jne .L710
mov BYTE PTR [rax], 0
jmp .L710
.L712:
lea rdx, pkgname[rip]
lea rsi, .LC133[rip]
xor eax, eax
lea rdi, server_hdr[rip]
call xasprintf
jmp .L767
.L806:
xor esi, esi
mov edi, eax
mov DWORD PTR pidfile_fd[rip], eax
call ftruncate64@PLT
add eax, 1
je .L974
call getpid@PLT
mov ecx, 16
mov edx, 1
lea r12, 496[rsp]
mov r9d, eax
lea r8, .LC169[rip]
mov rdi, r12
xor eax, eax
mov esi, 16
call __snprintf_chk@PLT
mov rdi, r12
call strlen@PLT
xor ecx, ecx
mov edi, ebp
mov rsi, r12
mov rdx, rax
call pwrite64@PLT
mov rdi, r12
mov rbx, rax
call strlen@PLT
cmp rbx, rax
jne .L975
.L805:
cmp DWORD PTR want_daemon[rip], 0
jne .L976
.L815:
mov eax, DWORD PTR running[rip]
lea r12, 368[rsp]
lea r13, 240[rsp]
test eax, eax
je .L855
.p2align 4,,10
.p2align 3
.L823:
mov edx, 16
mov rdi, r13
xor eax, eax
mov QWORD PTR 48[rsp], 60
mov QWORD PTR 56[rsp], 0
mov rcx, rdx
#APP
# 2383 "the_stack_data/99946.c" 1
cld; rep; stosq
# 0 "" 2
#NO_APP
mov rcx, rdx
mov rdi, r12
#APP
# 2384 "the_stack_data/99946.c" 1
cld; rep; stosq
# 0 "" 2
#NO_APP
movsx rdi, DWORD PTR sockin[rip]
mov r15d, 0
mov ebp, 1
call __fdelt_chk@PLT
mov esi, DWORD PTR sockin[rip]
mov r14, QWORD PTR connlist[rip]
mov r8, rax
mov eax, esi
sar eax, 31
shr eax, 26
lea ecx, [rsi+rax]
and ecx, 63
sub ecx, eax
mov eax, 1
sal rax, cl
or QWORD PTR 240[rsp+r8*8], rax
test esi, esi
cmovns r15d, esi
xor ecx, ecx
test r14, r14
jne .L826
jmp .L827
.p2align 4,,10
.p2align 3
.L977:
mov DWORD PTR 172[rbx], 1
mov DWORD PTR 48[rbx], 3
.L830:
test r14, r14
je .L828
.L826:
mov rbx, r14
mov rax, QWORD PTR now[rip]
mov r14, QWORD PTR [r14]
sub rax, QWORD PTR 40[rbx]
cmp rax, 59
jg .L977
mov eax, DWORD PTR 48[rbx]
test eax, eax
je .L866
sub eax, 1
cmp eax, 1
ja .L830
movsx rdi, DWORD PTR 16[rbx]
call __fdelt_chk@PLT
mov rdx, rbp
mov r8, rax
mov eax, DWORD PTR 16[rbx]
mov edi, eax
sar edi, 31
shr edi, 26
lea ecx, [rax+rdi]
and ecx, 63
sub ecx, edi
sal rdx, cl
or QWORD PTR 368[rsp+r8*8], rdx
cmp r15d, eax
mov ecx, 1
cmovl r15d, eax
test r14, r14
jne .L826
.L828:
test ecx, ecx
je .L827
mov r8, QWORD PTR [rsp]
xor ecx, ecx
lea edi, 1[r15]
mov rdx, r12
mov rsi, r13
call select@PLT
test eax, eax
jne .L868
.L833:
mov eax, DWORD PTR running[rip]
test eax, eax
jne .L823
.L855:
mov edi, DWORD PTR sockin[rip]
call xclose
mov rdi, QWORD PTR logfile[rip]
test rdi, rdi
je .L825
call fclose@PLT
.L825:
cmp QWORD PTR pidfile_name[rip], 0
je .L856
call pidfile_remove
.L856:
mov rbp, QWORD PTR connlist[rip]
test rbp, rbp
je .L858
mov rbx, QWORD PTR 0[rbp]
mov rax, QWORD PTR 8[rbp]
test rbx, rbx
je .L978
.L862:
mov QWORD PTR 8[rbx], rax
mov rdi, rbp
mov QWORD PTR [rax], rbx
call free_connection
mov rdi, rbp
mov rbp, rbx
call free@PLT
mov rbx, QWORD PTR 0[rbp]
mov rax, QWORD PTR 8[rbp]
test rbx, rbx
jne .L862
.L978:
mov QWORD PTR [rax], 0
mov rdi, rbp
call free_connection
mov rdi, rbp
call free@PLT
.L858:
mov rbp, QWORD PTR mime_map_size[rip]
mov r12, QWORD PTR mime_map[rip]
test rbp, rbp
je .L865
sal rbp, 4
mov rbx, r12
add rbp, r12
.p2align 4,,10
.p2align 3
.L864:
mov rdi, QWORD PTR [rbx]
add rbx, 16
call free@PLT
mov rdi, QWORD PTR -8[rbx]
call free@PLT
cmp rbx, rbp
jne .L864
.L865:
mov rdi, r12
call free@PLT
mov rdi, QWORD PTR forward_map[rip]
test rdi, rdi
je .L861
call free@PLT
.L861:
mov rdi, QWORD PTR keep_alive_field[rip]
call free@PLT
mov rdi, QWORD PTR wwwroot[rip]
call free@PLT
mov rdi, QWORD PTR server_hdr[rip]
call free@PLT
mov rsi, QWORD PTR [rsp]
xor edi, edi
call getrusage@PLT
mov rax, QWORD PTR 72[rsp]
mov ecx, 10000
mov r8d, DWORD PTR 64[rsp]
lea rsi, .LC182[rip]
mov edi, 1
cqo
idiv rcx
mov r9, rax
mov rax, QWORD PTR 56[rsp]
cqo
idiv rcx
mov edx, DWORD PTR 48[rsp]
mov ecx, eax
xor eax, eax
call __printf_chk@PLT
mov rdx, QWORD PTR num_requests[rip]
lea rsi, .LC183[rip]
xor eax, eax
mov edi, 1
call __printf_chk@PLT
mov rcx, QWORD PTR total_out[rip]
xor eax, eax
mov rdx, QWORD PTR total_in[rip]
lea rsi, .LC184[rip]
mov edi, 1
call __printf_chk@PLT
mov rax, QWORD PTR 520[rsp]
sub rax, QWORD PTR fs:40
jne .L979
add rsp, 536
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L866:
.cfi_restore_state
movsx rdi, DWORD PTR 16[rbx]
call __fdelt_chk@PLT
mov rdx, rbp
mov r8, rax
mov eax, DWORD PTR 16[rbx]
mov edi, eax
sar edi, 31
shr edi, 26
lea ecx, [rax+rdi]
and ecx, 63
sub ecx, edi
sal rdx, cl
or QWORD PTR 240[rsp+r8*8], rdx
cmp r15d, eax
mov ecx, 1
cmovl r15d, eax
jmp .L830
.p2align 4,,10
.p2align 3
.L827:
xor r8d, r8d
xor ecx, ecx
lea edi, 1[r15]
mov rdx, r12
mov rsi, r13
call select@PLT
test eax, eax
je .L980
.L868:
cmp eax, -1
jne .L832
call __errno_location@PLT
cmp DWORD PTR [rax], 4
je .L833
lea rsi, .LC178[rip]
mov edi, 1
xor eax, eax
call err@PLT
.p2align 4,,10
.p2align 3
.L832:
xor edi, edi
call time@PLT
movsx rdi, DWORD PTR sockin[rip]
mov QWORD PTR now[rip], rax
call __fdelt_chk@PLT
mov r15d, DWORD PTR sockin[rip]
mov r8, rax
mov eax, r15d
sar eax, 31
shr eax, 26
lea ecx, [r15+rax]
and ecx, 63
sub ecx, eax
mov eax, 1
sal rax, cl
and rax, QWORD PTR 240[rsp+r8*8]
jne .L981
.L834:
mov r15, QWORD PTR connlist[rip]
mov ebx, 1
test r15, r15
jne .L844
jmp .L833
.p2align 4,,10
.p2align 3
.L849:
test r15, r15
je .L833
.L844:
mov rbp, r15
mov r15, QWORD PTR [r15]
mov eax, DWORD PTR 48[rbp]
cmp eax, 1
je .L852
cmp eax, 2
je .L853
test eax, eax
je .L982
.L846:
cmp eax, 3
jne .L849
mov eax, DWORD PTR 172[rbp]
test eax, eax
je .L850
mov rax, QWORD PTR 0[rbp]
test rax, rax
je .L851
mov rcx, QWORD PTR 8[rbp]
mov QWORD PTR 8[rax], rcx
.L851:
mov rcx, QWORD PTR 8[rbp]
mov rdi, rbp
mov QWORD PTR [rcx], rax
call free_connection
mov rdi, rbp
call free@PLT
jmp .L849
.p2align 4,,10
.p2align 3
.L982:
movsx rdi, DWORD PTR 16[rbp]
call __fdelt_chk@PLT
mov r8, rax
mov eax, DWORD PTR 16[rbp]
mov esi, eax
sar esi, 31
shr esi, 26
lea ecx, [rax+rsi]
mov rax, rbx
and ecx, 63
sub ecx, esi
sal rax, cl
and rax, QWORD PTR 240[rsp+r8*8]
jne .L845
.L948:
mov eax, DWORD PTR 48[rbp]
jmp .L846
.p2align 4,,10
.p2align 3
.L853:
movsx rdi, DWORD PTR 16[rbp]
call __fdelt_chk@PLT
mov r8, rax
mov eax, DWORD PTR 16[rbp]
mov esi, eax
sar esi, 31
shr esi, 26
lea ecx, [rax+rsi]
mov rax, rbx
and ecx, 63
sub ecx, esi
sal rax, cl
and rax, QWORD PTR 368[rsp+r8*8]
je .L948
mov rdi, rbp
call poll_send_reply
jmp .L948
.p2align 4,,10
.p2align 3
.L852:
movsx rdi, DWORD PTR 16[rbp]
call __fdelt_chk@PLT
mov r8, rax
mov eax, DWORD PTR 16[rbp]
mov esi, eax
sar esi, 31
shr esi, 26
lea ecx, [rax+rsi]
mov rax, rbx
and ecx, 63
sub ecx, esi
sal rax, cl
and rax, QWORD PTR 368[rsp+r8*8]
je .L948
mov rdi, rbp
call poll_send_header
mov eax, DWORD PTR 48[rbp]
jmp .L846
.L850:
mov r14d, DWORD PTR 16[rbp]
mov DWORD PTR 16[rbp], -1
mov rdi, rbp
call free_connection
mov eax, 1
mov rdi, rbp
mov DWORD PTR 16[rbp], r14d
sal rax, 32
mov QWORD PTR 56[rbp], 0
mov QWORD PTR 168[rbp], rax
mov eax, 4294967295
sal rax, 32
mov QWORD PTR 64[rbp], 0
mov QWORD PTR 72[rbp], 0
mov QWORD PTR 80[rbp], 0
mov QWORD PTR 88[rbp], 0
mov QWORD PTR 96[rbp], 0
mov QWORD PTR 104[rbp], 0
mov QWORD PTR 112[rbp], 0
mov QWORD PTR 120[rbp], 0
mov QWORD PTR 128[rbp], 0
mov QWORD PTR 136[rbp], 0
mov QWORD PTR 144[rbp], 0
mov QWORD PTR 152[rbp], 0
mov QWORD PTR 160[rbp], 0
mov QWORD PTR 184[rbp], 0
mov QWORD PTR 192[rbp], rax
mov QWORD PTR 200[rbp], 0
mov QWORD PTR 208[rbp], 0
mov QWORD PTR 216[rbp], 0
mov QWORD PTR 224[rbp], 0
mov DWORD PTR 48[rbp], 0
call poll_recv_request
jmp .L849
.L845:
mov rdi, rbp
call poll_recv_request
mov eax, DWORD PTR 48[rbp]
jmp .L846
.L776:
lea r13, 240[rsp]
mov edx, 16
mov edi, ebp
mov WORD PTR 240[rsp], 2
mov rsi, r13
mov WORD PTR 242[rsp], ax
call bind@PLT
add eax, 1
je .L950
lea rax, 44[rsp]
mov rsi, r13
mov edi, ebp
mov DWORD PTR 44[rsp], 16
mov rdx, rax
mov QWORD PTR 8[rsp], rax
call getsockname@PLT
add eax, 1
je .L781
lea rdi, 244[rsp]
call get_address_text
mov ecx, ebx
mov edi, 1
lea rsi, .LC140[rip]
mov rdx, rax
xor eax, eax
call __printf_chk@PLT
jmp .L779
.L768:
pxor xmm0, xmm0
movups XMMWORD PTR 240[rsp], xmm0
test rsi, rsi
je .L772
mov rdi, rsi
call inet_addr@PLT
mov DWORD PTR 244[rsp], eax
add eax, 1
je .L773
.L772:
xor edx, edx
mov esi, 1
mov edi, 2
call socket@PLT
mov DWORD PTR sockin[rip], eax
jmp .L771
.L960:
mov rax, QWORD PTR stdout[rip]
mov QWORD PTR logfile[rip], rax
jmp .L785
.L981:
mov edi, 232
call malloc@PLT
mov rbp, rax
test rax, rax
je .L983
pxor xmm0, xmm0
mov DWORD PTR 16[rax], -1
movups XMMWORD PTR 20[rax], xmm0
mov rax, QWORD PTR now[rip]
mov QWORD PTR 56[rbp], 0
mov QWORD PTR 40[rbp], rax
mov eax, 1
sal rax, 32
mov QWORD PTR 64[rbp], 0
mov QWORD PTR 168[rbp], rax
mov eax, 4294967295
sal rax, 32
cmp DWORD PTR inet6[rip], 0
mov QWORD PTR 72[rbp], 0
mov QWORD PTR 80[rbp], 0
mov QWORD PTR 88[rbp], 0
mov QWORD PTR 96[rbp], 0
mov QWORD PTR 104[rbp], 0
mov QWORD PTR 112[rbp], 0
mov QWORD PTR 120[rbp], 0
mov QWORD PTR 128[rbp], 0
mov QWORD PTR 136[rbp], 0
mov QWORD PTR 144[rbp], 0
mov QWORD PTR 152[rbp], 0
mov QWORD PTR 160[rbp], 0
mov QWORD PTR 184[rbp], 0
mov QWORD PTR 192[rbp], rax
mov QWORD PTR 200[rbp], 0
mov QWORD PTR 208[rbp], 0
mov QWORD PTR 216[rbp], 0
mov QWORD PTR 224[rbp], 0
mov DWORD PTR 48[rbp], 3
jne .L984
mov rdx, QWORD PTR 8[rsp]
lea rsi, 192[rsp]
mov edi, r15d
mov DWORD PTR 44[rsp], 16
movups XMMWORD PTR 192[rsp], xmm0
call accept@PLT
mov DWORD PTR 16[rbp], eax
.L837:
mov r15d, DWORD PTR 16[rbp]
cmp r15d, -1
je .L985
xor eax, eax
mov esi, 3
mov edi, r15d
call fcntl64@PLT
cmp eax, -1
je .L986
or ah, 8
mov esi, 4
mov edi, r15d
mov edx, eax
xor eax, eax
call fcntl64@PLT
add eax, 1
je .L987
cmp DWORD PTR inet6[rip], 0
mov DWORD PTR 48[rbp], 0
je .L841
movdqu xmm1, XMMWORD PTR 216[rsp]
movups XMMWORD PTR 20[rbp], xmm1
.L842:
mov rax, QWORD PTR connlist[rip]
mov QWORD PTR 0[rbp], rax
test rax, rax
je .L843
mov QWORD PTR 8[rax], rbp
.L843:
lea rax, connlist[rip]
mov rdi, rbp
mov QWORD PTR connlist[rip], rbp
mov QWORD PTR 8[rbp], rax
call poll_recv_request
jmp .L834
.L727:
lea rsi, .LC105[rip]
mov rdi, r14
call strcmp@PLT
test eax, eax
je .L988
lea rsi, .LC106[rip]
mov rdi, r14
call strcmp@PLT
test eax, eax
jne .L730
add r13d, 1
cmp ebx, r13d
jle .L989
mov r14, QWORD PTR 8[r15+rbp]
lea rsi, .LC108[rip]
mov rdi, r14
call fopen64@PLT
mov rbp, rax
test rax, rax
je .L990
mov DWORD PTR 8[rsp], r13d
mov DWORD PTR 20[rsp], ebx
mov QWORD PTR 24[rsp], r15
.L732:
mov rdi, rbp
call ftell@PLT
mov r13, rax
cmp rax, -1
je .L739
xor r14d, r14d
jmp .L733
.p2align 4,,10
.p2align 3
.L991:
add r14, 1
.L733:
mov rdi, rbp
call fgetc@PLT
cmp eax, -1
sete dl
cmp eax, 10
je .L734
test dl, dl
jne .L734
cmp eax, 13
jne .L991
mov rdi, rbp
call ftell@PLT
mov QWORD PTR [rsp], rax
add rax, 1
jne .L871
.L739:
lea rsi, .LC110[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L984:
lea rsi, 208[rsp]
xor eax, eax
mov ecx, 7
mov rdx, QWORD PTR 8[rsp]
mov rdi, rsi
mov DWORD PTR 44[rsp], 28
rep stosd
mov edi, r15d
call accept@PLT
mov DWORD PTR 16[rbp], eax
jmp .L837
.L988:
mov DWORD PTR no_listing[rip], 1
jmp .L717
.L955:
lea rsi, .LC71[rip]
jmp .L769
.L734:
mov ebx, eax
test r14, r14
jne .L877
test dl, dl
je .L877
mov rdi, rbp
mov r13d, DWORD PTR 8[rsp]
mov ebx, DWORD PTR 20[rsp]
mov r15, QWORD PTR 24[rsp]
call fclose@PLT
jmp .L717
.L959:
lea rdi, .LC142[rip]
call puts@PLT
jmp .L783
.L962:
lea rdi, lifeline[rip]
call pipe@PLT
add eax, 1
je .L992
xor edx, edx
xor eax, eax
lea rdi, .LC146[rip]
mov esi, 2
call open64@PLT
mov DWORD PTR fd_null[rip], eax
add eax, 1
je .L993
call fork@PLT
mov ebp, eax
cmp eax, -1
je .L994
test eax, eax
je .L786
mov edi, DWORD PTR lifeline[rip+4]
call close@PLT
add eax, 1
je .L995
.L790:
mov edi, DWORD PTR lifeline[rip]
lea rsi, 496[rsp]
mov edx, 1
call read@PLT
add rax, 1
je .L996
.L791:
mov rsi, QWORD PTR [rsp]
mov edx, 1
mov edi, ebp
call waitpid@PLT
cmp eax, -1
je .L997
test eax, eax
jne .L793
xor edi, edi
call exit@PLT
.L966:
call tzset@PLT
mov r12, QWORD PTR wwwroot[rip]
mov rdi, r12
call chdir@PLT
add eax, 1
je .L998
mov rdi, r12
call chroot@PLT
mov rdx, r12
add eax, 1
je .L999
lea rsi, .LC157[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov rax, QWORD PTR wwwroot[rip]
mov BYTE PTR [rax], 0
jmp .L797
.L976:
cmp DWORD PTR fd_null[rip], -1
je .L815
call setsid@PLT
add eax, 1
je .L1000
mov edi, DWORD PTR lifeline[rip]
call close@PLT
add eax, 1
je .L1001
.L818:
mov edi, DWORD PTR lifeline[rip+4]
call close@PLT
add eax, 1
je .L1002
.L819:
mov edi, DWORD PTR fd_null[rip]
xor esi, esi
call dup2@PLT
add eax, 1
je .L1003
.L820:
mov edi, DWORD PTR fd_null[rip]
mov esi, 1
call dup2@PLT
add eax, 1
je .L1004
.L821:
mov edi, DWORD PTR fd_null[rip]
mov esi, 2
call dup2@PLT
add eax, 1
je .L1005
.L822:
mov edi, DWORD PTR fd_null[rip]
cmp edi, 2
jle .L815
call close@PLT
jmp .L815
.L841:
mov eax, DWORD PTR 196[rsp]
mov DWORD PTR 20[rbp], eax
jmp .L842
.L877:
mov rdi, rbp
call ftell@PLT
mov QWORD PTR [rsp], rax
add rax, 1
je .L739
cmp ebx, 13
je .L871
.L740:
lea rbx, 1[r14]
mov rdi, rbx
call malloc@PLT
mov r15, rax
test rax, rax
je .L1006
xor edx, edx
mov rsi, r13
mov rdi, rbp
call fseek@PLT
add eax, 1
je .L744
mov rcx, rbp
mov rdx, r14
mov esi, 1
mov rdi, r15
call fread@PLT
cmp r14, rax
jne .L1007
mov BYTE PTR [r15+r14], 0
mov rsi, QWORD PTR [rsp]
xor edx, edx
mov rdi, rbp
call fseek@PLT
add eax, 1
je .L744
mov rdi, r15
call parse_mimetype_line
mov rdi, r15
call free@PLT
jmp .L732
.L878:
xor esi, esi
mov rdi, rdx
xor eax, eax
call open64@PLT
mov ebp, eax
cmp eax, -1
je .L1008
lea r12, 496[rsp]
mov edx, 15
mov edi, eax
mov rsi, r12
call read@PLT
mov rbx, rax
cmp eax, -1
je .L1009
mov edi, ebp
movsx rbx, ebx
call xclose
mov rsi, QWORD PTR [rsp]
mov rdi, r12
mov BYTE PTR 496[rsp+rbx], 0
call str_to_num
test eax, eax
je .L1010
mov edx, DWORD PTR 48[rsp]
lea rsi, .LC166[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L871:
mov rdi, rbp
call fgetc@PLT
cmp eax, 10
jne .L740
add QWORD PTR [rsp], 1
jmp .L740
.L730:
lea rsi, .LC113[rip]
mov rdi, r14
call strcmp@PLT
test eax, eax
je .L1011
lea rsi, .LC115[rip]
mov rdi, r14
call strcmp@PLT
test eax, eax
jne .L748
add r13d, 1
cmp ebx, r13d
jle .L1012
lea r14, 8[r15+rbp]
mov rdi, QWORD PTR [r14]
call getpwnam@PLT
test rax, rax
je .L1013
.L750:
mov eax, DWORD PTR 16[rax]
mov DWORD PTR drop_uid[rip], eax
jmp .L717
.L1011:
add r13d, 1
cmp ebx, r13d
jle .L1014
mov rax, QWORD PTR 8[r15+rbp]
mov QWORD PTR default_mimetype[rip], rax
jmp .L717
.L996:
lea rdi, .LC150[rip]
xor eax, eax
call warn@PLT
jmp .L791
.L995:
lea rdi, .LC149[rip]
xor eax, eax
call warn@PLT
jmp .L790
.L1004:
lea rdi, .LC175[rip]
xor eax, eax
call warn@PLT
jmp .L821
.L1003:
lea rdi, .LC174[rip]
xor eax, eax
call warn@PLT
jmp .L820
.L1002:
lea rdi, .LC173[rip]
xor eax, eax
call warn@PLT
jmp .L819
.L1001:
lea rdi, .LC172[rip]
xor eax, eax
call warn@PLT
jmp .L818
.L1005:
lea rdi, .LC176[rip]
xor eax, eax
call warn@PLT
jmp .L822
.L748:
lea rsi, .LC118[rip]
mov rdi, r14
call strcmp@PLT
test eax, eax
jne .L751
add r13d, 1
cmp ebx, r13d
jle .L1015
lea r14, 8[r15+rbp]
mov rdi, QWORD PTR [r14]
call getgrnam@PLT
test rax, rax
je .L1016
.L753:
mov eax, DWORD PTR 16[rax]
mov DWORD PTR drop_gid[rip], eax
jmp .L717
.L952:
lea rsi, .LC94[rip]
mov edi, 1
call errx@PLT
.L949:
mov rdx, r14
lea rsi, .LC1[rip]
mov edi, 1
call errx@PLT
.L751:
lea rsi, .LC121[rip]
mov rdi, r14
call strcmp@PLT
test eax, eax
jne .L754
add r13d, 1
cmp ebx, r13d
jle .L1017
mov rax, QWORD PTR 8[r15+rbp]
mov QWORD PTR pidfile_name[rip], rax
jmp .L717
.L1013:
mov rdi, QWORD PTR [r14]
call xstr_to_num
mov rdi, rax
call getpwuid@PLT
test rax, rax
jne .L750
mov rdx, QWORD PTR [r14]
lea rsi, .LC117[rip]
mov edi, 1
call errx@PLT
.L954:
lea rsi, .LC96[rip]
mov edi, 1
call errx@PLT
.L754:
lea rsi, .LC123[rip]
mov rdi, r14
call strcmp@PLT
test eax, eax
jne .L756
mov DWORD PTR want_keepalive[rip], 0
jmp .L717
.L756:
lea rsi, .LC124[rip]
mov rdi, r14
call strcmp@PLT
test eax, eax
jne .L757
mov DWORD PTR want_accf[rip], 1
jmp .L717
.L965:
lea rsi, .LC154[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L1017:
lea rsi, .LC122[rip]
mov edi, 1
call errx@PLT
.L757:
lea rsi, .LC125[rip]
mov rdi, r14
call strcmp@PLT
test eax, eax
jne .L758
lea eax, 1[r13]
cmp ebx, eax
jle .L1018
add r13d, 2
mov rdx, QWORD PTR 8[r15+rbp]
cmp ebx, r13d
jle .L1019
mov rax, QWORD PTR forward_map_size[rip]
mov rdi, QWORD PTR forward_map[rip]
mov QWORD PTR [rsp], rdx
mov rbp, QWORD PTR 16[r15+rbp]
lea r14, 1[rax]
mov QWORD PTR forward_map_size[rip], r14
sal r14, 4
mov rsi, r14
call realloc@PLT
mov rdx, QWORD PTR [rsp]
test rax, rax
je .L1020
mov QWORD PTR forward_map[rip], rax
lea rax, -16[rax+r14]
mov QWORD PTR [rax], rdx
mov QWORD PTR 8[rax], rbp
jmp .L717
.L1000:
lea rsi, .LC171[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L999:
lea rsi, .LC156[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L998:
mov rdx, r12
lea rsi, .LC155[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L793:
mov eax, DWORD PTR 48[rsp]
movzx edi, ah
call exit@PLT
.L1020:
mov rdi, r14
call xrealloc.part.0
.L1019:
lea rsi, .LC127[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L1018:
lea rsi, .LC126[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L758:
lea rsi, .LC128[rip]
mov rdi, r14
call strcmp@PLT
test eax, eax
jne .L762
add r13d, 1
cmp ebx, r13d
jle .L1021
mov rax, QWORD PTR 8[r15+rbp]
mov QWORD PTR forward_all_url[rip], rax
jmp .L717
.L994:
lea rsi, .LC148[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L1014:
lea rsi, .LC114[rip]
mov edi, 1
call errx@PLT
.L1010:
mov rdx, r12
lea rsi, .LC165[rip]
mov edi, 1
call err@PLT
.L1009:
lea rsi, .LC164[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L1008:
lea rsi, .LC163[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L1007:
mov rdx, rax
mov rcx, r14
mov edi, 1
xor eax, eax
lea rsi, .LC112[rip]
call errx@PLT
.L744:
lea rsi, .LC111[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L1006:
mov rdx, rbx
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L1021:
lea rsi, .LC129[rip]
mov edi, 1
call errx@PLT
.L762:
lea rsi, .LC130[rip]
mov rdi, r14
call strcmp@PLT
test eax, eax
jne .L764
mov DWORD PTR want_server_id[rip], 0
jmp .L717
.L993:
lea rsi, .LC147[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L992:
lea rsi, .LC145[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L989:
lea rsi, .LC107[rip]
mov edi, 1
call errx@PLT
.L987:
lea rsi, .LC181[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L986:
lea rsi, .LC180[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L985:
lea rsi, .LC179[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L975:
call __errno_location@PLT
mov ebp, DWORD PTR [rax]
mov rbx, rax
call pidfile_remove
lea rsi, .LC170[rip]
mov edi, 1
xor eax, eax
mov DWORD PTR [rbx], ebp
call err@PLT
.L974:
call __errno_location@PLT
mov ebp, DWORD PTR [rax]
mov rbx, rax
call pidfile_remove
lea rsi, .LC168[rip]
mov edi, 1
xor eax, eax
mov DWORD PTR [rbx], ebp
call err@PLT
.L990:
mov rdx, r14
lea rsi, .LC109[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L950:
mov edx, ebx
lea rsi, .LC137[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L781:
lea rsi, .LC138[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L958:
lea rsi, .LC141[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L983:
mov edx, 232
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L969:
lea rsi, .LC161[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L980:
lea rsi, .LC177[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L979:
call __stack_chk_fail@PLT
.L957:
lea rsi, .LC136[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L971:
lea rsi, .LC100[rip]
mov edi, 1
call errx@PLT
.L970:
lea rsi, .LC98[rip]
mov edi, 1
call errx@PLT
.L973:
lea rsi, .LC104[rip]
mov edi, 1
call errx@PLT
.L1012:
lea rsi, .LC116[rip]
mov edi, 1
call errx@PLT
.L1016:
mov rdi, QWORD PTR [r14]
call xstr_to_num
mov rdi, rax
call getgrgid@PLT
test rax, rax
jne .L753
mov rdx, QWORD PTR [r14]
lea rsi, .LC120[rip]
mov edi, 1
call errx@PLT
.L1015:
lea rsi, .LC119[rip]
mov edi, 1
call errx@PLT
.L997:
lea rsi, .LC151[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L773:
lea rsi, .LC134[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.L967:
mov edx, r13d
lea rsi, .LC158[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L968:
lea rsi, .LC159[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L956:
lea rsi, .LC135[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L964:
lea rsi, .LC153[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L961:
mov rdx, QWORD PTR logfile_name[rip]
lea rsi, .LC144[rip]
mov edi, 1
call err@PLT
.L963:
lea rsi, .LC152[rip]
mov edi, 1
xor eax, eax
call err@PLT
.L764:
lea rsi, .LC131[rip]
mov rdi, r14
call strcmp@PLT
test eax, eax
jne .L765
mov DWORD PTR inet6[rip], 1
jmp .L717
.L765:
mov rdx, r14
lea rsi, .LC132[rip]
mov edi, 1
xor eax, eax
call errx@PLT
.cfi_endproc
.LFE158:
.size main, .-main
.section .rodata
.align 16
.type hex.0, @object
.size hex.0, 17
hex.0:
.string "0123456789ABCDEF"
.set hex.1,hex.0
.local text_addr.2
.comm text_addr.2,46,32
.data
.align 4
.type pidfile_fd, @object
.size pidfile_fd, 4
pidfile_fd:
.long -1
.align 4
.type fd_null, @object
.size fd_null, 4
fd_null:
.long -1
.align 8
.type lifeline, @object
.size lifeline, 8
lifeline:
.long -1
.long -1
.local _generated_on_buf
.comm _generated_on_buf,72,32
.section .data.rel.local,"aw"
.align 8
.type default_mimetype, @object
.size default_mimetype, 8
default_mimetype:
.quad octet_stream
.section .rodata
.align 16
.type octet_stream, @object
.size octet_stream, 25
octet_stream:
.string "application/octet-stream"
.section .rodata.str1.1
.LC185:
.string "application/pdf pdf"
.LC186:
.string "application/xml xsl xml"
.LC187:
.string "application/xml-dtd dtd"
.LC188:
.string "application/xslt+xml xslt"
.LC189:
.string "application/zip zip"
.LC190:
.string "audio/mpeg mp2 mp3 mpga"
.LC191:
.string "image/gif gif"
.LC192:
.string "image/jpeg jpeg jpe jpg"
.LC193:
.string "image/png png"
.LC194:
.string "text/css css"
.LC195:
.string "text/html html htm"
.LC196:
.string "text/javascript js"
.LC197:
.string "text/plain txt asc"
.LC198:
.string "video/mpeg mpeg mpe mpg"
.LC199:
.string "video/quicktime qt mov"
.LC200:
.string "video/x-msvideo avi"
.section .data.rel.ro.local,"aw"
.align 32
.type default_extension_map, @object
.size default_extension_map, 144
default_extension_map:
.quad .LC70
.quad .LC185
.quad .LC186
.quad .LC187
.quad .LC188
.quad .LC189
.quad .LC190
.quad .LC191
.quad .LC192
.quad .LC193
.quad .LC194
.quad .LC195
.quad .LC196
.quad .LC197
.quad .LC198
.quad .LC199
.quad .LC200
.quad 0
.data
.align 4
.type drop_gid, @object
.size drop_gid, 4
drop_gid:
.long -1
.align 4
.type drop_uid, @object
.size drop_uid, 4
drop_uid:
.long -1
.align 4
.type running, @object
.size running, 4
running:
.long 1
.local total_out
.comm total_out,8,8
.local total_in
.comm total_in,8,8
.local num_requests
.comm num_requests,8,8
.local server_hdr
.comm server_hdr,8,8
.align 4
.type want_server_id, @object
.size want_server_id, 4
want_server_id:
.long 1
.align 4
.type want_keepalive, @object
.size want_keepalive, 4
want_keepalive:
.long 1
.local want_accf
.comm want_accf,4,4
.local want_daemon
.comm want_daemon,4,4
.local want_chroot
.comm want_chroot,4,4
.local pidfile_name
.comm pidfile_name,8,8
.local logfile
.comm logfile,8,8
.local logfile_name
.comm logfile_name,8,8
.local wwwroot
.comm wwwroot,8,8
.local inet6
.comm inet6,4,4
.align 4
.type sockin, @object
.size sockin, 4
sockin:
.long -1
.local no_listing
.comm no_listing,4,4
.section .rodata.str1.1
.LC201:
.string "index.html"
.section .data.rel.local
.align 8
.type index_name, @object
.size index_name, 8
index_name:
.quad .LC201
.data
.align 4
.type max_connections, @object
.size max_connections, 4
max_connections:
.long -1
.align 2
.type bindport, @object
.size bindport, 2
bindport:
.value 8080
.local bindaddr
.comm bindaddr,8,8
.local now
.comm now,8,8
.local keep_alive_field
.comm keep_alive_field,8,8
.local longest_ext
.comm longest_ext,8,8
.local mime_map_size
.comm mime_map_size,8,8
.local mime_map
.comm mime_map,8,8
.local forward_all_url
.comm forward_all_url,8,8
.local forward_map_size
.comm forward_map_size,8,8
.local forward_map
.comm forward_map,8,8
.local connlist
.comm connlist,8,8
.section .rodata
.align 32
.type copyright, @object
.size copyright, 37
copyright:
.string "copyright (c) 2003-2016 Emil Mikulic"
.align 16
.type pkgname, @object
.size pkgname, 24
pkgname:
.string "darkhttpd/1.12.from.git"
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99946.c"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type logencode, %function
logencode:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldrb r2, [r0] @ zero_extendqisi2
cmp r2, #0
beq .L6
push {r4, r5, r6, lr}
mov r3, #0
mov r6, #37
ldr r5, .L13
.L5:
sub ip, r2, #34
clz ip, ip
sub lr, r2, #32
lsr ip, ip, #5
cmp lr, #94
orrhi ip, ip, #1
add lr, r3, #1
cmp ip, #0
add r4, r3, #2
strbeq r2, [r1, r3]
add ip, r1, lr
moveq r3, lr
beq .L4
strb r6, [r1, r3]
ldrb r2, [r0] @ zero_extendqisi2
add r3, r3, #3
ldrb r2, [r5, r2, lsr #4] @ zero_extendqisi2
add ip, r1, r3
strb r2, [r1, lr]
ldrb r2, [r0] @ zero_extendqisi2
and r2, r2, #15
ldrb r2, [r5, r2] @ zero_extendqisi2
strb r2, [r1, r4]
.L4:
ldrb r2, [r0, #1]! @ zero_extendqisi2
cmp r2, #0
bne .L5
mov r3, #0
strb r3, [ip]
pop {r4, r5, r6, pc}
.L6:
mov r3, #0
strb r3, [r1]
bx lr
.L14:
.align 2
.L13:
.word .LANCHOR0
.size logencode, .-logencode
.align 2
.syntax unified
.arm
.fpu softvfp
.type stop_running, %function
stop_running:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r2, #0
ldr r3, .L16
str r2, [r3]
bx lr
.L17:
.align 2
.L16:
.word .LANCHOR1
.size stop_running, .-stop_running
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "can't allocate %zu bytes\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type xmalloc, %function
xmalloc:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, r0
bl malloc
cmp r0, #0
popne {r4, pc}
mov r2, r4
mov r0, #1
ldr r1, .L21
bl errx
.L22:
.align 2
.L21:
.word .LC0
.size xmalloc, .-xmalloc
.align 2
.syntax unified
.arm
.fpu softvfp
.type split_string, %function
split_string:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
sub r4, r2, r1
mov r5, r1
mov r6, r0
add r0, r4, #1
bl xmalloc
add r1, r6, r5
mov r2, r4
mov r5, r0
bl memcpy
mov r3, #0
mov r0, r5
strb r3, [r5, r4]
pop {r4, r5, r6, pc}
.size split_string, .-split_string
.align 2
.syntax unified
.arm
.fpu softvfp
.type xstrdup, %function
xstrdup:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r5, r0
bl strlen
add r4, r0, #1
mov r0, r4
bl xmalloc
mov r2, r4
mov r4, r0
mov r1, r5
bl memcpy
mov r0, r4
pop {r4, r5, r6, pc}
.size xstrdup, .-xstrdup
.align 2
.syntax unified
.arm
.fpu softvfp
.type mime_mapping_cmp, %function
mime_mapping_cmp:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r0, [r0]
ldr r1, [r1]
b strcmp
.size mime_mapping_cmp, .-mime_mapping_cmp
.align 2
.syntax unified
.arm
.fpu softvfp
.type dlent_cmp, %function
dlent_cmp:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r2, [r0]
ldr r3, [r1]
ldr r0, [r2]
ldr r1, [r3]
b strcmp
.size dlent_cmp, .-dlent_cmp
.align 2
.syntax unified
.arm
.fpu softvfp
.type url_content_type, %function
url_content_type:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
mov r5, r0
bl strlen
sub lr, r0, #1
cmp lr, #0
ble .L30
ldr r6, .L54
mov r3, lr
ldr r4, [r6]
add r2, r5, r0
b .L31
.L53:
cmp r4, ip
blt .L36
subs r3, r3, #1
beq .L32
.L31:
ldrb r1, [r2, #-1]! @ zero_extendqisi2
sub ip, lr, r3
cmp r1, #46
mov r1, r3
bne .L53
.L33:
ldr r8, [r6, #4]
ldr r7, [r6, #8]
mov r6, #0
add r1, r1, #1
add r5, r5, r1
.L38:
add r4, r7, r6
cmp r7, r6
lsr r4, r4, #1
bls .L36
.L40:
mov r0, r5
ldr r1, [r8, r4, lsl #3]
bl strcmp
cmp r0, #0
add r3, r8, r4, lsl #3
blt .L41
beq .L39
add r6, r4, #1
add r4, r7, r6
cmp r7, r6
lsr r4, r4, #1
bhi .L40
.L36:
ldr r3, .L54+4
ldr r0, [r3, #4]
pop {r4, r5, r6, r7, r8, pc}
.L41:
mov r7, r4
b .L38
.L30:
cmn lr, #1
beq .L36
.L32:
ldrb r3, [r5] @ zero_extendqisi2
cmp r3, #46
bne .L36
mov r1, #0
ldr r6, .L54
b .L33
.L39:
ldr r0, [r3, #4]
pop {r4, r5, r6, r7, r8, pc}
.L55:
.align 2
.L54:
.word .LANCHOR2
.word .LANCHOR1
.size url_content_type, .-url_content_type
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC1:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type str_to_num, %function
str_to_num:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, lr}
ldr r3, .L67
sub sp, sp, #12
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
mov r6, r0
mov r7, r1
bl __errno_location
mov r5, #0
mov r4, r0
mov r2, #10
mov r0, r6
mov r1, sp
str r5, [r4]
bl strtoll
mov r2, r0
ldr r0, [sp]
ldrb r0, [r0] @ zero_extendqisi2
cmp r0, r5
movne r0, r5
bne .L56
cmp r1, #-2147483648
cmpeq r2, #0
mov r3, r1
beq .L65
mvn r9, #-2147483648
mvn r8, #0
cmp r1, r9
cmpeq r2, r8
bne .L59
.L65:
ldr r1, [r4]
cmp r1, #34
beq .L56
.L59:
mov r0, #1
stm r7, {r2-r3}
.L56:
ldr r3, .L67
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L66
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, pc}
.L66:
bl __stack_chk_fail
.L68:
.align 2
.L67:
.word .LC1
.size str_to_num, .-str_to_num
.section .rodata.cst4
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type poll_send_reply, %function
poll_send_reply:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, lr}
ldr r3, [r0, #124]
ldr r5, [r0, #160]
ldr r6, [r0, #152]
ldr r2, .L80
sub sp, sp, #20
cmp r3, #0
mov r4, r0
ldr r2, [r2]
str r2, [sp, #12]
mov r2,#0
ldr r7, [r0, #144]
ldr r9, [r0, #148]
ldr r8, [r0, #164]
sub r6, r6, r5
bne .L70
ldr r1, [r0, #128]
add r5, r5, r7
mov r2, r6
ldr r0, [r0, #8]
add r1, r1, r5
bl send
.L71:
ldr ip, .L80+4
cmp r0, #0
ldr r3, [ip, #12]
str r3, [r4, #28]
ble .L78
add r3, r4, #160
ldmia r3, {r2-r3}
add r7, r4, #168
ldmia r7, {r6-r7}
add r9, ip, #16
ldmia r9, {r8-r9}
adds r2, r2, r0
adc r3, r3, r0, asr #31
adds r6, r6, r0
adc r7, r7, r0, asr #31
adds r8, r8, r0
adc r9, r9, r0, asr #31
add r1, r4, #152
ldmia r1, {r0-r1}
cmp r3, r1
cmpeq r2, r0
str r2, [r4, #160]
str r3, [r4, #164]
moveq r3, #3
str r6, [r4, #168]
str r7, [r4, #172]
str r8, [ip, #16]
str r9, [ip, #20]
streq r3, [r4, #32]
.L69:
ldr r3, .L80
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L79
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, pc}
.L70:
bl __errno_location
mov r3, #0
adds r5, r5, r7
str r3, [r0]
adc r8, r8, r9
cmp r6, #1048576
movcc r3, r6
movcs r3, #1048576
mov r2, sp
ldr r1, [r4, #136]
ldr r0, [r4, #8]
stm sp, {r5, r8}
bl sendfile64
b .L71
.L78:
cmn r0, #1
bne .L73
bl __errno_location
ldr r3, [r0]
cmp r3, #11
beq .L69
.L73:
mov r2, #1
mov r3, #3
str r2, [r4, #120]
str r3, [r4, #32]
b .L69
.L79:
bl __stack_chk_fail
.L81:
.align 2
.L80:
.word .LC2
.word .LANCHOR2
.size poll_send_reply, .-poll_send_reply
.align 2
.syntax unified
.arm
.fpu softvfp
.type poll_send_header, %function
poll_send_header:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
add r1, r0, #96
ldm r1, {r1, r2, r3}
push {r4, r6, r7, lr}
add r1, r1, r3
mov r4, r0
sub r2, r2, r3
ldr r0, [r0, #8]
mov r3, #0
bl send
ldr r1, .L90
cmp r0, #0
ldr r3, [r1, #12]
str r3, [r4, #28]
ble .L89
add r7, r4, #168
ldmia r7, {r6-r7}
add r3, r1, #16
ldmia r3, {r2-r3}
adds r6, r6, r0
adc r7, r7, r0, asr #31
adds r2, r2, r0
adc r3, r3, r0, asr #31
ldr ip, [r4, #104]
str r2, [r1, #16]
str r3, [r1, #20]
ldr r3, [r4, #100]
add r0, r0, ip
cmp r0, r3
str r6, [r4, #168]
str r7, [r4, #172]
str r0, [r4, #104]
popne {r4, r6, r7, pc}
ldr r3, [r4, #112]
cmp r3, #0
beq .L87
mov r3, #3
str r3, [r4, #32]
pop {r4, r6, r7, pc}
.L89:
cmn r0, #1
bne .L84
bl __errno_location
ldr r3, [r0]
cmp r3, #11
popeq {r4, r6, r7, pc}
.L84:
mov r2, #1
mov r3, #3
str r2, [r4, #120]
str r3, [r4, #32]
pop {r4, r6, r7, pc}
.L87:
mov r3, #2
mov r0, r4
str r3, [r4, #32]
pop {r4, r6, r7, lr}
b poll_send_reply
.L91:
.align 2
.L90:
.word .LANCHOR2
.size poll_send_header, .-poll_send_header
.section .rodata.str1.4
.align 2
.LC3:
.ascii "Generated by %s on %s\012\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type generated_on.part.0, %function
generated_on.part.0:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r3, #72
push {r4, lr}
ldr ip, .L94
ldr r4, .L94+4
ldr r2, .L94+8
sub sp, sp, #16
stm sp, {r2, ip}
str r0, [sp, #8]
mov r1, r3
mov r0, r4
mov r2, #1
bl __snprintf_chk
mov r0, r4
add sp, sp, #16
@ sp needed
pop {r4, pc}
.L95:
.align 2
.L94:
.word .LANCHOR0+20
.word .LANCHOR2+24
.word .LC3
.size generated_on.part.0, .-generated_on.part.0
.section .rodata.str1.4
.align 2
.LC4:
.ascii "out of memory in vasprintf()\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type xvasprintf, %function
xvasprintf:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov ip, r1
mov r3, r2
push {r4, lr}
mov r1, #1
mov r2, ip
bl __vasprintf_chk
cmn r0, #1
popne {r4, pc}
mov r0, #1
ldr r1, .L99
bl errx
.L100:
.align 2
.L99:
.word .LC4
.size xvasprintf, .-xvasprintf
.section .rodata.cst4
.align 2
.LC5:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type xasprintf, %function
xasprintf:
@ args = 4, pretend = 12, frame = 8
@ frame_needed = 0, uses_anonymous_args = 1
push {r1, r2, r3}
str lr, [sp, #-4]!
ldr r3, .L105
sub sp, sp, #8
add r2, sp, #16
ldr r1, [sp, #12]
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
str r2, [sp]
bl xvasprintf
ldr r3, .L105
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L104
add sp, sp, #8
@ sp needed
ldr lr, [sp], #4
add sp, sp, #12
bx lr
.L104:
bl __stack_chk_fail
.L106:
.align 2
.L105:
.word .LC5
.size xasprintf, .-xasprintf
.section .rodata.str1.4
.align 2
.LC6:
.ascii "can't reallocate %zu bytes\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type xrealloc.part.0, %function
xrealloc.part.0:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r2, r0
push {r4, lr}
mov r0, #1
ldr r1, .L109
bl errx
.L110:
.align 2
.L109:
.word .LC6
.size xrealloc.part.0, .-xrealloc.part.0
.align 2
.syntax unified
.arm
.fpu softvfp
.type parse_mimetype_line, %function
parse_mimetype_line:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldrb r3, [r0] @ zero_extendqisi2
mov r8, r0
cmp r3, #32
cmpne r3, #9
sub sp, sp, #20
moveq fp, #1
movne fp, #0
bne .L127
mov r2, r0
rsb r1, r0, #1
.L113:
add r0, r1, r2
ldrb r3, [r2, #1]! @ zero_extendqisi2
cmp r3, #9
cmpne r3, #32
beq .L113
str r0, [sp, #4]
.L112:
cmp r3, #35
cmpne r3, #0
beq .L111
ldr r3, [sp, #4]
add r2, r3, #1
ldrb r3, [r8, r2] @ zero_extendqisi2
str r2, [sp, #8]
cmp r3, #9
cmpne r3, #32
add r2, r8, r2
beq .L115
rsb r1, r8, #1
b .L116
.L147:
add r0, r1, r2
ldrb r3, [r2, #1]! @ zero_extendqisi2
cmp r3, #32
cmpne r3, #9
beq .L146
.L116:
cmp r3, #0
bne .L147
.L111:
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L146:
str r0, [sp, #8]
.L115:
cmp r3, #9
cmpne r3, #32
ldr r7, [sp, #8]
ldr r10, .L151
beq .L118
.L149:
cmp r3, #0
beq .L111
mov r6, r7
add r3, r7, #1
add r3, r8, r3
.L119:
ldrb r2, [r3] @ zero_extendqisi2
mov r5, r6
and r1, r2, #223
cmp r2, #9
cmpne r1, #0
mov r4, r3
add r6, r6, #1
add r3, r3, #1
bne .L119
ldmib sp, {r1, r2}
mov r0, r8
bl split_string
mov r9, r0
mov r2, r6
mov r1, r7
mov r0, r8
str r9, [sp]
bl split_string
mov r6, r0
bl strlen
ldr r3, [r10]
ldr r7, [r10, #8]
cmp r0, r3
strhi r0, [r10]
cmp r7, #0
ldr fp, [r10, #4]
beq .L128
mov r9, #0
b .L124
.L122:
add r9, r9, #1
cmp r7, r9
beq .L148
.L124:
mov r1, r6
ldr r0, [fp, r9, lsl #3]
bl strcmp
cmp r0, #0
add r1, fp, r9, lsl #3
bne .L122
ldr r0, [r1, #4]
str r1, [sp, #12]
bl free
ldr r0, [sp]
bl xstrdup
ldr r1, [sp, #12]
str r0, [r1, #4]
.L123:
ldr r0, [sp]
bl free
mov r0, r6
bl free
ldrb r3, [r4] @ zero_extendqisi2
cmp r3, #0
beq .L111
add r7, r5, #2
.L126:
ldrb r3, [r8, r7] @ zero_extendqisi2
cmp r3, #9
cmpne r3, #32
bne .L149
.L118:
add r7, r7, #1
b .L126
.L148:
add r3, r7, #1
lsl r1, r3, #3
.L121:
mov r0, fp
str r1, [sp, #12]
str r3, [r10, #8]
bl realloc
subs fp, r0, #0
ldr r1, [sp, #12]
beq .L150
mov r0, r6
str fp, [r10, #4]
bl xstrdup
add r2, r7, #536870912
str r0, [fp, r2, lsl #3]
ldr r0, [sp]
bl xstrdup
add r7, fp, r7, lsl #3
str r0, [r7, #4]
b .L123
.L128:
mov r1, #8
mov r3, #1
b .L121
.L127:
str fp, [sp, #4]
b .L112
.L150:
mov r0, r1
bl xrealloc.part.0
.L152:
.align 2
.L151:
.word .LANCHOR2
.size parse_mimetype_line, .-parse_mimetype_line
.align 2
.syntax unified
.arm
.fpu softvfp
.type appendl, %function
appendl:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
mov r6, r2
ldm r0, {r2, r4}
add r3, r2, r6
cmp r4, r3
mov r5, r0
mov r7, r1
ldr r0, [r0, #8]
bcs .L154
.L155:
add r4, r4, #4096
cmp r4, r3
bcc .L155
mov r1, r4
str r4, [r5, #4]
bl realloc
cmp r0, #0
ldrne r2, [r5]
strne r0, [r5, #8]
beq .L159
.L154:
add r0, r0, r2
mov r1, r7
mov r2, r6
bl memcpy
ldr r2, [r5]
add r2, r2, r6
str r2, [r5]
pop {r4, r5, r6, r7, r8, pc}
.L159:
mov r0, r4
bl xrealloc.part.0
.size appendl, .-appendl
.section .rodata.str1.4
.align 2
.LC7:
.ascii "number \"%s\" is invalid\000"
.section .rodata.cst4
.align 2
.LC8:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type xstr_to_num, %function
xstr_to_num:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r3, .L166
sub sp, sp, #16
mov r1, sp
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
mov r4, r0
bl str_to_num
cmp r0, #0
beq .L164
ldmia sp, {r0-r1}
ldr r3, .L166
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L165
add sp, sp, #16
@ sp needed
pop {r4, pc}
.L164:
mov r2, r4
mov r0, #1
ldr r1, .L166+4
bl errx
.L165:
bl __stack_chk_fail
.L167:
.align 2
.L166:
.word .LC8
.word .LC7
.size xstr_to_num, .-xstr_to_num
.align 2
.syntax unified
.arm
.fpu softvfp
.type get_address_text, %function
get_address_text:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r4, .L174
mov r1, r0
ldr r3, [r4, #144]
cmp r3, #0
bne .L172
pop {r4, lr}
ldr r0, [r0]
b inet_ntoa
.L172:
mov r3, #46
add r2, r4, #96
mov r0, #10
bl inet_ntop
add r0, r4, #96
pop {r4, pc}
.L175:
.align 2
.L174:
.word .LANCHOR2
.size get_address_text, .-get_address_text
.section .rodata.str1.4
.align 2
.LC9:
.ascii "close()\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type xclose.part.0, %function
xclose.part.0:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r0, #1
push {r4, lr}
ldr r1, .L178
bl err
.L179:
.align 2
.L178:
.word .LC9
.size xclose.part.0, .-xclose.part.0
.section .rodata.str1.4
.align 2
.LC10:
.ascii "\000"
.align 2
.LC11:
.ascii "%lu %s \"%s %s\" %d %llu \"%s\" \"%s\"\012\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type free_connection, %function
free_connection:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r9, .L270
mov r4, r0
ldr r10, [r9, #148]
sub sp, sp, #44
cmp r10, #0
beq .L182
ldr r3, [r0, #116]
cmp r3, #0
beq .L182
ldr r0, [r0, #44]
cmp r0, #0
beq .L182
bl strlen
add r0, r0, r0, lsl #1
add r0, r0, #1
bl xmalloc
mov r8, r0
ldr r0, [r4, #44]
mov r1, r8
bl logencode
ldr r7, [r4, #48]
cmp r7, #0
beq .L184
mov r0, r7
bl strlen
add r0, r0, r0, lsl #1
add r0, r0, #1
bl xmalloc
mov r7, r0
ldr r0, [r4, #48]
mov r1, r7
bl logencode
.L184:
ldr r6, [r4, #52]
cmp r6, #0
beq .L185
mov r0, r6
bl strlen
add r0, r0, r0, lsl #1
add r0, r0, #1
bl xmalloc
mov r6, r0
ldr r0, [r4, #52]
mov r1, r6
bl logencode
.L185:
ldr r5, [r4, #56]
cmp r5, #0
beq .L186
mov r0, r5
bl strlen
add r0, r0, r0, lsl #1
add r0, r0, #1
bl xmalloc
mov r5, r0
ldr r0, [r4, #56]
mov r1, r5
bl logencode
.L186:
ldr r3, [r9, #12]
add r0, r4, #12
str r3, [sp, #36]
bl get_address_text
ldr r2, .L270+4
cmp r8, #0
moveq fp, r2
movne fp, r8
cmp r7, #0
moveq lr, r2
movne lr, r7
cmp r6, #0
moveq ip, r2
movne ip, r6
cmp r5, #0
movne r2, r5
ldr r1, [r4, #116]
stmib sp, {fp, lr}
str r0, [sp]
str ip, [sp, #24]
str r2, [sp, #28]
str r1, [sp, #12]
mov r0, r10
add fp, r4, #168
ldmia fp, {r10-fp}
mov r1, #1
ldr r3, [sp, #36]
ldr r2, .L270+8
str r10, [sp, #16]
str fp, [sp, #20]
bl __fprintf_chk
ldr r0, [r9, #148]
bl fflush
cmp r8, #0
beq .L191
mov r0, r8
bl free
.L191:
cmp r7, #0
beq .L192
mov r0, r7
bl free
.L192:
cmp r6, #0
beq .L193
mov r0, r6
bl free
.L193:
cmp r5, #0
beq .L182
mov r0, r5
bl free
.L182:
ldr r0, [r4, #8]
cmn r0, #1
bne .L266
.L194:
ldr r0, [r4, #36]
cmp r0, #0
beq .L195
bl free
.L195:
ldr r0, [r4, #44]
cmp r0, #0
beq .L196
bl free
.L196:
ldr r0, [r4, #48]
cmp r0, #0
beq .L197
bl free
.L197:
ldr r0, [r4, #52]
cmp r0, #0
beq .L198
bl free
.L198:
ldr r0, [r4, #56]
cmp r0, #0
beq .L199
bl free
.L199:
ldr r0, [r4, #96]
cmp r0, #0
beq .L200
ldr r3, [r4, #108]
cmp r3, #0
beq .L267
.L200:
ldr r0, [r4, #128]
cmp r0, #0
beq .L201
ldr r3, [r4, #132]
cmp r3, #0
beq .L268
.L201:
ldr r0, [r4, #136]
cmn r0, #1
bne .L269
.L180:
add sp, sp, #44
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L268:
bl free
ldr r0, [r4, #136]
cmn r0, #1
beq .L180
.L269:
bl close
cmn r0, #1
bne .L180
.L203:
bl xclose.part.0
.L267:
bl free
b .L200
.L266:
bl close
cmn r0, #1
bne .L194
b .L203
.L271:
.align 2
.L270:
.word .LANCHOR2
.word .LC10
.word .LC11
.size free_connection, .-free_connection
.align 2
.syntax unified
.arm
.fpu softvfp
.type parse_field.isra.0, %function
parse_field.isra.0:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
mov r7, r1
mov r1, r2
mov r6, r2
mov r5, r0
bl strstr
subs r4, r0, #0
popeq {r4, r5, r6, r7, r8, pc}
mov r0, r6
bl strlen
sub r4, r4, r5
ldr lr, [r7]
add r1, r4, r0
cmp r1, lr
bcs .L277
sub ip, r1, #1
mov r2, r1
add ip, r5, ip
b .L275
.L276:
add r2, r2, #1
cmp r2, lr
beq .L274
.L275:
ldrb r3, [ip, #1]! @ zero_extendqisi2
cmp r3, #10
cmpne r3, #13
bne .L276
.L274:
mov r0, r5
pop {r4, r5, r6, r7, r8, lr}
b split_string
.L277:
mov r2, r1
b .L274
.size parse_field.isra.0, .-parse_field.isra.0
.section .rodata.str1.4
.align 2
.LC12:
.ascii "%a, %d %b %Y %H:%M:%S GMT\000"
.align 2
.LC13:
.ascii "strftime() failed [%s]\000"
.section .rodata.cst4
.align 2
.LC14:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type rfc1123_date, %function
rfc1123_date:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r3, .L287
sub sp, sp, #8
str r1, [sp]
mov r4, r0
mov r0, sp
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
bl gmtime
mov r1, #30
mov r3, r0
ldr r2, .L287+4
mov r0, r4
bl strftime
cmp r0, #0
beq .L285
ldr r3, .L287
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L286
mov r0, r4
add sp, sp, #8
@ sp needed
pop {r4, pc}
.L285:
mov r2, r4
mov r0, #1
ldr r1, .L287+8
bl errx
.L286:
bl __stack_chk_fail
.L288:
.align 2
.L287:
.word .LC14
.word .LC12
.word .LC13
.size rfc1123_date, .-rfc1123_date
.section .rodata.str1.4
.align 2
.LC15:
.ascii "Connection: close\015\012\000"
.align 2
.LC16:
.ascii "<html><head><title>301 Moved Permanently</title></h"
.ascii "ead><body>\012<h1>Moved Permanently</h1>\012Moved t"
.ascii "o: <a href=\"%s\">%s</a>\012<hr>\012%s</body></html"
.ascii ">\012\000"
.align 2
.LC17:
.ascii "HTTP/1.1 301 Moved Permanently\015\012Date: %s\015\012"
.ascii "%sLocation: %s\015\012%sContent-Length: %llu\015\012"
.ascii "Content-Type: text/html; charset=UTF-8\015\012\015\012"
.ascii "\000"
.section .rodata.cst4
.align 2
.LC18:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type redirect, %function
redirect:
@ args = 4, pretend = 12, frame = 48
@ frame_needed = 0, uses_anonymous_args = 1
push {r1, r2, r3}
push {r4, r5, r6, r7, lr}
mov r4, r0
sub sp, sp, #64
ldr r3, .L298
ldr r5, .L298+4
add r2, sp, #88
ldr r1, [sp, #84]
add r0, sp, #20
ldr r3, [r3]
str r3, [sp, #60]
mov r3,#0
str r2, [sp, #24]
bl xvasprintf
ldr r1, [r5, #12]
add r0, sp, #28
bl rfc1123_date
ldr r3, .L298+8
ldr r6, [sp, #20]
ldr r3, [r3, #8]
add r7, r4, #128
cmp r3, #0
bne .L296
ldr r0, .L298+12
.L290:
mov r3, r6
mov r2, r6
ldr r1, .L298+16
str r0, [sp]
mov r0, r7
bl xasprintf
mov r3, #0
ldr r1, [r4, #120]
str r3, [r4, #156]
cmp r1, r3
ldreq ip, [r5, #156]
ldr r3, [r5, #152]
mov r2, r0
mov r5, #0
ldrne ip, .L298+20
ldr r1, [sp, #20]
str r0, [r4, #152]
stm sp, {r1, ip}
str r2, [sp, #8]
ldr r1, .L298+24
add r2, sp, #28
add r0, r4, #96
str r5, [sp, #12]
bl xasprintf
mov r3, r0
ldr r0, [sp, #20]
str r3, [r4, #100]
bl free
ldr r3, .L298+28
str r5, [r4, #124]
str r3, [r4, #116]
ldr r3, .L298
ldr r2, [r3]
ldr r3, [sp, #60]
eors r2, r3, r2
mov r3, #0
bne .L297
add sp, sp, #64
@ sp needed
pop {r4, r5, r6, r7, lr}
add sp, sp, #12
bx lr
.L296:
add r0, sp, #28
bl generated_on.part.0
b .L290
.L297:
bl __stack_chk_fail
.L299:
.align 2
.L298:
.word .LC18
.word .LANCHOR2
.word .LANCHOR1
.word .LC10
.word .LC16
.word .LC15
.word .LC17
.word 301
.size redirect, .-redirect
.section .rodata.str1.4
.align 2
.LC19:
.ascii "<html><head><title>%d %s</title></head><body>\012<h"
.ascii "1>%s</h1>\012%s\012<hr>\012%s</body></html>\012\000"
.align 2
.LC20:
.ascii "HTTP/1.1 %d %s\015\012Date: %s\015\012%sAccept-Rang"
.ascii "es: bytes\015\012%sContent-Length: %llu\015\012Cont"
.ascii "ent-Type: text/html; charset=UTF-8\015\012\015\012\000"
.section .rodata.cst4
.align 2
.LC21:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type default_reply, %function
default_reply:
@ args = 4, pretend = 4, frame = 48
@ frame_needed = 0, uses_anonymous_args = 1
str r3, [sp, #-4]!
push {r4, r5, r6, r7, r8, r9, r10, lr}
mov r4, r0
sub sp, sp, #76
ldr r3, .L309
ldr r7, .L309+4
mov r5, r1
mov r6, r2
ldr r1, [sp, #108]
add r2, sp, #112
add r0, sp, #28
add r8, sp, #36
ldr r3, [r3]
str r3, [sp, #68]
mov r3,#0
str r2, [sp, #32]
bl xvasprintf
mov r0, r8
ldr r1, [r7, #12]
bl rfc1123_date
ldr r3, .L309+8
ldr r10, [sp, #28]
ldr r3, [r3, #8]
add r9, r4, #128
cmp r3, #0
bne .L307
ldr r0, .L309+12
.L301:
mov r2, r5
mov r3, r6
ldr r1, .L309+16
stm sp, {r6, r10}
str r0, [sp, #8]
mov r0, r9
bl xasprintf
mov r3, #0
str r0, [r4, #152]
str r3, [r4, #156]
ldr r0, [sp, #28]
bl free
ldr r3, [r4, #120]
ldr r1, .L309+20
cmp r3, #0
ldreq r2, [r7, #156]
ldr r3, [r7, #152]
ldrne r2, .L309+24
str r3, [sp, #4]
str r2, [sp, #8]
str r8, [sp]
mov r3, r6
add r7, r4, #152
ldmia r7, {r6-r7}
mov r2, r5
str r6, [sp, #16]
str r7, [sp, #20]
add r0, r4, #96
bl xasprintf
mov r3, #0
str r3, [r4, #124]
ldr r3, .L309
str r0, [r4, #100]
str r5, [r4, #116]
ldr r2, [r3]
ldr r3, [sp, #68]
eors r2, r3, r2
mov r3, #0
bne .L308
add sp, sp, #76
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, lr}
add sp, sp, #4
bx lr
.L307:
mov r0, r8
bl generated_on.part.0
b .L301
.L308:
bl __stack_chk_fail
.L310:
.align 2
.L309:
.word .LC21
.word .LANCHOR2
.word .LANCHOR1
.word .LC10
.word .LC19
.word .LC20
.word .LC15
.size default_reply, .-default_reply
.section .rodata.str1.4
.align 2
.LC22:
.ascii "unlink(pidfile) failed\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type pidfile_remove, %function
pidfile_remove:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, .L317
push {r4, lr}
ldr r0, [r3, #160]
bl unlink
cmn r0, #1
beq .L315
ldr r4, .L317+4
ldr r0, [r4, #12]
bl close
cmn r0, #1
beq .L316
mvn r3, #0
str r3, [r4, #12]
pop {r4, pc}
.L315:
mov r0, #1
ldr r1, .L317+8
bl err
.L316:
bl xclose.part.0
.L318:
.align 2
.L317:
.word .LANCHOR2
.word .LANCHOR1
.word .LC22
.size pidfile_remove, .-pidfile_remove
.section .rodata.str1.4
.align 2
.LC23:
.ascii "%10llu\012\000"
.section .rodata.cst4
.align 2
.LC24:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type appendf.constprop.0, %function
appendf.constprop.0:
@ args = 4, pretend = 12, frame = 16
@ frame_needed = 0, uses_anonymous_args = 1
push {r1, r2, r3}
push {r4, lr}
ldr r3, .L323
sub sp, sp, #20
add r2, sp, #32
mov r4, r0
ldr r1, .L323+4
add r0, sp, #4
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
str r2, [sp, #8]
bl xvasprintf
ldr r1, [sp, #4]
mov r2, r0
mov r0, r4
bl appendl
ldr r0, [sp, #4]
bl free
ldr r3, .L323
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L322
add sp, sp, #20
@ sp needed
pop {r4, lr}
add sp, sp, #12
bx lr
.L322:
bl __stack_chk_fail
.L324:
.align 2
.L323:
.word .LC24
.word .LC23
.size appendf.constprop.0, .-appendf.constprop.0
.section .rodata.str1.4
.align 2
.LC25:
.ascii "You requested an invalid URL: %s\000"
.align 2
.LC26:
.ascii "Bad Request\000"
.align 2
.LC27:
.ascii "Host: \000"
.align 2
.LC28:
.ascii "%s%s\000"
.align 2
.LC29:
.ascii "%s%s%s\000"
.align 2
.LC30:
.ascii "The URL you requested (%s) was not found.\000"
.align 2
.LC31:
.ascii "Not Found\000"
.align 2
.LC32:
.ascii "Couldn't list directory: %s\000"
.align 2
.LC33:
.ascii "Internal Server Error\000"
.align 2
.LC34:
.ascii "<html>\012<head>\012 <title>\000"
.align 2
.LC35:
.ascii "</title>\012</head>\012<body>\012<h1>\000"
.align 2
.LC36:
.ascii "</h1>\012<tt><pre>\012\000"
.align 2
.LC37:
.ascii "</pre></tt>\012<hr>\012\000"
.align 2
.LC38:
.ascii "<a href=\"\000"
.align 2
.LC39:
.ascii "\">\000"
.align 2
.LC40:
.ascii "</a>\000"
.align 2
.LC41:
.ascii "/\012\000"
.align 2
.LC42:
.ascii "</body>\012</html>\012\000"
.align 2
.LC43:
.ascii "HTTP/1.1 200 OK\015\012Date: %s\015\012%sAccept-Ran"
.ascii "ges: bytes\015\012%sContent-Length: %llu\015\012Con"
.ascii "tent-Type: text/html; charset=UTF-8\015\012\015\012"
.ascii "\000"
.align 2
.LC44:
.ascii "You don't have permission to access (%s).\000"
.align 2
.LC45:
.ascii "Forbidden\000"
.align 2
.LC46:
.ascii "The URL you requested (%s) cannot be returned: %s.\000"
.align 2
.LC47:
.ascii "fstat() failed: %s.\000"
.align 2
.LC48:
.ascii "%s/\000"
.align 2
.LC49:
.ascii "Not a regular file.\000"
.align 2
.LC50:
.ascii "If-Modified-Since: \000"
.align 2
.LC51:
.ascii "HTTP/1.1 304 Not Modified\015\012Date: %s\015\012%s"
.ascii "Accept-Ranges: bytes\015\012%s\015\012\000"
.align 2
.LC52:
.ascii "You requested a range outside of the file.\000"
.align 2
.LC53:
.ascii "Requested Range Not Satisfiable\000"
.align 2
.LC54:
.ascii "You requested a backward range.\000"
.align 2
.LC55:
.ascii "HTTP/1.1 206 Partial Content\015\012Date: %s\015\012"
.ascii "%sAccept-Ranges: bytes\015\012%sContent-Length: %ll"
.ascii "u\015\012Content-Range: bytes %llu-%llu/%llu\015\012"
.ascii "Content-Type: %s\015\012Last-Modified: %s\015\012\015"
.ascii "\012\000"
.align 2
.LC56:
.ascii "HTTP/1.1 200 OK\015\012Date: %s\015\012%sAccept-Ran"
.ascii "ges: bytes\015\012%sContent-Length: %llu\015\012Con"
.ascii "tent-Type: %s\015\012Last-Modified: %s\015\012\015\012"
.ascii "\000"
.section .rodata.cst4
.align 2
.LC57:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type process_get, %function
process_get:
@ args = 0, pretend = 0, frame = 952
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr fp, [r0, #48]
ldr r3, .L530
sub sp, sp, #1004
mov r5, r0
mov r0, fp
ldr r3, [r3]
str r3, [sp, #996]
mov r3,#0
bl strlen
mov r8, r0
add r0, r0, #1
bl xmalloc
cmp r8, #0
mov r4, r0
beq .L426
rsb r1, r0, #1
mov r4, fp
str r5, [sp, #52]
mov r7, r0
mov r6, #0
mov fp, r8
mov r5, r1
str r0, [sp, #48]
b .L335
.L327:
mov r6, r10
cmp fp, r6
strb r9, [r7]
add r3, r5, r7
add r7, r7, #1
bls .L505
.L335:
ldrb r9, [r4, r6] @ zero_extendqisi2
add r10, r6, #1
cmp r9, #37
bne .L327
add r8, r6, #2
cmp fp, r8
bls .L327
bl __ctype_b_loc
ldrb r3, [r4, r10] @ zero_extendqisi2
ldr ip, [r0]
lsl r0, r3, #1
ldrh r0, [ip, r0]
tst r0, #4096
beq .L327
ldrb r0, [r4, r8] @ zero_extendqisi2
lsl lr, r0, #1
ldrh ip, [ip, lr]
tst ip, #4096
beq .L327
sub ip, r3, #65
cmp ip, #5
bls .L506
sub ip, r3, #97
cmp ip, #5
subls r3, r3, #87
lslls r3, r3, #4
lslhi r3, r3, #4
andls r3, r3, #255
andhi r3, r3, #240
.L329:
sub ip, r0, #65
cmp ip, #5
subls r0, r0, #55
andls r0, r0, #255
bls .L332
sub ip, r0, #97
cmp ip, #5
subls r0, r0, #87
subhi r0, r0, #48
and r0, r0, #255
.L332:
add r6, r6, #3
add r0, r3, r0
cmp fp, r6
strb r0, [r7]
add r3, r5, r7
add r7, r7, #1
bhi .L335
.L505:
ldr r4, [sp, #48]
ldr r5, [sp, #52]
add r3, r4, r3
.L326:
mov r2, #0
strb r2, [r3]
ldrb r3, [r4] @ zero_extendqisi2
cmp r3, r2
beq .L355
mov r1, r4
mov r2, r3
b .L339
.L337:
ldrb r2, [r1, #1]! @ zero_extendqisi2
cmp r2, #0
beq .L338
.L339:
cmp r2, #63
bne .L337
mov r3, #0
strb r3, [r1]
ldrb r3, [r4] @ zero_extendqisi2
.L338:
cmp r3, #47
bne .L355
mov r2, #0
mov r7, r4
mov r0, r2
mov r6, r2
b .L343
.L507:
strb r3, [r7]
ldrb r3, [r4, r1] @ zero_extendqisi2
add r2, r2, #1
cmp r3, #0
add lr, r4, r2
beq .L342
add r0, r0, #2
add ip, r4, r0
.L340:
sub r6, r3, #47
clz r6, r6
strb r3, [lr]
ldrb r3, [ip] @ zero_extendqisi2
add r2, r2, #1
add lr, r4, r2
cmp r3, #0
mov r7, lr
lsr r6, r6, #5
beq .L342
.L343:
add r1, r0, #1
cmp r6, #0
mov lr, r7
add ip, r4, r1
beq .L427
cmp r3, #47
bne .L507
ldrb r3, [ip] @ zero_extendqisi2
mov r0, r1
cmp r3, #0
bne .L343
.L342:
mov r6, #0
mov r0, r4
strb r6, [lr]
bl strlen
subs r7, r0, #0
beq .L344
add r3, r4, r7
ldrb fp, [r3, #-1] @ zero_extendqisi2
sub r3, r4, #1
add r1, r3, r7
.L346:
ldrb r2, [r3, #1]! @ zero_extendqisi2
cmp r2, #47
addeq r6, r6, #1
cmp r3, r1
bne .L346
lsl r0, r6, #3
bl xmalloc
cmp r7, #1
mov r8, r0
beq .L358
mov r3, #1
cmp r7, r3
mov r6, #0
movls r2, r3
bls .L349
.L499:
sub r1, r3, #1
mov r2, r3
add r1, r4, r1
b .L357
.L350:
add r2, r2, #1
cmp r7, r2
beq .L430
.L357:
ldrb r0, [r1, #1]! @ zero_extendqisi2
cmp r0, #47
bne .L350
.L349:
add r0, r3, #1
cmp r0, r2
add r1, r4, r3
beq .L508
.L351:
add ip, r3, #2
cmp ip, r2
beq .L509
.L353:
add r0, r8, r6, lsl #3
sub r3, r2, r3
str r1, [r8, r6, lsl #3]
str r3, [r0, #4]
add r6, r6, #1
.L352:
add r3, r2, #1
cmp r7, r3
bhi .L499
cmp r6, #0
beq .L358
mov r7, r8
mov r9, #0
mov r10, #47
add r6, r8, r6, lsl #3
b .L360
.L359:
ldr r3, [r7, #4]
add r7, r7, #8
cmp r6, r7
add r9, r9, r3
beq .L510
.L360:
strb r10, [r4, r9]
ldr r1, [r7]
add r9, r9, #1
add r0, r4, r9
cmp r0, r1
bcs .L359
ldr r2, [r7, #4]
bl memmove
b .L359
.L430:
mov r2, r7
add r0, r3, #1
cmp r0, r2
add r1, r4, r3
bne .L351
.L508:
ldrb r0, [r4, r3] @ zero_extendqisi2
cmp r0, #46
bne .L353
b .L352
.L509:
ldrb ip, [r1] @ zero_extendqisi2
cmp ip, #46
bne .L353
ldrb r0, [r4, r0] @ zero_extendqisi2
cmp r0, #46
bne .L353
cmp r6, #0
subne r6, r6, #1
bne .L352
mov r0, r8
bl free
.L355:
ldr r3, [r5, #48]
ldr r2, .L530+4
str r3, [sp]
mov r0, r5
ldr r3, .L530+8
mov r1, #400
bl default_reply
ldr r3, .L530
ldr r2, [r3]
ldr r3, [sp, #996]
eors r2, r3, r2
mov r3, #0
beq .L403
b .L503
.L510:
mov r0, r8
bl free
cmp fp, #47
add r3, r4, r9
beq .L511
.L361:
mov r6, #0
ldr r10, .L530+12
strb r6, [r3]
ldr r7, [r10, #180]
cmp r7, r6
beq .L422
ldr r2, .L530+16
ldr r0, [r5, #36]
add r1, r5, #40
bl parse_field.isra.0
subs r9, r0, #0
beq .L422
ldr r8, [r10, #164]
cmp r8, #0
bne .L367
b .L364
.L365:
add r6, r6, #1
cmp r6, r8
beq .L364
.L367:
mov r1, r9
ldr r0, [r7, r6, lsl #3]
bl strcasecmp
cmp r0, #0
add r3, r7, r6, lsl #3
bne .L365
ldr r6, [r3, #4]
mov r0, r9
bl free
cmp r6, #0
beq .L422
.L366:
mov r2, r6
mov r3, r4
mov r0, r5
ldr r1, .L530+20
bl redirect
ldr r3, .L530
ldr r2, [r3]
ldr r3, [sp, #996]
eors r2, r3, r2
mov r3, #0
bne .L503
.L403:
mov r0, r4
add sp, sp, #1004
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
b free
.L364:
mov r0, r9
bl free
.L422:
ldr r6, [r10, #168]
cmp r6, #0
bne .L366
mov r0, r4
bl strlen
add r0, r4, r0
ldrb r3, [r0, #-1] @ zero_extendqisi2
ldr r6, [r10, #172]
cmp r3, #47
beq .L512
mov r2, r6
mov r3, r4
ldr r1, .L530+20
add r0, sp, #84
bl xasprintf
mov r0, r4
bl url_content_type
mov r6, r0
ldr r8, [sp, #84]
.L374:
mov r0, r4
bl free
mov r1, #2048
mov r0, r8
bl open64
mov r3, r0
ldr r0, [sp, #84]
str r3, [r5, #136]
bl free
ldr r1, [r5, #136]
cmn r1, #1
beq .L513
mov r0, #3
add r2, sp, #88
bl __fxstat64
cmn r0, #1
beq .L514
ldr r3, [sp, #104]
and r3, r3, #61440
cmp r3, #16384
beq .L515
cmp r3, #32768
beq .L409
mov r0, r5
ldr r3, .L530+24
ldr r2, .L530+28
ldr r1, .L530+32
bl default_reply
.L325:
ldr r3, .L530
ldr r2, [r3]
ldr r3, [sp, #996]
eors r2, r3, r2
mov r3, #0
bne .L503
add sp, sp, #1004
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L427:
mov r0, r1
b .L340
.L511:
add r9, r9, #1
.L424:
mov r2, #47
strb r2, [r3]
add r3, r4, r9
b .L361
.L344:
bl xmalloc
mov r8, r0
.L358:
mov r0, r8
bl free
mov r9, #1
mov r3, r4
b .L424
.L506:
sub r3, r3, #55
lsl r3, r3, #4
and r3, r3, #255
b .L329
.L409:
mov r3, #1
add r7, sp, #228
ldr r1, [sp, #168]
str r3, [r5, #124]
mov r0, r7
bl rfc1123_date
ldr r2, .L530+36
ldr r0, [r5, #36]
add r1, r5, #40
bl parse_field.isra.0
subs r4, r0, #0
beq .L410
mov r1, r7
bl strcmp
cmp r0, #0
beq .L516
.L410:
mov r0, r4
bl free
add r1, r5, #80
ldmia r1, {r0-r1}
orrs r3, r0, r1
add r3, r5, #88
ldmia r3, {r2-r3}
bne .L412
orrs r3, r2, r3
add r3, sp, #136
ldmia r3, {r2-r3}
beq .L517
subs lr, r2, #1
ldr ip, [r5, #72]
str lr, [sp, #64]
ldr lr, [r5, #76]
sbc r4, r3, #0
subs ip, r2, ip
str ip, [sp, #56]
sbc ip, r3, lr
str ip, [sp, #60]
add r9, sp, #56
ldmia r9, {r8-r9}
cmp r8, #0
sbcs ip, r9, #0
str r4, [sp, #68]
strlt r0, [sp, #56]
strlt r1, [sp, #60]
.L416:
add r1, sp, #56
ldmia r1, {r0-r1}
cmp r0, r2
sbcs r3, r1, r3
bge .L518
add r4, sp, #64
ldmia r4, {r3-r4}
add r2, sp, #56
ldmia r2, {r1-r2}
cmp r3, r1
sbcs r3, r4, r2
blt .L519
add r1, sp, #56
ldmia r1, {r0-r1}
add r9, sp, #64
ldmia r9, {r8-r9}
subs r3, r8, r0
sbc r2, r9, r1
adds r3, r3, #1
adc r2, r2, #0
str r0, [r5, #144]
str r1, [r5, #148]
str r2, [r5, #156]
ldr r1, [r10, #12]
str r3, [r5, #152]
add r0, sp, #196
bl rfc1123_date
add r9, sp, #136
ldmia r9, {r8-r9}
ldr r3, [r5, #120]
mov r2, r0
cmp r3, #0
ldreq r1, [r10, #156]
ldr r3, [r10, #152]
str r7, [sp, #44]
str r6, [sp, #40]
add r7, sp, #64
ldmia r7, {r6-r7}
str r6, [sp, #24]
str r7, [sp, #28]
add fp, sp, #56
ldmia fp, {r10-fp}
ldrne r1, .L530+40
add r7, r5, #152
ldmia r7, {r6-r7}
add r0, r5, #96
str r1, [sp]
str r10, [sp, #16]
str fp, [sp, #20]
str r8, [sp, #32]
str r9, [sp, #36]
str r6, [sp, #8]
str r7, [sp, #12]
ldr r1, .L530+44
bl xasprintf
mov r3, #206
str r0, [r5, #100]
str r3, [r5, #116]
b .L325
.L512:
ldr r3, .L530+48
mov r2, r6
ldr r7, [r3, #16]
ldr r1, .L530+52
mov r3, r4
add r0, sp, #84
str r7, [sp]
bl xasprintf
mov r0, #3
ldr r1, [sp, #84]
add r2, sp, #88
bl __xstat64
cmn r0, #1
beq .L371
ldr r8, [sp, #84]
.L372:
mov r0, r7
bl url_content_type
mov r6, r0
b .L374
.L513:
bl __errno_location
ldr r0, [r0]
ldr r4, [r5, #48]
cmp r0, #13
beq .L520
cmp r0, #2
beq .L521
bl strerror
mov r1, #500
str r0, [sp, #4]
ldr r3, .L530+56
mov r0, r5
ldr r2, .L530+60
str r4, [sp]
bl default_reply
b .L325
.L426:
mov r3, r0
b .L326
.L371:
bl __errno_location
ldr r3, [r0]
ldr r8, [sp, #84]
cmp r3, #2
str r0, [sp, #72]
bne .L372
mov r0, r8
bl free
ldr r7, [r10, #176]
cmp r7, #0
bne .L522
mov r2, r6
mov r3, r4
ldr r1, .L530+20
add r0, sp, #84
bl xasprintf
ldr r6, [sp, #84]
mov r0, r6
str r6, [sp, #56]
bl opendir
subs r9, r0, #0
beq .L377
mov r0, r6
bl strlen
add r0, r0, #256
bl xmalloc
mov r8, r0
mov r0, #512
bl xmalloc
mov r3, #128
ldr fp, .L530+20
str r0, [sp, #48]
str r3, [sp, #52]
str r4, [sp, #64]
.L378:
mov r0, r9
bl readdir64
subs r6, r0, #0
beq .L523
.L383:
ldrb r3, [r6, #19] @ zero_extendqisi2
cmp r3, #46
bne .L379
ldrb r3, [r6, #20] @ zero_extendqisi2
cmp r3, #0
beq .L378
.L379:
ldr r3, [sp, #56]
add r6, r6, #19
mvn r2, #0
mov r1, #1
str r3, [sp]
mov r0, r8
mov r3, fp
str r6, [sp, #4]
bl __sprintf_chk
mov r1, r8
mov r0, #3
add r2, sp, #88
bl __xstat64
cmn r0, #1
beq .L378
ldr r3, [sp, #52]
cmp r7, r3
beq .L524
.L381:
mov r0, #16
bl xmalloc
mov r4, r0
mov r0, r6
ldr r6, [sp, #48]
str r4, [r6, r7, lsl #2]
bl xstrdup
ldr r2, [sp, #104]
ldr r3, [r6, r7, lsl #2]
and r2, r2, #61440
sub r2, r2, #16384
clz r2, r2
lsr r2, r2, #5
str r0, [r4]
add r1, sp, #136
ldmia r1, {r0-r1}
str r2, [r3, #4]
str r0, [r3, #8]
str r1, [r3, #12]
mov r0, r9
bl readdir64
subs r6, r0, #0
add r7, r7, #1
bne .L383
.L523:
mov r0, r9
ldr r4, [sp, #64]
bl closedir
mov r0, r8
bl free
mov r2, #4
mov r1, r7
ldr r3, .L530+64
ldr r0, [sp, #48]
bl qsort
cmn r7, #1
beq .L377
cmp r7, #0
movle r3, #2
strle r3, [sp, #52]
ble .L385
mov r9, #2
ldr r3, [sp, #48]
add r6, r3, r7, lsl r9
sub r6, r6, #4
sub r8, r3, #4
.L387:
ldr r3, [r8, #4]!
ldr r0, [r3]
bl strlen
cmp r9, r0
movcc r9, r0
cmp r6, r8
bne .L387
str r9, [sp, #52]
.L385:
mov r0, #12
bl xmalloc
mov r3, #4096
mov r6, r0
mov r2, #0
mov r0, r3
stm r6, {r2, r3}
bl xmalloc
mov r3, r0
mov r2, #22
str r3, [r6, #8]
ldr r1, .L530+68
mov r0, r6
bl appendl
ldr r8, [r5, #48]
mov r0, r8
bl strlen
mov r1, r8
mov r2, r0
mov r0, r6
bl appendl
mov r2, #28
ldr r1, .L530+72
mov r0, r6
bl appendl
ldr r8, [r5, #48]
mov r0, r8
bl strlen
mov r1, r8
mov r2, r0
mov r0, r6
bl appendl
mov r2, #16
ldr r1, .L530+76
mov r0, r6
bl appendl
ldr r8, [sp, #52]
mov r0, r8
bl xmalloc
mov r2, r8
mov r1, #32
str r0, [sp, #56]
bl memset
cmp r7, #0
ble .L525
ldr r3, [sp, #48]
str r4, [sp, #72]
add r7, r3, r7, lsl #2
sub fp, r3, #4
sub r3, r7, #4
mov r8, fp
mov r4, r3
str r5, [sp, #76]
ldr r5, [sp, #56]
add r7, sp, #228
str fp, [sp, #64]
.L399:
ldr r3, [r8, #4]!
ldr r0, [r3]
ldrb r3, [r0] @ zero_extendqisi2
cmp r3, #0
beq .L434
mov r2, #0
mov fp, #37
b .L396
.L526:
sub r9, r3, #48
cmp r9, #9
bls .L392
cmp r3, #95
beq .L392
bhi .L393
sub r9, r3, #45
cmp r9, #1
bls .L392
.L394:
strb fp, [ip]
ldrb r1, [r0] @ zero_extendqisi2
ldr ip, .L530+80
add r3, r2, #2
ldrb r1, [ip, r1, lsr #4] @ zero_extendqisi2
add r9, sp, #1000
strb r1, [lr]
ldrb r1, [r0] @ zero_extendqisi2
add r3, r9, r3
and r1, r1, #15
ldrb r1, [ip, r1] @ zero_extendqisi2
add r2, r2, #3
strb r1, [r3, #-772]
ldrb r3, [r0, #1]! @ zero_extendqisi2
add lr, r7, r2
cmp r3, #0
beq .L391
.L396:
bic r1, r3, #32
sub r1, r1, #65
cmp r1, #25
add r1, r2, #1
add lr, r7, r1
add ip, r7, r2
bhi .L526
.L392:
mov r2, r1
strb r3, [ip]
.L528:
ldrb r3, [r0, #1]! @ zero_extendqisi2
cmp r3, #0
bne .L396
.L391:
mov r3, #0
mov r2, #9
strb r3, [lr]
ldr r1, .L530+84
mov r0, r6
bl appendl
mov r0, r7
bl strlen
mov r1, r7
mov r2, r0
mov r0, r6
bl appendl
mov r2, #2
ldr r1, .L530+88
mov r0, r6
bl appendl
ldr r3, [r8]
ldr r9, [r3]
mov r0, r9
bl strlen
mov r1, r9
mov r2, r0
mov r0, r6
bl appendl
mov r2, #4
mov r0, r6
ldr r1, .L530+92
bl appendl
ldr r3, [r8]
ldr r2, [r3, #4]
cmp r2, #0
beq .L397
mov r2, #2
mov r0, r6
ldr r1, .L530+96
bl appendl
.L398:
cmp r4, r8
bne .L399
mov r8, r4
ldr fp, [sp, #64]
ldr r4, [sp, #72]
ldr r5, [sp, #76]
.L400:
ldr r3, [fp, #4]!
ldr r0, [r3]
bl free
ldr r0, [fp]
bl free
cmp r8, fp
bne .L400
.L401:
ldr r0, [sp, #48]
bl free
ldr r0, [sp, #56]
bl free
mov r2, #17
mov r0, r6
ldr r1, .L530+100
bl appendl
mov r0, r7
ldr r1, [r10, #12]
bl rfc1123_date
ldr r3, .L530+48
ldr r2, [r3, #8]
cmp r2, #0
bne .L527
ldr r8, .L530+104
.L389:
mov r1, r8
mov r0, r6
bl appendl
mov r0, r6
ldr r1, .L530+108
mov r2, #16
bl appendl
mov r2, #0
ldr r3, [r6, #8]
ldr r8, [r6]
str r2, [r5, #156]
mov r0, r6
str r3, [r5, #128]
str r8, [r5, #152]
bl free
mov r6, #0
ldr r3, [r5, #120]
ldr r1, .L530+112
cmp r3, #0
ldreq r2, [r10, #156]
ldrne r2, .L530+40
ldr r3, [r10, #152]
add r0, r5, #96
str r2, [sp]
str r8, [sp, #8]
mov r2, r7
str r6, [sp, #12]
bl xasprintf
mov r3, #200
str r6, [r5, #124]
str r0, [r5, #100]
str r3, [r5, #116]
.L386:
ldr r0, [sp, #84]
bl free
ldr r3, .L530
ldr r2, [r3]
ldr r3, [sp, #996]
eors r2, r3, r2
mov r3, #0
beq .L403
.L503:
bl __stack_chk_fail
.L412:
orrs r3, r2, r3
add r1, r5, #64
ldmia r1, {r0-r1}
add r3, sp, #136
ldmia r3, {r2-r3}
str r0, [sp, #56]
str r1, [sp, #60]
beq .L415
add r1, r5, #72
ldmia r1, {r0-r1}
cmp r0, r2
str r0, [sp, #64]
str r1, [sp, #68]
sbcs r1, r1, r3
blt .L416
.L415:
subs r1, r2, #1
str r1, [sp, #64]
sbc r1, r3, #0
str r1, [sp, #68]
b .L416
.L522:
mov r0, r4
bl free
ldr r3, [r5, #48]
mov r0, r5
str r3, [sp]
mov r1, #404
ldr r3, .L530+116
ldr r2, .L530+120
bl default_reply
b .L325
.L393:
cmp r3, #126
bne .L394
mov r2, r1
strb r3, [ip]
b .L528
.L524:
lsl r1, r7, #3
ldr r0, [sp, #48]
str r1, [sp, #52]
bl realloc
subs r3, r0, #0
str r3, [sp, #48]
ldr r1, [sp, #52]
lsl r3, r7, #1
beq .L529
str r3, [sp, #52]
b .L381
.L397:
ldr r0, [r3]
bl strlen
ldr r3, [sp, #52]
mov r1, r5
sub r2, r3, r0
mov r0, r6
bl appendl
ldr r3, [r8]
mov r0, r6
add r3, r3, #8
ldmia r3, {r2-r3}
ldr r1, .L530+124
bl appendf.constprop.0
b .L398
.L521:
mov r0, r5
mov r1, #404
ldr r3, .L530+116
ldr r2, .L530+120
str r4, [sp]
bl default_reply
b .L325
.L434:
mov lr, r7
b .L391
.L514:
bl __errno_location
ldr r0, [r0]
bl strerror
mov r1, #500
str r0, [sp]
ldr r3, .L530+128
mov r0, r5
ldr r2, .L530+60
bl default_reply
b .L325
.L520:
mov r0, r5
ldr r3, .L530+132
ldr r2, .L530+28
ldr r1, .L530+32
str r4, [sp]
bl default_reply
b .L325
.L515:
mov r0, r5
ldr r2, [r5, #48]
ldr r1, .L530+136
bl redirect
b .L325
.L519:
mov r0, r5
mov r1, #416
ldr r3, .L530+140
ldr r2, .L530+144
bl default_reply
b .L325
.L527:
mov r0, r7
bl generated_on.part.0
ldr r3, .L530+48
mov r8, r0
ldr r2, [r3, #8]
cmp r2, #0
beq .L389
mov r0, r7
bl generated_on.part.0
bl strlen
mov r2, r0
b .L389
.L516:
mov r3, #304
ldr r1, [r10, #12]
str r3, [r5, #116]
add r0, sp, #196
bl rfc1123_date
ldr r3, [r5, #120]
mov r2, r0
cmp r3, #0
ldreq r1, [r10, #156]
ldrne r1, .L530+40
ldr r3, [r10, #152]
add r0, r5, #96
str r1, [sp]
ldr r1, .L530+148
bl xasprintf
mov r6, #0
mov r7, #0
mov r2, #0
mov r3, #1
str r0, [r5, #100]
str r6, [r5, #152]
str r7, [r5, #156]
mov r0, r4
str r2, [r5, #124]
str r3, [r5, #112]
bl free
b .L325
.L518:
mov r0, r5
mov r1, #416
ldr r3, .L530+152
ldr r2, .L530+144
bl default_reply
b .L325
.L517:
ldr r1, [r10, #12]
str r2, [r5, #152]
str r3, [r5, #156]
add r0, sp, #196
bl rfc1123_date
ldr r3, [r5, #120]
mov r2, r0
cmp r3, #0
ldreq r1, [r10, #156]
ldrne r1, .L530+40
ldr r3, [r10, #152]
str r1, [sp]
str r7, [sp, #20]
str r6, [sp, #16]
add r7, r5, #152
ldmia r7, {r6-r7}
ldr r1, .L530+156
str r6, [sp, #8]
str r7, [sp, #12]
add r0, r5, #96
bl xasprintf
mov r3, #200
str r0, [r5, #100]
str r3, [r5, #116]
b .L325
.L377:
ldr r3, [sp, #72]
ldr r0, [r3]
bl strerror
mov r1, #500
str r0, [sp]
ldr r3, .L530+160
mov r0, r5
ldr r2, .L530+60
bl default_reply
b .L386
.L525:
add r7, sp, #228
b .L401
.L529:
mov r0, r1
bl xrealloc.part.0
.L531:
.align 2
.L530:
.word .LC57
.word .LC26
.word .LC25
.word .LANCHOR2
.word .LC27
.word .LC28
.word .LC49
.word .LC45
.word 403
.word .LC50
.word .LC15
.word .LC55
.word .LANCHOR1
.word .LC29
.word .LC46
.word .LC33
.word dlent_cmp
.word .LC34
.word .LC35
.word .LC36
.word hex.9699
.word .LC38
.word .LC39
.word .LC40
.word .LC41
.word .LC37
.word .LC10
.word .LC42
.word .LC43
.word .LC30
.word .LC31
.word .LC23
.word .LC47
.word .LC44
.word .LC48
.word .LC54
.word .LC53
.word .LC51
.word .LC52
.word .LC56
.word .LC32
.size process_get, .-process_get
.section .rodata.str1.4
.align 2
.LC58:
.ascii "You sent a request that the server couldn't underst"
.ascii "and.\000"
.align 2
.LC59:
.ascii "HTTP/1.1\000"
.align 2
.LC60:
.ascii "Connection: \000"
.align 2
.LC61:
.ascii "close\000"
.align 2
.LC62:
.ascii "keep-alive\000"
.align 2
.LC63:
.ascii "Referer: \000"
.align 2
.LC64:
.ascii "User-Agent: \000"
.align 2
.LC65:
.ascii "Range: bytes=\000"
.align 2
.LC66:
.ascii "GET\000"
.align 2
.LC67:
.ascii "HEAD\000"
.align 2
.LC68:
.ascii "OPTIONS\000"
.align 2
.LC69:
.ascii "POST\000"
.align 2
.LC70:
.ascii "PUT\000"
.align 2
.LC71:
.ascii "DELETE\000"
.align 2
.LC72:
.ascii "TRACE\000"
.align 2
.LC73:
.ascii "CONNECT\000"
.align 2
.LC74:
.ascii "The method you specified (%s) is not implemented.\000"
.align 2
.LC75:
.ascii "Not Implemented\000"
.align 2
.LC76:
.ascii "%s is not a valid HTTP/1.1 method.\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type process_request, %function
process_request:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, lr}
mov r5, r0
ldr r0, .L618
ldr r6, [r5, #40]
ldr r3, [r0, #184]
ldr ip, [r0, #188]
adds r3, r3, #1
adc ip, ip, #0
cmp r6, #0
str r3, [r0, #184]
str ip, [r0, #188]
sub sp, sp, #12
ldr r0, [r5, #36]
beq .L533
mov r4, #0
sub r3, r0, #1
b .L534
.L537:
add r4, r4, #1
cmp r4, r6
beq .L611
.L534:
ldrb r2, [r3, #1]! @ zero_extendqisi2
cmp r2, #32
bne .L537
mov r2, r4
mov r1, #0
bl split_string
cmp r4, #0
mov r6, r0
str r0, [r5, #44]
beq .L535
.L536:
bl __ctype_toupper_loc
sub r2, r4, #1
add r2, r6, r2
sub r3, r6, #1
.L538:
ldrb ip, [r3, #1]! @ zero_extendqisi2
ldr r1, [r0]
cmp r2, r3
ldr r1, [r1, ip, lsl #2]
strb r1, [r3]
bne .L538
.L535:
ldr r3, [r5, #40]
cmp r4, r3
bcs .L539
ldr r0, [r5, #36]
sub r2, r4, #1
add r2, r0, r2
b .L540
.L541:
cmp r3, r4
bls .L539
.L540:
ldrb ip, [r2, #1]! @ zero_extendqisi2
mov r1, r4
cmp ip, #32
add r4, r4, #1
beq .L541
.L542:
cmp r3, r4
bls .L545
sub r2, r4, #1
add r2, r0, r2
b .L546
.L547:
add r4, r4, #1
cmp r4, r3
bcs .L545
.L546:
ldrb lr, [r2, #1]! @ zero_extendqisi2
cmp lr, #32
cmpne lr, #13
movne ip, #1
moveq ip, #0
cmp lr, #10
moveq ip, #0
andne ip, ip, #1
cmp ip, #0
bne .L547
.L545:
mov r2, r4
bl split_string
mov r3, r0
ldr r0, [r5, #36]
str r3, [r5, #48]
ldrb r2, [r0, r4] @ zero_extendqisi2
add r3, r0, r4
cmp r2, #32
beq .L612
.L548:
add r6, r5, #40
mov r1, r6
ldr r2, .L618+4
bl parse_field.isra.0
subs r4, r0, #0
beq .L555
ldr r1, .L618+8
bl strcasecmp
cmp r0, #0
moveq r3, #1
streq r3, [r5, #120]
beq .L557
mov r0, r4
ldr r1, .L618+12
bl strcasecmp
cmp r0, #0
streq r0, [r5, #120]
.L557:
mov r0, r4
bl free
.L555:
ldr r3, .L618+16
mov r1, r6
ldr r3, [r3, #20]
ldr r2, .L618+20
cmp r3, #0
moveq r3, #1
ldr r0, [r5, #36]
streq r3, [r5, #120]
bl parse_field.isra.0
mov r1, r6
ldr r2, .L618+24
str r0, [r5, #52]
ldr r0, [r5, #36]
bl parse_field.isra.0
mov r1, r6
str r0, [r5, #56]
ldr r2, .L618+28
ldr r0, [r5, #36]
bl parse_field.isra.0
subs r6, r0, #0
beq .L559
bl strlen
mov r4, r0
bl __ctype_b_loc
mov r7, #0
mov r8, r0
ldr r3, [r0]
sub r2, r6, #1
b .L560
.L561:
add r7, r7, #1
.L560:
cmp r4, r7
movls r0, #0
movhi r0, #1
ldrb r1, [r2, #1]! @ zero_extendqisi2
lsl ip, r1, #1
ldrh ip, [r3, ip]
ands r0, r0, ip, lsr #11
bne .L561
sub r2, r4, r7
clz r2, r2
lsr r2, r2, #5
cmp r1, #45
moveq r1, r2
orrne r1, r2, #1
cmp r1, #0
beq .L613
.L563:
mov r0, r6
bl free
.L559:
ldr r4, [r5, #44]
ldr r1, .L618+32
mov r0, r4
bl strcmp
cmp r0, #0
beq .L614
mov r0, r4
ldr r1, .L618+36
bl strcmp
cmp r0, #0
beq .L615
mov r0, r4
ldr r1, .L618+40
bl strcmp
cmp r0, #0
beq .L569
mov r0, r4
ldr r1, .L618+44
bl strcmp
cmp r0, #0
bne .L616
.L569:
mov r0, r5
ldr r3, .L618+48
ldr r2, .L618+52
ldr r1, .L618+56
str r4, [sp]
bl default_reply
.L544:
mov r3, #1
ldr r0, [r5, #36]
str r3, [r5, #32]
bl free
mov r3, #0
str r3, [r5, #36]
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, pc}
.L539:
cmp r3, r4
beq .L543
mov r1, r4
ldr r0, [r5, #36]
add r4, r4, #1
b .L542
.L611:
mov r2, r4
mov r1, #0
bl split_string
mov r6, r0
str r0, [r5, #44]
b .L536
.L543:
mov r1, #400
mov r0, r5
ldr r3, .L618+60
ldr r2, .L618+64
bl default_reply
b .L544
.L612:
ldr ip, [r5, #40]
cmp r4, ip
bcs .L549
sub r1, ip, #1
add r1, r1, r0
rsb lr, r0, #1
.L550:
cmp r1, r3
add r4, lr, r3
beq .L549
ldrb r2, [r3, #1]! @ zero_extendqisi2
cmp r2, #32
beq .L550
.L549:
add r2, r4, #1
cmp r2, ip
bcs .L551
add r1, r0, r4
b .L552
.L553:
add r2, r2, #1
cmp r2, ip
bcs .L551
.L552:
ldrb r3, [r1, #1]! @ zero_extendqisi2
cmp r3, #13
cmpne r3, #32
bne .L553
.L551:
mov r1, r4
bl split_string
ldr r1, .L618+68
mov r4, r0
bl strcasecmp
cmp r0, #0
streq r0, [r5, #120]
mov r0, r4
bl free
ldr r0, [r5, #36]
b .L548
.L614:
mov r0, r5
bl process_get
b .L544
.L616:
mov r0, r4
ldr r1, .L618+72
bl strcmp
cmp r0, #0
beq .L569
mov r0, r4
ldr r1, .L618+76
bl strcmp
cmp r0, #0
beq .L569
mov r0, r4
ldr r1, .L618+80
bl strcmp
cmp r0, #0
beq .L569
mov r0, r4
ldr r1, .L618+84
bl strcmp
cmp r0, #0
beq .L569
mov r1, #400
mov r0, r5
ldr r3, .L618+88
ldr r2, .L618+64
str r4, [sp]
bl default_reply
b .L544
.L615:
mov r0, r5
bl process_get
mov r3, #1
str r3, [r5, #112]
b .L544
.L613:
cmp r7, #0
bne .L617
.L564:
add r1, r7, #1
cmp r4, r1
movls ip, #0
movhi ip, #1
ldrb r2, [r6, r1] @ zero_extendqisi2
add r0, r6, r1
lsl r2, r2, #1
ldrh r2, [r3, r2]
ands r2, ip, r2, lsr #11
beq .L563
mov ip, r0
.L566:
mov r9, r1
add r1, r1, #1
cmp r4, r1
movls lr, #0
movhi lr, #1
ldrb r2, [ip, #1]! @ zero_extendqisi2
lsl r8, r2, #1
ldrh r8, [r3, r8]
ands lr, lr, r8, lsr #11
bne .L566
cmp r2, #44
cmpne r4, r1
movne r1, #1
moveq r1, #0
bne .L563
cmp r7, r9
beq .L563
mov r2, #1
mov r3, #0
str r2, [r5, #88]
str r3, [r5, #92]
mov r2, #10
bl strtoll
str r0, [r5, #72]
str r1, [r5, #76]
b .L563
.L533:
mov r2, r6
mov r1, r6
bl split_string
mov r4, r6
str r0, [r5, #44]
b .L535
.L617:
mov r3, #0
mov r2, #1
mov r0, r6
str r2, [r5, #80]
str r3, [r5, #84]
mov r2, #10
bl strtoll
ldr r3, [r8]
str r0, [r5, #64]
str r1, [r5, #68]
b .L564
.L619:
.align 2
.L618:
.word .LANCHOR2
.word .LC60
.word .LC61
.word .LC62
.word .LANCHOR1
.word .LC63
.word .LC64
.word .LC65
.word .LC66
.word .LC67
.word .LC68
.word .LC69
.word .LC74
.word .LC75
.word 501
.word .LC58
.word .LC26
.word .LC59
.word .LC70
.word .LC71
.word .LC72
.word .LC73
.word .LC76
.size process_request, .-process_request
.section .rodata.str1.4
.align 2
.LC77:
.ascii "\012\012\000"
.align 2
.LC78:
.ascii "\015\012\015\012\000"
.align 2
.LC79:
.ascii "Your request was dropped because it was too long.\000"
.align 2
.LC80:
.ascii "Request Entity Too Large\000"
.section .rodata.cst4
.align 2
.LC81:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type poll_recv_request, %function
poll_recv_request:
@ args = 0, pretend = 0, frame = 32776
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
sub sp, sp, #32768
sub sp, sp, #12
ldr lr, .L647
add ip, sp, #32768
mov r4, r0
mov r3, #0
mov r2, #32768
ldr r0, [r0, #8]
add r1, sp, #4
add ip, ip, #4
ldr lr, [lr]
str lr, [ip]
mov lr,#0
bl recv
subs r5, r0, #0
bgt .L621
cmn r5, #1
beq .L642
.L622:
mov r2, #1
mov r3, #3
str r2, [r4, #120]
str r3, [r4, #32]
.L620:
add r3, sp, #32768
ldr r2, .L647
add r3, r3, #4
ldr r1, [r2]
ldr r2, [r3]
eors r1, r2, r1
mov r2, #0
bne .L643
add sp, sp, #32768
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, pc}
.L642:
bl __errno_location
ldr r3, [r0]
cmp r3, #11
bne .L622
b .L620
.L621:
ldr r6, [r4, #40]
ldr r7, .L647+4
add r6, r6, #1
ldr r3, [r7, #12]
add r6, r6, r5
mov r1, r6
ldr r0, [r4, #36]
str r3, [r4, #28]
bl realloc
cmp r0, #0
beq .L644
ldr r3, [r4, #40]
mov r2, r5
str r0, [r4, #36]
add r1, sp, #4
add r0, r0, r3
bl memcpy
add r3, r7, #192
ldmia r3, {r2-r3}
mov r1, #0
adds r2, r2, r5
adc r3, r3, r5, asr #31
ldr r0, [r4, #40]
str r2, [r7, #192]
str r3, [r7, #196]
ldr r3, [r4, #36]
add r5, r5, r0
str r5, [r4, #40]
strb r1, [r3, r5]
ldr r3, [r4, #40]
cmp r3, #2
bls .L626
ldr r2, [r4, #36]
sub r1, r3, #2
ldrb r0, [r2, r1] @ zero_extendqisi2
add r1, r2, r1
cmp r0, #10
beq .L645
.L627:
cmp r3, #4
bls .L630
sub r1, r3, #4
ldrb r0, [r2, r1] @ zero_extendqisi2
add r2, r2, r1
cmp r0, #13
beq .L646
.L630:
cmp r3, #4000
bls .L626
ldr r3, .L647+8
mov r0, r4
ldr r2, .L647+12
ldr r1, .L647+16
bl default_reply
mov r3, #1
str r3, [r4, #32]
.L634:
mov r0, r4
bl poll_send_header
b .L620
.L626:
ldr r3, [r4, #32]
cmp r3, #1
bne .L620
b .L634
.L645:
ldrb r1, [r1, #1] @ zero_extendqisi2
cmp r1, #10
bne .L627
.L633:
mov r0, r4
bl process_request
ldr r3, [r4, #40]
b .L630
.L646:
ldrb r1, [r2, #1] @ zero_extendqisi2
add r2, r2, #1
cmp r1, #10
bne .L630
ldrb r1, [r2, #1]! @ zero_extendqisi2
cmp r1, #13
bne .L630
ldrb r2, [r2, #1] @ zero_extendqisi2
cmp r2, #10
bne .L630
b .L633
.L643:
bl __stack_chk_fail
.L644:
mov r0, r6
bl xrealloc.part.0
.L648:
.align 2
.L647:
.word .LC81
.word .LANCHOR2
.word .LC79
.word .LC80
.word 413
.size poll_recv_request, .-poll_recv_request
.section .rodata.str1.4
.align 2
.LC82:
.ascii "application/ogg ogg\000"
.align 2
.LC83:
.ascii "::\000"
.align 2
.LC84:
.ascii "%s, %s.\012\000"
.align 2
.LC85:
.ascii "--help\000"
.align 2
.LC86:
.ascii "usage:\011%s /path/to/wwwroot [flags]\012\012\000"
.align 2
.LC87:
.ascii "flags:\011--port number (default: %u, or 80 if runn"
.ascii "ing as root)\012\011\011Specifies which port to lis"
.ascii "ten on for connections.\012\011\011Pass 0 to let th"
.ascii "e system choose any free port for you.\012\012\000"
.align 2
.LC88:
.ascii "\011--addr ip (default: all)\012\011\011If multiple"
.ascii " interfaces are present, specifies\012\011\011which"
.ascii " one to bind the listening port to.\012\000"
.align 2
.LC89:
.ascii "\011--maxconn number (default: system maximum)\012\011"
.ascii "\011Specifies how many concurrent connections to ac"
.ascii "cept.\012\000"
.align 2
.LC90:
.ascii "\011--log filename (default: stdout)\012\011\011Spe"
.ascii "cifies which file to append the request log to.\012"
.ascii "\000"
.align 2
.LC91:
.ascii "\011--chroot (default: don't chroot)\012\011\011Loc"
.ascii "ks server into wwwroot directory for added security"
.ascii ".\012\000"
.align 2
.LC92:
.ascii "\011--daemon (default: don't daemonize)\012\011\011"
.ascii "Detach from the controlling terminal and run in the"
.ascii " background.\012\000"
.align 2
.LC93:
.ascii "\011--index filename (default: %s)\012\011\011Defau"
.ascii "lt file to serve when a directory is requested.\012"
.ascii "\012\000"
.align 2
.LC94:
.ascii "\011--no-listing\012\011\011Do not serve listing if"
.ascii " directory is requested.\012\000"
.align 2
.LC95:
.ascii "\011--mimetypes filename (optional)\012\011\011Pars"
.ascii "es specified file for extension-MIME associations.\012"
.ascii "\000"
.align 2
.LC96:
.ascii "\011--default-mimetype string (optional, default: %"
.ascii "s)\012\011\011Files with unknown extensions are ser"
.ascii "ved as this mimetype.\012\012\000"
.align 2
.LC97:
.ascii "\011--uid uid/uname, --gid gid/gname (default: don'"
.ascii "t privdrop)\012\011\011Drops privileges to given ui"
.ascii "d:gid after initialization.\012\000"
.align 2
.LC98:
.ascii "\011--pidfile filename (default: no pidfile)\012\011"
.ascii "\011Write PID to the specified file. Note that if "
.ascii "you are\012\011\011using --chroot, then the pidfile"
.ascii " must be relative to,\012\011\011and inside the www"
.ascii "root.\012\000"
.align 2
.LC99:
.ascii "\011--no-keepalive\012\011\011Disables HTTP Keep-Al"
.ascii "ive functionality.\012\000"
.align 2
.LC100:
.ascii "\011--forward host url (default: don't forward)\012"
.ascii "\011\011Web forward (301 redirect).\012\011\011Requ"
.ascii "ests to the host are redirected to the correspondin"
.ascii "g url.\012\011\011The option may be specified multi"
.ascii "ple times, in which case\012\011\011the host is mat"
.ascii "ched in order of appearance.\012\000"
.align 2
.LC101:
.ascii "\011--forward-all url (default: don't forward)\012\011"
.ascii "\011Web forward (301 redirect).\012\011\011All requ"
.ascii "ests are redirected to the corresponding url.\012\000"
.align 2
.LC102:
.ascii "\011--no-server-id\012\011\011Don't identify the se"
.ascii "rver type in headers\012\011\011or directory listin"
.ascii "gs.\012\000"
.align 2
.LC103:
.ascii "\011--ipv6\012\011\011Listen on IPv6 address.\012\000"
.align 2
.LC104:
.ascii "Keep-Alive: timeout=%d\015\012\000"
.align 2
.LC105:
.ascii "--port\000"
.align 2
.LC106:
.ascii "missing number after --port\000"
.align 2
.LC107:
.ascii "--addr\000"
.align 2
.LC108:
.ascii "missing ip after --addr\000"
.align 2
.LC109:
.ascii "--maxconn\000"
.align 2
.LC110:
.ascii "missing number after --maxconn\000"
.align 2
.LC111:
.ascii "--log\000"
.align 2
.LC112:
.ascii "missing filename after --log\000"
.align 2
.LC113:
.ascii "--chroot\000"
.align 2
.LC114:
.ascii "--daemon\000"
.align 2
.LC115:
.ascii "--index\000"
.align 2
.LC116:
.ascii "missing filename after --index\000"
.align 2
.LC117:
.ascii "--no-listing\000"
.align 2
.LC118:
.ascii "--mimetypes\000"
.align 2
.LC119:
.ascii "missing filename after --mimetypes\000"
.align 2
.LC120:
.ascii "rb\000"
.align 2
.LC121:
.ascii "fopen(\"%s\")\000"
.align 2
.LC122:
.ascii "ftell()\000"
.align 2
.LC123:
.ascii "fseek()\000"
.align 2
.LC124:
.ascii "fread() %zu bytes, expecting %zu bytes\000"
.align 2
.LC125:
.ascii "--default-mimetype\000"
.align 2
.LC126:
.ascii "missing string after --default-mimetype\000"
.align 2
.LC127:
.ascii "--uid\000"
.align 2
.LC128:
.ascii "missing uid after --uid\000"
.align 2
.LC129:
.ascii "no such uid: `%s'\000"
.align 2
.LC130:
.ascii "--gid\000"
.align 2
.LC131:
.ascii "missing gid after --gid\000"
.align 2
.LC132:
.ascii "no such gid: `%s'\000"
.align 2
.LC133:
.ascii "--pidfile\000"
.align 2
.LC134:
.ascii "missing filename after --pidfile\000"
.align 2
.LC135:
.ascii "--no-keepalive\000"
.align 2
.LC136:
.ascii "--accf\000"
.align 2
.LC137:
.ascii "--forward\000"
.align 2
.LC138:
.ascii "missing host after --forward\000"
.align 2
.LC139:
.ascii "missing url after --forward\000"
.align 2
.LC140:
.ascii "--forward-all\000"
.align 2
.LC141:
.ascii "missing url after --forward-all\000"
.align 2
.LC142:
.ascii "--no-server-id\000"
.align 2
.LC143:
.ascii "--ipv6\000"
.align 2
.LC144:
.ascii "unknown argument `%s'\000"
.align 2
.LC145:
.ascii "Server: %s\015\012\000"
.align 2
.LC146:
.ascii "malformed --addr argument\000"
.align 2
.LC147:
.ascii "socket()\000"
.align 2
.LC148:
.ascii "setsockopt(SO_REUSEADDR)\000"
.align 2
.LC149:
.ascii "bind(port %u)\000"
.align 2
.LC150:
.ascii "getsockname()\000"
.align 2
.LC151:
.ascii "listening on: http://[%s]:%u/\012\000"
.align 2
.LC152:
.ascii "listening on: http://%s:%u/\012\000"
.align 2
.LC153:
.ascii "listen()\000"
.align 2
.LC154:
.ascii "this platform doesn't support acceptfilter\000"
.align 2
.LC155:
.ascii "ab\000"
.align 2
.LC156:
.ascii "opening logfile: fopen(\"%s\")\000"
.align 2
.LC157:
.ascii "pipe(lifeline)\000"
.align 2
.LC158:
.ascii "/dev/null\000"
.align 2
.LC159:
.ascii "open(/dev/null)\000"
.align 2
.LC160:
.ascii "fork\000"
.align 2
.LC161:
.ascii "close lifeline in parent\000"
.align 2
.LC162:
.ascii "read lifeline in parent\000"
.align 2
.LC163:
.ascii "waitpid\000"
.align 2
.LC164:
.ascii "signal(ignore SIGPIPE)\000"
.align 2
.LC165:
.ascii "signal(SIGINT)\000"
.align 2
.LC166:
.ascii "signal(SIGTERM)\000"
.align 2
.LC167:
.ascii "chdir(%s)\000"
.align 2
.LC168:
.ascii "chroot(%s)\000"
.align 2
.LC169:
.ascii "chrooted to `%s'\012\000"
.align 2
.LC170:
.ascii "setgroups([%d])\000"
.align 2
.LC171:
.ascii "setgid(%d)\000"
.align 2
.LC172:
.ascii "set gid to %d\012\000"
.align 2
.LC173:
.ascii "setuid(%d)\000"
.align 2
.LC174:
.ascii "set uid to %d\012\000"
.align 2
.LC175:
.ascii " after create failed\000"
.align 2
.LC176:
.ascii "read from pidfile failed\000"
.align 2
.LC177:
.ascii "invalid pidfile contents: \"%s\"\000"
.align 2
.LC178:
.ascii "daemon already running with PID %d\000"
.align 2
.LC179:
.ascii "can't create pidfile %s\000"
.align 2
.LC180:
.ascii "ftruncate() failed\000"
.align 2
.LC181:
.ascii "%d\000"
.align 2
.LC182:
.ascii "pwrite() failed\000"
.align 2
.LC183:
.ascii "setsid\000"
.align 2
.LC184:
.ascii "close read end of lifeline in child\000"
.align 2
.LC185:
.ascii "couldn't cut the lifeline\000"
.align 2
.LC186:
.ascii "dup2(stdin)\000"
.align 2
.LC187:
.ascii "dup2(stdout)\000"
.align 2
.LC188:
.ascii "dup2(stderr)\000"
.align 2
.LC189:
.ascii "select() timed out\000"
.align 2
.LC190:
.ascii "select() failed\000"
.align 2
.LC191:
.ascii "accept()\000"
.align 2
.LC192:
.ascii "fcntl(F_GETFL)\000"
.align 2
.LC193:
.ascii "fcntl() to set O_NONBLOCK\000"
.align 2
.LC194:
.ascii "CPU time used: %u.%02u user, %u.%02u system\012\000"
.align 2
.LC195:
.ascii "Requests: %llu\012\000"
.align 2
.LC196:
.ascii "Bytes: %llu in, %llu out\012\000"
.section .rodata.cst4
.align 2
.LC197:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 416
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L980
ldr ip, .L980+4
sub sp, sp, #428
mov r5, r0
mov r6, r1
mov r0, #1
ldr r1, .L980+8
sub r2, r3, #24
ldr ip, [ip]
str ip, [sp, #420]
mov ip,#0
ldr r4, .L980+12
bl __printf_chk
ldr r0, .L980+16
.L650:
bl parse_mimetype_line
ldr r0, [r4], #4
cmp r0, #0
bne .L650
cmp r5, #1
ble .L651
cmp r5, #2
bne .L652
ldr r1, .L980+20
ldr r0, [r6, #4]
bl strcmp
cmp r0, #0
bne .L652
.L651:
ldr r4, .L980+24
ldr r2, [r6]
ldr r1, .L980+28
mov r0, #1
bl __printf_chk
ldrh r2, [r4, #24]
ldr r1, .L980+32
mov r0, #1
bl __printf_chk
ldr r0, .L980+36
bl puts
ldr r0, .L980+40
bl puts
ldr r0, .L980+44
bl puts
ldr r0, .L980+48
bl puts
ldr r0, .L980+52
bl puts
ldr r2, [r4, #16]
ldr r1, .L980+56
mov r0, #1
bl __printf_chk
ldr r0, .L980+60
bl puts
ldr r0, .L980+64
bl puts
ldr r2, .L980+68
ldr r1, .L980+72
mov r0, #1
bl __printf_chk
ldr r0, .L980+76
bl puts
ldr r0, .L980+80
bl puts
ldr r0, .L980+84
bl puts
ldr r0, .L980+88
bl puts
ldr r0, .L980+92
bl puts
ldr r0, .L980+96
bl puts
ldr r0, .L980+100
bl puts
mov r0, #0
bl exit
.L652:
bl getuid
cmp r0, #0
moveq r2, #80
ldreq r3, .L980+24
ldr r0, [r6, #4]
strheq r2, [r3, #24] @ movhi
bl xstrdup
ldr r3, .L980+332
mov r4, r0
str r0, [r3, #172]
bl strlen
cmp r0, #0
bne .L911
.L654:
cmp r5, #2
beq .L707
mov r4, #2
ldr r7, .L980+104
ldr fp, .L980+108
ldr r10, .L980+112
b .L655
.L913:
add r4, r4, #1
cmp r5, r4
ble .L912
add r8, r6, r8
ldr r0, [r8, #4]
bl xstr_to_num
ldr r3, .L980+24
strh r0, [r3, #24] @ movhi
.L660:
add r4, r4, #1
cmp r5, r4
ble .L707
.L655:
ldr r9, [r6, r4, lsl #2]
mov r1, r7
mov r0, r9
bl strcmp
cmp r0, #0
lsl r8, r4, #2
beq .L913
mov r1, fp
mov r0, r9
bl strcmp
cmp r0, #0
bne .L661
add r4, r4, #1
cmp r5, r4
ble .L914
add r8, r6, r8
ldr r3, [r8, #4]
ldr r2, .L980+332
add r4, r4, #1
cmp r5, r4
str r3, [r2, #200]
bgt .L655
.L707:
ldr r1, .L980+332
ldr r3, .L980+116
mov r0, r1
mov r2, #8
ldr r1, [r1, #8]
ldr r0, [r0, #4]
ldr r5, .L980+24
bl qsort
mov r2, #60
ldr r1, .L980+120
ldr r0, .L980+124
bl xasprintf
ldr r3, [r5, #8]
cmp r3, #0
bne .L656
ldr r0, .L980+128
bl xstrdup
ldr r3, .L980+332
str r0, [r3, #152]
.L708:
ldr r3, .L980+332
ldr r4, [r3, #144]
ldr r0, [r3, #200]
cmp r4, #0
beq .L709
mov r6, #0
cmp r0, r6
ldr r1, .L980+132
add r2, sp, #284
movne r1, r0
mov r0, #10
str r6, [sp, #276]
str r6, [sp, #280]
str r6, [sp, #284]
str r6, [sp, #288]
str r6, [sp, #292]
str r6, [sp, #296]
str r6, [sp, #300]
bl inet_pton
cmn r0, #1
beq .L715
mov r2, r6
mov r1, #1
mov r0, #10
bl socket
str r0, [r5, #40]
.L712:
ldr r6, [r5, #40]
cmn r6, #1
beq .L915
mov r7, #1
mov r3, #4
mov r1, r7
str r3, [sp]
mov r2, #2
mov r0, r6
add r3, sp, #32
str r7, [sp, #32]
bl setsockopt
cmn r0, #1
beq .L916
ldrh r8, [r5, #24]
cmp r4, #0
lsr r3, r8, #8
orr r3, r3, r8, lsl #8
lsl r3, r3, #16
lsr r3, r3, #16
beq .L718
add r2, sp, #276
mov r1, r2
mov ip, #10
add r0, sp, #276
str r2, [sp, #12]
add r0, r0, #2
strh r3, [r0] @ movhi
mov r2, #28
mov r0, r6
strh ip, [r1] @ movhi
bl bind
cmn r0, #1
beq .L909
mov r3, #28
mov r0, r6
add r2, sp, r3
ldr r1, [sp, #12]
str r2, [sp, #20]
str r3, [sp, #28]
bl getsockname
cmn r0, #1
beq .L723
add r0, sp, #284
bl get_address_text
mov r3, r8
mov r2, r0
ldr r1, .L980+136
mov r0, r7
bl __printf_chk
.L721:
ldr r1, [r5, #28]
ldr r0, [r5, #40]
bl listen
cmn r0, #1
beq .L917
ldr r3, .L980+332
ldr r3, [r3, #216]
cmp r3, #0
bne .L918
.L725:
ldr r2, .L980+332
ldr r0, [r2, #204]
cmp r0, #0
beq .L919
ldr r1, .L980+140
bl fopen64
ldr r3, .L980+332
cmp r0, #0
str r0, [r3, #148]
beq .L920
.L727:
ldr r3, .L980+332
ldr r3, [r3, #212]
cmp r3, #0
bne .L921
.L728:
mov r1, #1
mov r0, #13
bl signal
cmn r0, #1
beq .L922
mov r0, #2
ldr r1, .L980+144
bl signal
cmn r0, #1
beq .L923
mov r0, #15
ldr r1, .L980+144
bl signal
cmn r0, #1
beq .L924
ldr r3, .L980+332
ldr r3, [r3, #208]
cmp r3, #0
bne .L925
.L739:
ldr r4, [r5, #36]
cmn r4, #1
beq .L742
mov r0, #1
add r1, sp, #276
str r4, [sp, #276]
bl setgroups
cmn r0, #1
beq .L926
mov r0, r4
bl setgid
cmn r0, #1
mov r2, r4
beq .L927
mov r0, #1
ldr r1, .L980+148
bl __printf_chk
.L742:
ldr r4, [r5, #32]
cmn r4, #1
beq .L745
mov r0, r4
bl setuid
cmn r0, #1
mov r2, r4
beq .L928
mov r0, #1
ldr r1, .L980+152
bl __printf_chk
.L745:
ldr r6, .L980+332
ldr r0, [r6, #160]
cmp r0, #0
beq .L747
mov r2, #384
ldr r1, .L980+156
bl open64
cmn r0, #1
mov r4, r0
bne .L748
bl __errno_location
ldr r3, [r0]
ldr r2, [r6, #160]
cmp r3, #17
cmpne r3, #11
bne .L749
mov r0, r2
mov r1, #0
bl open64
cmn r0, #1
mov r5, r0
beq .L929
mov r2, #15
add r1, sp, #404
bl read
cmn r0, #1
mov r4, r0
beq .L930
mov r0, r5
bl close
cmn r0, #1
beq .L766
mov r3, #0
add r2, sp, #424
add r4, r2, r4
add r1, sp, #32
add r0, sp, #404
strb r3, [r4, #-20]
bl str_to_num
cmp r0, #0
beq .L931
mov r0, #1
ldr r2, [sp, #32]
ldr r1, .L980+160
bl errx
.L661:
mov r1, r10
mov r0, r9
bl strcmp
cmp r0, #0
bne .L663
add r4, r4, #1
cmp r5, r4
ble .L932
add r8, r6, r8
ldr r0, [r8, #4]
bl xstr_to_num
ldr r3, .L980+24
str r0, [r3, #28]
b .L660
.L663:
mov r0, r9
ldr r1, .L980+164
bl strcmp
cmp r0, #0
bne .L665
add r4, r4, #1
cmp r5, r4
ble .L933
add r8, r6, r8
ldr r3, [r8, #4]
ldr r2, .L980+332
str r3, [r2, #204]
b .L660
.L665:
mov r0, r9
ldr r1, .L980+168
bl strcmp
cmp r0, #0
moveq r3, #1
ldreq r2, .L980+332
streq r3, [r2, #208]
beq .L660
.L667:
mov r0, r9
ldr r1, .L980+172
bl strcmp
cmp r0, #0
beq .L934
mov r0, r9
ldr r1, .L980+176
bl strcmp
cmp r0, #0
bne .L669
add r4, r4, #1
cmp r5, r4
ble .L935
add r8, r6, r8
ldr r2, [r8, #4]
ldr r3, .L980+24
str r2, [r3, #16]
b .L660
.L934:
mov r3, #1
ldr r2, .L980+332
str r3, [r2, #212]
b .L660
.L911:
sub r3, r0, #1
ldrb r2, [r4, r3] @ zero_extendqisi2
cmp r2, #47
moveq r2, #0
strbeq r2, [r4, r3]
b .L654
.L656:
ldr r2, .L980+180
ldr r1, .L980+184
ldr r0, .L980+188
bl xasprintf
b .L708
.L748:
mov r2, #0
mov r3, #0
str r0, [r5, #12]
bl ftruncate64
cmn r0, #1
beq .L936
bl getpid
mov r3, #16
ldr r2, .L980+192
mov r1, r3
str r0, [sp, #4]
str r2, [sp]
add r0, sp, #404
mov r2, #1
bl __snprintf_chk
add r0, sp, #404
bl strlen
mov r6, #0
mov r7, #0
mov r2, r0
add r1, sp, #404
mov r0, r4
stm sp, {r6-r7}
bl pwrite64
mov r4, r0
add r0, sp, #404
bl strlen
cmp r4, r0
bne .L937
.L747:
ldr r3, .L980+332
ldr r3, [r3, #212]
cmp r3, #0
bne .L938
.L757:
ldr r3, [r5]
cmp r3, #0
beq .L801
mov r4, #0
add r3, sp, #276
str r3, [sp, #12]
add r3, sp, #148
str r3, [sp, #8]
add r6, sp, #272
.L765:
mov r2, #60
add r3, sp, #144
str r4, [sp, #36]
str r2, [sp, #32]
.L768:
str r4, [r3, #4]!
cmp r3, r6
bne .L768
mov r3, r6
.L769:
str r4, [r3, #4]!
add r2, sp, #400
cmp r3, r2
bne .L769
ldr r0, [r5, #40]
bl __fdelt_chk
mov r8, #1
ldr r7, [r5, #40]
add r3, sp, #424
add r0, r3, r0, lsl #2
rsbs r3, r7, #0
and r3, r3, #31
and r1, r7, #31
rsbpl r1, r3, #0
ldr r3, .L980+332
ldr r2, [r0, #-276]
ldr r9, [r3, #220]
orr r2, r2, r8, lsl r1
cmp r9, #0
movne ip, #0
movne fp, #3
bic r7, r7, r7, asr #31
str r2, [r0, #-276]
bne .L770
b .L939
.L941:
sub r3, r3, #1
cmp r3, #1
bhi .L772
ldr r0, [r10, #8]
bl __fdelt_chk
mov ip, #1
ldr r3, [r10, #8]
add r2, sp, #424
rsbs r1, r3, #0
and r1, r1, #31
add r0, r2, r0, lsl #2
and r2, r3, #31
rsbpl r2, r1, #0
cmp r7, r3
movlt r7, r3
ldr r3, [r0, #-148]
orr r3, r3, r8, lsl r2
str r3, [r0, #-148]
.L772:
cmp r9, #0
beq .L940
.L770:
mov r10, r9
ldr r3, .L980+332
ldr r2, [r9, #28]
ldr r3, [r3, #12]
ldr r9, [r9]
sub r3, r3, r2
cmp r3, #59
strgt r8, [r10, #120]
strgt fp, [r10, #32]
bgt .L772
ldr r3, [r10, #32]
cmp r3, #0
bne .L941
ldr r0, [r10, #8]
bl __fdelt_chk
ldr r3, [r10, #8]
add r2, sp, #424
rsbs ip, r3, #0
add r0, r2, r0, lsl #2
ldr r2, [r0, #-276]
and ip, ip, #31
and r1, r3, #31
rsbpl r1, ip, #0
cmp r7, r3
movlt r7, r3
orr r2, r2, r8, lsl r1
cmp r9, #0
mov ip, #1
str r2, [r0, #-276]
bne .L770
.L940:
cmp ip, #0
add r0, r7, #1
beq .L777
add r3, sp, #32
str r3, [sp]
ldr r2, [sp, #12]
mov r3, r9
ldr r1, [sp, #8]
bl select
cmp r0, #0
bne .L814
.L780:
ldr r3, [r5]
cmp r3, #0
bne .L765
.L801:
ldr r0, [r5, #40]
bl close
cmn r0, #1
beq .L766
ldr r3, .L980+332
ldr r0, [r3, #148]
cmp r0, #0
beq .L802
bl fclose
.L802:
ldr r3, .L980+332
ldr r3, [r3, #160]
cmp r3, #0
beq .L803
bl pidfile_remove
.L803:
ldr r3, .L980+332
ldr r4, [r3, #220]
cmp r4, #0
beq .L805
ldr r5, [r4]
ldr r3, [r4, #4]
cmp r5, #0
beq .L942
.L809:
str r3, [r5, #4]
ldr r3, [r4, #4]
mov r0, r4
str r5, [r3]
bl free_connection
mov r0, r4
mov r4, r5
bl free
ldr r5, [r4]
ldr r3, [r4, #4]
cmp r5, #0
bne .L809
.L942:
mov r0, r4
str r5, [r3]
bl free_connection
mov r0, r4
bl free
.L805:
ldr r3, .L980+332
ldr r5, [r3, #8]
ldr r6, [r3, #4]
cmp r5, #0
movne r4, r6
addne r5, r6, r5, lsl #3
beq .L812
.L811:
ldr r0, [r4]
bl free
add r4, r4, #8
ldr r0, [r4, #-4]
bl free
cmp r5, r4
bne .L811
.L812:
mov r0, r6
bl free
ldr r3, .L980+332
ldr r0, [r3, #180]
cmp r0, #0
beq .L808
bl free
.L808:
ldr r8, .L980+332
ldr r0, [r8, #156]
bl free
ldr r0, [r8, #172]
bl free
ldr r0, [r8, #152]
bl free
add r1, sp, #32
mov r0, #0
bl getrusage
ldr r1, .L980+196
ldr r3, [sp, #44]
ldr r0, [sp, #36]
smull r6, r7, r3, r1
smull r4, r5, r0, r1
ldr r2, [sp, #40]
asr r3, r3, #31
rsb r1, r3, r7, asr #12
asr r3, r0, #31
str r1, [sp, #4]
rsb r3, r3, r5, asr #12
ldr r1, .L980+200
str r2, [sp]
mov r0, #1
ldr r2, [sp, #32]
bl __printf_chk
add r3, r8, #184
ldmia r3, {r2-r3}
ldr r1, .L980+204
mov r0, #1
bl __printf_chk
add r1, r8, #16
ldmia r1, {r0-r1}
add r3, r8, #192
ldmia r3, {r2-r3}
stm sp, {r0-r1}
mov r0, #1
ldr r1, .L980+208
bl __printf_chk
ldr r3, .L980+4
ldr r2, [r3]
ldr r3, [sp, #420]
eors r2, r3, r2
mov r3, #0
bne .L943
mov r0, #0
add sp, sp, #428
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L939:
add r0, r7, #1
.L777:
mov r3, #0
ldr r2, [sp, #12]
ldr r1, [sp, #8]
str r4, [sp]
bl select
cmp r0, #0
beq .L944
.L814:
cmn r0, #1
bne .L779
bl __errno_location
ldr r3, [r0]
cmp r3, #4
beq .L780
mov r0, #1
ldr r1, .L980+212
bl err
.L779:
mov r0, #0
bl time
mov r3, r0
ldr r2, .L980+332
ldr r0, [r5, #40]
str r3, [r2, #12]
bl __fdelt_chk
mov fp, #1
ldr r8, [r5, #40]
add r3, sp, #424
rsbs r2, r8, #0
add r0, r3, r0, lsl #2
ldr r1, [r0, #-276]
and r2, r2, #31
and r3, r8, #31
rsbpl r3, r2, #0
ands r3, r1, fp, lsl r3
bne .L945
.L781:
ldr r3, .L980+332
ldr r9, [r3, #220]
cmp r9, #0
beq .L780
mov r8, #1
mvn r10, #0
b .L790
.L795:
cmp r9, #0
beq .L780
.L790:
ldr fp, [r9, #32]
mov r7, r9
cmp fp, #1
ldr r9, [r9]
beq .L798
cmp fp, #2
beq .L799
cmp fp, #0
beq .L946
.L792:
cmp fp, #3
bne .L795
ldr fp, [r7, #120]
cmp fp, #0
beq .L796
ldr r3, [r7]
mov r0, r7
cmp r3, #0
ldrne r2, [r7, #4]
strne r2, [r3, #4]
ldr r2, [r7, #4]
str r3, [r2]
bl free_connection
mov r0, r7
bl free
b .L795
.L946:
ldr r0, [r7, #8]
bl __fdelt_chk
ldr r3, [r7, #8]
add r2, sp, #424
add r0, r2, r0, lsl #2
rsbs r2, r3, #0
ldr r1, [r0, #-276]
and r2, r2, #31
and r3, r3, #31
rsbpl r3, r2, #0
ands r3, r1, r8, lsl r3
bne .L791
.L908:
ldr fp, [r7, #32]
b .L792
.L799:
ldr r0, [r7, #8]
bl __fdelt_chk
ldr r3, [r7, #8]
add r2, sp, #424
add r0, r2, r0, lsl #2
rsbs r2, r3, #0
ldr r1, [r0, #-148]
and r2, r2, #31
and r3, r3, #31
rsbpl r3, r2, #0
ands r3, r1, r8, lsl r3
beq .L908
mov r0, r7
bl poll_send_reply
b .L908
.L798:
ldr r0, [r7, #8]
bl __fdelt_chk
ldr r3, [r7, #8]
add r2, sp, #424
add r0, r2, r0, lsl #2
rsbs r2, r3, #0
ldr r1, [r0, #-148]
and r2, r2, #31
and r3, r3, #31
rsbpl r3, r2, #0
ands r3, r1, fp, lsl r3
beq .L908
mov r0, r7
bl poll_send_header
ldr fp, [r7, #32]
b .L792
.L796:
ldr r3, [r7, #8]
mov r0, r7
str r10, [r7, #8]
str r3, [sp, #16]
bl free_connection
ldr r3, [sp, #16]
mov r2, #0
str r3, [r7, #8]
mov r3, #0
mov r0, r7
str r2, [r7, #64]
str r3, [r7, #68]
str r2, [r7, #72]
str r3, [r7, #76]
str r2, [r7, #80]
str r3, [r7, #84]
str r2, [r7, #88]
str r3, [r7, #92]
str r2, [r7, #144]
str r3, [r7, #148]
str r2, [r7, #152]
str r3, [r7, #156]
str r2, [r7, #160]
str r3, [r7, #164]
str r2, [r7, #168]
str r3, [r7, #172]
str fp, [r7, #36]
str fp, [r7, #40]
str fp, [r7, #44]
str fp, [r7, #48]
str fp, [r7, #52]
str fp, [r7, #56]
str fp, [r7, #96]
str fp, [r7, #100]
str fp, [r7, #104]
str fp, [r7, #108]
str fp, [r7, #112]
str fp, [r7, #116]
str r8, [r7, #120]
str fp, [r7, #128]
str fp, [r7, #132]
str r10, [r7, #136]
str fp, [r7, #32]
bl poll_recv_request
b .L795
.L791:
mov r0, r7
bl poll_recv_request
ldr fp, [r7, #32]
b .L792
.L709:
cmp r0, #0
str r4, [sp, #148]
str r4, [sp, #152]
str r4, [sp, #156]
str r4, [sp, #160]
beq .L714
bl inet_addr
cmn r0, #1
str r0, [sp, #152]
beq .L715
.L714:
mov r2, #0
mov r1, #1
mov r0, #2
bl socket
str r0, [r5, #40]
b .L712
.L718:
add r2, sp, #148
mov ip, r2
mov r0, #2
mov r1, r2
str r2, [sp, #8]
strh r0, [ip] @ movhi
mov r2, #16
mov r0, r6
strh r3, [ip, #2] @ movhi
bl bind
cmn r0, #1
beq .L909
mov r3, #16
add r2, sp, #28
mov r0, r6
ldr r1, [sp, #8]
str r2, [sp, #20]
str r3, [sp, #28]
bl getsockname
cmn r0, #1
beq .L723
add r0, sp, #152
bl get_address_text
mov r3, r8
mov r2, r0
ldr r1, .L980+216
mov r0, r7
bl __printf_chk
b .L721
.L919:
ldr r3, .L980+220
ldr r3, [r3]
str r3, [r2, #148]
b .L727
.L945:
mov r0, #176
bl xmalloc
mvn r3, #0
mov r7, r0
add r9, r0, #12
mov r2, #16
mov r1, #0
str r3, [r7, #8]
mov r0, r9
bl memset
ldr r3, .L980+332
mov r2, #0
ldr ip, [r3, #144]
ldr r0, [r3, #12]
mov r3, #0
str r2, [r7, #64]
str r3, [r7, #68]
str r2, [r7, #72]
str r3, [r7, #76]
str r2, [r7, #80]
str r3, [r7, #84]
str r2, [r7, #88]
str r3, [r7, #92]
mvn r3, #0
mov r2, #0
mov r1, #3
str r3, [r7, #136]
mov r3, #0
cmp ip, #0
str r2, [r7, #144]
str r3, [r7, #148]
str r2, [r7, #152]
str r3, [r7, #156]
str r2, [r7, #160]
str r3, [r7, #164]
str r2, [r7, #168]
str r3, [r7, #172]
str r4, [r7, #36]
mov r2, #16
str r4, [r7, #40]
str r4, [r7, #44]
str r4, [r7, #48]
str r4, [r7, #52]
str r4, [r7, #56]
str r4, [r7, #96]
str r4, [r7, #100]
str r4, [r7, #104]
str r4, [r7, #108]
str r4, [r7, #112]
str r4, [r7, #116]
str fp, [r7, #120]
str r4, [r7, #128]
str r4, [r7, #132]
str r0, [r7, #28]
str r1, [r7, #32]
bne .L947
str r2, [sp, #28]
mov r0, r8
ldr r2, [sp, #20]
add r1, sp, #104
str ip, [sp, #104]
str ip, [sp, #108]
str ip, [sp, #112]
str ip, [sp, #116]
bl accept
str r0, [r7, #8]
.L783:
ldr r8, [r7, #8]
cmn r8, #1
beq .L948
mov r1, #3
mov r0, r8
bl fcntl64
cmn r0, #1
beq .L949
orr r2, r0, #2048
mov r1, #4
mov r0, r8
bl fcntl64
cmn r0, #1
beq .L950
ldr r3, .L980+332
str r4, [r7, #32]
ldr r3, [r3, #144]
cmp r3, #0
ldreq r3, [sp, #108]
addne r3, sp, #128
ldmne r3, {r0, r1, r2, r3}
streq r3, [r7, #12]
stmne r9, {r0, r1, r2, r3}
ldr r3, .L980+332
mov r0, r7
ldr r3, [r3, #220]
cmp r3, #0
str r3, [r7]
strne r7, [r3, #4]
ldr r3, .L980+224
str r3, [r7, #4]
sub r2, r3, #220
str r7, [r2, #220]
bl poll_recv_request
b .L781
.L669:
mov r0, r9
ldr r1, .L980+228
bl strcmp
cmp r0, #0
beq .L951
mov r0, r9
ldr r1, .L980+232
bl strcmp
cmp r0, #0
bne .L672
add r4, r4, #1
cmp r5, r4
ble .L952
add r8, r6, r8
ldr r9, [r8, #4]
ldr r1, .L980+236
mov r0, r9
bl fopen64
subs r8, r0, #0
beq .L899
str r4, [sp, #8]
str r5, [sp, #12]
str r6, [sp, #16]
.L674:
mov r0, r8
bl ftell
cmn r0, #1
mov r4, r0
beq .L680
mov r9, #0
b .L675
.L953:
cmp r0, #13
beq .L677
add r9, r9, #1
.L675:
mov r0, r8
bl fgetc
cmn r0, #1
movne r2, #0
moveq r2, #1
cmn r0, #1
cmpne r0, #10
bne .L953
cmp r9, #0
movne r2, #0
cmp r2, #0
mov r6, r0
beq .L678
.L907:
add r4, sp, #8
mov r0, r8
ldm r4, {r4, r5, r6}
bl fclose
b .L660
.L981:
.align 2
.L980:
.word .LANCHOR0+44
.word .LC197
.word .LC84
.word .LANCHOR0+88
.word .LC82
.word .LC85
.word .LANCHOR1
.word .LC86
.word .LC87
.word .LC88
.word .LC89
.word .LC90
.word .LC91
.word .LC92
.word .LC93
.word .LC94
.word .LC95
.word .LANCHOR0+156
.word .LC96
.word .LC97
.word .LC98
.word .LC99
.word .LC100
.word .LC101
.word .LC102
.word .LC103
.word .LC105
.word .LC107
.word .LC109
.word mime_mapping_cmp
.word .LC104
.word .LANCHOR2+156
.word .LC10
.word .LC83
.word .LC151
.word .LC155
.word stop_running
.word .LC172
.word .LC174
.word 2753
.word .LC178
.word .LC111
.word .LC113
.word .LC114
.word .LC115
.word .LANCHOR0+20
.word .LC145
.word .LANCHOR2+152
.word .LC181
.word 1759218605
.word .LC194
.word .LC195
.word .LC196
.word .LC190
.word .LC152
.word stdout
.word .LANCHOR2+220
.word .LC117
.word .LC118
.word .LC120
.word .LC122
.word .LANCHOR1+44
.word .LC158
.word .LC154
.word .LC169
.word .LC179
.word .LC125
.word .LC127
.word .LC162
.word .LC161
.word .LC189
.word .LC186
.word .LC185
.word .LC184
.word .LC188
.word .LC187
.word .LC130
.word .LC133
.word .LC106
.word .LC135
.word .LC108
.word .LC129
.word .LC136
.word .LANCHOR2
.word .LC112
.word .LC110
.word .LC137
.word .LC132
.word .LC128
.word .LC131
.word .LC134
.word .LC124
.word .LC175
.word .LC183
.word .LC123
.word .LC126
.word .LC163
.word .LC160
.word .LC159
.word .LC157
.word .LC168
.word .LC167
.word .LC177
.word .LC176
.word .LC192
.word .LC191
.word .LC182
.word .LC180
.word .LC119
.word .LC193
.word .LC121
.word .LC149
.word .LC150
.word .LC173
.word .LC156
.word .LC164
.word .LC165
.word .LC116
.word .LC146
.word .LC147
.word .LC148
.word .LC170
.word .LC171
.word .LC166
.word .LC153
.word .LC139
.word .LC138
.word .LC140
.word .LC142
.word .LANCHOR1
.word .LC141
.word .LC143
.word .LANCHOR2
.word .LC144
.L947:
mov r3, #28
mov r0, r8
ldr r2, [sp, #20]
add r1, sp, #120
str r4, [sp, #120]
str r3, [sp, #28]
str r4, [sp, #124]
str r4, [sp, #128]
str r4, [sp, #132]
str r4, [sp, #136]
str r4, [sp, #140]
str r4, [sp, #144]
bl accept
str r0, [r7, #8]
b .L783
.L951:
mov r3, #1
ldr r2, .L980+332
str r3, [r2, #176]
b .L660
.L677:
mov r0, r8
bl ftell
cmn r0, #1
mov r5, r0
bne .L816
.L680:
mov r0, #1
ldr r1, .L980+240
bl err
.L921:
ldr r0, .L980+244
bl pipe
cmn r0, #1
beq .L954
mov r2, #0
mov r1, #2
ldr r0, .L980+248
bl open64
cmn r0, #1
str r0, [r5, #52]
beq .L955
bl fork
cmn r0, #1
mov r4, r0
beq .L956
cmp r0, #0
beq .L728
ldr r0, [r5, #48]
bl close
cmn r0, #1
beq .L957
.L732:
mov r2, #1
ldr r0, [r5, #44]
add r1, sp, #404
bl read
cmn r0, #1
beq .L958
.L733:
mov r0, r4
mov r2, #1
add r1, sp, #32
bl waitpid
cmn r0, #1
beq .L959
cmp r0, #0
ldrbne r0, [sp, #33] @ zero_extendqisi2
bl exit
.L918:
ldr r0, .L980+252
bl puts
b .L725
.L925:
bl tzset
ldr r3, .L980+332
ldr r4, [r3, #172]
mov r0, r4
bl chdir
cmn r0, #1
beq .L960
mov r0, r4
bl chroot
cmn r0, #1
mov r2, r4
beq .L961
mov r0, #1
ldr r1, .L980+256
bl __printf_chk
mov r2, #0
ldr r3, .L980+332
ldr r3, [r3, #172]
strb r2, [r3]
b .L739
.L938:
ldr r3, [r5, #52]
cmn r3, #1
beq .L757
bl setsid
cmn r0, #1
beq .L962
ldr r0, [r5, #44]
bl close
cmn r0, #1
beq .L963
.L760:
ldr r0, [r5, #48]
bl close
cmn r0, #1
beq .L964
.L761:
mov r1, #0
ldr r0, [r5, #52]
bl dup2
cmn r0, #1
beq .L965
.L762:
mov r1, #1
ldr r0, [r5, #52]
bl dup2
cmn r0, #1
beq .L966
.L763:
mov r1, #2
ldr r0, [r5, #52]
bl dup2
cmn r0, #1
beq .L967
.L764:
ldr r0, [r5, #52]
cmp r0, #2
ble .L757
bl close
b .L757
.L678:
mov r0, r8
bl ftell
cmn r0, #1
mov r5, r0
beq .L680
cmp r6, #13
beq .L816
.L681:
add r0, r9, #1
bl xmalloc
mov r3, r0
mov r1, r4
mov r2, #0
mov r0, r8
mov r4, r3
bl fseek
cmn r0, #1
beq .L684
mov r3, r8
mov r2, r9
mov r1, #1
mov r0, r4
bl fread
cmp r9, r0
bne .L968
mov r3, #0
mov r1, r5
mov r2, #0
mov r0, r8
strb r3, [r4, r9]
bl fseek
cmn r0, #1
beq .L684
cmp r4, #0
beq .L907
mov r0, r4
bl parse_mimetype_line
mov r0, r4
bl free
b .L674
.L816:
mov r0, r8
bl fgetc
cmp r0, #10
addeq r5, r5, #1
b .L681
.L749:
mov r0, #1
ldr r1, .L980+260
bl err
.L672:
mov r0, r9
ldr r1, .L980+264
bl strcmp
cmp r0, #0
beq .L969
mov r0, r9
ldr r1, .L980+268
bl strcmp
cmp r0, #0
bne .L689
add r4, r4, #1
cmp r5, r4
ble .L970
add r8, r8, #4
ldr r0, [r6, r8]
bl getpwnam
subs r3, r0, #0
add r9, r6, r8
beq .L971
.L691:
ldr r2, [r3, #8]
ldr r3, .L980+516
str r2, [r3, #32]
b .L660
.L969:
add r4, r4, #1
cmp r5, r4
ble .L972
add r8, r6, r8
ldr r2, [r8, #4]
ldr r3, .L980+516
str r2, [r3, #4]
b .L660
.L958:
ldr r0, .L980+272
bl warn
b .L733
.L957:
ldr r0, .L980+276
bl warn
b .L732
.L944:
mov r0, #1
ldr r1, .L980+280
bl errx
.L965:
ldr r0, .L980+284
bl warn
b .L762
.L964:
ldr r0, .L980+288
bl warn
b .L761
.L963:
ldr r0, .L980+292
bl warn
b .L760
.L967:
ldr r0, .L980+296
bl warn
b .L764
.L966:
ldr r0, .L980+300
bl warn
b .L763
.L689:
mov r0, r9
ldr r1, .L980+304
bl strcmp
cmp r0, #0
bne .L692
add r4, r4, #1
cmp r5, r4
ble .L973
add r8, r8, #4
ldr r0, [r6, r8]
bl getgrnam
subs r3, r0, #0
add r9, r6, r8
beq .L974
.L694:
ldr r2, [r3, #8]
ldr r3, .L980+516
str r2, [r3, #36]
b .L660
.L692:
mov r0, r9
ldr r1, .L980+308
bl strcmp
cmp r0, #0
bne .L695
add r4, r4, #1
cmp r5, r4
ble .L975
add r8, r6, r8
ldr r3, [r8, #4]
ldr r2, .L980+332
str r3, [r2, #160]
b .L660
.L912:
mov r0, #1
ldr r1, .L980+312
bl errx
.L695:
mov r0, r9
ldr r1, .L980+316
bl strcmp
cmp r0, #0
bne .L697
ldr r3, .L980+516
str r0, [r3, #20]
b .L660
.L914:
mov r0, #1
ldr r1, .L980+320
bl errx
.L971:
ldr r0, [r6, r8]
bl xstr_to_num
bl getpwuid
subs r3, r0, #0
bne .L691
mov r0, #1
ldr r2, [r9]
ldr r1, .L980+324
bl errx
.L697:
mov r0, r9
ldr r1, .L980+328
bl strcmp
cmp r0, #0
bne .L698
mov r3, #1
ldr r2, .L980+332
str r3, [r2, #216]
b .L660
.L933:
mov r0, #1
ldr r1, .L980+336
bl errx
.L932:
mov r0, #1
ldr r1, .L980+340
bl errx
.L698:
mov r0, r9
ldr r1, .L980+344
bl strcmp
cmp r0, #0
bne .L699
add r3, r4, #1
cmp r5, r3
ble .L976
add r4, r4, #2
add r8, r6, r8
cmp r5, r4
ldr r9, [r8, #4]
ble .L977
ldr r2, .L980+528
ldr r8, [r8, #8]
ldr r3, [r2, #164]
ldr r0, [r2, #180]
add r3, r3, #1
lsl r1, r3, #3
str r1, [sp, #8]
str r3, [r2, #164]
bl realloc
subs r3, r0, #0
ldr r1, [sp, #8]
beq .L978
sub r1, r1, #8
add r2, r3, r1
str r9, [r3, r1]
ldr r1, .L980+528
str r8, [r2, #4]
str r3, [r1, #180]
b .L660
.L974:
ldr r0, [r6, r8]
bl xstr_to_num
bl getgrgid
subs r3, r0, #0
bne .L694
mov r0, #1
ldr r2, [r9]
ldr r1, .L980+348
bl errx
.L970:
mov r0, #1
ldr r1, .L980+352
bl errx
.L973:
mov r0, #1
ldr r1, .L980+356
bl errx
.L975:
mov r0, #1
ldr r1, .L980+360
bl errx
.L968:
mov r2, r0
mov r3, r9
mov r0, #1
ldr r1, .L980+364
bl errx
.L929:
mov r0, #1
ldr r1, .L980+368
bl err
.L962:
mov r0, #1
ldr r1, .L980+372
bl err
.L684:
mov r0, #1
ldr r1, .L980+376
bl err
.L972:
mov r0, #1
ldr r1, .L980+380
bl errx
.L959:
mov r0, #1
ldr r1, .L980+384
bl err
.L956:
mov r0, #1
ldr r1, .L980+388
bl err
.L955:
mov r0, #1
ldr r1, .L980+392
bl err
.L954:
mov r0, #1
ldr r1, .L980+396
bl err
.L961:
mov r0, #1
ldr r1, .L980+400
bl err
.L960:
mov r2, r4
mov r0, #1
ldr r1, .L980+404
bl err
.L931:
mov r0, #1
ldr r1, .L980+408
add r2, sp, #404
bl err
.L930:
mov r0, #1
ldr r1, .L980+412
bl err
.L949:
mov r0, #1
ldr r1, .L980+416
bl err
.L948:
mov r0, #1
ldr r1, .L980+420
bl err
.L937:
bl __errno_location
mov r4, r0
ldr r5, [r0]
bl pidfile_remove
mov r0, #1
ldr r1, .L980+424
str r5, [r4]
bl err
.L936:
bl __errno_location
mov r4, r0
ldr r5, [r0]
bl pidfile_remove
mov r0, #1
ldr r1, .L980+428
str r5, [r4]
bl err
.L952:
mov r0, #1
ldr r1, .L980+432
bl errx
.L950:
mov r0, #1
ldr r1, .L980+436
bl err
.L899:
mov r2, r9
mov r0, #1
ldr r1, .L980+440
bl err
.L909:
mov r2, r8
mov r0, r7
ldr r1, .L980+444
bl err
.L723:
mov r0, #1
ldr r1, .L980+448
bl err
.L928:
mov r0, #1
ldr r1, .L980+452
bl err
.L920:
mov r0, #1
ldr r2, [r3, #204]
ldr r1, .L980+456
bl err
.L943:
bl __stack_chk_fail
.L922:
mov r0, #1
ldr r1, .L980+460
bl err
.L923:
mov r0, #1
ldr r1, .L980+464
bl err
.L935:
mov r0, #1
ldr r1, .L980+468
bl errx
.L715:
mov r0, #1
ldr r1, .L980+472
bl errx
.L915:
mov r0, #1
ldr r1, .L980+476
bl err
.L916:
mov r0, r7
ldr r1, .L980+480
bl err
.L926:
mov r2, r4
mov r0, #1
ldr r1, .L980+484
bl err
.L927:
mov r0, #1
ldr r1, .L980+488
bl err
.L924:
mov r0, #1
ldr r1, .L980+492
bl err
.L917:
mov r0, #1
ldr r1, .L980+496
bl err
.L766:
bl xclose.part.0
.L978:
mov r0, r1
bl xrealloc.part.0
.L977:
mov r0, #1
ldr r1, .L980+500
bl errx
.L976:
mov r0, #1
ldr r1, .L980+504
bl errx
.L699:
mov r0, r9
ldr r1, .L980+508
bl strcmp
cmp r0, #0
bne .L703
add r4, r4, #1
cmp r5, r4
ble .L979
add r8, r6, r8
ldr r3, [r8, #4]
ldr r2, .L980+528
str r3, [r2, #168]
b .L660
.L703:
mov r0, r9
ldr r1, .L980+512
bl strcmp
cmp r0, #0
bne .L705
ldr r3, .L980+516
str r0, [r3, #8]
b .L660
.L979:
mov r0, #1
ldr r1, .L980+520
bl errx
.L705:
mov r0, r9
ldr r1, .L980+524
bl strcmp
cmp r0, #0
moveq r3, #1
ldreq r2, .L980+528
streq r3, [r2, #144]
beq .L660
.L706:
mov r2, r9
mov r0, #1
ldr r1, .L980+532
bl errx
.size main, .-main
.set hex.9699,hex.9528
.section .rodata.str1.4
.align 2
.LC198:
.ascii "application/pdf pdf\000"
.align 2
.LC199:
.ascii "application/xml xsl xml\000"
.align 2
.LC200:
.ascii "application/xml-dtd dtd\000"
.align 2
.LC201:
.ascii "application/xslt+xml xslt\000"
.align 2
.LC202:
.ascii "application/zip zip\000"
.align 2
.LC203:
.ascii "audio/mpeg mp2 mp3 mpga\000"
.align 2
.LC204:
.ascii "image/gif gif\000"
.align 2
.LC205:
.ascii "image/jpeg jpeg jpe jpg\000"
.align 2
.LC206:
.ascii "image/png png\000"
.align 2
.LC207:
.ascii "text/css css\000"
.align 2
.LC208:
.ascii "text/html html htm\000"
.align 2
.LC209:
.ascii "text/javascript js\000"
.align 2
.LC210:
.ascii "text/plain txt asc\000"
.align 2
.LC211:
.ascii "video/mpeg mpeg mpe mpg\000"
.align 2
.LC212:
.ascii "video/quicktime qt mov\000"
.align 2
.LC213:
.ascii "video/x-msvideo avi\000"
.align 2
.LC214:
.ascii "index.html\000"
.section .rodata
.align 2
.set .LANCHOR0,. + 0
.type hex.9528, %object
.size hex.9528, 17
hex.9528:
.ascii "0123456789ABCDEF\000"
.space 3
.type pkgname, %object
.size pkgname, 24
pkgname:
.ascii "darkhttpd/1.12.from.git\000"
.type copyright, %object
.size copyright, 37
copyright:
.ascii "copyright (c) 2003-2016 Emil Mikulic\000"
.space 3
.type default_extension_map, %object
.size default_extension_map, 72
default_extension_map:
.word .LC82
.word .LC198
.word .LC199
.word .LC200
.word .LC201
.word .LC202
.word .LC203
.word .LC204
.word .LC205
.word .LC206
.word .LC207
.word .LC208
.word .LC209
.word .LC210
.word .LC211
.word .LC212
.word .LC213
.word 0
.type octet_stream, %object
.size octet_stream, 25
octet_stream:
.ascii "application/octet-stream\000"
.data
.align 2
.set .LANCHOR1,. + 0
.type running, %object
.size running, 4
running:
.word 1
.type default_mimetype, %object
.size default_mimetype, 4
default_mimetype:
.word octet_stream
.type want_server_id, %object
.size want_server_id, 4
want_server_id:
.word 1
.type pidfile_fd, %object
.size pidfile_fd, 4
pidfile_fd:
.word -1
.type index_name, %object
.size index_name, 4
index_name:
.word .LC214
.type want_keepalive, %object
.size want_keepalive, 4
want_keepalive:
.word 1
.type bindport, %object
.size bindport, 2
bindport:
.short 8080
.space 2
.type max_connections, %object
.size max_connections, 4
max_connections:
.word -1
.type drop_uid, %object
.size drop_uid, 4
drop_uid:
.word -1
.type drop_gid, %object
.size drop_gid, 4
drop_gid:
.word -1
.type sockin, %object
.size sockin, 4
sockin:
.word -1
.type lifeline, %object
.size lifeline, 8
lifeline:
.word -1
.word -1
.type fd_null, %object
.size fd_null, 4
fd_null:
.word -1
.bss
.align 3
.set .LANCHOR2,. + 0
.type longest_ext, %object
.size longest_ext, 4
longest_ext:
.space 4
.type mime_map, %object
.size mime_map, 4
mime_map:
.space 4
.type mime_map_size, %object
.size mime_map_size, 4
mime_map_size:
.space 4
.type now, %object
.size now, 4
now:
.space 4
.type total_out, %object
.size total_out, 8
total_out:
.space 8
.type _generated_on_buf, %object
.size _generated_on_buf, 72
_generated_on_buf:
.space 72
.type text_addr.9476, %object
.size text_addr.9476, 46
text_addr.9476:
.space 46
.space 2
.type inet6, %object
.size inet6, 4
inet6:
.space 4
.type logfile, %object
.size logfile, 4
logfile:
.space 4
.type server_hdr, %object
.size server_hdr, 4
server_hdr:
.space 4
.type keep_alive_field, %object
.size keep_alive_field, 4
keep_alive_field:
.space 4
.type pidfile_name, %object
.size pidfile_name, 4
pidfile_name:
.space 4
.type forward_map_size, %object
.size forward_map_size, 4
forward_map_size:
.space 4
.type forward_all_url, %object
.size forward_all_url, 4
forward_all_url:
.space 4
.type wwwroot, %object
.size wwwroot, 4
wwwroot:
.space 4
.type no_listing, %object
.size no_listing, 4
no_listing:
.space 4
.type forward_map, %object
.size forward_map, 4
forward_map:
.space 4
.type num_requests, %object
.size num_requests, 8
num_requests:
.space 8
.type total_in, %object
.size total_in, 8
total_in:
.space 8
.type bindaddr, %object
.size bindaddr, 4
bindaddr:
.space 4
.type logfile_name, %object
.size logfile_name, 4
logfile_name:
.space 4
.type want_chroot, %object
.size want_chroot, 4
want_chroot:
.space 4
.type want_daemon, %object
.size want_daemon, 4
want_daemon:
.space 4
.type want_accf, %object
.size want_accf, 4
want_accf:
.space 4
.type connlist, %object
.size connlist, 4
connlist:
.space 4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99947.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99947.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999476.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999476.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999486.c"
.intel_syntax noprefix
.text
.p2align 4
.globl __VERIFIER_nondet_bool
.type __VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
call __VERIFIER_nondet_int@PLT
test eax, eax
setne al
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE0:
.size __VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 88
.cfi_def_cfa_offset 144
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s19_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s18_l1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s18_l0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s18_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s18_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s18_evt0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s18_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s17_l1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s17_l0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s17_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s17_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s17_evt0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s17_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s16_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s16_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s16_evt0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s16_x[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s18_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s15_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s18_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s15_l0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s15_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s15_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s15_evt0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s15_x[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s17_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s14_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s17_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s14_l0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s4_evt0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s16_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s13_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s4_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s19_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR bus_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s3_evt0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s15_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s12_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s3_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s5_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s5_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s2_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s3_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s6_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s2_evt1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s14_x[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s0_lambda[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _diverge_delta[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s19_l0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR bus_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s5_x[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s0_backoff[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s0_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s14_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s2_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s4_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s19_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR bus_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s19_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR bus_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s1_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s4_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s0_evt0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s19_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s16_l0[rip]
call __VERIFIER_nondet_int@PLT
mov DWORD PTR bus_cd_id[rip], eax
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s6_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s1_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s4_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s0_evt1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s12_x[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s15_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s12_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s19_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s16_l1[rip]
call __VERIFIER_nondet_int@PLT
mov DWORD PTR bus_j[rip], eax
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s5_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s0_evt2[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR delta[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s4_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s7_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s3_evt1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s3_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s0_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s2_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s3_evt2[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s3_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s0_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s2_backoff[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s1_x[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s6_x[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s1_backoff[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s1_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s2_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s5_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s1_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s2_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s5_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s1_evt1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s13_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s1_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s4_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s19_l1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR bus_l1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s9_evt0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s2_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s3_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s6_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s6_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s6_evt1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s7_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s4_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s7_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s7_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s7_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s7_evt2[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s8_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s5_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s8_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s5_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s8_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s8_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s8_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s8_evt2[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s9_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s6_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s9_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s6_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s9_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s9_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s9_evt2[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s12_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s9_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s10_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s7_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s10_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s7_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s10_lambda[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR bus_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s10_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s10_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s10_evt2[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s13_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s10_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s11_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s8_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s11_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s8_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s11_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s11_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s11_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s11_evt2[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s14_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s11_l0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s9_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s12_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s12_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s12_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s12_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s10_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s13_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s13_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s13_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s13_evt2[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s16_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s13_l0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s11_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR s14_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR s14_evt0[rip]
call __VERIFIER_nondet_int@PLT
movzx edx, BYTE PTR s19_l0[rip]
test eax, eax
setne BYTE PTR s14_evt1[rip]
or dl, BYTE PTR s19_l1[rip]
jne .L4593
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR s19_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s19_evt2[rip], 0
jne .L8
cmp BYTE PTR s19_evt0[rip], 0
je .L9
cmp BYTE PTR s19_evt1[rip], 0
jne .L4593
.L9:
movss xmm0, DWORD PTR s19_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm6, xmm6
comiss xmm6, DWORD PTR s19_lambda[rip]
jnb .L4593
movzx edx, BYTE PTR s18_l0[rip]
or dl, BYTE PTR s18_l1[rip]
jne .L4593
ucomiss xmm6, DWORD PTR s18_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s18_evt2[rip], 0
jne .L12
cmp BYTE PTR s18_evt0[rip], 0
je .L13
cmp BYTE PTR s18_evt1[rip], 0
jne .L4593
.L13:
movss xmm0, DWORD PTR s18_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm7, xmm7
comiss xmm7, DWORD PTR s18_lambda[rip]
jnb .L4593
movzx edx, BYTE PTR s17_l0[rip]
or dl, BYTE PTR s17_l1[rip]
jne .L4593
ucomiss xmm7, DWORD PTR s17_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s17_evt2[rip], 0
jne .L16
cmp BYTE PTR s17_evt0[rip], 0
je .L17
cmp BYTE PTR s17_evt1[rip], 0
jne .L4593
.L17:
movss xmm0, DWORD PTR s17_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm6, xmm6
comiss xmm6, DWORD PTR s17_lambda[rip]
jnb .L4593
movzx edx, BYTE PTR s16_l0[rip]
or dl, BYTE PTR s16_l1[rip]
jne .L4593
ucomiss xmm6, DWORD PTR s16_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s16_evt2[rip], 0
jne .L20
cmp BYTE PTR s16_evt0[rip], 0
je .L21
cmp BYTE PTR s16_evt1[rip], 0
jne .L4593
.L21:
movss xmm0, DWORD PTR s16_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm5, xmm5
comiss xmm5, DWORD PTR s16_lambda[rip]
jnb .L4593
movzx edx, BYTE PTR s15_l0[rip]
or dl, BYTE PTR s15_l1[rip]
jne .L4593
ucomiss xmm5, DWORD PTR s15_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s15_evt2[rip], 0
jne .L24
cmp BYTE PTR s15_evt0[rip], 0
je .L25
cmp BYTE PTR s15_evt1[rip], 0
jne .L4593
.L25:
movss xmm0, DWORD PTR s15_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm7, xmm7
comiss xmm7, DWORD PTR s15_lambda[rip]
jnb .L4593
movzx edx, BYTE PTR s14_l0[rip]
or dl, BYTE PTR s14_l1[rip]
jne .L4593
ucomiss xmm7, DWORD PTR s14_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s14_evt2[rip], 0
jne .L28
cmp BYTE PTR s14_evt0[rip], 0
je .L29
test eax, eax
jne .L4593
.L29:
movss xmm0, DWORD PTR s14_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm6, xmm6
comiss xmm6, DWORD PTR s14_lambda[rip]
jnb .L4593
movzx eax, BYTE PTR s13_l0[rip]
or al, BYTE PTR s13_l1[rip]
jne .L4593
ucomiss xmm6, DWORD PTR s13_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s13_evt2[rip], 0
jne .L32
cmp BYTE PTR s13_evt0[rip], 0
je .L33
cmp BYTE PTR s13_evt1[rip], 0
jne .L4593
.L33:
movss xmm0, DWORD PTR s13_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm5, xmm5
comiss xmm5, DWORD PTR s13_lambda[rip]
jnb .L4593
movzx eax, BYTE PTR s12_l0[rip]
or al, BYTE PTR s12_l1[rip]
jne .L4593
ucomiss xmm5, DWORD PTR s12_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s12_evt2[rip], 0
jne .L36
cmp BYTE PTR s12_evt0[rip], 0
je .L37
cmp BYTE PTR s12_evt1[rip], 0
jne .L4593
.L37:
movss xmm0, DWORD PTR s12_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm7, xmm7
comiss xmm7, DWORD PTR s12_lambda[rip]
jnb .L4593
movzx eax, BYTE PTR s11_l0[rip]
or al, BYTE PTR s11_l1[rip]
jne .L4593
ucomiss xmm7, DWORD PTR s11_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s11_evt2[rip], 0
jne .L40
cmp BYTE PTR s11_evt0[rip], 0
je .L41
cmp BYTE PTR s11_evt1[rip], 0
jne .L4593
.L41:
movss xmm0, DWORD PTR s11_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm6, xmm6
comiss xmm6, DWORD PTR s11_lambda[rip]
jnb .L4593
movzx eax, BYTE PTR s10_l0[rip]
or al, BYTE PTR s10_l1[rip]
jne .L4593
ucomiss xmm6, DWORD PTR s10_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s10_evt2[rip], 0
jne .L44
cmp BYTE PTR s10_evt0[rip], 0
je .L45
cmp BYTE PTR s10_evt1[rip], 0
jne .L4593
.L45:
movss xmm0, DWORD PTR s10_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm5, xmm5
comiss xmm5, DWORD PTR s10_lambda[rip]
jnb .L4593
movzx eax, BYTE PTR s9_l0[rip]
or al, BYTE PTR s9_l1[rip]
jne .L4593
ucomiss xmm5, DWORD PTR s9_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s9_evt2[rip], 0
jne .L48
cmp BYTE PTR s9_evt0[rip], 0
je .L49
cmp BYTE PTR s9_evt1[rip], 0
jne .L4593
.L49:
movss xmm0, DWORD PTR s9_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm7, xmm7
comiss xmm7, DWORD PTR s9_lambda[rip]
jnb .L4593
movzx eax, BYTE PTR s8_l0[rip]
or al, BYTE PTR s8_l1[rip]
jne .L4593
ucomiss xmm7, DWORD PTR s8_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s8_evt2[rip], 0
jne .L52
cmp BYTE PTR s8_evt0[rip], 0
je .L53
cmp BYTE PTR s8_evt1[rip], 0
jne .L4593
.L53:
movss xmm0, DWORD PTR s8_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm6, xmm6
comiss xmm6, DWORD PTR s8_lambda[rip]
jnb .L4593
movzx eax, BYTE PTR s7_l0[rip]
or al, BYTE PTR s7_l1[rip]
jne .L4593
ucomiss xmm6, DWORD PTR s7_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s7_evt2[rip], 0
jne .L56
cmp BYTE PTR s7_evt0[rip], 0
je .L57
cmp BYTE PTR s7_evt1[rip], 0
jne .L4593
.L57:
movss xmm0, DWORD PTR s7_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm5, xmm5
comiss xmm5, DWORD PTR s7_lambda[rip]
jnb .L4593
movzx eax, BYTE PTR s6_l0[rip]
or al, BYTE PTR s6_l1[rip]
jne .L4593
ucomiss xmm5, DWORD PTR s6_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s6_evt2[rip], 0
jne .L60
cmp BYTE PTR s6_evt0[rip], 0
je .L61
cmp BYTE PTR s6_evt1[rip], 0
jne .L4593
.L61:
movss xmm0, DWORD PTR s6_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm7, xmm7
comiss xmm7, DWORD PTR s6_lambda[rip]
jnb .L4593
movzx eax, BYTE PTR s5_l0[rip]
or al, BYTE PTR s5_l1[rip]
jne .L4593
ucomiss xmm7, DWORD PTR s5_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s5_evt2[rip], 0
jne .L64
cmp BYTE PTR s5_evt0[rip], 0
je .L65
cmp BYTE PTR s5_evt1[rip], 0
jne .L4593
.L65:
movss xmm0, DWORD PTR s5_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm6, xmm6
comiss xmm6, DWORD PTR s5_lambda[rip]
jnb .L4593
movzx eax, BYTE PTR s4_l0[rip]
or al, BYTE PTR s4_l1[rip]
jne .L4593
ucomiss xmm6, DWORD PTR s4_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s4_evt2[rip], 0
jne .L68
cmp BYTE PTR s4_evt0[rip], 0
je .L69
cmp BYTE PTR s4_evt1[rip], 0
jne .L4593
.L69:
movss xmm0, DWORD PTR s4_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm5, xmm5
comiss xmm5, DWORD PTR s4_lambda[rip]
jnb .L4593
movzx eax, BYTE PTR s3_l0[rip]
or al, BYTE PTR s3_l1[rip]
jne .L4593
ucomiss xmm5, DWORD PTR s3_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s3_evt2[rip], 0
jne .L72
cmp BYTE PTR s3_evt0[rip], 0
je .L73
cmp BYTE PTR s3_evt1[rip], 0
jne .L4593
.L73:
movss xmm0, DWORD PTR s3_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm7, xmm7
comiss xmm7, DWORD PTR s3_lambda[rip]
jnb .L4593
movzx eax, BYTE PTR s2_l0[rip]
or al, BYTE PTR s2_l1[rip]
jne .L4593
ucomiss xmm7, DWORD PTR s2_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s2_evt2[rip], 0
jne .L76
cmp BYTE PTR s2_evt0[rip], 0
je .L77
cmp BYTE PTR s2_evt1[rip], 0
jne .L4593
.L77:
movss xmm0, DWORD PTR s2_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm6, xmm6
comiss xmm6, DWORD PTR s2_lambda[rip]
jnb .L4593
movzx eax, BYTE PTR s1_l0[rip]
or al, BYTE PTR s1_l1[rip]
jne .L4593
ucomiss xmm6, DWORD PTR s1_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s1_evt2[rip], 0
jne .L80
cmp BYTE PTR s1_evt0[rip], 0
je .L81
cmp BYTE PTR s1_evt1[rip], 0
jne .L4593
.L81:
movss xmm0, DWORD PTR s1_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm5, xmm5
comiss xmm5, DWORD PTR s1_lambda[rip]
jnb .L4593
movzx eax, BYTE PTR s0_l0[rip]
or al, BYTE PTR s0_l1[rip]
jne .L4593
ucomiss xmm5, DWORD PTR s0_x[rip]
jp .L4593
jne .L4593
cmp BYTE PTR s0_evt2[rip], 0
jne .L84
cmp BYTE PTR s0_evt0[rip], 0
je .L85
cmp BYTE PTR s0_evt1[rip], 0
jne .L4593
.L85:
movss xmm0, DWORD PTR s0_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L4593
pxor xmm7, xmm7
comiss xmm7, DWORD PTR s0_lambda[rip]
jnb .L4593
movzx eax, BYTE PTR bus_l0[rip]
or al, BYTE PTR bus_l1[rip]
jne .L4593
cmp BYTE PTR bus_evt2[rip], 0
jne .L87
cmp BYTE PTR bus_evt0[rip], 0
jne .L6586
.L88:
cmp DWORD PTR bus_j[rip], 0
jne .L4593
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR bus_x[rip]
jp .L4593
jne .L4593
movss xmm0, DWORD PTR delta[rip]
comiss xmm0, xmm5
jb .L4593
ucomiss xmm0, DWORD PTR _diverge_delta[rip]
jp .L4593
je .L1720
jmp .L4593
.p2align 4,,10
.p2align 3
.L6587:
cmp BYTE PTR _x_s19_evt0[rip], 0
je .L94
cmp BYTE PTR _x_s19_evt1[rip], 0
je .L94
movzx ecx, BYTE PTR _x_s19_l0[rip]
movss xmm0, DWORD PTR _x_s19_backoff[rip]
xor r10d, r10d
movss xmm1, DWORD PTR _x_s19_lambda[rip]
movss xmm2, DWORD PTR _x_s19_x[rip]
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
movzx esi, BYTE PTR _x_s17_l1[rip]
movzx r9d, BYTE PTR _x_s19_l1[rip]
.p2align 4,,10
.p2align 3
.L95:
mov BYTE PTR s17_l1[rip], sil
movzx esi, BYTE PTR _x_s17_l0[rip]
movss DWORD PTR s19_x[rip], xmm2
movss xmm2, DWORD PTR _x_s18_x[rip]
mov BYTE PTR s17_l0[rip], sil
movzx esi, BYTE PTR _x_s17_evt2[rip]
mov BYTE PTR s18_l0[rip], dil
movzx edi, BYTE PTR _x_s18_evt2[rip]
mov BYTE PTR s17_evt2[rip], sil
movzx esi, BYTE PTR _x_s17_evt1[rip]
movss DWORD PTR s18_x[rip], xmm2
movss xmm2, DWORD PTR _x_s17_x[rip]
mov BYTE PTR s17_evt1[rip], sil
movzx esi, BYTE PTR _x_s17_evt0[rip]
mov BYTE PTR s18_evt2[rip], dil
movzx edi, BYTE PTR _x_s18_evt1[rip]
mov BYTE PTR s17_evt0[rip], sil
movzx esi, BYTE PTR _x_s16_evt2[rip]
movss DWORD PTR s17_x[rip], xmm2
movss xmm2, DWORD PTR _x_s16_x[rip]
mov BYTE PTR s16_evt2[rip], sil
movzx esi, BYTE PTR _x_s16_evt1[rip]
mov BYTE PTR s18_evt1[rip], dil
movzx edi, BYTE PTR _x_s18_evt0[rip]
mov BYTE PTR s16_evt1[rip], sil
movzx esi, BYTE PTR _x_s16_evt0[rip]
movss DWORD PTR s16_x[rip], xmm2
movss xmm2, DWORD PTR _x_s18_backoff[rip]
mov BYTE PTR s18_l1[rip], r8b
movss DWORD PTR s18_backoff[rip], xmm2
mov BYTE PTR s18_evt0[rip], dil
mov BYTE PTR s16_evt0[rip], sil
movzx esi, BYTE PTR _x_s15_l1[rip]
movss xmm2, DWORD PTR _x_s18_lambda[rip]
mov BYTE PTR s19_evt2[rip], al
mov BYTE PTR s15_l1[rip], sil
movzx esi, BYTE PTR _x_s15_l0[rip]
movss DWORD PTR s18_lambda[rip], xmm2
movss xmm2, DWORD PTR _x_s15_x[rip]
movzx eax, BYTE PTR _x_bus_evt2[rip]
mov BYTE PTR s15_l0[rip], sil
movzx esi, BYTE PTR _x_s15_evt2[rip]
movss DWORD PTR s15_x[rip], xmm2
movss xmm2, DWORD PTR _x_s17_backoff[rip]
mov BYTE PTR s15_evt2[rip], sil
movzx esi, BYTE PTR _x_s15_evt1[rip]
movss DWORD PTR s17_backoff[rip], xmm2
movss xmm2, DWORD PTR _x_s17_lambda[rip]
mov BYTE PTR s15_evt1[rip], sil
movzx esi, BYTE PTR _x_s15_evt0[rip]
movss DWORD PTR s17_lambda[rip], xmm2
movss xmm2, DWORD PTR _x_s16_backoff[rip]
mov BYTE PTR s15_evt0[rip], sil
movzx esi, BYTE PTR _x_s14_l1[rip]
movss DWORD PTR s16_backoff[rip], xmm2
movss xmm2, DWORD PTR _x_s4_x[rip]
mov BYTE PTR s14_l1[rip], sil
movzx esi, BYTE PTR _x_s14_l0[rip]
movss DWORD PTR s4_x[rip], xmm2
mov BYTE PTR s14_l0[rip], sil
movzx esi, BYTE PTR _x_s4_evt0[rip]
mov BYTE PTR s4_evt0[rip], sil
movzx esi, BYTE PTR _x_s13_l1[rip]
mov BYTE PTR s13_l1[rip], sil
mov BYTE PTR bus_evt2[rip], al
movzx eax, BYTE PTR _x_s3_evt0[rip]
movss xmm2, DWORD PTR _x_s15_backoff[rip]
mov BYTE PTR s19_l0[rip], cl
mov BYTE PTR s3_evt0[rip], al
movzx eax, BYTE PTR _x_s12_l1[rip]
movss DWORD PTR s15_backoff[rip], xmm2
movss xmm2, DWORD PTR _x_s3_x[rip]
mov BYTE PTR s12_l1[rip], al
movzx eax, BYTE PTR _x_s5_evt2[rip]
movss DWORD PTR s3_x[rip], xmm2
movss xmm2, DWORD PTR _x_s6_backoff[rip]
mov BYTE PTR s5_evt2[rip], al
movzx eax, BYTE PTR _x_s5_evt1[rip]
movss DWORD PTR s6_backoff[rip], xmm2
movss xmm2, DWORD PTR _x_s14_x[rip]
mov BYTE PTR s5_evt1[rip], al
movzx eax, BYTE PTR _x_s2_evt2[rip]
movss DWORD PTR s14_x[rip], xmm2
movss xmm2, DWORD PTR _x_s0_lambda[rip]
mov BYTE PTR s2_evt2[rip], al
movzx eax, BYTE PTR _x_s3_l1[rip]
movss DWORD PTR s0_lambda[rip], xmm2
movss xmm2, DWORD PTR _x__diverge_delta[rip]
mov BYTE PTR s3_l1[rip], al
movzx eax, BYTE PTR _x_s2_evt1[rip]
movss DWORD PTR _diverge_delta[rip], xmm2
movss xmm2, DWORD PTR _x_s5_x[rip]
mov BYTE PTR s2_evt1[rip], al
movzx eax, BYTE PTR _x_bus_l0[rip]
movss DWORD PTR s5_x[rip], xmm2
movss xmm2, DWORD PTR _x_s0_backoff[rip]
mov BYTE PTR bus_l0[rip], al
movss DWORD PTR s0_backoff[rip], xmm2
movzx eax, BYTE PTR _x_s14_evt2[rip]
movss xmm2, DWORD PTR _x_s0_x[rip]
movss DWORD PTR s19_lambda[rip], xmm1
movss xmm1, DWORD PTR _x_s4_backoff[rip]
mov BYTE PTR s14_evt2[rip], al
movzx eax, BYTE PTR _x_s2_evt0[rip]
movss DWORD PTR s0_x[rip], xmm2
movss xmm2, DWORD PTR _x_s4_lambda[rip]
mov BYTE PTR s2_evt0[rip], al
movzx eax, BYTE PTR _x_s4_evt1[rip]
movss DWORD PTR s4_lambda[rip], xmm2
mov BYTE PTR s4_evt1[rip], al
movzx eax, BYTE PTR _x_s19_evt0[rip]
mov BYTE PTR s19_evt0[rip], al
movzx eax, BYTE PTR _x_bus_evt0[rip]
mov BYTE PTR bus_evt0[rip], al
movzx eax, BYTE PTR _x_s19_evt1[rip]
mov BYTE PTR s19_evt1[rip], al
movzx eax, BYTE PTR _x_bus_evt1[rip]
mov BYTE PTR bus_evt1[rip], al
movzx eax, BYTE PTR _x_s1_l0[rip]
mov BYTE PTR s1_l0[rip], al
movzx eax, BYTE PTR _x_s0_evt0[rip]
mov BYTE PTR s0_evt0[rip], al
movzx eax, BYTE PTR _x_s16_l0[rip]
mov BYTE PTR s16_l0[rip], al
mov eax, DWORD PTR _x_bus_cd_id[rip]
mov DWORD PTR bus_cd_id[rip], eax
movzx eax, BYTE PTR _x_s6_evt2[rip]
mov BYTE PTR s6_evt2[rip], al
movzx eax, BYTE PTR _x_s1_l1[rip]
mov BYTE PTR s1_l1[rip], al
movss DWORD PTR s4_backoff[rip], xmm1
movzx eax, BYTE PTR _x_s0_evt1[rip]
movss xmm1, DWORD PTR _x_s12_x[rip]
movss DWORD PTR s19_backoff[rip], xmm0
movss xmm0, DWORD PTR _x_delta[rip]
mov BYTE PTR s0_evt1[rip], al
movzx eax, BYTE PTR _x_s12_l0[rip]
movss DWORD PTR delta[rip], xmm0
movss xmm0, DWORD PTR _x_s7_backoff[rip]
mov BYTE PTR s12_l0[rip], al
movzx eax, BYTE PTR _x_s16_l1[rip]
movss DWORD PTR s7_backoff[rip], xmm0
movss xmm0, DWORD PTR _x_s3_lambda[rip]
mov BYTE PTR s16_l1[rip], al
mov eax, DWORD PTR _x_bus_j[rip]
movss DWORD PTR s12_x[rip], xmm1
movss xmm1, DWORD PTR _x_s15_lambda[rip]
mov DWORD PTR bus_j[rip], eax
movzx eax, BYTE PTR _x_s5_evt0[rip]
movss DWORD PTR s3_lambda[rip], xmm0
movss xmm0, DWORD PTR _x_s2_lambda[rip]
mov BYTE PTR s5_evt0[rip], al
movzx eax, BYTE PTR _x_s0_evt2[rip]
movss DWORD PTR s2_lambda[rip], xmm0
mov BYTE PTR s0_evt2[rip], al
movzx eax, BYTE PTR _x_s4_l1[rip]
movss DWORD PTR s15_lambda[rip], xmm1
mov BYTE PTR s4_l1[rip], al
movzx eax, BYTE PTR _x_s3_evt1[rip]
mov BYTE PTR s3_evt1[rip], al
movzx eax, BYTE PTR _x_s0_l0[rip]
mov BYTE PTR s0_l0[rip], al
movzx eax, BYTE PTR _x_s3_evt2[rip]
mov BYTE PTR s3_evt2[rip], al
movss xmm0, DWORD PTR _x_s3_backoff[rip]
movzx eax, BYTE PTR _x_s0_l1[rip]
movss DWORD PTR s3_backoff[rip], xmm0
movss xmm0, DWORD PTR _x_s2_backoff[rip]
mov BYTE PTR s0_l1[rip], al
movzx eax, BYTE PTR _x_s2_l0[rip]
movss DWORD PTR s2_backoff[rip], xmm0
movss xmm0, DWORD PTR _x_s1_x[rip]
mov BYTE PTR s2_l0[rip], al
movzx eax, BYTE PTR _x_s1_evt0[rip]
movss DWORD PTR s1_x[rip], xmm0
movss xmm0, DWORD PTR _x_s6_x[rip]
mov BYTE PTR s1_evt0[rip], al
movzx eax, BYTE PTR _x_s2_l1[rip]
movss DWORD PTR s6_x[rip], xmm0
movss xmm0, DWORD PTR _x_s1_backoff[rip]
mov BYTE PTR s2_l1[rip], al
movzx eax, BYTE PTR _x_s1_evt1[rip]
movss DWORD PTR s1_backoff[rip], xmm0
movss xmm0, DWORD PTR _x_s1_lambda[rip]
mov BYTE PTR s1_evt1[rip], al
movzx eax, BYTE PTR _x_s1_evt2[rip]
movss DWORD PTR s1_lambda[rip], xmm0
movss xmm0, DWORD PTR _x_s5_lambda[rip]
mov BYTE PTR s1_evt2[rip], al
movzx eax, BYTE PTR _x_s4_evt2[rip]
movss DWORD PTR s5_lambda[rip], xmm0
movss xmm0, DWORD PTR _x_s5_backoff[rip]
mov BYTE PTR s4_evt2[rip], al
movss DWORD PTR s5_backoff[rip], xmm0
movss xmm0, DWORD PTR _x_s13_x[rip]
movss DWORD PTR s13_x[rip], xmm0
mov BYTE PTR s19_l1[rip], r9b
movzx eax, BYTE PTR _x_bus_l1[rip]
movss xmm0, DWORD PTR _x_s2_x[rip]
mov BYTE PTR bus_l1[rip], al
movzx eax, BYTE PTR _x_s9_evt0[rip]
movss DWORD PTR s2_x[rip], xmm0
movss xmm0, DWORD PTR _x_s6_lambda[rip]
mov BYTE PTR s9_evt0[rip], al
movzx eax, BYTE PTR _x_s3_l0[rip]
movss DWORD PTR s6_lambda[rip], xmm0
movss xmm0, DWORD PTR _x_s7_x[rip]
mov BYTE PTR s3_l0[rip], al
movzx eax, BYTE PTR _x_s6_evt0[rip]
movss DWORD PTR s7_x[rip], xmm0
movss xmm0, DWORD PTR _x_s7_lambda[rip]
mov BYTE PTR s6_evt0[rip], al
movzx eax, BYTE PTR _x_s6_evt1[rip]
movss DWORD PTR s7_lambda[rip], xmm0
movss xmm0, DWORD PTR _x_s8_x[rip]
mov BYTE PTR s6_evt1[rip], al
movzx eax, BYTE PTR _x_s4_l0[rip]
movss DWORD PTR s8_x[rip], xmm0
movss xmm0, DWORD PTR _x_s8_backoff[rip]
mov BYTE PTR s4_l0[rip], al
movzx eax, BYTE PTR _x_s7_evt0[rip]
movss DWORD PTR s8_backoff[rip], xmm0
mov BYTE PTR s7_evt0[rip], al
movzx eax, BYTE PTR _x_s7_evt1[rip]
mov BYTE PTR s7_evt1[rip], al
movzx eax, BYTE PTR _x_s7_evt2[rip]
mov BYTE PTR s7_evt2[rip], al
movzx eax, BYTE PTR _x_s5_l1[rip]
mov BYTE PTR s5_l1[rip], al
movzx eax, BYTE PTR _x_s5_l0[rip]
movss xmm0, DWORD PTR _x_s8_lambda[rip]
mov BYTE PTR s5_l0[rip], al
movzx eax, BYTE PTR _x_s8_evt0[rip]
movss DWORD PTR s8_lambda[rip], xmm0
movss xmm0, DWORD PTR _x_s9_x[rip]
mov BYTE PTR s8_evt0[rip], al
movzx eax, BYTE PTR _x_s8_evt1[rip]
movss DWORD PTR s9_x[rip], xmm0
movss xmm0, DWORD PTR _x_s9_backoff[rip]
mov BYTE PTR s8_evt1[rip], al
movzx eax, BYTE PTR _x_s8_evt2[rip]
movss DWORD PTR s9_backoff[rip], xmm0
movss xmm0, DWORD PTR _x_s9_lambda[rip]
mov BYTE PTR s8_evt2[rip], al
movzx eax, BYTE PTR _x_s6_l1[rip]
movss DWORD PTR s9_lambda[rip], xmm0
movss xmm0, DWORD PTR _x_s12_lambda[rip]
mov BYTE PTR s6_l1[rip], al
movzx eax, BYTE PTR _x_s6_l0[rip]
movss DWORD PTR s12_lambda[rip], xmm0
movss xmm0, DWORD PTR _x_s10_x[rip]
mov BYTE PTR s6_l0[rip], al
movzx eax, BYTE PTR _x_s9_evt1[rip]
movss DWORD PTR s10_x[rip], xmm0
mov BYTE PTR s9_evt1[rip], al
movzx eax, BYTE PTR _x_s9_evt2[rip]
mov BYTE PTR s9_evt2[rip], al
movzx eax, BYTE PTR _x_s9_l0[rip]
mov BYTE PTR s9_l0[rip], al
movzx eax, BYTE PTR _x_s7_l1[rip]
mov BYTE PTR s7_l1[rip], al
movss xmm0, DWORD PTR _x_s10_backoff[rip]
movzx eax, BYTE PTR _x_s7_l0[rip]
movss DWORD PTR s10_backoff[rip], xmm0
movss xmm0, DWORD PTR _x_s10_lambda[rip]
mov BYTE PTR s7_l0[rip], al
movzx eax, BYTE PTR _x_s10_evt0[rip]
movss DWORD PTR s10_lambda[rip], xmm0
movss xmm0, DWORD PTR _x_bus_x[rip]
mov BYTE PTR s10_evt0[rip], al
movzx eax, BYTE PTR _x_s10_evt1[rip]
movss DWORD PTR bus_x[rip], xmm0
movss xmm0, DWORD PTR _x_s13_lambda[rip]
mov BYTE PTR s10_evt1[rip], al
movzx eax, BYTE PTR _x_s10_evt2[rip]
movss DWORD PTR s13_lambda[rip], xmm0
movss xmm0, DWORD PTR _x_s11_x[rip]
mov BYTE PTR s10_evt2[rip], al
movzx eax, BYTE PTR _x_s10_l0[rip]
movss DWORD PTR s11_x[rip], xmm0
movss xmm0, DWORD PTR _x_s11_backoff[rip]
mov BYTE PTR s10_l0[rip], al
movzx eax, BYTE PTR _x_s8_l1[rip]
movss DWORD PTR s11_backoff[rip], xmm0
movss xmm0, DWORD PTR _x_s11_lambda[rip]
mov BYTE PTR s8_l1[rip], al
movzx eax, BYTE PTR _x_s8_l0[rip]
movss DWORD PTR s11_lambda[rip], xmm0
mov BYTE PTR s8_l0[rip], al
movzx eax, BYTE PTR _x_s11_evt0[rip]
mov BYTE PTR s11_evt0[rip], al
movzx eax, BYTE PTR _x_s11_evt1[rip]
mov BYTE PTR s11_evt1[rip], al
movzx eax, BYTE PTR _x_s11_evt2[rip]
movss xmm0, DWORD PTR _x_s14_lambda[rip]
mov BYTE PTR s11_evt2[rip], al
movzx eax, BYTE PTR _x_s11_l0[rip]
movss DWORD PTR s14_lambda[rip], xmm0
movss xmm0, DWORD PTR _x_s12_backoff[rip]
mov BYTE PTR s11_l0[rip], al
movzx eax, BYTE PTR _x_s9_l1[rip]
movss DWORD PTR s12_backoff[rip], xmm0
movss xmm0, DWORD PTR _x_s13_backoff[rip]
mov BYTE PTR s9_l1[rip], al
movzx eax, BYTE PTR _x_s12_evt0[rip]
movss DWORD PTR s13_backoff[rip], xmm0
movss xmm0, DWORD PTR _x_s16_lambda[rip]
mov BYTE PTR s12_evt0[rip], al
movzx eax, BYTE PTR _x_s12_evt1[rip]
movss DWORD PTR s16_lambda[rip], xmm0
mov BYTE PTR s12_evt1[rip], al
movzx eax, BYTE PTR _x_s12_evt2[rip]
mov BYTE PTR s12_evt2[rip], al
movzx eax, BYTE PTR _x_s10_l1[rip]
mov BYTE PTR s10_l1[rip], al
movzx eax, BYTE PTR _x_s13_evt0[rip]
mov BYTE PTR s13_evt0[rip], al
movzx eax, BYTE PTR _x_s13_evt1[rip]
mov BYTE PTR s13_evt1[rip], al
movzx eax, BYTE PTR _x_s13_evt2[rip]
mov BYTE PTR s13_evt2[rip], al
movzx eax, BYTE PTR _x_s13_l0[rip]
mov BYTE PTR s13_l0[rip], al
movzx eax, BYTE PTR _x_s11_l1[rip]
mov BYTE PTR s11_l1[rip], al
movss xmm0, DWORD PTR _x_s14_backoff[rip]
movzx eax, BYTE PTR _x_s14_evt0[rip]
mov BYTE PTR s14_evt1[rip], dl
movss DWORD PTR s14_backoff[rip], xmm0
mov BYTE PTR s14_evt0[rip], al
test r10d, r10d
je .L4593
.L1720:
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s19_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s18_l1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s18_l0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s18_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s18_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s18_evt0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s18_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s17_l1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s17_l0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s17_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s17_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s17_evt0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s17_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s16_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s16_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s16_evt0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s16_x[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s18_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s15_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s18_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s15_l0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s15_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s15_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s15_evt0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s15_x[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s17_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s14_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s17_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s14_l0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s4_evt0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s16_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s13_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s4_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s19_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_bus_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s3_evt0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s15_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s12_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s3_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s5_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s5_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s2_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s3_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s6_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s2_evt1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s14_x[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s0_lambda[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x__diverge_delta[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s19_l0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_bus_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s5_x[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s0_backoff[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s0_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s14_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s2_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s4_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s19_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_bus_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s19_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_bus_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s1_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s4_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s0_evt0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s19_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s16_l0[rip]
call __VERIFIER_nondet_int@PLT
mov DWORD PTR _x_bus_cd_id[rip], eax
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s6_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s1_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s4_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s0_evt1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s12_x[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s15_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s12_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s19_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s16_l1[rip]
call __VERIFIER_nondet_int@PLT
mov DWORD PTR _x_bus_j[rip], eax
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s5_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s0_evt2[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_delta[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s4_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s7_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s3_evt1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s3_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s0_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s2_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s3_evt2[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s3_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s0_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s2_backoff[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s1_x[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s6_x[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s1_backoff[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s1_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s2_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s5_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s1_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s2_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s5_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s1_evt1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s13_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s1_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s4_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s19_l1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_bus_l1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s9_evt0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s2_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s3_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s6_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s6_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s6_evt1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s7_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s4_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s7_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s7_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s7_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s7_evt2[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s8_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s5_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s8_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s5_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s8_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s8_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s8_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s8_evt2[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s9_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s6_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s9_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s6_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s9_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s9_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s9_evt2[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s12_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s9_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s10_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s7_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s10_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s7_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s10_lambda[rip], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_bus_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s10_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s10_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s10_evt2[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s13_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s10_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s11_x[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s8_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s11_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s8_l0[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s11_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s11_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s11_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s11_evt2[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s14_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s11_l0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s9_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s12_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s12_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s12_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s12_evt2[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s10_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s13_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s13_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s13_evt1[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s13_evt2[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s16_lambda[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s13_l0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s11_l1[rip]
call __VERIFIER_nondet_float@PLT
movss DWORD PTR _x_s14_backoff[rip], xmm0
call __VERIFIER_nondet_int@PLT
test eax, eax
setne BYTE PTR _x_s14_evt0[rip]
call __VERIFIER_nondet_int@PLT
test eax, eax
mov r12d, eax
movzx eax, BYTE PTR _x_s19_evt2[rip]
setne dl
mov BYTE PTR _x_s14_evt1[rip], dl
test al, al
je .L6587
cmp BYTE PTR _x_s19_evt0[rip], 0
je .L94
movzx ecx, BYTE PTR _x_s19_l0[rip]
movss xmm0, DWORD PTR _x_s19_backoff[rip]
xor r10d, r10d
movss xmm1, DWORD PTR _x_s19_lambda[rip]
movss xmm2, DWORD PTR _x_s19_x[rip]
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
movzx esi, BYTE PTR _x_s17_l1[rip]
movzx r9d, BYTE PTR _x_s19_l1[rip]
jmp .L95
.L8:
cmp BYTE PTR s19_evt0[rip], 0
je .L9
.L4593:
add rsp, 88
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L94:
.cfi_restore_state
movzx ecx, BYTE PTR _x_s19_l0[rip]
test cl, cl
je .L1961
cmp BYTE PTR _x_s19_l1[rip], 0
jne .L6588
.L1961:
movss xmm0, DWORD PTR _x_s19_backoff[rip]
comiss xmm0, DWORD PTR .LC1[rip]
jb .L6132
movss xmm1, DWORD PTR _x_s19_lambda[rip]
pxor xmm7, xmm7
comiss xmm7, xmm1
jnb .L3193
movss xmm2, DWORD PTR _x_s19_x[rip]
comiss xmm1, xmm2
jnb .L98
cmp BYTE PTR _x_s19_l1[rip], 0
je .L98
test cl, cl
je .L3194
.L98:
movzx esi, BYTE PTR s19_l0[rip]
test sil, sil
sete r10b
test cl, cl
setne r8b
cmp r10b, r8b
je .L100
cmp BYTE PTR s19_l1[rip], 0
sete r9b
cmp BYTE PTR _x_s19_l1[rip], 0
setne dil
cmp r9b, dil
je .L100
ucomiss xmm1, DWORD PTR s19_lambda[rip]
jp .L100
jne .L100
pxor xmm3, xmm3
pxor xmm4, xmm4
cvtss2sd xmm4, xmm2
cvtss2sd xmm3, DWORD PTR s19_x[rip]
subsd xmm3, xmm4
pxor xmm4, xmm4
cvtss2sd xmm4, DWORD PTR delta[rip]
addsd xmm3, xmm4
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L100
jne .L100
ucomiss xmm0, DWORD PTR s19_backoff[rip]
jp .L100
movzx edi, BYTE PTR s19_evt2[rip]
jne .L100
.L103:
test cl, cl
je .L106
cmp BYTE PTR _x_s19_l1[rip], 0
je .L106
.L107:
mov ebx, esi
or bl, BYTE PTR s19_l1[rip]
jne .L108
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L108
comiss xmm6, DWORD PTR delta[rip]
jne .L108
or dil, BYTE PTR s19_evt0[rip]
or dil, BYTE PTR s19_evt1[rip]
je .L110
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
xor r10d, r10d
movzx esi, BYTE PTR _x_s17_l1[rip]
movzx r9d, BYTE PTR _x_s19_l1[rip]
jmp .L95
.p2align 4,,10
.p2align 3
.L6132:
movss xmm1, DWORD PTR _x_s19_lambda[rip]
movss xmm2, DWORD PTR _x_s19_x[rip]
xor r10d, r10d
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
movzx esi, BYTE PTR _x_s17_l1[rip]
movzx r9d, BYTE PTR _x_s19_l1[rip]
jmp .L95
.p2align 4,,10
.p2align 3
.L6588:
movss xmm0, DWORD PTR _x_s19_backoff[rip]
movss xmm1, DWORD PTR _x_s19_lambda[rip]
xor r10d, r10d
movss xmm2, DWORD PTR _x_s19_x[rip]
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
movzx esi, BYTE PTR _x_s17_l1[rip]
movzx r9d, BYTE PTR _x_s19_l1[rip]
jmp .L95
.L100:
pxor xmm6, xmm6
comiss xmm6, DWORD PTR delta[rip]
jnb .L6589
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
xor r10d, r10d
movzx esi, BYTE PTR _x_s17_l1[rip]
movzx r9d, BYTE PTR _x_s19_l1[rip]
jmp .L95
.L3193:
movss xmm2, DWORD PTR _x_s19_x[rip]
movzx edi, BYTE PTR _x_s18_l0[rip]
xor r10d, r10d
movzx r8d, BYTE PTR _x_s18_l1[rip]
movzx esi, BYTE PTR _x_s17_l1[rip]
movzx r9d, BYTE PTR _x_s19_l1[rip]
jmp .L95
.L6589:
movzx edi, BYTE PTR s19_evt2[rip]
movzx r9d, BYTE PTR s19_evt0[rip]
or r9d, edi
or r9b, BYTE PTR s19_evt1[rip]
jne .L103
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
xor r10d, r10d
movzx esi, BYTE PTR _x_s17_l1[rip]
movzx r9d, BYTE PTR _x_s19_l1[rip]
jmp .L95
.L106:
ucomiss xmm0, DWORD PTR s19_backoff[rip]
mov r11d, 0
setnp r9b
cmovne r9d, r11d
test r9b, r9b
je .L107
pxor xmm5, xmm5
ucomiss xmm2, xmm5
setnp r9b
cmove r11d, r9d
test r11b, r11b
je .L107
.L108:
test dil, dil
jne .L111
cmp BYTE PTR s19_evt0[rip], 0
je .L110
cmp BYTE PTR s19_evt1[rip], 0
jne .L110
movss xmm3, DWORD PTR s19_lambda[rip]
ucomiss xmm1, xmm3
jp .L110
jne .L110
xor r9d, r9d
cmp BYTE PTR _x_s19_l1[rip], 0
je .L2415
test cl, cl
je .L6562
movzx r9d, BYTE PTR _x_s19_l1[rip]
.L2415:
movzx edi, BYTE PTR s19_evt0[rip]
test dil, dil
je .L125
movzx edi, BYTE PTR s19_evt1[rip]
test dil, dil
je .L126
xor edi, edi
.L125:
test cl, cl
je .L126
.L2414:
mov ebx, esi
or bl, BYTE PTR _x_s19_l1[rip]
je .L6590
.L126:
pxor xmm5, xmm5
mov r11d, 0
ucomiss xmm2, xmm5
setnp bl
cmovne ebx, r11d
ucomiss xmm1, xmm3
setnp bpl
cmove r11d, ebp
mov ebp, r11d
and bpl, bl
jne .L6591
.L128:
cmp BYTE PTR s19_l1[rip], 0
je .L129
test sil, sil
je .L6592
.L129:
movss xmm4, DWORD PTR s19_x[rip]
comiss xmm4, xmm3
jnb .L6593
.L131:
test cl, cl
jne .L135
.L3186:
mov r14d, esi
or r14b, BYTE PTR _x_s19_l1[rip]
jne .L136
cmp BYTE PTR s19_l1[rip], 0
jne .L6594
.L136:
mov r14d, edi
test dil, dil
jne .L138
movzx r14d, BYTE PTR s19_evt0[rip]
test r14b, r14b
je .L138
.L3659:
xor r14d, r14d
cmp BYTE PTR s19_evt1[rip], 0
jne .L133
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm0
cvtss2sd xmm3, DWORD PTR s19_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L138
.L133:
test cl, cl
jne .L2409
.L138:
test r11b, r11b
je .L144
.L2944:
cmp BYTE PTR _x_s19_l1[rip], 0
jne .L2406
.L145:
test cl, cl
jne .L1951
.L144:
test sil, sil
je .L146
cmp BYTE PTR s19_l1[rip], 0
jne .L146
.L2942:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L146
comiss xmm7, DWORD PTR delta[rip]
jne .L146
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
je .L149
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
xor r10d, r10d
movzx esi, BYTE PTR _x_s17_l1[rip]
jmp .L95
.L139:
test r11b, r11b
je .L144
.L2406:
test cl, cl
jne .L144
.L1951:
ucomiss xmm0, DWORD PTR s19_backoff[rip]
mov r11d, 0
setnp dil
cmovne edi, r11d
test dil, dil
je .L144
test bl, bl
je .L144
.L146:
test r14b, r14b
jne .L150
.L2943:
cmp BYTE PTR s19_evt0[rip], 0
je .L149
movzx r14d, BYTE PTR s19_evt1[rip]
test r14b, r14b
je .L151
.L149:
test cl, cl
jne .L6595
xor r14d, r14d
.L151:
cmp BYTE PTR _x_s19_l1[rip], 0
sete sil
or sil, r8b
jne .L154
test r10b, r10b
je .L6596
.L154:
cmp BYTE PTR _x_s18_evt2[rip], 0
jne .L155
cmp BYTE PTR _x_s18_evt0[rip], 0
je .L156
cmp BYTE PTR _x_s18_evt1[rip], 0
je .L156
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
xor r10d, r10d
movzx esi, BYTE PTR _x_s17_l1[rip]
jmp .L95
.L111:
test cl, cl
jne .L2418
mov ebx, esi
or bl, BYTE PTR _x_s19_l1[rip]
je .L6597
.L2418:
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
jne .L6598
.L116:
movss xmm3, DWORD PTR s19_lambda[rip]
movzx r9d, BYTE PTR _x_s19_l1[rip]
ucomiss xmm1, xmm3
jp .L121
je .L125
.L121:
test cl, cl
jne .L2414
.L2413:
pxor xmm7, xmm7
ucomiss xmm2, xmm7
setnp bl
cmovne ebx, ecx
ucomiss xmm1, xmm3
setnp r11b
cmovne r11d, ecx
jmp .L128
.L110:
test cl, cl
je .L6599
movzx r9d, BYTE PTR _x_s19_l1[rip]
mov edi, r9d
test r9b, r9b
je .L6600
movss xmm3, DWORD PTR s19_lambda[rip]
ucomiss xmm1, xmm3
jnp .L6601
.L3898:
xor edi, edi
.L1955:
mov r11d, esi
or r11b, BYTE PTR _x_s19_l1[rip]
je .L6602
pxor xmm6, xmm6
mov r11d, 0
ucomiss xmm2, xmm6
setnp bl
cmovne ebx, r11d
jmp .L128
.L6601:
je .L2415
jmp .L3898
.L3194:
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
xor r10d, r10d
movzx esi, BYTE PTR _x_s17_l1[rip]
movzx r9d, BYTE PTR _x_s19_l1[rip]
jmp .L95
.L135:
mov r14d, edi
test dil, dil
jne .L2409
.L2408:
movzx r14d, BYTE PTR s19_evt0[rip]
test r14b, r14b
jne .L3659
.L2409:
cmp BYTE PTR _x_s19_l1[rip], 0
jne .L139
cmp BYTE PTR s19_l1[rip], 0
je .L140
test sil, sil
jne .L141
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L142
comiss xmm6, DWORD PTR delta[rip]
jne .L142
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r14b, r13b
je .L143
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
xor r10d, r10d
movzx esi, BYTE PTR _x_s17_l1[rip]
jmp .L95
.L150:
test cl, cl
je .L2404
test sil, sil
jne .L6603
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
jne .L154
.L3184:
comiss xmm4, DWORD PTR s19_backoff[rip]
jnb .L154
jmp .L151
.L156:
movzx edi, BYTE PTR _x_s18_l0[rip]
test dil, dil
je .L1950
cmp BYTE PTR _x_s18_l1[rip], 0
jne .L6604
.L1950:
movss xmm5, DWORD PTR _x_s18_backoff[rip]
comiss xmm5, DWORD PTR .LC1[rip]
jb .L6136
movss xmm4, DWORD PTR _x_s18_lambda[rip]
pxor xmm6, xmm6
comiss xmm6, xmm4
jnb .L3202
movss xmm6, DWORD PTR _x_s18_x[rip]
comiss xmm4, xmm6
jnb .L159
cmp BYTE PTR _x_s18_l1[rip], 0
je .L159
test dil, dil
je .L3203
.L159:
movzx ebp, BYTE PTR s18_l0[rip]
test bpl, bpl
sete r13b
test dil, dil
setne r15b
cmp r13b, r15b
je .L161
cmp BYTE PTR s18_l1[rip], 0
sete r8b
cmp BYTE PTR _x_s18_l1[rip], 0
setne sil
cmp r8b, sil
je .L161
ucomiss xmm4, DWORD PTR s18_lambda[rip]
jp .L161
jne .L161
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm6
cvtss2sd xmm3, DWORD PTR s18_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L161
jne .L161
ucomiss xmm5, DWORD PTR s18_backoff[rip]
jp .L161
movzx esi, BYTE PTR s18_evt2[rip]
jne .L161
.L164:
test dil, dil
je .L167
cmp BYTE PTR _x_s18_l1[rip], 0
je .L167
.L168:
mov ebx, ebp
or bl, BYTE PTR s18_l1[rip]
jne .L169
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L169
comiss xmm7, DWORD PTR delta[rip]
jne .L169
or sil, BYTE PTR s18_evt0[rip]
or sil, BYTE PTR s18_evt1[rip]
je .L171
movzx r8d, BYTE PTR _x_s18_l1[rip]
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L155:
cmp BYTE PTR _x_s18_evt0[rip], 0
je .L156
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
xor r10d, r10d
movzx esi, BYTE PTR _x_s17_l1[rip]
jmp .L95
.L6598:
xor r9d, r9d
cmp BYTE PTR _x_s19_l1[rip], 0
je .L117
test cl, cl
jne .L118
.L6562:
movzx r9d, BYTE PTR _x_s19_l1[rip]
.L2949:
mov ebx, esi
or bl, BYTE PTR s19_l1[rip]
jne .L119
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L119
comiss xmm6, DWORD PTR delta[rip]
jne .L119
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or dil, r13b
jne .L6605
movss xmm3, DWORD PTR s19_lambda[rip]
ucomiss xmm1, xmm3
jp .L1960
je .L126
.L1960:
pxor xmm6, xmm6
mov r11d, 0
ucomiss xmm2, xmm6
setnp bl
cmovne ebx, r11d
ucomiss xmm1, xmm3
setnp bpl
cmove r11d, ebp
jmp .L128
.L117:
movss xmm3, DWORD PTR s19_lambda[rip]
ucomiss xmm1, xmm3
jp .L121
jne .L121
.L1953:
test dil, dil
je .L2415
.L123:
cmp BYTE PTR s19_evt1[rip], 0
je .L125
cmp BYTE PTR s19_evt0[rip], 0
je .L126
jmp .L125
.L6599:
mov ebx, esi
or bl, BYTE PTR _x_s19_l1[rip]
je .L6606
movzx r9d, BYTE PTR _x_s19_l1[rip]
mov edi, r9d
test r9b, r9b
je .L117
xor edi, edi
jmp .L2949
.L153:
test r14b, r14b
je .L154
.L2404:
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
jne .L151
jmp .L3184
.L6591:
cmp BYTE PTR _x_s19_l1[rip], 0
mov ebx, ebp
mov r11d, ebp
jne .L128
jmp .L129
.L6592:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L129
comiss xmm5, DWORD PTR delta[rip]
jne .L129
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, dil
jne .L6607
movss xmm4, DWORD PTR s19_x[rip]
.L134:
xor edi, edi
test cl, cl
je .L3186
jmp .L2408
.L6593:
cmp BYTE PTR s19_evt1[rip], 0
je .L131
mov r14d, edi
or r14b, BYTE PTR s19_evt0[rip]
jne .L131
movss xmm3, DWORD PTR s19_backoff[rip]
comiss xmm3, xmm0
jnb .L133
jmp .L134
.L119:
movss xmm3, DWORD PTR s19_lambda[rip]
ucomiss xmm1, xmm3
jp .L1958
je .L1953
.L1958:
pxor xmm5, xmm5
mov r11d, 0
ucomiss xmm2, xmm5
setnp bl
cmovne ebx, r11d
jmp .L128
.L6595:
xor r14d, r14d
test sil, sil
je .L154
mov r14d, r9d
or r14b, BYTE PTR s19_l1[rip]
je .L3185
xor r14d, r14d
jmp .L154
.L6600:
movss xmm3, DWORD PTR s19_lambda[rip]
ucomiss xmm1, xmm3
jp .L121
je .L2415
jmp .L121
.L6136:
movzx r8d, BYTE PTR _x_s18_l1[rip]
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L140:
test r11b, r11b
jne .L145
test sil, sil
je .L146
jmp .L2942
.L6596:
cmp BYTE PTR s19_l1[rip], 0
jne .L154
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L154
comiss xmm7, DWORD PTR delta[rip]
jne .L154
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r14b, r13b
je .L154
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
xor r10d, r10d
movzx esi, BYTE PTR _x_s17_l1[rip]
jmp .L95
.L118:
movss xmm3, DWORD PTR s19_lambda[rip]
movzx r9d, BYTE PTR _x_s19_l1[rip]
ucomiss xmm1, xmm3
jp .L1955
je .L1953
jmp .L1955
.L6590:
cmp BYTE PTR s19_l1[rip], 0
jne .L127
.L2947:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L127
comiss xmm5, DWORD PTR delta[rip]
jne .L127
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or dil, r13b
je .L127
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
xor r10d, r10d
movzx esi, BYTE PTR _x_s17_l1[rip]
jmp .L95
.L127:
pxor xmm6, xmm6
mov r11d, 0
ucomiss xmm2, xmm6
setnp bl
cmovne ebx, r11d
ucomiss xmm1, xmm3
setnp bpl
cmove r11d, ebp
mov ebp, r11d
and bpl, bl
je .L128
mov ebx, ebp
mov r11d, ebp
jmp .L129
.L6604:
movzx r8d, BYTE PTR _x_s18_l1[rip]
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L6597:
cmp BYTE PTR s19_l1[rip], 0
je .L3190
.L2417:
movzx r9d, BYTE PTR s19_evt1[rip]
or r9b, BYTE PTR s19_evt0[rip]
je .L116
movss xmm3, DWORD PTR s19_lambda[rip]
movzx r9d, BYTE PTR _x_s19_l1[rip]
ucomiss xmm1, xmm3
jp .L2413
je .L123
jmp .L2413
.L6606:
movzx edi, BYTE PTR s19_l1[rip]
test dil, dil
je .L3190
.L115:
movss xmm3, DWORD PTR s19_lambda[rip]
ucomiss xmm1, xmm3
jnp .L6608
.L3878:
movzx r9d, BYTE PTR _x_s19_l1[rip]
xor edi, edi
jmp .L2413
.L3190:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L114
comiss xmm7, DWORD PTR delta[rip]
jne .L114
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, dil
je .L115
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
xor r10d, r10d
movzx esi, BYTE PTR _x_s17_l1[rip]
movzx r9d, BYTE PTR _x_s19_l1[rip]
jmp .L95
.L6594:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L136
comiss xmm7, DWORD PTR delta[rip]
jne .L136
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
mov r14d, r13d
or r14b, dil
je .L137
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
xor r10d, r10d
movzx esi, BYTE PTR _x_s17_l1[rip]
jmp .L95
.L141:
test r11b, r11b
jne .L145
jmp .L146
.L161:
pxor xmm7, xmm7
comiss xmm7, DWORD PTR delta[rip]
jnb .L6609
movzx r8d, BYTE PTR _x_s18_l1[rip]
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L6603:
mov ebx, r9d
or bl, BYTE PTR s19_l1[rip]
jne .L2404
.L3185:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L153
comiss xmm5, DWORD PTR delta[rip]
jne .L153
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r14b, r13b
je .L154
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
xor r10d, r10d
movzx esi, BYTE PTR _x_s17_l1[rip]
jmp .L95
.L3202:
movzx r8d, BYTE PTR _x_s18_l1[rip]
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L114:
test dil, dil
jne .L2417
jmp .L115
.L6602:
cmp BYTE PTR s19_l1[rip], 0
je .L2947
pxor xmm6, xmm6
ucomiss xmm2, xmm6
setnp bl
cmovne ebx, r11d
ucomiss xmm1, xmm3
setnp bpl
cmove r11d, ebp
jmp .L128
.L6607:
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
xor r10d, r10d
movzx esi, BYTE PTR _x_s17_l1[rip]
jmp .L95
.L6608:
movzx r9d, BYTE PTR _x_s19_l1[rip]
je .L2415
jmp .L3878
.L6609:
movzx esi, BYTE PTR s18_evt2[rip]
movzx r8d, BYTE PTR s18_evt0[rip]
or r8d, esi
or r8b, BYTE PTR s18_evt1[rip]
jne .L164
movzx r8d, BYTE PTR _x_s18_l1[rip]
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L142:
test r11b, r11b
je .L146
.L1952:
test cl, cl
je .L146
jmp .L1951
.L167:
ucomiss xmm5, DWORD PTR s18_backoff[rip]
mov r10d, 0
setnp r8b
cmovne r8d, r10d
test r8b, r8b
je .L168
pxor xmm7, xmm7
ucomiss xmm6, xmm7
setnp r8b
cmovne r8d, r10d
test r8b, r8b
je .L168
.L169:
test sil, sil
jne .L172
cmp BYTE PTR s18_evt0[rip], 0
je .L171
cmp BYTE PTR s18_evt1[rip], 0
jne .L171
movss xmm3, DWORD PTR s18_lambda[rip]
ucomiss xmm4, xmm3
jp .L171
jne .L171
xor r8d, r8d
cmp BYTE PTR _x_s18_l1[rip], 0
je .L2396
test dil, dil
je .L6563
movzx r8d, BYTE PTR _x_s18_l1[rip]
.L2396:
movzx esi, BYTE PTR s18_evt0[rip]
test sil, sil
je .L186
movzx esi, BYTE PTR s18_evt1[rip]
test sil, sil
je .L187
xor esi, esi
.L186:
test dil, dil
je .L187
.L2395:
mov ebx, ebp
or bl, BYTE PTR _x_s18_l1[rip]
je .L6610
.L187:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm6, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
setnp bl
cmovne ebx, r10d
mov r10d, ebx
and r10b, r11b
jne .L6611
.L189:
cmp BYTE PTR s18_l1[rip], 0
je .L190
test bpl, bpl
je .L6612
.L190:
movss xmm4, DWORD PTR s18_x[rip]
comiss xmm4, xmm3
jnb .L6613
.L192:
test dil, dil
jne .L196
.L3179:
mov r10d, ebp
or r10b, BYTE PTR _x_s18_l1[rip]
jne .L197
cmp BYTE PTR s18_l1[rip], 0
jne .L6614
.L197:
test sil, sil
je .L2391
mov BYTE PTR 8[rsp], sil
.L199:
test bl, bl
je .L205
.L2925:
cmp BYTE PTR _x_s18_l1[rip], 0
jne .L2387
.L206:
test dil, dil
jne .L1940
.L205:
test bpl, bpl
je .L207
cmp BYTE PTR s18_l1[rip], 0
jne .L207
.L2923:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L207
comiss xmm5, DWORD PTR delta[rip]
jne .L207
movzx ebx, BYTE PTR 8[rsp]
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or bl, r10b
je .L210
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L200:
test bl, bl
je .L205
.L2387:
test dil, dil
jne .L205
.L1940:
ucomiss xmm5, DWORD PTR s18_backoff[rip]
mov r10d, 0
setnp sil
cmovne esi, r10d
test sil, sil
je .L205
test r11b, r11b
je .L205
.L207:
cmp BYTE PTR 8[rsp], 0
jne .L211
.L2924:
cmp BYTE PTR s18_evt0[rip], 0
je .L210
movzx ebx, BYTE PTR s18_evt1[rip]
mov BYTE PTR 8[rsp], bl
test bl, bl
je .L212
.L210:
test dil, dil
jne .L6615
mov BYTE PTR 8[rsp], 0
.L212:
cmp BYTE PTR _x_s18_l1[rip], 0
sete sil
or sil, r15b
jne .L215
test r13b, r13b
je .L6616
.L215:
cmp BYTE PTR _x_s17_evt2[rip], 0
jne .L216
cmp BYTE PTR _x_s17_evt0[rip], 0
je .L217
cmp BYTE PTR _x_s17_evt1[rip], 0
je .L217
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L196:
test sil, sil
je .L2389
mov BYTE PTR 8[rsp], sil
.L2390:
cmp BYTE PTR _x_s18_l1[rip], 0
jne .L200
cmp BYTE PTR s18_l1[rip], 0
je .L201
test bpl, bpl
jne .L202
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L203
comiss xmm6, DWORD PTR delta[rip]
jne .L203
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or BYTE PTR 8[rsp], r10b
je .L204
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L211:
test dil, dil
je .L2385
test bpl, bpl
jne .L6617
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
jne .L215
.L3177:
comiss xmm4, DWORD PTR s18_backoff[rip]
jnb .L215
jmp .L212
.L217:
movzx ebp, BYTE PTR _x_s17_l0[rip]
test bpl, bpl
je .L1939
cmp BYTE PTR _x_s17_l1[rip], 0
jne .L6618
.L1939:
movss xmm6, DWORD PTR _x_s17_backoff[rip]
comiss xmm6, DWORD PTR .LC1[rip]
jb .L6140
movss xmm4, DWORD PTR _x_s17_lambda[rip]
pxor xmm5, xmm5
comiss xmm5, xmm4
jnb .L3211
movss xmm5, DWORD PTR _x_s17_x[rip]
comiss xmm4, xmm5
jnb .L220
cmp BYTE PTR _x_s17_l1[rip], 0
je .L220
test bpl, bpl
je .L3212
.L220:
movzx r13d, BYTE PTR s17_l0[rip]
test r13b, r13b
sete BYTE PTR 7[rsp]
test bpl, bpl
movzx ebx, BYTE PTR 7[rsp]
setne BYTE PTR 10[rsp]
movzx esi, BYTE PTR 10[rsp]
cmp bl, sil
je .L222
cmp BYTE PTR s17_l1[rip], 0
sete r10b
cmp BYTE PTR _x_s17_l1[rip], 0
setne sil
cmp r10b, sil
je .L222
ucomiss xmm4, DWORD PTR s17_lambda[rip]
jp .L222
jne .L222
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s17_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L222
jne .L222
ucomiss xmm6, DWORD PTR s17_backoff[rip]
jp .L222
movzx r10d, BYTE PTR s17_evt2[rip]
jne .L222
.L225:
test bpl, bpl
je .L228
cmp BYTE PTR _x_s17_l1[rip], 0
je .L228
.L229:
mov ebx, r13d
or bl, BYTE PTR s17_l1[rip]
jne .L230
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L230
comiss xmm7, DWORD PTR delta[rip]
jne .L230
or r10b, BYTE PTR s17_evt0[rip]
or r10b, BYTE PTR s17_evt1[rip]
je .L232
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L6605:
movzx edi, BYTE PTR _x_s18_l0[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
xor r10d, r10d
movzx esi, BYTE PTR _x_s17_l1[rip]
jmp .L95
.L171:
test dil, dil
je .L6619
movzx r8d, BYTE PTR _x_s18_l1[rip]
mov esi, r8d
test r8b, r8b
je .L6620
movss xmm3, DWORD PTR s18_lambda[rip]
ucomiss xmm4, xmm3
jnp .L6621
xor esi, esi
jmp .L1944
.L137:
test r11b, r11b
jne .L2944
jmp .L2943
.L3203:
movzx r8d, BYTE PTR _x_s18_l1[rip]
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L172:
test dil, dil
jne .L2399
mov ebx, ebp
or bl, BYTE PTR _x_s18_l1[rip]
je .L6622
.L2399:
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
jne .L6623
.L177:
movss xmm3, DWORD PTR s18_lambda[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
ucomiss xmm4, xmm3
jp .L182
je .L186
.L182:
test dil, dil
jne .L2395
.L2394:
pxor xmm7, xmm7
ucomiss xmm6, xmm7
setnp r11b
cmovne r11d, edi
ucomiss xmm4, xmm3
setnp bl
cmovne ebx, edi
jmp .L189
.L6623:
xor r8d, r8d
cmp BYTE PTR _x_s18_l1[rip], 0
je .L178
test dil, dil
jne .L179
.L6563:
movzx r8d, BYTE PTR _x_s18_l1[rip]
.L2930:
mov ebx, ebp
or bl, BYTE PTR s18_l1[rip]
jne .L180
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L180
comiss xmm7, DWORD PTR delta[rip]
jne .L180
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or sil, r10b
jne .L6624
movss xmm3, DWORD PTR s18_lambda[rip]
ucomiss xmm4, xmm3
jp .L1947
je .L187
.L1947:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm6, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
setnp bl
cmovne ebx, r10d
jmp .L189
.L180:
movss xmm3, DWORD PTR s18_lambda[rip]
ucomiss xmm4, xmm3
jp .L2392
jne .L2392
.L1942:
test sil, sil
je .L2396
.L184:
cmp BYTE PTR s18_evt1[rip], 0
je .L186
cmp BYTE PTR s18_evt0[rip], 0
je .L187
jmp .L186
.L143:
test r11b, r11b
je .L2943
jmp .L1952
.L2392:
pxor xmm4, xmm4
mov r10d, 0
ucomiss xmm6, xmm4
setnp r11b
cmovne r11d, r10d
xor ebx, ebx
jmp .L189
.L6613:
cmp BYTE PTR s18_evt1[rip], 0
je .L192
mov r10d, esi
or r10b, BYTE PTR s18_evt0[rip]
mov BYTE PTR 8[rsp], r10b
jne .L192
movss xmm3, DWORD PTR s18_backoff[rip]
comiss xmm3, xmm5
jnb .L194
.L195:
xor esi, esi
test dil, dil
je .L3179
.L2389:
movzx esi, BYTE PTR s18_evt0[rip]
mov BYTE PTR 8[rsp], sil
test sil, sil
je .L2390
.L3656:
cmp BYTE PTR s18_evt1[rip], 0
mov BYTE PTR 8[rsp], 0
jne .L194
pxor xmm3, xmm3
pxor xmm6, xmm6
cvtss2sd xmm6, xmm5
cvtss2sd xmm3, DWORD PTR s18_backoff[rip]
subsd xmm3, xmm6
movsd xmm6, QWORD PTR .LC3[rip]
comisd xmm6, xmm3
jnb .L199
.L194:
test dil, dil
je .L199
jmp .L2390
.L2391:
movzx esi, BYTE PTR s18_evt0[rip]
mov BYTE PTR 8[rsp], sil
test sil, sil
jne .L3656
jmp .L199
.L6615:
mov BYTE PTR 8[rsp], 0
test bpl, bpl
je .L215
mov ebx, r8d
or bl, BYTE PTR s18_l1[rip]
mov BYTE PTR 8[rsp], bl
je .L3178
mov BYTE PTR 8[rsp], 0
jmp .L215
.L216:
cmp BYTE PTR _x_s17_evt0[rip], 0
je .L217
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L6617:
mov ebx, r8d
or bl, BYTE PTR s18_l1[rip]
je .L3178
.L2385:
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
jne .L212
jmp .L3177
.L12:
cmp BYTE PTR s18_evt0[rip], 0
jne .L4593
jmp .L13
.L6619:
mov ebx, ebp
or bl, BYTE PTR _x_s18_l1[rip]
je .L6625
movzx r8d, BYTE PTR _x_s18_l1[rip]
mov esi, r8d
test r8b, r8b
je .L178
xor esi, esi
jmp .L2930
.L6611:
cmp BYTE PTR _x_s18_l1[rip], 0
mov r11d, r10d
mov ebx, r10d
jne .L189
jmp .L190
.L178:
movss xmm3, DWORD PTR s18_lambda[rip]
ucomiss xmm4, xmm3
jp .L182
je .L1942
jmp .L182
.L6612:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L190
comiss xmm6, DWORD PTR delta[rip]
jne .L190
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, sil
jne .L6626
movss xmm4, DWORD PTR s18_x[rip]
jmp .L195
.L36:
cmp BYTE PTR s12_evt0[rip], 0
jne .L4593
jmp .L37
.L28:
cmp BYTE PTR s14_evt0[rip], 0
jne .L4593
jmp .L29
.L24:
cmp BYTE PTR s15_evt0[rip], 0
jne .L4593
jmp .L25
.L32:
cmp BYTE PTR s13_evt0[rip], 0
jne .L4593
jmp .L33
.L6626:
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L68:
cmp BYTE PTR s4_evt0[rip], 0
jne .L4593
jmp .L69
.L64:
cmp BYTE PTR s5_evt0[rip], 0
jne .L4593
jmp .L65
.L60:
cmp BYTE PTR s6_evt0[rip], 0
jne .L4593
jmp .L61
.L56:
cmp BYTE PTR s7_evt0[rip], 0
jne .L4593
jmp .L57
.L52:
cmp BYTE PTR s8_evt0[rip], 0
jne .L4593
jmp .L53
.L48:
cmp BYTE PTR s9_evt0[rip], 0
jne .L4593
jmp .L49
.L44:
cmp BYTE PTR s10_evt0[rip], 0
jne .L4593
jmp .L45
.L40:
cmp BYTE PTR s11_evt0[rip], 0
jne .L4593
jmp .L41
.L179:
movss xmm3, DWORD PTR s18_lambda[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
ucomiss xmm4, xmm3
jnp .L6627
.L1944:
mov r10d, ebp
or r10b, BYTE PTR _x_s18_l1[rip]
jne .L2392
cmp BYTE PTR s18_l1[rip], 0
je .L2928
pxor xmm7, xmm7
ucomiss xmm6, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
setnp bl
cmovne ebx, r10d
jmp .L189
.L6625:
movzx esi, BYTE PTR s18_l1[rip]
test sil, sil
je .L3183
.L176:
movss xmm3, DWORD PTR s18_lambda[rip]
ucomiss xmm4, xmm3
jnp .L6628
.L3877:
movzx r8d, BYTE PTR _x_s18_l1[rip]
xor esi, esi
jmp .L2394
.L6610:
cmp BYTE PTR s18_l1[rip], 0
jne .L188
.L2928:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L188
comiss xmm7, DWORD PTR delta[rip]
jne .L188
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or sil, r10b
je .L188
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L6627:
je .L1942
jmp .L1944
.L188:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm6, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
setnp bl
cmovne ebx, r10d
mov r10d, ebx
and r10b, r11b
je .L189
mov r11d, r10d
mov ebx, r10d
jmp .L190
.L3178:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L214
comiss xmm5, DWORD PTR delta[rip]
jne .L214
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or BYTE PTR 8[rsp], r10b
je .L215
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L214:
cmp BYTE PTR 8[rsp], 0
jne .L2385
jmp .L215
.L204:
test bl, bl
je .L2924
.L1941:
test dil, dil
je .L207
jmp .L1940
.L203:
test bl, bl
je .L207
jmp .L1941
.L6614:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L197
comiss xmm6, DWORD PTR delta[rip]
jne .L197
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, sil
mov BYTE PTR 8[rsp], r10b
je .L198
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L6616:
cmp BYTE PTR s18_l1[rip], 0
jne .L215
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L215
comiss xmm5, DWORD PTR delta[rip]
jne .L215
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or BYTE PTR 8[rsp], r10b
je .L215
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L198:
test bl, bl
jne .L2925
jmp .L2924
.L202:
test bl, bl
jne .L206
jmp .L207
.L201:
test bl, bl
jne .L206
test bpl, bpl
je .L207
jmp .L2923
.L6624:
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L87:
cmp BYTE PTR bus_evt0[rip], 0
je .L88
jmp .L4593
.L6622:
cmp BYTE PTR s18_l1[rip], 0
je .L3183
.L2398:
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
je .L177
movss xmm3, DWORD PTR s18_lambda[rip]
movzx r8d, BYTE PTR _x_s18_l1[rip]
ucomiss xmm4, xmm3
jp .L2394
je .L184
jmp .L2394
.L3211:
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L6140:
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L6618:
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L3212:
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L6586:
cmp BYTE PTR bus_evt1[rip], 0
jne .L4593
jmp .L88
.L6620:
movss xmm3, DWORD PTR s18_lambda[rip]
ucomiss xmm4, xmm3
jp .L182
je .L2396
jmp .L182
.L6621:
je .L2396
xor esi, esi
jmp .L1944
.L84:
cmp BYTE PTR s0_evt0[rip], 0
jne .L4593
jmp .L85
.L80:
cmp BYTE PTR s1_evt0[rip], 0
jne .L4593
jmp .L81
.L76:
cmp BYTE PTR s2_evt0[rip], 0
jne .L4593
jmp .L77
.L72:
cmp BYTE PTR s3_evt0[rip], 0
jne .L4593
jmp .L73
.L232:
test bpl, bpl
je .L6629
movzx esi, BYTE PTR _x_s17_l1[rip]
mov r10d, esi
test sil, sil
je .L6630
movss xmm3, DWORD PTR s17_lambda[rip]
ucomiss xmm4, xmm3
jnp .L6631
.L3896:
xor r10d, r10d
.L1937:
mov r11d, r13d
or r11b, BYTE PTR _x_s17_l1[rip]
je .L6632
.L2373:
pxor xmm4, xmm4
mov r15d, 0
ucomiss xmm5, xmm4
setnp r11b
cmove r15d, r11d
xor ebx, ebx
.L250:
cmp BYTE PTR s17_l1[rip], 0
je .L251
test r13b, r13b
je .L6633
.L251:
movss xmm4, DWORD PTR s17_x[rip]
comiss xmm4, xmm3
jnb .L6634
.L253:
test bpl, bpl
jne .L257
.L3172:
mov r11d, r13d
or r11b, BYTE PTR _x_s17_l1[rip]
jne .L258
cmp BYTE PTR s17_l1[rip], 0
jne .L6635
.L258:
test r10b, r10b
je .L2372
mov BYTE PTR 9[rsp], r10b
.L260:
test bl, bl
je .L266
.L2906:
cmp BYTE PTR _x_s17_l1[rip], 0
jne .L2368
.L267:
test bpl, bpl
jne .L1929
.L266:
test r13b, r13b
je .L268
cmp BYTE PTR s17_l1[rip], 0
jne .L268
.L2904:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L268
comiss xmm6, DWORD PTR delta[rip]
jne .L268
movzx ebx, BYTE PTR 9[rsp]
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or bl, r11b
je .L271
xor r10d, r10d
jmp .L95
.L2372:
movzx r11d, BYTE PTR s17_evt0[rip]
mov BYTE PTR 9[rsp], r11b
test r11b, r11b
je .L260
.L3653:
cmp BYTE PTR s17_evt1[rip], 0
mov BYTE PTR 9[rsp], 0
jne .L255
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s17_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L260
.L255:
test bpl, bpl
je .L260
.L2371:
cmp BYTE PTR _x_s17_l1[rip], 0
jne .L261
cmp BYTE PTR s17_l1[rip], 0
je .L262
test r13b, r13b
jne .L263
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L264
comiss xmm5, DWORD PTR delta[rip]
jne .L264
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or BYTE PTR 9[rsp], r11b
je .L265
xor r10d, r10d
jmp .L95
.L257:
test r10b, r10b
je .L2370
mov BYTE PTR 9[rsp], r10b
jmp .L2371
.L265:
test bl, bl
je .L2905
.L1930:
test bpl, bpl
jne .L1929
.L268:
cmp BYTE PTR 9[rsp], 0
jne .L272
.L2905:
cmp BYTE PTR s17_evt0[rip], 0
je .L271
movzx ebx, BYTE PTR s17_evt1[rip]
mov BYTE PTR 9[rsp], bl
test bl, bl
je .L273
.L271:
mov BYTE PTR 9[rsp], 0
test bpl, bpl
je .L273
test r13b, r13b
jne .L6636
.L276:
cmp BYTE PTR _x_s16_evt2[rip], 0
jne .L277
cmp BYTE PTR _x_s16_evt0[rip], 0
je .L278
xor r10d, r10d
cmp BYTE PTR _x_s16_evt1[rip], 0
jne .L95
.L278:
movzx ebp, BYTE PTR _x_s16_l0[rip]
test bpl, bpl
je .L1928
xor r10d, r10d
cmp BYTE PTR _x_s16_l1[rip], 0
jne .L95
.L1928:
movss xmm6, DWORD PTR _x_s16_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s16_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s16_x[rip]
comiss xmm4, xmm5
jnb .L281
cmp BYTE PTR _x_s16_l1[rip], 0
je .L281
test bpl, bpl
je .L95
.L281:
movzx r13d, BYTE PTR s16_l0[rip]
test r13b, r13b
sete BYTE PTR 7[rsp]
test bpl, bpl
movzx ebx, BYTE PTR 7[rsp]
setne BYTE PTR 11[rsp]
movzx r15d, BYTE PTR 11[rsp]
cmp bl, r15b
je .L283
cmp BYTE PTR s16_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s16_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L283
ucomiss xmm4, DWORD PTR s16_lambda[rip]
jp .L283
jne .L283
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s16_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L283
jne .L283
ucomiss xmm6, DWORD PTR s16_backoff[rip]
jp .L283
movzx ebx, BYTE PTR s16_evt2[rip]
jne .L283
.L286:
test bpl, bpl
je .L289
cmp BYTE PTR _x_s16_l1[rip], 0
je .L289
.L290:
mov r15d, r13d
or r15b, BYTE PTR s16_l1[rip]
jne .L291
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L291
comiss xmm7, DWORD PTR delta[rip]
jne .L291
or bl, BYTE PTR s16_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s16_evt1[rip]
je .L293
xor r10d, r10d
jmp .L95
.L277:
xor r10d, r10d
cmp BYTE PTR _x_s16_evt0[rip], 0
jne .L95
jmp .L278
.L293:
test bpl, bpl
je .L6637
movzx r10d, BYTE PTR _x_s16_l1[rip]
test r10b, r10b
je .L6638
movss xmm3, DWORD PTR s16_lambda[rip]
ucomiss xmm4, xmm3
jp .L3895
jne .L3895
.L2358:
movzx r10d, BYTE PTR s16_evt0[rip]
test r10b, r10b
je .L308
movzx r10d, BYTE PTR s16_evt1[rip]
test r10b, r10b
je .L309
xor r10d, r10d
.L308:
test bpl, bpl
je .L309
.L2357:
mov ebx, r13d
or bl, BYTE PTR _x_s16_l1[rip]
je .L6639
.L309:
pxor xmm7, xmm7
mov r11d, 0
ucomiss xmm5, xmm7
setnp bl
cmovne ebx, r11d
ucomiss xmm4, xmm3
mov r15d, ebx
setnp bl
cmove r11d, ebx
mov ebx, r15d
and bl, r11b
jne .L6640
.L311:
cmp BYTE PTR s16_l1[rip], 0
je .L312
test r13b, r13b
je .L6641
.L312:
movss xmm4, DWORD PTR s16_x[rip]
comiss xmm4, xmm3
jnb .L6642
.L314:
test bpl, bpl
jne .L318
.L3165:
mov ebx, r13d
or bl, BYTE PTR _x_s16_l1[rip]
jne .L319
cmp BYTE PTR s16_l1[rip], 0
jne .L6643
.L319:
test r10b, r10b
je .L2353
mov BYTE PTR 10[rsp], r10b
.L321:
test r11b, r11b
je .L327
.L2887:
cmp BYTE PTR _x_s16_l1[rip], 0
je .L328
.L2349:
test bpl, bpl
jne .L327
.L1918:
ucomiss xmm6, DWORD PTR s16_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L327
test r15b, r15b
jne .L329
.L327:
test r13b, r13b
je .L329
cmp BYTE PTR s16_l1[rip], 0
jne .L329
.L2885:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L329
comiss xmm6, DWORD PTR delta[rip]
jne .L329
movzx r15d, BYTE PTR 10[rsp]
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or r15b, bl
je .L332
xor r10d, r10d
jmp .L95
.L2353:
movzx ebx, BYTE PTR s16_evt0[rip]
mov BYTE PTR 10[rsp], bl
test bl, bl
je .L321
.L3650:
cmp BYTE PTR s16_evt1[rip], 0
mov BYTE PTR 10[rsp], 0
jne .L316
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s16_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L321
.L316:
test bpl, bpl
je .L321
.L2352:
cmp BYTE PTR _x_s16_l1[rip], 0
jne .L322
cmp BYTE PTR s16_l1[rip], 0
je .L323
test r13b, r13b
jne .L324
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L325
comiss xmm5, DWORD PTR delta[rip]
jne .L325
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or BYTE PTR 10[rsp], bl
je .L326
xor r10d, r10d
jmp .L95
.L318:
test r10b, r10b
je .L2351
mov BYTE PTR 10[rsp], r10b
jmp .L2352
.L332:
mov BYTE PTR 10[rsp], 0
test bpl, bpl
je .L334
test r13b, r13b
jne .L6644
.L337:
cmp BYTE PTR _x_s15_evt2[rip], 0
jne .L338
cmp BYTE PTR _x_s15_evt0[rip], 0
je .L339
xor r10d, r10d
cmp BYTE PTR _x_s15_evt1[rip], 0
jne .L95
.L339:
movzx r13d, BYTE PTR _x_s15_l0[rip]
test r13b, r13b
je .L1917
xor r10d, r10d
cmp BYTE PTR _x_s15_l1[rip], 0
jne .L95
.L1917:
movss xmm6, DWORD PTR _x_s15_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s15_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s15_x[rip]
comiss xmm4, xmm5
jnb .L342
cmp BYTE PTR _x_s15_l1[rip], 0
je .L342
test r13b, r13b
je .L95
.L342:
movzx r15d, BYTE PTR s15_l0[rip]
test r15b, r15b
sete BYTE PTR 12[rsp]
test r13b, r13b
movzx ebx, BYTE PTR 12[rsp]
setne BYTE PTR 13[rsp]
movzx r11d, BYTE PTR 13[rsp]
cmp bl, r11b
je .L344
cmp BYTE PTR s15_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s15_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L344
ucomiss xmm4, DWORD PTR s15_lambda[rip]
jp .L344
jne .L344
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s15_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L344
jne .L344
ucomiss xmm6, DWORD PTR s15_backoff[rip]
jp .L344
movzx ebx, BYTE PTR s15_evt2[rip]
jne .L344
.L347:
test r13b, r13b
je .L350
cmp BYTE PTR _x_s15_l1[rip], 0
je .L350
.L351:
mov r11d, r15d
or r11b, BYTE PTR s15_l1[rip]
jne .L352
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L352
comiss xmm7, DWORD PTR delta[rip]
jne .L352
or bl, BYTE PTR s15_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s15_evt1[rip]
je .L354
xor r10d, r10d
jmp .L95
.L338:
xor r10d, r10d
cmp BYTE PTR _x_s15_evt0[rip], 0
jne .L95
jmp .L339
.L354:
test r13b, r13b
je .L6645
movzx r10d, BYTE PTR _x_s15_l1[rip]
test r10b, r10b
je .L6646
movss xmm3, DWORD PTR s15_lambda[rip]
ucomiss xmm4, xmm3
jnp .L6647
.L3894:
xor r10d, r10d
.L1911:
mov ebp, r15d
or bpl, BYTE PTR _x_s15_l1[rip]
je .L6648
.L2335:
pxor xmm4, xmm4
mov r11d, 0
ucomiss xmm5, xmm4
setnp bl
cmove r11d, ebx
xor ebx, ebx
mov BYTE PTR 7[rsp], r11b
.L372:
cmp BYTE PTR s15_l1[rip], 0
je .L373
test r15b, r15b
je .L6649
.L373:
movss xmm4, DWORD PTR s15_x[rip]
comiss xmm4, xmm3
jb .L375
cmp BYTE PTR s15_evt1[rip], 0
jne .L6650
.L375:
test r13b, r13b
je .L3158
test r10b, r10b
je .L2332
mov BYTE PTR 11[rsp], r10b
.L2333:
cmp BYTE PTR _x_s15_l1[rip], 0
jne .L383
cmp BYTE PTR s15_l1[rip], 0
je .L384
test r15b, r15b
jne .L385
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L386
comiss xmm5, DWORD PTR delta[rip]
jne .L386
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or BYTE PTR 11[rsp], bpl
je .L387
xor r10d, r10d
jmp .L95
.L6650:
mov r11d, r10d
or r11b, BYTE PTR s15_evt0[rip]
mov BYTE PTR 11[rsp], r11b
jne .L375
movss xmm3, DWORD PTR s15_backoff[rip]
comiss xmm3, xmm6
jnb .L377
.L378:
xor r10d, r10d
test r13b, r13b
je .L3158
.L2332:
movzx r11d, BYTE PTR s15_evt0[rip]
mov BYTE PTR 11[rsp], r11b
test r11b, r11b
je .L2333
.L3647:
cmp BYTE PTR s15_evt1[rip], 0
mov BYTE PTR 11[rsp], 0
jne .L377
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s15_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jb .L377
.L382:
test bl, bl
jne .L2868
.L388:
test r15b, r15b
je .L390
cmp BYTE PTR s15_l1[rip], 0
je .L2866
.L390:
cmp BYTE PTR 11[rsp], 0
jne .L394
.L2867:
cmp BYTE PTR s15_evt0[rip], 0
jne .L6651
.L393:
mov BYTE PTR 11[rsp], 0
test r13b, r13b
jne .L6652
.L395:
cmp BYTE PTR _x_s15_l1[rip], 0
movzx ebx, BYTE PTR 13[rsp]
sete r10b
or bl, r10b
jne .L398
cmp BYTE PTR 12[rsp], 0
je .L6653
.L398:
cmp BYTE PTR _x_s14_evt2[rip], 0
jne .L399
cmp BYTE PTR _x_s14_evt0[rip], 0
je .L400
xor r10d, r10d
test r12d, r12d
jne .L95
.L400:
movzx ebp, BYTE PTR _x_s14_l0[rip]
test bpl, bpl
jne .L401
.L1906:
movss xmm6, DWORD PTR _x_s14_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s14_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s14_x[rip]
comiss xmm4, xmm5
jnb .L403
cmp BYTE PTR _x_s14_l1[rip], 0
je .L403
test bpl, bpl
je .L95
.L403:
movzx r13d, BYTE PTR s14_l0[rip]
test r13b, r13b
sete BYTE PTR 7[rsp]
test bpl, bpl
movzx ebx, BYTE PTR 7[rsp]
setne BYTE PTR 13[rsp]
movzx r15d, BYTE PTR 13[rsp]
cmp bl, r15b
je .L405
cmp BYTE PTR s14_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s14_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L405
ucomiss xmm4, DWORD PTR s14_lambda[rip]
jp .L405
jne .L405
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s14_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L405
jne .L405
ucomiss xmm6, DWORD PTR s14_backoff[rip]
jp .L405
movzx ebx, BYTE PTR s14_evt2[rip]
jne .L405
.L408:
test bpl, bpl
je .L411
cmp BYTE PTR _x_s14_l1[rip], 0
jne .L412
.L411:
ucomiss xmm6, DWORD PTR s14_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L412
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L413
.L412:
mov r15d, r13d
or r15b, BYTE PTR s14_l1[rip]
jne .L413
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L413
comiss xmm7, DWORD PTR delta[rip]
jne .L413
or bl, BYTE PTR s14_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s14_evt1[rip]
je .L415
xor r10d, r10d
jmp .L95
.L377:
test r13b, r13b
jne .L2333
jmp .L382
.L413:
mov r10d, ebx
test bl, bl
jne .L416
cmp BYTE PTR s14_evt0[rip], 0
je .L415
cmp BYTE PTR s14_evt1[rip], 0
jne .L415
movss xmm3, DWORD PTR s14_lambda[rip]
ucomiss xmm4, xmm3
jp .L415
jne .L415
cmp BYTE PTR _x_s14_l1[rip], 0
jne .L6654
.L2320:
movzx r10d, BYTE PTR s14_evt0[rip]
test r10b, r10b
je .L430
movzx r10d, BYTE PTR s14_evt1[rip]
test r10b, r10b
je .L431
xor r10d, r10d
.L430:
test bpl, bpl
je .L431
.L2319:
mov ebx, r13d
or bl, BYTE PTR _x_s14_l1[rip]
je .L6655
.L431:
pxor xmm7, xmm7
mov r11d, 0
ucomiss xmm5, xmm7
setnp bl
cmovne ebx, r11d
ucomiss xmm4, xmm3
mov r15d, ebx
setnp bl
cmove r11d, ebx
mov ebx, r15d
and bl, r11b
jne .L6656
.L433:
cmp BYTE PTR s14_l1[rip], 0
je .L434
test r13b, r13b
je .L6657
.L434:
movss xmm4, DWORD PTR s14_x[rip]
comiss xmm4, xmm3
jnb .L6658
.L436:
test bpl, bpl
jne .L440
.L3151:
mov ebx, r13d
or bl, BYTE PTR _x_s14_l1[rip]
jne .L441
cmp BYTE PTR s14_l1[rip], 0
jne .L6659
.L441:
test r10b, r10b
je .L2315
mov BYTE PTR 12[rsp], r10b
.L443:
test r11b, r11b
je .L449
.L2849:
cmp BYTE PTR _x_s14_l1[rip], 0
je .L450
.L2311:
test bpl, bpl
jne .L449
.L1896:
ucomiss xmm6, DWORD PTR s14_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L449
test r15b, r15b
jne .L451
.L449:
test r13b, r13b
je .L451
cmp BYTE PTR s14_l1[rip], 0
jne .L451
.L2847:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L451
comiss xmm6, DWORD PTR delta[rip]
jne .L451
movzx ebx, BYTE PTR 12[rsp]
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or bl, r12b
je .L454
xor r10d, r10d
jmp .L95
.L2315:
movzx ebx, BYTE PTR s14_evt0[rip]
mov BYTE PTR 12[rsp], bl
test bl, bl
je .L443
.L3644:
cmp BYTE PTR s14_evt1[rip], 0
mov BYTE PTR 12[rsp], 0
jne .L438
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s14_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L443
.L438:
test bpl, bpl
je .L443
.L2314:
cmp BYTE PTR _x_s14_l1[rip], 0
jne .L444
cmp BYTE PTR s14_l1[rip], 0
je .L445
test r13b, r13b
jne .L446
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L447
comiss xmm5, DWORD PTR delta[rip]
jne .L447
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or BYTE PTR 12[rsp], r12b
je .L448
xor r10d, r10d
jmp .L95
.L445:
test r11b, r11b
jne .L450
test r13b, r13b
jne .L2847
.L451:
cmp BYTE PTR 12[rsp], 0
jne .L455
.L2848:
cmp BYTE PTR s14_evt0[rip], 0
je .L454
movzx ebx, BYTE PTR s14_evt1[rip]
mov BYTE PTR 12[rsp], bl
test bl, bl
je .L456
.L454:
test bpl, bpl
jne .L6660
mov BYTE PTR 12[rsp], 0
.L456:
cmp BYTE PTR _x_s14_l1[rip], 0
movzx ebx, BYTE PTR 13[rsp]
sete r10b
or bl, r10b
jne .L459
cmp BYTE PTR 7[rsp], 0
je .L6661
.L459:
cmp BYTE PTR _x_s13_evt2[rip], 0
jne .L460
cmp BYTE PTR _x_s13_evt0[rip], 0
je .L461
xor r10d, r10d
cmp BYTE PTR _x_s13_evt1[rip], 0
jne .L95
.L461:
movzx ebp, BYTE PTR _x_s13_l0[rip]
test bpl, bpl
jne .L462
.L1895:
movss xmm6, DWORD PTR _x_s13_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s13_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s13_x[rip]
comiss xmm4, xmm5
jnb .L464
cmp BYTE PTR _x_s13_l1[rip], 0
je .L464
test bpl, bpl
je .L95
.L464:
movzx r12d, BYTE PTR s13_l0[rip]
test r12b, r12b
sete BYTE PTR 7[rsp]
test bpl, bpl
movzx ebx, BYTE PTR 7[rsp]
setne BYTE PTR 14[rsp]
movzx r15d, BYTE PTR 14[rsp]
cmp bl, r15b
je .L466
cmp BYTE PTR s13_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s13_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L466
ucomiss xmm4, DWORD PTR s13_lambda[rip]
jp .L466
jne .L466
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s13_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L466
jne .L466
ucomiss xmm6, DWORD PTR s13_backoff[rip]
jp .L466
movzx ebx, BYTE PTR s13_evt2[rip]
jne .L466
.L469:
test bpl, bpl
je .L472
cmp BYTE PTR _x_s13_l1[rip], 0
jne .L473
.L472:
ucomiss xmm6, DWORD PTR s13_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L473
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L474
.L473:
mov r15d, r12d
or r15b, BYTE PTR s13_l1[rip]
jne .L474
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L474
comiss xmm7, DWORD PTR delta[rip]
jne .L474
or bl, BYTE PTR s13_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s13_evt1[rip]
je .L476
xor r10d, r10d
jmp .L95
.L474:
test bl, bl
jne .L477
cmp BYTE PTR s13_evt0[rip], 0
je .L476
cmp BYTE PTR s13_evt1[rip], 0
jne .L476
movss xmm3, DWORD PTR s13_lambda[rip]
ucomiss xmm4, xmm3
jp .L476
jne .L476
cmp BYTE PTR _x_s13_l1[rip], 0
jne .L6662
.L2301:
movzx ebx, BYTE PTR s13_evt0[rip]
test bl, bl
je .L491
movzx ebx, BYTE PTR s13_evt1[rip]
test bl, bl
je .L492
xor ebx, ebx
.L491:
test bpl, bpl
je .L492
.L2300:
mov r15d, r12d
or r15b, BYTE PTR _x_s13_l1[rip]
je .L6663
.L492:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
jne .L6664
.L494:
cmp BYTE PTR s13_l1[rip], 0
je .L495
test r12b, r12b
je .L6665
.L495:
movss xmm4, DWORD PTR s13_x[rip]
comiss xmm4, xmm3
jnb .L6666
.L497:
test bpl, bpl
jne .L501
.L3144:
mov r15d, r12d
or r15b, BYTE PTR _x_s13_l1[rip]
jne .L502
cmp BYTE PTR s13_l1[rip], 0
jne .L6667
.L502:
test bl, bl
je .L2296
mov BYTE PTR 13[rsp], bl
.L504:
test r11b, r11b
je .L510
.L2830:
cmp BYTE PTR _x_s13_l1[rip], 0
je .L511
.L2292:
test bpl, bpl
jne .L510
.L1885:
ucomiss xmm6, DWORD PTR s13_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L510
test r13b, r13b
jne .L512
.L510:
test r12b, r12b
je .L512
cmp BYTE PTR s13_l1[rip], 0
jne .L512
.L2828:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L512
comiss xmm6, DWORD PTR delta[rip]
jne .L512
movzx ebx, BYTE PTR 13[rsp]
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
or bl, r15b
je .L515
xor r10d, r10d
jmp .L95
.L2296:
movzx ebx, BYTE PTR s13_evt0[rip]
mov BYTE PTR 13[rsp], bl
test bl, bl
je .L504
.L3641:
cmp BYTE PTR s13_evt1[rip], 0
mov BYTE PTR 13[rsp], 0
jne .L499
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s13_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L504
.L499:
test bpl, bpl
je .L504
.L2295:
cmp BYTE PTR _x_s13_l1[rip], 0
jne .L505
cmp BYTE PTR s13_l1[rip], 0
je .L506
test r12b, r12b
jne .L507
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L508
comiss xmm5, DWORD PTR delta[rip]
jne .L508
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
or BYTE PTR 13[rsp], r15b
je .L509
xor r10d, r10d
jmp .L95
.L503:
test r11b, r11b
jne .L2830
.L2829:
cmp BYTE PTR s13_evt0[rip], 0
je .L515
movzx ebx, BYTE PTR s13_evt1[rip]
mov BYTE PTR 13[rsp], bl
test bl, bl
je .L517
.L515:
test bpl, bpl
jne .L6668
mov BYTE PTR 13[rsp], 0
.L517:
cmp BYTE PTR _x_s13_l1[rip], 0
movzx ebx, BYTE PTR 14[rsp]
sete r10b
or bl, r10b
jne .L520
cmp BYTE PTR 7[rsp], 0
je .L6669
.L520:
cmp BYTE PTR _x_s12_evt2[rip], 0
jne .L521
cmp BYTE PTR _x_s12_evt0[rip], 0
je .L522
xor r10d, r10d
cmp BYTE PTR _x_s12_evt1[rip], 0
jne .L95
.L522:
movzx ebp, BYTE PTR _x_s12_l0[rip]
test bpl, bpl
jne .L523
.L1884:
movss xmm6, DWORD PTR _x_s12_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s12_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s12_x[rip]
comiss xmm4, xmm5
jnb .L525
cmp BYTE PTR _x_s12_l1[rip], 0
je .L525
test bpl, bpl
je .L95
.L525:
movzx r12d, BYTE PTR s12_l0[rip]
test r12b, r12b
sete r15b
test bpl, bpl
setne BYTE PTR 7[rsp]
movzx ebx, BYTE PTR 7[rsp]
cmp r15b, bl
je .L527
cmp BYTE PTR s12_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s12_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L527
ucomiss xmm4, DWORD PTR s12_lambda[rip]
jp .L527
jne .L527
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s12_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L527
jne .L527
ucomiss xmm6, DWORD PTR s12_backoff[rip]
jp .L527
movzx ebx, BYTE PTR s12_evt2[rip]
jne .L527
.L530:
test bpl, bpl
je .L533
cmp BYTE PTR _x_s12_l1[rip], 0
jne .L534
.L533:
ucomiss xmm6, DWORD PTR s12_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L534
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L535
.L534:
mov r11d, r12d
or r11b, BYTE PTR s12_l1[rip]
jne .L535
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L535
comiss xmm7, DWORD PTR delta[rip]
jne .L535
or bl, BYTE PTR s12_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s12_evt1[rip]
je .L537
xor r10d, r10d
jmp .L95
.L535:
test bl, bl
jne .L538
cmp BYTE PTR s12_evt0[rip], 0
je .L537
cmp BYTE PTR s12_evt1[rip], 0
jne .L537
movss xmm3, DWORD PTR s12_lambda[rip]
ucomiss xmm4, xmm3
jp .L537
jne .L537
cmp BYTE PTR _x_s12_l1[rip], 0
jne .L6670
.L2282:
movzx ebx, BYTE PTR s12_evt0[rip]
test bl, bl
je .L552
movzx ebx, BYTE PTR s12_evt1[rip]
test bl, bl
je .L553
xor ebx, ebx
.L552:
test bpl, bpl
je .L553
.L2281:
mov r11d, r12d
or r11b, BYTE PTR _x_s12_l1[rip]
je .L6671
.L553:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
jne .L6672
.L555:
cmp BYTE PTR s12_l1[rip], 0
je .L556
test r12b, r12b
je .L6673
.L556:
movss xmm4, DWORD PTR s12_x[rip]
comiss xmm4, xmm3
jnb .L6674
.L558:
test bpl, bpl
jne .L562
.L3137:
mov r10d, r12d
or r10b, BYTE PTR _x_s12_l1[rip]
jne .L563
cmp BYTE PTR s12_l1[rip], 0
jne .L6675
.L563:
test bl, bl
je .L2277
mov BYTE PTR 14[rsp], bl
.L565:
test r11b, r11b
je .L571
.L2811:
cmp BYTE PTR _x_s12_l1[rip], 0
je .L572
.L2273:
test bpl, bpl
jne .L571
.L1874:
ucomiss xmm6, DWORD PTR s12_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L571
test r13b, r13b
jne .L573
.L571:
test r12b, r12b
je .L573
cmp BYTE PTR s12_l1[rip], 0
jne .L573
.L2809:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L573
comiss xmm6, DWORD PTR delta[rip]
jne .L573
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
movzx ebx, BYTE PTR 14[rsp]
or bl, r10b
je .L576
xor r10d, r10d
jmp .L95
.L2277:
movzx ebx, BYTE PTR s12_evt0[rip]
mov BYTE PTR 14[rsp], bl
test bl, bl
je .L565
.L3638:
cmp BYTE PTR s12_evt1[rip], 0
mov BYTE PTR 14[rsp], 0
jne .L560
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s12_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L565
.L560:
test bpl, bpl
je .L565
.L2276:
cmp BYTE PTR _x_s12_l1[rip], 0
jne .L566
cmp BYTE PTR s12_l1[rip], 0
je .L567
test r12b, r12b
jne .L568
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L569
comiss xmm5, DWORD PTR delta[rip]
jne .L569
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
or BYTE PTR 14[rsp], bl
je .L570
xor r10d, r10d
jmp .L95
.L562:
test bl, bl
je .L2275
mov BYTE PTR 14[rsp], bl
jmp .L2276
.L569:
test r11b, r11b
je .L573
.L1875:
test bpl, bpl
jne .L1874
.L573:
cmp BYTE PTR 14[rsp], 0
jne .L577
.L2810:
cmp BYTE PTR s12_evt0[rip], 0
je .L576
movzx ebx, BYTE PTR s12_evt1[rip]
mov BYTE PTR 14[rsp], bl
test bl, bl
je .L578
.L576:
test bpl, bpl
jne .L6676
mov BYTE PTR 14[rsp], 0
.L578:
cmp BYTE PTR _x_s12_l1[rip], 0
movzx ebx, BYTE PTR 7[rsp]
sete r10b
or bl, r10b
jne .L581
test r15b, r15b
je .L6677
.L581:
cmp BYTE PTR _x_s11_evt2[rip], 0
jne .L582
cmp BYTE PTR _x_s11_evt0[rip], 0
je .L583
xor r10d, r10d
cmp BYTE PTR _x_s11_evt1[rip], 0
jne .L95
.L583:
movzx ebp, BYTE PTR _x_s11_l0[rip]
test bpl, bpl
jne .L584
.L1873:
movss xmm6, DWORD PTR _x_s11_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s11_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s11_x[rip]
comiss xmm4, xmm5
jnb .L586
cmp BYTE PTR _x_s11_l1[rip], 0
je .L586
test bpl, bpl
je .L95
.L586:
movzx r12d, BYTE PTR s11_l0[rip]
test r12b, r12b
sete r15b
test bpl, bpl
setne BYTE PTR 7[rsp]
movzx ebx, BYTE PTR 7[rsp]
cmp r15b, bl
je .L588
cmp BYTE PTR s11_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s11_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L588
ucomiss xmm4, DWORD PTR s11_lambda[rip]
jp .L588
jne .L588
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s11_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L588
jne .L588
ucomiss xmm6, DWORD PTR s11_backoff[rip]
jp .L588
movzx ebx, BYTE PTR s11_evt2[rip]
jne .L588
.L591:
test bpl, bpl
je .L594
cmp BYTE PTR _x_s11_l1[rip], 0
jne .L595
.L594:
ucomiss xmm6, DWORD PTR s11_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L595
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L596
.L595:
mov r11d, r12d
or r11b, BYTE PTR s11_l1[rip]
jne .L596
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L596
comiss xmm7, DWORD PTR delta[rip]
jne .L596
or bl, BYTE PTR s11_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s11_evt1[rip]
je .L598
xor r10d, r10d
jmp .L95
.L596:
test bl, bl
jne .L599
cmp BYTE PTR s11_evt0[rip], 0
je .L598
cmp BYTE PTR s11_evt1[rip], 0
jne .L598
movss xmm3, DWORD PTR s11_lambda[rip]
ucomiss xmm4, xmm3
jp .L598
jne .L598
cmp BYTE PTR _x_s11_l1[rip], 0
jne .L6678
.L2263:
movzx ebx, BYTE PTR s11_evt0[rip]
test bl, bl
je .L613
movzx ebx, BYTE PTR s11_evt1[rip]
test bl, bl
je .L614
xor ebx, ebx
.L613:
test bpl, bpl
je .L614
.L2262:
mov r11d, r12d
or r11b, BYTE PTR _x_s11_l1[rip]
je .L6679
.L614:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
jne .L6680
.L616:
cmp BYTE PTR s11_l1[rip], 0
je .L617
test r12b, r12b
je .L6681
.L617:
movss xmm4, DWORD PTR s11_x[rip]
comiss xmm4, xmm3
jnb .L6682
.L619:
test bpl, bpl
jne .L623
.L3130:
mov r10d, r12d
or r10b, BYTE PTR _x_s11_l1[rip]
jne .L624
cmp BYTE PTR s11_l1[rip], 0
jne .L6683
.L624:
test bl, bl
je .L2256
mov BYTE PTR 15[rsp], bl
.L626:
test r11b, r11b
je .L632
.L2792:
cmp BYTE PTR _x_s11_l1[rip], 0
je .L633
.L2254:
test bpl, bpl
jne .L632
.L1863:
ucomiss xmm6, DWORD PTR s11_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L632
test r13b, r13b
jne .L634
.L632:
test r12b, r12b
je .L634
cmp BYTE PTR s11_l1[rip], 0
jne .L634
.L2790:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L634
comiss xmm6, DWORD PTR delta[rip]
jne .L634
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
mov r10d, ebx
movzx ebx, BYTE PTR 15[rsp]
or bl, r10b
je .L637
xor r10d, r10d
jmp .L95
.L2256:
movzx ebx, BYTE PTR s11_evt0[rip]
mov BYTE PTR 15[rsp], bl
test bl, bl
je .L626
.L3635:
cmp BYTE PTR s11_evt1[rip], 0
mov BYTE PTR 15[rsp], 0
jne .L621
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s11_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L626
.L621:
test bpl, bpl
je .L626
.L2258:
cmp BYTE PTR _x_s11_l1[rip], 0
jne .L627
cmp BYTE PTR s11_l1[rip], 0
je .L628
test r12b, r12b
jne .L629
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L630
comiss xmm5, DWORD PTR delta[rip]
jne .L630
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
or BYTE PTR 15[rsp], bl
je .L631
xor r10d, r10d
jmp .L95
.L625:
test r11b, r11b
jne .L2792
.L2791:
cmp BYTE PTR s11_evt0[rip], 0
je .L637
movzx ebx, BYTE PTR s11_evt1[rip]
mov BYTE PTR 15[rsp], bl
test bl, bl
je .L639
.L637:
test bpl, bpl
jne .L6684
mov BYTE PTR 15[rsp], 0
.L639:
cmp BYTE PTR _x_s11_l1[rip], 0
movzx ebx, BYTE PTR 7[rsp]
sete r10b
or bl, r10b
jne .L642
test r15b, r15b
je .L6685
.L642:
cmp BYTE PTR _x_s10_evt2[rip], 0
jne .L643
cmp BYTE PTR _x_s10_evt0[rip], 0
je .L644
xor r10d, r10d
cmp BYTE PTR _x_s10_evt1[rip], 0
jne .L95
.L644:
movzx ebp, BYTE PTR _x_s10_l0[rip]
test bpl, bpl
jne .L645
.L1862:
movss xmm6, DWORD PTR _x_s10_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s10_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s10_x[rip]
comiss xmm4, xmm5
jnb .L647
cmp BYTE PTR _x_s10_l1[rip], 0
je .L647
test bpl, bpl
je .L95
.L647:
movzx r12d, BYTE PTR s10_l0[rip]
test r12b, r12b
sete r15b
test bpl, bpl
setne BYTE PTR 7[rsp]
movzx ebx, BYTE PTR 7[rsp]
cmp r15b, bl
je .L649
cmp BYTE PTR s10_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s10_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L649
ucomiss xmm4, DWORD PTR s10_lambda[rip]
jp .L649
jne .L649
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s10_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L649
jne .L649
ucomiss xmm6, DWORD PTR s10_backoff[rip]
jp .L649
movzx ebx, BYTE PTR s10_evt2[rip]
jne .L649
.L652:
test bpl, bpl
je .L655
cmp BYTE PTR _x_s10_l1[rip], 0
jne .L656
.L655:
ucomiss xmm6, DWORD PTR s10_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L656
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L657
.L656:
mov r11d, r12d
or r11b, BYTE PTR s10_l1[rip]
jne .L657
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L657
comiss xmm7, DWORD PTR delta[rip]
jne .L657
or bl, BYTE PTR s10_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s10_evt1[rip]
je .L659
xor r10d, r10d
jmp .L95
.L657:
test bl, bl
jne .L660
cmp BYTE PTR s10_evt0[rip], 0
je .L659
cmp BYTE PTR s10_evt1[rip], 0
jne .L659
movss xmm3, DWORD PTR s10_lambda[rip]
ucomiss xmm4, xmm3
jp .L659
jne .L659
cmp BYTE PTR _x_s10_l1[rip], 0
jne .L6686
.L2244:
movzx ebx, BYTE PTR s10_evt0[rip]
test bl, bl
je .L674
movzx ebx, BYTE PTR s10_evt1[rip]
test bl, bl
je .L675
xor ebx, ebx
.L674:
test bpl, bpl
je .L675
.L2243:
mov r11d, r12d
or r11b, BYTE PTR _x_s10_l1[rip]
je .L6687
.L675:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
jne .L6688
.L677:
cmp BYTE PTR s10_l1[rip], 0
je .L678
test r12b, r12b
je .L6689
.L678:
movss xmm4, DWORD PTR s10_x[rip]
comiss xmm4, xmm3
jnb .L6690
.L680:
test bpl, bpl
jne .L684
.L3123:
mov r10d, r12d
or r10b, BYTE PTR _x_s10_l1[rip]
jne .L685
cmp BYTE PTR s10_l1[rip], 0
jne .L6691
.L685:
test bl, bl
je .L2239
mov BYTE PTR 20[rsp], bl
.L687:
test r11b, r11b
je .L693
.L2773:
cmp BYTE PTR _x_s10_l1[rip], 0
je .L694
.L2235:
test bpl, bpl
jne .L693
.L1852:
ucomiss xmm6, DWORD PTR s10_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L693
test r13b, r13b
jne .L695
.L693:
test r12b, r12b
je .L695
cmp BYTE PTR s10_l1[rip], 0
jne .L695
.L2771:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L695
comiss xmm6, DWORD PTR delta[rip]
jne .L695
movzx ebx, BYTE PTR s10_evt0[rip]
or bl, BYTE PTR s10_evt1[rip]
mov r10d, ebx
movzx ebx, BYTE PTR 20[rsp]
or bl, r10b
je .L698
xor r10d, r10d
jmp .L95
.L2239:
movzx ebx, BYTE PTR s10_evt0[rip]
mov BYTE PTR 20[rsp], bl
test bl, bl
je .L687
.L3632:
cmp BYTE PTR s10_evt1[rip], 0
mov BYTE PTR 20[rsp], 0
jne .L682
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s10_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L687
.L682:
test bpl, bpl
je .L687
.L2238:
cmp BYTE PTR _x_s10_l1[rip], 0
jne .L688
cmp BYTE PTR s10_l1[rip], 0
je .L689
test r12b, r12b
jne .L690
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L691
comiss xmm5, DWORD PTR delta[rip]
jne .L691
movzx ebx, BYTE PTR s10_evt0[rip]
or bl, BYTE PTR s10_evt1[rip]
or BYTE PTR 20[rsp], bl
je .L692
xor r10d, r10d
jmp .L95
.L6911:
test r12b, r12b
jne .L2771
.L695:
cmp BYTE PTR 20[rsp], 0
jne .L699
.L2772:
cmp BYTE PTR s10_evt0[rip], 0
je .L698
movzx ebx, BYTE PTR s10_evt1[rip]
mov BYTE PTR 20[rsp], bl
test bl, bl
je .L700
.L698:
test bpl, bpl
jne .L6692
mov BYTE PTR 20[rsp], 0
.L700:
cmp BYTE PTR _x_s10_l1[rip], 0
movzx ebx, BYTE PTR 7[rsp]
sete r10b
or bl, r10b
jne .L703
test r15b, r15b
je .L6693
.L703:
cmp BYTE PTR _x_s9_evt2[rip], 0
jne .L704
cmp BYTE PTR _x_s9_evt0[rip], 0
je .L705
xor r10d, r10d
cmp BYTE PTR _x_s9_evt1[rip], 0
jne .L95
.L705:
movzx ebp, BYTE PTR _x_s9_l0[rip]
test bpl, bpl
jne .L706
.L1851:
movss xmm6, DWORD PTR _x_s9_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s9_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s9_x[rip]
comiss xmm4, xmm5
jnb .L708
cmp BYTE PTR _x_s9_l1[rip], 0
je .L708
test bpl, bpl
je .L95
.L708:
movzx r12d, BYTE PTR s9_l0[rip]
test r12b, r12b
sete r15b
test bpl, bpl
setne BYTE PTR 7[rsp]
movzx ebx, BYTE PTR 7[rsp]
cmp r15b, bl
je .L710
cmp BYTE PTR s9_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s9_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L710
ucomiss xmm4, DWORD PTR s9_lambda[rip]
jp .L710
jne .L710
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s9_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L710
jne .L710
ucomiss xmm6, DWORD PTR s9_backoff[rip]
jp .L710
movzx ebx, BYTE PTR s9_evt2[rip]
jne .L710
.L713:
test bpl, bpl
je .L716
cmp BYTE PTR _x_s9_l1[rip], 0
jne .L717
.L716:
ucomiss xmm6, DWORD PTR s9_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L717
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L718
.L717:
mov r11d, r12d
or r11b, BYTE PTR s9_l1[rip]
jne .L718
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L718
comiss xmm7, DWORD PTR delta[rip]
jne .L718
or bl, BYTE PTR s9_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s9_evt1[rip]
je .L720
xor r10d, r10d
jmp .L95
.L718:
test bl, bl
jne .L721
cmp BYTE PTR s9_evt0[rip], 0
je .L720
cmp BYTE PTR s9_evt1[rip], 0
jne .L720
movss xmm3, DWORD PTR s9_lambda[rip]
ucomiss xmm4, xmm3
jp .L720
jne .L720
cmp BYTE PTR _x_s9_l1[rip], 0
jne .L6694
.L2225:
movzx ebx, BYTE PTR s9_evt0[rip]
test bl, bl
je .L735
movzx ebx, BYTE PTR s9_evt1[rip]
test bl, bl
je .L736
xor ebx, ebx
.L735:
test bpl, bpl
je .L736
.L2224:
mov r11d, r12d
or r11b, BYTE PTR _x_s9_l1[rip]
je .L6695
.L736:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
jne .L6696
.L738:
cmp BYTE PTR s9_l1[rip], 0
je .L739
test r12b, r12b
je .L6697
.L739:
movss xmm4, DWORD PTR s9_x[rip]
comiss xmm4, xmm3
jnb .L6698
.L741:
test bpl, bpl
jne .L745
.L3116:
mov r10d, r12d
or r10b, BYTE PTR _x_s9_l1[rip]
jne .L746
cmp BYTE PTR s9_l1[rip], 0
jne .L6699
.L746:
test bl, bl
je .L2220
mov BYTE PTR 21[rsp], bl
.L748:
test r11b, r11b
je .L754
.L2754:
cmp BYTE PTR _x_s9_l1[rip], 0
je .L755
.L2216:
test bpl, bpl
jne .L754
.L1841:
ucomiss xmm6, DWORD PTR s9_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L754
test r13b, r13b
jne .L756
.L754:
test r12b, r12b
je .L756
cmp BYTE PTR s9_l1[rip], 0
jne .L756
.L2752:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L756
comiss xmm6, DWORD PTR delta[rip]
jne .L756
movzx ebx, BYTE PTR s9_evt0[rip]
or bl, BYTE PTR s9_evt1[rip]
mov r10d, ebx
movzx ebx, BYTE PTR 21[rsp]
or bl, r10b
je .L759
xor r10d, r10d
jmp .L95
.L2220:
movzx ebx, BYTE PTR s9_evt0[rip]
mov BYTE PTR 21[rsp], bl
test bl, bl
je .L748
.L3629:
cmp BYTE PTR s9_evt1[rip], 0
mov BYTE PTR 21[rsp], 0
jne .L743
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s9_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L748
.L743:
test bpl, bpl
je .L748
.L2219:
cmp BYTE PTR _x_s9_l1[rip], 0
jne .L749
cmp BYTE PTR s9_l1[rip], 0
je .L750
test r12b, r12b
jne .L751
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L752
comiss xmm5, DWORD PTR delta[rip]
jne .L752
movzx ebx, BYTE PTR s9_evt0[rip]
or bl, BYTE PTR s9_evt1[rip]
or BYTE PTR 21[rsp], bl
je .L753
xor r10d, r10d
jmp .L95
.L750:
test r11b, r11b
jne .L755
test r12b, r12b
jne .L2752
.L756:
cmp BYTE PTR 21[rsp], 0
jne .L760
.L2753:
cmp BYTE PTR s9_evt0[rip], 0
je .L759
movzx ebx, BYTE PTR s9_evt1[rip]
mov BYTE PTR 21[rsp], bl
test bl, bl
je .L761
.L759:
test bpl, bpl
jne .L6700
mov BYTE PTR 21[rsp], 0
.L761:
cmp BYTE PTR _x_s9_l1[rip], 0
movzx ebx, BYTE PTR 7[rsp]
sete r10b
or bl, r10b
jne .L764
test r15b, r15b
je .L6701
.L764:
cmp BYTE PTR _x_s8_evt2[rip], 0
jne .L765
cmp BYTE PTR _x_s8_evt0[rip], 0
je .L766
xor r10d, r10d
cmp BYTE PTR _x_s8_evt1[rip], 0
jne .L95
.L766:
movzx ebp, BYTE PTR _x_s8_l0[rip]
test bpl, bpl
jne .L767
.L1840:
movss xmm6, DWORD PTR _x_s8_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s8_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s8_x[rip]
comiss xmm4, xmm5
jnb .L769
cmp BYTE PTR _x_s8_l1[rip], 0
je .L769
test bpl, bpl
je .L95
.L769:
movzx r12d, BYTE PTR s8_l0[rip]
test r12b, r12b
sete r15b
test bpl, bpl
setne BYTE PTR 7[rsp]
movzx ebx, BYTE PTR 7[rsp]
cmp r15b, bl
je .L771
cmp BYTE PTR s8_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s8_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L771
ucomiss xmm4, DWORD PTR s8_lambda[rip]
jp .L771
jne .L771
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s8_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L771
jne .L771
ucomiss xmm6, DWORD PTR s8_backoff[rip]
jp .L771
movzx ebx, BYTE PTR s8_evt2[rip]
jne .L771
.L774:
test bpl, bpl
je .L777
cmp BYTE PTR _x_s8_l1[rip], 0
jne .L778
.L777:
ucomiss xmm6, DWORD PTR s8_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L778
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L779
.L778:
mov r11d, r12d
or r11b, BYTE PTR s8_l1[rip]
jne .L779
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L779
comiss xmm7, DWORD PTR delta[rip]
jne .L779
or bl, BYTE PTR s8_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s8_evt1[rip]
je .L781
xor r10d, r10d
jmp .L95
.L779:
test bl, bl
jne .L782
cmp BYTE PTR s8_evt0[rip], 0
je .L781
cmp BYTE PTR s8_evt1[rip], 0
jne .L781
movss xmm3, DWORD PTR s8_lambda[rip]
ucomiss xmm4, xmm3
jp .L781
jne .L781
cmp BYTE PTR _x_s8_l1[rip], 0
jne .L6702
.L2206:
movzx ebx, BYTE PTR s8_evt0[rip]
test bl, bl
je .L796
movzx ebx, BYTE PTR s8_evt1[rip]
test bl, bl
je .L797
xor ebx, ebx
.L796:
test bpl, bpl
je .L797
.L2205:
mov r11d, r12d
or r11b, BYTE PTR _x_s8_l1[rip]
je .L6703
.L797:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
jne .L6704
.L799:
cmp BYTE PTR s8_l1[rip], 0
je .L800
test r12b, r12b
je .L6705
.L800:
movss xmm4, DWORD PTR s8_x[rip]
comiss xmm4, xmm3
jnb .L6706
.L802:
test bpl, bpl
jne .L806
.L3109:
mov r10d, r12d
or r10b, BYTE PTR _x_s8_l1[rip]
jne .L807
cmp BYTE PTR s8_l1[rip], 0
jne .L6707
.L807:
test bl, bl
je .L2201
mov BYTE PTR 23[rsp], bl
.L809:
test r11b, r11b
je .L815
.L2735:
cmp BYTE PTR _x_s8_l1[rip], 0
je .L816
.L2197:
test bpl, bpl
jne .L815
.L1830:
ucomiss xmm6, DWORD PTR s8_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L815
test r13b, r13b
jne .L817
.L815:
test r12b, r12b
je .L817
cmp BYTE PTR s8_l1[rip], 0
jne .L817
.L2733:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L817
comiss xmm6, DWORD PTR delta[rip]
jne .L817
movzx ebx, BYTE PTR s8_evt0[rip]
or bl, BYTE PTR s8_evt1[rip]
mov r10d, ebx
movzx ebx, BYTE PTR 23[rsp]
or bl, r10b
je .L820
xor r10d, r10d
jmp .L95
.L2201:
movzx ebx, BYTE PTR s8_evt0[rip]
mov BYTE PTR 23[rsp], bl
test bl, bl
je .L809
.L3626:
cmp BYTE PTR s8_evt1[rip], 0
mov BYTE PTR 23[rsp], 0
jne .L804
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s8_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L809
.L804:
test bpl, bpl
je .L809
.L2200:
cmp BYTE PTR _x_s8_l1[rip], 0
jne .L810
cmp BYTE PTR s8_l1[rip], 0
je .L811
test r12b, r12b
jne .L812
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L813
comiss xmm5, DWORD PTR delta[rip]
jne .L813
movzx ebx, BYTE PTR s8_evt0[rip]
or bl, BYTE PTR s8_evt1[rip]
or BYTE PTR 23[rsp], bl
je .L814
xor r10d, r10d
jmp .L95
.L808:
test r11b, r11b
jne .L2735
.L2734:
cmp BYTE PTR s8_evt0[rip], 0
je .L820
movzx ebx, BYTE PTR s8_evt1[rip]
mov BYTE PTR 23[rsp], bl
test bl, bl
je .L822
.L820:
test bpl, bpl
jne .L6708
mov BYTE PTR 23[rsp], 0
.L822:
cmp BYTE PTR _x_s8_l1[rip], 0
movzx ebx, BYTE PTR 7[rsp]
sete r10b
or bl, r10b
jne .L825
test r15b, r15b
je .L6709
.L825:
cmp BYTE PTR _x_s7_evt2[rip], 0
jne .L826
cmp BYTE PTR _x_s7_evt0[rip], 0
je .L827
xor r10d, r10d
cmp BYTE PTR _x_s7_evt1[rip], 0
jne .L95
.L827:
movzx ebp, BYTE PTR _x_s7_l0[rip]
test bpl, bpl
jne .L828
.L1829:
movss xmm6, DWORD PTR _x_s7_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s7_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s7_x[rip]
comiss xmm4, xmm5
jnb .L830
cmp BYTE PTR _x_s7_l1[rip], 0
je .L830
test bpl, bpl
je .L95
.L830:
movzx r12d, BYTE PTR s7_l0[rip]
test r12b, r12b
sete r15b
test bpl, bpl
setne BYTE PTR 7[rsp]
movzx ebx, BYTE PTR 7[rsp]
cmp r15b, bl
je .L832
cmp BYTE PTR s7_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s7_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L832
ucomiss xmm4, DWORD PTR s7_lambda[rip]
jp .L832
jne .L832
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s7_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L832
jne .L832
ucomiss xmm6, DWORD PTR s7_backoff[rip]
jp .L832
movzx ebx, BYTE PTR s7_evt2[rip]
jne .L832
.L835:
test bpl, bpl
je .L838
cmp BYTE PTR _x_s7_l1[rip], 0
jne .L839
.L838:
ucomiss xmm6, DWORD PTR s7_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L839
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L840
.L839:
mov r11d, r12d
or r11b, BYTE PTR s7_l1[rip]
jne .L840
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L840
comiss xmm7, DWORD PTR delta[rip]
jne .L840
or bl, BYTE PTR s7_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s7_evt1[rip]
je .L842
xor r10d, r10d
jmp .L95
.L840:
test bl, bl
jne .L843
cmp BYTE PTR s7_evt0[rip], 0
je .L842
cmp BYTE PTR s7_evt1[rip], 0
jne .L842
movss xmm3, DWORD PTR s7_lambda[rip]
ucomiss xmm4, xmm3
jp .L842
jne .L842
cmp BYTE PTR _x_s7_l1[rip], 0
jne .L6710
.L2187:
movzx ebx, BYTE PTR s7_evt0[rip]
test bl, bl
je .L857
movzx ebx, BYTE PTR s7_evt1[rip]
test bl, bl
je .L858
xor ebx, ebx
.L857:
test bpl, bpl
je .L858
.L2186:
mov r11d, r12d
or r11b, BYTE PTR _x_s7_l1[rip]
je .L6711
.L858:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
jne .L6712
.L860:
cmp BYTE PTR s7_l1[rip], 0
je .L861
test r12b, r12b
je .L6713
.L861:
movss xmm4, DWORD PTR s7_x[rip]
comiss xmm4, xmm3
jnb .L6714
.L863:
test bpl, bpl
jne .L867
.L3102:
mov r10d, r12d
or r10b, BYTE PTR _x_s7_l1[rip]
jne .L868
cmp BYTE PTR s7_l1[rip], 0
jne .L6715
.L868:
test bl, bl
je .L2182
mov BYTE PTR 24[rsp], bl
.L870:
test r11b, r11b
je .L876
.L2716:
cmp BYTE PTR _x_s7_l1[rip], 0
je .L877
.L2178:
test bpl, bpl
jne .L876
.L1819:
ucomiss xmm6, DWORD PTR s7_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L876
test r13b, r13b
jne .L878
.L876:
test r12b, r12b
je .L878
cmp BYTE PTR s7_l1[rip], 0
jne .L878
.L2714:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L878
comiss xmm6, DWORD PTR delta[rip]
jne .L878
movzx ebx, BYTE PTR s7_evt0[rip]
or bl, BYTE PTR s7_evt1[rip]
mov r10d, ebx
movzx ebx, BYTE PTR 24[rsp]
or bl, r10b
je .L881
xor r10d, r10d
jmp .L95
.L2182:
movzx ebx, BYTE PTR s7_evt0[rip]
mov BYTE PTR 24[rsp], bl
test bl, bl
je .L870
.L3623:
cmp BYTE PTR s7_evt1[rip], 0
mov BYTE PTR 24[rsp], 0
jne .L865
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s7_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L870
.L865:
test bpl, bpl
je .L870
.L2181:
cmp BYTE PTR _x_s7_l1[rip], 0
jne .L871
cmp BYTE PTR s7_l1[rip], 0
je .L872
test r12b, r12b
jne .L873
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L874
comiss xmm5, DWORD PTR delta[rip]
jne .L874
movzx ebx, BYTE PTR s7_evt0[rip]
or bl, BYTE PTR s7_evt1[rip]
or BYTE PTR 24[rsp], bl
je .L875
xor r10d, r10d
jmp .L95
.L867:
test bl, bl
je .L2180
mov BYTE PTR 24[rsp], bl
jmp .L2181
.L874:
test r11b, r11b
je .L878
.L1820:
test bpl, bpl
jne .L1819
.L878:
cmp BYTE PTR 24[rsp], 0
jne .L882
.L2715:
cmp BYTE PTR s7_evt0[rip], 0
je .L881
movzx ebx, BYTE PTR s7_evt1[rip]
mov BYTE PTR 24[rsp], bl
test bl, bl
je .L883
.L881:
test bpl, bpl
jne .L6716
mov BYTE PTR 24[rsp], 0
.L883:
cmp BYTE PTR _x_s7_l1[rip], 0
movzx ebx, BYTE PTR 7[rsp]
sete r10b
or bl, r10b
jne .L886
test r15b, r15b
je .L6717
.L886:
cmp BYTE PTR _x_s6_evt2[rip], 0
jne .L887
cmp BYTE PTR _x_s6_evt0[rip], 0
je .L888
xor r10d, r10d
cmp BYTE PTR _x_s6_evt1[rip], 0
jne .L95
.L888:
movzx ebp, BYTE PTR _x_s6_l0[rip]
test bpl, bpl
jne .L889
.L1818:
movss xmm6, DWORD PTR _x_s6_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s6_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s6_x[rip]
comiss xmm4, xmm5
jnb .L891
cmp BYTE PTR _x_s6_l1[rip], 0
je .L891
test bpl, bpl
je .L95
.L891:
movzx r12d, BYTE PTR s6_l0[rip]
test r12b, r12b
sete r15b
test bpl, bpl
setne BYTE PTR 7[rsp]
movzx ebx, BYTE PTR 7[rsp]
cmp r15b, bl
je .L893
cmp BYTE PTR s6_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s6_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L893
ucomiss xmm4, DWORD PTR s6_lambda[rip]
jp .L893
jne .L893
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s6_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L893
jne .L893
ucomiss xmm6, DWORD PTR s6_backoff[rip]
jp .L893
movzx ebx, BYTE PTR s6_evt2[rip]
jne .L893
.L896:
test bpl, bpl
je .L899
cmp BYTE PTR _x_s6_l1[rip], 0
jne .L900
.L899:
ucomiss xmm6, DWORD PTR s6_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L900
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L901
.L900:
mov r11d, r12d
or r11b, BYTE PTR s6_l1[rip]
jne .L901
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L901
comiss xmm7, DWORD PTR delta[rip]
jne .L901
or bl, BYTE PTR s6_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s6_evt1[rip]
je .L903
xor r10d, r10d
jmp .L95
.L901:
test bl, bl
jne .L904
cmp BYTE PTR s6_evt0[rip], 0
je .L903
cmp BYTE PTR s6_evt1[rip], 0
jne .L903
movss xmm3, DWORD PTR s6_lambda[rip]
ucomiss xmm4, xmm3
jp .L903
jne .L903
cmp BYTE PTR _x_s6_l1[rip], 0
jne .L6718
.L2168:
movzx ebx, BYTE PTR s6_evt0[rip]
test bl, bl
je .L918
movzx ebx, BYTE PTR s6_evt1[rip]
test bl, bl
je .L919
xor ebx, ebx
.L918:
test bpl, bpl
je .L919
.L2167:
mov r11d, r12d
or r11b, BYTE PTR _x_s6_l1[rip]
je .L6719
.L919:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
jne .L6720
.L921:
cmp BYTE PTR s6_l1[rip], 0
je .L922
test r12b, r12b
je .L6721
.L922:
movss xmm4, DWORD PTR s6_x[rip]
comiss xmm4, xmm3
jnb .L6722
.L924:
test bpl, bpl
jne .L928
.L3095:
mov r10d, r12d
or r10b, BYTE PTR _x_s6_l1[rip]
jne .L929
cmp BYTE PTR s6_l1[rip], 0
jne .L6723
.L929:
test bl, bl
je .L2161
mov BYTE PTR 25[rsp], bl
.L931:
test r11b, r11b
je .L937
.L2697:
cmp BYTE PTR _x_s6_l1[rip], 0
je .L938
.L2159:
test bpl, bpl
jne .L937
.L1808:
ucomiss xmm6, DWORD PTR s6_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L937
test r13b, r13b
jne .L939
.L937:
test r12b, r12b
je .L939
cmp BYTE PTR s6_l1[rip], 0
jne .L939
.L2695:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L939
comiss xmm6, DWORD PTR delta[rip]
jne .L939
movzx ebx, BYTE PTR s6_evt0[rip]
or bl, BYTE PTR s6_evt1[rip]
mov r10d, ebx
movzx ebx, BYTE PTR 25[rsp]
or bl, r10b
je .L942
xor r10d, r10d
jmp .L95
.L2161:
movzx ebx, BYTE PTR s6_evt0[rip]
mov BYTE PTR 25[rsp], bl
test bl, bl
je .L931
.L3620:
cmp BYTE PTR s6_evt1[rip], 0
mov BYTE PTR 25[rsp], 0
jne .L926
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s6_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L931
.L926:
test bpl, bpl
je .L931
.L2163:
cmp BYTE PTR _x_s6_l1[rip], 0
jne .L932
cmp BYTE PTR s6_l1[rip], 0
je .L933
test r12b, r12b
jne .L934
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L935
comiss xmm5, DWORD PTR delta[rip]
jne .L935
movzx ebx, BYTE PTR s6_evt0[rip]
or bl, BYTE PTR s6_evt1[rip]
or BYTE PTR 25[rsp], bl
je .L936
xor r10d, r10d
jmp .L95
.L936:
test r11b, r11b
je .L2696
.L1809:
test bpl, bpl
jne .L1808
.L939:
cmp BYTE PTR 25[rsp], 0
jne .L943
.L2696:
cmp BYTE PTR s6_evt0[rip], 0
je .L942
movzx ebx, BYTE PTR s6_evt1[rip]
mov BYTE PTR 25[rsp], bl
test bl, bl
je .L944
.L942:
test bpl, bpl
jne .L6724
mov BYTE PTR 25[rsp], 0
.L944:
cmp BYTE PTR _x_s6_l1[rip], 0
movzx ebx, BYTE PTR 7[rsp]
sete r10b
or bl, r10b
jne .L947
test r15b, r15b
je .L6725
.L947:
cmp BYTE PTR _x_s5_evt2[rip], 0
jne .L948
cmp BYTE PTR _x_s5_evt0[rip], 0
je .L949
xor r10d, r10d
cmp BYTE PTR _x_s5_evt1[rip], 0
jne .L95
.L949:
movzx ebp, BYTE PTR _x_s5_l0[rip]
test bpl, bpl
jne .L950
.L1807:
movss xmm6, DWORD PTR _x_s5_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s5_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s5_x[rip]
comiss xmm4, xmm5
jnb .L952
cmp BYTE PTR _x_s5_l1[rip], 0
je .L952
test bpl, bpl
je .L95
.L952:
movzx r12d, BYTE PTR s5_l0[rip]
test r12b, r12b
sete r15b
test bpl, bpl
setne BYTE PTR 7[rsp]
movzx ebx, BYTE PTR 7[rsp]
cmp r15b, bl
je .L954
cmp BYTE PTR s5_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s5_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L954
ucomiss xmm4, DWORD PTR s5_lambda[rip]
jp .L954
jne .L954
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s5_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L954
jne .L954
ucomiss xmm6, DWORD PTR s5_backoff[rip]
jp .L954
movzx ebx, BYTE PTR s5_evt2[rip]
jne .L954
.L957:
test bpl, bpl
je .L960
cmp BYTE PTR _x_s5_l1[rip], 0
jne .L961
.L960:
ucomiss xmm6, DWORD PTR s5_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L961
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L962
.L961:
mov r11d, r12d
or r11b, BYTE PTR s5_l1[rip]
jne .L962
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L962
comiss xmm7, DWORD PTR delta[rip]
jne .L962
or bl, BYTE PTR s5_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s5_evt1[rip]
je .L964
xor r10d, r10d
jmp .L95
.L962:
test bl, bl
jne .L965
cmp BYTE PTR s5_evt0[rip], 0
je .L964
cmp BYTE PTR s5_evt1[rip], 0
jne .L964
movss xmm3, DWORD PTR s5_lambda[rip]
ucomiss xmm4, xmm3
jp .L964
jne .L964
cmp BYTE PTR _x_s5_l1[rip], 0
jne .L6726
.L2149:
movzx ebx, BYTE PTR s5_evt0[rip]
test bl, bl
je .L979
movzx ebx, BYTE PTR s5_evt1[rip]
test bl, bl
je .L980
xor ebx, ebx
.L979:
test bpl, bpl
je .L980
.L2148:
mov r11d, r12d
or r11b, BYTE PTR _x_s5_l1[rip]
je .L6727
.L980:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
jne .L6728
.L982:
cmp BYTE PTR s5_l1[rip], 0
je .L983
test r12b, r12b
je .L6729
.L983:
movss xmm4, DWORD PTR s5_x[rip]
comiss xmm4, xmm3
jnb .L6730
.L985:
test bpl, bpl
jne .L989
.L3088:
mov r10d, r12d
or r10b, BYTE PTR _x_s5_l1[rip]
jne .L990
cmp BYTE PTR s5_l1[rip], 0
jne .L6731
.L990:
test bl, bl
je .L2144
mov BYTE PTR 26[rsp], bl
.L992:
test r11b, r11b
je .L998
.L2678:
cmp BYTE PTR _x_s5_l1[rip], 0
je .L999
.L2140:
test bpl, bpl
jne .L998
.L1797:
ucomiss xmm6, DWORD PTR s5_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L998
test r13b, r13b
jne .L1000
.L998:
test r12b, r12b
je .L1000
cmp BYTE PTR s5_l1[rip], 0
jne .L1000
.L2676:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L1000
comiss xmm6, DWORD PTR delta[rip]
jne .L1000
movzx ebx, BYTE PTR s5_evt0[rip]
or bl, BYTE PTR s5_evt1[rip]
mov r10d, ebx
movzx ebx, BYTE PTR 26[rsp]
or bl, r10b
je .L1003
xor r10d, r10d
jmp .L95
.L2144:
movzx ebx, BYTE PTR s5_evt0[rip]
mov BYTE PTR 26[rsp], bl
test bl, bl
je .L992
.L3617:
cmp BYTE PTR s5_evt1[rip], 0
mov BYTE PTR 26[rsp], 0
jne .L987
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s5_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L992
.L987:
test bpl, bpl
je .L992
.L2143:
cmp BYTE PTR _x_s5_l1[rip], 0
jne .L993
cmp BYTE PTR s5_l1[rip], 0
je .L994
test r12b, r12b
jne .L995
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L996
comiss xmm5, DWORD PTR delta[rip]
jne .L996
movzx ebx, BYTE PTR s5_evt0[rip]
or bl, BYTE PTR s5_evt1[rip]
or BYTE PTR 26[rsp], bl
je .L997
xor r10d, r10d
jmp .L95
.L6938:
test r12b, r12b
jne .L2676
.L1000:
cmp BYTE PTR 26[rsp], 0
jne .L1004
.L2677:
cmp BYTE PTR s5_evt0[rip], 0
je .L1003
movzx ebx, BYTE PTR s5_evt1[rip]
mov BYTE PTR 26[rsp], bl
test bl, bl
je .L1005
.L1003:
test bpl, bpl
jne .L6732
mov BYTE PTR 26[rsp], 0
.L1005:
cmp BYTE PTR _x_s5_l1[rip], 0
movzx ebx, BYTE PTR 7[rsp]
sete r10b
or bl, r10b
jne .L1008
test r15b, r15b
je .L6733
.L1008:
cmp BYTE PTR _x_s4_evt2[rip], 0
jne .L1009
cmp BYTE PTR _x_s4_evt0[rip], 0
je .L1010
xor r10d, r10d
cmp BYTE PTR _x_s4_evt1[rip], 0
jne .L95
.L1010:
movzx ebp, BYTE PTR _x_s4_l0[rip]
test bpl, bpl
jne .L1011
.L1796:
movss xmm6, DWORD PTR _x_s4_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s4_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s4_x[rip]
comiss xmm4, xmm5
jnb .L1013
cmp BYTE PTR _x_s4_l1[rip], 0
je .L1013
test bpl, bpl
je .L95
.L1013:
movzx r12d, BYTE PTR s4_l0[rip]
test r12b, r12b
sete r15b
test bpl, bpl
setne BYTE PTR 7[rsp]
movzx ebx, BYTE PTR 7[rsp]
cmp r15b, bl
je .L1015
cmp BYTE PTR s4_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s4_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L1015
ucomiss xmm4, DWORD PTR s4_lambda[rip]
jp .L1015
jne .L1015
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s4_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L1015
jne .L1015
ucomiss xmm6, DWORD PTR s4_backoff[rip]
jp .L1015
movzx ebx, BYTE PTR s4_evt2[rip]
jne .L1015
.L1018:
test bpl, bpl
je .L1021
cmp BYTE PTR _x_s4_l1[rip], 0
jne .L1022
.L1021:
ucomiss xmm6, DWORD PTR s4_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L1022
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L1023
.L1022:
mov r11d, r12d
or r11b, BYTE PTR s4_l1[rip]
jne .L1023
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1023
comiss xmm7, DWORD PTR delta[rip]
jne .L1023
or bl, BYTE PTR s4_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s4_evt1[rip]
je .L1025
xor r10d, r10d
jmp .L95
.L1023:
test bl, bl
jne .L1026
cmp BYTE PTR s4_evt0[rip], 0
je .L1025
cmp BYTE PTR s4_evt1[rip], 0
jne .L1025
movss xmm3, DWORD PTR s4_lambda[rip]
ucomiss xmm4, xmm3
jp .L1025
jne .L1025
cmp BYTE PTR _x_s4_l1[rip], 0
jne .L6734
.L2130:
movzx ebx, BYTE PTR s4_evt0[rip]
test bl, bl
je .L1040
movzx ebx, BYTE PTR s4_evt1[rip]
test bl, bl
je .L1041
xor ebx, ebx
.L1040:
test bpl, bpl
je .L1041
.L2129:
mov r11d, r12d
or r11b, BYTE PTR _x_s4_l1[rip]
je .L6735
.L1041:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
jne .L6736
.L1043:
cmp BYTE PTR s4_l1[rip], 0
je .L1044
test r12b, r12b
je .L6737
.L1044:
movss xmm4, DWORD PTR s4_x[rip]
comiss xmm4, xmm3
jnb .L6738
.L1046:
test bpl, bpl
jne .L1050
.L3081:
mov r10d, r12d
or r10b, BYTE PTR _x_s4_l1[rip]
jne .L1051
cmp BYTE PTR s4_l1[rip], 0
jne .L6739
.L1051:
test bl, bl
je .L2125
mov BYTE PTR 27[rsp], bl
.L1053:
test r11b, r11b
je .L1059
.L2659:
cmp BYTE PTR _x_s4_l1[rip], 0
je .L1060
.L2121:
test bpl, bpl
jne .L1059
.L1786:
ucomiss xmm6, DWORD PTR s4_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L1059
test r13b, r13b
jne .L1061
.L1059:
test r12b, r12b
je .L1061
cmp BYTE PTR s4_l1[rip], 0
jne .L1061
.L2657:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L1061
comiss xmm6, DWORD PTR delta[rip]
jne .L1061
movzx ebx, BYTE PTR s4_evt0[rip]
or bl, BYTE PTR s4_evt1[rip]
mov r10d, ebx
movzx ebx, BYTE PTR 27[rsp]
or bl, r10b
je .L1064
xor r10d, r10d
jmp .L95
.L2125:
movzx ebx, BYTE PTR s4_evt0[rip]
mov BYTE PTR 27[rsp], bl
test bl, bl
je .L1053
.L3614:
cmp BYTE PTR s4_evt1[rip], 0
mov BYTE PTR 27[rsp], 0
jne .L1048
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s4_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L1053
.L1048:
test bpl, bpl
je .L1053
.L2124:
cmp BYTE PTR _x_s4_l1[rip], 0
jne .L1054
cmp BYTE PTR s4_l1[rip], 0
je .L1055
test r12b, r12b
jne .L1056
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L1057
comiss xmm5, DWORD PTR delta[rip]
jne .L1057
movzx ebx, BYTE PTR s4_evt0[rip]
or bl, BYTE PTR s4_evt1[rip]
or BYTE PTR 27[rsp], bl
je .L1058
xor r10d, r10d
jmp .L95
.L1055:
test r11b, r11b
jne .L1060
test r12b, r12b
jne .L2657
.L1061:
cmp BYTE PTR 27[rsp], 0
jne .L1065
.L2658:
cmp BYTE PTR s4_evt0[rip], 0
je .L1064
movzx ebx, BYTE PTR s4_evt1[rip]
mov BYTE PTR 27[rsp], bl
test bl, bl
je .L1066
.L1064:
test bpl, bpl
jne .L6740
mov BYTE PTR 27[rsp], 0
.L1066:
cmp BYTE PTR _x_s4_l1[rip], 0
movzx ebx, BYTE PTR 7[rsp]
sete r10b
or bl, r10b
jne .L1069
test r15b, r15b
je .L6741
.L1069:
cmp BYTE PTR _x_s3_evt2[rip], 0
jne .L1070
cmp BYTE PTR _x_s3_evt0[rip], 0
je .L1071
xor r10d, r10d
cmp BYTE PTR _x_s3_evt1[rip], 0
jne .L95
.L1071:
movzx ebp, BYTE PTR _x_s3_l0[rip]
test bpl, bpl
jne .L1072
.L1785:
movss xmm6, DWORD PTR _x_s3_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s3_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s3_x[rip]
comiss xmm4, xmm5
jnb .L1074
cmp BYTE PTR _x_s3_l1[rip], 0
je .L1074
test bpl, bpl
je .L95
.L1074:
movzx r12d, BYTE PTR s3_l0[rip]
test r12b, r12b
sete r15b
test bpl, bpl
setne BYTE PTR 7[rsp]
movzx ebx, BYTE PTR 7[rsp]
cmp r15b, bl
je .L1076
cmp BYTE PTR s3_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s3_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L1076
ucomiss xmm4, DWORD PTR s3_lambda[rip]
jp .L1076
jne .L1076
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s3_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L1076
jne .L1076
ucomiss xmm6, DWORD PTR s3_backoff[rip]
jp .L1076
movzx ebx, BYTE PTR s3_evt2[rip]
jne .L1076
.L1079:
test bpl, bpl
je .L1082
cmp BYTE PTR _x_s3_l1[rip], 0
jne .L1083
.L1082:
ucomiss xmm6, DWORD PTR s3_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L1083
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L1084
.L1083:
mov r11d, r12d
or r11b, BYTE PTR s3_l1[rip]
jne .L1084
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1084
comiss xmm7, DWORD PTR delta[rip]
jne .L1084
or bl, BYTE PTR s3_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s3_evt1[rip]
je .L1086
xor r10d, r10d
jmp .L95
.L1084:
test bl, bl
jne .L1087
cmp BYTE PTR s3_evt0[rip], 0
je .L1086
cmp BYTE PTR s3_evt1[rip], 0
jne .L1086
movss xmm3, DWORD PTR s3_lambda[rip]
ucomiss xmm4, xmm3
jp .L1086
jne .L1086
cmp BYTE PTR _x_s3_l1[rip], 0
jne .L6742
.L2111:
movzx ebx, BYTE PTR s3_evt0[rip]
test bl, bl
je .L1101
movzx ebx, BYTE PTR s3_evt1[rip]
test bl, bl
je .L1102
xor ebx, ebx
.L1101:
test bpl, bpl
je .L1102
.L2110:
mov r11d, r12d
or r11b, BYTE PTR _x_s3_l1[rip]
je .L6743
.L1102:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
jne .L6744
.L1104:
cmp BYTE PTR s3_l1[rip], 0
je .L1105
test r12b, r12b
je .L6745
.L1105:
movss xmm4, DWORD PTR s3_x[rip]
comiss xmm4, xmm3
jnb .L6746
.L1107:
test bpl, bpl
jne .L1111
.L3074:
mov r10d, r12d
or r10b, BYTE PTR _x_s3_l1[rip]
jne .L1112
cmp BYTE PTR s3_l1[rip], 0
jne .L6747
.L1112:
test bl, bl
je .L2106
mov BYTE PTR 28[rsp], bl
.L1114:
test r11b, r11b
je .L1120
.L2640:
cmp BYTE PTR _x_s3_l1[rip], 0
je .L1121
.L2102:
test bpl, bpl
jne .L1120
.L1775:
ucomiss xmm6, DWORD PTR s3_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L1120
test r13b, r13b
jne .L1122
.L1120:
test r12b, r12b
je .L1122
cmp BYTE PTR s3_l1[rip], 0
jne .L1122
.L2638:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L1122
comiss xmm6, DWORD PTR delta[rip]
jne .L1122
movzx ebx, BYTE PTR s3_evt0[rip]
or bl, BYTE PTR s3_evt1[rip]
mov r10d, ebx
movzx ebx, BYTE PTR 28[rsp]
or bl, r10b
je .L1125
xor r10d, r10d
jmp .L95
.L2106:
movzx ebx, BYTE PTR s3_evt0[rip]
mov BYTE PTR 28[rsp], bl
test bl, bl
je .L1114
.L3611:
cmp BYTE PTR s3_evt1[rip], 0
mov BYTE PTR 28[rsp], 0
jne .L1109
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s3_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L1114
.L1109:
test bpl, bpl
je .L1114
.L2105:
cmp BYTE PTR _x_s3_l1[rip], 0
jne .L1115
cmp BYTE PTR s3_l1[rip], 0
je .L1116
test r12b, r12b
jne .L1117
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L1118
comiss xmm5, DWORD PTR delta[rip]
jne .L1118
movzx ebx, BYTE PTR s3_evt0[rip]
or bl, BYTE PTR s3_evt1[rip]
or BYTE PTR 28[rsp], bl
je .L1119
xor r10d, r10d
jmp .L95
.L1113:
test r11b, r11b
jne .L2640
.L2639:
cmp BYTE PTR s3_evt0[rip], 0
je .L1125
movzx ebx, BYTE PTR s3_evt1[rip]
mov BYTE PTR 28[rsp], bl
test bl, bl
je .L1127
.L1125:
test bpl, bpl
jne .L6748
mov BYTE PTR 28[rsp], 0
.L1127:
cmp BYTE PTR _x_s3_l1[rip], 0
movzx ebx, BYTE PTR 7[rsp]
sete r10b
or bl, r10b
jne .L1130
test r15b, r15b
je .L6749
.L1130:
cmp BYTE PTR _x_s2_evt2[rip], 0
jne .L1131
cmp BYTE PTR _x_s2_evt0[rip], 0
je .L1132
xor r10d, r10d
cmp BYTE PTR _x_s2_evt1[rip], 0
jne .L95
.L1132:
movzx ebp, BYTE PTR _x_s2_l0[rip]
test bpl, bpl
jne .L1133
.L1774:
movss xmm6, DWORD PTR _x_s2_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s2_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s2_x[rip]
comiss xmm4, xmm5
jnb .L1135
cmp BYTE PTR _x_s2_l1[rip], 0
je .L1135
test bpl, bpl
je .L95
.L1135:
movzx r12d, BYTE PTR s2_l0[rip]
test r12b, r12b
sete r15b
test bpl, bpl
setne BYTE PTR 7[rsp]
movzx ebx, BYTE PTR 7[rsp]
cmp r15b, bl
je .L1137
cmp BYTE PTR s2_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s2_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L1137
ucomiss xmm4, DWORD PTR s2_lambda[rip]
jp .L1137
jne .L1137
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s2_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L1137
jne .L1137
ucomiss xmm6, DWORD PTR s2_backoff[rip]
jp .L1137
movzx ebx, BYTE PTR s2_evt2[rip]
jne .L1137
.L1140:
test bpl, bpl
je .L1143
cmp BYTE PTR _x_s2_l1[rip], 0
jne .L1144
.L1143:
ucomiss xmm6, DWORD PTR s2_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L1144
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L1145
.L1144:
mov r11d, r12d
or r11b, BYTE PTR s2_l1[rip]
jne .L1145
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1145
comiss xmm7, DWORD PTR delta[rip]
jne .L1145
or bl, BYTE PTR s2_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s2_evt1[rip]
je .L1147
xor r10d, r10d
jmp .L95
.L1145:
test bl, bl
jne .L1148
cmp BYTE PTR s2_evt0[rip], 0
je .L1147
cmp BYTE PTR s2_evt1[rip], 0
jne .L1147
movss xmm3, DWORD PTR s2_lambda[rip]
ucomiss xmm4, xmm3
jp .L1147
jne .L1147
cmp BYTE PTR _x_s2_l1[rip], 0
jne .L6750
.L2092:
movzx ebx, BYTE PTR s2_evt0[rip]
test bl, bl
je .L1162
movzx ebx, BYTE PTR s2_evt1[rip]
test bl, bl
je .L1163
xor ebx, ebx
.L1162:
test bpl, bpl
je .L1163
.L2091:
mov r11d, r12d
or r11b, BYTE PTR _x_s2_l1[rip]
je .L6751
.L1163:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
jne .L6752
.L1165:
cmp BYTE PTR s2_l1[rip], 0
je .L1166
test r12b, r12b
je .L6753
.L1166:
movss xmm4, DWORD PTR s2_x[rip]
comiss xmm4, xmm3
jnb .L6754
.L1168:
test bpl, bpl
jne .L1172
.L3067:
mov r10d, r12d
or r10b, BYTE PTR _x_s2_l1[rip]
jne .L1173
cmp BYTE PTR s2_l1[rip], 0
jne .L6755
.L1173:
test bl, bl
je .L2087
mov BYTE PTR 29[rsp], bl
.L1175:
test r11b, r11b
je .L1181
.L2621:
cmp BYTE PTR _x_s2_l1[rip], 0
je .L1182
.L2083:
test bpl, bpl
jne .L1181
.L1764:
ucomiss xmm6, DWORD PTR s2_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L1181
test r13b, r13b
jne .L1183
.L1181:
test r12b, r12b
je .L1183
cmp BYTE PTR s2_l1[rip], 0
jne .L1183
.L2619:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L1183
comiss xmm6, DWORD PTR delta[rip]
jne .L1183
movzx ebx, BYTE PTR s2_evt0[rip]
or bl, BYTE PTR s2_evt1[rip]
mov r10d, ebx
movzx ebx, BYTE PTR 29[rsp]
or bl, r10b
je .L1186
xor r10d, r10d
jmp .L95
.L2087:
movzx ebx, BYTE PTR s2_evt0[rip]
mov BYTE PTR 29[rsp], bl
test bl, bl
je .L1175
.L3608:
cmp BYTE PTR s2_evt1[rip], 0
mov BYTE PTR 29[rsp], 0
jne .L1170
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s2_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L1175
.L1170:
test bpl, bpl
je .L1175
.L2086:
cmp BYTE PTR _x_s2_l1[rip], 0
jne .L1176
cmp BYTE PTR s2_l1[rip], 0
je .L1177
test r12b, r12b
jne .L1178
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L1179
comiss xmm5, DWORD PTR delta[rip]
jne .L1179
movzx ebx, BYTE PTR s2_evt0[rip]
or bl, BYTE PTR s2_evt1[rip]
or BYTE PTR 29[rsp], bl
je .L1180
xor r10d, r10d
jmp .L95
.L1172:
test bl, bl
je .L2085
mov BYTE PTR 29[rsp], bl
jmp .L2086
.L1179:
test r11b, r11b
je .L1183
.L1765:
test bpl, bpl
jne .L1764
.L1183:
cmp BYTE PTR 29[rsp], 0
jne .L1187
.L2620:
cmp BYTE PTR s2_evt0[rip], 0
je .L1186
movzx ebx, BYTE PTR s2_evt1[rip]
mov BYTE PTR 29[rsp], bl
test bl, bl
je .L1188
.L1186:
test bpl, bpl
jne .L6756
mov BYTE PTR 29[rsp], 0
.L1188:
cmp BYTE PTR _x_s2_l1[rip], 0
movzx ebx, BYTE PTR 7[rsp]
sete r10b
or bl, r10b
jne .L1191
test r15b, r15b
je .L6757
.L1191:
cmp BYTE PTR _x_s1_evt2[rip], 0
jne .L1192
cmp BYTE PTR _x_s1_evt0[rip], 0
je .L1193
xor r10d, r10d
cmp BYTE PTR _x_s1_evt1[rip], 0
jne .L95
.L1193:
movzx ebp, BYTE PTR _x_s1_l0[rip]
test bpl, bpl
jne .L1194
.L1763:
movss xmm6, DWORD PTR _x_s1_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s1_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s1_x[rip]
comiss xmm4, xmm5
jnb .L1196
cmp BYTE PTR _x_s1_l1[rip], 0
je .L1196
test bpl, bpl
je .L95
.L1196:
movzx r12d, BYTE PTR s1_l0[rip]
test r12b, r12b
sete r15b
test bpl, bpl
setne BYTE PTR 7[rsp]
movzx ebx, BYTE PTR 7[rsp]
cmp r15b, bl
je .L1198
cmp BYTE PTR s1_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s1_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L1198
ucomiss xmm4, DWORD PTR s1_lambda[rip]
jp .L1198
jne .L1198
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s1_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L1198
jne .L1198
ucomiss xmm6, DWORD PTR s1_backoff[rip]
jp .L1198
movzx ebx, BYTE PTR s1_evt2[rip]
jne .L1198
.L1201:
test bpl, bpl
je .L1204
cmp BYTE PTR _x_s1_l1[rip], 0
jne .L1205
.L1204:
ucomiss xmm6, DWORD PTR s1_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L1205
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L1206
.L1205:
mov r11d, r12d
or r11b, BYTE PTR s1_l1[rip]
jne .L1206
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1206
comiss xmm7, DWORD PTR delta[rip]
jne .L1206
or bl, BYTE PTR s1_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s1_evt1[rip]
je .L1208
xor r10d, r10d
jmp .L95
.L1206:
test bl, bl
jne .L1209
cmp BYTE PTR s1_evt0[rip], 0
je .L1208
cmp BYTE PTR s1_evt1[rip], 0
jne .L1208
movss xmm3, DWORD PTR s1_lambda[rip]
ucomiss xmm4, xmm3
jp .L1208
jne .L1208
cmp BYTE PTR _x_s1_l1[rip], 0
jne .L6758
.L2073:
movzx ebx, BYTE PTR s1_evt0[rip]
test bl, bl
je .L1223
movzx ebx, BYTE PTR s1_evt1[rip]
test bl, bl
je .L1224
xor ebx, ebx
.L1223:
test bpl, bpl
je .L1224
.L2072:
mov r11d, r12d
or r11b, BYTE PTR _x_s1_l1[rip]
je .L6759
.L1224:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
jne .L6760
.L1226:
cmp BYTE PTR s1_l1[rip], 0
je .L1227
test r12b, r12b
je .L6761
.L1227:
movss xmm4, DWORD PTR s1_x[rip]
comiss xmm4, xmm3
jnb .L6762
.L1229:
test bpl, bpl
jne .L1233
.L3060:
mov r10d, r12d
or r10b, BYTE PTR _x_s1_l1[rip]
jne .L1234
cmp BYTE PTR s1_l1[rip], 0
jne .L6763
.L1234:
test bl, bl
je .L2066
mov BYTE PTR 22[rsp], bl
.L1236:
test r11b, r11b
je .L1242
.L2602:
cmp BYTE PTR _x_s1_l1[rip], 0
je .L1243
.L2064:
test bpl, bpl
jne .L1242
.L1753:
ucomiss xmm6, DWORD PTR s1_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L1242
test r13b, r13b
jne .L1244
.L1242:
test r12b, r12b
je .L1244
cmp BYTE PTR s1_l1[rip], 0
jne .L1244
.L2600:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L1244
comiss xmm6, DWORD PTR delta[rip]
jne .L1244
movzx ebx, BYTE PTR 22[rsp]
movzx r10d, BYTE PTR s1_evt0[rip]
or r10b, BYTE PTR s1_evt1[rip]
or bl, r10b
je .L1247
xor r10d, r10d
jmp .L95
.L2066:
movzx ebx, BYTE PTR s1_evt0[rip]
mov BYTE PTR 22[rsp], bl
test bl, bl
je .L1236
.L3605:
cmp BYTE PTR s1_evt1[rip], 0
mov BYTE PTR 22[rsp], 0
jne .L1231
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s1_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L1236
.L1231:
test bpl, bpl
je .L1236
.L2068:
cmp BYTE PTR _x_s1_l1[rip], 0
jne .L1237
cmp BYTE PTR s1_l1[rip], 0
je .L1238
test r12b, r12b
jne .L1239
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L1240
comiss xmm5, DWORD PTR delta[rip]
jne .L1240
movzx r10d, BYTE PTR s1_evt0[rip]
or r10b, BYTE PTR s1_evt1[rip]
or BYTE PTR 22[rsp], r10b
je .L1241
xor r10d, r10d
jmp .L95
.L1240:
test r11b, r11b
je .L1244
.L1754:
test bpl, bpl
jne .L1753
.L1244:
cmp BYTE PTR 22[rsp], 0
jne .L1248
.L2601:
cmp BYTE PTR s1_evt0[rip], 0
je .L1247
movzx ebx, BYTE PTR s1_evt1[rip]
mov BYTE PTR 22[rsp], bl
test bl, bl
je .L1249
.L1247:
test bpl, bpl
jne .L6764
mov BYTE PTR 22[rsp], 0
.L1249:
cmp BYTE PTR _x_s1_l1[rip], 0
movzx ebx, BYTE PTR 7[rsp]
sete r10b
or bl, r10b
jne .L1252
test r15b, r15b
je .L6765
.L1252:
cmp BYTE PTR _x_s0_evt2[rip], 0
jne .L1253
cmp BYTE PTR _x_s0_evt0[rip], 0
je .L1254
xor r10d, r10d
cmp BYTE PTR _x_s0_evt1[rip], 0
jne .L95
.L1254:
movzx ebp, BYTE PTR _x_s0_l0[rip]
test bpl, bpl
jne .L1255
.L1752:
movss xmm6, DWORD PTR _x_s0_backoff[rip]
xor r10d, r10d
comiss xmm6, DWORD PTR .LC1[rip]
jb .L95
movss xmm4, DWORD PTR _x_s0_lambda[rip]
pxor xmm5, xmm5
xor r10d, r10d
comiss xmm5, xmm4
jnb .L95
movss xmm5, DWORD PTR _x_s0_x[rip]
comiss xmm4, xmm5
jnb .L1257
cmp BYTE PTR _x_s0_l1[rip], 0
je .L1257
test bpl, bpl
je .L95
.L1257:
movzx r12d, BYTE PTR s0_l0[rip]
test r12b, r12b
sete r15b
test bpl, bpl
setne BYTE PTR 7[rsp]
movzx ebx, BYTE PTR 7[rsp]
cmp r15b, bl
je .L1259
cmp BYTE PTR s0_l1[rip], 0
sete r11b
cmp BYTE PTR _x_s0_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L1259
ucomiss xmm4, DWORD PTR s0_lambda[rip]
jp .L1259
jne .L1259
pxor xmm3, xmm3
pxor xmm7, xmm7
cvtss2sd xmm7, xmm5
cvtss2sd xmm3, DWORD PTR s0_x[rip]
subsd xmm3, xmm7
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR delta[rip]
addsd xmm3, xmm7
ucomisd xmm3, QWORD PTR .LC2[rip]
jp .L1259
jne .L1259
ucomiss xmm6, DWORD PTR s0_backoff[rip]
jp .L1259
movzx ebx, BYTE PTR s0_evt2[rip]
jne .L1259
.L1262:
test bpl, bpl
je .L1265
cmp BYTE PTR _x_s0_l1[rip], 0
jne .L1266
.L1265:
ucomiss xmm6, DWORD PTR s0_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L1266
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L1267
.L1266:
mov r11d, r12d
or r11b, BYTE PTR s0_l1[rip]
jne .L1267
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1267
comiss xmm7, DWORD PTR delta[rip]
jne .L1267
or bl, BYTE PTR s0_evt0[rip]
mov r10d, ebx
or r10b, BYTE PTR s0_evt1[rip]
je .L1269
xor r10d, r10d
jmp .L95
.L1267:
test bl, bl
jne .L1270
cmp BYTE PTR s0_evt0[rip], 0
je .L1269
cmp BYTE PTR s0_evt1[rip], 0
jne .L1269
movss xmm3, DWORD PTR s0_lambda[rip]
ucomiss xmm4, xmm3
jp .L1269
jne .L1269
cmp BYTE PTR _x_s0_l1[rip], 0
jne .L6766
.L2054:
movzx ebx, BYTE PTR s0_evt0[rip]
test bl, bl
je .L1284
movzx ebx, BYTE PTR s0_evt1[rip]
test bl, bl
je .L1285
xor ebx, ebx
.L1284:
test bpl, bpl
je .L1285
.L2053:
mov r11d, r12d
or r11b, BYTE PTR _x_s0_l1[rip]
je .L6767
.L1285:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
jne .L6768
.L1287:
cmp BYTE PTR s0_l1[rip], 0
je .L1288
test r12b, r12b
je .L6769
.L1288:
movss xmm4, DWORD PTR s0_x[rip]
comiss xmm4, xmm3
jnb .L6770
.L1290:
test bpl, bpl
jne .L1294
.L3053:
mov r10d, r12d
or r10b, BYTE PTR _x_s0_l1[rip]
jne .L1295
cmp BYTE PTR s0_l1[rip], 0
jne .L6771
.L1295:
test bl, bl
je .L2049
mov BYTE PTR 30[rsp], bl
.L1297:
test r11b, r11b
je .L1303
.L2583:
cmp BYTE PTR _x_s0_l1[rip], 0
je .L1304
.L2045:
test bpl, bpl
jne .L1303
.L1742:
ucomiss xmm6, DWORD PTR s0_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L1303
test r13b, r13b
jne .L1305
.L1303:
test r12b, r12b
je .L1305
cmp BYTE PTR s0_l1[rip], 0
jne .L1305
.L2581:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L1305
comiss xmm6, DWORD PTR delta[rip]
jne .L1305
movzx ebx, BYTE PTR 30[rsp]
movzx r10d, BYTE PTR s0_evt0[rip]
or r10b, BYTE PTR s0_evt1[rip]
or bl, r10b
je .L1308
xor r10d, r10d
jmp .L95
.L2049:
movzx ebx, BYTE PTR s0_evt0[rip]
mov BYTE PTR 30[rsp], bl
test bl, bl
je .L1297
.L3602:
cmp BYTE PTR s0_evt1[rip], 0
mov BYTE PTR 30[rsp], 0
jne .L1292
pxor xmm3, xmm3
pxor xmm5, xmm5
cvtss2sd xmm5, xmm6
cvtss2sd xmm3, DWORD PTR s0_backoff[rip]
subsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm3
jnb .L1297
.L1292:
test bpl, bpl
je .L1297
.L2048:
cmp BYTE PTR _x_s0_l1[rip], 0
jne .L1298
cmp BYTE PTR s0_l1[rip], 0
je .L1299
test r12b, r12b
jne .L1300
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L1301
comiss xmm5, DWORD PTR delta[rip]
jne .L1301
movzx r10d, BYTE PTR s0_evt0[rip]
or r10b, BYTE PTR s0_evt1[rip]
or BYTE PTR 30[rsp], r10b
je .L1302
xor r10d, r10d
jmp .L95
.L1301:
test r11b, r11b
je .L1305
.L1743:
test bpl, bpl
jne .L1742
.L1305:
cmp BYTE PTR 30[rsp], 0
jne .L1309
.L2582:
cmp BYTE PTR s0_evt0[rip], 0
je .L1308
movzx ebx, BYTE PTR s0_evt1[rip]
mov BYTE PTR 30[rsp], bl
test bl, bl
je .L1310
.L1308:
test bpl, bpl
jne .L6772
mov BYTE PTR 30[rsp], 0
.L1310:
cmp BYTE PTR _x_s0_l1[rip], 0
movzx ebx, BYTE PTR 7[rsp]
sete r10b
or bl, r10b
jne .L1313
test r15b, r15b
je .L6773
.L1313:
cmp BYTE PTR _x_bus_evt2[rip], 0
jne .L1314
cmp BYTE PTR _x_bus_evt0[rip], 0
jne .L6774
.L1315:
movzx ebp, BYTE PTR _x_bus_l0[rip]
test bpl, bpl
jne .L1317
movss xmm4, DWORD PTR _x_bus_x[rip]
.L6565:
movss xmm6, DWORD PTR _x_delta[rip]
.L1737:
movss xmm3, DWORD PTR delta[rip]
pxor xmm5, xmm5
pxor xmm7, xmm7
pxor xmm9, xmm9
cvtss2sd xmm9, xmm4
pxor xmm8, xmm8
comiss xmm5, xmm3
movss xmm5, DWORD PTR bus_x[rip]
cvtss2sd xmm8, xmm3
cvtss2sd xmm7, xmm5
subsd xmm7, xmm9
pxor xmm9, xmm9
addsd xmm7, xmm8
jnb .L1318
pxor xmm10, xmm10
ucomisd xmm7, xmm10
jp .L3372
jne .L3372
cmp BYTE PTR bus_l0[rip], 0
sete r11b
test bpl, bpl
setne r10b
cmp r11b, r10b
je .L3373
cmp BYTE PTR bus_l1[rip], 0
sete r11b
cmp BYTE PTR _x_bus_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L3374
mov ebx, DWORD PTR _x_bus_j[rip]
cmp DWORD PTR bus_j[rip], ebx
je .L1320
xor r10d, r10d
jmp .L95
.L6772:
mov BYTE PTR 30[rsp], 0
movzx r10d, BYTE PTR _x_s0_l1[rip]
test r12b, r12b
je .L1313
or r10b, BYTE PTR s0_l1[rip]
mov BYTE PTR 30[rsp], r10b
je .L3052
mov BYTE PTR 30[rsp], 0
jmp .L1313
.L1318:
pxor xmm11, xmm11
ucomisd xmm7, xmm11
jp .L1321
jne .L1321
cmp BYTE PTR bus_l0[rip], 0
sete r11b
test bpl, bpl
setne r10b
cmp r11b, r10b
je .L1321
.L1320:
cmp BYTE PTR bus_l1[rip], 0
sete r11b
cmp BYTE PTR _x_bus_l1[rip], 0
setne r10b
cmp r11b, r10b
je .L1321
mov ebx, DWORD PTR _x_bus_j[rip]
cmp DWORD PTR bus_j[rip], ebx
je .L1323
.L1321:
movzx ebx, BYTE PTR bus_evt2[rip]
mov BYTE PTR 7[rsp], bl
test bl, bl
jne .L1324
movzx r10d, BYTE PTR bus_evt0[rip]
or r10b, BYTE PTR bus_evt1[rip]
jne .L1325
xor r10d, r10d
jmp .L95
.L1323:
movzx ebx, BYTE PTR bus_evt2[rip]
mov BYTE PTR 7[rsp], bl
test bl, bl
je .L1326
.L1324:
movzx r10d, BYTE PTR bus_evt0[rip]
or r10d, ebp
or r10b, BYTE PTR bus_evt1[rip]
jne .L1327
cmp BYTE PTR _x_bus_l1[rip], 0
jne .L6775
.L1327:
pxor xmm7, xmm7
movzx r15d, BYTE PTR bus_l0[rip]
movzx r13d, BYTE PTR bus_l1[rip]
mov r10d, 1
ucomiss xmm3, xmm7
mov ebx, r15d
setp r11b
cmovne r11d, r10d
or bl, r13b
jne .L1330
test r11b, r11b
je .L2576
.L1330:
mov r10d, DWORD PTR bus_j[rip]
mov ebx, DWORD PTR _x_bus_j[rip]
cmp r10d, ebx
je .L2038
mov r12d, ebx
mov ebx, r10d
.L1332:
test r13b, r13b
je .L1333
test r15b, r15b
jne .L1333
test r11b, r11b
je .L6776
.L1333:
cmp BYTE PTR 7[rsp], 0
jne .L1328
.L2039:
cmp BYTE PTR bus_evt1[rip], 0
je .L1335
cmp BYTE PTR bus_evt0[rip], 0
jne .L1335
pxor xmm7, xmm7
mov r11d, 0
ucomiss xmm4, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L1336
.L1335:
pxor xmm7, xmm7
ucomiss xmm3, xmm7
jp .L3380
comiss xmm3, xmm7
jne .L3380
movzx r10d, BYTE PTR bus_evt0[rip]
.L1334:
or r10b, BYTE PTR bus_evt1[rip]
jne .L6777
.L1336:
pxor xmm7, xmm7
ucomiss xmm3, xmm7
jp .L3380
comiss xmm3, xmm7
je .L6197
.L3380:
mov BYTE PTR 7[rsp], 0
.L1346:
test bpl, bpl
je .L1353
.L2030:
cmp BYTE PTR _x_bus_l1[rip], 0
je .L1353
comiss xmm5, DWORD PTR .LC1[rip]
jnb .L1353
.L2571:
cmp BYTE PTR bus_evt0[rip], 0
je .L1353
movzx r10d, BYTE PTR 7[rsp]
or r10b, BYTE PTR bus_evt1[rip]
jne .L1353
cmp DWORD PTR bus_cd_id[rip], ebx
jne .L3383
pxor xmm5, xmm5
ucomiss xmm4, xmm5
setnp r11b
cmove r10d, r11d
test r10b, r10b
jne .L6778
.L3383:
mov BYTE PTR 7[rsp], 0
.L1353:
cmp BYTE PTR bus_l0[rip], 0
je .L1351
cmp BYTE PTR bus_l1[rip], 0
jne .L1351
pxor xmm5, xmm5
mov r11d, 1
ucomiss xmm3, xmm5
setp r10b
cmovne r10d, r11d
test r10b, r10b
je .L2570
.L1351:
mov r10d, ebx
sub r10d, r12d
add r10d, 1
je .L6779
pxor xmm5, xmm5
ucomiss xmm3, xmm5
jp .L1363
comiss xmm3, xmm5
jne .L1363
cmp BYTE PTR 7[rsp], 0
jne .L1364
.L2566:
cmp BYTE PTR bus_evt0[rip], 0
jne .L1365
movzx r15d, BYTE PTR bus_evt1[rip]
mov BYTE PTR 7[rsp], r15b
test r15b, r15b
jne .L6780
.L1366:
pxor xmm4, xmm4
xor r10d, r10d
comiss xmm6, xmm4
jb .L95
movzx r15d, BYTE PTR s0_evt1[rip]
movzx ebx, BYTE PTR s0_evt0[rip]
mov BYTE PTR 61[rsp], r15b
mov BYTE PTR 60[rsp], bl
or ebx, r15d
movzx r15d, BYTE PTR 30[rsp]
mov BYTE PTR 31[rsp], bl
or r15b, bl
je .L1373
movzx r10d, BYTE PTR s1_evt0[rip]
or r10b, BYTE PTR s1_evt1[rip]
or r10b, BYTE PTR s2_evt0[rip]
or r10b, BYTE PTR s2_evt1[rip]
or r10b, BYTE PTR s3_evt0[rip]
or r10b, BYTE PTR s3_evt1[rip]
or r10b, BYTE PTR s4_evt0[rip]
or r10b, BYTE PTR s4_evt1[rip]
or r10b, BYTE PTR s5_evt0[rip]
or r10b, BYTE PTR s5_evt1[rip]
or r10b, BYTE PTR s6_evt0[rip]
or r10b, BYTE PTR s6_evt1[rip]
or r10b, BYTE PTR s7_evt0[rip]
or r10b, BYTE PTR s7_evt1[rip]
or r10b, BYTE PTR s8_evt0[rip]
or r10b, BYTE PTR s8_evt1[rip]
or r10b, BYTE PTR s9_evt0[rip]
or r10b, BYTE PTR s9_evt1[rip]
or r10b, BYTE PTR s10_evt0[rip]
or r10b, BYTE PTR s10_evt1[rip]
or r10b, BYTE PTR s11_evt0[rip]
or r10b, BYTE PTR s11_evt1[rip]
or r10b, BYTE PTR s12_evt0[rip]
or r10b, BYTE PTR s12_evt1[rip]
or r10b, BYTE PTR s13_evt0[rip]
or r10b, BYTE PTR s13_evt1[rip]
or r10b, BYTE PTR s14_evt0[rip]
or r10b, BYTE PTR s14_evt1[rip]
or r10b, BYTE PTR s15_evt0[rip]
or r10b, BYTE PTR s15_evt1[rip]
or r10b, BYTE PTR s16_evt0[rip]
or r10b, BYTE PTR s16_evt1[rip]
or r10b, BYTE PTR s17_evt0[rip]
or r10b, BYTE PTR s17_evt1[rip]
or r10b, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR s19_evt0[rip]
or r10b, BYTE PTR s19_evt1[rip]
or r10d, r14d
or r10d, DWORD PTR 8[rsp]
or r10b, BYTE PTR 9[rsp]
or r10b, BYTE PTR 10[rsp]
or r10b, BYTE PTR 11[rsp]
or r10d, DWORD PTR 12[rsp]
or r10b, BYTE PTR 13[rsp]
or r10b, BYTE PTR 14[rsp]
or r10b, BYTE PTR 15[rsp]
or r10d, DWORD PTR 20[rsp]
or r10b, BYTE PTR 21[rsp]
or r10b, BYTE PTR 23[rsp]
or r10d, DWORD PTR 24[rsp]
or r10b, BYTE PTR 25[rsp]
or r10b, BYTE PTR 26[rsp]
or r10b, BYTE PTR 27[rsp]
or r10d, DWORD PTR 28[rsp]
or r10b, BYTE PTR 29[rsp]
or r10b, BYTE PTR 22[rsp]
jne .L1375
.L1374:
cmp BYTE PTR s1_evt1[rip], 0
jne .L1376
movzx ebx, BYTE PTR s3_evt0[rip]
mov BYTE PTR 39[rsp], bl
movzx ebx, BYTE PTR s2_evt0[rip]
mov BYTE PTR 43[rsp], bl
.L1377:
movzx ebx, BYTE PTR s2_evt1[rip]
mov r15d, ebx
mov BYTE PTR 45[rsp], bl
movzx ebx, BYTE PTR 43[rsp]
or ebx, r15d
movzx r15d, BYTE PTR 29[rsp]
mov BYTE PTR 16[rsp], bl
or r15b, bl
jne .L6202
movzx ebx, BYTE PTR s4_evt0[rip]
mov BYTE PTR 32[rsp], bl
.L1395:
movzx ebx, BYTE PTR s3_evt1[rip]
mov r15d, ebx
mov BYTE PTR 46[rsp], bl
movzx ebx, BYTE PTR 39[rsp]
or ebx, r15d
movzx r15d, BYTE PTR 28[rsp]
mov BYTE PTR 79[rsp], bl
or r15b, bl
jne .L6217
movzx ebx, BYTE PTR s5_evt0[rip]
mov BYTE PTR 33[rsp], bl
.L1425:
movzx ebx, BYTE PTR s4_evt1[rip]
mov r15d, ebx
mov BYTE PTR 44[rsp], bl
movzx ebx, BYTE PTR 32[rsp]
or ebx, r15d
mov BYTE PTR 62[rsp], bl
or bl, BYTE PTR 27[rsp]
jne .L6231
movzx ebx, BYTE PTR s6_evt0[rip]
mov BYTE PTR 41[rsp], bl
.L1453:
movzx ebx, BYTE PTR s5_evt1[rip]
mov r15d, ebx
mov BYTE PTR 47[rsp], bl
movzx ebx, BYTE PTR 33[rsp]
or ebx, r15d
mov BYTE PTR 63[rsp], bl
or bl, BYTE PTR 26[rsp]
jne .L6233
movzx ebx, BYTE PTR s7_evt0[rip]
mov BYTE PTR 40[rsp], bl
.L1467:
movzx ebx, BYTE PTR s6_evt1[rip]
mov r15d, ebx
mov BYTE PTR 48[rsp], bl
movzx ebx, BYTE PTR 41[rsp]
or ebx, r15d
mov BYTE PTR 73[rsp], bl
or bl, BYTE PTR 25[rsp]
jne .L6235
movzx ebx, BYTE PTR s8_evt0[rip]
mov BYTE PTR 37[rsp], bl
.L1481:
movzx ebx, BYTE PTR s7_evt1[rip]
mov r15d, ebx
mov BYTE PTR 49[rsp], bl
movzx ebx, BYTE PTR 40[rsp]
or ebx, r15d
mov BYTE PTR 74[rsp], bl
or bl, BYTE PTR 24[rsp]
jne .L6237
movzx ebx, BYTE PTR s9_evt0[rip]
mov BYTE PTR 34[rsp], bl
.L1493:
movzx ebx, BYTE PTR s8_evt1[rip]
mov r15d, ebx
mov BYTE PTR 50[rsp], bl
movzx ebx, BYTE PTR 37[rsp]
or ebx, r15d
mov BYTE PTR 75[rsp], bl
or bl, BYTE PTR 23[rsp]
jne .L6239
movzx ebx, BYTE PTR s10_evt0[rip]
mov BYTE PTR 38[rsp], bl
.L1505:
movzx ebx, BYTE PTR s9_evt1[rip]
mov r15d, ebx
mov BYTE PTR 51[rsp], bl
movzx ebx, BYTE PTR 34[rsp]
or ebx, r15d
mov BYTE PTR 78[rsp], bl
or bl, BYTE PTR 21[rsp]
jne .L6241
movzx ebx, BYTE PTR s11_evt0[rip]
mov BYTE PTR 35[rsp], bl
.L1515:
movzx ebx, BYTE PTR s10_evt1[rip]
mov r15d, ebx
mov BYTE PTR 52[rsp], bl
movzx ebx, BYTE PTR 38[rsp]
or ebx, r15d
mov BYTE PTR 69[rsp], bl
or bl, BYTE PTR 20[rsp]
jne .L6243
movzx ebx, BYTE PTR s12_evt0[rip]
mov BYTE PTR 42[rsp], bl
.L1525:
movzx ebx, BYTE PTR s11_evt1[rip]
mov r15d, ebx
mov BYTE PTR 53[rsp], bl
movzx ebx, BYTE PTR 35[rsp]
or ebx, r15d
movzx r15d, BYTE PTR 15[rsp]
mov BYTE PTR 77[rsp], bl
or r15b, bl
jne .L6245
movzx r15d, BYTE PTR s13_evt0[rip]
.L1533:
movzx ebx, BYTE PTR s12_evt1[rip]
mov r11d, ebx
mov BYTE PTR 57[rsp], bl
movzx ebx, BYTE PTR 42[rsp]
or ebx, r11d
movzx r11d, BYTE PTR 14[rsp]
mov BYTE PTR 64[rsp], bl
or r11b, bl
jne .L6247
movzx r12d, BYTE PTR s14_evt0[rip]
.L1541:
movzx ebx, BYTE PTR s13_evt1[rip]
movzx r11d, BYTE PTR 13[rsp]
mov BYTE PTR 54[rsp], bl
or ebx, r15d
or r11b, bl
mov BYTE PTR 72[rsp], bl
jne .L6249
movzx ebx, BYTE PTR s15_evt0[rip]
mov BYTE PTR 36[rsp], bl
.L1547:
movzx ebx, BYTE PTR s14_evt1[rip]
movzx r11d, BYTE PTR 12[rsp]
mov BYTE PTR 58[rsp], bl
or ebx, r12d
or r11b, bl
mov BYTE PTR 71[rsp], bl
jne .L6251
movzx ebx, BYTE PTR s16_evt0[rip]
.L1553:
movzx r11d, BYTE PTR s15_evt1[rip]
movzx r10d, BYTE PTR 11[rsp]
mov BYTE PTR 55[rsp], r11b
or r11d, DWORD PTR 36[rsp]
or r10b, r11b
mov BYTE PTR 76[rsp], r11b
jne .L6253
movzx r11d, BYTE PTR s17_evt0[rip]
.L1557:
movzx r13d, BYTE PTR s16_evt1[rip]
mov r10d, r13d
mov BYTE PTR 59[rsp], r13b
mov ebp, r13d
movzx r13d, BYTE PTR 10[rsp]
or r10d, ebx
or r13b, r10b
mov BYTE PTR 70[rsp], r10b
je .L1561
movzx r10d, BYTE PTR s17_evt1[rip]
or r10d, r11d
or r10b, BYTE PTR 9[rsp]
jne .L1375
movzx r13d, BYTE PTR 10[rsp]
or r13b, bl
jne .L6571
test bpl, bpl
je .L1561
.L6571:
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
jne .L1375
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
jne .L1375
.L1561:
movzx r10d, BYTE PTR s17_evt1[rip]
movzx r13d, BYTE PTR 9[rsp]
mov BYTE PTR 56[rsp], r10b
or r10d, r11d
or r13b, r10b
mov BYTE PTR 68[rsp], r10b
je .L1563
movzx r10d, BYTE PTR s18_evt0[rip]
movzx r13d, BYTE PTR s18_evt1[rip]
or r13d, r10d
mov ebp, r13d
or bpl, BYTE PTR 8[rsp]
jne .L1375
movzx r13d, BYTE PTR 9[rsp]
or r13b, r11b
jne .L1565
cmp BYTE PTR 56[rsp], 0
jne .L1565
.L2475:
or r10b, BYTE PTR s18_evt1[rip]
je .L1567
.L1566:
test r14b, r14b
jne .L1375
movzx r13d, BYTE PTR s19_evt0[rip]
.L2474:
or r13b, BYTE PTR s19_evt1[rip]
je .L1568
.L1375:
pxor xmm6, xmm6
ucomiss xmm3, xmm6
jp .L1569
xor r10d, r10d
comiss xmm3, xmm6
je .L95
.L1569:
movss xmm4, DWORD PTR _x__diverge_delta[rip]
movss xmm5, DWORD PTR .LC4[rip]
ucomiss xmm3, xmm4
movss xmm3, DWORD PTR _diverge_delta[rip]
jp .L3855
jne .L3855
.L1718:
comiss xmm3, xmm5
mov r10d, 1
jnb .L95
cvtss2sd xmm3, xmm3
cvtss2sd xmm4, xmm4
subsd xmm3, xmm4
xor r11d, r11d
mov r10d, 0
addsd xmm3, xmm8
ucomisd xmm3, xmm9
setnp r11b
cmove r10d, r11d
jmp .L95
.L1568:
pxor xmm6, xmm6
ucomiss xmm3, xmm6
jp .L1569
comiss xmm3, xmm6
jne .L1569
.L1724:
movzx r10d, BYTE PTR 39[rsp]
or r10d, DWORD PTR 16[rsp]
or r10b, BYTE PTR 46[rsp]
or r10d, DWORD PTR 32[rsp]
or r10d, DWORD PTR 44[rsp]
or r10b, BYTE PTR 33[rsp]
or r10b, BYTE PTR 47[rsp]
or r10b, BYTE PTR 41[rsp]
or r10d, DWORD PTR 48[rsp]
or r10d, DWORD PTR 40[rsp]
or r10b, BYTE PTR 49[rsp]
or r10b, BYTE PTR 37[rsp]
or r10b, BYTE PTR 50[rsp]
or r10b, BYTE PTR 34[rsp]
or r10b, BYTE PTR 51[rsp]
or r10b, BYTE PTR 38[rsp]
or r10d, DWORD PTR 52[rsp]
or r10b, BYTE PTR 35[rsp]
or r10b, BYTE PTR 53[rsp]
or r10b, BYTE PTR 42[rsp]
or r10b, BYTE PTR 57[rsp]
or r10d, r15d
or r10b, BYTE PTR 54[rsp]
or r10d, r12d
or r10b, BYTE PTR 58[rsp]
or r10d, DWORD PTR 36[rsp]
or r10b, BYTE PTR 55[rsp]
or r10d, ebx
or r10b, BYTE PTR 59[rsp]
or r10d, r11d
or r10d, DWORD PTR 56[rsp]
or r10b, BYTE PTR s19_evt1[rip]
or r10b, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR s1_evt0[rip]
or r10b, BYTE PTR s1_evt1[rip]
or r10d, DWORD PTR 8[rsp]
or r10b, BYTE PTR 9[rsp]
or r10b, BYTE PTR 10[rsp]
or r10b, BYTE PTR 11[rsp]
or r10d, DWORD PTR 12[rsp]
or r10b, BYTE PTR 13[rsp]
or r10b, BYTE PTR 14[rsp]
or r10b, BYTE PTR 15[rsp]
or r10d, DWORD PTR 20[rsp]
or r10b, BYTE PTR 21[rsp]
or r10b, BYTE PTR 23[rsp]
or r10d, DWORD PTR 24[rsp]
or r10b, BYTE PTR 25[rsp]
or r10b, BYTE PTR 26[rsp]
or r10b, BYTE PTR 27[rsp]
or r10d, DWORD PTR 28[rsp]
or r10b, BYTE PTR 29[rsp]
or r10b, BYTE PTR 22[rsp]
je .L6781
.L2472:
xor ebp, ebp
cmp BYTE PTR 7[rsp], 0
je .L1574
.L1723:
movzx r10d, BYTE PTR bus_evt0[rip]
or r10b, BYTE PTR bus_evt1[rip]
sete r10b
movzx r10d, r10b
mov ebp, r10d
.L1574:
test r14b, r14b
je .L1576
movzx r10d, BYTE PTR s19_evt0[rip]
or r10b, BYTE PTR s19_evt1[rip]
mov r13d, 1
je .L1577
.L1576:
cmp BYTE PTR 8[rsp], 0
je .L1578
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
mov r13d, 1
je .L1577
.L1578:
cmp BYTE PTR 9[rsp], 0
je .L1579
cmp BYTE PTR 68[rsp], 0
mov r13d, 1
je .L1577
.L1579:
cmp BYTE PTR 10[rsp], 0
je .L1580
cmp BYTE PTR 70[rsp], 0
mov r13d, 1
je .L1577
.L1580:
cmp BYTE PTR 11[rsp], 0
je .L1581
cmp BYTE PTR 76[rsp], 0
mov r13d, 1
je .L1577
.L1581:
cmp BYTE PTR 12[rsp], 0
je .L1582
cmp BYTE PTR 71[rsp], 0
mov r13d, 1
je .L1577
.L1582:
cmp BYTE PTR 13[rsp], 0
je .L1583
cmp BYTE PTR 72[rsp], 0
mov r13d, 1
je .L1577
.L1583:
cmp BYTE PTR 14[rsp], 0
je .L1584
cmp BYTE PTR 64[rsp], 0
mov r13d, 1
je .L1577
.L1584:
cmp BYTE PTR 15[rsp], 0
je .L1585
cmp BYTE PTR 77[rsp], 0
mov r13d, 1
je .L1577
.L1585:
cmp BYTE PTR 20[rsp], 0
je .L1586
cmp BYTE PTR 69[rsp], 0
mov r13d, 1
je .L1577
.L1586:
cmp BYTE PTR 21[rsp], 0
je .L1587
cmp BYTE PTR 78[rsp], 0
mov r13d, 1
je .L1577
.L1587:
cmp BYTE PTR 23[rsp], 0
je .L1588
cmp BYTE PTR 75[rsp], 0
mov r13d, 1
je .L1577
.L1588:
cmp BYTE PTR 24[rsp], 0
je .L1589
cmp BYTE PTR 74[rsp], 0
mov r13d, 1
je .L1577
.L1589:
cmp BYTE PTR 25[rsp], 0
je .L1590
cmp BYTE PTR 73[rsp], 0
mov r13d, 1
je .L1577
.L1590:
cmp BYTE PTR 26[rsp], 0
je .L1591
cmp BYTE PTR 63[rsp], 0
mov r13d, 1
je .L1577
.L1591:
cmp BYTE PTR 27[rsp], 0
je .L1592
cmp BYTE PTR 62[rsp], 0
mov r13d, 1
je .L1577
.L1592:
cmp BYTE PTR 28[rsp], 0
je .L1593
cmp BYTE PTR 79[rsp], 0
mov r13d, 1
je .L1577
.L1593:
cmp BYTE PTR 29[rsp], 0
je .L1594
cmp BYTE PTR 16[rsp], 0
mov r13d, 1
je .L1577
.L1594:
cmp BYTE PTR 30[rsp], 0
je .L1595
cmp BYTE PTR 31[rsp], 0
mov r13d, 1
je .L1577
.L1595:
xor r13d, r13d
cmp BYTE PTR 22[rsp], 0
je .L1577
xor r13d, r13d
movzx r10d, BYTE PTR s1_evt0[rip]
or r10b, BYTE PTR s1_evt1[rip]
sete r13b
.L1577:
xor r10d, r10d
cmp r13d, ebp
jne .L95
movzx r10d, BYTE PTR bus_evt1[rip]
mov DWORD PTR 16[rsp], 0
mov BYTE PTR 31[rsp], r10b
test r10b, r10b
je .L1596
movzx r10d, BYTE PTR 7[rsp]
or r10b, BYTE PTR bus_evt0[rip]
sete r10b
movzx r10d, r10b
mov DWORD PTR 16[rsp], r10d
.L1596:
movzx r10d, BYTE PTR s19_evt1[rip]
mov BYTE PTR 62[rsp], r10b
test r10b, r10b
je .L1597
mov r10d, r14d
or r10b, BYTE PTR s19_evt0[rip]
mov r13d, 1
je .L1598
.L1597:
cmp BYTE PTR s18_evt1[rip], 0
je .L1599
movzx r10d, BYTE PTR 8[rsp]
or r10b, BYTE PTR s18_evt0[rip]
mov r13d, 1
je .L1598
.L1599:
cmp BYTE PTR 56[rsp], 0
je .L1600
movzx r10d, BYTE PTR 9[rsp]
mov r13d, 1
or r10b, r11b
je .L1598
.L1600:
cmp BYTE PTR 59[rsp], 0
je .L1601
movzx r10d, BYTE PTR 10[rsp]
mov r13d, 1
or r10b, bl
je .L1598
.L1601:
cmp BYTE PTR 55[rsp], 0
je .L1602
movzx r10d, BYTE PTR 11[rsp]
or r10b, BYTE PTR 36[rsp]
mov r13d, 1
je .L1598
.L1602:
cmp BYTE PTR 58[rsp], 0
je .L1603
movzx r10d, BYTE PTR 12[rsp]
mov r13d, 1
or r10b, r12b
je .L1598
.L1603:
cmp BYTE PTR 54[rsp], 0
je .L1604
movzx r10d, BYTE PTR 13[rsp]
mov r13d, 1
or r10b, r15b
je .L1598
.L1604:
cmp BYTE PTR 57[rsp], 0
je .L1605
movzx r10d, BYTE PTR 42[rsp]
or r10b, BYTE PTR 14[rsp]
mov r13d, 1
je .L1598
.L1605:
cmp BYTE PTR 53[rsp], 0
je .L1606
movzx r10d, BYTE PTR 35[rsp]
or r10b, BYTE PTR 15[rsp]
mov r13d, 1
je .L1598
.L1606:
cmp BYTE PTR 52[rsp], 0
je .L1607
movzx r10d, BYTE PTR 38[rsp]
or r10b, BYTE PTR 20[rsp]
mov r13d, 1
je .L1598
.L1607:
cmp BYTE PTR 51[rsp], 0
je .L1608
movzx r10d, BYTE PTR 34[rsp]
or r10b, BYTE PTR 21[rsp]
mov r13d, 1
je .L1598
.L1608:
cmp BYTE PTR 50[rsp], 0
je .L1609
movzx r10d, BYTE PTR 37[rsp]
or r10b, BYTE PTR 23[rsp]
mov r13d, 1
je .L1598
.L1609:
cmp BYTE PTR 49[rsp], 0
je .L1610
movzx r10d, BYTE PTR 40[rsp]
or r10b, BYTE PTR 24[rsp]
mov r13d, 1
je .L1598
.L1610:
cmp BYTE PTR 48[rsp], 0
je .L1611
movzx r10d, BYTE PTR 41[rsp]
or r10b, BYTE PTR 25[rsp]
mov r13d, 1
je .L1598
.L1611:
cmp BYTE PTR 47[rsp], 0
je .L1612
movzx r10d, BYTE PTR 33[rsp]
or r10b, BYTE PTR 26[rsp]
mov r13d, 1
je .L1598
.L1612:
cmp BYTE PTR 44[rsp], 0
je .L1613
movzx r10d, BYTE PTR 32[rsp]
or r10b, BYTE PTR 27[rsp]
mov r13d, 1
je .L1598
.L1613:
cmp BYTE PTR 46[rsp], 0
je .L1614
movzx r10d, BYTE PTR 39[rsp]
or r10b, BYTE PTR 28[rsp]
mov r13d, 1
je .L1598
.L1614:
cmp BYTE PTR 45[rsp], 0
je .L1615
movzx r10d, BYTE PTR 43[rsp]
or r10b, BYTE PTR 29[rsp]
mov r13d, 1
je .L1598
.L1615:
cmp BYTE PTR 61[rsp], 0
je .L1616
movzx r10d, BYTE PTR 60[rsp]
or r10b, BYTE PTR 30[rsp]
mov r13d, 1
je .L1598
.L1616:
xor r13d, r13d
cmp BYTE PTR s1_evt1[rip], 0
je .L1598
xor r13d, r13d
movzx r10d, BYTE PTR 22[rsp]
or r10b, BYTE PTR s1_evt0[rip]
sete r13b
.L1598:
xor r10d, r10d
cmp DWORD PTR 16[rsp], r13d
jne .L95
xor ebp, ebp
cmp BYTE PTR 7[rsp], 0
je .L1617
cmp BYTE PTR 31[rsp], 0
je .L1617
xor r10d, r10d
cmp BYTE PTR bus_evt0[rip], 0
sete r10b
mov ebp, r10d
.L1617:
test r14b, r14b
je .L1618
cmp BYTE PTR 62[rsp], 0
je .L1618
cmp BYTE PTR s19_evt0[rip], 0
mov r13d, 1
je .L1619
.L1618:
cmp BYTE PTR 8[rsp], 0
je .L1620
cmp BYTE PTR s18_evt1[rip], 0
je .L1620
cmp BYTE PTR s18_evt0[rip], 0
mov r13d, 1
je .L1619
.L1620:
cmp BYTE PTR 9[rsp], 0
je .L1621
cmp BYTE PTR 56[rsp], 0
je .L1621
mov r13d, 1
test r11b, r11b
je .L1619
.L1621:
cmp BYTE PTR 10[rsp], 0
je .L1622
cmp BYTE PTR 59[rsp], 0
je .L1622
mov r13d, 1
test bl, bl
je .L1619
.L1622:
cmp BYTE PTR 11[rsp], 0
je .L1623
cmp BYTE PTR 55[rsp], 0
je .L1623
cmp BYTE PTR 36[rsp], 0
mov r13d, 1
je .L1619
.L1623:
cmp BYTE PTR 12[rsp], 0
je .L1624
cmp BYTE PTR 58[rsp], 0
je .L1624
mov r13d, 1
test r12b, r12b
je .L1619
.L1624:
cmp BYTE PTR 13[rsp], 0
je .L1625
cmp BYTE PTR 54[rsp], 0
je .L1625
mov r13d, 1
test r15b, r15b
je .L1619
.L1625:
cmp BYTE PTR 14[rsp], 0
je .L1626
cmp BYTE PTR 57[rsp], 0
je .L1626
cmp BYTE PTR 42[rsp], 0
mov r13d, 1
je .L1619
.L1626:
cmp BYTE PTR 15[rsp], 0
je .L1627
cmp BYTE PTR 53[rsp], 0
je .L1627
cmp BYTE PTR 35[rsp], 0
mov r13d, 1
je .L1619
.L1627:
cmp BYTE PTR 20[rsp], 0
je .L1628
cmp BYTE PTR 52[rsp], 0
je .L1628
cmp BYTE PTR 38[rsp], 0
mov r13d, 1
je .L1619
.L1628:
cmp BYTE PTR 21[rsp], 0
je .L1629
cmp BYTE PTR 51[rsp], 0
je .L1629
cmp BYTE PTR 34[rsp], 0
mov r13d, 1
je .L1619
.L1629:
cmp BYTE PTR 23[rsp], 0
je .L1630
cmp BYTE PTR 50[rsp], 0
je .L1630
cmp BYTE PTR 37[rsp], 0
mov r13d, 1
je .L1619
.L1630:
cmp BYTE PTR 24[rsp], 0
je .L1631
cmp BYTE PTR 49[rsp], 0
je .L1631
cmp BYTE PTR 40[rsp], 0
mov r13d, 1
je .L1619
.L1631:
cmp BYTE PTR 25[rsp], 0
je .L1632
cmp BYTE PTR 48[rsp], 0
je .L1632
cmp BYTE PTR 41[rsp], 0
mov r13d, 1
je .L1619
.L1632:
cmp BYTE PTR 26[rsp], 0
je .L1633
cmp BYTE PTR 47[rsp], 0
je .L1633
cmp BYTE PTR 33[rsp], 0
mov r13d, 1
je .L1619
.L1633:
cmp BYTE PTR 27[rsp], 0
je .L1634
cmp BYTE PTR 44[rsp], 0
je .L1634
cmp BYTE PTR 32[rsp], 0
mov r13d, 1
je .L1619
.L1634:
cmp BYTE PTR 28[rsp], 0
je .L1635
cmp BYTE PTR 46[rsp], 0
je .L1635
cmp BYTE PTR 39[rsp], 0
mov r13d, 1
je .L1619
.L1635:
cmp BYTE PTR 29[rsp], 0
je .L1636
cmp BYTE PTR 45[rsp], 0
je .L1636
cmp BYTE PTR 43[rsp], 0
mov r13d, 1
je .L1619
.L1636:
cmp BYTE PTR 30[rsp], 0
je .L1637
cmp BYTE PTR 61[rsp], 0
je .L1637
cmp BYTE PTR 60[rsp], 0
mov r13d, 1
je .L1619
.L1637:
xor r13d, r13d
cmp BYTE PTR 22[rsp], 0
je .L1619
cmp BYTE PTR s1_evt1[rip], 0
je .L1619
xor r13d, r13d
cmp BYTE PTR s1_evt0[rip], 0
sete r13b
.L1619:
xor r10d, r10d
cmp ebp, r13d
jne .L95
movzx r10d, BYTE PTR bus_evt0[rip]
mov DWORD PTR 64[rsp], 0
mov BYTE PTR 16[rsp], r10b
test r10b, r10b
je .L1638
movzx r10d, BYTE PTR 31[rsp]
or r10b, BYTE PTR 7[rsp]
sete r10b
movzx r10d, r10b
mov DWORD PTR 64[rsp], r10d
.L1638:
movzx r10d, BYTE PTR s19_evt0[rip]
mov BYTE PTR 63[rsp], r10b
test r10b, r10b
je .L1639
movzx r10d, BYTE PTR 62[rsp]
mov r13d, 1
or r10b, r14b
je .L1640
.L1639:
cmp BYTE PTR s18_evt0[rip], 0
je .L1641
movzx r10d, BYTE PTR 8[rsp]
or r10b, BYTE PTR s18_evt1[rip]
mov r13d, 1
je .L1640
.L1641:
test r11b, r11b
je .L1642
movzx r10d, BYTE PTR 56[rsp]
or r10b, BYTE PTR 9[rsp]
mov r13d, 1
je .L1640
.L1642:
test bl, bl
je .L1643
movzx r10d, BYTE PTR 59[rsp]
or r10b, BYTE PTR 10[rsp]
mov r13d, 1
je .L1640
.L1643:
cmp BYTE PTR 36[rsp], 0
je .L1644
movzx r10d, BYTE PTR 55[rsp]
or r10b, BYTE PTR 11[rsp]
mov r13d, 1
je .L1640
.L1644:
test r12b, r12b
je .L1645
movzx r10d, BYTE PTR 58[rsp]
or r10b, BYTE PTR 12[rsp]
mov r13d, 1
je .L1640
.L1645:
test r15b, r15b
je .L1646
movzx r10d, BYTE PTR 54[rsp]
or r10b, BYTE PTR 13[rsp]
mov r13d, 1
je .L1640
.L1646:
cmp BYTE PTR 42[rsp], 0
je .L1647
movzx r10d, BYTE PTR 57[rsp]
or r10b, BYTE PTR 14[rsp]
mov r13d, 1
je .L1640
.L1647:
cmp BYTE PTR 35[rsp], 0
je .L1648
movzx r10d, BYTE PTR 53[rsp]
or r10b, BYTE PTR 15[rsp]
mov r13d, 1
je .L1640
.L1648:
cmp BYTE PTR 38[rsp], 0
je .L1649
movzx r10d, BYTE PTR 52[rsp]
or r10b, BYTE PTR 20[rsp]
mov r13d, 1
je .L1640
.L1649:
cmp BYTE PTR 34[rsp], 0
je .L1650
movzx r10d, BYTE PTR 51[rsp]
or r10b, BYTE PTR 21[rsp]
mov r13d, 1
je .L1640
.L1650:
cmp BYTE PTR 37[rsp], 0
je .L1651
movzx r10d, BYTE PTR 50[rsp]
or r10b, BYTE PTR 23[rsp]
mov r13d, 1
je .L1640
.L1651:
cmp BYTE PTR 40[rsp], 0
je .L1652
movzx r10d, BYTE PTR 49[rsp]
or r10b, BYTE PTR 24[rsp]
mov r13d, 1
je .L1640
.L1652:
cmp BYTE PTR 41[rsp], 0
je .L1653
movzx r10d, BYTE PTR 48[rsp]
or r10b, BYTE PTR 25[rsp]
mov r13d, 1
je .L1640
.L1653:
cmp BYTE PTR 33[rsp], 0
je .L1654
movzx r10d, BYTE PTR 47[rsp]
or r10b, BYTE PTR 26[rsp]
mov r13d, 1
je .L1640
.L1654:
cmp BYTE PTR 32[rsp], 0
je .L1655
movzx r10d, BYTE PTR 44[rsp]
or r10b, BYTE PTR 27[rsp]
mov r13d, 1
je .L1640
.L1655:
cmp BYTE PTR 39[rsp], 0
je .L1656
movzx r10d, BYTE PTR 46[rsp]
or r10b, BYTE PTR 28[rsp]
mov r13d, 1
je .L1640
.L1656:
cmp BYTE PTR 43[rsp], 0
je .L1657
movzx r10d, BYTE PTR 45[rsp]
or r10b, BYTE PTR 29[rsp]
mov r13d, 1
je .L1640
.L1657:
cmp BYTE PTR 60[rsp], 0
je .L1658
movzx r10d, BYTE PTR 61[rsp]
or r10b, BYTE PTR 30[rsp]
mov r13d, 1
je .L1640
.L1658:
xor r13d, r13d
cmp BYTE PTR s1_evt0[rip], 0
je .L1640
xor r13d, r13d
movzx r10d, BYTE PTR 22[rsp]
or r10b, BYTE PTR s1_evt1[rip]
sete r13b
.L1640:
xor r10d, r10d
cmp DWORD PTR 64[rsp], r13d
jne .L95
pxor xmm6, xmm6
ucomiss xmm3, xmm6
jp .L1569
comiss xmm3, xmm6
jne .L1569
cmp BYTE PTR 60[rsp], 0
je .L1659
movzx ebp, BYTE PTR 61[rsp]
or bpl, BYTE PTR 30[rsp]
jne .L1659
cmp BYTE PTR 7[rsp], 0
jne .L95
cmp BYTE PTR 16[rsp], 0
je .L95
mov ebp, 1
.L2469:
xor r13d, r13d
cmp BYTE PTR 31[rsp], 0
jne .L1661
xor r13d, r13d
cmp DWORD PTR bus_cd_id[rip], 0
sete r13b
.L1661:
xor r10d, r10d
cmp r13d, ebp
jne .L95
cmp BYTE PTR s1_evt0[rip], 0
je .L2015
.L2977:
movzx r10d, BYTE PTR 22[rsp]
or r10b, BYTE PTR s1_evt1[rip]
jne .L6782
xor r10d, r10d
cmp BYTE PTR 7[rsp], 0
jne .L95
xor r10d, r10d
cmp BYTE PTR 16[rsp], 0
je .L95
mov ebp, 1
.L2467:
xor r13d, r13d
cmp BYTE PTR 31[rsp], 0
jne .L1664
xor r13d, r13d
cmp DWORD PTR bus_cd_id[rip], 1
sete r13b
.L1664:
xor r10d, r10d
cmp r13d, ebp
jne .L95
cmp BYTE PTR 43[rsp], 0
je .L2013
.L2976:
movzx r10d, BYTE PTR 45[rsp]
or r10b, BYTE PTR 29[rsp]
jne .L2013
cmp BYTE PTR 16[rsp], 0
je .L6783
mov ebp, 1
.L2464:
xor r13d, r13d
cmp BYTE PTR 31[rsp], 0
jne .L1667
xor r13d, r13d
cmp DWORD PTR bus_cd_id[rip], 2
sete r13b
.L1667:
xor r10d, r10d
cmp r13d, ebp
jne .L95
cmp BYTE PTR 39[rsp], 0
je .L2009
.L2975:
movzx r10d, BYTE PTR 46[rsp]
or r10b, BYTE PTR 28[rsp]
jne .L6784
xor r10d, r10d
cmp BYTE PTR 7[rsp], 0
jne .L95
xor r10d, r10d
cmp BYTE PTR 16[rsp], 0
je .L95
mov ebp, 1
.L2462:
xor r13d, r13d
cmp BYTE PTR 31[rsp], 0
jne .L1670
xor r13d, r13d
cmp DWORD PTR bus_cd_id[rip], 3
sete r13b
.L1670:
xor r10d, r10d
cmp r13d, ebp
jne .L95
cmp BYTE PTR 32[rsp], 0
je .L2007
.L2974:
movzx r10d, BYTE PTR 44[rsp]
or r10b, BYTE PTR 27[rsp]
jne .L6785
xor r10d, r10d
cmp BYTE PTR 7[rsp], 0
jne .L95
xor r10d, r10d
cmp BYTE PTR 16[rsp], 0
je .L95
mov ebp, 1
.L2460:
xor r13d, r13d
cmp BYTE PTR 31[rsp], 0
jne .L1673
xor r13d, r13d
cmp DWORD PTR bus_cd_id[rip], 4
sete r13b
.L1673:
xor r10d, r10d
cmp r13d, ebp
jne .L95
cmp BYTE PTR 33[rsp], 0
je .L2003
.L2973:
movzx r10d, BYTE PTR 47[rsp]
or r10b, BYTE PTR 26[rsp]
jne .L2003
cmp BYTE PTR 16[rsp], 0
je .L6786
mov ebp, 1
.L2457:
xor r13d, r13d
cmp BYTE PTR 31[rsp], 0
jne .L1676
xor r13d, r13d
cmp DWORD PTR bus_cd_id[rip], 5
sete r13b
.L1676:
xor r10d, r10d
cmp r13d, ebp
jne .L95
cmp BYTE PTR 41[rsp], 0
je .L2000
.L2972:
movzx r10d, BYTE PTR 48[rsp]
or r10b, BYTE PTR 25[rsp]
jne .L6787
xor r10d, r10d
cmp BYTE PTR 7[rsp], 0
jne .L95
xor r10d, r10d
cmp BYTE PTR 16[rsp], 0
je .L95
mov ebp, 1
.L2455:
xor r13d, r13d
cmp BYTE PTR 31[rsp], 0
jne .L1679
xor r13d, r13d
cmp DWORD PTR bus_cd_id[rip], 6
sete r13b
.L1679:
xor r10d, r10d
cmp r13d, ebp
jne .L95
cmp BYTE PTR 40[rsp], 0
je .L1997
.L2971:
movzx r10d, BYTE PTR 49[rsp]
or r10b, BYTE PTR 24[rsp]
jne .L1997
cmp BYTE PTR 16[rsp], 0
je .L6788
mov ebp, 1
.L2452:
xor r13d, r13d
cmp BYTE PTR 31[rsp], 0
jne .L1682
xor r13d, r13d
cmp DWORD PTR bus_cd_id[rip], 7
sete r13b
.L1682:
xor r10d, r10d
cmp r13d, ebp
jne .L95
cmp BYTE PTR 37[rsp], 0
je .L1994
.L2970:
movzx r10d, BYTE PTR 50[rsp]
or r10b, BYTE PTR 23[rsp]
jne .L6789
xor r10d, r10d
cmp BYTE PTR 7[rsp], 0
jne .L95
xor r10d, r10d
cmp BYTE PTR 16[rsp], 0
je .L95
mov ebp, 1
.L2450:
xor r13d, r13d
cmp BYTE PTR 31[rsp], 0
jne .L1685
xor r13d, r13d
cmp DWORD PTR bus_cd_id[rip], 8
sete r13b
.L1685:
xor r10d, r10d
cmp r13d, ebp
jne .L95
cmp BYTE PTR 34[rsp], 0
je .L1992
.L2969:
movzx r10d, BYTE PTR 51[rsp]
or r10b, BYTE PTR 21[rsp]
jne .L1992
cmp BYTE PTR 16[rsp], 0
je .L6790
mov ebp, 1
.L2447:
xor r13d, r13d
cmp BYTE PTR 31[rsp], 0
jne .L1688
xor r13d, r13d
cmp DWORD PTR bus_cd_id[rip], 9
sete r13b
.L1688:
xor r10d, r10d
cmp r13d, ebp
jne .L95
cmp BYTE PTR 38[rsp], 0
je .L1988
.L2968:
movzx r10d, BYTE PTR 52[rsp]
or r10b, BYTE PTR 20[rsp]
jne .L6791
xor r10d, r10d
cmp BYTE PTR 7[rsp], 0
jne .L95
xor r10d, r10d
cmp BYTE PTR 16[rsp], 0
je .L95
mov ebp, 1
.L2445:
xor r13d, r13d
cmp BYTE PTR 31[rsp], 0
jne .L1691
xor r13d, r13d
cmp DWORD PTR bus_cd_id[rip], 10
sete r13b
.L1691:
xor r10d, r10d
cmp r13d, ebp
jne .L95
cmp BYTE PTR 35[rsp], 0
je .L1986
.L2967:
movzx r10d, BYTE PTR 53[rsp]
or r10b, BYTE PTR 15[rsp]
jne .L1986
cmp BYTE PTR 16[rsp], 0
je .L6792
mov ebp, 1
.L2442:
xor r13d, r13d
cmp BYTE PTR 31[rsp], 0
jne .L1694
xor r13d, r13d
cmp DWORD PTR bus_cd_id[rip], 11
sete r13b
.L1694:
xor r10d, r10d
cmp r13d, ebp
jne .L95
cmp BYTE PTR 42[rsp], 0
je .L1982
.L2966:
movzx r10d, BYTE PTR 57[rsp]
or r10b, BYTE PTR 14[rsp]
jne .L6793
xor r10d, r10d
cmp BYTE PTR 7[rsp], 0
jne .L95
xor r10d, r10d
cmp BYTE PTR 16[rsp], 0
je .L95
mov ebp, 1
.L2440:
xor r13d, r13d
cmp BYTE PTR 31[rsp], 0
jne .L1697
xor r13d, r13d
cmp DWORD PTR bus_cd_id[rip], 12
sete r13b
.L1697:
xor r10d, r10d
cmp r13d, ebp
jne .L95
test r15b, r15b
je .L1979
.L2965:
movzx r15d, BYTE PTR 54[rsp]
or r15b, BYTE PTR 13[rsp]
jne .L1979
cmp BYTE PTR 16[rsp], 0
je .L6794
mov r15d, 1
.L2437:
xor r13d, r13d
cmp BYTE PTR 31[rsp], 0
jne .L1700
xor r13d, r13d
cmp DWORD PTR bus_cd_id[rip], 13
sete r13b
.L1700:
xor r10d, r10d
cmp r13d, r15d
jne .L95
test r12b, r12b
je .L1976
.L2964:
movzx r15d, BYTE PTR 58[rsp]
or r15b, BYTE PTR 12[rsp]
jne .L6795
xor r10d, r10d
cmp BYTE PTR 7[rsp], 0
jne .L95
xor r10d, r10d
cmp BYTE PTR 16[rsp], 0
je .L95
mov r13d, 1
.L2435:
xor r12d, r12d
cmp BYTE PTR 31[rsp], 0
jne .L1703
xor r12d, r12d
cmp DWORD PTR bus_cd_id[rip], 14
sete r12b
.L1703:
xor r10d, r10d
cmp r12d, r13d
jne .L95
cmp BYTE PTR 36[rsp], 0
je .L1973
.L2963:
movzx r15d, BYTE PTR 55[rsp]
or r15b, BYTE PTR 11[rsp]
jne .L1973
cmp BYTE PTR 16[rsp], 0
je .L6796
mov r12d, 1
.L2432:
xor ebp, ebp
cmp BYTE PTR 31[rsp], 0
jne .L1706
xor ebp, ebp
cmp DWORD PTR bus_cd_id[rip], 15
sete bpl
.L1706:
xor r10d, r10d
cmp ebp, r12d
jne .L95
test bl, bl
je .L1971
.L2962:
movzx ebx, BYTE PTR 59[rsp]
or bl, BYTE PTR 10[rsp]
jne .L6797
xor r10d, r10d
cmp BYTE PTR 7[rsp], 0
jne .L95
xor r10d, r10d
cmp BYTE PTR 16[rsp], 0
je .L95
mov ebp, 1
.L2430:
xor ebx, ebx
cmp BYTE PTR 31[rsp], 0
jne .L1709
xor ebx, ebx
cmp DWORD PTR bus_cd_id[rip], 16
sete bl
.L1709:
xor r10d, r10d
cmp ebx, ebp
jne .L95
test r11b, r11b
je .L1710
.L2961:
movzx ebx, BYTE PTR 56[rsp]
or bl, BYTE PTR 9[rsp]
jne .L1710
.L1969:
xor r10d, r10d
cmp BYTE PTR 16[rsp], 0
je .L95
mov r11d, 1
.L2427:
xor ebx, ebx
cmp BYTE PTR 31[rsp], 0
jne .L1712
xor ebx, ebx
cmp DWORD PTR bus_cd_id[rip], 17
sete bl
.L1712:
xor r10d, r10d
cmp ebx, r11d
jne .L95
cmp BYTE PTR s18_evt0[rip], 0
je .L1965
.L2960:
movzx ebx, BYTE PTR 8[rsp]
or bl, BYTE PTR s18_evt1[rip]
jne .L6798
xor r10d, r10d
cmp BYTE PTR 7[rsp], 0
jne .L95
xor r10d, r10d
cmp BYTE PTR 16[rsp], 0
je .L95
mov r11d, 1
.L2425:
xor ebx, ebx
cmp BYTE PTR 31[rsp], 0
jne .L1715
xor ebx, ebx
cmp DWORD PTR bus_cd_id[rip], 18
sete bl
.L1715:
xor r10d, r10d
cmp ebx, r11d
jne .L95
cmp BYTE PTR 63[rsp], 0
je .L1716
.L2959:
movzx ebx, BYTE PTR 62[rsp]
or bl, r14b
jne .L1716
.L1721:
xor r10d, r10d
cmp BYTE PTR 16[rsp], 0
je .L95
xor r10d, r10d
cmp BYTE PTR 31[rsp], 0
jne .L95
cmp DWORD PTR bus_cd_id[rip], 19
je .L1569
xor r10d, r10d
jmp .L95
.L6798:
cmp BYTE PTR 7[rsp], 0
jne .L1966
.L1965:
cmp BYTE PTR 16[rsp], 0
je .L6413
xor r11d, r11d
jmp .L2425
.L1968:
cmp BYTE PTR s18_evt0[rip], 0
jne .L2960
.L1966:
cmp BYTE PTR 63[rsp], 0
je .L1569
movzx ebx, BYTE PTR 62[rsp]
or bl, r14b
jne .L1569
xor r10d, r10d
cmp BYTE PTR 7[rsp], 0
jne .L95
jmp .L1721
.L1716:
cmp BYTE PTR 16[rsp], 0
je .L1569
cmp BYTE PTR 31[rsp], 0
jne .L1569
cmp DWORD PTR bus_cd_id[rip], 19
jne .L1569
xor r10d, r10d
jmp .L95
.L6800:
cmp BYTE PTR s1_evt0[rip], 0
jne .L2977
.L6429:
cmp BYTE PTR 43[rsp], 0
jne .L2976
.L6428:
cmp BYTE PTR 39[rsp], 0
jne .L2975
.L6427:
cmp BYTE PTR 32[rsp], 0
jne .L2974
.L6426:
cmp BYTE PTR 33[rsp], 0
jne .L2973
.L6425:
cmp BYTE PTR 41[rsp], 0
jne .L2972
.L6424:
cmp BYTE PTR 40[rsp], 0
jne .L2971
.L6423:
cmp BYTE PTR 37[rsp], 0
jne .L2970
.L6422:
cmp BYTE PTR 34[rsp], 0
jne .L2969
.L6421:
cmp BYTE PTR 38[rsp], 0
jne .L2968
.L6420:
cmp BYTE PTR 35[rsp], 0
jne .L2967
.L6419:
cmp BYTE PTR 42[rsp], 0
jne .L2966
.L6418:
test r15b, r15b
jne .L2965
.L6417:
test r12b, r12b
jne .L2964
.L6416:
cmp BYTE PTR 36[rsp], 0
jne .L2963
.L6415:
test bl, bl
jne .L2962
.L6414:
test r11b, r11b
jne .L2961
.L6275:
cmp BYTE PTR s18_evt0[rip], 0
jne .L2960
.L6413:
cmp BYTE PTR 63[rsp], 0
jne .L2959
jmp .L1569
.L6795:
cmp BYTE PTR 7[rsp], 0
jne .L1977
.L1976:
cmp BYTE PTR 16[rsp], 0
je .L6416
xor r13d, r13d
jmp .L2435
.L6794:
xor r10d, r10d
jmp .L95
.L1979:
cmp BYTE PTR 16[rsp], 0
je .L6417
xor r15d, r15d
jmp .L2437
.L6793:
cmp BYTE PTR 7[rsp], 0
jne .L1983
.L1982:
cmp BYTE PTR 16[rsp], 0
je .L6418
xor ebp, ebp
jmp .L2440
.L1986:
cmp BYTE PTR 16[rsp], 0
je .L6419
xor ebp, ebp
jmp .L2442
.L6791:
cmp BYTE PTR 7[rsp], 0
jne .L1989
.L1988:
cmp BYTE PTR 16[rsp], 0
je .L6420
xor ebp, ebp
jmp .L2445
.L6792:
xor r10d, r10d
jmp .L95
.L1993:
cmp BYTE PTR 38[rsp], 0
jne .L2968
.L1989:
cmp BYTE PTR 35[rsp], 0
je .L1987
movzx ebp, BYTE PTR 53[rsp]
xor r10d, r10d
or bpl, BYTE PTR 15[rsp]
je .L95
cmp BYTE PTR 7[rsp], 0
je .L1986
.L1987:
cmp BYTE PTR 42[rsp], 0
jne .L2966
.L1983:
test r15b, r15b
je .L1980
movzx r15d, BYTE PTR 54[rsp]
xor r10d, r10d
or r15b, BYTE PTR 13[rsp]
je .L95
cmp BYTE PTR 7[rsp], 0
je .L1979
.L1980:
test r12b, r12b
jne .L2964
.L1977:
cmp BYTE PTR 36[rsp], 0
je .L1974
movzx r15d, BYTE PTR 55[rsp]
xor r10d, r10d
or r15b, BYTE PTR 11[rsp]
je .L95
cmp BYTE PTR 7[rsp], 0
jne .L1974
.L1973:
cmp BYTE PTR 16[rsp], 0
je .L6415
xor r12d, r12d
jmp .L2432
.L1974:
test bl, bl
jne .L2962
.L1972:
test r11b, r11b
je .L1968
movzx ebx, BYTE PTR 56[rsp]
or bl, BYTE PTR 9[rsp]
jne .L1968
xor r10d, r10d
cmp BYTE PTR 7[rsp], 0
jne .L95
jmp .L1969
.L6797:
cmp BYTE PTR 7[rsp], 0
jne .L1972
.L1971:
cmp BYTE PTR 16[rsp], 0
je .L6414
xor ebp, ebp
jmp .L2430
.L6796:
xor r10d, r10d
jmp .L95
.L1710:
cmp BYTE PTR 16[rsp], 0
je .L6275
xor r11d, r11d
jmp .L2427
.L2013:
cmp BYTE PTR 16[rsp], 0
je .L6428
xor ebp, ebp
jmp .L2464
.L6782:
cmp BYTE PTR 7[rsp], 0
jne .L2016
.L2015:
cmp BYTE PTR 16[rsp], 0
je .L6429
xor ebp, ebp
jmp .L2467
.L1659:
cmp BYTE PTR 7[rsp], 0
jne .L6799
cmp BYTE PTR 16[rsp], 0
je .L6800
xor ebp, ebp
jmp .L2469
.L6799:
cmp BYTE PTR s1_evt0[rip], 0
jne .L2977
.L2016:
cmp BYTE PTR 43[rsp], 0
je .L2014
movzx ebp, BYTE PTR 45[rsp]
xor r10d, r10d
or bpl, BYTE PTR 29[rsp]
je .L95
cmp BYTE PTR 7[rsp], 0
je .L2013
.L2014:
cmp BYTE PTR 39[rsp], 0
jne .L2975
.L2010:
cmp BYTE PTR 32[rsp], 0
jne .L2974
.L2008:
cmp BYTE PTR 33[rsp], 0
je .L2004
movzx ebp, BYTE PTR 47[rsp]
xor r10d, r10d
or bpl, BYTE PTR 26[rsp]
je .L95
cmp BYTE PTR 7[rsp], 0
jne .L2004
.L2003:
cmp BYTE PTR 16[rsp], 0
je .L6425
xor ebp, ebp
jmp .L2457
.L2004:
cmp BYTE PTR 41[rsp], 0
jne .L2972
.L2001:
cmp BYTE PTR 40[rsp], 0
je .L1998
movzx ebp, BYTE PTR 49[rsp]
xor r10d, r10d
or bpl, BYTE PTR 24[rsp]
je .L95
cmp BYTE PTR 7[rsp], 0
jne .L1998
.L1997:
cmp BYTE PTR 16[rsp], 0
je .L6423
xor ebp, ebp
jmp .L2452
.L1998:
cmp BYTE PTR 37[rsp], 0
jne .L2970
.L1995:
cmp BYTE PTR 34[rsp], 0
je .L1993
movzx ebp, BYTE PTR 51[rsp]
xor r10d, r10d
or bpl, BYTE PTR 21[rsp]
je .L95
cmp BYTE PTR 7[rsp], 0
jne .L1993
.L1992:
cmp BYTE PTR 16[rsp], 0
je .L6421
xor ebp, ebp
jmp .L2447
.L6789:
cmp BYTE PTR 7[rsp], 0
jne .L1995
.L1994:
cmp BYTE PTR 16[rsp], 0
je .L6422
xor ebp, ebp
jmp .L2450
.L6790:
xor r10d, r10d
jmp .L95
.L6788:
xor r10d, r10d
jmp .L95
.L6787:
cmp BYTE PTR 7[rsp], 0
jne .L2001
.L2000:
cmp BYTE PTR 16[rsp], 0
je .L6424
xor ebp, ebp
jmp .L2455
.L6786:
xor r10d, r10d
jmp .L95
.L6785:
cmp BYTE PTR 7[rsp], 0
jne .L2008
.L2007:
cmp BYTE PTR 16[rsp], 0
je .L6426
xor ebp, ebp
jmp .L2460
.L6784:
cmp BYTE PTR 7[rsp], 0
jne .L2010
.L2009:
cmp BYTE PTR 16[rsp], 0
je .L6427
xor ebp, ebp
jmp .L2462
.L6783:
xor r10d, r10d
jmp .L95
.L1565:
movzx r13d, BYTE PTR s19_evt0[rip]
movzx ebp, BYTE PTR s19_evt1[rip]
or ebp, r13d
or bpl, r14b
jne .L1375
or r10b, BYTE PTR s18_evt1[rip]
jne .L2474
.L1567:
test r14b, r14b
jne .L1570
pxor xmm4, xmm4
mov r13d, 1
ucomiss xmm3, xmm4
setp r10b
cmovne r10d, r13d
test r10b, r10b
je .L6801
.L1570:
pxor xmm6, xmm6
ucomiss xmm3, xmm6
jp .L1569
comiss xmm3, xmm6
je .L2472
jmp .L1569
.L6801:
cmp BYTE PTR s19_evt0[rip], 0
je .L1724
xor ebp, ebp
cmp BYTE PTR 7[rsp], 0
je .L1576
movzx r10d, BYTE PTR bus_evt0[rip]
or r10b, BYTE PTR bus_evt1[rip]
jne .L6572
mov ebp, 1
jmp .L1576
.L6781:
cmp BYTE PTR 7[rsp], 0
jne .L1572
movzx r10d, BYTE PTR 31[rsp]
or r10b, BYTE PTR bus_evt0[rip]
or r10b, BYTE PTR bus_evt1[rip]
or r10b, BYTE PTR 30[rsp]
jne .L1573
xor r10d, r10d
jmp .L95
.L3855:
xor r10d, r10d
comiss xmm3, xmm5
jnb .L95
jmp .L1718
.L1573:
pxor xmm6, xmm6
ucomiss xmm3, xmm6
jp .L1569
comiss xmm3, xmm6
jne .L1569
.L6572:
xor ebp, ebp
jmp .L1574
.L1572:
pxor xmm6, xmm6
ucomiss xmm3, xmm6
jp .L1569
comiss xmm3, xmm6
je .L1723
jmp .L1569
.L1563:
cmp BYTE PTR 8[rsp], 0
jne .L1566
movzx r10d, BYTE PTR s18_evt0[rip]
jmp .L2475
.L6251:
movzx r10d, BYTE PTR 36[rsp]
or r10b, BYTE PTR s15_evt1[rip]
or r10b, BYTE PTR 11[rsp]
jne .L1375
movzx ebx, BYTE PTR 12[rsp]
or bl, r12b
movzx ebx, BYTE PTR s16_evt0[rip]
jne .L1554
cmp BYTE PTR 58[rsp], 0
je .L1553
.L1554:
movzx r10d, BYTE PTR s16_evt1[rip]
or r10d, ebx
or r10b, BYTE PTR 10[rsp]
jne .L1375
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, BYTE PTR 9[rsp]
jne .L1375
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
jne .L1375
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
jne .L1375
jmp .L1553
.L6249:
movzx r10d, BYTE PTR s14_evt1[rip]
or r10d, r12d
or r10b, BYTE PTR 12[rsp]
jne .L1375
movzx ebx, BYTE PTR 13[rsp]
or bl, r15b
movzx ebx, BYTE PTR s15_evt0[rip]
jne .L1548
cmp BYTE PTR 54[rsp], 0
mov BYTE PTR 36[rsp], bl
je .L1547
.L6580:
movzx r10d, BYTE PTR s15_evt1[rip]
or r10d, ebx
or r10b, BYTE PTR 11[rsp]
jne .L1375
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, BYTE PTR 10[rsp]
jne .L1375
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, BYTE PTR 9[rsp]
jne .L1375
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
jne .L1375
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
jne .L1375
jmp .L1547
.L6253:
movzx r10d, BYTE PTR s16_evt1[rip]
or r10d, ebx
or r10b, BYTE PTR 10[rsp]
jne .L1375
movzx r11d, BYTE PTR 11[rsp]
or r11b, BYTE PTR 36[rsp]
movzx r11d, BYTE PTR s17_evt0[rip]
jne .L1558
cmp BYTE PTR 55[rsp], 0
je .L1557
.L1558:
movzx r10d, BYTE PTR s17_evt1[rip]
or r10d, r11d
or r10b, BYTE PTR 9[rsp]
jne .L1375
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
jne .L1375
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
jne .L1375
jmp .L1557
.L6780:
cmp BYTE PTR bus_l0[rip], 0
jne .L6802
.L1369:
pxor xmm4, xmm4
ucomiss xmm3, xmm4
jp .L3540
comiss xmm3, xmm4
je .L6284
.L3540:
mov BYTE PTR 7[rsp], 0
jmp .L1366
.L6802:
cmp BYTE PTR bus_l1[rip], 0
je .L1369
test bpl, bpl
je .L1369
.L2565:
xor r10d, r10d
cmp BYTE PTR _x_bus_l1[rip], 0
jne .L95
.L2023:
cmp BYTE PTR bus_evt0[rip], 0
je .L1369
.L1361:
cmp BYTE PTR bus_evt1[rip], 0
sete r11b
cmp ebx, 19
sete r10b
test r11b, r10b
je .L1370
pxor xmm5, xmm5
mov r11d, 0
ucomiss xmm4, xmm5
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L2563
.L1370:
pxor xmm4, xmm4
ucomiss xmm3, xmm4
jp .L3540
comiss xmm3, xmm4
jne .L3540
.L6568:
mov BYTE PTR 7[rsp], 0
.L1725:
or bpl, BYTE PTR _x_bus_l1[rip]
jne .L1366
cmp BYTE PTR bus_l0[rip], 0
je .L1366
xor r10d, r10d
cmp BYTE PTR bus_l1[rip], 0
jne .L95
jmp .L1366
.L6779:
cmp BYTE PTR 7[rsp], 0
jne .L1358
cmp BYTE PTR bus_evt0[rip], 0
je .L1359
.L1354:
cmp BYTE PTR bus_evt1[rip], 0
jne .L1360
cmp DWORD PTR bus_cd_id[rip], ebx
pxor xmm5, xmm5
mov r11d, 0
sete r13b
ucomiss xmm4, xmm5
setnp r10b
cmovne r10d, r11d
test r13b, r10b
je .L1360
cmp ebx, 18
jle .L1361
.L1360:
pxor xmm5, xmm5
ucomiss xmm3, xmm5
jp .L2026
comiss xmm3, xmm5
je .L2566
.L2026:
cmp BYTE PTR bus_evt1[rip], 0
sete r11b
cmp ebx, 19
sete r10b
test r11b, r10b
je .L3540
pxor xmm5, xmm5
mov r11d, 0
ucomiss xmm4, xmm5
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L3540
.L2563:
cmp DWORD PTR bus_cd_id[rip], 19
jne .L1370
test r12d, r12d
jne .L1370
jmp .L3540
.L1373:
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
je .L1374
.L1376:
movzx ebx, BYTE PTR s2_evt0[rip]
mov BYTE PTR 43[rsp], bl
or bl, BYTE PTR s2_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 29[rsp]
jne .L1375
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
movzx ebx, BYTE PTR s3_evt0[rip]
jne .L1378
cmp BYTE PTR s1_evt1[rip], 0
jne .L1378
mov BYTE PTR 39[rsp], bl
jmp .L1377
.L1548:
mov BYTE PTR 36[rsp], bl
jmp .L6580
.L1378:
mov BYTE PTR 39[rsp], bl
or bl, BYTE PTR s3_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 28[rsp]
jne .L1375
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
jne .L1379
cmp BYTE PTR s1_evt1[rip], 0
je .L1377
.L1379:
movzx ebx, BYTE PTR s4_evt0[rip]
or bl, BYTE PTR s4_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 27[rsp]
jne .L1375
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
jne .L1380
cmp BYTE PTR s1_evt1[rip], 0
je .L1377
.L1380:
movzx ebx, BYTE PTR s5_evt0[rip]
or bl, BYTE PTR s5_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 26[rsp]
jne .L1375
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
jne .L1381
cmp BYTE PTR s1_evt1[rip], 0
je .L1377
.L1381:
movzx ebx, BYTE PTR s6_evt0[rip]
or bl, BYTE PTR s6_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 25[rsp]
jne .L1375
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
jne .L1382
cmp BYTE PTR s1_evt1[rip], 0
je .L1377
.L1382:
movzx ebx, BYTE PTR s7_evt0[rip]
or bl, BYTE PTR s7_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 24[rsp]
jne .L1375
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
jne .L1383
cmp BYTE PTR s1_evt1[rip], 0
je .L1377
.L1383:
movzx ebx, BYTE PTR s8_evt0[rip]
or bl, BYTE PTR s8_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 23[rsp]
jne .L1375
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
jne .L1384
cmp BYTE PTR s1_evt1[rip], 0
je .L1377
.L1384:
movzx ebx, BYTE PTR s9_evt0[rip]
or bl, BYTE PTR s9_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 21[rsp]
jne .L1375
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
jne .L1385
cmp BYTE PTR s1_evt1[rip], 0
je .L1377
.L1385:
movzx ebx, BYTE PTR s10_evt0[rip]
or bl, BYTE PTR s10_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 20[rsp]
jne .L1375
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
jne .L1386
cmp BYTE PTR s1_evt1[rip], 0
je .L1377
.L1386:
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 15[rsp]
jne .L1375
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
jne .L1387
cmp BYTE PTR s1_evt1[rip], 0
je .L1377
.L1387:
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 14[rsp]
jne .L1375
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
jne .L1388
cmp BYTE PTR s1_evt1[rip], 0
je .L1377
.L1388:
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, BYTE PTR 13[rsp]
jne .L1375
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
jne .L1389
cmp BYTE PTR s1_evt1[rip], 0
je .L1377
.L1389:
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, BYTE PTR 12[rsp]
jne .L1375
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
jne .L1390
cmp BYTE PTR s1_evt1[rip], 0
je .L1377
.L1390:
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, BYTE PTR 11[rsp]
jne .L1375
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
jne .L1391
cmp BYTE PTR s1_evt1[rip], 0
je .L1377
.L1391:
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, BYTE PTR 10[rsp]
jne .L1375
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
jne .L1392
cmp BYTE PTR s1_evt1[rip], 0
je .L1377
.L1392:
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, BYTE PTR 9[rsp]
jne .L1375
movzx ebx, BYTE PTR 22[rsp]
or bl, BYTE PTR s1_evt0[rip]
jne .L1393
cmp BYTE PTR s1_evt1[rip], 0
je .L1377
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
jne .L1375
cmp BYTE PTR s1_evt0[rip], 0
jne .L1394
cmp BYTE PTR s1_evt1[rip], 0
je .L1377
.L1394:
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
jne .L1375
jmp .L1377
.L1393:
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
je .L1394
jmp .L1375
.L1365:
cmp BYTE PTR bus_l0[rip], 0
je .L1361
cmp BYTE PTR bus_l1[rip], 0
je .L1361
test bpl, bpl
je .L1361
jmp .L2565
.L6284:
movzx ebx, BYTE PTR bus_evt1[rip]
mov BYTE PTR 7[rsp], bl
test bl, bl
je .L1366
jmp .L6568
.L6247:
movzx r10d, BYTE PTR s13_evt1[rip]
or r10d, r15d
or r10b, BYTE PTR 13[rsp]
jne .L1375
movzx ebx, BYTE PTR 42[rsp]
or bl, BYTE PTR 14[rsp]
movzx r12d, BYTE PTR s14_evt0[rip]
jne .L1542
cmp BYTE PTR 57[rsp], 0
je .L1541
.L1542:
movzx r10d, BYTE PTR s14_evt1[rip]
or r10d, r12d
or r10b, BYTE PTR 12[rsp]
jne .L1375
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, BYTE PTR 11[rsp]
jne .L1375
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, BYTE PTR 10[rsp]
jne .L1375
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, BYTE PTR 9[rsp]
jne .L1375
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
jne .L1375
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
jne .L1375
jmp .L1541
.L6245:
movzx r10d, BYTE PTR 42[rsp]
or r10b, BYTE PTR s12_evt1[rip]
or r10b, BYTE PTR 14[rsp]
jne .L1375
movzx ebx, BYTE PTR 35[rsp]
or bl, BYTE PTR 15[rsp]
movzx r15d, BYTE PTR s13_evt0[rip]
jne .L1534
cmp BYTE PTR 53[rsp], 0
je .L1533
.L1534:
movzx r10d, BYTE PTR s13_evt1[rip]
or r10d, r15d
or r10b, BYTE PTR 13[rsp]
jne .L1375
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, BYTE PTR 12[rsp]
jne .L1375
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, BYTE PTR 11[rsp]
jne .L1375
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, BYTE PTR 10[rsp]
jne .L1375
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, BYTE PTR 9[rsp]
jne .L1375
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
jne .L1375
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
jne .L1375
jmp .L1533
.L6243:
movzx r10d, BYTE PTR 35[rsp]
or r10b, BYTE PTR s11_evt1[rip]
or r10b, BYTE PTR 15[rsp]
jne .L1375
movzx ebx, BYTE PTR 38[rsp]
or bl, BYTE PTR 20[rsp]
movzx ebx, BYTE PTR s12_evt0[rip]
jne .L1526
cmp BYTE PTR 52[rsp], 0
mov BYTE PTR 42[rsp], bl
je .L1525
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 14[rsp]
jne .L1375
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, BYTE PTR 13[rsp]
jne .L1375
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, BYTE PTR 12[rsp]
jne .L1375
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, BYTE PTR 11[rsp]
jne .L1375
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, BYTE PTR 10[rsp]
jne .L1375
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, BYTE PTR 9[rsp]
jne .L1375
cmp BYTE PTR 52[rsp], 0
je .L1525
.L6570:
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
jne .L1375
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
jne .L1375
jmp .L1525
.L6241:
movzx r10d, BYTE PTR 38[rsp]
or r10b, BYTE PTR s10_evt1[rip]
or r10b, BYTE PTR 20[rsp]
jne .L1375
movzx ebx, BYTE PTR 34[rsp]
or bl, BYTE PTR 21[rsp]
movzx ebx, BYTE PTR s11_evt0[rip]
jne .L1516
cmp BYTE PTR 51[rsp], 0
mov BYTE PTR 35[rsp], bl
je .L1515
.L6583:
or bl, BYTE PTR s11_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 15[rsp]
jne .L1375
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 14[rsp]
jne .L1375
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, BYTE PTR 13[rsp]
jne .L1375
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, BYTE PTR 12[rsp]
jne .L1375
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, BYTE PTR 11[rsp]
jne .L1375
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, BYTE PTR 10[rsp]
jne .L1375
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, BYTE PTR 9[rsp]
jne .L1375
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
jne .L1375
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
jne .L1375
jmp .L1515
.L1526:
mov BYTE PTR 42[rsp], bl
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 14[rsp]
jne .L1375
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, BYTE PTR 13[rsp]
jne .L1375
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, BYTE PTR 12[rsp]
jne .L1375
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, BYTE PTR 11[rsp]
jne .L1375
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, BYTE PTR 10[rsp]
jne .L1375
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, BYTE PTR 9[rsp]
je .L6570
jmp .L1375
.L1516:
mov BYTE PTR 35[rsp], bl
jmp .L6583
.L6231:
movzx r10d, BYTE PTR 33[rsp]
or r10b, BYTE PTR s5_evt1[rip]
or r10b, BYTE PTR 26[rsp]
jne .L1375
movzx ebx, BYTE PTR 32[rsp]
or bl, BYTE PTR 27[rsp]
movzx ebx, BYTE PTR s6_evt0[rip]
jne .L1454
cmp BYTE PTR 44[rsp], 0
mov BYTE PTR 41[rsp], bl
je .L1453
or bl, BYTE PTR s6_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 25[rsp]
jne .L1375
movzx ebx, BYTE PTR s7_evt0[rip]
or bl, BYTE PTR s7_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 24[rsp]
jne .L1375
movzx ebx, BYTE PTR s8_evt0[rip]
or bl, BYTE PTR s8_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 23[rsp]
jne .L1375
movzx ebx, BYTE PTR s9_evt0[rip]
or bl, BYTE PTR s9_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 21[rsp]
jne .L1375
movzx ebx, BYTE PTR s10_evt0[rip]
or bl, BYTE PTR s10_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 20[rsp]
jne .L1375
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 15[rsp]
jne .L1375
cmp BYTE PTR 44[rsp], 0
je .L1453
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 14[rsp]
jne .L1375
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, BYTE PTR 13[rsp]
jne .L1375
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, BYTE PTR 12[rsp]
jne .L1375
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, BYTE PTR 11[rsp]
jne .L1375
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, BYTE PTR 10[rsp]
jne .L1375
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, BYTE PTR 9[rsp]
jne .L1375
.L3016:
cmp BYTE PTR 44[rsp], 0
je .L1453
.L6569:
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
jne .L1375
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
jne .L1375
jmp .L1453
.L6202:
movzx r10d, BYTE PTR 39[rsp]
or r10b, BYTE PTR s3_evt1[rip]
or r10b, BYTE PTR 28[rsp]
jne .L1375
movzx ebx, BYTE PTR 43[rsp]
or bl, BYTE PTR 29[rsp]
movzx ebx, BYTE PTR s4_evt0[rip]
jne .L1396
cmp BYTE PTR 45[rsp], 0
mov BYTE PTR 32[rsp], bl
je .L1395
or bl, BYTE PTR s4_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 27[rsp]
jne .L1375
movzx ebx, BYTE PTR s5_evt0[rip]
or bl, BYTE PTR s5_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 26[rsp]
jne .L1375
movzx ebx, BYTE PTR s6_evt0[rip]
or bl, BYTE PTR s6_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 25[rsp]
jne .L1375
movzx ebx, BYTE PTR s7_evt0[rip]
or bl, BYTE PTR s7_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 24[rsp]
jne .L1375
movzx ebx, BYTE PTR s8_evt0[rip]
or bl, BYTE PTR s8_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 23[rsp]
jne .L1375
movzx ebx, BYTE PTR s9_evt0[rip]
or bl, BYTE PTR s9_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 21[rsp]
jne .L1375
movzx ebx, BYTE PTR s10_evt0[rip]
or bl, BYTE PTR s10_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 20[rsp]
jne .L1375
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 15[rsp]
jne .L1375
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 14[rsp]
jne .L1375
.L3040:
cmp BYTE PTR 45[rsp], 0
je .L1395
.L1414:
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, BYTE PTR 13[rsp]
jne .L1375
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, BYTE PTR 12[rsp]
jne .L1375
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, BYTE PTR 11[rsp]
jne .L1375
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, BYTE PTR 10[rsp]
jne .L1375
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, BYTE PTR 9[rsp]
jne .L1375
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
jne .L1375
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
jne .L1375
jmp .L1395
.L6217:
movzx r10d, BYTE PTR 32[rsp]
or r10b, BYTE PTR s4_evt1[rip]
or r10b, BYTE PTR 27[rsp]
jne .L1375
movzx ebx, BYTE PTR 39[rsp]
or bl, BYTE PTR 28[rsp]
movzx ebx, BYTE PTR s5_evt0[rip]
jne .L1426
cmp BYTE PTR 46[rsp], 0
mov BYTE PTR 33[rsp], bl
je .L1425
or bl, BYTE PTR s5_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 26[rsp]
jne .L1375
movzx ebx, BYTE PTR s6_evt0[rip]
or bl, BYTE PTR s6_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 25[rsp]
jne .L1375
movzx ebx, BYTE PTR s7_evt0[rip]
or bl, BYTE PTR s7_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 24[rsp]
jne .L1375
movzx ebx, BYTE PTR s8_evt0[rip]
or bl, BYTE PTR s8_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 23[rsp]
jne .L1375
movzx ebx, BYTE PTR s9_evt0[rip]
or bl, BYTE PTR s9_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 21[rsp]
jne .L1375
movzx ebx, BYTE PTR s10_evt0[rip]
or bl, BYTE PTR s10_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 20[rsp]
jne .L1375
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 15[rsp]
jne .L1375
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 14[rsp]
jne .L1375
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, BYTE PTR 13[rsp]
jne .L1375
.L3026:
cmp BYTE PTR 46[rsp], 0
je .L1425
.L1444:
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, BYTE PTR 12[rsp]
jne .L1375
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, BYTE PTR 11[rsp]
jne .L1375
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, BYTE PTR 10[rsp]
jne .L1375
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, BYTE PTR 9[rsp]
jne .L1375
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
jne .L1375
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
jne .L1375
jmp .L1425
.L1454:
mov BYTE PTR 41[rsp], bl
or bl, BYTE PTR s6_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 25[rsp]
jne .L1375
movzx ebx, BYTE PTR s7_evt0[rip]
or bl, BYTE PTR s7_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 24[rsp]
jne .L1375
movzx ebx, BYTE PTR s8_evt0[rip]
or bl, BYTE PTR s8_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 23[rsp]
jne .L1375
movzx ebx, BYTE PTR s9_evt0[rip]
or bl, BYTE PTR s9_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 21[rsp]
jne .L1375
movzx ebx, BYTE PTR s10_evt0[rip]
or bl, BYTE PTR s10_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 20[rsp]
jne .L1375
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 15[rsp]
jne .L1375
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 14[rsp]
jne .L1375
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, BYTE PTR 13[rsp]
jne .L1375
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, BYTE PTR 12[rsp]
jne .L1375
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, BYTE PTR 11[rsp]
jne .L1375
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, BYTE PTR 10[rsp]
jne .L1375
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, BYTE PTR 9[rsp]
jne .L1375
movzx ebx, BYTE PTR 32[rsp]
or bl, BYTE PTR 27[rsp]
jne .L6569
jmp .L3016
.L1396:
mov BYTE PTR 32[rsp], bl
or bl, BYTE PTR s4_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 27[rsp]
jne .L1375
movzx ebx, BYTE PTR s5_evt0[rip]
or bl, BYTE PTR s5_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 26[rsp]
jne .L1375
movzx ebx, BYTE PTR s6_evt0[rip]
or bl, BYTE PTR s6_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 25[rsp]
jne .L1375
movzx ebx, BYTE PTR s7_evt0[rip]
or bl, BYTE PTR s7_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 24[rsp]
jne .L1375
movzx ebx, BYTE PTR s8_evt0[rip]
or bl, BYTE PTR s8_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 23[rsp]
jne .L1375
movzx ebx, BYTE PTR s9_evt0[rip]
or bl, BYTE PTR s9_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 21[rsp]
jne .L1375
movzx ebx, BYTE PTR s10_evt0[rip]
or bl, BYTE PTR s10_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 20[rsp]
jne .L1375
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 15[rsp]
jne .L1375
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 14[rsp]
jne .L1375
movzx ebx, BYTE PTR 43[rsp]
or bl, BYTE PTR 29[rsp]
jne .L1414
jmp .L3040
.L1426:
mov BYTE PTR 33[rsp], bl
or bl, BYTE PTR s5_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 26[rsp]
jne .L1375
movzx ebx, BYTE PTR s6_evt0[rip]
or bl, BYTE PTR s6_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 25[rsp]
jne .L1375
movzx ebx, BYTE PTR s7_evt0[rip]
or bl, BYTE PTR s7_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 24[rsp]
jne .L1375
movzx ebx, BYTE PTR s8_evt0[rip]
or bl, BYTE PTR s8_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 23[rsp]
jne .L1375
movzx ebx, BYTE PTR s9_evt0[rip]
or bl, BYTE PTR s9_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 21[rsp]
jne .L1375
movzx ebx, BYTE PTR s10_evt0[rip]
or bl, BYTE PTR s10_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 20[rsp]
jne .L1375
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 15[rsp]
jne .L1375
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 14[rsp]
jne .L1375
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, BYTE PTR 13[rsp]
jne .L1375
movzx ebx, BYTE PTR 39[rsp]
or bl, BYTE PTR 28[rsp]
jne .L1444
jmp .L3026
.L6239:
movzx r10d, BYTE PTR 34[rsp]
or r10b, BYTE PTR s9_evt1[rip]
or r10b, BYTE PTR 21[rsp]
jne .L1375
movzx ebx, BYTE PTR 37[rsp]
or bl, BYTE PTR 23[rsp]
movzx ebx, BYTE PTR s10_evt0[rip]
jne .L1506
cmp BYTE PTR 50[rsp], 0
mov BYTE PTR 38[rsp], bl
je .L1505
or bl, BYTE PTR s10_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 20[rsp]
jne .L1375
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 15[rsp]
jne .L1375
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 14[rsp]
jne .L1375
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, BYTE PTR 13[rsp]
jne .L1375
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, BYTE PTR 12[rsp]
jne .L1375
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, BYTE PTR 11[rsp]
jne .L1375
cmp BYTE PTR 50[rsp], 0
je .L1505
.L6577:
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, BYTE PTR 10[rsp]
jne .L1375
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, BYTE PTR 9[rsp]
jne .L1375
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
jne .L1375
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
jne .L1375
jmp .L1505
.L6237:
movzx r10d, BYTE PTR 37[rsp]
or r10b, BYTE PTR s8_evt1[rip]
or r10b, BYTE PTR 23[rsp]
jne .L1375
movzx ebx, BYTE PTR 40[rsp]
or bl, BYTE PTR 24[rsp]
movzx ebx, BYTE PTR s9_evt0[rip]
jne .L1494
cmp BYTE PTR 49[rsp], 0
mov BYTE PTR 34[rsp], bl
je .L1493
.L6584:
or bl, BYTE PTR s9_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 21[rsp]
jne .L1375
movzx ebx, BYTE PTR s10_evt0[rip]
or bl, BYTE PTR s10_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 20[rsp]
jne .L1375
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 15[rsp]
jne .L1375
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 14[rsp]
jne .L1375
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, BYTE PTR 13[rsp]
jne .L1375
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, BYTE PTR 12[rsp]
jne .L1375
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, BYTE PTR 11[rsp]
jne .L1375
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, BYTE PTR 10[rsp]
jne .L1375
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, BYTE PTR 9[rsp]
jne .L1375
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
jne .L1375
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
jne .L1375
jmp .L1493
.L1506:
mov BYTE PTR 38[rsp], bl
or bl, BYTE PTR s10_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 20[rsp]
jne .L1375
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 15[rsp]
jne .L1375
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 14[rsp]
jne .L1375
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, BYTE PTR 13[rsp]
jne .L1375
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, BYTE PTR 12[rsp]
jne .L1375
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, BYTE PTR 11[rsp]
je .L6577
jmp .L1375
.L1494:
mov BYTE PTR 34[rsp], bl
jmp .L6584
.L6235:
movzx r10d, BYTE PTR 40[rsp]
or r10b, BYTE PTR s7_evt1[rip]
or r10b, BYTE PTR 24[rsp]
jne .L1375
movzx ebx, BYTE PTR 41[rsp]
or bl, BYTE PTR 25[rsp]
movzx ebx, BYTE PTR s8_evt0[rip]
jne .L1482
cmp BYTE PTR 48[rsp], 0
mov BYTE PTR 37[rsp], bl
je .L1481
or bl, BYTE PTR s8_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 23[rsp]
jne .L1375
movzx ebx, BYTE PTR s9_evt0[rip]
or bl, BYTE PTR s9_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 21[rsp]
jne .L1375
movzx ebx, BYTE PTR s10_evt0[rip]
or bl, BYTE PTR s10_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 20[rsp]
jne .L1375
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 15[rsp]
jne .L1375
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 14[rsp]
jne .L1375
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, BYTE PTR 13[rsp]
jne .L1375
cmp BYTE PTR 48[rsp], 0
je .L1481
.L6582:
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, BYTE PTR 12[rsp]
jne .L1375
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, BYTE PTR 11[rsp]
jne .L1375
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, BYTE PTR 10[rsp]
jne .L1375
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, BYTE PTR 9[rsp]
jne .L1375
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
jne .L1375
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
jne .L1375
jmp .L1481
.L6233:
movzx r10d, BYTE PTR 41[rsp]
or r10b, BYTE PTR s6_evt1[rip]
or r10b, BYTE PTR 25[rsp]
jne .L1375
movzx ebx, BYTE PTR 33[rsp]
or bl, BYTE PTR 26[rsp]
movzx ebx, BYTE PTR s7_evt0[rip]
jne .L1468
cmp BYTE PTR 47[rsp], 0
mov BYTE PTR 40[rsp], bl
je .L1467
.L6585:
or bl, BYTE PTR s7_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 24[rsp]
jne .L1375
movzx ebx, BYTE PTR s8_evt0[rip]
or bl, BYTE PTR s8_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 23[rsp]
jne .L1375
movzx ebx, BYTE PTR s9_evt0[rip]
or bl, BYTE PTR s9_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 21[rsp]
jne .L1375
movzx ebx, BYTE PTR s10_evt0[rip]
or bl, BYTE PTR s10_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 20[rsp]
jne .L1375
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 15[rsp]
jne .L1375
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 14[rsp]
jne .L1375
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, BYTE PTR 13[rsp]
jne .L1375
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, BYTE PTR 12[rsp]
jne .L1375
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, BYTE PTR 11[rsp]
jne .L1375
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, BYTE PTR 10[rsp]
jne .L1375
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, BYTE PTR 9[rsp]
jne .L1375
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, BYTE PTR 8[rsp]
jne .L1375
movzx r13d, BYTE PTR s19_evt0[rip]
or r13b, BYTE PTR s19_evt1[rip]
or r13b, r14b
jne .L1375
jmp .L1467
.L1482:
mov BYTE PTR 37[rsp], bl
or bl, BYTE PTR s8_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 23[rsp]
jne .L1375
movzx ebx, BYTE PTR s9_evt0[rip]
or bl, BYTE PTR s9_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 21[rsp]
jne .L1375
movzx ebx, BYTE PTR s10_evt0[rip]
or bl, BYTE PTR s10_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 20[rsp]
jne .L1375
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 15[rsp]
jne .L1375
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
mov r10d, ebx
or r10b, BYTE PTR 14[rsp]
jne .L1375
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, BYTE PTR 13[rsp]
je .L6582
jmp .L1375
.L1468:
mov BYTE PTR 40[rsp], bl
jmp .L6585
.L1364:
cmp BYTE PTR bus_l0[rip], 0
jne .L1728
.L1368:
pxor xmm4, xmm4
ucomiss xmm3, xmm4
jp .L1366
comiss xmm3, xmm4
je .L1725
jmp .L1366
.L1363:
cmp BYTE PTR 7[rsp], 0
jne .L1366
jmp .L2023
.L1358:
pxor xmm4, xmm4
ucomiss xmm3, xmm4
jp .L1366
comiss xmm3, xmm4
jne .L1366
cmp BYTE PTR bus_l0[rip], 0
je .L1725
.L1728:
cmp BYTE PTR bus_l1[rip], 0
je .L1368
test bpl, bpl
je .L1368
xor r10d, r10d
cmp BYTE PTR _x_bus_l1[rip], 0
jne .L95
jmp .L1368
.L1359:
pxor xmm5, xmm5
ucomiss xmm3, xmm5
jp .L3540
comiss xmm3, xmm5
je .L2566
jmp .L1369
.L6805:
cmp BYTE PTR bus_l1[rip], 0
jne .L2569
pxor xmm5, xmm5
mov r11d, 1
ucomiss xmm3, xmm5
setp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L2569
mov BYTE PTR 7[rsp], 0
.L2570:
movzx r15d, BYTE PTR 7[rsp]
movzx r10d, BYTE PTR bus_evt0[rip]
or r10b, BYTE PTR bus_evt1[rip]
or r15b, r10b
je .L2566
xor r10d, r10d
jmp .L95
.L6777:
test bpl, bpl
jne .L1336
cmp BYTE PTR bus_l1[rip], 0
movzx r11d, BYTE PTR _x_bus_l1[rip]
je .L1336
mov BYTE PTR 7[rsp], 0
.L3050:
xor r10d, r10d
or r11b, BYTE PTR bus_l0[rip]
je .L95
cmp BYTE PTR 7[rsp], 0
je .L1336
.L2036:
cmp BYTE PTR bus_evt1[rip], 0
je .L1342
.L2574:
cmp BYTE PTR bus_evt0[rip], 0
jne .L1343
comiss xmm5, DWORD PTR .LC1[rip]
jb .L1342
ucomiss xmm5, xmm4
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
jne .L1344
.L1342:
pxor xmm7, xmm7
ucomiss xmm3, xmm7
jp .L1733
comiss xmm3, xmm7
je .L1734
.L1733:
cmp BYTE PTR bus_evt0[rip], 0
jne .L1346
cmp BYTE PTR bus_evt1[rip], 0
jne .L1346
.L2572:
comiss xmm5, DWORD PTR .LC1[rip]
jnb .L1344
pxor xmm7, xmm7
ucomiss xmm4, xmm7
jp .L1344
je .L1346
.L1344:
pxor xmm7, xmm7
ucomiss xmm3, xmm7
jp .L1346
comiss xmm3, xmm7
jne .L1346
.L1349:
cmp BYTE PTR bus_l1[rip], 0
je .L1346
cmp BYTE PTR bus_l0[rip], 0
jne .L1350
test bpl, bpl
je .L1351
xor r10d, r10d
cmp BYTE PTR _x_bus_l1[rip], 0
je .L95
comiss xmm5, DWORD PTR .LC1[rip]
jnb .L1351
jmp .L2571
.L1343:
pxor xmm7, xmm7
ucomiss xmm3, xmm7
jp .L1346
comiss xmm3, xmm7
jne .L1346
.L1734:
cmp BYTE PTR bus_l1[rip], 0
jne .L6803
.L2033:
cmp BYTE PTR bus_evt0[rip], 0
jne .L1344
cmp BYTE PTR bus_evt1[rip], 0
jne .L1344
jmp .L2572
.L1350:
test bpl, bpl
jne .L2030
jmp .L1351
.L6803:
cmp BYTE PTR bus_l0[rip], 0
jne .L2033
cmp BYTE PTR _x_bus_l1[rip], 0
je .L2033
xor r10d, r10d
test bpl, bpl
jne .L2033
jmp .L95
.L6197:
movzx r10d, BYTE PTR bus_evt0[rip]
mov r15d, r10d
or r15b, BYTE PTR bus_evt1[rip]
mov BYTE PTR 7[rsp], r15b
je .L1346
cmp BYTE PTR bus_l1[rip], 0
jne .L6804
.L1731:
pxor xmm7, xmm7
ucomiss xmm3, xmm7
jp .L3380
comiss xmm3, xmm7
jne .L3380
mov BYTE PTR 7[rsp], r10b
test r10b, r10b
jne .L3381
cmp BYTE PTR bus_evt1[rip], 0
je .L1346
jmp .L1349
.L6778:
mov r10d, ebx
sub r10d, r12d
add r10d, 1
je .L1354
cmp BYTE PTR bus_l0[rip], 0
jne .L6805
.L2569:
pxor xmm5, xmm5
ucomiss xmm3, xmm5
jp .L2023
comiss xmm3, xmm5
je .L2566
jmp .L2023
.L3381:
mov BYTE PTR 7[rsp], 0
jmp .L1349
.L6775:
mov ebx, DWORD PTR _x_bus_j[rip]
cmp DWORD PTR bus_j[rip], ebx
jne .L1327
pxor xmm7, xmm7
ucomiss xmm4, xmm7
setnp r11b
cmove r10d, r11d
test r10b, r10b
je .L1327
mov r12d, ebx
.L1328:
pxor xmm7, xmm7
ucomiss xmm3, xmm7
jp .L1735
comiss xmm3, xmm7
je .L6269
.L1735:
cmp BYTE PTR bus_evt1[rip], 0
jne .L2574
jmp .L1733
.L6269:
test bpl, bpl
jne .L2036
cmp BYTE PTR bus_l1[rip], 0
movzx r11d, BYTE PTR _x_bus_l1[rip]
je .L2036
jmp .L3050
.L6804:
cmp BYTE PTR bus_l0[rip], 0
jne .L1731
cmp BYTE PTR _x_bus_l1[rip], 0
je .L1731
test bpl, bpl
jne .L1731
xor r10d, r10d
jmp .L95
.L1326:
pxor xmm7, xmm7
movzx r15d, BYTE PTR bus_l0[rip]
movzx r13d, BYTE PTR bus_l1[rip]
mov r10d, 1
ucomiss xmm3, xmm7
mov ebx, r15d
setp r11b
cmovne r11d, r10d
or bl, r13b
jne .L2575
test r11b, r11b
je .L2576
.L2575:
mov ebx, DWORD PTR _x_bus_j[rip]
.L2038:
mov r12d, ebx
test bpl, bpl
je .L1333
cmp BYTE PTR _x_bus_l1[rip], 0
je .L1333
jmp .L1332
.L6776:
movzx r10d, BYTE PTR bus_evt0[rip]
movzx r11d, BYTE PTR bus_evt1[rip]
movzx r15d, BYTE PTR 7[rsp]
or r11d, r10d
or r15b, r11b
je .L1334
xor r10d, r10d
jmp .L95
.L3373:
xor r10d, r10d
jmp .L95
.L3372:
xor r10d, r10d
jmp .L95
.L3374:
xor r10d, r10d
jmp .L95
.L6808:
or r10b, BYTE PTR s0_l1[rip]
jne .L2043
.L3052:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L1312
comiss xmm6, DWORD PTR delta[rip]
jne .L1312
movzx r10d, BYTE PTR s0_evt0[rip]
or r10b, BYTE PTR s0_evt1[rip]
or BYTE PTR 30[rsp], r10b
je .L1313
xor r10d, r10d
jmp .L95
.L2576:
movzx r10d, BYTE PTR bus_evt0[rip]
or r10b, BYTE PTR bus_evt1[rip]
or BYTE PTR 7[rsp], r10b
je .L1331
xor r10d, r10d
jmp .L95
.L1325:
pxor xmm7, xmm7
movzx r15d, BYTE PTR bus_l0[rip]
movzx r13d, BYTE PTR bus_l1[rip]
mov r10d, 1
ucomiss xmm3, xmm7
mov ebx, r15d
setp r11b
cmovne r11d, r10d
or bl, r13b
jne .L1330
xor r10d, r10d
test r11b, r11b
jne .L1330
jmp .L95
.L1312:
cmp BYTE PTR 30[rsp], 0
je .L1313
.L2043:
movzx r10d, BYTE PTR s0_evt0[rip]
or r10b, BYTE PTR s0_evt1[rip]
jne .L1310
.L3051:
comiss xmm4, DWORD PTR s0_backoff[rip]
jnb .L1313
jmp .L1310
.L1331:
mov ebx, DWORD PTR bus_j[rip]
mov r12d, DWORD PTR _x_bus_j[rip]
cmp r12d, ebx
jne .L2039
xor r11d, r11d
jmp .L2038
.L1317:
cmp BYTE PTR _x_bus_l1[rip], 0
je .L6806
movss xmm4, DWORD PTR _x_bus_x[rip]
comiss xmm4, DWORD PTR .LC1[rip]
jnb .L2040
movss xmm6, DWORD PTR _x_delta[rip]
pxor xmm5, xmm5
ucomiss xmm6, xmm5
jp .L3858
je .L1737
.L3858:
xor r10d, r10d
jmp .L95
.L2040:
movss xmm6, DWORD PTR _x_delta[rip]
pxor xmm5, xmm5
ucomiss xmm6, xmm5
jp .L3856
je .L1737
.L3856:
xor r10d, r10d
jmp .L95
.L6806:
movss xmm4, DWORD PTR _x_bus_x[rip]
xor r10d, r10d
comiss xmm4, DWORD PTR .LC1[rip]
jnb .L95
jmp .L6565
.L6774:
xor r10d, r10d
cmp BYTE PTR _x_bus_evt1[rip], 0
jne .L95
jmp .L1315
.L1314:
xor r10d, r10d
cmp BYTE PTR _x_bus_evt0[rip], 0
jne .L95
jmp .L1315
.L1299:
test r11b, r11b
je .L6807
.L1304:
test bpl, bpl
jne .L1742
jmp .L1303
.L6807:
test r12b, r12b
je .L1305
jmp .L2581
.L1298:
test r11b, r11b
jne .L2045
jmp .L1303
.L1309:
test bpl, bpl
je .L2043
movzx r10d, BYTE PTR _x_s0_l1[rip]
test r12b, r12b
jne .L6808
movzx r10d, BYTE PTR s0_evt0[rip]
or r10b, BYTE PTR s0_evt1[rip]
je .L3051
jmp .L1313
.L1302:
test r11b, r11b
jne .L1743
jmp .L2582
.L1300:
test r11b, r11b
jne .L1304
jmp .L1305
.L6773:
cmp BYTE PTR s0_l1[rip], 0
jne .L1313
pxor xmm4, xmm4
ucomiss xmm4, DWORD PTR delta[rip]
jp .L1313
comiss xmm4, DWORD PTR delta[rip]
jne .L1313
movzx r11d, BYTE PTR s0_evt0[rip]
xor r10d, r10d
or r11b, BYTE PTR s0_evt1[rip]
or BYTE PTR 30[rsp], r11b
jne .L95
jmp .L1313
.L1294:
test bl, bl
je .L2047
mov BYTE PTR 30[rsp], bl
jmp .L2048
.L6770:
cmp BYTE PTR s0_evt1[rip], 0
je .L1290
mov r10d, ebx
or r10b, BYTE PTR s0_evt0[rip]
mov BYTE PTR 30[rsp], r10b
jne .L1290
movss xmm3, DWORD PTR s0_backoff[rip]
comiss xmm3, xmm6
jnb .L1292
.L1293:
xor ebx, ebx
test bpl, bpl
je .L3053
.L2047:
movzx ebx, BYTE PTR s0_evt0[rip]
mov BYTE PTR 30[rsp], bl
test bl, bl
jne .L3602
jmp .L2048
.L6768:
cmp BYTE PTR _x_s0_l1[rip], 0
mov r11d, r10d
mov r13d, r10d
je .L1288
jmp .L1287
.L6771:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L1295
comiss xmm5, DWORD PTR delta[rip]
jne .L1295
movzx r10d, BYTE PTR s0_evt0[rip]
or r10b, BYTE PTR s0_evt1[rip]
or r10b, bl
mov BYTE PTR 30[rsp], r10b
je .L1296
xor r10d, r10d
jmp .L95
.L1253:
xor r10d, r10d
cmp BYTE PTR _x_s0_evt0[rip], 0
jne .L95
jmp .L1254
.L1255:
xor r10d, r10d
cmp BYTE PTR _x_s0_l1[rip], 0
jne .L95
jmp .L1752
.L1269:
test bpl, bpl
je .L6809
movzx ebx, BYTE PTR _x_s0_l1[rip]
test bl, bl
jne .L6810
movss xmm3, DWORD PTR s0_lambda[rip]
ucomiss xmm4, xmm3
jp .L1280
je .L2054
.L1280:
test bpl, bpl
jne .L2053
.L2052:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, ebp
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
mov r11d, r10d
cmovne r11d, ebp
jmp .L1287
.L6810:
movss xmm3, DWORD PTR s0_lambda[rip]
ucomiss xmm4, xmm3
jp .L3879
je .L2054
.L3879:
xor ebx, ebx
.L1750:
mov r11d, r12d
or r11b, BYTE PTR _x_s0_l1[rip]
je .L6811
.L2050:
pxor xmm4, xmm4
mov r10d, 0
ucomiss xmm5, xmm4
setnp r11b
cmove r10d, r11d
xor r11d, r11d
mov r13d, r10d
jmp .L1287
.L6809:
mov ebx, r12d
or bl, BYTE PTR _x_s0_l1[rip]
je .L6812
movzx ebx, BYTE PTR _x_s0_l1[rip]
test bl, bl
je .L1276
xor ebx, ebx
.L2588:
mov r11d, r12d
or r11b, BYTE PTR s0_l1[rip]
jne .L1278
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1278
comiss xmm7, DWORD PTR delta[rip]
jne .L1278
movzx r10d, BYTE PTR s0_evt0[rip]
or r10b, BYTE PTR s0_evt1[rip]
or bl, r10b
je .L1279
xor r10d, r10d
jmp .L95
.L1259:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s0_evt2[rip]
movzx r11d, BYTE PTR s0_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s0_evt1[rip]
je .L95
jmp .L1262
.L1279:
movss xmm3, DWORD PTR s0_lambda[rip]
ucomiss xmm4, xmm3
jp .L1745
je .L1285
.L1745:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
jmp .L1287
.L6766:
test bpl, bpl
jne .L2054
jmp .L2588
.L1241:
test r11b, r11b
jne .L1754
jmp .L2601
.L6765:
cmp BYTE PTR s1_l1[rip], 0
jne .L1252
pxor xmm4, xmm4
ucomiss xmm4, DWORD PTR delta[rip]
jp .L1252
comiss xmm4, DWORD PTR delta[rip]
jne .L1252
movzx r11d, BYTE PTR s1_evt0[rip]
xor r10d, r10d
or r11b, BYTE PTR s1_evt1[rip]
or BYTE PTR 22[rsp], r11b
jne .L95
jmp .L1252
.L6764:
mov BYTE PTR 22[rsp], 0
movzx r10d, BYTE PTR _x_s1_l1[rip]
test r12b, r12b
je .L1252
or r10b, BYTE PTR s1_l1[rip]
mov BYTE PTR 22[rsp], r10b
je .L3059
mov BYTE PTR 22[rsp], 0
jmp .L1252
.L1296:
test r11b, r11b
jne .L2583
jmp .L2582
.L6816:
or r10b, BYTE PTR s1_l1[rip]
jne .L2062
.L3059:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L1251
comiss xmm6, DWORD PTR delta[rip]
jne .L1251
movzx r10d, BYTE PTR s1_evt0[rip]
or r10b, BYTE PTR s1_evt1[rip]
or BYTE PTR 22[rsp], r10b
je .L1252
xor r10d, r10d
jmp .L95
.L1238:
test r11b, r11b
je .L6813
.L1243:
test bpl, bpl
jne .L1753
jmp .L1242
.L6813:
test r12b, r12b
je .L1244
jmp .L2600
.L1239:
test r11b, r11b
jne .L1243
jmp .L1244
.L1237:
test r11b, r11b
jne .L2064
jmp .L1242
.L1251:
cmp BYTE PTR 22[rsp], 0
je .L1252
.L2062:
movzx r10d, BYTE PTR s1_evt0[rip]
or r10b, BYTE PTR s1_evt1[rip]
jne .L1249
.L3058:
comiss xmm4, DWORD PTR s1_backoff[rip]
jnb .L1252
jmp .L1249
.L1276:
movss xmm3, DWORD PTR s0_lambda[rip]
ucomiss xmm4, xmm3
jp .L1280
jne .L1280
.L1746:
test bl, bl
je .L2054
.L1282:
cmp BYTE PTR s0_evt1[rip], 0
je .L1284
cmp BYTE PTR s0_evt0[rip], 0
je .L1285
jmp .L1284
.L6812:
movzx ebx, BYTE PTR s0_l1[rip]
test bl, bl
je .L3057
.L1274:
movss xmm3, DWORD PTR s0_lambda[rip]
ucomiss xmm4, xmm3
jp .L3859
je .L2054
.L3859:
xor ebx, ebx
jmp .L2052
.L1278:
movss xmm3, DWORD PTR s0_lambda[rip]
ucomiss xmm4, xmm3
jp .L2050
je .L1746
jmp .L2050
.L6811:
cmp BYTE PTR s0_l1[rip], 0
je .L2586
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
cmove r11d, r10d
jmp .L1287
.L6815:
mov r11d, r12d
or r11b, BYTE PTR _x_s0_l1[rip]
jne .L2057
cmp BYTE PTR s0_l1[rip], 0
jne .L2056
.L3057:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1273
comiss xmm7, DWORD PTR delta[rip]
jne .L1273
movzx r10d, BYTE PTR s0_evt0[rip]
or r10b, BYTE PTR s0_evt1[rip]
or r10b, bl
je .L1274
xor r10d, r10d
jmp .L95
.L6767:
cmp BYTE PTR s0_l1[rip], 0
jne .L1286
.L2586:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1286
comiss xmm7, DWORD PTR delta[rip]
jne .L1286
movzx r10d, BYTE PTR s0_evt0[rip]
or r10b, BYTE PTR s0_evt1[rip]
or bl, r10b
je .L1286
xor r10d, r10d
jmp .L95
.L1273:
test bl, bl
je .L1274
.L2056:
movzx r10d, BYTE PTR s0_evt0[rip]
or r10b, BYTE PTR s0_evt1[rip]
jne .L6814
.L1275:
movss xmm3, DWORD PTR s0_lambda[rip]
ucomiss xmm4, xmm3
jp .L1280
je .L1284
jmp .L1280
.L1286:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
je .L1287
mov r11d, r10d
mov r13d, r10d
jmp .L1288
.L6814:
movss xmm3, DWORD PTR s0_lambda[rip]
ucomiss xmm4, xmm3
jp .L2052
je .L1282
jmp .L2052
.L6769:
pxor xmm4, xmm4
ucomiss xmm4, DWORD PTR delta[rip]
jp .L1288
comiss xmm4, DWORD PTR delta[rip]
jne .L1288
movzx r10d, BYTE PTR s0_evt0[rip]
or r10b, BYTE PTR s0_evt1[rip]
or r10b, bl
je .L1289
xor r10d, r10d
jmp .L95
.L1270:
test bpl, bpl
je .L6815
.L2057:
movzx r10d, BYTE PTR s0_evt0[rip]
or r10b, BYTE PTR s0_evt1[rip]
je .L1275
cmp BYTE PTR _x_s0_l1[rip], 0
je .L1276
test bpl, bpl
je .L2588
movss xmm3, DWORD PTR s0_lambda[rip]
ucomiss xmm4, xmm3
jp .L1750
je .L1746
jmp .L1750
.L1248:
test bpl, bpl
je .L2062
movzx r10d, BYTE PTR _x_s1_l1[rip]
test r12b, r12b
jne .L6816
movzx r10d, BYTE PTR s1_evt0[rip]
or r10b, BYTE PTR s1_evt1[rip]
je .L3058
jmp .L1252
.L1289:
movss xmm4, DWORD PTR s0_x[rip]
jmp .L1293
.L1050:
test bl, bl
je .L2123
mov BYTE PTR 27[rsp], bl
jmp .L2124
.L1056:
test r11b, r11b
je .L1061
.L1060:
test bpl, bpl
jne .L1786
jmp .L1059
.L1058:
test r11b, r11b
je .L2658
.L1787:
test bpl, bpl
jne .L1786
jmp .L1061
.L6738:
cmp BYTE PTR s4_evt1[rip], 0
je .L1046
mov r10d, ebx
or r10b, BYTE PTR s4_evt0[rip]
mov BYTE PTR 27[rsp], r10b
jne .L1046
movss xmm3, DWORD PTR s4_backoff[rip]
comiss xmm3, xmm6
jnb .L1048
.L1049:
xor ebx, ebx
test bpl, bpl
je .L3081
.L2123:
movzx ebx, BYTE PTR s4_evt0[rip]
mov BYTE PTR 27[rsp], bl
test bl, bl
jne .L3614
jmp .L2124
.L1057:
test r11b, r11b
jne .L1787
jmp .L1061
.L1054:
test r11b, r11b
jne .L2121
jmp .L1059
.L6754:
cmp BYTE PTR s2_evt1[rip], 0
je .L1168
mov r10d, ebx
or r10b, BYTE PTR s2_evt0[rip]
mov BYTE PTR 29[rsp], r10b
jne .L1168
movss xmm3, DWORD PTR s2_backoff[rip]
comiss xmm3, xmm6
jnb .L1170
.L1171:
xor ebx, ebx
test bpl, bpl
je .L3067
.L2085:
movzx ebx, BYTE PTR s2_evt0[rip]
mov BYTE PTR 29[rsp], bl
test bl, bl
jne .L3608
jmp .L2086
.L6755:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L1173
comiss xmm5, DWORD PTR delta[rip]
jne .L1173
movzx r10d, BYTE PTR s2_evt0[rip]
or r10b, BYTE PTR s2_evt1[rip]
or r10b, bl
mov BYTE PTR 29[rsp], r10b
je .L1174
xor r10d, r10d
jmp .L95
.L1187:
test bpl, bpl
jne .L6817
.L2081:
movzx ebx, BYTE PTR s2_evt0[rip]
or bl, BYTE PTR s2_evt1[rip]
jne .L1188
.L3065:
comiss xmm4, DWORD PTR s2_backoff[rip]
jnb .L1191
jmp .L1188
.L1174:
test r11b, r11b
jne .L2621
jmp .L2620
.L6817:
movzx r10d, BYTE PTR _x_s2_l1[rip]
test r12b, r12b
jne .L6818
movzx ebx, BYTE PTR s2_evt0[rip]
or bl, BYTE PTR s2_evt1[rip]
je .L3065
jmp .L1191
.L1177:
test r11b, r11b
je .L6819
.L1182:
test bpl, bpl
jne .L1764
jmp .L1181
.L6819:
test r12b, r12b
je .L1183
jmp .L2619
.L1178:
test r11b, r11b
jne .L1182
jmp .L1183
.L1176:
test r11b, r11b
jne .L2083
jmp .L1181
.L6818:
or r10b, BYTE PTR s2_l1[rip]
jne .L2081
.L3066:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L1190
comiss xmm6, DWORD PTR delta[rip]
jne .L1190
movzx ebx, BYTE PTR s2_evt0[rip]
or bl, BYTE PTR s2_evt1[rip]
or BYTE PTR 29[rsp], bl
je .L1191
xor r10d, r10d
jmp .L95
.L6752:
cmp BYTE PTR _x_s2_l1[rip], 0
mov r11d, r10d
mov r13d, r10d
je .L1166
jmp .L1165
.L1148:
test bpl, bpl
je .L6820
.L2095:
movzx r11d, BYTE PTR s2_evt0[rip]
or r11b, BYTE PTR s2_evt1[rip]
je .L1153
cmp BYTE PTR _x_s2_l1[rip], 0
je .L1154
test bpl, bpl
jne .L1155
.L2626:
mov r11d, r12d
or r11b, BYTE PTR s2_l1[rip]
jne .L1156
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1156
comiss xmm7, DWORD PTR delta[rip]
jne .L1156
movzx r11d, BYTE PTR s2_evt0[rip]
or r11b, BYTE PTR s2_evt1[rip]
or bl, r11b
je .L1157
xor r10d, r10d
jmp .L95
.L1137:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s2_evt2[rip]
movzx r11d, BYTE PTR s2_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s2_evt1[rip]
je .L95
jmp .L1140
.L1147:
test bpl, bpl
je .L6821
movzx ebx, BYTE PTR _x_s2_l1[rip]
test bl, bl
jne .L6822
movss xmm3, DWORD PTR s2_lambda[rip]
ucomiss xmm4, xmm3
jp .L1158
je .L2092
.L1158:
test bpl, bpl
jne .L2091
.L2090:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, ebp
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
mov r11d, r10d
cmovne r11d, ebp
jmp .L1165
.L6822:
movss xmm3, DWORD PTR s2_lambda[rip]
ucomiss xmm4, xmm3
jp .L3881
je .L2092
.L3881:
xor ebx, ebx
.L1768:
mov r11d, r12d
or r11b, BYTE PTR _x_s2_l1[rip]
je .L6823
.L2088:
pxor xmm4, xmm4
mov r10d, 0
ucomiss xmm5, xmm4
setnp r11b
cmove r10d, r11d
xor r11d, r11d
mov r13d, r10d
jmp .L1165
.L6821:
mov ebx, r12d
or bl, BYTE PTR _x_s2_l1[rip]
je .L6824
movzx ebx, BYTE PTR _x_s2_l1[rip]
test bl, bl
je .L1154
xor ebx, ebx
jmp .L2626
.L6824:
movzx ebx, BYTE PTR s2_l1[rip]
test bl, bl
je .L3071
.L1152:
movss xmm3, DWORD PTR s2_lambda[rip]
ucomiss xmm4, xmm3
jp .L3861
je .L2092
.L3861:
xor ebx, ebx
jmp .L2090
.L6823:
cmp BYTE PTR s2_l1[rip], 0
je .L2624
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
cmove r11d, r10d
jmp .L1165
.L1111:
test bl, bl
je .L2104
mov BYTE PTR 28[rsp], bl
jmp .L2105
.L6746:
cmp BYTE PTR s3_evt1[rip], 0
je .L1107
mov r10d, ebx
or r10b, BYTE PTR s3_evt0[rip]
mov BYTE PTR 28[rsp], r10b
jne .L1107
movss xmm3, DWORD PTR s3_backoff[rip]
comiss xmm3, xmm6
jnb .L1109
.L1110:
xor ebx, ebx
test bpl, bpl
je .L3074
.L2104:
movzx ebx, BYTE PTR s3_evt0[rip]
mov BYTE PTR 28[rsp], bl
test bl, bl
jne .L3611
jmp .L2105
.L6744:
cmp BYTE PTR _x_s3_l1[rip], 0
mov r11d, r10d
mov r13d, r10d
je .L1105
jmp .L1104
.L6747:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L1112
comiss xmm5, DWORD PTR delta[rip]
jne .L1112
movzx r10d, BYTE PTR s3_evt0[rip]
or r10b, BYTE PTR s3_evt1[rip]
or r10b, bl
mov BYTE PTR 28[rsp], r10b
je .L1113
xor r10d, r10d
jmp .L95
.L6742:
test bpl, bpl
jne .L2111
.L2645:
mov r11d, r12d
or r11b, BYTE PTR s3_l1[rip]
jne .L1095
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1095
comiss xmm7, DWORD PTR delta[rip]
jne .L1095
movzx r11d, BYTE PTR s3_evt0[rip]
or r11b, BYTE PTR s3_evt1[rip]
or bl, r11b
je .L1096
xor r10d, r10d
jmp .L95
.L6743:
cmp BYTE PTR s3_l1[rip], 0
jne .L1103
.L2643:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1103
comiss xmm7, DWORD PTR delta[rip]
jne .L1103
movzx r11d, BYTE PTR s3_evt0[rip]
or r11b, BYTE PTR s3_evt1[rip]
or bl, r11b
je .L1103
xor r10d, r10d
jmp .L95
.L6745:
pxor xmm4, xmm4
ucomiss xmm4, DWORD PTR delta[rip]
jp .L1105
comiss xmm4, DWORD PTR delta[rip]
jne .L1105
movzx r10d, BYTE PTR s3_evt0[rip]
or r10b, BYTE PTR s3_evt1[rip]
or r10b, bl
je .L1106
xor r10d, r10d
jmp .L95
.L1103:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r11d
and r10b, r13b
je .L1104
mov r11d, r10d
mov r13d, r10d
jmp .L1105
.L1106:
movss xmm4, DWORD PTR s3_x[rip]
jmp .L1110
.L1087:
test bpl, bpl
je .L6825
.L2114:
movzx r11d, BYTE PTR s3_evt0[rip]
or r11b, BYTE PTR s3_evt1[rip]
je .L1092
cmp BYTE PTR _x_s3_l1[rip], 0
je .L1093
test bpl, bpl
je .L2645
movss xmm3, DWORD PTR s3_lambda[rip]
ucomiss xmm4, xmm3
jp .L1783
jne .L1783
.L1779:
test bl, bl
je .L2111
.L1099:
cmp BYTE PTR s3_evt1[rip], 0
je .L1101
cmp BYTE PTR s3_evt0[rip], 0
je .L1102
jmp .L1101
.L6833:
movss xmm3, DWORD PTR s3_lambda[rip]
ucomiss xmm4, xmm3
jp .L3882
je .L2111
.L3882:
xor ebx, ebx
.L1783:
mov r11d, r12d
or r11b, BYTE PTR _x_s3_l1[rip]
je .L6826
.L2107:
pxor xmm4, xmm4
mov r10d, 0
ucomiss xmm5, xmm4
setnp r11b
cmove r10d, r11d
xor r11d, r11d
mov r13d, r10d
jmp .L1104
.L1093:
movss xmm3, DWORD PTR s3_lambda[rip]
ucomiss xmm4, xmm3
jp .L1097
je .L1779
.L1097:
test bpl, bpl
jne .L2110
.L2109:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, ebp
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
mov r11d, r10d
cmovne r11d, ebp
jmp .L1104
.L6826:
cmp BYTE PTR s3_l1[rip], 0
je .L2643
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
cmove r11d, r10d
jmp .L1104
.L1092:
movss xmm3, DWORD PTR s3_lambda[rip]
ucomiss xmm4, xmm3
jp .L1097
je .L1101
jmp .L1097
.L6825:
mov r11d, r12d
or r11b, BYTE PTR _x_s3_l1[rip]
jne .L2114
cmp BYTE PTR s3_l1[rip], 0
je .L3078
.L2113:
movzx r11d, BYTE PTR s3_evt0[rip]
or r11b, BYTE PTR s3_evt1[rip]
je .L1092
movss xmm3, DWORD PTR s3_lambda[rip]
ucomiss xmm4, xmm3
jp .L2109
je .L1099
jmp .L2109
.L1096:
movss xmm3, DWORD PTR s3_lambda[rip]
ucomiss xmm4, xmm3
jp .L1778
je .L1102
.L1778:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
jmp .L1104
.L1095:
movss xmm3, DWORD PTR s3_lambda[rip]
ucomiss xmm4, xmm3
jp .L2107
je .L1779
jmp .L2107
.L6834:
movzx ebx, BYTE PTR s3_l1[rip]
test bl, bl
jne .L1091
.L3078:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1090
comiss xmm7, DWORD PTR delta[rip]
jne .L1090
movzx r11d, BYTE PTR s3_evt0[rip]
or r11b, BYTE PTR s3_evt1[rip]
mov r10d, r11d
or r10b, bl
je .L1091
xor r10d, r10d
jmp .L95
.L1116:
test r11b, r11b
je .L6827
.L1121:
test bpl, bpl
jne .L1775
jmp .L1120
.L6827:
test r12b, r12b
jne .L2638
.L1122:
cmp BYTE PTR 28[rsp], 0
je .L2639
test bpl, bpl
jne .L6828
.L2100:
movzx ebx, BYTE PTR s3_evt0[rip]
or bl, BYTE PTR s3_evt1[rip]
jne .L1127
.L3072:
comiss xmm4, DWORD PTR s3_backoff[rip]
jnb .L1130
jmp .L1127
.L1115:
test r11b, r11b
jne .L2102
jmp .L1120
.L6828:
movzx r10d, BYTE PTR _x_s3_l1[rip]
test r12b, r12b
jne .L6829
movzx ebx, BYTE PTR s3_evt0[rip]
or bl, BYTE PTR s3_evt1[rip]
je .L3072
jmp .L1130
.L1090:
test bl, bl
jne .L2113
.L1091:
movss xmm3, DWORD PTR s3_lambda[rip]
ucomiss xmm4, xmm3
jp .L3862
je .L2111
.L3862:
xor ebx, ebx
jmp .L2109
.L6829:
or r10b, BYTE PTR s3_l1[rip]
jne .L2100
.L3073:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L1129
comiss xmm6, DWORD PTR delta[rip]
jne .L1129
movzx ebx, BYTE PTR s3_evt0[rip]
or bl, BYTE PTR s3_evt1[rip]
or BYTE PTR 28[rsp], bl
je .L1130
xor r10d, r10d
jmp .L95
.L1129:
cmp BYTE PTR 28[rsp], 0
jne .L2100
jmp .L1130
.L1118:
test r11b, r11b
je .L1122
.L1776:
test bpl, bpl
jne .L1775
jmp .L1122
.L1117:
test r11b, r11b
jne .L1121
jmp .L1122
.L1119:
test r11b, r11b
jne .L1776
jmp .L2639
.L6749:
cmp BYTE PTR s3_l1[rip], 0
jne .L1130
pxor xmm4, xmm4
ucomiss xmm4, DWORD PTR delta[rip]
jp .L1130
comiss xmm4, DWORD PTR delta[rip]
jne .L1130
movzx ebx, BYTE PTR s3_evt0[rip]
xor r10d, r10d
or bl, BYTE PTR s3_evt1[rip]
or BYTE PTR 28[rsp], bl
jne .L95
jmp .L1130
.L1070:
xor r10d, r10d
cmp BYTE PTR _x_s3_evt0[rip], 0
jne .L95
jmp .L1071
.L6741:
cmp BYTE PTR s4_l1[rip], 0
jne .L1069
pxor xmm4, xmm4
ucomiss xmm4, DWORD PTR delta[rip]
jp .L1069
comiss xmm4, DWORD PTR delta[rip]
jne .L1069
movzx ebx, BYTE PTR s4_evt0[rip]
xor r10d, r10d
or bl, BYTE PTR s4_evt1[rip]
or BYTE PTR 27[rsp], bl
jne .L95
jmp .L1069
.L1065:
test bpl, bpl
jne .L6830
.L2119:
movzx ebx, BYTE PTR s4_evt0[rip]
or bl, BYTE PTR s4_evt1[rip]
jne .L1066
.L3079:
comiss xmm4, DWORD PTR s4_backoff[rip]
jnb .L1069
jmp .L1066
.L6740:
mov BYTE PTR 27[rsp], 0
movzx r10d, BYTE PTR _x_s4_l1[rip]
test r12b, r12b
je .L1069
or r10b, BYTE PTR s4_l1[rip]
mov BYTE PTR 27[rsp], r10b
je .L3080
mov BYTE PTR 27[rsp], 0
jmp .L1069
.L6830:
movzx r10d, BYTE PTR _x_s4_l1[rip]
test r12b, r12b
jne .L6831
movzx ebx, BYTE PTR s4_evt0[rip]
or bl, BYTE PTR s4_evt1[rip]
je .L3079
jmp .L1069
.L6831:
or r10b, BYTE PTR s4_l1[rip]
jne .L2119
.L3080:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L1068
comiss xmm6, DWORD PTR delta[rip]
jne .L1068
movzx ebx, BYTE PTR s4_evt0[rip]
or bl, BYTE PTR s4_evt1[rip]
or BYTE PTR 27[rsp], bl
je .L1069
xor r10d, r10d
jmp .L95
.L1068:
cmp BYTE PTR 27[rsp], 0
jne .L2119
jmp .L1069
.L1072:
xor r10d, r10d
cmp BYTE PTR _x_s3_l1[rip], 0
jne .L95
jmp .L1785
.L1086:
test bpl, bpl
je .L6832
movzx ebx, BYTE PTR _x_s3_l1[rip]
test bl, bl
jne .L6833
movss xmm3, DWORD PTR s3_lambda[rip]
ucomiss xmm4, xmm3
jp .L1097
je .L2111
jmp .L1097
.L1076:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s3_evt2[rip]
movzx r11d, BYTE PTR s3_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s3_evt1[rip]
je .L95
jmp .L1079
.L6832:
mov ebx, r12d
or bl, BYTE PTR _x_s3_l1[rip]
je .L6834
movzx ebx, BYTE PTR _x_s3_l1[rip]
test bl, bl
je .L1093
xor ebx, ebx
jmp .L2645
.L6739:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L1051
comiss xmm5, DWORD PTR delta[rip]
jne .L1051
movzx r10d, BYTE PTR s4_evt0[rip]
or r10b, BYTE PTR s4_evt1[rip]
or r10b, bl
mov BYTE PTR 27[rsp], r10b
je .L1052
xor r10d, r10d
jmp .L95
.L6736:
cmp BYTE PTR _x_s4_l1[rip], 0
mov r11d, r10d
mov r13d, r10d
je .L1044
jmp .L1043
.L6737:
pxor xmm4, xmm4
ucomiss xmm4, DWORD PTR delta[rip]
jp .L1044
comiss xmm4, DWORD PTR delta[rip]
jne .L1044
movzx r10d, BYTE PTR s4_evt0[rip]
or r10b, BYTE PTR s4_evt1[rip]
or r10b, bl
je .L1045
xor r10d, r10d
jmp .L95
.L1052:
test r11b, r11b
jne .L2659
jmp .L2658
.L1045:
movss xmm4, DWORD PTR s4_x[rip]
jmp .L1049
.L6735:
cmp BYTE PTR s4_l1[rip], 0
jne .L1042
.L2662:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1042
comiss xmm7, DWORD PTR delta[rip]
jne .L1042
movzx r11d, BYTE PTR s4_evt0[rip]
or r11b, BYTE PTR s4_evt1[rip]
or bl, r11b
je .L1042
xor r10d, r10d
jmp .L95
.L6734:
test bpl, bpl
jne .L2130
.L2664:
mov r11d, r12d
or r11b, BYTE PTR s4_l1[rip]
jne .L1034
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1034
comiss xmm7, DWORD PTR delta[rip]
jne .L1034
movzx r11d, BYTE PTR s4_evt0[rip]
or r11b, BYTE PTR s4_evt1[rip]
or bl, r11b
je .L1035
xor r10d, r10d
jmp .L95
.L1042:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
je .L1043
mov r11d, r10d
mov r13d, r10d
jmp .L1044
.L1035:
movss xmm3, DWORD PTR s4_lambda[rip]
ucomiss xmm4, xmm3
jp .L1795
je .L1041
.L1795:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
jmp .L1043
.L1034:
movss xmm3, DWORD PTR s4_lambda[rip]
ucomiss xmm4, xmm3
jp .L2126
jne .L2126
.L1788:
test bl, bl
je .L2130
.L1038:
cmp BYTE PTR s4_evt1[rip], 0
je .L1040
cmp BYTE PTR s4_evt0[rip], 0
je .L1041
jmp .L1040
.L1026:
test bpl, bpl
je .L6835
.L2133:
movzx r11d, BYTE PTR s4_evt0[rip]
or r11b, BYTE PTR s4_evt1[rip]
je .L1031
cmp BYTE PTR _x_s4_l1[rip], 0
je .L1032
test bpl, bpl
je .L2664
movss xmm3, DWORD PTR s4_lambda[rip]
ucomiss xmm4, xmm3
jp .L1792
je .L1788
.L1792:
mov r11d, r12d
or r11b, BYTE PTR _x_s4_l1[rip]
je .L6836
.L2126:
pxor xmm4, xmm4
mov r10d, 0
ucomiss xmm5, xmm4
setnp r11b
cmove r10d, r11d
xor r11d, r11d
mov r13d, r10d
jmp .L1043
.L6836:
cmp BYTE PTR s4_l1[rip], 0
je .L2662
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
cmove r11d, r10d
jmp .L1043
.L6835:
mov r11d, r12d
or r11b, BYTE PTR _x_s4_l1[rip]
jne .L2133
cmp BYTE PTR s4_l1[rip], 0
je .L3085
.L2132:
movzx r10d, BYTE PTR s4_evt1[rip]
or r10b, BYTE PTR s4_evt0[rip]
jne .L6837
.L1031:
movss xmm3, DWORD PTR s4_lambda[rip]
ucomiss xmm4, xmm3
jp .L1036
je .L1040
.L1036:
test bpl, bpl
jne .L2129
.L2128:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, ebp
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
mov r11d, r10d
cmovne r11d, ebp
jmp .L1043
.L6837:
movss xmm3, DWORD PTR s4_lambda[rip]
ucomiss xmm4, xmm3
jp .L2128
je .L1038
jmp .L2128
.L6840:
movzx ebx, BYTE PTR s4_l1[rip]
test bl, bl
jne .L1030
.L3085:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1029
comiss xmm7, DWORD PTR delta[rip]
jne .L1029
movzx r11d, BYTE PTR s4_evt0[rip]
or r11b, BYTE PTR s4_evt1[rip]
mov r10d, r11d
or r10b, bl
je .L1030
xor r10d, r10d
jmp .L95
.L1032:
movss xmm3, DWORD PTR s4_lambda[rip]
ucomiss xmm4, xmm3
jp .L1036
je .L1788
jmp .L1036
.L1015:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s4_evt2[rip]
movzx r11d, BYTE PTR s4_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s4_evt1[rip]
je .L95
jmp .L1018
.L1025:
test bpl, bpl
je .L6838
movzx ebx, BYTE PTR _x_s4_l1[rip]
test bl, bl
jne .L6839
movss xmm3, DWORD PTR s4_lambda[rip]
ucomiss xmm4, xmm3
jp .L1036
je .L2130
jmp .L1036
.L1029:
test bl, bl
jne .L2132
.L1030:
movss xmm3, DWORD PTR s4_lambda[rip]
ucomiss xmm4, xmm3
jp .L3863
je .L2130
.L3863:
xor ebx, ebx
jmp .L2128
.L6839:
movss xmm3, DWORD PTR s4_lambda[rip]
ucomiss xmm4, xmm3
jp .L3883
je .L2130
.L3883:
xor ebx, ebx
jmp .L1792
.L6838:
mov ebx, r12d
or bl, BYTE PTR _x_s4_l1[rip]
je .L6840
movzx ebx, BYTE PTR _x_s4_l1[rip]
test bl, bl
je .L1032
xor ebx, ebx
jmp .L2664
.L6758:
test bpl, bpl
jne .L2073
.L2607:
mov r11d, r12d
or r11b, BYTE PTR s1_l1[rip]
jne .L1217
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1217
comiss xmm7, DWORD PTR delta[rip]
jne .L1217
movzx r10d, BYTE PTR s1_evt0[rip]
or r10b, BYTE PTR s1_evt1[rip]
or bl, r10b
je .L1218
xor r10d, r10d
jmp .L95
.L1208:
test bpl, bpl
je .L6841
movzx ebx, BYTE PTR _x_s1_l1[rip]
test bl, bl
jne .L6842
movss xmm3, DWORD PTR s1_lambda[rip]
ucomiss xmm4, xmm3
jp .L1219
je .L2073
.L1219:
test bpl, bpl
jne .L2072
.L2071:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, ebp
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
mov r11d, r10d
cmovne r11d, ebp
jmp .L1226
.L6842:
movss xmm3, DWORD PTR s1_lambda[rip]
ucomiss xmm4, xmm3
jp .L3880
je .L2073
.L3880:
xor ebx, ebx
jmp .L1759
.L6841:
mov ebx, r12d
or bl, BYTE PTR _x_s1_l1[rip]
je .L6843
movzx ebx, BYTE PTR _x_s1_l1[rip]
test bl, bl
je .L1215
xor ebx, ebx
jmp .L2607
.L6751:
cmp BYTE PTR s2_l1[rip], 0
jne .L1164
.L2624:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1164
comiss xmm7, DWORD PTR delta[rip]
jne .L1164
movzx r11d, BYTE PTR s2_evt0[rip]
or r11b, BYTE PTR s2_evt1[rip]
or bl, r11b
je .L1164
xor r10d, r10d
jmp .L95
.L1164:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
je .L1165
mov r11d, r10d
mov r13d, r10d
jmp .L1166
.L6750:
test bpl, bpl
jne .L2092
jmp .L2626
.L6759:
cmp BYTE PTR s1_l1[rip], 0
jne .L1225
.L2605:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1225
comiss xmm7, DWORD PTR delta[rip]
jne .L1225
movzx r10d, BYTE PTR s1_evt0[rip]
or r10b, BYTE PTR s1_evt1[rip]
or bl, r10b
je .L1225
xor r10d, r10d
jmp .L95
.L6761:
pxor xmm4, xmm4
ucomiss xmm4, DWORD PTR delta[rip]
jp .L1227
comiss xmm4, DWORD PTR delta[rip]
jne .L1227
movzx r10d, BYTE PTR s1_evt0[rip]
or r10b, BYTE PTR s1_evt1[rip]
or r10b, bl
je .L1228
xor r10d, r10d
jmp .L95
.L1225:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
je .L1226
mov r11d, r10d
mov r13d, r10d
jmp .L1227
.L1228:
movss xmm4, DWORD PTR s1_x[rip]
.L1232:
xor ebx, ebx
test bpl, bpl
je .L3060
.L2067:
movzx ebx, BYTE PTR s1_evt0[rip]
mov BYTE PTR 22[rsp], bl
test bl, bl
jne .L3605
jmp .L2068
.L1233:
test bl, bl
je .L2067
mov BYTE PTR 22[rsp], bl
jmp .L2068
.L6762:
cmp BYTE PTR s1_evt1[rip], 0
je .L1229
mov r10d, ebx
or r10b, BYTE PTR s1_evt0[rip]
mov BYTE PTR 22[rsp], r10b
jne .L1229
movss xmm3, DWORD PTR s1_backoff[rip]
comiss xmm3, xmm6
jnb .L1231
jmp .L1232
.L6760:
cmp BYTE PTR _x_s1_l1[rip], 0
mov r11d, r10d
mov r13d, r10d
je .L1227
jmp .L1226
.L6763:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L1234
comiss xmm5, DWORD PTR delta[rip]
jne .L1234
movzx r10d, BYTE PTR s1_evt0[rip]
or r10b, BYTE PTR s1_evt1[rip]
or r10b, bl
mov BYTE PTR 22[rsp], r10b
je .L1235
xor r10d, r10d
jmp .L95
.L1198:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s1_evt2[rip]
movzx r11d, BYTE PTR s1_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s1_evt1[rip]
je .L95
jmp .L1201
.L1235:
test r11b, r11b
jne .L2602
jmp .L2601
.L1194:
xor r10d, r10d
cmp BYTE PTR _x_s1_l1[rip], 0
jne .L95
jmp .L1763
.L1192:
xor r10d, r10d
cmp BYTE PTR _x_s1_evt0[rip], 0
jne .L95
jmp .L1193
.L1218:
movss xmm3, DWORD PTR s1_lambda[rip]
ucomiss xmm4, xmm3
jp .L1762
je .L1224
.L1762:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
jmp .L1226
.L1217:
movss xmm3, DWORD PTR s1_lambda[rip]
ucomiss xmm4, xmm3
jp .L2069
jne .L2069
.L1755:
test bl, bl
je .L2073
.L1221:
cmp BYTE PTR s1_evt1[rip], 0
je .L1223
cmp BYTE PTR s1_evt0[rip], 0
je .L1224
jmp .L1223
.L1209:
test bpl, bpl
je .L6844
.L2076:
movzx r10d, BYTE PTR s1_evt0[rip]
or r10b, BYTE PTR s1_evt1[rip]
je .L1214
cmp BYTE PTR _x_s1_l1[rip], 0
je .L1215
test bpl, bpl
je .L2607
movss xmm3, DWORD PTR s1_lambda[rip]
ucomiss xmm4, xmm3
jp .L1759
je .L1755
.L1759:
mov r11d, r12d
or r11b, BYTE PTR _x_s1_l1[rip]
je .L6845
.L2069:
pxor xmm4, xmm4
mov r10d, 0
ucomiss xmm5, xmm4
setnp r11b
cmove r10d, r11d
xor r11d, r11d
mov r13d, r10d
jmp .L1226
.L6845:
cmp BYTE PTR s1_l1[rip], 0
je .L2605
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
cmove r11d, r10d
jmp .L1226
.L1214:
movss xmm3, DWORD PTR s1_lambda[rip]
ucomiss xmm4, xmm3
jp .L1219
je .L1223
jmp .L1219
.L6844:
mov r11d, r12d
or r11b, BYTE PTR _x_s1_l1[rip]
jne .L2076
cmp BYTE PTR s1_l1[rip], 0
je .L3064
.L2075:
movzx r10d, BYTE PTR s1_evt1[rip]
or r10b, BYTE PTR s1_evt0[rip]
je .L1214
movss xmm3, DWORD PTR s1_lambda[rip]
ucomiss xmm4, xmm3
jp .L2071
je .L1221
jmp .L2071
.L6756:
mov BYTE PTR 29[rsp], 0
movzx r10d, BYTE PTR _x_s2_l1[rip]
test r12b, r12b
je .L1191
or r10b, BYTE PTR s2_l1[rip]
mov BYTE PTR 29[rsp], r10b
je .L3066
mov BYTE PTR 29[rsp], 0
jmp .L1191
.L1180:
test r11b, r11b
jne .L1765
jmp .L2620
.L6757:
cmp BYTE PTR s2_l1[rip], 0
jne .L1191
pxor xmm4, xmm4
ucomiss xmm4, DWORD PTR delta[rip]
jp .L1191
comiss xmm4, DWORD PTR delta[rip]
jne .L1191
movzx ebx, BYTE PTR s2_evt0[rip]
xor r10d, r10d
or bl, BYTE PTR s2_evt1[rip]
or BYTE PTR 29[rsp], bl
jne .L95
jmp .L1191
.L3064:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1212
comiss xmm7, DWORD PTR delta[rip]
jne .L1212
movzx r10d, BYTE PTR s1_evt0[rip]
or r10b, BYTE PTR s1_evt1[rip]
or r10b, bl
je .L1213
xor r10d, r10d
jmp .L95
.L1155:
movss xmm3, DWORD PTR s2_lambda[rip]
ucomiss xmm4, xmm3
jp .L1768
jne .L1768
.L1766:
test bl, bl
je .L2092
.L1160:
cmp BYTE PTR s2_evt1[rip], 0
je .L1162
cmp BYTE PTR s2_evt0[rip], 0
je .L1163
jmp .L1162
.L1154:
movss xmm3, DWORD PTR s2_lambda[rip]
ucomiss xmm4, xmm3
jp .L1158
je .L1766
jmp .L1158
.L1131:
xor r10d, r10d
cmp BYTE PTR _x_s2_evt0[rip], 0
jne .L95
jmp .L1132
.L1133:
xor r10d, r10d
cmp BYTE PTR _x_s2_l1[rip], 0
jne .L95
jmp .L1774
.L6748:
mov BYTE PTR 28[rsp], 0
movzx r10d, BYTE PTR _x_s3_l1[rip]
test r12b, r12b
je .L1130
or r10b, BYTE PTR s3_l1[rip]
mov BYTE PTR 28[rsp], r10b
je .L3073
mov BYTE PTR 28[rsp], 0
jmp .L1130
.L6753:
pxor xmm4, xmm4
ucomiss xmm4, DWORD PTR delta[rip]
jp .L1166
comiss xmm4, DWORD PTR delta[rip]
jne .L1166
movzx r10d, BYTE PTR s2_evt0[rip]
or r10b, BYTE PTR s2_evt1[rip]
or r10b, bl
je .L1167
xor r10d, r10d
jmp .L95
.L1190:
cmp BYTE PTR 29[rsp], 0
jne .L2081
jmp .L1191
.L1167:
movss xmm4, DWORD PTR s2_x[rip]
jmp .L1171
.L1215:
movss xmm3, DWORD PTR s1_lambda[rip]
ucomiss xmm4, xmm3
jp .L1219
je .L1755
jmp .L1219
.L6843:
movzx ebx, BYTE PTR s1_l1[rip]
test bl, bl
je .L3064
.L1213:
movss xmm3, DWORD PTR s1_lambda[rip]
ucomiss xmm4, xmm3
jp .L3860
je .L2073
.L3860:
xor ebx, ebx
jmp .L2071
.L1212:
test bl, bl
jne .L2075
jmp .L1213
.L1157:
movss xmm3, DWORD PTR s2_lambda[rip]
ucomiss xmm4, xmm3
jp .L1771
je .L1163
.L1771:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
jmp .L1165
.L1153:
movss xmm3, DWORD PTR s2_lambda[rip]
ucomiss xmm4, xmm3
jp .L1158
je .L1162
jmp .L1158
.L6820:
mov r11d, r12d
or r11b, BYTE PTR _x_s2_l1[rip]
jne .L2095
cmp BYTE PTR s2_l1[rip], 0
je .L3071
.L2094:
movzx r10d, BYTE PTR s2_evt1[rip]
or r10b, BYTE PTR s2_evt0[rip]
je .L1153
movss xmm3, DWORD PTR s2_lambda[rip]
ucomiss xmm4, xmm3
jp .L2090
je .L1160
jmp .L2090
.L3071:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L1151
comiss xmm7, DWORD PTR delta[rip]
jne .L1151
movzx r11d, BYTE PTR s2_evt0[rip]
or r11b, BYTE PTR s2_evt1[rip]
mov r10d, r11d
or r10b, bl
je .L1152
xor r10d, r10d
jmp .L95
.L1156:
movss xmm3, DWORD PTR s2_lambda[rip]
ucomiss xmm4, xmm3
jp .L2088
je .L1766
jmp .L2088
.L1151:
test bl, bl
jne .L2094
jmp .L1152
.L401:
cmp BYTE PTR _x_s14_l1[rip], 0
je .L1906
xor r10d, r10d
jmp .L95
.L399:
xor r10d, r10d
cmp BYTE PTR _x_s14_evt0[rip], 0
jne .L95
jmp .L400
.L6652:
test r15b, r15b
je .L398
movzx r10d, BYTE PTR _x_s15_l1[rip]
or r10b, BYTE PTR s15_l1[rip]
mov BYTE PTR 11[rsp], r10b
je .L3157
mov BYTE PTR 11[rsp], 0
jmp .L398
.L6651:
movzx ebx, BYTE PTR s15_evt1[rip]
mov BYTE PTR 11[rsp], bl
test bl, bl
je .L395
jmp .L393
.L6846:
movzx r10d, BYTE PTR _x_s15_l1[rip]
or r10b, BYTE PTR s15_l1[rip]
jne .L2328
.L3157:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L397
comiss xmm6, DWORD PTR delta[rip]
jne .L397
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or BYTE PTR 11[rsp], bpl
je .L398
xor r10d, r10d
jmp .L95
.L394:
test r13b, r13b
je .L2328
test r15b, r15b
jne .L6846
movzx ebx, BYTE PTR s15_evt0[rip]
mov ebp, ebx
or bpl, BYTE PTR s15_evt1[rip]
jne .L398
jmp .L3156
.L381:
test bl, bl
je .L2867
.L2868:
cmp BYTE PTR _x_s15_l1[rip], 0
jne .L2330
.L389:
test r13b, r13b
je .L388
.L1907:
ucomiss xmm6, DWORD PTR s15_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L388
cmp BYTE PTR 7[rsp], 0
je .L388
jmp .L390
.L6653:
cmp BYTE PTR s15_l1[rip], 0
jne .L398
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L398
comiss xmm6, DWORD PTR delta[rip]
jne .L398
movzx ebp, BYTE PTR s15_evt0[rip]
xor r10d, r10d
or bpl, BYTE PTR s15_evt1[rip]
or BYTE PTR 11[rsp], bpl
jne .L95
jmp .L398
.L397:
cmp BYTE PTR 11[rsp], 0
je .L398
.L2328:
movzx ebx, BYTE PTR s15_evt0[rip]
mov ebp, ebx
or bpl, BYTE PTR s15_evt1[rip]
jne .L395
.L3156:
comiss xmm4, DWORD PTR s15_backoff[rip]
jnb .L398
jmp .L395
.L383:
test bl, bl
je .L388
.L2330:
test r13b, r13b
je .L1907
jmp .L388
.L384:
test bl, bl
jne .L389
test r15b, r15b
je .L390
.L2866:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L390
comiss xmm6, DWORD PTR delta[rip]
jne .L390
movzx ebx, BYTE PTR 11[rsp]
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bl, bpl
je .L393
xor r10d, r10d
jmp .L95
.L386:
test bl, bl
je .L390
.L1908:
test r13b, r13b
jne .L1907
jmp .L390
.L385:
test bl, bl
jne .L389
jmp .L390
.L387:
test bl, bl
jne .L1908
jmp .L2867
.L3158:
mov r11d, r15d
or r11b, BYTE PTR _x_s15_l1[rip]
jne .L380
cmp BYTE PTR s15_l1[rip], 0
jne .L6847
.L380:
test r10b, r10b
je .L2334
mov BYTE PTR 11[rsp], r10b
jmp .L382
.L6847:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L380
comiss xmm5, DWORD PTR delta[rip]
jne .L380
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, r10b
mov BYTE PTR 11[rsp], bpl
je .L381
xor r10d, r10d
jmp .L95
.L2334:
movzx r11d, BYTE PTR s15_evt0[rip]
mov BYTE PTR 11[rsp], r11b
test r11b, r11b
jne .L3647
jmp .L382
.L6648:
cmp BYTE PTR s15_l1[rip], 0
je .L2871
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, ebp
ucomiss xmm4, xmm3
mov BYTE PTR 7[rsp], r11b
setnp bl
cmovne ebx, ebp
jmp .L372
.L6647:
jne .L3894
.L2339:
movzx r10d, BYTE PTR s15_evt0[rip]
test r10b, r10b
jne .L6848
.L369:
test r13b, r13b
je .L370
.L2338:
mov ebx, r15d
or bl, BYTE PTR _x_s15_l1[rip]
je .L6849
.L370:
pxor xmm7, xmm7
mov r11d, 0
ucomiss xmm5, xmm7
setnp bl
cmovne ebx, r11d
ucomiss xmm4, xmm3
mov ebp, ebx
mov BYTE PTR 7[rsp], bl
setnp bl
cmovne ebx, r11d
mov r11d, ebp
and r11b, bl
je .L372
cmp BYTE PTR _x_s15_l1[rip], 0
mov BYTE PTR 7[rsp], r11b
mov ebx, r11d
je .L373
jmp .L372
.L6848:
movzx r10d, BYTE PTR s15_evt1[rip]
test r10b, r10b
je .L370
xor r10d, r10d
jmp .L369
.L6646:
movss xmm3, DWORD PTR s15_lambda[rip]
ucomiss xmm4, xmm3
jp .L365
je .L2339
.L365:
test r13b, r13b
jne .L2338
jmp .L2337
.L6645:
mov ebx, r15d
or bl, BYTE PTR _x_s15_l1[rip]
je .L6850
movzx r10d, BYTE PTR _x_s15_l1[rip]
test r10b, r10b
jne .L6851
.L361:
movss xmm3, DWORD PTR s15_lambda[rip]
ucomiss xmm4, xmm3
jp .L365
jne .L365
.L1909:
test r10b, r10b
je .L2339
.L367:
cmp BYTE PTR s15_evt1[rip], 0
je .L369
cmp BYTE PTR s15_evt0[rip], 0
je .L370
jmp .L369
.L6851:
xor r10d, r10d
.L2873:
mov ebx, r15d
or bl, BYTE PTR s15_l1[rip]
jne .L363
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L363
comiss xmm7, DWORD PTR delta[rip]
jne .L363
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or r10b, bpl
je .L364
xor r10d, r10d
jmp .L95
.L2871:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L371
comiss xmm7, DWORD PTR delta[rip]
jne .L371
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or r10b, bpl
je .L371
xor r10d, r10d
jmp .L95
.L6849:
cmp BYTE PTR s15_l1[rip], 0
je .L2871
.L371:
pxor xmm7, xmm7
mov r11d, 0
ucomiss xmm5, xmm7
setnp bl
cmovne ebx, r11d
ucomiss xmm4, xmm3
mov ebp, ebx
mov BYTE PTR 7[rsp], bl
setnp bl
cmovne ebx, r11d
mov r11d, ebp
and r11b, bl
je .L372
mov BYTE PTR 7[rsp], r11b
mov ebx, r11d
jmp .L373
.L6850:
movzx r10d, BYTE PTR s15_l1[rip]
test r10b, r10b
je .L3162
.L359:
movss xmm3, DWORD PTR s15_lambda[rip]
ucomiss xmm4, xmm3
jp .L3874
je .L2339
.L3874:
xor r10d, r10d
.L2337:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r13d
ucomiss xmm4, xmm3
mov BYTE PTR 7[rsp], r11b
setnp bl
cmovne ebx, r13d
jmp .L372
.L6853:
mov ebx, r15d
or bl, BYTE PTR _x_s15_l1[rip]
jne .L2342
cmp BYTE PTR s15_l1[rip], 0
jne .L2341
.L3162:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L358
comiss xmm7, DWORD PTR delta[rip]
jne .L358
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, r10b
je .L359
xor r10d, r10d
jmp .L95
.L364:
movss xmm3, DWORD PTR s15_lambda[rip]
ucomiss xmm4, xmm3
jp .L1914
je .L370
.L1914:
pxor xmm7, xmm7
mov r11d, 0
ucomiss xmm5, xmm7
setnp bl
cmovne ebx, r11d
ucomiss xmm4, xmm3
mov BYTE PTR 7[rsp], bl
setnp bl
cmovne ebx, r11d
jmp .L372
.L363:
movss xmm3, DWORD PTR s15_lambda[rip]
ucomiss xmm4, xmm3
jp .L2335
jne .L2335
jmp .L1909
.L358:
test r10b, r10b
je .L359
.L2341:
movzx ebx, BYTE PTR s15_evt0[rip]
mov ebp, ebx
or bpl, BYTE PTR s15_evt1[rip]
je .L360
movss xmm3, DWORD PTR s15_lambda[rip]
ucomiss xmm4, xmm3
jp .L2337
je .L367
jmp .L2337
.L325:
test r11b, r11b
je .L329
.L1919:
test bpl, bpl
jne .L1918
.L329:
cmp BYTE PTR 10[rsp], 0
jne .L333
.L2886:
cmp BYTE PTR s16_evt0[rip], 0
je .L332
movzx ebx, BYTE PTR s16_evt1[rip]
mov BYTE PTR 10[rsp], bl
test bl, bl
jne .L332
.L334:
cmp BYTE PTR _x_s16_l1[rip], 0
movzx ebx, BYTE PTR 11[rsp]
sete r10b
or bl, r10b
jne .L337
cmp BYTE PTR 7[rsp], 0
jne .L337
cmp BYTE PTR s16_l1[rip], 0
jne .L337
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L337
comiss xmm6, DWORD PTR delta[rip]
jne .L337
movzx ebx, BYTE PTR s16_evt0[rip]
xor r10d, r10d
or bl, BYTE PTR s16_evt1[rip]
or BYTE PTR 10[rsp], bl
jne .L95
jmp .L337
.L333:
test bpl, bpl
je .L2347
test r13b, r13b
jne .L6852
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
jne .L337
.L3163:
comiss xmm4, DWORD PTR s16_backoff[rip]
jnb .L337
jmp .L334
.L324:
test r11b, r11b
je .L329
.L328:
test bpl, bpl
je .L327
jmp .L1918
.L6852:
movzx r10d, BYTE PTR _x_s16_l1[rip]
or r10b, BYTE PTR s16_l1[rip]
je .L3164
.L2347:
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
jne .L334
jmp .L3163
.L3164:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L336
comiss xmm6, DWORD PTR delta[rip]
jne .L336
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or BYTE PTR 10[rsp], bl
je .L337
xor r10d, r10d
jmp .L95
.L6644:
movzx r10d, BYTE PTR _x_s16_l1[rip]
or r10b, BYTE PTR s16_l1[rip]
mov BYTE PTR 10[rsp], r10b
je .L3164
mov BYTE PTR 10[rsp], 0
jmp .L337
.L336:
cmp BYTE PTR 10[rsp], 0
je .L337
jmp .L2347
.L326:
test r11b, r11b
je .L2886
jmp .L1919
.L6642:
cmp BYTE PTR s16_evt1[rip], 0
je .L314
mov ebx, r10d
or bl, BYTE PTR s16_evt0[rip]
mov BYTE PTR 10[rsp], bl
jne .L314
movss xmm3, DWORD PTR s16_backoff[rip]
comiss xmm3, xmm6
jnb .L316
.L317:
xor r10d, r10d
test bpl, bpl
je .L3165
.L2351:
movzx ebx, BYTE PTR s16_evt0[rip]
mov BYTE PTR 10[rsp], bl
test bl, bl
jne .L3650
jmp .L2352
.L350:
ucomiss xmm6, DWORD PTR s15_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L351
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L351
.L352:
mov r10d, ebx
test bl, bl
jne .L355
cmp BYTE PTR s15_evt0[rip], 0
je .L354
cmp BYTE PTR s15_evt1[rip], 0
jne .L354
movss xmm3, DWORD PTR s15_lambda[rip]
ucomiss xmm4, xmm3
jp .L354
jne .L354
cmp BYTE PTR _x_s15_l1[rip], 0
je .L2339
test r13b, r13b
jne .L2339
jmp .L2873
.L344:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s15_evt2[rip]
movzx r11d, BYTE PTR s15_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s15_evt1[rip]
je .L95
jmp .L347
.L6649:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L373
comiss xmm5, DWORD PTR delta[rip]
jne .L373
movzx ebp, BYTE PTR s15_evt0[rip]
or bpl, BYTE PTR s15_evt1[rip]
or bpl, r10b
je .L374
xor r10d, r10d
jmp .L95
.L355:
test r13b, r13b
je .L6853
.L2342:
movzx ebx, BYTE PTR s15_evt0[rip]
mov ebp, ebx
or bpl, BYTE PTR s15_evt1[rip]
je .L360
cmp BYTE PTR _x_s15_l1[rip], 0
je .L361
test r13b, r13b
je .L2873
movss xmm3, DWORD PTR s15_lambda[rip]
ucomiss xmm4, xmm3
jp .L1911
je .L1909
jmp .L1911
.L374:
movss xmm4, DWORD PTR s15_x[rip]
jmp .L378
.L6643:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L319
comiss xmm5, DWORD PTR delta[rip]
jne .L319
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, r10b
mov BYTE PTR 10[rsp], bl
je .L320
xor r10d, r10d
jmp .L95
.L323:
test r11b, r11b
jne .L328
test r13b, r13b
je .L329
jmp .L2885
.L360:
movss xmm3, DWORD PTR s15_lambda[rip]
ucomiss xmm4, xmm3
jp .L365
je .L369
jmp .L365
.L322:
test r11b, r11b
je .L327
jmp .L2349
.L320:
test r11b, r11b
jne .L2887
jmp .L2886
.L6640:
cmp BYTE PTR _x_s16_l1[rip], 0
mov r11d, ebx
mov r15d, ebx
jne .L311
jmp .L312
.L6641:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L312
comiss xmm5, DWORD PTR delta[rip]
jne .L312
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, r10b
jne .L6854
movss xmm4, DWORD PTR s16_x[rip]
jmp .L317
.L6639:
cmp BYTE PTR s16_l1[rip], 0
je .L2890
.L310:
pxor xmm7, xmm7
mov r11d, 0
ucomiss xmm5, xmm7
setnp bl
cmovne ebx, r11d
ucomiss xmm4, xmm3
mov r15d, ebx
setnp bl
cmove r11d, ebx
mov ebx, r11d
and bl, r15b
je .L311
mov r11d, ebx
mov r15d, ebx
jmp .L312
.L3895:
xor r10d, r10d
.L1922:
mov r11d, r13d
or r11b, BYTE PTR _x_s16_l1[rip]
je .L6855
.L2354:
pxor xmm4, xmm4
mov r11d, 0
ucomiss xmm5, xmm4
mov r15d, r11d
setnp bl
cmove r15d, ebx
jmp .L311
.L6854:
xor r10d, r10d
jmp .L95
.L2890:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L310
comiss xmm7, DWORD PTR delta[rip]
jne .L310
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or r10b, bl
je .L310
xor r10d, r10d
jmp .L95
.L6855:
cmp BYTE PTR s16_l1[rip], 0
je .L2890
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp bl
.L6564:
cmovne ebx, r11d
ucomiss xmm4, xmm3
mov r15d, ebx
setnp bl
cmove r11d, ebx
jmp .L311
.L6638:
movss xmm3, DWORD PTR s16_lambda[rip]
ucomiss xmm4, xmm3
jnp .L6856
.L304:
test bpl, bpl
jne .L2357
.L2356:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp bl
cmovne ebx, ebp
ucomiss xmm4, xmm3
mov r15d, ebx
setnp r11b
cmovne r11d, ebp
jmp .L311
.L289:
ucomiss xmm6, DWORD PTR s16_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L290
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L290
.L291:
mov r10d, ebx
test bl, bl
jne .L294
cmp BYTE PTR s16_evt0[rip], 0
je .L293
cmp BYTE PTR s16_evt1[rip], 0
jne .L293
movss xmm3, DWORD PTR s16_lambda[rip]
ucomiss xmm4, xmm3
jp .L293
jne .L293
cmp BYTE PTR _x_s16_l1[rip], 0
je .L2358
test bpl, bpl
jne .L2358
.L2892:
mov ebx, r13d
or bl, BYTE PTR s16_l1[rip]
jne .L302
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L302
comiss xmm7, DWORD PTR delta[rip]
jne .L302
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or r10b, bl
je .L303
xor r10d, r10d
jmp .L95
.L6637:
mov ebx, r13d
or bl, BYTE PTR _x_s16_l1[rip]
je .L6857
movzx r10d, BYTE PTR _x_s16_l1[rip]
test r10b, r10b
je .L300
xor r10d, r10d
jmp .L2892
.L6856:
je .L2358
jmp .L304
.L303:
movss xmm3, DWORD PTR s16_lambda[rip]
ucomiss xmm4, xmm3
jnp .L6858
.L1927:
pxor xmm7, xmm7
mov r11d, 0
ucomiss xmm5, xmm7
setnp bl
jmp .L6564
.L302:
movss xmm3, DWORD PTR s16_lambda[rip]
ucomiss xmm4, xmm3
jp .L2354
jne .L2354
.L1920:
test r10b, r10b
je .L2358
.L306:
cmp BYTE PTR s16_evt1[rip], 0
je .L308
cmp BYTE PTR s16_evt0[rip], 0
je .L309
jmp .L308
.L300:
movss xmm3, DWORD PTR s16_lambda[rip]
ucomiss xmm4, xmm3
jp .L304
je .L1920
jmp .L304
.L6857:
movzx r10d, BYTE PTR s16_l1[rip]
test r10b, r10b
je .L3169
.L298:
movss xmm3, DWORD PTR s16_lambda[rip]
ucomiss xmm4, xmm3
jp .L3875
je .L2358
.L3875:
xor r10d, r10d
jmp .L2356
.L3169:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L297
comiss xmm7, DWORD PTR delta[rip]
jne .L297
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
or bl, r10b
je .L298
xor r10d, r10d
jmp .L95
.L294:
test bpl, bpl
jne .L2361
mov ebx, r13d
or bl, BYTE PTR _x_s16_l1[rip]
je .L6859
.L2361:
movzx ebx, BYTE PTR s16_evt0[rip]
or bl, BYTE PTR s16_evt1[rip]
jne .L6860
.L299:
movss xmm3, DWORD PTR s16_lambda[rip]
ucomiss xmm4, xmm3
jp .L304
je .L308
jmp .L304
.L6859:
cmp BYTE PTR s16_l1[rip], 0
je .L3169
.L2360:
movzx r11d, BYTE PTR s16_evt1[rip]
or r11b, BYTE PTR s16_evt0[rip]
je .L299
movss xmm3, DWORD PTR s16_lambda[rip]
ucomiss xmm4, xmm3
jp .L2356
je .L306
jmp .L2356
.L6860:
cmp BYTE PTR _x_s16_l1[rip], 0
je .L300
test bpl, bpl
je .L2892
movss xmm3, DWORD PTR s16_lambda[rip]
ucomiss xmm4, xmm3
jp .L1922
je .L1920
jmp .L1922
.L6858:
jne .L1927
jmp .L309
.L297:
test r10b, r10b
jne .L2360
jmp .L298
.L283:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s16_evt2[rip]
movzx r11d, BYTE PTR s16_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s16_evt1[rip]
je .L95
jmp .L286
.L6636:
mov ebx, esi
or bl, BYTE PTR s17_l1[rip]
mov BYTE PTR 9[rsp], bl
je .L3171
mov BYTE PTR 9[rsp], 0
jmp .L276
.L275:
cmp BYTE PTR 9[rsp], 0
je .L276
.L2366:
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
jne .L273
.L3170:
comiss xmm4, DWORD PTR s17_backoff[rip]
jnb .L276
.L273:
cmp BYTE PTR _x_s17_l1[rip], 0
movzx ebx, BYTE PTR 10[rsp]
sete r10b
or bl, r10b
jne .L276
cmp BYTE PTR 7[rsp], 0
jne .L276
cmp BYTE PTR s17_l1[rip], 0
jne .L276
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L276
comiss xmm6, DWORD PTR delta[rip]
jne .L276
movzx r11d, BYTE PTR s17_evt0[rip]
xor r10d, r10d
or r11b, BYTE PTR s17_evt1[rip]
or BYTE PTR 9[rsp], r11b
jne .L95
jmp .L276
.L6861:
mov ebx, esi
or bl, BYTE PTR s17_l1[rip]
jne .L2366
.L3171:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L275
comiss xmm6, DWORD PTR delta[rip]
jne .L275
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or BYTE PTR 9[rsp], r11b
je .L276
xor r10d, r10d
jmp .L95
.L262:
test bl, bl
jne .L267
test r13b, r13b
je .L268
jmp .L2904
.L261:
test bl, bl
je .L266
.L2368:
test bpl, bpl
jne .L266
.L1929:
ucomiss xmm6, DWORD PTR s17_backoff[rip]
mov r11d, 0
setnp r10b
cmovne r10d, r11d
test r10b, r10b
je .L266
test r15b, r15b
je .L266
jmp .L268
.L264:
test bl, bl
jne .L1930
jmp .L268
.L263:
test bl, bl
jne .L267
jmp .L268
.L6634:
cmp BYTE PTR s17_evt1[rip], 0
je .L253
mov r11d, r10d
or r11b, BYTE PTR s17_evt0[rip]
mov BYTE PTR 9[rsp], r11b
jne .L253
movss xmm3, DWORD PTR s17_backoff[rip]
comiss xmm3, xmm6
jnb .L255
.L256:
xor r10d, r10d
test bpl, bpl
je .L3172
.L2370:
movzx r11d, BYTE PTR s17_evt0[rip]
mov BYTE PTR 9[rsp], r11b
test r11b, r11b
jne .L3653
jmp .L2371
.L272:
test bpl, bpl
je .L2366
test r13b, r13b
jne .L6861
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
je .L3170
jmp .L276
.L20:
cmp BYTE PTR s16_evt0[rip], 0
jne .L4593
jmp .L21
.L6632:
cmp BYTE PTR s17_l1[rip], 0
je .L2909
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r15b
cmovne r15d, r11d
ucomiss xmm4, xmm3
setnp bl
cmovne ebx, r11d
jmp .L250
.L6631:
jne .L3896
.L2377:
movzx r10d, BYTE PTR s17_evt0[rip]
test r10b, r10b
je .L247
movzx r10d, BYTE PTR s17_evt1[rip]
test r10b, r10b
je .L248
xor r10d, r10d
.L247:
test bpl, bpl
je .L248
.L2376:
mov ebx, r13d
or bl, BYTE PTR _x_s17_l1[rip]
je .L6862
.L248:
pxor xmm7, xmm7
mov r11d, 0
ucomiss xmm5, xmm7
setnp r15b
cmovne r15d, r11d
ucomiss xmm4, xmm3
setnp bl
cmovne ebx, r11d
mov r11d, r15d
and r11b, bl
je .L250
cmp BYTE PTR _x_s17_l1[rip], 0
mov ebx, r11d
mov r15d, r11d
jne .L250
jmp .L251
.L6862:
cmp BYTE PTR s17_l1[rip], 0
jne .L249
.L2909:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L249
comiss xmm7, DWORD PTR delta[rip]
jne .L249
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r10b, r11b
je .L249
xor r10d, r10d
jmp .L95
.L249:
pxor xmm7, xmm7
mov r11d, 0
ucomiss xmm5, xmm7
setnp r15b
cmovne r15d, r11d
ucomiss xmm4, xmm3
setnp bl
cmovne ebx, r11d
mov r11d, r15d
and r11b, bl
je .L250
mov ebx, r11d
mov r15d, r11d
jmp .L251
.L6635:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L258
comiss xmm5, DWORD PTR delta[rip]
jne .L258
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, r10b
mov BYTE PTR 9[rsp], r11b
je .L259
xor r10d, r10d
jmp .L95
.L6630:
movss xmm3, DWORD PTR s17_lambda[rip]
ucomiss xmm4, xmm3
jnp .L6863
.L243:
test bpl, bpl
jne .L2376
.L2375:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r15b
cmovne r15d, ebp
ucomiss xmm4, xmm3
setnp bl
cmovne ebx, ebp
jmp .L250
.L6629:
mov ebx, r13d
or bl, BYTE PTR _x_s17_l1[rip]
je .L6864
movzx esi, BYTE PTR _x_s17_l1[rip]
mov r10d, esi
test sil, sil
je .L239
xor r10d, r10d
.L2911:
mov ebx, r13d
or bl, BYTE PTR s17_l1[rip]
jne .L241
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L241
comiss xmm7, DWORD PTR delta[rip]
jne .L241
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r10b, r11b
jne .L6865
movss xmm3, DWORD PTR s17_lambda[rip]
ucomiss xmm4, xmm3
jp .L1935
je .L248
.L1935:
pxor xmm7, xmm7
mov r11d, 0
ucomiss xmm5, xmm7
setnp r15b
cmovne r15d, r11d
ucomiss xmm4, xmm3
setnp bl
cmovne ebx, r11d
jmp .L250
.L6865:
xor r10d, r10d
jmp .L95
.L241:
movss xmm3, DWORD PTR s17_lambda[rip]
ucomiss xmm4, xmm3
jp .L2373
jne .L2373
.L1931:
test r10b, r10b
je .L2377
.L245:
cmp BYTE PTR s17_evt1[rip], 0
je .L247
cmp BYTE PTR s17_evt0[rip], 0
je .L248
jmp .L247
.L239:
movss xmm3, DWORD PTR s17_lambda[rip]
ucomiss xmm4, xmm3
jp .L243
je .L1931
jmp .L243
.L6864:
movzx r10d, BYTE PTR s17_l1[rip]
test r10b, r10b
je .L3176
.L237:
movss xmm3, DWORD PTR s17_lambda[rip]
ucomiss xmm4, xmm3
jnp .L6866
.L3876:
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L2375
.L259:
test bl, bl
jne .L2906
jmp .L2905
.L6863:
je .L2377
jmp .L243
.L6866:
movzx esi, BYTE PTR _x_s17_l1[rip]
je .L2377
jmp .L3876
.L6868:
cmp BYTE PTR s17_l1[rip], 0
jne .L2379
.L3176:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L236
comiss xmm7, DWORD PTR delta[rip]
jne .L236
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, r10b
je .L237
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L228:
ucomiss xmm6, DWORD PTR s17_backoff[rip]
mov r11d, 0
setnp sil
cmovne esi, r11d
test sil, sil
je .L229
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp sil
cmovne esi, r11d
test sil, sil
je .L229
.L230:
test r10b, r10b
jne .L233
cmp BYTE PTR s17_evt0[rip], 0
je .L232
cmp BYTE PTR s17_evt1[rip], 0
jne .L232
movss xmm3, DWORD PTR s17_lambda[rip]
ucomiss xmm4, xmm3
jp .L232
jne .L232
xor esi, esi
cmp BYTE PTR _x_s17_l1[rip], 0
je .L2377
movzx esi, BYTE PTR _x_s17_l1[rip]
test bpl, bpl
jne .L2377
jmp .L2911
.L6633:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L251
comiss xmm5, DWORD PTR delta[rip]
jne .L251
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
or r11b, r10b
jne .L6867
movss xmm4, DWORD PTR s17_x[rip]
jmp .L256
.L233:
test bpl, bpl
jne .L2380
mov ebx, r13d
or bl, BYTE PTR _x_s17_l1[rip]
je .L6868
.L2380:
movzx r11d, BYTE PTR s17_evt0[rip]
or r11b, BYTE PTR s17_evt1[rip]
jne .L6869
.L238:
movss xmm3, DWORD PTR s17_lambda[rip]
movzx esi, BYTE PTR _x_s17_l1[rip]
ucomiss xmm4, xmm3
jp .L243
je .L247
jmp .L243
.L6628:
movzx r8d, BYTE PTR _x_s18_l1[rip]
je .L2396
jmp .L3877
.L222:
pxor xmm7, xmm7
comiss xmm7, DWORD PTR delta[rip]
jnb .L6870
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L236:
test r10b, r10b
je .L237
.L2379:
movzx esi, BYTE PTR s17_evt1[rip]
or sil, BYTE PTR s17_evt0[rip]
je .L238
movss xmm3, DWORD PTR s17_lambda[rip]
movzx esi, BYTE PTR _x_s17_l1[rip]
ucomiss xmm4, xmm3
jp .L2375
je .L245
jmp .L2375
.L6870:
movzx r10d, BYTE PTR s17_evt2[rip]
movzx esi, BYTE PTR s17_evt0[rip]
or esi, r10d
or sil, BYTE PTR s17_evt1[rip]
jne .L225
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L6867:
xor r10d, r10d
jmp .L95
.L16:
cmp BYTE PTR s17_evt0[rip], 0
jne .L4593
jmp .L17
.L3183:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L175
comiss xmm7, DWORD PTR delta[rip]
jne .L175
movzx r10d, BYTE PTR s18_evt0[rip]
or r10b, BYTE PTR s18_evt1[rip]
or r10b, sil
je .L176
movzx r8d, BYTE PTR _x_s18_l1[rip]
movzx esi, BYTE PTR _x_s17_l1[rip]
xor r10d, r10d
jmp .L95
.L6869:
xor esi, esi
cmp BYTE PTR _x_s17_l1[rip], 0
je .L239
test bpl, bpl
jne .L240
movzx esi, BYTE PTR _x_s17_l1[rip]
jmp .L2911
.L175:
test sil, sil
jne .L2398
jmp .L176
.L240:
movss xmm3, DWORD PTR s17_lambda[rip]
movzx esi, BYTE PTR _x_s17_l1[rip]
ucomiss xmm4, xmm3
jp .L1937
je .L1931
jmp .L1937
.L440:
test r10b, r10b
je .L2313
mov BYTE PTR 12[rsp], r10b
jmp .L2314
.L446:
test r11b, r11b
je .L451
.L450:
test bpl, bpl
jne .L1896
jmp .L449
.L448:
test r11b, r11b
je .L2848
.L1897:
test bpl, bpl
jne .L1896
jmp .L451
.L6658:
cmp BYTE PTR s14_evt1[rip], 0
je .L436
mov ebx, r10d
or bl, BYTE PTR s14_evt0[rip]
mov BYTE PTR 12[rsp], bl
jne .L436
movss xmm3, DWORD PTR s14_backoff[rip]
comiss xmm3, xmm6
jnb .L438
.L439:
xor r10d, r10d
test bpl, bpl
je .L3151
.L2313:
movzx ebx, BYTE PTR s14_evt0[rip]
mov BYTE PTR 12[rsp], bl
test bl, bl
jne .L3644
jmp .L2314
.L447:
test r11b, r11b
jne .L1897
jmp .L451
.L444:
test r11b, r11b
jne .L2311
jmp .L449
.L6674:
cmp BYTE PTR s12_evt1[rip], 0
je .L558
mov r10d, ebx
or r10b, BYTE PTR s12_evt0[rip]
mov BYTE PTR 14[rsp], r10b
jne .L558
movss xmm3, DWORD PTR s12_backoff[rip]
comiss xmm3, xmm6
jnb .L560
.L561:
xor ebx, ebx
test bpl, bpl
je .L3137
.L2275:
movzx ebx, BYTE PTR s12_evt0[rip]
mov BYTE PTR 14[rsp], bl
test bl, bl
jne .L3638
jmp .L2276
.L6675:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L563
comiss xmm5, DWORD PTR delta[rip]
jne .L563
movzx r10d, BYTE PTR s12_evt0[rip]
or r10b, BYTE PTR s12_evt1[rip]
or r10b, bl
mov BYTE PTR 14[rsp], r10b
je .L564
xor r10d, r10d
jmp .L95
.L577:
test bpl, bpl
jne .L6871
.L2271:
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
jne .L578
.L3135:
comiss xmm4, DWORD PTR s12_backoff[rip]
jnb .L581
jmp .L578
.L564:
test r11b, r11b
jne .L2811
jmp .L2810
.L6871:
movzx r10d, BYTE PTR _x_s12_l1[rip]
test r12b, r12b
jne .L6872
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
je .L3135
jmp .L581
.L567:
test r11b, r11b
je .L6873
.L572:
test bpl, bpl
jne .L1874
jmp .L571
.L6873:
test r12b, r12b
je .L573
jmp .L2809
.L568:
test r11b, r11b
jne .L572
jmp .L573
.L566:
test r11b, r11b
jne .L2273
jmp .L571
.L6872:
or r10b, BYTE PTR s12_l1[rip]
jne .L2271
.L3136:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L580
comiss xmm6, DWORD PTR delta[rip]
jne .L580
movzx ebx, BYTE PTR s12_evt0[rip]
or bl, BYTE PTR s12_evt1[rip]
or BYTE PTR 14[rsp], bl
je .L581
xor r10d, r10d
jmp .L95
.L6672:
cmp BYTE PTR _x_s12_l1[rip], 0
mov r11d, r10d
mov r13d, r10d
je .L556
jmp .L555
.L538:
test bpl, bpl
je .L6874
.L2285:
movzx r11d, BYTE PTR s12_evt0[rip]
or r11b, BYTE PTR s12_evt1[rip]
je .L543
cmp BYTE PTR _x_s12_l1[rip], 0
je .L544
test bpl, bpl
jne .L545
.L2816:
mov r11d, r12d
or r11b, BYTE PTR s12_l1[rip]
jne .L546
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L546
comiss xmm7, DWORD PTR delta[rip]
jne .L546
movzx r11d, BYTE PTR s12_evt0[rip]
or r11b, BYTE PTR s12_evt1[rip]
or bl, r11b
je .L547
xor r10d, r10d
jmp .L95
.L527:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s12_evt2[rip]
movzx r11d, BYTE PTR s12_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s12_evt1[rip]
je .L95
jmp .L530
.L537:
test bpl, bpl
je .L6875
movzx ebx, BYTE PTR _x_s12_l1[rip]
test bl, bl
jne .L6876
movss xmm3, DWORD PTR s12_lambda[rip]
ucomiss xmm4, xmm3
jp .L548
je .L2282
.L548:
test bpl, bpl
jne .L2281
.L2280:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, ebp
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
mov r11d, r10d
cmovne r11d, ebp
jmp .L555
.L6876:
movss xmm3, DWORD PTR s12_lambda[rip]
ucomiss xmm4, xmm3
jp .L3891
je .L2282
.L3891:
xor ebx, ebx
.L1878:
mov r11d, r12d
or r11b, BYTE PTR _x_s12_l1[rip]
je .L6877
.L2278:
pxor xmm4, xmm4
mov r10d, 0
ucomiss xmm5, xmm4
setnp r11b
cmove r10d, r11d
xor r11d, r11d
mov r13d, r10d
jmp .L555
.L6875:
mov ebx, r12d
or bl, BYTE PTR _x_s12_l1[rip]
je .L6878
movzx ebx, BYTE PTR _x_s12_l1[rip]
test bl, bl
je .L544
xor ebx, ebx
jmp .L2816
.L6878:
movzx ebx, BYTE PTR s12_l1[rip]
test bl, bl
je .L3141
.L542:
movss xmm3, DWORD PTR s12_lambda[rip]
ucomiss xmm4, xmm3
jp .L3871
je .L2282
.L3871:
xor ebx, ebx
jmp .L2280
.L6877:
cmp BYTE PTR s12_l1[rip], 0
je .L2814
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
cmove r11d, r10d
jmp .L555
.L501:
test bl, bl
je .L2294
mov BYTE PTR 13[rsp], bl
jmp .L2295
.L6666:
cmp BYTE PTR s13_evt1[rip], 0
je .L497
mov r15d, ebx
or r15b, BYTE PTR s13_evt0[rip]
mov BYTE PTR 13[rsp], r15b
jne .L497
movss xmm3, DWORD PTR s13_backoff[rip]
comiss xmm3, xmm6
jnb .L499
.L500:
xor ebx, ebx
test bpl, bpl
je .L3144
.L2294:
movzx ebx, BYTE PTR s13_evt0[rip]
mov BYTE PTR 13[rsp], bl
test bl, bl
jne .L3641
jmp .L2295
.L6664:
cmp BYTE PTR _x_s13_l1[rip], 0
mov r11d, r10d
mov r13d, r10d
je .L495
jmp .L494
.L6667:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L502
comiss xmm5, DWORD PTR delta[rip]
jne .L502
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, bl
mov BYTE PTR 13[rsp], r10b
je .L503
xor r10d, r10d
jmp .L95
.L6662:
test bpl, bpl
jne .L2301
.L2835:
mov r15d, r12d
or r15b, BYTE PTR s13_l1[rip]
jne .L485
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L485
comiss xmm7, DWORD PTR delta[rip]
jne .L485
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
or bl, r15b
je .L486
xor r10d, r10d
jmp .L95
.L6663:
cmp BYTE PTR s13_l1[rip], 0
jne .L493
.L2833:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L493
comiss xmm7, DWORD PTR delta[rip]
jne .L493
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
or bl, r15b
je .L493
xor r10d, r10d
jmp .L95
.L6665:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L495
comiss xmm5, DWORD PTR delta[rip]
jne .L495
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, bl
je .L496
xor r10d, r10d
jmp .L95
.L493:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r11d
and r10b, r13b
je .L494
mov r11d, r10d
mov r13d, r10d
jmp .L495
.L496:
movss xmm4, DWORD PTR s13_x[rip]
jmp .L500
.L477:
test bpl, bpl
je .L6879
.L2304:
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
je .L482
cmp BYTE PTR _x_s13_l1[rip], 0
je .L483
test bpl, bpl
je .L2835
movss xmm3, DWORD PTR s13_lambda[rip]
ucomiss xmm4, xmm3
jp .L1894
jne .L1894
.L1890:
test bl, bl
je .L2301
.L489:
cmp BYTE PTR s13_evt1[rip], 0
je .L491
cmp BYTE PTR s13_evt0[rip], 0
je .L492
jmp .L491
.L6887:
movss xmm3, DWORD PTR s13_lambda[rip]
ucomiss xmm4, xmm3
jp .L3892
je .L2301
.L3892:
xor ebx, ebx
.L1894:
mov r15d, r12d
or r15b, BYTE PTR _x_s13_l1[rip]
je .L6880
.L2297:
pxor xmm4, xmm4
mov r10d, 0
ucomiss xmm5, xmm4
setnp r11b
cmove r10d, r11d
xor r11d, r11d
mov r13d, r10d
jmp .L494
.L483:
movss xmm3, DWORD PTR s13_lambda[rip]
ucomiss xmm4, xmm3
jp .L487
je .L1890
.L487:
test bpl, bpl
jne .L2300
.L2299:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, ebp
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r11b
cmovne r11d, ebp
jmp .L494
.L6880:
cmp BYTE PTR s13_l1[rip], 0
je .L2833
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r15d
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r11b
cmovne r11d, r15d
jmp .L494
.L482:
movss xmm3, DWORD PTR s13_lambda[rip]
ucomiss xmm4, xmm3
jp .L487
je .L491
jmp .L487
.L6879:
mov r15d, r12d
or r15b, BYTE PTR _x_s13_l1[rip]
jne .L2304
cmp BYTE PTR s13_l1[rip], 0
je .L3148
.L2303:
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
je .L482
movss xmm3, DWORD PTR s13_lambda[rip]
ucomiss xmm4, xmm3
jp .L2299
je .L489
jmp .L2299
.L486:
movss xmm3, DWORD PTR s13_lambda[rip]
ucomiss xmm4, xmm3
jp .L1889
je .L492
.L1889:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
jmp .L494
.L485:
movss xmm3, DWORD PTR s13_lambda[rip]
ucomiss xmm4, xmm3
jp .L2297
je .L1890
jmp .L2297
.L6888:
movzx ebx, BYTE PTR s13_l1[rip]
test bl, bl
jne .L481
.L3148:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L480
comiss xmm7, DWORD PTR delta[rip]
jne .L480
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
mov r10d, r15d
or r10b, bl
je .L481
xor r10d, r10d
jmp .L95
.L506:
test r11b, r11b
je .L6881
.L511:
test bpl, bpl
jne .L1885
jmp .L510
.L6881:
test r12b, r12b
jne .L2828
.L512:
cmp BYTE PTR 13[rsp], 0
je .L2829
test bpl, bpl
jne .L6882
.L2290:
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
jne .L517
.L3142:
comiss xmm4, DWORD PTR s13_backoff[rip]
jnb .L520
jmp .L517
.L505:
test r11b, r11b
jne .L2292
jmp .L510
.L6882:
movzx r10d, BYTE PTR _x_s13_l1[rip]
test r12b, r12b
jne .L6883
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
je .L3142
jmp .L520
.L480:
test bl, bl
jne .L2303
.L481:
movss xmm3, DWORD PTR s13_lambda[rip]
ucomiss xmm4, xmm3
jp .L3872
je .L2301
.L3872:
xor ebx, ebx
jmp .L2299
.L6883:
or r10b, BYTE PTR s13_l1[rip]
jne .L2290
.L3143:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L519
comiss xmm6, DWORD PTR delta[rip]
jne .L519
movzx r15d, BYTE PTR s13_evt0[rip]
or r15b, BYTE PTR s13_evt1[rip]
or BYTE PTR 13[rsp], r15b
je .L520
xor r10d, r10d
jmp .L95
.L519:
cmp BYTE PTR 13[rsp], 0
jne .L2290
jmp .L520
.L508:
test r11b, r11b
je .L512
.L1886:
test bpl, bpl
jne .L1885
jmp .L512
.L507:
test r11b, r11b
jne .L511
jmp .L512
.L509:
test r11b, r11b
jne .L1886
jmp .L2829
.L6669:
cmp BYTE PTR s13_l1[rip], 0
jne .L520
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L520
comiss xmm6, DWORD PTR delta[rip]
jne .L520
movzx r15d, BYTE PTR s13_evt0[rip]
xor r10d, r10d
or r15b, BYTE PTR s13_evt1[rip]
or BYTE PTR 13[rsp], r15b
jne .L95
jmp .L520
.L460:
xor r10d, r10d
cmp BYTE PTR _x_s13_evt0[rip], 0
jne .L95
jmp .L461
.L6661:
cmp BYTE PTR s14_l1[rip], 0
jne .L459
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L459
comiss xmm6, DWORD PTR delta[rip]
jne .L459
movzx r12d, BYTE PTR s14_evt0[rip]
xor r10d, r10d
or r12b, BYTE PTR s14_evt1[rip]
or BYTE PTR 12[rsp], r12b
jne .L95
jmp .L459
.L455:
test bpl, bpl
jne .L6884
.L2309:
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
jne .L456
.L3149:
comiss xmm4, DWORD PTR s14_backoff[rip]
jnb .L459
jmp .L456
.L6660:
mov BYTE PTR 12[rsp], 0
movzx r10d, BYTE PTR _x_s14_l1[rip]
test r13b, r13b
je .L459
or r10b, BYTE PTR s14_l1[rip]
mov BYTE PTR 12[rsp], r10b
je .L3150
mov BYTE PTR 12[rsp], 0
jmp .L459
.L6884:
movzx r10d, BYTE PTR _x_s14_l1[rip]
test r13b, r13b
jne .L6885
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
je .L3149
jmp .L459
.L6885:
or r10b, BYTE PTR s14_l1[rip]
jne .L2309
.L3150:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L458
comiss xmm6, DWORD PTR delta[rip]
jne .L458
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or BYTE PTR 12[rsp], r12b
je .L459
xor r10d, r10d
jmp .L95
.L458:
cmp BYTE PTR 12[rsp], 0
jne .L2309
jmp .L459
.L462:
xor r10d, r10d
cmp BYTE PTR _x_s13_l1[rip], 0
jne .L95
jmp .L1895
.L476:
test bpl, bpl
je .L6886
movzx ebx, BYTE PTR _x_s13_l1[rip]
test bl, bl
jne .L6887
movss xmm3, DWORD PTR s13_lambda[rip]
ucomiss xmm4, xmm3
jp .L487
je .L2301
jmp .L487
.L466:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s13_evt2[rip]
movzx r11d, BYTE PTR s13_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s13_evt1[rip]
je .L95
jmp .L469
.L6886:
mov ebx, r12d
or bl, BYTE PTR _x_s13_l1[rip]
je .L6888
movzx ebx, BYTE PTR _x_s13_l1[rip]
test bl, bl
je .L483
xor ebx, ebx
jmp .L2835
.L6659:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L441
comiss xmm5, DWORD PTR delta[rip]
jne .L441
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, r10b
mov BYTE PTR 12[rsp], r12b
je .L442
xor r10d, r10d
jmp .L95
.L6656:
cmp BYTE PTR _x_s14_l1[rip], 0
mov r11d, ebx
mov r15d, ebx
je .L434
jmp .L433
.L6657:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L434
comiss xmm5, DWORD PTR delta[rip]
jne .L434
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, r10b
je .L435
xor r10d, r10d
jmp .L95
.L442:
test r11b, r11b
jne .L2849
jmp .L2848
.L435:
movss xmm4, DWORD PTR s14_x[rip]
jmp .L439
.L6655:
cmp BYTE PTR s14_l1[rip], 0
jne .L432
.L2852:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L432
comiss xmm7, DWORD PTR delta[rip]
jne .L432
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r10b, r12b
je .L432
xor r10d, r10d
jmp .L95
.L6654:
test bpl, bpl
jne .L2320
.L2854:
mov ebx, r13d
or bl, BYTE PTR s14_l1[rip]
jne .L424
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L424
comiss xmm7, DWORD PTR delta[rip]
jne .L424
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r10b, r12b
je .L425
xor r10d, r10d
jmp .L95
.L432:
pxor xmm7, xmm7
mov r11d, 0
ucomiss xmm5, xmm7
setnp bl
cmovne ebx, r11d
ucomiss xmm4, xmm3
mov r15d, ebx
setnp bl
cmove r11d, ebx
mov ebx, r15d
and bl, r11b
je .L433
mov r11d, ebx
mov r15d, ebx
jmp .L434
.L425:
movss xmm3, DWORD PTR s14_lambda[rip]
ucomiss xmm4, xmm3
jp .L1899
je .L431
.L1899:
pxor xmm7, xmm7
mov r11d, 0
ucomiss xmm5, xmm7
setnp bl
cmovne ebx, r11d
ucomiss xmm4, xmm3
mov r15d, ebx
setnp bl
cmove r11d, ebx
jmp .L433
.L424:
movss xmm3, DWORD PTR s14_lambda[rip]
ucomiss xmm4, xmm3
jp .L2316
jne .L2316
.L1900:
test r10b, r10b
je .L2320
.L428:
cmp BYTE PTR s14_evt1[rip], 0
je .L430
cmp BYTE PTR s14_evt0[rip], 0
je .L431
jmp .L430
.L416:
test bpl, bpl
je .L6889
.L2323:
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
je .L421
cmp BYTE PTR _x_s14_l1[rip], 0
je .L422
test bpl, bpl
je .L2854
movss xmm3, DWORD PTR s14_lambda[rip]
ucomiss xmm4, xmm3
jp .L1904
je .L1900
.L1904:
mov ebx, r13d
or bl, BYTE PTR _x_s14_l1[rip]
je .L6890
.L2316:
pxor xmm4, xmm4
mov r11d, 0
ucomiss xmm5, xmm4
mov r15d, r11d
setnp bl
cmove r15d, ebx
jmp .L433
.L6890:
cmp BYTE PTR s14_l1[rip], 0
je .L2852
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r11b
mov r15d, r11d
cmovne r15d, ebx
ucomiss xmm4, xmm3
setnp r11b
cmovne r11d, ebx
jmp .L433
.L6889:
mov ebx, r13d
or bl, BYTE PTR _x_s14_l1[rip]
jne .L2323
cmp BYTE PTR s14_l1[rip], 0
je .L3155
.L2322:
movzx r11d, BYTE PTR s14_evt1[rip]
or r11b, BYTE PTR s14_evt0[rip]
jne .L6891
.L421:
movss xmm3, DWORD PTR s14_lambda[rip]
ucomiss xmm4, xmm3
jp .L426
je .L430
.L426:
test bpl, bpl
jne .L2319
.L2318:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r11b
mov r15d, r11d
cmovne r15d, ebp
ucomiss xmm4, xmm3
setnp r11b
cmovne r11d, ebp
jmp .L433
.L6891:
movss xmm3, DWORD PTR s14_lambda[rip]
ucomiss xmm4, xmm3
jp .L2318
je .L428
jmp .L2318
.L6894:
movzx r10d, BYTE PTR s14_l1[rip]
test r10b, r10b
jne .L420
.L3155:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L419
comiss xmm7, DWORD PTR delta[rip]
jne .L419
movzx r12d, BYTE PTR s14_evt0[rip]
or r12b, BYTE PTR s14_evt1[rip]
or r12b, r10b
je .L420
xor r10d, r10d
jmp .L95
.L422:
movss xmm3, DWORD PTR s14_lambda[rip]
ucomiss xmm4, xmm3
jp .L426
je .L1900
jmp .L426
.L405:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s14_evt2[rip]
movzx r11d, BYTE PTR s14_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s14_evt1[rip]
je .L95
jmp .L408
.L415:
test bpl, bpl
je .L6892
movzx r10d, BYTE PTR _x_s14_l1[rip]
test r10b, r10b
jne .L6893
movss xmm3, DWORD PTR s14_lambda[rip]
ucomiss xmm4, xmm3
jp .L426
je .L2320
jmp .L426
.L419:
test r10b, r10b
jne .L2322
.L420:
movss xmm3, DWORD PTR s14_lambda[rip]
ucomiss xmm3, xmm4
jp .L3873
je .L2320
.L3873:
xor r10d, r10d
jmp .L2318
.L6893:
movss xmm3, DWORD PTR s14_lambda[rip]
ucomiss xmm4, xmm3
jp .L3893
je .L2320
.L3893:
xor r10d, r10d
jmp .L1904
.L6892:
mov ebx, r13d
or bl, BYTE PTR _x_s14_l1[rip]
je .L6894
movzx r10d, BYTE PTR _x_s14_l1[rip]
test r10b, r10b
je .L422
xor r10d, r10d
jmp .L2854
.L6678:
test bpl, bpl
jne .L2263
.L2797:
mov r11d, r12d
or r11b, BYTE PTR s11_l1[rip]
jne .L607
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L607
comiss xmm7, DWORD PTR delta[rip]
jne .L607
movzx r11d, BYTE PTR s11_evt0[rip]
or r11b, BYTE PTR s11_evt1[rip]
or bl, r11b
je .L608
xor r10d, r10d
jmp .L95
.L598:
test bpl, bpl
je .L6895
movzx ebx, BYTE PTR _x_s11_l1[rip]
test bl, bl
jne .L6896
movss xmm3, DWORD PTR s11_lambda[rip]
ucomiss xmm4, xmm3
jp .L609
je .L2263
.L609:
test bpl, bpl
jne .L2262
.L2261:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, ebp
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
mov r11d, r10d
cmovne r11d, ebp
jmp .L616
.L6896:
movss xmm3, DWORD PTR s11_lambda[rip]
ucomiss xmm4, xmm3
jp .L3890
je .L2263
.L3890:
xor ebx, ebx
.L1869:
mov r11d, r12d
or r11b, BYTE PTR _x_s11_l1[rip]
je .L6897
.L2259:
pxor xmm4, xmm4
mov r10d, 0
ucomiss xmm5, xmm4
setnp r11b
cmove r10d, r11d
xor r11d, r11d
mov r13d, r10d
jmp .L616
.L6895:
mov ebx, r12d
or bl, BYTE PTR _x_s11_l1[rip]
je .L6898
movzx ebx, BYTE PTR _x_s11_l1[rip]
test bl, bl
je .L605
xor ebx, ebx
jmp .L2797
.L605:
movss xmm3, DWORD PTR s11_lambda[rip]
ucomiss xmm4, xmm3
jp .L609
jne .L609
.L1865:
test bl, bl
je .L2263
.L611:
cmp BYTE PTR s11_evt1[rip], 0
je .L613
cmp BYTE PTR s11_evt0[rip], 0
je .L614
jmp .L613
.L6898:
movzx ebx, BYTE PTR s11_l1[rip]
test bl, bl
je .L3134
.L603:
movss xmm3, DWORD PTR s11_lambda[rip]
ucomiss xmm4, xmm3
jp .L3870
je .L2263
.L3870:
xor ebx, ebx
jmp .L2261
.L6897:
cmp BYTE PTR s11_l1[rip], 0
je .L2795
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
cmove r11d, r10d
jmp .L616
.L6900:
mov r11d, r12d
or r11b, BYTE PTR _x_s11_l1[rip]
jne .L2266
cmp BYTE PTR s11_l1[rip], 0
jne .L2265
.L3134:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L602
comiss xmm7, DWORD PTR delta[rip]
jne .L602
movzx r11d, BYTE PTR s11_evt0[rip]
or r11b, BYTE PTR s11_evt1[rip]
mov r10d, r11d
or r10b, bl
je .L603
xor r10d, r10d
jmp .L95
.L6679:
cmp BYTE PTR s11_l1[rip], 0
jne .L615
.L2795:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L615
comiss xmm7, DWORD PTR delta[rip]
jne .L615
movzx r11d, BYTE PTR s11_evt0[rip]
or r11b, BYTE PTR s11_evt1[rip]
or bl, r11b
je .L615
xor r10d, r10d
jmp .L95
.L602:
test bl, bl
je .L603
.L2265:
movzx r11d, BYTE PTR s11_evt0[rip]
or r11b, BYTE PTR s11_evt1[rip]
jne .L6899
.L604:
movss xmm3, DWORD PTR s11_lambda[rip]
ucomiss xmm4, xmm3
jp .L609
je .L613
jmp .L609
.L615:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
je .L616
mov r11d, r10d
mov r13d, r10d
jmp .L617
.L6899:
movss xmm3, DWORD PTR s11_lambda[rip]
ucomiss xmm4, xmm3
jp .L2261
je .L611
jmp .L2261
.L608:
movss xmm3, DWORD PTR s11_lambda[rip]
ucomiss xmm4, xmm3
jp .L1872
je .L614
.L1872:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
jmp .L616
.L607:
movss xmm3, DWORD PTR s11_lambda[rip]
ucomiss xmm4, xmm3
jp .L2259
je .L1865
jmp .L2259
.L599:
test bpl, bpl
je .L6900
.L2266:
movzx r11d, BYTE PTR s11_evt0[rip]
or r11b, BYTE PTR s11_evt1[rip]
je .L604
cmp BYTE PTR _x_s11_l1[rip], 0
je .L605
test bpl, bpl
je .L2797
movss xmm3, DWORD PTR s11_lambda[rip]
ucomiss xmm4, xmm3
jp .L1869
je .L1865
jmp .L1869
.L588:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s11_evt2[rip]
movzx r11d, BYTE PTR s11_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s11_evt1[rip]
je .L95
jmp .L591
.L584:
xor r10d, r10d
cmp BYTE PTR _x_s11_l1[rip], 0
jne .L95
jmp .L1873
.L582:
xor r10d, r10d
cmp BYTE PTR _x_s11_evt0[rip], 0
jne .L95
jmp .L583
.L6676:
mov BYTE PTR 14[rsp], 0
movzx r10d, BYTE PTR _x_s12_l1[rip]
test r12b, r12b
je .L581
or r10b, BYTE PTR s12_l1[rip]
mov BYTE PTR 14[rsp], r10b
je .L3136
mov BYTE PTR 14[rsp], 0
jmp .L581
.L570:
test r11b, r11b
jne .L1875
jmp .L2810
.L6677:
cmp BYTE PTR s12_l1[rip], 0
jne .L581
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L581
comiss xmm6, DWORD PTR delta[rip]
jne .L581
movzx ebx, BYTE PTR s12_evt0[rip]
xor r10d, r10d
or bl, BYTE PTR s12_evt1[rip]
or BYTE PTR 14[rsp], bl
jne .L95
jmp .L581
.L6681:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L617
comiss xmm5, DWORD PTR delta[rip]
jne .L617
movzx r10d, BYTE PTR s11_evt0[rip]
or r10b, BYTE PTR s11_evt1[rip]
or r10b, bl
je .L618
xor r10d, r10d
jmp .L95
.L6680:
cmp BYTE PTR _x_s11_l1[rip], 0
mov r11d, r10d
mov r13d, r10d
je .L617
jmp .L616
.L6683:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L624
comiss xmm5, DWORD PTR delta[rip]
jne .L624
movzx r10d, BYTE PTR s11_evt0[rip]
or r10b, BYTE PTR s11_evt1[rip]
or r10b, bl
mov BYTE PTR 15[rsp], r10b
je .L625
xor r10d, r10d
jmp .L95
.L618:
movss xmm4, DWORD PTR s11_x[rip]
.L622:
xor ebx, ebx
test bpl, bpl
je .L3130
.L2257:
movzx ebx, BYTE PTR s11_evt0[rip]
mov BYTE PTR 15[rsp], bl
test bl, bl
jne .L3635
jmp .L2258
.L623:
test bl, bl
je .L2257
mov BYTE PTR 15[rsp], bl
jmp .L2258
.L6682:
cmp BYTE PTR s11_evt1[rip], 0
je .L619
mov r10d, ebx
or r10b, BYTE PTR s11_evt0[rip]
mov BYTE PTR 15[rsp], r10b
jne .L619
movss xmm3, DWORD PTR s11_backoff[rip]
comiss xmm3, xmm6
jnb .L621
jmp .L622
.L628:
test r11b, r11b
jne .L633
test r12b, r12b
jne .L2790
.L634:
cmp BYTE PTR 15[rsp], 0
je .L2791
test bpl, bpl
jne .L6901
.L2252:
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
jne .L639
.L3128:
comiss xmm4, DWORD PTR s11_backoff[rip]
jnb .L642
jmp .L639
.L629:
test r11b, r11b
je .L634
.L633:
test bpl, bpl
jne .L1863
jmp .L632
.L6901:
movzx r10d, BYTE PTR _x_s11_l1[rip]
test r12b, r12b
jne .L6902
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
je .L3128
jmp .L642
.L6671:
cmp BYTE PTR s12_l1[rip], 0
jne .L554
.L2814:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L554
comiss xmm7, DWORD PTR delta[rip]
jne .L554
movzx r11d, BYTE PTR s12_evt0[rip]
or r11b, BYTE PTR s12_evt1[rip]
or bl, r11b
je .L554
xor r10d, r10d
jmp .L95
.L554:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
je .L555
mov r11d, r10d
mov r13d, r10d
jmp .L556
.L545:
movss xmm3, DWORD PTR s12_lambda[rip]
ucomiss xmm4, xmm3
jp .L1878
jne .L1878
.L1876:
test bl, bl
je .L2282
.L550:
cmp BYTE PTR s12_evt1[rip], 0
je .L552
cmp BYTE PTR s12_evt0[rip], 0
je .L553
jmp .L552
.L544:
movss xmm3, DWORD PTR s12_lambda[rip]
ucomiss xmm4, xmm3
jp .L548
je .L1876
jmp .L548
.L543:
movss xmm3, DWORD PTR s12_lambda[rip]
ucomiss xmm4, xmm3
jp .L548
je .L552
jmp .L548
.L6874:
mov r11d, r12d
or r11b, BYTE PTR _x_s12_l1[rip]
jne .L2285
cmp BYTE PTR s12_l1[rip], 0
je .L3141
.L2284:
movzx r11d, BYTE PTR s12_evt0[rip]
or r11b, BYTE PTR s12_evt1[rip]
je .L543
movss xmm3, DWORD PTR s12_lambda[rip]
ucomiss xmm4, xmm3
jp .L2280
je .L550
jmp .L2280
.L547:
movss xmm3, DWORD PTR s12_lambda[rip]
ucomiss xmm4, xmm3
jp .L1881
je .L553
.L1881:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
jmp .L555
.L3141:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L541
comiss xmm7, DWORD PTR delta[rip]
jne .L541
movzx r11d, BYTE PTR s12_evt0[rip]
or r11b, BYTE PTR s12_evt1[rip]
mov r10d, r11d
or r10b, bl
je .L542
xor r10d, r10d
jmp .L95
.L546:
movss xmm3, DWORD PTR s12_lambda[rip]
ucomiss xmm4, xmm3
jp .L2278
je .L1876
jmp .L2278
.L541:
test bl, bl
jne .L2284
jmp .L542
.L521:
xor r10d, r10d
cmp BYTE PTR _x_s12_evt0[rip], 0
jne .L95
jmp .L522
.L523:
xor r10d, r10d
cmp BYTE PTR _x_s12_l1[rip], 0
jne .L95
jmp .L1884
.L6668:
mov BYTE PTR 13[rsp], 0
movzx r10d, BYTE PTR _x_s13_l1[rip]
test r12b, r12b
je .L520
or r10b, BYTE PTR s13_l1[rip]
mov BYTE PTR 13[rsp], r10b
je .L3143
mov BYTE PTR 13[rsp], 0
jmp .L520
.L6673:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L556
comiss xmm5, DWORD PTR delta[rip]
jne .L556
movzx r10d, BYTE PTR s12_evt0[rip]
or r10b, BYTE PTR s12_evt1[rip]
or r10b, bl
je .L557
xor r10d, r10d
jmp .L95
.L580:
cmp BYTE PTR 14[rsp], 0
jne .L2271
jmp .L581
.L557:
movss xmm4, DWORD PTR s12_x[rip]
jmp .L561
.L6670:
test bpl, bpl
jne .L2282
jmp .L2816
.L6902:
or r10b, BYTE PTR s11_l1[rip]
jne .L2252
.L3129:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L641
comiss xmm6, DWORD PTR delta[rip]
jne .L641
movzx ebx, BYTE PTR s11_evt0[rip]
or bl, BYTE PTR s11_evt1[rip]
or BYTE PTR 15[rsp], bl
je .L642
xor r10d, r10d
jmp .L95
.L643:
xor r10d, r10d
cmp BYTE PTR _x_s10_evt0[rip], 0
jne .L95
jmp .L644
.L6714:
cmp BYTE PTR s7_evt1[rip], 0
je .L863
mov r10d, ebx
or r10b, BYTE PTR s7_evt0[rip]
mov BYTE PTR 24[rsp], r10b
jne .L863
movss xmm3, DWORD PTR s7_backoff[rip]
comiss xmm3, xmm6
jnb .L865
.L866:
xor ebx, ebx
test bpl, bpl
je .L3102
.L2180:
movzx ebx, BYTE PTR s7_evt0[rip]
mov BYTE PTR 24[rsp], bl
test bl, bl
jne .L3623
jmp .L2181
.L6715:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L868
comiss xmm5, DWORD PTR delta[rip]
jne .L868
movzx r10d, BYTE PTR s7_evt0[rip]
or r10b, BYTE PTR s7_evt1[rip]
or r10b, bl
mov BYTE PTR 24[rsp], r10b
je .L869
xor r10d, r10d
jmp .L95
.L882:
test bpl, bpl
jne .L6903
.L2176:
movzx ebx, BYTE PTR s7_evt0[rip]
or bl, BYTE PTR s7_evt1[rip]
jne .L883
.L3100:
comiss xmm4, DWORD PTR s7_backoff[rip]
jnb .L886
jmp .L883
.L869:
test r11b, r11b
jne .L2716
jmp .L2715
.L6903:
movzx r10d, BYTE PTR _x_s7_l1[rip]
test r12b, r12b
jne .L6904
movzx ebx, BYTE PTR s7_evt0[rip]
or bl, BYTE PTR s7_evt1[rip]
je .L3100
jmp .L886
.L872:
test r11b, r11b
je .L6905
.L877:
test bpl, bpl
jne .L1819
jmp .L876
.L6905:
test r12b, r12b
je .L878
jmp .L2714
.L873:
test r11b, r11b
jne .L877
jmp .L878
.L871:
test r11b, r11b
jne .L2178
jmp .L876
.L6904:
or r10b, BYTE PTR s7_l1[rip]
jne .L2176
.L3101:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L885
comiss xmm6, DWORD PTR delta[rip]
jne .L885
movzx ebx, BYTE PTR s7_evt0[rip]
or bl, BYTE PTR s7_evt1[rip]
or BYTE PTR 24[rsp], bl
je .L886
xor r10d, r10d
jmp .L95
.L6712:
cmp BYTE PTR _x_s7_l1[rip], 0
mov r11d, r10d
mov r13d, r10d
je .L861
jmp .L860
.L843:
test bpl, bpl
je .L6906
.L2190:
movzx r11d, BYTE PTR s7_evt0[rip]
or r11b, BYTE PTR s7_evt1[rip]
je .L848
cmp BYTE PTR _x_s7_l1[rip], 0
je .L849
test bpl, bpl
jne .L850
.L2721:
mov r11d, r12d
or r11b, BYTE PTR s7_l1[rip]
jne .L851
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L851
comiss xmm7, DWORD PTR delta[rip]
jne .L851
movzx r11d, BYTE PTR s7_evt0[rip]
or r11b, BYTE PTR s7_evt1[rip]
or bl, r11b
je .L852
xor r10d, r10d
jmp .L95
.L832:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s7_evt2[rip]
movzx r11d, BYTE PTR s7_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s7_evt1[rip]
je .L95
jmp .L835
.L842:
test bpl, bpl
je .L6907
movzx ebx, BYTE PTR _x_s7_l1[rip]
test bl, bl
jne .L6908
movss xmm3, DWORD PTR s7_lambda[rip]
ucomiss xmm4, xmm3
jp .L853
je .L2187
.L853:
test bpl, bpl
jne .L2186
.L2185:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, ebp
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
mov r11d, r10d
cmovne r11d, ebp
jmp .L860
.L6908:
movss xmm3, DWORD PTR s7_lambda[rip]
ucomiss xmm4, xmm3
jp .L3886
je .L2187
.L3886:
xor ebx, ebx
.L1827:
mov r11d, r12d
or r11b, BYTE PTR _x_s7_l1[rip]
je .L6909
.L2183:
pxor xmm4, xmm4
mov r10d, 0
ucomiss xmm5, xmm4
setnp r11b
cmove r10d, r11d
xor r11d, r11d
mov r13d, r10d
jmp .L860
.L6907:
mov ebx, r12d
or bl, BYTE PTR _x_s7_l1[rip]
je .L6910
movzx ebx, BYTE PTR _x_s7_l1[rip]
test bl, bl
je .L849
xor ebx, ebx
jmp .L2721
.L6910:
movzx ebx, BYTE PTR s7_l1[rip]
test bl, bl
je .L3106
.L847:
movss xmm3, DWORD PTR s7_lambda[rip]
ucomiss xmm4, xmm3
jp .L3866
je .L2187
.L3866:
xor ebx, ebx
jmp .L2185
.L6909:
cmp BYTE PTR s7_l1[rip], 0
je .L2719
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
cmove r11d, r10d
jmp .L860
.L745:
test bl, bl
je .L2218
mov BYTE PTR 21[rsp], bl
jmp .L2219
.L751:
test r11b, r11b
je .L756
.L755:
test bpl, bpl
jne .L1841
jmp .L754
.L753:
test r11b, r11b
je .L2753
.L1842:
test bpl, bpl
jne .L1841
jmp .L756
.L6698:
cmp BYTE PTR s9_evt1[rip], 0
je .L741
mov r10d, ebx
or r10b, BYTE PTR s9_evt0[rip]
mov BYTE PTR 21[rsp], r10b
jne .L741
movss xmm3, DWORD PTR s9_backoff[rip]
comiss xmm3, xmm6
jnb .L743
.L744:
xor ebx, ebx
test bpl, bpl
je .L3116
.L2218:
movzx ebx, BYTE PTR s9_evt0[rip]
mov BYTE PTR 21[rsp], bl
test bl, bl
jne .L3629
jmp .L2219
.L752:
test r11b, r11b
jne .L1842
jmp .L756
.L749:
test r11b, r11b
jne .L2216
jmp .L754
.L948:
xor r10d, r10d
cmp BYTE PTR _x_s5_evt0[rip], 0
jne .L95
jmp .L949
.L6724:
mov BYTE PTR 25[rsp], 0
movzx r10d, BYTE PTR _x_s6_l1[rip]
test r12b, r12b
je .L947
or r10b, BYTE PTR s6_l1[rip]
mov BYTE PTR 25[rsp], r10b
je .L3094
mov BYTE PTR 25[rsp], 0
jmp .L947
.L689:
test r11b, r11b
je .L6911
.L694:
test bpl, bpl
jne .L1852
jmp .L693
.L688:
test r11b, r11b
jne .L2235
jmp .L693
.L699:
test bpl, bpl
jne .L6912
.L2233:
movzx ebx, BYTE PTR s10_evt0[rip]
or bl, BYTE PTR s10_evt1[rip]
jne .L700
.L3121:
comiss xmm4, DWORD PTR s10_backoff[rip]
jnb .L703
jmp .L700
.L684:
test bl, bl
je .L2237
mov BYTE PTR 20[rsp], bl
jmp .L2238
.L6688:
cmp BYTE PTR _x_s10_l1[rip], 0
mov r11d, r10d
mov r13d, r10d
je .L678
jmp .L677
.L6690:
cmp BYTE PTR s10_evt1[rip], 0
je .L680
mov r10d, ebx
or r10b, BYTE PTR s10_evt0[rip]
mov BYTE PTR 20[rsp], r10b
jne .L680
movss xmm3, DWORD PTR s10_backoff[rip]
comiss xmm3, xmm6
jnb .L682
.L683:
xor ebx, ebx
test bpl, bpl
je .L3123
.L2237:
movzx ebx, BYTE PTR s10_evt0[rip]
mov BYTE PTR 20[rsp], bl
test bl, bl
jne .L3632
jmp .L2238
.L6691:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L685
comiss xmm5, DWORD PTR delta[rip]
jne .L685
movzx r10d, BYTE PTR s10_evt0[rip]
or r10b, BYTE PTR s10_evt1[rip]
or r10b, bl
mov BYTE PTR 20[rsp], r10b
je .L686
xor r10d, r10d
jmp .L95
.L6912:
movzx r10d, BYTE PTR _x_s10_l1[rip]
test r12b, r12b
jne .L6913
movzx ebx, BYTE PTR s10_evt0[rip]
or bl, BYTE PTR s10_evt1[rip]
je .L3121
jmp .L703
.L686:
test r11b, r11b
jne .L2773
jmp .L2772
.L6913:
or r10b, BYTE PTR s10_l1[rip]
jne .L2233
.L3122:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L702
comiss xmm6, DWORD PTR delta[rip]
jne .L702
movzx ebx, BYTE PTR s10_evt0[rip]
or bl, BYTE PTR s10_evt1[rip]
or BYTE PTR 20[rsp], bl
je .L703
xor r10d, r10d
jmp .L95
.L691:
test r11b, r11b
je .L695
.L1853:
test bpl, bpl
jne .L1852
jmp .L695
.L704:
xor r10d, r10d
cmp BYTE PTR _x_s9_evt0[rip], 0
jne .L95
jmp .L705
.L706:
xor r10d, r10d
cmp BYTE PTR _x_s9_l1[rip], 0
jne .L95
jmp .L1851
.L6692:
mov BYTE PTR 20[rsp], 0
movzx r10d, BYTE PTR _x_s10_l1[rip]
test r12b, r12b
je .L703
or r10b, BYTE PTR s10_l1[rip]
mov BYTE PTR 20[rsp], r10b
je .L3122
mov BYTE PTR 20[rsp], 0
jmp .L703
.L692:
test r11b, r11b
jne .L1853
jmp .L2772
.L6693:
cmp BYTE PTR s10_l1[rip], 0
jne .L703
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L703
comiss xmm6, DWORD PTR delta[rip]
jne .L703
movzx ebx, BYTE PTR s10_evt0[rip]
xor r10d, r10d
or bl, BYTE PTR s10_evt1[rip]
or BYTE PTR 20[rsp], bl
jne .L95
jmp .L703
.L690:
test r11b, r11b
jne .L694
jmp .L695
.L702:
cmp BYTE PTR 20[rsp], 0
jne .L2233
jmp .L703
.L645:
xor r10d, r10d
cmp BYTE PTR _x_s10_l1[rip], 0
jne .L95
jmp .L1862
.L659:
test bpl, bpl
je .L6914
movzx ebx, BYTE PTR _x_s10_l1[rip]
test bl, bl
jne .L6915
movss xmm3, DWORD PTR s10_lambda[rip]
ucomiss xmm4, xmm3
jp .L670
je .L2244
.L670:
test bpl, bpl
jne .L2243
.L2242:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, ebp
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
mov r11d, r10d
cmovne r11d, ebp
jmp .L677
.L6915:
movss xmm3, DWORD PTR s10_lambda[rip]
ucomiss xmm4, xmm3
jp .L3889
je .L2244
.L3889:
xor ebx, ebx
.L1860:
mov r11d, r12d
or r11b, BYTE PTR _x_s10_l1[rip]
je .L6916
.L2240:
pxor xmm4, xmm4
mov r10d, 0
ucomiss xmm5, xmm4
setnp r11b
cmove r10d, r11d
xor r11d, r11d
mov r13d, r10d
jmp .L677
.L6914:
mov ebx, r12d
or bl, BYTE PTR _x_s10_l1[rip]
je .L6917
movzx ebx, BYTE PTR _x_s10_l1[rip]
test bl, bl
je .L666
xor ebx, ebx
.L2778:
mov r11d, r12d
or r11b, BYTE PTR s10_l1[rip]
jne .L668
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L668
comiss xmm7, DWORD PTR delta[rip]
jne .L668
movzx r11d, BYTE PTR s10_evt0[rip]
or r11b, BYTE PTR s10_evt1[rip]
or bl, r11b
je .L669
xor r10d, r10d
jmp .L95
.L649:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s10_evt2[rip]
movzx r11d, BYTE PTR s10_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s10_evt1[rip]
je .L95
jmp .L652
.L669:
movss xmm3, DWORD PTR s10_lambda[rip]
ucomiss xmm4, xmm3
jp .L1855
je .L675
.L1855:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
jmp .L677
.L630:
test r11b, r11b
je .L634
.L1864:
test bpl, bpl
jne .L1863
jmp .L634
.L627:
test r11b, r11b
jne .L2254
jmp .L632
.L631:
test r11b, r11b
jne .L1864
jmp .L2791
.L6685:
cmp BYTE PTR s11_l1[rip], 0
jne .L642
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L642
comiss xmm6, DWORD PTR delta[rip]
jne .L642
movzx ebx, BYTE PTR s11_evt0[rip]
xor r10d, r10d
or bl, BYTE PTR s11_evt1[rip]
or BYTE PTR 15[rsp], bl
jne .L95
jmp .L642
.L6684:
mov BYTE PTR 15[rsp], 0
movzx r10d, BYTE PTR _x_s11_l1[rip]
test r12b, r12b
je .L642
or r10b, BYTE PTR s11_l1[rip]
mov BYTE PTR 15[rsp], r10b
je .L3129
mov BYTE PTR 15[rsp], 0
jmp .L642
.L641:
cmp BYTE PTR 15[rsp], 0
jne .L2252
jmp .L642
.L6686:
test bpl, bpl
jne .L2244
jmp .L2778
.L660:
test bpl, bpl
je .L6918
.L2247:
movzx r11d, BYTE PTR s10_evt0[rip]
or r11b, BYTE PTR s10_evt1[rip]
je .L665
cmp BYTE PTR _x_s10_l1[rip], 0
je .L666
test bpl, bpl
je .L2778
movss xmm3, DWORD PTR s10_lambda[rip]
ucomiss xmm4, xmm3
jp .L1860
jne .L1860
.L1856:
test bl, bl
je .L2244
.L672:
cmp BYTE PTR s10_evt1[rip], 0
je .L674
cmp BYTE PTR s10_evt0[rip], 0
je .L675
jmp .L674
.L6687:
cmp BYTE PTR s10_l1[rip], 0
jne .L676
.L2776:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L676
comiss xmm7, DWORD PTR delta[rip]
jne .L676
movzx r11d, BYTE PTR s10_evt0[rip]
or r11b, BYTE PTR s10_evt1[rip]
or bl, r11b
je .L676
xor r10d, r10d
jmp .L95
.L6689:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L678
comiss xmm5, DWORD PTR delta[rip]
jne .L678
movzx r10d, BYTE PTR s10_evt0[rip]
or r10b, BYTE PTR s10_evt1[rip]
or r10b, bl
je .L679
xor r10d, r10d
jmp .L95
.L676:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
je .L677
mov r11d, r10d
mov r13d, r10d
jmp .L678
.L679:
movss xmm4, DWORD PTR s10_x[rip]
jmp .L683
.L665:
movss xmm3, DWORD PTR s10_lambda[rip]
ucomiss xmm4, xmm3
jp .L670
je .L674
jmp .L670
.L6918:
mov r11d, r12d
or r11b, BYTE PTR _x_s10_l1[rip]
jne .L2247
cmp BYTE PTR s10_l1[rip], 0
je .L3127
.L2246:
movzx r11d, BYTE PTR s10_evt0[rip]
or r11b, BYTE PTR s10_evt1[rip]
je .L665
movss xmm3, DWORD PTR s10_lambda[rip]
ucomiss xmm4, xmm3
jp .L2242
je .L672
jmp .L2242
.L666:
movss xmm3, DWORD PTR s10_lambda[rip]
ucomiss xmm4, xmm3
jp .L670
je .L1856
jmp .L670
.L668:
movss xmm3, DWORD PTR s10_lambda[rip]
ucomiss xmm4, xmm3
jp .L2240
je .L1856
jmp .L2240
.L6916:
cmp BYTE PTR s10_l1[rip], 0
je .L2776
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
cmove r11d, r10d
jmp .L677
.L6917:
movzx ebx, BYTE PTR s10_l1[rip]
test bl, bl
je .L3127
.L664:
movss xmm3, DWORD PTR s10_lambda[rip]
ucomiss xmm4, xmm3
jp .L3869
je .L2244
.L3869:
xor ebx, ebx
jmp .L2242
.L3127:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L663
comiss xmm7, DWORD PTR delta[rip]
jne .L663
movzx r11d, BYTE PTR s10_evt0[rip]
or r11b, BYTE PTR s10_evt1[rip]
mov r10d, r11d
or r10b, bl
je .L664
xor r10d, r10d
jmp .L95
.L663:
test bl, bl
jne .L2246
jmp .L664
.L806:
test bl, bl
je .L2199
mov BYTE PTR 23[rsp], bl
jmp .L2200
.L6706:
cmp BYTE PTR s8_evt1[rip], 0
je .L802
mov r10d, ebx
or r10b, BYTE PTR s8_evt0[rip]
mov BYTE PTR 23[rsp], r10b
jne .L802
movss xmm3, DWORD PTR s8_backoff[rip]
comiss xmm3, xmm6
jnb .L804
.L805:
xor ebx, ebx
test bpl, bpl
je .L3109
.L2199:
movzx ebx, BYTE PTR s8_evt0[rip]
mov BYTE PTR 23[rsp], bl
test bl, bl
jne .L3626
jmp .L2200
.L6704:
cmp BYTE PTR _x_s8_l1[rip], 0
mov r11d, r10d
mov r13d, r10d
je .L800
jmp .L799
.L6707:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L807
comiss xmm5, DWORD PTR delta[rip]
jne .L807
movzx r10d, BYTE PTR s8_evt0[rip]
or r10b, BYTE PTR s8_evt1[rip]
or r10b, bl
mov BYTE PTR 23[rsp], r10b
je .L808
xor r10d, r10d
jmp .L95
.L6702:
test bpl, bpl
jne .L2206
.L2740:
mov r11d, r12d
or r11b, BYTE PTR s8_l1[rip]
jne .L790
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L790
comiss xmm7, DWORD PTR delta[rip]
jne .L790
movzx r11d, BYTE PTR s8_evt0[rip]
or r11b, BYTE PTR s8_evt1[rip]
or bl, r11b
je .L791
xor r10d, r10d
jmp .L95
.L6703:
cmp BYTE PTR s8_l1[rip], 0
jne .L798
.L2738:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L798
comiss xmm7, DWORD PTR delta[rip]
jne .L798
movzx r11d, BYTE PTR s8_evt0[rip]
or r11b, BYTE PTR s8_evt1[rip]
or bl, r11b
je .L798
xor r10d, r10d
jmp .L95
.L6705:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L800
comiss xmm5, DWORD PTR delta[rip]
jne .L800
movzx r10d, BYTE PTR s8_evt0[rip]
or r10b, BYTE PTR s8_evt1[rip]
or r10b, bl
je .L801
xor r10d, r10d
jmp .L95
.L798:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
je .L799
mov r11d, r10d
mov r13d, r10d
jmp .L800
.L801:
movss xmm4, DWORD PTR s8_x[rip]
jmp .L805
.L782:
test bpl, bpl
je .L6919
.L2209:
movzx r11d, BYTE PTR s8_evt0[rip]
or r11b, BYTE PTR s8_evt1[rip]
je .L787
cmp BYTE PTR _x_s8_l1[rip], 0
je .L788
test bpl, bpl
je .L2740
movss xmm3, DWORD PTR s8_lambda[rip]
ucomiss xmm4, xmm3
jp .L1836
jne .L1836
.L1832:
test bl, bl
je .L2206
.L794:
cmp BYTE PTR s8_evt1[rip], 0
je .L796
cmp BYTE PTR s8_evt0[rip], 0
je .L797
jmp .L796
.L6927:
movss xmm3, DWORD PTR s8_lambda[rip]
ucomiss xmm4, xmm3
jp .L3887
je .L2206
.L3887:
xor ebx, ebx
.L1836:
mov r11d, r12d
or r11b, BYTE PTR _x_s8_l1[rip]
je .L6920
.L2202:
pxor xmm4, xmm4
mov r10d, 0
ucomiss xmm5, xmm4
setnp r11b
cmove r10d, r11d
xor r11d, r11d
mov r13d, r10d
jmp .L799
.L788:
movss xmm3, DWORD PTR s8_lambda[rip]
ucomiss xmm4, xmm3
jp .L792
je .L1832
.L792:
test bpl, bpl
jne .L2205
.L2204:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, ebp
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
mov r11d, r10d
cmovne r11d, ebp
jmp .L799
.L6920:
cmp BYTE PTR s8_l1[rip], 0
je .L2738
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
cmove r11d, r10d
jmp .L799
.L787:
movss xmm3, DWORD PTR s8_lambda[rip]
ucomiss xmm4, xmm3
jp .L792
je .L796
jmp .L792
.L6919:
mov r11d, r12d
or r11b, BYTE PTR _x_s8_l1[rip]
jne .L2209
cmp BYTE PTR s8_l1[rip], 0
je .L3113
.L2208:
movzx r11d, BYTE PTR s8_evt0[rip]
or r11b, BYTE PTR s8_evt1[rip]
je .L787
movss xmm3, DWORD PTR s8_lambda[rip]
ucomiss xmm4, xmm3
jp .L2204
je .L794
jmp .L2204
.L791:
movss xmm3, DWORD PTR s8_lambda[rip]
ucomiss xmm4, xmm3
jp .L1839
je .L797
.L1839:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
jmp .L799
.L790:
movss xmm3, DWORD PTR s8_lambda[rip]
ucomiss xmm4, xmm3
jp .L2202
je .L1832
jmp .L2202
.L6928:
movzx ebx, BYTE PTR s8_l1[rip]
test bl, bl
jne .L786
.L3113:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L785
comiss xmm7, DWORD PTR delta[rip]
jne .L785
movzx r11d, BYTE PTR s8_evt0[rip]
or r11b, BYTE PTR s8_evt1[rip]
mov r10d, r11d
or r10b, bl
je .L786
xor r10d, r10d
jmp .L95
.L811:
test r11b, r11b
je .L6921
.L816:
test bpl, bpl
jne .L1830
jmp .L815
.L6921:
test r12b, r12b
jne .L2733
.L817:
cmp BYTE PTR 23[rsp], 0
je .L2734
test bpl, bpl
jne .L6922
.L2195:
movzx ebx, BYTE PTR s8_evt0[rip]
or bl, BYTE PTR s8_evt1[rip]
jne .L822
.L3107:
comiss xmm4, DWORD PTR s8_backoff[rip]
jnb .L825
jmp .L822
.L810:
test r11b, r11b
jne .L2197
jmp .L815
.L6922:
movzx r10d, BYTE PTR _x_s8_l1[rip]
test r12b, r12b
jne .L6923
movzx ebx, BYTE PTR s8_evt0[rip]
or bl, BYTE PTR s8_evt1[rip]
je .L3107
jmp .L825
.L785:
test bl, bl
jne .L2208
.L786:
movss xmm3, DWORD PTR s8_lambda[rip]
ucomiss xmm4, xmm3
jp .L3867
je .L2206
.L3867:
xor ebx, ebx
jmp .L2204
.L6923:
or r10b, BYTE PTR s8_l1[rip]
jne .L2195
.L3108:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L824
comiss xmm6, DWORD PTR delta[rip]
jne .L824
movzx ebx, BYTE PTR s8_evt0[rip]
or bl, BYTE PTR s8_evt1[rip]
or BYTE PTR 23[rsp], bl
je .L825
xor r10d, r10d
jmp .L95
.L824:
cmp BYTE PTR 23[rsp], 0
jne .L2195
jmp .L825
.L813:
test r11b, r11b
je .L817
.L1831:
test bpl, bpl
jne .L1830
jmp .L817
.L812:
test r11b, r11b
jne .L816
jmp .L817
.L814:
test r11b, r11b
jne .L1831
jmp .L2734
.L6709:
cmp BYTE PTR s8_l1[rip], 0
jne .L825
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L825
comiss xmm6, DWORD PTR delta[rip]
jne .L825
movzx ebx, BYTE PTR s8_evt0[rip]
xor r10d, r10d
or bl, BYTE PTR s8_evt1[rip]
or BYTE PTR 23[rsp], bl
jne .L95
jmp .L825
.L765:
xor r10d, r10d
cmp BYTE PTR _x_s8_evt0[rip], 0
jne .L95
jmp .L766
.L6701:
cmp BYTE PTR s9_l1[rip], 0
jne .L764
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L764
comiss xmm6, DWORD PTR delta[rip]
jne .L764
movzx ebx, BYTE PTR s9_evt0[rip]
xor r10d, r10d
or bl, BYTE PTR s9_evt1[rip]
or BYTE PTR 21[rsp], bl
jne .L95
jmp .L764
.L760:
test bpl, bpl
jne .L6924
.L2214:
movzx ebx, BYTE PTR s9_evt0[rip]
or bl, BYTE PTR s9_evt1[rip]
jne .L761
.L3114:
comiss xmm4, DWORD PTR s9_backoff[rip]
jnb .L764
jmp .L761
.L6700:
mov BYTE PTR 21[rsp], 0
movzx r10d, BYTE PTR _x_s9_l1[rip]
test r12b, r12b
je .L764
or r10b, BYTE PTR s9_l1[rip]
mov BYTE PTR 21[rsp], r10b
je .L3115
mov BYTE PTR 21[rsp], 0
jmp .L764
.L6924:
movzx r10d, BYTE PTR _x_s9_l1[rip]
test r12b, r12b
jne .L6925
movzx ebx, BYTE PTR s9_evt0[rip]
or bl, BYTE PTR s9_evt1[rip]
je .L3114
jmp .L764
.L6925:
or r10b, BYTE PTR s9_l1[rip]
jne .L2214
.L3115:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L763
comiss xmm6, DWORD PTR delta[rip]
jne .L763
movzx ebx, BYTE PTR s9_evt0[rip]
or bl, BYTE PTR s9_evt1[rip]
or BYTE PTR 21[rsp], bl
je .L764
xor r10d, r10d
jmp .L95
.L763:
cmp BYTE PTR 21[rsp], 0
jne .L2214
jmp .L764
.L767:
xor r10d, r10d
cmp BYTE PTR _x_s8_l1[rip], 0
jne .L95
jmp .L1840
.L781:
test bpl, bpl
je .L6926
movzx ebx, BYTE PTR _x_s8_l1[rip]
test bl, bl
jne .L6927
movss xmm3, DWORD PTR s8_lambda[rip]
ucomiss xmm4, xmm3
jp .L792
je .L2206
jmp .L792
.L771:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s8_evt2[rip]
movzx r11d, BYTE PTR s8_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s8_evt1[rip]
je .L95
jmp .L774
.L6926:
mov ebx, r12d
or bl, BYTE PTR _x_s8_l1[rip]
je .L6928
movzx ebx, BYTE PTR _x_s8_l1[rip]
test bl, bl
je .L788
xor ebx, ebx
jmp .L2740
.L6699:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L746
comiss xmm5, DWORD PTR delta[rip]
jne .L746
movzx r10d, BYTE PTR s9_evt0[rip]
or r10b, BYTE PTR s9_evt1[rip]
or r10b, bl
mov BYTE PTR 21[rsp], r10b
je .L747
xor r10d, r10d
jmp .L95
.L6696:
cmp BYTE PTR _x_s9_l1[rip], 0
mov r11d, r10d
mov r13d, r10d
je .L739
jmp .L738
.L6697:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L739
comiss xmm5, DWORD PTR delta[rip]
jne .L739
movzx r10d, BYTE PTR s9_evt0[rip]
or r10b, BYTE PTR s9_evt1[rip]
or r10b, bl
je .L740
xor r10d, r10d
jmp .L95
.L747:
test r11b, r11b
jne .L2754
jmp .L2753
.L740:
movss xmm4, DWORD PTR s9_x[rip]
jmp .L744
.L6695:
cmp BYTE PTR s9_l1[rip], 0
jne .L737
.L2757:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L737
comiss xmm7, DWORD PTR delta[rip]
jne .L737
movzx r11d, BYTE PTR s9_evt0[rip]
or r11b, BYTE PTR s9_evt1[rip]
or bl, r11b
je .L737
xor r10d, r10d
jmp .L95
.L6694:
test bpl, bpl
jne .L2225
.L2759:
mov r11d, r12d
or r11b, BYTE PTR s9_l1[rip]
jne .L729
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L729
comiss xmm7, DWORD PTR delta[rip]
jne .L729
movzx r11d, BYTE PTR s9_evt0[rip]
or r11b, BYTE PTR s9_evt1[rip]
or bl, r11b
je .L730
xor r10d, r10d
jmp .L95
.L737:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
je .L738
mov r11d, r10d
mov r13d, r10d
jmp .L739
.L730:
movss xmm3, DWORD PTR s9_lambda[rip]
ucomiss xmm4, xmm3
jp .L1848
je .L736
.L1848:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
jmp .L738
.L729:
movss xmm3, DWORD PTR s9_lambda[rip]
ucomiss xmm4, xmm3
jp .L2221
jne .L2221
.L1843:
test bl, bl
je .L2225
.L733:
cmp BYTE PTR s9_evt1[rip], 0
je .L735
cmp BYTE PTR s9_evt0[rip], 0
je .L736
jmp .L735
.L721:
test bpl, bpl
je .L6929
.L2228:
movzx r11d, BYTE PTR s9_evt0[rip]
or r11b, BYTE PTR s9_evt1[rip]
je .L726
cmp BYTE PTR _x_s9_l1[rip], 0
je .L727
test bpl, bpl
je .L2759
movss xmm3, DWORD PTR s9_lambda[rip]
ucomiss xmm4, xmm3
jp .L1845
je .L1843
.L1845:
mov r11d, r12d
or r11b, BYTE PTR _x_s9_l1[rip]
je .L6930
.L2221:
pxor xmm4, xmm4
mov r10d, 0
ucomiss xmm5, xmm4
setnp r11b
cmove r10d, r11d
xor r11d, r11d
mov r13d, r10d
jmp .L738
.L6930:
cmp BYTE PTR s9_l1[rip], 0
je .L2757
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
cmove r11d, r10d
jmp .L738
.L6929:
mov r11d, r12d
or r11b, BYTE PTR _x_s9_l1[rip]
jne .L2228
cmp BYTE PTR s9_l1[rip], 0
je .L3120
.L2227:
movzx r11d, BYTE PTR s9_evt0[rip]
or r11b, BYTE PTR s9_evt1[rip]
jne .L6931
.L726:
movss xmm3, DWORD PTR s9_lambda[rip]
ucomiss xmm4, xmm3
jp .L731
je .L735
.L731:
test bpl, bpl
jne .L2224
.L2223:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, ebp
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
mov r11d, r10d
cmovne r11d, ebp
jmp .L738
.L6931:
movss xmm3, DWORD PTR s9_lambda[rip]
ucomiss xmm4, xmm3
jp .L2223
je .L733
jmp .L2223
.L6934:
movzx ebx, BYTE PTR s9_l1[rip]
test bl, bl
jne .L725
.L3120:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L724
comiss xmm7, DWORD PTR delta[rip]
jne .L724
movzx r11d, BYTE PTR s9_evt0[rip]
or r11b, BYTE PTR s9_evt1[rip]
mov r10d, r11d
or r10b, bl
je .L725
xor r10d, r10d
jmp .L95
.L727:
movss xmm3, DWORD PTR s9_lambda[rip]
ucomiss xmm4, xmm3
jp .L731
je .L1843
jmp .L731
.L710:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s9_evt2[rip]
movzx r11d, BYTE PTR s9_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s9_evt1[rip]
je .L95
jmp .L713
.L720:
test bpl, bpl
je .L6932
movzx ebx, BYTE PTR _x_s9_l1[rip]
test bl, bl
jne .L6933
movss xmm3, DWORD PTR s9_lambda[rip]
ucomiss xmm4, xmm3
jp .L731
je .L2225
jmp .L731
.L724:
test bl, bl
jne .L2227
.L725:
movss xmm3, DWORD PTR s9_lambda[rip]
ucomiss xmm4, xmm3
jp .L3868
je .L2225
.L3868:
xor ebx, ebx
jmp .L2223
.L6933:
movss xmm3, DWORD PTR s9_lambda[rip]
ucomiss xmm4, xmm3
jp .L3888
je .L2225
.L3888:
xor ebx, ebx
jmp .L1845
.L6932:
mov ebx, r12d
or bl, BYTE PTR _x_s9_l1[rip]
je .L6934
movzx ebx, BYTE PTR _x_s9_l1[rip]
test bl, bl
je .L727
xor ebx, ebx
jmp .L2759
.L6718:
test bpl, bpl
jne .L2168
.L2702:
mov r11d, r12d
or r11b, BYTE PTR s6_l1[rip]
jne .L912
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L912
comiss xmm7, DWORD PTR delta[rip]
jne .L912
movzx r11d, BYTE PTR s6_evt0[rip]
or r11b, BYTE PTR s6_evt1[rip]
or bl, r11b
je .L913
xor r10d, r10d
jmp .L95
.L903:
test bpl, bpl
je .L6935
movzx ebx, BYTE PTR _x_s6_l1[rip]
test bl, bl
jne .L6936
movss xmm3, DWORD PTR s6_lambda[rip]
ucomiss xmm4, xmm3
jp .L914
je .L2168
.L914:
test bpl, bpl
jne .L2167
.L2166:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, ebp
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
mov r11d, r10d
cmovne r11d, ebp
jmp .L921
.L6936:
movss xmm3, DWORD PTR s6_lambda[rip]
ucomiss xmm4, xmm3
jp .L3885
je .L2168
.L3885:
xor ebx, ebx
jmp .L1817
.L6935:
mov ebx, r12d
or bl, BYTE PTR _x_s6_l1[rip]
je .L6937
movzx ebx, BYTE PTR _x_s6_l1[rip]
test bl, bl
je .L910
xor ebx, ebx
jmp .L2702
.L994:
test r11b, r11b
je .L6938
.L999:
test bpl, bpl
jne .L1797
jmp .L998
.L993:
test r11b, r11b
jne .L2140
jmp .L998
.L1004:
test bpl, bpl
jne .L6939
.L2138:
movzx ebx, BYTE PTR s5_evt0[rip]
or bl, BYTE PTR s5_evt1[rip]
jne .L1005
.L3086:
comiss xmm4, DWORD PTR s5_backoff[rip]
jnb .L1008
jmp .L1005
.L910:
movss xmm3, DWORD PTR s6_lambda[rip]
ucomiss xmm4, xmm3
jp .L914
jne .L914
.L1813:
test bl, bl
je .L2168
.L916:
cmp BYTE PTR s6_evt1[rip], 0
je .L918
cmp BYTE PTR s6_evt0[rip], 0
je .L919
jmp .L918
.L6937:
movzx ebx, BYTE PTR s6_l1[rip]
test bl, bl
je .L3099
.L908:
movss xmm3, DWORD PTR s6_lambda[rip]
ucomiss xmm4, xmm3
jp .L3865
je .L2168
.L3865:
xor ebx, ebx
jmp .L2166
.L6939:
movzx r10d, BYTE PTR _x_s5_l1[rip]
test r12b, r12b
jne .L6940
movzx ebx, BYTE PTR s5_evt0[rip]
or bl, BYTE PTR s5_evt1[rip]
je .L3086
jmp .L1008
.L6942:
mov r11d, r12d
or r11b, BYTE PTR _x_s6_l1[rip]
jne .L2171
cmp BYTE PTR s6_l1[rip], 0
jne .L2170
.L3099:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L907
comiss xmm7, DWORD PTR delta[rip]
jne .L907
movzx r11d, BYTE PTR s6_evt0[rip]
or r11b, BYTE PTR s6_evt1[rip]
mov r10d, r11d
or r10b, bl
je .L908
xor r10d, r10d
jmp .L95
.L6940:
or r10b, BYTE PTR s5_l1[rip]
jne .L2138
.L3087:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L1007
comiss xmm6, DWORD PTR delta[rip]
jne .L1007
movzx ebx, BYTE PTR s5_evt0[rip]
or bl, BYTE PTR s5_evt1[rip]
or BYTE PTR 26[rsp], bl
je .L1008
xor r10d, r10d
jmp .L95
.L907:
test bl, bl
je .L908
.L2170:
movzx r11d, BYTE PTR s6_evt0[rip]
or r11b, BYTE PTR s6_evt1[rip]
jne .L6941
.L909:
movss xmm3, DWORD PTR s6_lambda[rip]
ucomiss xmm4, xmm3
jp .L914
je .L918
jmp .L914
.L1007:
cmp BYTE PTR 26[rsp], 0
jne .L2138
jmp .L1008
.L6941:
movss xmm3, DWORD PTR s6_lambda[rip]
ucomiss xmm4, xmm3
jp .L2166
je .L916
jmp .L2166
.L6711:
cmp BYTE PTR s7_l1[rip], 0
jne .L859
.L2719:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L859
comiss xmm7, DWORD PTR delta[rip]
jne .L859
movzx r11d, BYTE PTR s7_evt0[rip]
or r11b, BYTE PTR s7_evt1[rip]
or bl, r11b
je .L859
xor r10d, r10d
jmp .L95
.L859:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r13d
and r10b, r11b
je .L860
mov r11d, r10d
mov r13d, r10d
jmp .L861
.L6710:
test bpl, bpl
jne .L2187
jmp .L2721
.L6713:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L861
comiss xmm5, DWORD PTR delta[rip]
jne .L861
movzx r10d, BYTE PTR s7_evt0[rip]
or r10b, BYTE PTR s7_evt1[rip]
or r10b, bl
je .L862
xor r10d, r10d
jmp .L95
.L885:
cmp BYTE PTR 24[rsp], 0
jne .L2176
jmp .L886
.L862:
movss xmm4, DWORD PTR s7_x[rip]
jmp .L866
.L826:
xor r10d, r10d
cmp BYTE PTR _x_s7_evt0[rip], 0
jne .L95
jmp .L827
.L828:
xor r10d, r10d
cmp BYTE PTR _x_s7_l1[rip], 0
jne .L95
jmp .L1829
.L6708:
mov BYTE PTR 23[rsp], 0
movzx r10d, BYTE PTR _x_s8_l1[rip]
test r12b, r12b
je .L825
or r10b, BYTE PTR s8_l1[rip]
mov BYTE PTR 23[rsp], r10b
je .L3108
mov BYTE PTR 23[rsp], 0
jmp .L825
.L850:
movss xmm3, DWORD PTR s7_lambda[rip]
ucomiss xmm4, xmm3
jp .L1827
jne .L1827
.L1823:
test bl, bl
je .L2187
.L855:
cmp BYTE PTR s7_evt1[rip], 0
je .L857
cmp BYTE PTR s7_evt0[rip], 0
je .L858
jmp .L857
.L849:
movss xmm3, DWORD PTR s7_lambda[rip]
ucomiss xmm4, xmm3
jp .L853
je .L1823
jmp .L853
.L848:
movss xmm3, DWORD PTR s7_lambda[rip]
ucomiss xmm4, xmm3
jp .L853
je .L857
jmp .L853
.L6906:
mov r11d, r12d
or r11b, BYTE PTR _x_s7_l1[rip]
jne .L2190
cmp BYTE PTR s7_l1[rip], 0
je .L3106
.L2189:
movzx r11d, BYTE PTR s7_evt0[rip]
or r11b, BYTE PTR s7_evt1[rip]
je .L848
movss xmm3, DWORD PTR s7_lambda[rip]
ucomiss xmm4, xmm3
jp .L2185
je .L855
jmp .L2185
.L852:
movss xmm3, DWORD PTR s7_lambda[rip]
ucomiss xmm4, xmm3
jp .L1822
je .L858
.L1822:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
jmp .L860
.L3106:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L846
comiss xmm7, DWORD PTR delta[rip]
jne .L846
movzx r11d, BYTE PTR s7_evt0[rip]
or r11b, BYTE PTR s7_evt1[rip]
mov r10d, r11d
or r10b, bl
je .L847
xor r10d, r10d
jmp .L95
.L851:
movss xmm3, DWORD PTR s7_lambda[rip]
ucomiss xmm4, xmm3
jp .L2183
je .L1823
jmp .L2183
.L846:
test bl, bl
jne .L2189
jmp .L847
.L6719:
cmp BYTE PTR s6_l1[rip], 0
jne .L920
.L2700:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L920
comiss xmm7, DWORD PTR delta[rip]
jne .L920
movzx r11d, BYTE PTR s6_evt0[rip]
or r11b, BYTE PTR s6_evt1[rip]
or bl, r11b
je .L920
xor r10d, r10d
jmp .L95
.L6721:
pxor xmm4, xmm4
ucomiss xmm4, DWORD PTR delta[rip]
jp .L922
comiss xmm4, DWORD PTR delta[rip]
jne .L922
movzx r10d, BYTE PTR s6_evt0[rip]
or r10b, BYTE PTR s6_evt1[rip]
or r10b, bl
je .L923
xor r10d, r10d
jmp .L95
.L920:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r11d
and r10b, r13b
je .L921
mov r11d, r10d
mov r13d, r10d
jmp .L922
.L923:
movss xmm4, DWORD PTR s6_x[rip]
.L927:
xor ebx, ebx
test bpl, bpl
je .L3095
.L2162:
movzx ebx, BYTE PTR s6_evt0[rip]
mov BYTE PTR 25[rsp], bl
test bl, bl
jne .L3620
jmp .L2163
.L928:
test bl, bl
je .L2162
mov BYTE PTR 25[rsp], bl
jmp .L2163
.L6722:
cmp BYTE PTR s6_evt1[rip], 0
je .L924
mov r10d, ebx
or r10b, BYTE PTR s6_evt0[rip]
mov BYTE PTR 25[rsp], r10b
jne .L924
movss xmm3, DWORD PTR s6_backoff[rip]
comiss xmm3, xmm6
jnb .L926
jmp .L927
.L6720:
cmp BYTE PTR _x_s6_l1[rip], 0
mov r11d, r10d
mov r13d, r10d
je .L922
jmp .L921
.L6723:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L929
comiss xmm5, DWORD PTR delta[rip]
jne .L929
movzx r10d, BYTE PTR s6_evt0[rip]
or r10b, BYTE PTR s6_evt1[rip]
or r10b, bl
mov BYTE PTR 25[rsp], r10b
je .L930
xor r10d, r10d
jmp .L95
.L893:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s6_evt2[rip]
movzx r11d, BYTE PTR s6_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s6_evt1[rip]
je .L95
jmp .L896
.L930:
test r11b, r11b
jne .L2697
jmp .L2696
.L889:
xor r10d, r10d
cmp BYTE PTR _x_s6_l1[rip], 0
jne .L95
jmp .L1818
.L887:
xor r10d, r10d
cmp BYTE PTR _x_s6_evt0[rip], 0
jne .L95
jmp .L888
.L913:
movss xmm3, DWORD PTR s6_lambda[rip]
ucomiss xmm4, xmm3
jp .L1812
je .L919
.L1812:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
jmp .L921
.L912:
movss xmm3, DWORD PTR s6_lambda[rip]
ucomiss xmm4, xmm3
jp .L2164
je .L1813
.L2164:
pxor xmm4, xmm4
mov r10d, 0
ucomiss xmm5, xmm4
setnp r11b
cmove r10d, r11d
xor r11d, r11d
mov r13d, r10d
jmp .L921
.L904:
test bpl, bpl
je .L6942
.L2171:
movzx r11d, BYTE PTR s6_evt0[rip]
or r11b, BYTE PTR s6_evt1[rip]
je .L909
cmp BYTE PTR _x_s6_l1[rip], 0
je .L910
test bpl, bpl
je .L2702
movss xmm3, DWORD PTR s6_lambda[rip]
ucomiss xmm4, xmm3
jp .L1817
je .L1813
.L1817:
mov r11d, r12d
or r11b, BYTE PTR _x_s6_l1[rip]
jne .L2164
cmp BYTE PTR s6_l1[rip], 0
je .L2700
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
cmove r11d, r10d
jmp .L921
.L6716:
mov BYTE PTR 24[rsp], 0
movzx r10d, BYTE PTR _x_s7_l1[rip]
test r12b, r12b
je .L886
or r10b, BYTE PTR s7_l1[rip]
mov BYTE PTR 24[rsp], r10b
je .L3101
mov BYTE PTR 24[rsp], 0
jmp .L886
.L875:
test r11b, r11b
jne .L1820
jmp .L2715
.L6717:
cmp BYTE PTR s7_l1[rip], 0
jne .L886
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L886
comiss xmm6, DWORD PTR delta[rip]
jne .L886
movzx ebx, BYTE PTR s7_evt0[rip]
xor r10d, r10d
or bl, BYTE PTR s7_evt1[rip]
or BYTE PTR 24[rsp], bl
jne .L95
jmp .L886
.L950:
xor r10d, r10d
cmp BYTE PTR _x_s5_l1[rip], 0
jne .L95
jmp .L1807
.L964:
test bpl, bpl
je .L6943
movzx ebx, BYTE PTR _x_s5_l1[rip]
test bl, bl
jne .L6944
movss xmm3, DWORD PTR s5_lambda[rip]
ucomiss xmm4, xmm3
jp .L975
je .L2149
.L975:
test bpl, bpl
jne .L2148
.L2147:
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, ebp
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
mov r11d, r10d
cmovne r11d, ebp
jmp .L982
.L6944:
movss xmm3, DWORD PTR s5_lambda[rip]
ucomiss xmm4, xmm3
jp .L3884
je .L2149
.L3884:
xor ebx, ebx
.L1801:
mov r11d, r12d
or r11b, BYTE PTR _x_s5_l1[rip]
je .L6945
.L2145:
pxor xmm4, xmm4
mov r10d, 0
ucomiss xmm5, xmm4
setnp r11b
cmove r10d, r11d
xor r11d, r11d
mov r13d, r10d
jmp .L982
.L6943:
mov ebx, r12d
or bl, BYTE PTR _x_s5_l1[rip]
je .L6946
movzx ebx, BYTE PTR _x_s5_l1[rip]
test bl, bl
je .L971
xor ebx, ebx
.L2683:
mov r11d, r12d
or r11b, BYTE PTR s5_l1[rip]
jne .L973
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L973
comiss xmm7, DWORD PTR delta[rip]
jne .L973
movzx r11d, BYTE PTR s5_evt0[rip]
or r11b, BYTE PTR s5_evt1[rip]
or bl, r11b
je .L974
xor r10d, r10d
jmp .L95
.L954:
pxor xmm7, xmm7
xor r10d, r10d
comiss xmm7, DWORD PTR delta[rip]
jb .L95
movzx ebx, BYTE PTR s5_evt2[rip]
movzx r11d, BYTE PTR s5_evt0[rip]
xor r10d, r10d
or r11d, ebx
or r11b, BYTE PTR s5_evt1[rip]
je .L95
jmp .L957
.L974:
movss xmm3, DWORD PTR s5_lambda[rip]
ucomiss xmm4, xmm3
jp .L1804
je .L980
.L1804:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
jmp .L982
.L996:
test r11b, r11b
je .L1000
.L1798:
test bpl, bpl
jne .L1797
jmp .L1000
.L995:
test r11b, r11b
jne .L999
jmp .L1000
.L997:
test r11b, r11b
jne .L1798
jmp .L2677
.L6733:
cmp BYTE PTR s5_l1[rip], 0
jne .L1008
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L1008
comiss xmm6, DWORD PTR delta[rip]
jne .L1008
movzx ebx, BYTE PTR s5_evt0[rip]
xor r10d, r10d
or bl, BYTE PTR s5_evt1[rip]
or BYTE PTR 26[rsp], bl
jne .L95
jmp .L1008
.L989:
test bl, bl
je .L2142
mov BYTE PTR 26[rsp], bl
jmp .L2143
.L6730:
cmp BYTE PTR s5_evt1[rip], 0
je .L985
mov r10d, ebx
or r10b, BYTE PTR s5_evt0[rip]
mov BYTE PTR 26[rsp], r10b
jne .L985
movss xmm3, DWORD PTR s5_backoff[rip]
comiss xmm3, xmm6
jnb .L987
.L988:
xor ebx, ebx
test bpl, bpl
je .L3088
.L2142:
movzx ebx, BYTE PTR s5_evt0[rip]
mov BYTE PTR 26[rsp], bl
test bl, bl
jne .L3617
jmp .L2143
.L6728:
cmp BYTE PTR _x_s5_l1[rip], 0
mov r11d, r10d
mov r13d, r10d
je .L983
jmp .L982
.L6731:
pxor xmm5, xmm5
ucomiss xmm5, DWORD PTR delta[rip]
jp .L990
comiss xmm5, DWORD PTR delta[rip]
jne .L990
movzx r10d, BYTE PTR s5_evt0[rip]
or r10b, BYTE PTR s5_evt1[rip]
or r10b, bl
mov BYTE PTR 26[rsp], r10b
je .L991
xor r10d, r10d
jmp .L95
.L1009:
xor r10d, r10d
cmp BYTE PTR _x_s4_evt0[rip], 0
jne .L95
jmp .L1010
.L1011:
xor r10d, r10d
cmp BYTE PTR _x_s4_l1[rip], 0
jne .L95
jmp .L1796
.L6732:
mov BYTE PTR 26[rsp], 0
movzx r10d, BYTE PTR _x_s5_l1[rip]
test r12b, r12b
je .L1008
or r10b, BYTE PTR s5_l1[rip]
mov BYTE PTR 26[rsp], r10b
je .L3087
mov BYTE PTR 26[rsp], 0
jmp .L1008
.L991:
test r11b, r11b
jne .L2678
jmp .L2677
.L935:
test r11b, r11b
jne .L1809
jmp .L939
.L934:
test r11b, r11b
je .L939
.L938:
test bpl, bpl
jne .L1808
jmp .L937
.L943:
test bpl, bpl
jne .L6947
.L2157:
movzx ebx, BYTE PTR s6_evt0[rip]
or bl, BYTE PTR s6_evt1[rip]
jne .L944
.L3093:
comiss xmm4, DWORD PTR s6_backoff[rip]
jnb .L947
jmp .L944
.L6725:
cmp BYTE PTR s6_l1[rip], 0
jne .L947
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L947
comiss xmm6, DWORD PTR delta[rip]
jne .L947
movzx ebx, BYTE PTR s6_evt0[rip]
xor r10d, r10d
or bl, BYTE PTR s6_evt1[rip]
or BYTE PTR 25[rsp], bl
jne .L95
jmp .L947
.L933:
test r11b, r11b
jne .L938
test r12b, r12b
je .L939
jmp .L2695
.L932:
test r11b, r11b
jne .L2159
jmp .L937
.L6948:
or r10b, BYTE PTR s6_l1[rip]
jne .L2157
.L3094:
pxor xmm6, xmm6
ucomiss xmm6, DWORD PTR delta[rip]
jp .L946
comiss xmm6, DWORD PTR delta[rip]
jne .L946
movzx ebx, BYTE PTR s6_evt0[rip]
or bl, BYTE PTR s6_evt1[rip]
or BYTE PTR 25[rsp], bl
je .L947
xor r10d, r10d
jmp .L95
.L6947:
movzx r10d, BYTE PTR _x_s6_l1[rip]
test r12b, r12b
jne .L6948
movzx ebx, BYTE PTR s6_evt0[rip]
or bl, BYTE PTR s6_evt1[rip]
je .L3093
jmp .L947
.L946:
cmp BYTE PTR 25[rsp], 0
jne .L2157
jmp .L947
.L6726:
test bpl, bpl
jne .L2149
jmp .L2683
.L965:
test bpl, bpl
je .L6949
.L2152:
movzx r11d, BYTE PTR s5_evt0[rip]
or r11b, BYTE PTR s5_evt1[rip]
je .L970
cmp BYTE PTR _x_s5_l1[rip], 0
je .L971
test bpl, bpl
je .L2683
movss xmm3, DWORD PTR s5_lambda[rip]
ucomiss xmm4, xmm3
jp .L1801
jne .L1801
.L1799:
test bl, bl
je .L2149
.L977:
cmp BYTE PTR s5_evt1[rip], 0
je .L979
cmp BYTE PTR s5_evt0[rip], 0
je .L980
jmp .L979
.L6727:
cmp BYTE PTR s5_l1[rip], 0
jne .L981
.L2681:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L981
comiss xmm7, DWORD PTR delta[rip]
jne .L981
movzx r11d, BYTE PTR s5_evt0[rip]
or r11b, BYTE PTR s5_evt1[rip]
or bl, r11b
je .L981
xor r10d, r10d
jmp .L95
.L6729:
pxor xmm4, xmm4
ucomiss xmm4, DWORD PTR delta[rip]
jp .L983
comiss xmm4, DWORD PTR delta[rip]
jne .L983
movzx r10d, BYTE PTR s5_evt0[rip]
or r10b, BYTE PTR s5_evt1[rip]
or r10b, bl
je .L984
xor r10d, r10d
jmp .L95
.L981:
pxor xmm7, xmm7
mov r10d, 0
ucomiss xmm5, xmm7
setnp r11b
cmovne r11d, r10d
ucomiss xmm4, xmm3
mov r13d, r11d
setnp r11b
cmovne r11d, r10d
mov r10d, r11d
and r10b, r13b
je .L982
mov r11d, r10d
mov r13d, r10d
jmp .L983
.L984:
movss xmm4, DWORD PTR s5_x[rip]
jmp .L988
.L970:
movss xmm3, DWORD PTR s5_lambda[rip]
ucomiss xmm4, xmm3
jp .L975
je .L979
jmp .L975
.L6949:
mov r11d, r12d
or r11b, BYTE PTR _x_s5_l1[rip]
jne .L2152
cmp BYTE PTR s5_l1[rip], 0
je .L3092
.L2151:
movzx r10d, BYTE PTR s5_evt1[rip]
or r10b, BYTE PTR s5_evt0[rip]
je .L970
movss xmm3, DWORD PTR s5_lambda[rip]
ucomiss xmm4, xmm3
jp .L2147
je .L977
jmp .L2147
.L971:
movss xmm3, DWORD PTR s5_lambda[rip]
ucomiss xmm4, xmm3
jp .L975
je .L1799
jmp .L975
.L973:
movss xmm3, DWORD PTR s5_lambda[rip]
ucomiss xmm4, xmm3
jp .L2145
je .L1799
jmp .L2145
.L6945:
cmp BYTE PTR s5_l1[rip], 0
je .L2681
pxor xmm7, xmm7
ucomiss xmm5, xmm7
setnp r10b
cmovne r10d, r11d
ucomiss xmm4, xmm3
mov r13d, r10d
setnp r10b
cmove r11d, r10d
jmp .L982
.L6946:
movzx ebx, BYTE PTR s5_l1[rip]
test bl, bl
je .L3092
.L969:
movss xmm3, DWORD PTR s5_lambda[rip]
ucomiss xmm4, xmm3
jp .L3864
je .L2149
.L3864:
xor ebx, ebx
jmp .L2147
.L3092:
pxor xmm7, xmm7
ucomiss xmm7, DWORD PTR delta[rip]
jp .L968
comiss xmm7, DWORD PTR delta[rip]
jne .L968
movzx r11d, BYTE PTR s5_evt0[rip]
or r11b, BYTE PTR s5_evt1[rip]
mov r10d, r11d
or r10b, bl
je .L969
xor r10d, r10d
jmp .L95
.L968:
test bl, bl
jne .L2151
jmp .L969
.cfi_endproc
.LFE1:
.size main, .-main
.globl _x_s14_evt1
.bss
.type _x_s14_evt1, @object
.size _x_s14_evt1, 1
_x_s14_evt1:
.zero 1
.globl s14_evt1
.type s14_evt1, @object
.size s14_evt1, 1
s14_evt1:
.zero 1
.globl _x_s14_evt0
.type _x_s14_evt0, @object
.size _x_s14_evt0, 1
_x_s14_evt0:
.zero 1
.globl s14_evt0
.type s14_evt0, @object
.size s14_evt0, 1
s14_evt0:
.zero 1
.globl _x_s14_backoff
.align 4
.type _x_s14_backoff, @object
.size _x_s14_backoff, 4
_x_s14_backoff:
.zero 4
.globl s14_backoff
.align 4
.type s14_backoff, @object
.size s14_backoff, 4
s14_backoff:
.zero 4
.globl _x_s11_l1
.type _x_s11_l1, @object
.size _x_s11_l1, 1
_x_s11_l1:
.zero 1
.globl s11_l1
.type s11_l1, @object
.size s11_l1, 1
s11_l1:
.zero 1
.globl _x_s13_l0
.type _x_s13_l0, @object
.size _x_s13_l0, 1
_x_s13_l0:
.zero 1
.globl s13_l0
.type s13_l0, @object
.size s13_l0, 1
s13_l0:
.zero 1
.globl _x_s16_lambda
.align 4
.type _x_s16_lambda, @object
.size _x_s16_lambda, 4
_x_s16_lambda:
.zero 4
.globl s16_lambda
.align 4
.type s16_lambda, @object
.size s16_lambda, 4
s16_lambda:
.zero 4
.globl _x_s13_evt2
.type _x_s13_evt2, @object
.size _x_s13_evt2, 1
_x_s13_evt2:
.zero 1
.globl s13_evt2
.type s13_evt2, @object
.size s13_evt2, 1
s13_evt2:
.zero 1
.globl _x_s13_evt1
.type _x_s13_evt1, @object
.size _x_s13_evt1, 1
_x_s13_evt1:
.zero 1
.globl s13_evt1
.type s13_evt1, @object
.size s13_evt1, 1
s13_evt1:
.zero 1
.globl _x_s13_evt0
.type _x_s13_evt0, @object
.size _x_s13_evt0, 1
_x_s13_evt0:
.zero 1
.globl s13_evt0
.type s13_evt0, @object
.size s13_evt0, 1
s13_evt0:
.zero 1
.globl _x_s13_backoff
.align 4
.type _x_s13_backoff, @object
.size _x_s13_backoff, 4
_x_s13_backoff:
.zero 4
.globl s13_backoff
.align 4
.type s13_backoff, @object
.size s13_backoff, 4
s13_backoff:
.zero 4
.globl _x_s10_l1
.type _x_s10_l1, @object
.size _x_s10_l1, 1
_x_s10_l1:
.zero 1
.globl s10_l1
.type s10_l1, @object
.size s10_l1, 1
s10_l1:
.zero 1
.globl _x_s12_evt2
.type _x_s12_evt2, @object
.size _x_s12_evt2, 1
_x_s12_evt2:
.zero 1
.globl s12_evt2
.type s12_evt2, @object
.size s12_evt2, 1
s12_evt2:
.zero 1
.globl _x_s12_evt1
.type _x_s12_evt1, @object
.size _x_s12_evt1, 1
_x_s12_evt1:
.zero 1
.globl s12_evt1
.type s12_evt1, @object
.size s12_evt1, 1
s12_evt1:
.zero 1
.globl _x_s12_evt0
.type _x_s12_evt0, @object
.size _x_s12_evt0, 1
_x_s12_evt0:
.zero 1
.globl s12_evt0
.type s12_evt0, @object
.size s12_evt0, 1
s12_evt0:
.zero 1
.globl _x_s12_backoff
.align 4
.type _x_s12_backoff, @object
.size _x_s12_backoff, 4
_x_s12_backoff:
.zero 4
.globl s12_backoff
.align 4
.type s12_backoff, @object
.size s12_backoff, 4
s12_backoff:
.zero 4
.globl _x_s9_l1
.type _x_s9_l1, @object
.size _x_s9_l1, 1
_x_s9_l1:
.zero 1
.globl s9_l1
.type s9_l1, @object
.size s9_l1, 1
s9_l1:
.zero 1
.globl _x_s11_l0
.type _x_s11_l0, @object
.size _x_s11_l0, 1
_x_s11_l0:
.zero 1
.globl s11_l0
.type s11_l0, @object
.size s11_l0, 1
s11_l0:
.zero 1
.globl _x_s14_lambda
.align 4
.type _x_s14_lambda, @object
.size _x_s14_lambda, 4
_x_s14_lambda:
.zero 4
.globl s14_lambda
.align 4
.type s14_lambda, @object
.size s14_lambda, 4
s14_lambda:
.zero 4
.globl _x_s11_evt2
.type _x_s11_evt2, @object
.size _x_s11_evt2, 1
_x_s11_evt2:
.zero 1
.globl s11_evt2
.type s11_evt2, @object
.size s11_evt2, 1
s11_evt2:
.zero 1
.globl _x_s11_evt1
.type _x_s11_evt1, @object
.size _x_s11_evt1, 1
_x_s11_evt1:
.zero 1
.globl s11_evt1
.type s11_evt1, @object
.size s11_evt1, 1
s11_evt1:
.zero 1
.globl _x_s11_evt0
.type _x_s11_evt0, @object
.size _x_s11_evt0, 1
_x_s11_evt0:
.zero 1
.globl s11_evt0
.type s11_evt0, @object
.size s11_evt0, 1
s11_evt0:
.zero 1
.globl _x_s11_lambda
.align 4
.type _x_s11_lambda, @object
.size _x_s11_lambda, 4
_x_s11_lambda:
.zero 4
.globl s11_lambda
.align 4
.type s11_lambda, @object
.size s11_lambda, 4
s11_lambda:
.zero 4
.globl _x_s8_l0
.type _x_s8_l0, @object
.size _x_s8_l0, 1
_x_s8_l0:
.zero 1
.globl s8_l0
.type s8_l0, @object
.size s8_l0, 1
s8_l0:
.zero 1
.globl _x_s11_backoff
.align 4
.type _x_s11_backoff, @object
.size _x_s11_backoff, 4
_x_s11_backoff:
.zero 4
.globl s11_backoff
.align 4
.type s11_backoff, @object
.size s11_backoff, 4
s11_backoff:
.zero 4
.globl _x_s8_l1
.type _x_s8_l1, @object
.size _x_s8_l1, 1
_x_s8_l1:
.zero 1
.globl s8_l1
.type s8_l1, @object
.size s8_l1, 1
s8_l1:
.zero 1
.globl _x_s11_x
.align 4
.type _x_s11_x, @object
.size _x_s11_x, 4
_x_s11_x:
.zero 4
.globl s11_x
.align 4
.type s11_x, @object
.size s11_x, 4
s11_x:
.zero 4
.globl _x_s10_l0
.type _x_s10_l0, @object
.size _x_s10_l0, 1
_x_s10_l0:
.zero 1
.globl s10_l0
.type s10_l0, @object
.size s10_l0, 1
s10_l0:
.zero 1
.globl _x_s13_lambda
.align 4
.type _x_s13_lambda, @object
.size _x_s13_lambda, 4
_x_s13_lambda:
.zero 4
.globl s13_lambda
.align 4
.type s13_lambda, @object
.size s13_lambda, 4
s13_lambda:
.zero 4
.globl _x_s10_evt2
.type _x_s10_evt2, @object
.size _x_s10_evt2, 1
_x_s10_evt2:
.zero 1
.globl s10_evt2
.type s10_evt2, @object
.size s10_evt2, 1
s10_evt2:
.zero 1
.globl _x_s10_evt1
.type _x_s10_evt1, @object
.size _x_s10_evt1, 1
_x_s10_evt1:
.zero 1
.globl s10_evt1
.type s10_evt1, @object
.size s10_evt1, 1
s10_evt1:
.zero 1
.globl _x_s10_evt0
.type _x_s10_evt0, @object
.size _x_s10_evt0, 1
_x_s10_evt0:
.zero 1
.globl s10_evt0
.type s10_evt0, @object
.size s10_evt0, 1
s10_evt0:
.zero 1
.globl _x_bus_x
.align 4
.type _x_bus_x, @object
.size _x_bus_x, 4
_x_bus_x:
.zero 4
.globl bus_x
.align 4
.type bus_x, @object
.size bus_x, 4
bus_x:
.zero 4
.globl _x_s10_lambda
.align 4
.type _x_s10_lambda, @object
.size _x_s10_lambda, 4
_x_s10_lambda:
.zero 4
.globl s10_lambda
.align 4
.type s10_lambda, @object
.size s10_lambda, 4
s10_lambda:
.zero 4
.globl _x_s7_l0
.type _x_s7_l0, @object
.size _x_s7_l0, 1
_x_s7_l0:
.zero 1
.globl s7_l0
.type s7_l0, @object
.size s7_l0, 1
s7_l0:
.zero 1
.globl _x_s10_backoff
.align 4
.type _x_s10_backoff, @object
.size _x_s10_backoff, 4
_x_s10_backoff:
.zero 4
.globl s10_backoff
.align 4
.type s10_backoff, @object
.size s10_backoff, 4
s10_backoff:
.zero 4
.globl _x_s7_l1
.type _x_s7_l1, @object
.size _x_s7_l1, 1
_x_s7_l1:
.zero 1
.globl s7_l1
.type s7_l1, @object
.size s7_l1, 1
s7_l1:
.zero 1
.globl _x_s10_x
.align 4
.type _x_s10_x, @object
.size _x_s10_x, 4
_x_s10_x:
.zero 4
.globl s10_x
.align 4
.type s10_x, @object
.size s10_x, 4
s10_x:
.zero 4
.globl _x_s9_l0
.type _x_s9_l0, @object
.size _x_s9_l0, 1
_x_s9_l0:
.zero 1
.globl s9_l0
.type s9_l0, @object
.size s9_l0, 1
s9_l0:
.zero 1
.globl _x_s12_lambda
.align 4
.type _x_s12_lambda, @object
.size _x_s12_lambda, 4
_x_s12_lambda:
.zero 4
.globl s12_lambda
.align 4
.type s12_lambda, @object
.size s12_lambda, 4
s12_lambda:
.zero 4
.globl _x_s9_evt2
.type _x_s9_evt2, @object
.size _x_s9_evt2, 1
_x_s9_evt2:
.zero 1
.globl s9_evt2
.type s9_evt2, @object
.size s9_evt2, 1
s9_evt2:
.zero 1
.globl _x_s9_evt1
.type _x_s9_evt1, @object
.size _x_s9_evt1, 1
_x_s9_evt1:
.zero 1
.globl s9_evt1
.type s9_evt1, @object
.size s9_evt1, 1
s9_evt1:
.zero 1
.globl _x_s9_lambda
.align 4
.type _x_s9_lambda, @object
.size _x_s9_lambda, 4
_x_s9_lambda:
.zero 4
.globl s9_lambda
.align 4
.type s9_lambda, @object
.size s9_lambda, 4
s9_lambda:
.zero 4
.globl _x_s6_l0
.type _x_s6_l0, @object
.size _x_s6_l0, 1
_x_s6_l0:
.zero 1
.globl s6_l0
.type s6_l0, @object
.size s6_l0, 1
s6_l0:
.zero 1
.globl _x_s9_backoff
.align 4
.type _x_s9_backoff, @object
.size _x_s9_backoff, 4
_x_s9_backoff:
.zero 4
.globl s9_backoff
.align 4
.type s9_backoff, @object
.size s9_backoff, 4
s9_backoff:
.zero 4
.globl _x_s6_l1
.type _x_s6_l1, @object
.size _x_s6_l1, 1
_x_s6_l1:
.zero 1
.globl s6_l1
.type s6_l1, @object
.size s6_l1, 1
s6_l1:
.zero 1
.globl _x_s9_x
.align 4
.type _x_s9_x, @object
.size _x_s9_x, 4
_x_s9_x:
.zero 4
.globl s9_x
.align 4
.type s9_x, @object
.size s9_x, 4
s9_x:
.zero 4
.globl _x_s8_evt2
.type _x_s8_evt2, @object
.size _x_s8_evt2, 1
_x_s8_evt2:
.zero 1
.globl s8_evt2
.type s8_evt2, @object
.size s8_evt2, 1
s8_evt2:
.zero 1
.globl _x_s8_evt1
.type _x_s8_evt1, @object
.size _x_s8_evt1, 1
_x_s8_evt1:
.zero 1
.globl s8_evt1
.type s8_evt1, @object
.size s8_evt1, 1
s8_evt1:
.zero 1
.globl _x_s8_evt0
.type _x_s8_evt0, @object
.size _x_s8_evt0, 1
_x_s8_evt0:
.zero 1
.globl s8_evt0
.type s8_evt0, @object
.size s8_evt0, 1
s8_evt0:
.zero 1
.globl _x_s8_lambda
.align 4
.type _x_s8_lambda, @object
.size _x_s8_lambda, 4
_x_s8_lambda:
.zero 4
.globl s8_lambda
.align 4
.type s8_lambda, @object
.size s8_lambda, 4
s8_lambda:
.zero 4
.globl _x_s5_l0
.type _x_s5_l0, @object
.size _x_s5_l0, 1
_x_s5_l0:
.zero 1
.globl s5_l0
.type s5_l0, @object
.size s5_l0, 1
s5_l0:
.zero 1
.globl _x_s8_backoff
.align 4
.type _x_s8_backoff, @object
.size _x_s8_backoff, 4
_x_s8_backoff:
.zero 4
.globl s8_backoff
.align 4
.type s8_backoff, @object
.size s8_backoff, 4
s8_backoff:
.zero 4
.globl _x_s5_l1
.type _x_s5_l1, @object
.size _x_s5_l1, 1
_x_s5_l1:
.zero 1
.globl s5_l1
.type s5_l1, @object
.size s5_l1, 1
s5_l1:
.zero 1
.globl _x_s8_x
.align 4
.type _x_s8_x, @object
.size _x_s8_x, 4
_x_s8_x:
.zero 4
.globl s8_x
.align 4
.type s8_x, @object
.size s8_x, 4
s8_x:
.zero 4
.globl _x_s7_evt2
.type _x_s7_evt2, @object
.size _x_s7_evt2, 1
_x_s7_evt2:
.zero 1
.globl s7_evt2
.type s7_evt2, @object
.size s7_evt2, 1
s7_evt2:
.zero 1
.globl _x_s7_evt1
.type _x_s7_evt1, @object
.size _x_s7_evt1, 1
_x_s7_evt1:
.zero 1
.globl s7_evt1
.type s7_evt1, @object
.size s7_evt1, 1
s7_evt1:
.zero 1
.globl _x_s7_evt0
.type _x_s7_evt0, @object
.size _x_s7_evt0, 1
_x_s7_evt0:
.zero 1
.globl s7_evt0
.type s7_evt0, @object
.size s7_evt0, 1
s7_evt0:
.zero 1
.globl _x_s7_lambda
.align 4
.type _x_s7_lambda, @object
.size _x_s7_lambda, 4
_x_s7_lambda:
.zero 4
.globl s7_lambda
.align 4
.type s7_lambda, @object
.size s7_lambda, 4
s7_lambda:
.zero 4
.globl _x_s4_l0
.type _x_s4_l0, @object
.size _x_s4_l0, 1
_x_s4_l0:
.zero 1
.globl s4_l0
.type s4_l0, @object
.size s4_l0, 1
s4_l0:
.zero 1
.globl _x_s7_x
.align 4
.type _x_s7_x, @object
.size _x_s7_x, 4
_x_s7_x:
.zero 4
.globl s7_x
.align 4
.type s7_x, @object
.size s7_x, 4
s7_x:
.zero 4
.globl _x_s6_evt1
.type _x_s6_evt1, @object
.size _x_s6_evt1, 1
_x_s6_evt1:
.zero 1
.globl s6_evt1
.type s6_evt1, @object
.size s6_evt1, 1
s6_evt1:
.zero 1
.globl _x_s6_evt0
.type _x_s6_evt0, @object
.size _x_s6_evt0, 1
_x_s6_evt0:
.zero 1
.globl s6_evt0
.type s6_evt0, @object
.size s6_evt0, 1
s6_evt0:
.zero 1
.globl _x_s6_lambda
.align 4
.type _x_s6_lambda, @object
.size _x_s6_lambda, 4
_x_s6_lambda:
.zero 4
.globl s6_lambda
.align 4
.type s6_lambda, @object
.size s6_lambda, 4
s6_lambda:
.zero 4
.globl _x_s3_l0
.type _x_s3_l0, @object
.size _x_s3_l0, 1
_x_s3_l0:
.zero 1
.globl s3_l0
.type s3_l0, @object
.size s3_l0, 1
s3_l0:
.zero 1
.globl _x_s2_x
.align 4
.type _x_s2_x, @object
.size _x_s2_x, 4
_x_s2_x:
.zero 4
.globl s2_x
.align 4
.type s2_x, @object
.size s2_x, 4
s2_x:
.zero 4
.globl _x_s9_evt0
.type _x_s9_evt0, @object
.size _x_s9_evt0, 1
_x_s9_evt0:
.zero 1
.globl s9_evt0
.type s9_evt0, @object
.size s9_evt0, 1
s9_evt0:
.zero 1
.globl _x_bus_l1
.type _x_bus_l1, @object
.size _x_bus_l1, 1
_x_bus_l1:
.zero 1
.globl bus_l1
.type bus_l1, @object
.size bus_l1, 1
bus_l1:
.zero 1
.globl _x_s19_l1
.type _x_s19_l1, @object
.size _x_s19_l1, 1
_x_s19_l1:
.zero 1
.globl s19_l1
.type s19_l1, @object
.size s19_l1, 1
s19_l1:
.zero 1
.globl _x_s4_evt2
.type _x_s4_evt2, @object
.size _x_s4_evt2, 1
_x_s4_evt2:
.zero 1
.globl s4_evt2
.type s4_evt2, @object
.size s4_evt2, 1
s4_evt2:
.zero 1
.globl _x_s1_evt2
.type _x_s1_evt2, @object
.size _x_s1_evt2, 1
_x_s1_evt2:
.zero 1
.globl s1_evt2
.type s1_evt2, @object
.size s1_evt2, 1
s1_evt2:
.zero 1
.globl _x_s13_x
.align 4
.type _x_s13_x, @object
.size _x_s13_x, 4
_x_s13_x:
.zero 4
.globl s13_x
.align 4
.type s13_x, @object
.size s13_x, 4
s13_x:
.zero 4
.globl _x_s1_evt1
.type _x_s1_evt1, @object
.size _x_s1_evt1, 1
_x_s1_evt1:
.zero 1
.globl s1_evt1
.type s1_evt1, @object
.size s1_evt1, 1
s1_evt1:
.zero 1
.globl _x_s5_backoff
.align 4
.type _x_s5_backoff, @object
.size _x_s5_backoff, 4
_x_s5_backoff:
.zero 4
.globl s5_backoff
.align 4
.type s5_backoff, @object
.size s5_backoff, 4
s5_backoff:
.zero 4
.globl _x_s2_l1
.type _x_s2_l1, @object
.size _x_s2_l1, 1
_x_s2_l1:
.zero 1
.globl s2_l1
.type s2_l1, @object
.size s2_l1, 1
s2_l1:
.zero 1
.globl _x_s1_evt0
.type _x_s1_evt0, @object
.size _x_s1_evt0, 1
_x_s1_evt0:
.zero 1
.globl s1_evt0
.type s1_evt0, @object
.size s1_evt0, 1
s1_evt0:
.zero 1
.globl _x_s5_lambda
.align 4
.type _x_s5_lambda, @object
.size _x_s5_lambda, 4
_x_s5_lambda:
.zero 4
.globl s5_lambda
.align 4
.type s5_lambda, @object
.size s5_lambda, 4
s5_lambda:
.zero 4
.globl _x_s2_l0
.type _x_s2_l0, @object
.size _x_s2_l0, 1
_x_s2_l0:
.zero 1
.globl s2_l0
.type s2_l0, @object
.size s2_l0, 1
s2_l0:
.zero 1
.globl _x_s1_lambda
.align 4
.type _x_s1_lambda, @object
.size _x_s1_lambda, 4
_x_s1_lambda:
.zero 4
.globl s1_lambda
.align 4
.type s1_lambda, @object
.size s1_lambda, 4
s1_lambda:
.zero 4
.globl _x_s1_backoff
.align 4
.type _x_s1_backoff, @object
.size _x_s1_backoff, 4
_x_s1_backoff:
.zero 4
.globl s1_backoff
.align 4
.type s1_backoff, @object
.size s1_backoff, 4
s1_backoff:
.zero 4
.globl _x_s6_x
.align 4
.type _x_s6_x, @object
.size _x_s6_x, 4
_x_s6_x:
.zero 4
.globl s6_x
.align 4
.type s6_x, @object
.size s6_x, 4
s6_x:
.zero 4
.globl _x_s1_x
.align 4
.type _x_s1_x, @object
.size _x_s1_x, 4
_x_s1_x:
.zero 4
.globl s1_x
.align 4
.type s1_x, @object
.size s1_x, 4
s1_x:
.zero 4
.globl _x_s2_backoff
.align 4
.type _x_s2_backoff, @object
.size _x_s2_backoff, 4
_x_s2_backoff:
.zero 4
.globl s2_backoff
.align 4
.type s2_backoff, @object
.size s2_backoff, 4
s2_backoff:
.zero 4
.globl _x_s0_l1
.type _x_s0_l1, @object
.size _x_s0_l1, 1
_x_s0_l1:
.zero 1
.globl s0_l1
.type s0_l1, @object
.size s0_l1, 1
s0_l1:
.zero 1
.globl _x_s3_backoff
.align 4
.type _x_s3_backoff, @object
.size _x_s3_backoff, 4
_x_s3_backoff:
.zero 4
.globl s3_backoff
.align 4
.type s3_backoff, @object
.size s3_backoff, 4
s3_backoff:
.zero 4
.globl _x_s3_evt2
.type _x_s3_evt2, @object
.size _x_s3_evt2, 1
_x_s3_evt2:
.zero 1
.globl s3_evt2
.type s3_evt2, @object
.size s3_evt2, 1
s3_evt2:
.zero 1
.globl _x_s2_lambda
.align 4
.type _x_s2_lambda, @object
.size _x_s2_lambda, 4
_x_s2_lambda:
.zero 4
.globl s2_lambda
.align 4
.type s2_lambda, @object
.size s2_lambda, 4
s2_lambda:
.zero 4
.globl _x_s0_l0
.type _x_s0_l0, @object
.size _x_s0_l0, 1
_x_s0_l0:
.zero 1
.globl s0_l0
.type s0_l0, @object
.size s0_l0, 1
s0_l0:
.zero 1
.globl _x_s3_lambda
.align 4
.type _x_s3_lambda, @object
.size _x_s3_lambda, 4
_x_s3_lambda:
.zero 4
.globl s3_lambda
.align 4
.type s3_lambda, @object
.size s3_lambda, 4
s3_lambda:
.zero 4
.globl _x_s3_evt1
.type _x_s3_evt1, @object
.size _x_s3_evt1, 1
_x_s3_evt1:
.zero 1
.globl s3_evt1
.type s3_evt1, @object
.size s3_evt1, 1
s3_evt1:
.zero 1
.globl _x_s7_backoff
.align 4
.type _x_s7_backoff, @object
.size _x_s7_backoff, 4
_x_s7_backoff:
.zero 4
.globl s7_backoff
.align 4
.type s7_backoff, @object
.size s7_backoff, 4
s7_backoff:
.zero 4
.globl _x_s4_l1
.type _x_s4_l1, @object
.size _x_s4_l1, 1
_x_s4_l1:
.zero 1
.globl s4_l1
.type s4_l1, @object
.size s4_l1, 1
s4_l1:
.zero 1
.globl _x_delta
.align 4
.type _x_delta, @object
.size _x_delta, 4
_x_delta:
.zero 4
.globl delta
.align 4
.type delta, @object
.size delta, 4
delta:
.zero 4
.globl _x_s0_evt2
.type _x_s0_evt2, @object
.size _x_s0_evt2, 1
_x_s0_evt2:
.zero 1
.globl s0_evt2
.type s0_evt2, @object
.size s0_evt2, 1
s0_evt2:
.zero 1
.globl _x_s5_evt0
.type _x_s5_evt0, @object
.size _x_s5_evt0, 1
_x_s5_evt0:
.zero 1
.globl s5_evt0
.type s5_evt0, @object
.size s5_evt0, 1
s5_evt0:
.zero 1
.globl _x_bus_j
.align 4
.type _x_bus_j, @object
.size _x_bus_j, 4
_x_bus_j:
.zero 4
.globl bus_j
.align 4
.type bus_j, @object
.size bus_j, 4
bus_j:
.zero 4
.globl _x_s16_l1
.type _x_s16_l1, @object
.size _x_s16_l1, 1
_x_s16_l1:
.zero 1
.globl s16_l1
.type s16_l1, @object
.size s16_l1, 1
s16_l1:
.zero 1
.globl _x_s19_backoff
.align 4
.type _x_s19_backoff, @object
.size _x_s19_backoff, 4
_x_s19_backoff:
.zero 4
.globl s19_backoff
.align 4
.type s19_backoff, @object
.size s19_backoff, 4
s19_backoff:
.zero 4
.globl _x_s12_l0
.type _x_s12_l0, @object
.size _x_s12_l0, 1
_x_s12_l0:
.zero 1
.globl s12_l0
.type s12_l0, @object
.size s12_l0, 1
s12_l0:
.zero 1
.globl _x_s15_lambda
.align 4
.type _x_s15_lambda, @object
.size _x_s15_lambda, 4
_x_s15_lambda:
.zero 4
.globl s15_lambda
.align 4
.type s15_lambda, @object
.size s15_lambda, 4
s15_lambda:
.zero 4
.globl _x_s12_x
.align 4
.type _x_s12_x, @object
.size _x_s12_x, 4
_x_s12_x:
.zero 4
.globl s12_x
.align 4
.type s12_x, @object
.size s12_x, 4
s12_x:
.zero 4
.globl _x_s0_evt1
.type _x_s0_evt1, @object
.size _x_s0_evt1, 1
_x_s0_evt1:
.zero 1
.globl s0_evt1
.type s0_evt1, @object
.size s0_evt1, 1
s0_evt1:
.zero 1
.globl _x_s4_backoff
.align 4
.type _x_s4_backoff, @object
.size _x_s4_backoff, 4
_x_s4_backoff:
.zero 4
.globl s4_backoff
.align 4
.type s4_backoff, @object
.size s4_backoff, 4
s4_backoff:
.zero 4
.globl _x_s1_l1
.type _x_s1_l1, @object
.size _x_s1_l1, 1
_x_s1_l1:
.zero 1
.globl s1_l1
.type s1_l1, @object
.size s1_l1, 1
s1_l1:
.zero 1
.globl _x_s6_evt2
.type _x_s6_evt2, @object
.size _x_s6_evt2, 1
_x_s6_evt2:
.zero 1
.globl s6_evt2
.type s6_evt2, @object
.size s6_evt2, 1
s6_evt2:
.zero 1
.globl _x_bus_cd_id
.align 4
.type _x_bus_cd_id, @object
.size _x_bus_cd_id, 4
_x_bus_cd_id:
.zero 4
.globl bus_cd_id
.align 4
.type bus_cd_id, @object
.size bus_cd_id, 4
bus_cd_id:
.zero 4
.globl _x_s16_l0
.type _x_s16_l0, @object
.size _x_s16_l0, 1
_x_s16_l0:
.zero 1
.globl s16_l0
.type s16_l0, @object
.size s16_l0, 1
s16_l0:
.zero 1
.globl _x_s19_lambda
.align 4
.type _x_s19_lambda, @object
.size _x_s19_lambda, 4
_x_s19_lambda:
.zero 4
.globl s19_lambda
.align 4
.type s19_lambda, @object
.size s19_lambda, 4
s19_lambda:
.zero 4
.globl _x_s0_evt0
.type _x_s0_evt0, @object
.size _x_s0_evt0, 1
_x_s0_evt0:
.zero 1
.globl s0_evt0
.type s0_evt0, @object
.size s0_evt0, 1
s0_evt0:
.zero 1
.globl _x_s4_lambda
.align 4
.type _x_s4_lambda, @object
.size _x_s4_lambda, 4
_x_s4_lambda:
.zero 4
.globl s4_lambda
.align 4
.type s4_lambda, @object
.size s4_lambda, 4
s4_lambda:
.zero 4
.globl _x_s1_l0
.type _x_s1_l0, @object
.size _x_s1_l0, 1
_x_s1_l0:
.zero 1
.globl s1_l0
.type s1_l0, @object
.size s1_l0, 1
s1_l0:
.zero 1
.globl _x_bus_evt1
.type _x_bus_evt1, @object
.size _x_bus_evt1, 1
_x_bus_evt1:
.zero 1
.globl bus_evt1
.type bus_evt1, @object
.size bus_evt1, 1
bus_evt1:
.zero 1
.globl _x_s19_evt1
.type _x_s19_evt1, @object
.size _x_s19_evt1, 1
_x_s19_evt1:
.zero 1
.globl s19_evt1
.type s19_evt1, @object
.size s19_evt1, 1
s19_evt1:
.zero 1
.globl _x_bus_evt0
.type _x_bus_evt0, @object
.size _x_bus_evt0, 1
_x_bus_evt0:
.zero 1
.globl bus_evt0
.type bus_evt0, @object
.size bus_evt0, 1
bus_evt0:
.zero 1
.globl _x_s19_evt0
.type _x_s19_evt0, @object
.size _x_s19_evt0, 1
_x_s19_evt0:
.zero 1
.globl s19_evt0
.type s19_evt0, @object
.size s19_evt0, 1
s19_evt0:
.zero 1
.globl _x_s4_evt1
.type _x_s4_evt1, @object
.size _x_s4_evt1, 1
_x_s4_evt1:
.zero 1
.globl s4_evt1
.type s4_evt1, @object
.size s4_evt1, 1
s4_evt1:
.zero 1
.globl _x_s2_evt0
.type _x_s2_evt0, @object
.size _x_s2_evt0, 1
_x_s2_evt0:
.zero 1
.globl s2_evt0
.type s2_evt0, @object
.size s2_evt0, 1
s2_evt0:
.zero 1
.globl _x_s14_evt2
.type _x_s14_evt2, @object
.size _x_s14_evt2, 1
_x_s14_evt2:
.zero 1
.globl s14_evt2
.type s14_evt2, @object
.size s14_evt2, 1
s14_evt2:
.zero 1
.globl _x_s0_x
.align 4
.type _x_s0_x, @object
.size _x_s0_x, 4
_x_s0_x:
.zero 4
.globl s0_x
.align 4
.type s0_x, @object
.size s0_x, 4
s0_x:
.zero 4
.globl _x_s0_backoff
.align 4
.type _x_s0_backoff, @object
.size _x_s0_backoff, 4
_x_s0_backoff:
.zero 4
.globl s0_backoff
.align 4
.type s0_backoff, @object
.size s0_backoff, 4
s0_backoff:
.zero 4
.globl _x_s5_x
.align 4
.type _x_s5_x, @object
.size _x_s5_x, 4
_x_s5_x:
.zero 4
.globl s5_x
.align 4
.type s5_x, @object
.size s5_x, 4
s5_x:
.zero 4
.globl _x_bus_l0
.type _x_bus_l0, @object
.size _x_bus_l0, 1
_x_bus_l0:
.zero 1
.globl bus_l0
.type bus_l0, @object
.size bus_l0, 1
bus_l0:
.zero 1
.globl _x_s19_l0
.type _x_s19_l0, @object
.size _x_s19_l0, 1
_x_s19_l0:
.zero 1
.globl s19_l0
.type s19_l0, @object
.size s19_l0, 1
s19_l0:
.zero 1
.globl _x__diverge_delta
.align 4
.type _x__diverge_delta, @object
.size _x__diverge_delta, 4
_x__diverge_delta:
.zero 4
.globl _diverge_delta
.align 4
.type _diverge_delta, @object
.size _diverge_delta, 4
_diverge_delta:
.zero 4
.globl _x_s0_lambda
.align 4
.type _x_s0_lambda, @object
.size _x_s0_lambda, 4
_x_s0_lambda:
.zero 4
.globl s0_lambda
.align 4
.type s0_lambda, @object
.size s0_lambda, 4
s0_lambda:
.zero 4
.globl _x_s14_x
.align 4
.type _x_s14_x, @object
.size _x_s14_x, 4
_x_s14_x:
.zero 4
.globl s14_x
.align 4
.type s14_x, @object
.size s14_x, 4
s14_x:
.zero 4
.globl _x_s2_evt1
.type _x_s2_evt1, @object
.size _x_s2_evt1, 1
_x_s2_evt1:
.zero 1
.globl s2_evt1
.type s2_evt1, @object
.size s2_evt1, 1
s2_evt1:
.zero 1
.globl _x_s6_backoff
.align 4
.type _x_s6_backoff, @object
.size _x_s6_backoff, 4
_x_s6_backoff:
.zero 4
.globl s6_backoff
.align 4
.type s6_backoff, @object
.size s6_backoff, 4
s6_backoff:
.zero 4
.globl _x_s3_l1
.type _x_s3_l1, @object
.size _x_s3_l1, 1
_x_s3_l1:
.zero 1
.globl s3_l1
.type s3_l1, @object
.size s3_l1, 1
s3_l1:
.zero 1
.globl _x_s2_evt2
.type _x_s2_evt2, @object
.size _x_s2_evt2, 1
_x_s2_evt2:
.zero 1
.globl s2_evt2
.type s2_evt2, @object
.size s2_evt2, 1
s2_evt2:
.zero 1
.globl _x_s5_evt1
.type _x_s5_evt1, @object
.size _x_s5_evt1, 1
_x_s5_evt1:
.zero 1
.globl s5_evt1
.type s5_evt1, @object
.size s5_evt1, 1
s5_evt1:
.zero 1
.globl _x_s5_evt2
.type _x_s5_evt2, @object
.size _x_s5_evt2, 1
_x_s5_evt2:
.zero 1
.globl s5_evt2
.type s5_evt2, @object
.size s5_evt2, 1
s5_evt2:
.zero 1
.globl _x_s3_x
.align 4
.type _x_s3_x, @object
.size _x_s3_x, 4
_x_s3_x:
.zero 4
.globl s3_x
.align 4
.type s3_x, @object
.size s3_x, 4
s3_x:
.zero 4
.globl _x_s12_l1
.type _x_s12_l1, @object
.size _x_s12_l1, 1
_x_s12_l1:
.zero 1
.globl s12_l1
.type s12_l1, @object
.size s12_l1, 1
s12_l1:
.zero 1
.globl _x_s15_backoff
.align 4
.type _x_s15_backoff, @object
.size _x_s15_backoff, 4
_x_s15_backoff:
.zero 4
.globl s15_backoff
.align 4
.type s15_backoff, @object
.size s15_backoff, 4
s15_backoff:
.zero 4
.globl _x_s3_evt0
.type _x_s3_evt0, @object
.size _x_s3_evt0, 1
_x_s3_evt0:
.zero 1
.globl s3_evt0
.type s3_evt0, @object
.size s3_evt0, 1
s3_evt0:
.zero 1
.globl _x_bus_evt2
.type _x_bus_evt2, @object
.size _x_bus_evt2, 1
_x_bus_evt2:
.zero 1
.globl bus_evt2
.type bus_evt2, @object
.size bus_evt2, 1
bus_evt2:
.zero 1
.globl _x_s19_evt2
.type _x_s19_evt2, @object
.size _x_s19_evt2, 1
_x_s19_evt2:
.zero 1
.globl s19_evt2
.type s19_evt2, @object
.size s19_evt2, 1
s19_evt2:
.zero 1
.globl _x_s4_x
.align 4
.type _x_s4_x, @object
.size _x_s4_x, 4
_x_s4_x:
.zero 4
.globl s4_x
.align 4
.type s4_x, @object
.size s4_x, 4
s4_x:
.zero 4
.globl _x_s13_l1
.type _x_s13_l1, @object
.size _x_s13_l1, 1
_x_s13_l1:
.zero 1
.globl s13_l1
.type s13_l1, @object
.size s13_l1, 1
s13_l1:
.zero 1
.globl _x_s16_backoff
.align 4
.type _x_s16_backoff, @object
.size _x_s16_backoff, 4
_x_s16_backoff:
.zero 4
.globl s16_backoff
.align 4
.type s16_backoff, @object
.size s16_backoff, 4
s16_backoff:
.zero 4
.globl _x_s4_evt0
.type _x_s4_evt0, @object
.size _x_s4_evt0, 1
_x_s4_evt0:
.zero 1
.globl s4_evt0
.type s4_evt0, @object
.size s4_evt0, 1
s4_evt0:
.zero 1
.globl _x_s14_l0
.type _x_s14_l0, @object
.size _x_s14_l0, 1
_x_s14_l0:
.zero 1
.globl s14_l0
.type s14_l0, @object
.size s14_l0, 1
s14_l0:
.zero 1
.globl _x_s17_lambda
.align 4
.type _x_s17_lambda, @object
.size _x_s17_lambda, 4
_x_s17_lambda:
.zero 4
.globl s17_lambda
.align 4
.type s17_lambda, @object
.size s17_lambda, 4
s17_lambda:
.zero 4
.globl _x_s14_l1
.type _x_s14_l1, @object
.size _x_s14_l1, 1
_x_s14_l1:
.zero 1
.globl s14_l1
.type s14_l1, @object
.size s14_l1, 1
s14_l1:
.zero 1
.globl _x_s17_backoff
.align 4
.type _x_s17_backoff, @object
.size _x_s17_backoff, 4
_x_s17_backoff:
.zero 4
.globl s17_backoff
.align 4
.type s17_backoff, @object
.size s17_backoff, 4
s17_backoff:
.zero 4
.globl _x_s15_x
.align 4
.type _x_s15_x, @object
.size _x_s15_x, 4
_x_s15_x:
.zero 4
.globl s15_x
.align 4
.type s15_x, @object
.size s15_x, 4
s15_x:
.zero 4
.globl _x_s15_evt0
.type _x_s15_evt0, @object
.size _x_s15_evt0, 1
_x_s15_evt0:
.zero 1
.globl s15_evt0
.type s15_evt0, @object
.size s15_evt0, 1
s15_evt0:
.zero 1
.globl _x_s15_evt1
.type _x_s15_evt1, @object
.size _x_s15_evt1, 1
_x_s15_evt1:
.zero 1
.globl s15_evt1
.type s15_evt1, @object
.size s15_evt1, 1
s15_evt1:
.zero 1
.globl _x_s15_evt2
.type _x_s15_evt2, @object
.size _x_s15_evt2, 1
_x_s15_evt2:
.zero 1
.globl s15_evt2
.type s15_evt2, @object
.size s15_evt2, 1
s15_evt2:
.zero 1
.globl _x_s15_l0
.type _x_s15_l0, @object
.size _x_s15_l0, 1
_x_s15_l0:
.zero 1
.globl s15_l0
.type s15_l0, @object
.size s15_l0, 1
s15_l0:
.zero 1
.globl _x_s18_lambda
.align 4
.type _x_s18_lambda, @object
.size _x_s18_lambda, 4
_x_s18_lambda:
.zero 4
.globl s18_lambda
.align 4
.type s18_lambda, @object
.size s18_lambda, 4
s18_lambda:
.zero 4
.globl _x_s15_l1
.type _x_s15_l1, @object
.size _x_s15_l1, 1
_x_s15_l1:
.zero 1
.globl s15_l1
.type s15_l1, @object
.size s15_l1, 1
s15_l1:
.zero 1
.globl _x_s18_backoff
.align 4
.type _x_s18_backoff, @object
.size _x_s18_backoff, 4
_x_s18_backoff:
.zero 4
.globl s18_backoff
.align 4
.type s18_backoff, @object
.size s18_backoff, 4
s18_backoff:
.zero 4
.globl _x_s16_x
.align 4
.type _x_s16_x, @object
.size _x_s16_x, 4
_x_s16_x:
.zero 4
.globl s16_x
.align 4
.type s16_x, @object
.size s16_x, 4
s16_x:
.zero 4
.globl _x_s16_evt0
.type _x_s16_evt0, @object
.size _x_s16_evt0, 1
_x_s16_evt0:
.zero 1
.globl s16_evt0
.type s16_evt0, @object
.size s16_evt0, 1
s16_evt0:
.zero 1
.globl _x_s16_evt1
.type _x_s16_evt1, @object
.size _x_s16_evt1, 1
_x_s16_evt1:
.zero 1
.globl s16_evt1
.type s16_evt1, @object
.size s16_evt1, 1
s16_evt1:
.zero 1
.globl _x_s16_evt2
.type _x_s16_evt2, @object
.size _x_s16_evt2, 1
_x_s16_evt2:
.zero 1
.globl s16_evt2
.type s16_evt2, @object
.size s16_evt2, 1
s16_evt2:
.zero 1
.globl _x_s17_x
.align 4
.type _x_s17_x, @object
.size _x_s17_x, 4
_x_s17_x:
.zero 4
.globl s17_x
.align 4
.type s17_x, @object
.size s17_x, 4
s17_x:
.zero 4
.globl _x_s17_evt0
.type _x_s17_evt0, @object
.size _x_s17_evt0, 1
_x_s17_evt0:
.zero 1
.globl s17_evt0
.type s17_evt0, @object
.size s17_evt0, 1
s17_evt0:
.zero 1
.globl _x_s17_evt1
.type _x_s17_evt1, @object
.size _x_s17_evt1, 1
_x_s17_evt1:
.zero 1
.globl s17_evt1
.type s17_evt1, @object
.size s17_evt1, 1
s17_evt1:
.zero 1
.globl _x_s17_evt2
.type _x_s17_evt2, @object
.size _x_s17_evt2, 1
_x_s17_evt2:
.zero 1
.globl s17_evt2
.type s17_evt2, @object
.size s17_evt2, 1
s17_evt2:
.zero 1
.globl _x_s17_l0
.type _x_s17_l0, @object
.size _x_s17_l0, 1
_x_s17_l0:
.zero 1
.globl s17_l0
.type s17_l0, @object
.size s17_l0, 1
s17_l0:
.zero 1
.globl _x_s17_l1
.type _x_s17_l1, @object
.size _x_s17_l1, 1
_x_s17_l1:
.zero 1
.globl s17_l1
.type s17_l1, @object
.size s17_l1, 1
s17_l1:
.zero 1
.globl _x_s18_x
.align 4
.type _x_s18_x, @object
.size _x_s18_x, 4
_x_s18_x:
.zero 4
.globl s18_x
.align 4
.type s18_x, @object
.size s18_x, 4
s18_x:
.zero 4
.globl _x_s18_evt0
.type _x_s18_evt0, @object
.size _x_s18_evt0, 1
_x_s18_evt0:
.zero 1
.globl s18_evt0
.type s18_evt0, @object
.size s18_evt0, 1
s18_evt0:
.zero 1
.globl _x_s18_evt1
.type _x_s18_evt1, @object
.size _x_s18_evt1, 1
_x_s18_evt1:
.zero 1
.globl s18_evt1
.type s18_evt1, @object
.size s18_evt1, 1
s18_evt1:
.zero 1
.globl _x_s18_evt2
.type _x_s18_evt2, @object
.size _x_s18_evt2, 1
_x_s18_evt2:
.zero 1
.globl s18_evt2
.type s18_evt2, @object
.size s18_evt2, 1
s18_evt2:
.zero 1
.globl _x_s18_l0
.type _x_s18_l0, @object
.size _x_s18_l0, 1
_x_s18_l0:
.zero 1
.globl s18_l0
.type s18_l0, @object
.size s18_l0, 1
s18_l0:
.zero 1
.globl _x_s18_l1
.type _x_s18_l1, @object
.size _x_s18_l1, 1
_x_s18_l1:
.zero 1
.globl s18_l1
.type s18_l1, @object
.size s18_l1, 1
s18_l1:
.zero 1
.globl _x_s19_x
.align 4
.type _x_s19_x, @object
.size _x_s19_x, 4
_x_s19_x:
.zero 4
.globl s19_x
.align 4
.type s19_x, @object
.size s19_x, 4
s19_x:
.zero 4
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC1:
.long 1095761920
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC2:
.long 0
.long 0
.align 8
.LC3:
.long 0
.long -1074790400
.section .rodata.cst4
.align 4
.LC4:
.long 1065353216
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999486.c"
.text
.align 2
.global __VERIFIER_nondet_bool
.syntax unified
.arm
.fpu softvfp
.type __VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
pop {r4, pc}
.size __VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
.global __aeabi_fcmpeq
.global __aeabi_fcmpge
.global __aeabi_fcmple
.global __aeabi_f2d
.global __aeabi_dsub
.global __aeabi_dadd
.global __aeabi_dcmpeq
.global __aeabi_dcmple
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 344
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #348
bl __VERIFIER_nondet_float
ldr r6, .L7995
ldr r7, .L7995+4
str r0, [r6] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+8
ldr r4, .L7995+12
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+16
ldr r8, .L7995+20
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+24
ldr r9, .L7995+28
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+32
ldr r5, .L7995+36
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+40
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+44
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+48
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+52
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+56
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+60
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+64
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+68
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+72
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+76
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+80
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+84
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7995+88
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+92
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+96
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+100
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+104
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+108
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+112
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+116
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7995+120
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+124
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+128
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+132
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+136
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+140
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+144
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+148
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
strb r0, [r7]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+152
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+156
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+160
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+164
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+168
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+476
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+484
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+572
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+532
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+456
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+580
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+172
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7995+652
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7995+684
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
strb r0, [r4]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+656
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+472
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7995+648
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7995+632
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+176
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+576
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+516
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
strb r0, [r8]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+668
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
strb r0, [r9]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+672
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+592
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+524
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+640
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+732
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+180
strb r0, [r3]
bl __VERIFIER_nondet_int
ldr r3, .L7995+184
str r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+444
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+596
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+520
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+644
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+188
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7995+192
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+196
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+740
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+200
strb r0, [r3]
bl __VERIFIER_nondet_int
ldr r3, .L7995+676
str r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+480
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+636
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+820
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+500
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+424
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+548
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+556
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+624
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+588
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+540
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+552
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+628
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+584
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7995+600
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7995+440
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7995+616
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7995+620
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+560
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+492
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+608
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+564
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+488
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+612
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+204
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+604
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+508
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
strb r0, [r5]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+660
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+352
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+568
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+528
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+460
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+448
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+452
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+408
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+496
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+428
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+416
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+420
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+412
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+376
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+468
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+392
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+464
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+396
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+384
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+388
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+380
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+344
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+436
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+360
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+432
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+364
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+356
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+348
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+208
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+336
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+312
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+404
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+328
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+400
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+332
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7995+680
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+320
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+324
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+316
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+212
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+304
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+216
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+372
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+296
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+368
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+300
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+220
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+224
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+228
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+232
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+236
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+340
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+240
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+244
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+248
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+252
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+308
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+256
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+260
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+264
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+268
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+272
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+276
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+280
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7995+284
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7995+288
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r3, r0, #0
movne r3, #1
ldrb r2, [r5] @ zero_extendqisi2
ldrb r1, [r4] @ zero_extendqisi2
orrs r2, r1, r2
ldr r2, .L7995+292
strb r3, [r2]
bne .L4988
mov r4, r0
mov r1, #0
ldr r0, [r6] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldrb r3, [r7] @ zero_extendqisi2
cmp r3, #0
bne .L8
ldrb r3, [r8] @ zero_extendqisi2
cmp r3, #0
beq .L9
ldrb r3, [r9] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L9:
ldr r3, .L7995+740
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+732
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+16
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+8
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+44
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+24
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+40
ldrb r3, [r3] @ zero_extendqisi2
bne .L12
cmp r3, #0
beq .L13
ldr r3, .L7995+32
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L13:
ldr r3, .L7995+88
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+96
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+52
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+48
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+68
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+56
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+64
ldrb r3, [r3] @ zero_extendqisi2
bne .L16
cmp r3, #0
beq .L17
ldr r3, .L7995+60
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L17:
ldr r3, .L7995+120
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+128
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+180
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+200
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+84
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+80
ldrb r3, [r3] @ zero_extendqisi2
bne .L20
cmp r3, #0
beq .L21
ldr r3, .L7995+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L21:
ldr r3, .L7995+140
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+272
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+100
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+92
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+116
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+104
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+112
ldrb r3, [r3] @ zero_extendqisi2
bne .L24
cmp r3, #0
beq .L25
ldr r3, .L7995+108
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L25:
ldr r3, .L7995+160
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+192
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+132
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+124
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+288
ldrb r3, [r3] @ zero_extendqisi2
bne .L28
cmp r3, #0
beq .L29
cmp r4, #0
bne .L4988
.L29:
ldr r3, .L7995+284
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+232
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+276
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+144
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+204
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+268
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+260
ldrb r3, [r3] @ zero_extendqisi2
bne .L32
cmp r3, #0
beq .L33
ldr r3, .L7995+264
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L33:
ldr r3, .L7995+256
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+212
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+196
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+164
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+188
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+252
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+244
ldrb r3, [r3] @ zero_extendqisi2
bne .L36
cmp r3, #0
beq .L37
ldr r3, .L7995+248
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L37:
ldr r3, .L7995+240
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+208
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+236
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+280
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+216
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+228
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+220
ldrb r3, [r3] @ zero_extendqisi2
bne .L40
cmp r3, #0
beq .L41
ldr r3, .L7995+224
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
b .L7996
.L7997:
.align 2
.L7995:
.word s19_x
.word s19_evt2
.word s18_l1
.word s19_l0
.word s18_l0
.word s19_evt0
.word s18_evt2
.word s19_evt1
.word s18_evt1
.word s19_l1
.word s18_evt0
.word s18_x
.word s17_l1
.word s17_l0
.word s17_evt2
.word s17_evt1
.word s17_evt0
.word s17_x
.word s16_evt2
.word s16_evt1
.word s16_evt0
.word s16_x
.word s18_backoff
.word s15_l1
.word s18_lambda
.word s15_l0
.word s15_evt2
.word s15_evt1
.word s15_evt0
.word s15_x
.word s17_backoff
.word s14_l1
.word s17_lambda
.word s14_l0
.word s4_evt0
.word s16_backoff
.word s13_l1
.word s4_x
.word bus_evt2
.word s3_evt0
.word s15_backoff
.word s12_l1
.word s3_x
.word s14_x
.word s14_evt2
.word s16_l0
.word bus_cd_id
.word s12_x
.word s15_lambda
.word s12_l0
.word s16_l1
.word s13_x
.word s12_lambda
.word s13_lambda
.word s11_x
.word s11_evt0
.word s11_evt1
.word s11_evt2
.word s14_lambda
.word s11_l0
.word s12_backoff
.word s12_evt0
.word s12_evt1
.word s12_evt2
.word s13_backoff
.word s13_evt0
.word s13_evt1
.word s13_evt2
.word s16_lambda
.word s13_l0
.word s11_l1
.word s14_backoff
.word s14_evt0
.word s14_evt1
.word s11_backoff
.word s11_lambda
.word s10_l0
.word s10_l1
.word s10_x
.word s10_evt2
.word s10_evt0
.word s10_evt1
.word s10_backoff
.word s10_lambda
.word s9_l0
.word s9_l1
.word s9_x
.word s9_evt2
.word s9_evt0
.word s9_evt1
.word s9_backoff
.word s9_lambda
.word s8_l0
.word s8_l1
.word s8_x
.word s8_evt2
.word s8_evt0
.word s8_evt1
.word s8_backoff
.word s8_lambda
.word s7_l0
.word s7_l1
.word s7_x
.word s7_evt2
.word s7_evt0
.word s7_evt1
.word s7_backoff
.word s7_lambda
.word s6_l0
.word s6_l1
.word s6_x
.word s6_evt2
.word s6_evt0
.word s6_evt1
.word s6_backoff
.word s6_lambda
.word s5_l0
.word s5_l1
.word s5_x
.word s5_evt2
.word s5_evt0
.word s5_evt1
.word s5_backoff
.word s5_lambda
.word s4_l0
.word s4_l1
.word s4_x
.word s4_evt2
.word s4_evt0
.word s4_evt1
.word s4_backoff
.word s4_lambda
.word s3_l0
.word s3_l1
.word s3_x
.word s3_evt2
.word s3_evt0
.word s3_evt1
.word s3_backoff
.word s3_lambda
.word s2_l0
.word s2_l1
.word s2_x
.word s2_evt2
.word s2_evt0
.word s2_evt1
.word s2_backoff
.word s2_lambda
.word s1_l0
.word s1_l1
.word s1_x
.word s1_evt2
.word s1_evt0
.word s1_evt1
.word s1_backoff
.word s1_lambda
.word s0_l0
.word s0_l1
.word s0_x
.word s0_evt2
.word s0_evt0
.word s0_evt1
.word s0_backoff
.word s0_lambda
.word bus_l0
.word bus_l1
.word bus_evt2
.word bus_evt0
.word bus_evt1
.word bus_j
.word bus_x
.word _diverge_delta
.word _x_s19_x
.word _x_s18_backoff
.word _x_s19_lambda
.word _x_s19_backoff
.word _x_bus_j
.word _x_delta
.word _x_bus_x
.word _x_s19_evt1
.word _x_s19_l0
.word s19_l0
.word s19_evt2
.word s19_lambda
.word s19_x
.word s19_backoff
.word s19_l1
.word s19_evt0
.word s19_evt1
.word _x_s19_l1
.word _x_s18_evt2
.word _x_s18_evt0
.word _x_s18_evt1
.word _x_s18_l0
.word 1095761920
.word _x_s18_lambda
.word _x_s18_x
.word s18_l0
.word s18_evt2
.word s18_lambda
.word s18_x
.word s18_backoff
.word -1074790400
.word _x_s18_l1
.word s18_l1
.word delta
.word s18_evt0
.word s18_evt1
.L7996:
bne .L4988
.L41:
ldr r3, .L7995+296
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+300
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+304
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+308
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+312
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+316
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+320
ldrb r3, [r3] @ zero_extendqisi2
bne .L44
cmp r3, #0
beq .L45
ldr r3, .L7995+324
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L45:
ldr r3, .L7995+328
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+332
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+336
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+340
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+344
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+348
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+352
ldrb r3, [r3] @ zero_extendqisi2
bne .L48
cmp r3, #0
beq .L49
ldr r3, .L7995+356
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L49:
ldr r3, .L7995+360
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+364
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+368
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+372
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+376
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+380
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+384
ldrb r3, [r3] @ zero_extendqisi2
bne .L52
cmp r3, #0
beq .L53
ldr r3, .L7995+388
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L53:
ldr r3, .L7995+392
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+396
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+400
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+404
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+408
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+412
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+416
ldrb r3, [r3] @ zero_extendqisi2
bne .L56
cmp r3, #0
beq .L57
ldr r3, .L7995+420
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L57:
ldr r3, .L7995+424
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+428
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+432
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+436
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+440
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+444
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+448
ldrb r3, [r3] @ zero_extendqisi2
bne .L60
cmp r3, #0
beq .L61
ldr r3, .L7995+452
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L61:
ldr r3, .L7995+456
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+460
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+464
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+468
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+472
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+476
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+480
ldrb r3, [r3] @ zero_extendqisi2
bne .L64
cmp r3, #0
beq .L65
ldr r3, .L7995+484
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L65:
ldr r3, .L7995+488
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+492
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+496
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+500
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+504
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+508
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+512
ldrb r3, [r3] @ zero_extendqisi2
bne .L68
cmp r3, #0
beq .L69
ldr r3, .L7995+516
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L69:
ldr r3, .L7995+520
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+524
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+528
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+532
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+536
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+540
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+544
ldrb r3, [r3] @ zero_extendqisi2
bne .L72
cmp r3, #0
beq .L73
ldr r3, .L7995+548
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L73:
ldr r3, .L7995+552
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+556
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+560
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+564
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+568
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+572
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+576
ldrb r3, [r3] @ zero_extendqisi2
bne .L76
cmp r3, #0
beq .L77
ldr r3, .L7995+580
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L77:
ldr r3, .L7995+584
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+588
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+592
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+596
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+600
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+604
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+608
ldrb r3, [r3] @ zero_extendqisi2
bne .L80
cmp r3, #0
beq .L81
ldr r3, .L7995+612
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L81:
ldr r3, .L7995+616
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+620
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+624
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+628
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+632
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+636
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+640
ldrb r3, [r3] @ zero_extendqisi2
bne .L84
cmp r3, #0
beq .L85
ldr r3, .L7995+644
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
.L85:
ldr r3, .L7995+648
ldr r1, .L7995+776
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+652
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L4988
ldr r3, .L7995+656
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+660
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L4988
ldr r3, .L7995+664
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
ldr r3, .L7995+668
ldrb r3, [r3] @ zero_extendqisi2
bne .L7630
cmp r3, #0
beq .L88
ldr r3, .L7995+672
ldrb r3, [r3] @ zero_extendqisi2
.L7630:
cmp r3, #0
bne .L4988
.L88:
ldr r3, .L7995+676
ldr r3, [r3]
cmp r3, #0
bne .L4988
ldr r3, .L7995+680
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r3, .L7995+820
mov r1, #0
ldr r4, [r3] @ float
mov r0, r4
bl __aeabi_fcmpge
cmp r0, #0
beq .L4988
ldr r3, .L7995+684
mov r0, r4
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L4988
ldr r10, .L7995+688
ldr fp, .L7995+692
ldr r9, .L7995+696
ldr r8, .L7995+700
ldr r7, .L7995+704
ldr r6, .L7995+708
ldr r4, .L7995+712
b .L1724
.L7712:
cmp r3, #0
beq .L94
ldr r2, .L7995+716
ldrb r3, [r2] @ zero_extendqisi2
cmp r3, #0
movne r2, r5
bne .L95
.L94:
ldr r3, .L7995+720
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #12]
beq .L1884
ldr r3, .L7995+756
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7667
.L1884:
ldr r3, [r8] @ float
ldr r1, .L7995+776
mov r0, r3
str r3, [sp, #16] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, [r9] @ float
mov r1, #0
mov r0, r3
str r3, [sp, #20] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, [r10] @ float
ldr r0, [sp, #20] @ float
mov r1, r2
str r2, [sp, #32] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L98
ldr r3, [sp, #12]
subs r2, r3, #0
ldr r3, .L7995+756
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L98:
ldr r3, .L7995+724
ldr r2, [sp, #12]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #24]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #56]
str r3, [sp, #48]
beq .L99
ldr r3, .L7995+744
ldr r2, .L7995+756
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L99
ldr r3, .L7995+732
ldr r0, [sp, #20] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L99
ldr r3, .L7995+736
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #32] @ float
str r2, [sp, #40]
str r3, [sp, #44]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #40
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L7995+820
str r2, [sp, #40]
str r3, [sp, #44]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #40
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L99
ldr r3, .L7995+740
ldr r0, [sp, #16] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L99
.L102:
ldr r3, [sp, #12]
cmp r3, #0
beq .L104
ldr r3, .L7995+756
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L104
.L105:
ldr r3, .L7995+744
ldr r2, [sp, #24]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
str r2, [sp, #40]
bne .L106
ldr r3, .L7995+820
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L106
ldr r2, .L7995+748
ldr r3, .L7995+728
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L7995+752
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #40]
bne .L95
.L109:
ldr r3, [sp, #12]
cmp r3, #0
beq .L7668
ldr r3, .L7995+756
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
beq .L7669
ldr r3, .L7995+732
ldr r0, [sp, #20] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #40]
bne .L2458
.L1881:
ldr r3, .L7995+756
ldr r2, [sp, #24]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7670
.L2452:
ldr r0, [sp, #32] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #32]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #72]
.L128:
ldr r3, [sp, #24]
subs r2, r3, #0
ldr r3, .L7995+744
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7671
.L129:
ldr r3, .L7995+736
ldr r1, [sp, #64] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #76] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7672
.L131:
ldr r3, [sp, #12]
cmp r3, #0
bne .L135
.L3233:
ldr r3, .L7995+756
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #24]
orrs r2, r3, r2
bne .L136
ldr r3, .L7995+744
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7673
.L136:
ldr r3, [sp, #40]
cmp r3, #0
strne r3, [sp, #20]
bne .L138
ldr r3, .L7995+748
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #20]
ldrne r3, [sp, #40]
strne r3, [sp, #20]
beq .L138
.L3028:
ldr r3, .L7995+752
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L133
ldr r3, .L7995+740
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #16] @ float
str r2, [sp, #40]
str r3, [sp, #44]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #40
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L7995+808
bl __aeabi_dcmple
cmp r0, #0
bne .L138
.L133:
ldr r3, [sp, #12]
cmp r3, #0
bne .L2446
.L138:
ldr r3, [sp, #32]
cmp r3, #0
beq .L144
.L3027:
ldr r3, .L7995+756
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2443
.L145:
ldr r3, [sp, #12]
cmp r3, #0
bne .L1878
.L144:
ldr r3, [sp, #24]
cmp r3, #0
beq .L146
ldr r3, .L7995+744
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L146
.L3025:
ldr r3, .L7995+820
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L146
ldr r3, .L7995+748
ldr r2, .L7995+752
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #20]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L149:
ldr r3, [sp, #12]
cmp r3, #0
bne .L7674
ldr r3, [sp, #12]
str r3, [sp, #20]
.L151:
ldr r3, .L7995+756
ldr r2, [sp, #56]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #48]
orrs r3, r2, r3
beq .L7675
.L154:
ldr r3, .L7995+760
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7995+764
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L155
cmp r3, #0
beq .L156
ldr r3, .L7995+768
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L156:
ldr r3, .L7995+772
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #16]
beq .L1877
ldr r3, .L7995+812
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7676
.L1877:
ldr r3, [fp] @ float
ldr r1, .L7995+776
mov r0, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L7995+780
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #12] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L7995+784
ldr r0, [sp, #12] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #32] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L159
ldr r3, [sp, #16]
subs r2, r3, #0
ldr r3, .L7995+812
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L159:
ldr r3, .L7995+788
ldr r2, [sp, #16]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #40]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #80]
str r3, [sp, #76]
beq .L160
ldr r3, .L7995+816
ldr r2, .L7995+812
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L160
ldr r3, .L7995+796
ldr r0, [sp, #12] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L160
ldr r3, .L7995+800
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #32] @ float
str r2, [sp, #24]
str r3, [sp, #28]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #24
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L7995+820
str r2, [sp, #24]
str r3, [sp, #28]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #24
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L160
ldr r3, .L7995+804
ldr r0, [sp, #64] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L160
.L163:
ldr r3, [sp, #16]
cmp r3, #0
beq .L165
ldr r3, .L7995+812
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L165
.L166:
ldr r3, .L7995+816
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #40]
orrs r2, r3, r2
str r2, [sp, #24]
bne .L167
ldr r3, .L7995+820
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L167
ldr r2, .L7995+824
ldr r3, .L7995+792
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L7995+828
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #24]
bne .L95
.L170:
ldr r3, [sp, #16]
cmp r3, #0
beq .L7677
ldr r3, .L7995+812
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #24]
beq .L7678
ldr r3, .L7995+796
ldr r0, [sp, #12] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #48] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #24]
bne .L2433
.L1874:
ldr r3, .L7995+812
ldr r2, [sp, #40]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7679
.L2427:
ldr r0, [sp, #32] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #32]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #56]
.L189:
ldr r3, [sp, #40]
subs r2, r3, #0
ldr r3, .L7995+816
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7680
.L190:
ldr r3, .L7995+800
ldr r1, [sp, #48] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7681
.L192:
ldr r3, [sp, #16]
cmp r3, #0
bne .L196
.L3228:
ldr r3, .L7995+812
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #40]
orrs r2, r3, r2
bne .L197
ldr r3, .L7995+816
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7682
.L197:
ldr r3, [sp, #24]
cmp r3, #0
strne r3, [sp, #12]
bne .L199
ldr r3, .L7995+824
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #12]
ldrne r3, [sp, #24]
strne r3, [sp, #12]
beq .L199
.L3007:
ldr r3, .L7995+828
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L194
ldr r3, .L7995+804
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #64] @ float
str r2, [sp, #24]
str r3, [sp, #28]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #24
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L7995+808
bl __aeabi_dcmple
cmp r0, #0
bne .L199
.L194:
ldr r3, [sp, #16]
cmp r3, #0
bne .L2421
.L199:
ldr r3, [sp, #32]
cmp r3, #0
beq .L205
.L3006:
ldr r3, .L7995+812
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2418
.L206:
ldr r3, [sp, #16]
cmp r3, #0
bne .L1871
.L205:
ldr r3, [sp, #40]
cmp r3, #0
beq .L207
ldr r3, .L7995+816
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L207
.L3004:
ldr r3, .L7995+820
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L207
ldr r3, .L7995+824
ldr r2, .L7995+828
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #12]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L210:
ldr r3, [sp, #16]
cmp r3, #0
bne .L7683
ldr r3, [sp, #16]
str r3, [sp, #12]
.L212:
ldr r3, .L7998
ldr r2, [sp, #80]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #76]
orrs r3, r2, r3
beq .L7684
.L215:
ldr r3, .L7998+4
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7998+8
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L216
cmp r3, #0
beq .L217
ldr r3, .L7998+12
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L217:
ldr r3, .L7998+16
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #32]
beq .L1870
ldr r3, .L7998+20
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7685
.L1870:
ldr r3, .L7998+24
ldr r1, .L7998+28
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L7998+32
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #16] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L7998+36
ldr r0, [sp, #16] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #40] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L220
ldr r3, [sp, #32]
subs r2, r3, #0
ldr r3, .L7998+20
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L220:
ldr r3, .L7998+40
ldr r2, [sp, #32]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #48]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #84]
str r3, [sp, #80]
beq .L221
ldr r3, .L7998+44
ldr r2, .L7998+20
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L221
ldr r3, .L7998+48
ldr r0, [sp, #16] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L221
ldr r3, .L7998+116
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #40] @ float
str r2, [sp, #24]
str r3, [sp, #28]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #24
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L7998+52
str r2, [sp, #24]
str r3, [sp, #28]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #24
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L221
ldr r3, .L7998+184
ldr r0, [sp, #72] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L221
.L224:
ldr r3, [sp, #32]
cmp r3, #0
beq .L226
ldr r3, .L7998+20
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L226
.L227:
ldr r3, .L7998+44
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #48]
orrs r2, r3, r2
str r2, [sp, #24]
bne .L228
ldr r3, .L7998+52
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L228
ldr r2, .L7998+112
ldr r3, .L7998+104
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L7998+108
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #24]
bne .L95
.L231:
ldr r3, [sp, #32]
cmp r3, #0
beq .L7686
ldr r3, .L7998+20
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #24]
beq .L7687
ldr r3, .L7998+48
ldr r0, [sp, #16] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #56] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #24]
bne .L2408
.L1869:
ldr r3, .L7998+20
ldr r2, [sp, #48]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7688
.L2402:
ldr r0, [sp, #40] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #40]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #64]
.L250:
ldr r3, [sp, #48]
subs r2, r3, #0
ldr r3, .L7998+44
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7689
.L251:
ldr r3, .L7998+116
ldr r1, [sp, #56] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #76] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7690
.L253:
ldr r3, [sp, #32]
cmp r3, #0
bne .L257
.L3223:
ldr r3, .L7998+20
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #48]
orrs r2, r3, r2
bne .L258
ldr r3, .L7998+44
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7691
.L258:
ldr r3, [sp, #24]
cmp r3, #0
strne r3, [sp, #16]
bne .L260
ldr r3, .L7998+112
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #16]
ldrne r3, [sp, #24]
strne r3, [sp, #16]
beq .L260
.L2986:
ldr r3, .L7998+108
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L255
ldr r3, .L7998+184
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #72] @ float
str r2, [sp, #24]
str r3, [sp, #28]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #24
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L7998+56
bl __aeabi_dcmple
cmp r0, #0
bne .L260
.L255:
ldr r3, [sp, #32]
cmp r3, #0
bne .L2396
.L260:
ldr r3, [sp, #40]
cmp r3, #0
beq .L266
.L2985:
ldr r3, .L7998+20
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2393
.L267:
ldr r3, [sp, #32]
cmp r3, #0
bne .L1864
.L266:
ldr r3, [sp, #48]
cmp r3, #0
beq .L268
ldr r3, .L7998+44
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L268
.L2983:
ldr r3, .L7998+52
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L268
ldr r3, .L7998+112
ldr r2, .L7998+108
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #16]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L271:
ldr r3, [sp, #32]
cmp r3, #0
ldreq r3, [sp, #32]
streq r3, [sp, #16]
beq .L273
ldr r3, [sp, #48]
cmp r3, #0
ldreq r3, [sp, #48]
streq r3, [sp, #16]
bne .L7692
.L276:
ldr r3, .L7998+120
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7998+136
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L277
cmp r3, #0
beq .L278
ldr r3, .L7998+132
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L278:
ldr r3, .L7998+344
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
beq .L1863
ldr r3, .L7998+388
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7693
.L1863:
ldr r3, .L7998+208
ldr r1, .L7998+28
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #76] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L7998+60
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #24] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L7998+148
ldr r0, [sp, #24] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #48] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L281
ldr r3, [sp, #40]
subs r2, r3, #0
ldr r3, .L7998+388
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L281:
ldr r3, .L7998+348
ldr r2, [sp, #40]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #56]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #88]
str r3, [sp, #84]
beq .L282
ldr r3, .L7998+392
ldr r2, .L7998+388
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L282
ldr r3, .L7998+1068
ldr r0, [sp, #24] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L282
ldr r3, .L7998+144
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #48] @ float
str r2, [sp, #32]
str r3, [sp, #36]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #32
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L7998+52
str r2, [sp, #32]
str r3, [sp, #36]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #32
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L282
ldr r3, .L7998+204
ldr r0, [sp, #76] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L282
.L285:
ldr r3, [sp, #40]
cmp r3, #0
beq .L287
ldr r3, .L7998+388
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L287
.L288:
ldr r3, .L7998+392
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #56]
orrs r2, r3, r2
str r2, [sp, #32]
bne .L289
ldr r3, .L7998+52
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L289
ldr r2, .L7998+140
ldr r3, .L7998+124
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L7998+128
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #32]
bne .L95
.L292:
ldr r3, [sp, #40]
cmp r3, #0
beq .L7694
ldr r3, .L7998+388
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #32]
beq .L7695
ldr r3, .L7998+1068
ldr r0, [sp, #24] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #32]
bne .L2383
.L1860:
ldr r3, .L7998+388
ldr r2, [sp, #56]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7696
.L2377:
ldr r0, [sp, #48] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #48]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #72]
.L311:
ldr r3, [sp, #56]
subs r2, r3, #0
ldr r3, .L7998+392
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7697
.L312:
ldr r3, .L7998+144
ldr r1, [sp, #64] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #80] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7698
.L314:
ldr r3, [sp, #40]
cmp r3, #0
bne .L318
.L3218:
ldr r3, .L7998+388
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #56]
orrs r2, r3, r2
bne .L319
ldr r3, .L7998+392
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7699
.L319:
ldr r3, [sp, #32]
cmp r3, #0
strne r3, [sp, #24]
bne .L321
ldr r3, .L7998+140
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #24]
ldrne r3, [sp, #32]
strne r3, [sp, #24]
beq .L321
.L2965:
ldr r3, .L7998+128
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L316
ldr r3, .L7998+204
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #76] @ float
str r2, [sp, #32]
str r3, [sp, #36]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #32
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L7998+56
bl __aeabi_dcmple
cmp r0, #0
bne .L321
.L316:
ldr r3, [sp, #40]
cmp r3, #0
beq .L321
.L2371:
ldr r3, .L7998+388
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L322
ldr r3, .L7998+392
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L323
ldr r3, [sp, #56]
cmp r3, #0
bne .L324
ldr r0, .L7998+52
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L325
ldr r1, .L7998+140
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L7998+128
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #24]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #56]
str r1, [sp, #24]
bne .L95
ldr r3, [sp, #48]
cmp r3, #0
bne .L1858
.L2963:
ldr r3, .L7998+140
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L332
ldr r3, .L7998+128
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #24]
beq .L334
.L332:
ldr r3, [sp, #40]
cmp r3, #0
ldreq r3, [sp, #40]
streq r3, [sp, #24]
beq .L334
ldr r3, [sp, #56]
cmp r3, #0
ldreq r3, [sp, #56]
streq r3, [sp, #24]
bne .L7700
.L337:
ldr r3, .L7998+1180
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7998+1188
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L338
cmp r3, #0
beq .L339
ldr r3, .L7998+1184
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L339:
ldr r3, .L7998+1176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #48]
beq .L1856
ldr r3, .L7998+1168
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7701
.L1856:
ldr r3, .L7998+1236
ldr r1, .L7998+28
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #80] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L7998+1372
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #32] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L7998+1192
ldr r0, [sp, #32] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #56] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L342
ldr r3, [sp, #48]
subs r2, r3, #0
ldr r3, .L7998+1168
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L342:
ldr r3, .L7998+164
ldr r2, [sp, #48]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #64]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #92]
str r3, [sp, #88]
beq .L343
ldr r3, .L7998+156
ldr r2, .L7998+1168
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L343
ldr r3, .L7998+376
ldr r0, [sp, #32] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L343
ldr r3, .L7998+180
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #56] @ float
str r2, [sp, #40]
str r3, [sp, #44]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #40
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L7998+52
str r2, [sp, #40]
str r3, [sp, #44]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #40
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L343
ldr r3, .L7998+232
ldr r0, [sp, #80] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L343
.L346:
ldr r3, [sp, #48]
cmp r3, #0
beq .L348
ldr r3, .L7998+1168
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L348
.L349:
ldr r3, .L7998+156
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #64]
orrs r2, r3, r2
str r2, [sp, #40]
bne .L350
ldr r3, .L7998+52
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L350
ldr r2, .L7998+176
ldr r3, .L7998+168
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L7998+172
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #40]
bne .L95
.L353:
ldr r3, [sp, #48]
cmp r3, #0
beq .L7702
ldr r3, .L7998+1168
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
beq .L7703
ldr r3, .L7998+376
ldr r0, [sp, #32] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #40]
beq .L1853
.L2358:
ldr r3, .L7998+176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
bne .L7704
.L367:
ldr r3, [sp, #48]
cmp r3, #0
beq .L368
.L2357:
ldr r3, .L7998+1168
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7705
.L368:
mov r1, #0
ldr r0, [sp, #56] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #72] @ float
ldr r0, [sp, #32] @ float
str r3, [sp, #76]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #76]
str r2, [sp, #56]
ands r3, r3, r2
beq .L372
ldr r2, .L7998+1168
str r3, [sp, #76]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #56]
cmp r2, #0
bne .L372
.L373:
ldr r3, .L7998+180
ldr r1, [sp, #72] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #84] @ float
bl __aeabi_fcmpge
cmp r0, #0
beq .L375
ldr r3, .L7998+172
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7706
.L375:
ldr r3, [sp, #48]
cmp r3, #0
beq .L3213
ldr r3, [sp, #40]
cmp r3, #0
strne r3, [sp, #32]
bne .L2346
.L2345:
ldr r3, .L7998+176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #32]
bne .L7707
.L2346:
ldr r3, .L7998+1168
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L383
ldr r3, .L7998+156
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L384
ldr r3, [sp, #64]
cmp r3, #0
bne .L385
ldr r0, .L7998+52
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L386
ldr r1, .L7998+176
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L7998+172
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #32]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #64]
str r1, [sp, #32]
bne .L95
ldr r3, [sp, #56]
cmp r3, #0
beq .L2942
.L1851:
ldr r3, [sp, #48]
cmp r3, #0
beq .L390
.L1850:
ldr r3, .L7998+232
ldr r1, [sp, #80] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #76]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L390
.L388:
ldr r3, [sp, #64]
cmp r3, #0
beq .L390
ldr r3, .L7998+156
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2941
.L390:
ldr r3, [sp, #32]
cmp r3, #0
bne .L394
.L2942:
ldr r3, .L7998+176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7708
.L393:
ldr r3, [sp, #48]
cmp r3, #0
ldreq r3, [sp, #48]
streq r3, [sp, #32]
bne .L7709
.L395:
ldr r3, .L7998+1168
ldr r2, [sp, #92]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #88]
orrs r3, r2, r3
beq .L7710
.L398:
ldr r3, .L7998+1304
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L7998+1088
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L399
cmp r3, #0
beq .L400
ldr r3, [sp]
cmp r3, #0
bne .L95
.L400:
ldr r3, .L7998+1208
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #48]
bne .L401
.L1849:
ldr r3, .L7998+1080
ldr r1, .L7998+28
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #80] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L7998+964
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L7998+1272
ldr r0, [sp] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #56] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L403
ldr r3, [sp, #48]
subs r2, r3, #0
ldr r3, .L7998+1200
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L403:
ldr r3, .L7998+196
ldr r2, [sp, #48]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #64]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #92]
str r3, [sp, #88]
beq .L404
ldr r3, .L7998+188
ldr r2, .L7998+1200
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L404
ldr r3, .L7998+968
ldr r0, [sp] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L404
ldr r3, .L7998+268
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #56] @ float
str r2, [sp, #40]
str r3, [sp, #44]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #40
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L7998+52
str r2, [sp, #40]
str r3, [sp, #44]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #40
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L404
ldr r3, .L7998+1092
ldr r0, [sp, #80] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L407
.L404:
ldr r3, .L7998+52
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
bne .L7711
.L95:
ldr r1, [r10] @ float
ldr r0, .L7998+64
ldr r3, .L7998
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L7998+68
ldr r0, .L7998+72
strb r3, [r1]
ldr r3, .L7998+1108
cmp r2, #0
b .L7999
.L8000:
.align 2
.L7998:
.word _x_s18_l1
.word _x_s17_evt2
.word _x_s17_evt0
.word _x_s17_evt1
.word _x_s17_l0
.word _x_s17_l1
.word _x_s17_backoff
.word 1095761920
.word _x_s17_lambda
.word _x_s17_x
.word s17_l0
.word s17_l1
.word s17_lambda
.word delta
.word -1074790400
.word _x_s16_lambda
.word s19_x
.word s18_l1
.word s18_l0
.word s18_evt2
.word s18_evt1
.word _x_s13_evt2
.word s18_evt0
.word s18_x
.word s17_l1
.word s17_l0
.word s17_evt2
.word s17_evt1
.word s17_evt0
.word s17_x
.word _x_s16_evt2
.word s16_evt2
.word s16_evt1
.word _x_s16_evt1
.word _x_s16_evt0
.word s16_evt0
.word s16_x
.word _x_s16_x
.word s18_backoff
.word s15_l1
.word s18_lambda
.word s15_l0
.word s15_evt2
.word s15_evt1
.word s15_evt0
.word s15_x
.word s17_backoff
.word s14_l1
.word s17_lambda
.word s14_l0
.word s4_evt0
.word s16_backoff
.word _x_s16_backoff
.word s13_l1
.word s4_x
.word s19_evt2
.word bus_evt2
.word s3_evt0
.word s15_backoff
.word s12_l1
.word s3_x
.word s5_evt2
.word s5_evt1
.word s2_evt2
.word s3_l1
.word s6_backoff
.word s2_evt1
.word s14_x
.word s0_lambda
.word _diverge_delta
.word s19_l0
.word bus_l0
.word s5_x
.word s0_backoff
.word s0_x
.word s14_evt2
.word s2_evt0
.word s4_evt1
.word s19_evt0
.word bus_evt0
.word s19_evt1
.word bus_evt1
.word s1_l0
.word s4_lambda
.word s0_evt0
.word s19_lambda
.word _x_s16_l0
.word s16_l0
.word bus_cd_id
.word s6_evt2
.word s1_l1
.word s4_backoff
.word s0_evt1
.word s12_x
.word s15_lambda
.word s12_l0
.word s19_backoff
.word _x_s16_l1
.word s16_l1
.word bus_j
.word s5_evt0
.word s0_evt2
.word delta
.word s4_l1
.word s7_backoff
.word s3_evt1
.word s3_lambda
.word s0_l0
.word s2_lambda
.word s3_evt2
.word _x_s3_backoff
.word s3_backoff
.word _x_s0_l1
.word s0_l1
.word _x_s2_backoff
.word s2_backoff
.word _x_s1_x
.word s1_x
.word _x_s6_x
.word s6_x
.word _x_s1_backoff
.word s1_backoff
.word _x_s1_lambda
.word s1_lambda
.word _x_s2_l0
.word s2_l0
.word _x_s5_lambda
.word s5_lambda
.word _x_s1_evt0
.word s1_evt0
.word _x_s2_l1
.word s2_l1
.word s5_backoff
.word _x_s5_backoff
.word _x_s1_evt1
.word s1_evt1
.word _x_s13_x
.word s13_x
.word _x_s1_evt2
.word s1_evt2
.word _x_s4_evt2
.word s4_evt2
.word _x_s19_l1
.word s19_l1
.word _x_bus_l1
.word bus_l1
.word _x_s9_evt0
.word s9_evt0
.word _x_s2_x
.word s2_x
.word _x_s3_l0
.word s3_l0
.word _x_s6_lambda
.word s6_lambda
.word _x_s6_evt0
.word s6_evt0
.word _x_s6_evt1
.word s6_evt1
.word _x_s7_x
.word s7_x
.word _x_s4_l0
.word s4_l0
.word _x_s7_lambda
.word s7_lambda
.word s7_evt0
.word _x_s7_evt0
.word _x_s7_evt1
.word s7_evt1
.word _x_s7_evt2
.word s7_evt2
.word _x_s8_x
.word s8_x
.word _x_s5_l1
.word s5_l1
.word _x_s8_backoff
.word s8_backoff
.word _x_s5_l0
.word s5_l0
.word _x_s8_lambda
.word s8_lambda
.word _x_s8_evt0
.word s8_evt0
.word _x_s8_evt1
.word s8_evt1
.word _x_s8_evt2
.word s8_evt2
.word _x_s9_x
.word s9_x
.word _x_s6_l1
.word s6_l1
.word _x_s9_backoff
.word s9_backoff
.word _x_s6_l0
.word s6_l0
.word _x_s9_lambda
.word s9_lambda
.word s9_evt1
.word _x_s9_evt1
.word _x_s9_evt2
.word s9_evt2
.word _x_s12_lambda
.word s12_lambda
.word _x_s9_l0
.word s9_l0
.word _x_s10_x
.word s10_x
.word _x_s7_l1
.word s7_l1
.word _x_s10_backoff
.word s10_backoff
.word _x_s7_l0
.word s7_l0
.word _x_s10_lambda
.word s10_lambda
.word bus_x
.word _x_s10_evt0
.word s10_evt0
.word _x_s10_evt1
.word s10_evt1
.word _x_s10_evt2
.word s10_evt2
.word _x_s13_lambda
.word s13_lambda
.word _x_s10_l0
.word s10_l0
.word _x_s11_x
.word s11_x
.word s8_l1
.word _x_s8_l1
.word _x_s11_backoff
.word s11_backoff
.word _x_s8_l0
.word s8_l0
.word _x_s11_lambda
.word s11_lambda
.word _x_s11_evt0
.word s11_evt0
.word _x_s11_evt1
.word s11_evt1
.word _x_s11_evt2
.word s11_evt2
.word _x_s14_lambda
.word s14_lambda
.word _x_s11_l0
.word s11_l0
.word _x_s9_l1
.word s9_l1
.word _x_s12_backoff
.word s12_backoff
.word _x_s12_evt0
.word s12_evt0
.word _x_s12_evt1
.word s12_evt1
.word _x_s12_evt2
.word s12_evt2
.word _x_s10_l1
.word s10_l1
.word _x_s13_backoff
.word s13_backoff
.word s13_evt0
.word _x_s13_evt0
.word _x_s13_evt1
.word s14_evt1
.word s13_evt1
.word _x_s16_lambda
.word s13_evt2
.word _x_s13_l0
.word s16_lambda
.word _x_s11_l1
.word s13_l0
.word _x_s14_backoff
.word s11_l1
.word _x_s14_evt0
.word s14_backoff
.word s14_evt0
.word _x_s18_l1
.word _x_s19_evt2
.word _x_s18_l0
.word _x_s18_evt2
.word _x_s18_evt1
.word _x_s18_evt0
.word _x_s18_x
.word _x_s17_l1
.word _x_s17_l0
.word _x_s17_evt2
.word _x_s17_evt1
.word _x_s17_evt0
.word _x_s17_x
.word _x_s16_evt2
.word _x_s16_evt1
.word _x_s16_evt0
.word _x_s16_x
.word _x_s15_l1
.word _x_s18_lambda
.word _x_s15_l0
.word _x_s15_evt2
.word _x_s15_evt1
.word _x_s15_evt0
.word _x_s15_x
.word _x_s17_backoff
.word _x_s14_l1
.word _x_s17_lambda
.word _x_s14_l0
.word _x_s4_evt0
.word _x_s16_backoff
.word _x_s13_l1
.word _x_s4_x
.word _x_bus_evt2
.word _x_s3_evt0
.word _x_s15_backoff
.word _x_s12_l1
.word _x_s3_x
.word _x_s5_evt2
.word _x_s5_evt1
.word _x_s2_evt2
.word _x_s3_l1
.word _x_s6_backoff
.word _x_s2_evt1
.word _x_s14_x
.word _x_s0_lambda
.word _x__diverge_delta
.word _x_s19_l0
.word _x_bus_l0
.word _x_s5_x
.word _x_s0_backoff
.word _x_s0_x
.word _x_s14_evt2
.word _x_s2_evt0
.word _x_s4_evt1
.word _x_s19_evt0
.word _x_bus_evt0
.word _x_s19_evt1
.word _x_bus_evt1
.word _x_s1_l0
.word _x_s4_lambda
.word _x_s0_evt0
.word _x_s16_l0
.word _x_bus_cd_id
.word _x_s6_evt2
.word _x_s1_l1
.word _x_s4_backoff
.word _x_s0_evt1
.word _x_s12_x
.word _x_s15_lambda
.word _x_s12_l0
.word _x_s16_l1
.word _x_s5_evt0
.word _x_s0_evt2
.word _x_s4_l1
.word _x_s7_backoff
.word _x_s3_evt1
.word _x_s3_lambda
.word _x_s0_l0
.word _x_s2_lambda
.word _x_s3_evt2
.L7999:
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L7998+1112
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L7998+76
ldr r0, .L7998+80
strb r3, [r1]
ldr r3, .L7998+1116
ldr r2, .L7998+84
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L7998+1120
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L7998+88
ldr r0, .L7998+92
strb r3, [r1]
ldr r3, .L7998+1124
ldr r1, [r3] @ float
ldr r3, .L7998+1128
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L7998+96
ldr r0, .L7998+100
strb r3, [r1]
ldr r3, .L7998+1132
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L7998+1136
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L7998+104
ldr r0, .L7998+108
strb r3, [r1]
ldr r3, .L7998+1140
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L7998+1144
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L7998+112
ldr r0, .L7998+116
strb r3, [r1]
ldr r3, .L7998+1148
ldr r1, [r3] @ float
ldr r3, .L7998+120
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L7998+124
ldr r0, .L7998+128
strb r3, [r1]
ldr r3, .L7998+132
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L7998+136
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L7998+140
ldr r0, .L7998+144
strb r3, [r1]
ldr r3, .L7998+148
ldr r1, [r3] @ float
ldr r3, [fp] @ float
str r1, [r0] @ float
ldr r1, .L7998+152
ldr r0, .L7998+156
str r3, [r1] @ float
ldr r3, .L7998+1168
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L7998+1172
strb r1, [r0]
ldr r3, [r3] @ float
ldr r1, .L7998+160
ldr r0, .L7998+164
str r3, [r1] @ float
ldr r3, .L7998+1176
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L7998+1180
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L7998+168
ldr r0, .L7998+172
strb r3, [r1]
ldr r3, .L7998+1184
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L7998+1188
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L7998+176
ldr r0, .L7998+180
strb r3, [r1]
ldr r3, .L7998+1192
ldr r1, [r3] @ float
ldr r3, .L7998+1196
str r1, [r0] @ float
ldr r3, [r3] @ float
ldr r1, .L7998+184
ldr r0, .L7998+188
str r3, [r1] @ float
ldr r3, .L7998+1200
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L7998+1204
strb r1, [r0]
ldr r3, [r3] @ float
ldr r1, .L7998+192
ldr r0, .L7998+196
str r3, [r1] @ float
ldr r3, .L7998+1208
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L7998+1212
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L7998+200
ldr r0, .L7998+204
strb r3, [r1]
ldr r3, .L7998+208
ldr r1, [r3] @ float
ldr r3, .L7998+1220
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L7998+212
ldr r0, .L7998+216
strb r3, [r1]
ldr r3, .L7998+1224
ldr r1, [r3] @ float
ldr r3, .L7998+220
str r1, [r0] @ float
strb r5, [r3]
ldr r3, .L7998+1228
ldr r0, .L7998+224
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L7998+1232
strb r3, [r0]
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+228
ldr r3, .L7998+1236
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+232
ldr r1, .L7998+1240
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+236
ldr r3, .L7998+1244
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+240
ldr r1, .L7998+1248
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+244
ldr r3, .L7998+1252
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+248
ldr r1, .L7998+1256
strb r3, [r0]
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+252
ldr r3, .L7998+1260
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+256
ldr r1, .L7998+1264
strb r3, [r0]
ldr r1, [r1] @ float
ldr r0, .L7998+260
ldr r3, .L7998+1268
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+264
ldr r1, .L7998+1272
strb r3, [r0]
ldr r1, [r1] @ float
ldr r0, .L7998+268
ldr r3, .L7998+1276
str r1, [r0] @ float
ldr r3, [r3] @ float
ldr r0, .L7998+272
ldr r1, .L7998+1280
str r3, [r0] @ float
ldr r1, [r1] @ float
ldr r0, .L7998+276
ldr r3, .L7998+1284
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L7998+280
ldr r0, .L7998+284
strb r3, [r1]
ldr r3, .L7998+1288
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L7998+1292
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+288
ldr r1, .L7998+1296
str r3, [r0] @ float
ldr r1, [r1] @ float
ldr r0, .L7998+292
ldr r3, .L7998+1300
str r1, [r0] @ float
ldr r3, [r3] @ float
ldr r0, .L7998+296
ldr r1, .L7998+1304
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+300
ldr r3, .L7998+1308
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+304
ldr r1, .L7998+1312
strb r3, [r0]
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+308
ldr r3, .L7998+1316
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+312
ldr r1, .L7998+1320
strb r3, [r0]
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+316
ldr r3, .L7998+1324
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+320
ldr r1, .L7998+1328
strb r3, [r0]
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+324
ldr r3, .L7998+1332
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+328
ldr r1, .L7998+1336
strb r3, [r0]
ldr r1, [r1] @ float
ldr r0, .L7998+332
ldr r3, .L7998+1340
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+336
ldr r1, [r9] @ float
strb r3, [r0]
ldr r0, .L7998+340
ldr r3, .L7998+344
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L7998+348
ldr r0, .L7998+352
strb r3, [r1]
ldr r3, .L7998+1348
ldr r1, [r3]
ldr r3, .L7998+1352
str r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+356
ldr r1, .L7998+1356
strb r3, [r0]
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+360
ldr r3, .L7998+1360
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+364
ldr r1, .L7998+1364
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+368
ldr r3, .L7998+1368
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+372
ldr r1, .L7998+1372
str r3, [r0] @ float
ldr r1, [r1] @ float
ldr r0, .L7998+376
ldr r3, .L7998+1376
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+380
ldr r1, [r8] @ float
strb r3, [r0]
ldr r0, .L7998+384
ldr r3, .L7998+388
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+392
ldr r1, [r7]
strb r3, [r0]
ldr r0, .L7998+396
ldr r3, .L7998+1384
str r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+400
ldr r1, .L7998+1388
strb r3, [r0]
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+404
ldr r3, [r6] @ float
strb r1, [r0]
ldr r0, .L7998+408
ldr r1, .L7998+1392
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+412
ldr r3, .L7998+1396
strb r1, [r0]
ldr r3, [r3] @ float
ldr r1, .L7998+416
ldr r0, .L7998+420
str r3, [r1] @ float
ldr r3, .L7998+1400
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L7998+1404
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+424
ldr r1, .L7998+1408
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+428
ldr r3, .L7998+1412
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+432
ldr r1, .L7998+1416
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+436
ldr r3, .L7998+440
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+444
ldr r1, .L7998+448
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+452
ldr r3, .L7998+456
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+460
ldr r1, .L7998+464
str r3, [r0] @ float
ldr r1, [r1] @ float
ldr r0, .L7998+468
ldr r3, .L7998+472
str r1, [r0] @ float
ldr r3, [r3] @ float
ldr r0, .L7998+476
ldr r1, .L7998+480
str r3, [r0] @ float
ldr r1, [r1] @ float
ldr r0, .L7998+484
ldr r3, .L7998+488
str r1, [r0] @ float
ldr r3, [r3] @ float
ldr r0, .L7998+492
ldr r1, .L7998+496
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+500
ldr r3, .L7998+504
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+508
ldr r1, .L7998+512
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+516
ldr r3, .L7998+520
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r1, .L7998+524
ldr r0, .L7998+528
strb r3, [r1]
ldr r3, .L7998+532
ldr r1, [r3] @ float
ldr r3, .L7998+536
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+540
ldr r1, .L7998+544
strb r3, [r0]
ldr r1, [r1] @ float
ldr r0, .L7998+548
ldr r3, .L7998+552
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+556
ldr r1, .L7998+560
strb r3, [r0]
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+564
ldr r3, .L7998+568
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+572
ldr r1, .L7998+576
strb r3, [r0]
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+580
ldr r3, .L7998+584
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+588
ldr r1, .L7998+592
strb r3, [r0]
ldr r1, [r1] @ float
ldr r0, .L7998+596
ldr r3, .L7998+600
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+604
ldr r1, .L7998+608
strb r3, [r0]
ldr r1, [r1] @ float
ldr r0, .L7998+612
ldr r3, .L7998+616
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+620
ldr r1, .L7998+624
strb r3, [r0]
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+628
ldr r3, .L7998+632
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+636
ldr r1, .L7998+640
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+644
ldr r3, .L7998+648
strb r1, [r0]
ldr r3, [r3] @ float
ldr r1, .L7998+652
ldr r0, .L7998+656
str r3, [r1] @ float
ldr r3, .L7998+660
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L7998+664
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+668
ldr r1, .L7998+672
strb r3, [r0]
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+676
ldr r3, .L7998+680
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+684
ldr r1, .L7998+688
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+692
ldr r3, .L7998+696
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+700
ldr r1, .L7998+704
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+708
ldr r3, .L7998+712
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+716
ldr r1, .L7998+720
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+724
ldr r3, .L7998+728
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+732
ldr r1, .L7998+736
strb r3, [r0]
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+740
ldr r3, .L7998+744
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+748
ldr r1, .L7998+752
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+756
ldr r3, .L7998+760
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+764
ldr r1, .L7998+768
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+772
ldr r3, .L7998+776
strb r1, [r0]
ldr r3, [r3] @ float
ldr r1, .L7998+780
ldr r0, .L7998+784
str r3, [r1] @ float
ldr r3, .L7998+788
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L7998+792
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+796
ldr r1, .L7998+800
strb r3, [r0]
ldr r1, [r1] @ float
ldr r0, .L7998+804
ldr r3, .L7998+808
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+812
ldr r1, .L7998+816
strb r3, [r0]
ldr r1, [r1] @ float
ldr r0, .L7998+820
ldr r3, .L7998+824
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+828
ldr r1, .L7998+832
strb r3, [r0]
ldr r1, [r1] @ float
ldr r0, .L7998+836
ldr r3, .L7998+840
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+844
ldr r1, .L7998+848
strb r3, [r0]
ldr r1, [r1] @ float
ldr r0, .L7998+852
ldr r3, [r4] @ float
str r1, [r0] @ float
ldr r0, .L7998+856
ldr r1, .L7998+860
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+864
ldr r3, .L7998+868
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+872
ldr r1, .L7998+876
strb r3, [r0]
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+880
ldr r3, .L7998+884
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+888
ldr r1, .L7998+892
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+896
ldr r3, .L7998+900
strb r1, [r0]
ldr r3, [r3] @ float
ldr r1, .L7998+904
ldr r0, .L7998+908
str r3, [r1] @ float
ldr r3, .L7998+912
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L7998+916
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+920
ldr r1, .L7998+924
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+928
ldr r3, .L7998+932
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+936
ldr r1, .L7998+940
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+944
ldr r3, .L7998+948
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+952
ldr r1, .L7998+956
strb r3, [r0]
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+960
ldr r3, .L7998+964
strb r1, [r0]
ldr r3, [r3] @ float
ldr r0, .L7998+968
ldr r1, .L7998+972
str r3, [r0] @ float
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+976
ldr r3, .L7998+980
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+984
ldr r1, .L7998+988
strb r3, [r0]
ldr r1, [r1] @ float
ldr r0, .L7998+992
ldr r3, .L7998+996
str r1, [r0] @ float
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+1000
ldr r1, .L7998+1004
strb r3, [r0]
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+1008
ldr r3, .L7998+1012
strb r1, [r0]
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, .L7998+1016
ldr r1, .L7998+1020
strb r3, [r0]
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L7998+1024
ldr r3, .L7998+1028
strb r1, [r0]
ldr r3, [r3] @ float
ldr r1, .L7998+1032
ldr r0, .L7998+1036
str r3, [r1] @ float
ldr r3, .L7998+1040
ldr r1, .L7998+1044
ldrb r3, [r3] @ zero_extendqisi2
ldr ip, [sp, #8]
strb r3, [r0]
ldr r0, .L7998+1048
ldrb r1, [r1] @ zero_extendqisi2
strb ip, [r0]
ldr ip, .L7998+1052
ldrb r2, [r2] @ zero_extendqisi2
strb r1, [ip]
ldr r3, .L7998+1056
ldr ip, .L7998+1060
ldr r3, [r3] @ float
strb r2, [ip]
ldr r0, .L7998+1064
ldr ip, .L7998+1068
ldrb r0, [r0] @ zero_extendqisi2
str r3, [ip] @ float
ldr r1, .L7998+1072
ldr ip, .L7998+1076
ldrb r1, [r1] @ zero_extendqisi2
ldr r2, .L7998+1080
strb r0, [ip]
ldr r0, .L7998+1084
ldr r2, [r2] @ float
ldr r3, .L7998+1088
strb r1, [r0]
ldr r1, .L7998+1092
ldrb r3, [r3] @ zero_extendqisi2
str r2, [r1] @ float
ldr r2, .L7998+1096
strb r3, [r2]
beq .L4988
.L1724:
bl __VERIFIER_nondet_float
str r0, [r10] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1100
ldr r5, .L7998+1104
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1108
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1112
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1116
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1120
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7998+1124
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1128
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1132
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1136
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1140
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1144
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7998+1148
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1152
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1156
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1160
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7998+1164
str r0, [r3] @ float
bl __VERIFIER_nondet_float
str r0, [fp] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1168
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7998+1172
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1176
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1180
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1184
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1188
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7998+1192
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7998+1196
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1200
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7998+1204
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1208
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1212
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7998+1216
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1220
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7998+1224
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
strb r0, [r5]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1228
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1232
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7998+1236
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1240
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7998+1244
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1248
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1252
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1256
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1260
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7998+1264
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1268
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7998+1272
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7998+1276
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7998+1280
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1284
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1288
strb r0, [r3]
bl __VERIFIER_nondet_float
ldr r3, .L7998+1292
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7998+1296
str r0, [r3] @ float
bl __VERIFIER_nondet_float
ldr r3, .L7998+1300
str r0, [r3] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1304
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1308
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1312
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r3, .L7998+1316
strb r0, [r3]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r2, .L7998+1320
strb r0, [r2]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r2, .L7998+1324
strb r0, [r2]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L7998+1328
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L7998+1332
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L7998+1336
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L7998+1340
strb r0, [r1]
bl __VERIFIER_nondet_float
str r0, [r9] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L7998+1344
strb r0, [r1]
bl __VERIFIER_nondet_int
ldr r1, .L7998+1348
str r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L7998+1352
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L7998+1356
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L7998+1360
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L7998+1364
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L7998+1368
str r0, [r1] @ float
bl __VERIFIER_nondet_float
ldr r1, .L7998+1372
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L7998+1376
strb r0, [r1]
bl __VERIFIER_nondet_float
str r0, [r8] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L7998+1380
strb r0, [r1]
bl __VERIFIER_nondet_int
str r0, [r7]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L7998+1384
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L7998+1388
strb r0, [r1]
bl __VERIFIER_nondet_float
str r0, [r6] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L7998+1392
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L7998+1396
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L7998+1400
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L7998+1404
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L7998+1408
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L7998+1412
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L7998+1416
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+4
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+8
str r0, [r1] @ float
bl __VERIFIER_nondet_float
ldr r1, .L8001+12
str r0, [r1] @ float
bl __VERIFIER_nondet_float
ldr r1, .L8001+16
str r0, [r1] @ float
bl __VERIFIER_nondet_float
ldr r1, .L8001+20
str r0, [r1] @ float
bl __VERIFIER_nondet_float
ldr r1, .L8001+24
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+28
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+32
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+36
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+40
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+44
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+48
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+52
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+56
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+60
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+64
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+68
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+72
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+76
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+80
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+84
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+88
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+92
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+96
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+100
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+104
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+108
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+112
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+116
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+120
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+124
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+128
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+132
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+136
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+140
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+144
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+148
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+152
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+156
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+160
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+164
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+168
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+172
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+176
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+180
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+184
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+188
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+192
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+196
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+200
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+204
str r0, [r1] @ float
bl __VERIFIER_nondet_float
str r0, [r4] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+208
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+212
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+216
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+220
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+224
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+228
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+232
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+236
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+240
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+244
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+248
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+252
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+256
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+260
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+264
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+268
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+272
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+276
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+280
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+284
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+288
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+292
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+296
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+300
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+304
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+308
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+312
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+316
strb r0, [r1]
bl __VERIFIER_nondet_float
ldr r1, .L8001+320
str r0, [r1] @ float
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
ldr r1, .L8001+324
strb r0, [r1]
bl __VERIFIER_nondet_int
subs r3, r0, #0
movne r3, #1
ldr r1, .L8001+328
ldrb r5, [r5] @ zero_extendqisi2
str r3, [sp, #8]
strb r3, [r1]
ldr r3, .L8001+332
cmp r5, #0
ldrb r3, [r3] @ zero_extendqisi2
str r0, [sp]
beq .L7712
cmp r3, #0
movne r2, #0
bne .L95
b .L94
.L24:
cmp r3, #0
beq .L25
.L4988:
mov r0, #0
add sp, sp, #348
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L8:
ldr r3, .L8001+336
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L4988
b .L9
.L7667:
mov r2, #0
b .L95
.L99:
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r3, .L8001+340
ldr r2, .L8001+336
ldr r1, .L8001+344
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r3, r2
orrs r2, r2, r1
beq .L95
b .L102
.L104:
ldr r3, .L8001+348
ldr r1, [sp, #16] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #32] @ float
str r3, [sp, #40]
bl __aeabi_fcmpeq
ldr r3, [sp, #40]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
beq .L105
.L106:
ldr r3, .L8001+340
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
bne .L110
ldr r3, .L8001+336
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L109
ldr r3, .L8001+344
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L109
ldr r3, .L8001+352
ldr r0, [sp, #20] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L109
ldr r3, .L8001+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2458
ldr r3, [sp, #12]
cmp r3, #0
bne .L2458
.L7631:
str r3, [sp, #40]
.L3036:
ldr r3, .L8001+356
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #24]
orrs r2, r3, r2
str r2, [sp, #64]
bne .L117
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L117
ldr r2, .L8001+344
ldr r3, .L8001+336
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #40]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #64]
str r3, [sp, #40]
bne .L95
ldr r3, .L8001+352
ldr r0, [sp, #20] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L124
.L3033:
mov r1, #0
ldr r0, [sp, #32] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #64] @ float
ldr r0, [sp, #20] @ float
str r3, [sp, #72]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #32]
b .L128
.L140:
ldr r3, [sp, #32]
cmp r3, #0
bne .L145
ldr r3, [sp, #24]
cmp r3, #0
bne .L3025
.L146:
ldr r3, [sp, #20]
cmp r3, #0
bne .L150
.L3026:
ldr r3, .L8001+336
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L149
ldr r3, .L8001+344
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #20]
beq .L151
b .L149
.L7669:
ldr r3, .L8001+352
ldr r0, [sp, #20] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L119
.L2458:
ldr r3, .L8001+336
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
beq .L123
ldr r3, .L8001+344
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
beq .L124
mov r3, #0
str r3, [sp, #40]
.L123:
ldr r3, [sp, #12]
cmp r3, #0
bne .L2457
.L124:
mov r1, #0
ldr r0, [sp, #32] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #64] @ float
ldr r0, [sp, #20] @ float
str r3, [sp, #72]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #72]
str r2, [sp, #32]
ands r3, r2, r3
beq .L128
ldr r2, .L8001+64
str r3, [sp, #72]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #32]
cmp r2, #0
bne .L128
b .L129
.L110:
ldr r3, [sp, #12]
cmp r3, #0
bne .L2461
ldr r3, .L8001+64
ldr r2, [sp, #24]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7713
.L2461:
ldr r3, .L8001+336
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8001+344
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L7714
.L114:
ldr r3, .L8001+352
ldr r0, [sp, #20] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L123
.L119:
ldr r3, [sp, #12]
cmp r3, #0
beq .L3033
.L2457:
ldr r3, .L8001+64
ldr r2, [sp, #24]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L124
ldr r3, .L8001+356
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L125
.L3034:
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L125
ldr r3, .L8001+336
ldr r2, .L8001+344
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #40]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #40]
bne .L95
.L125:
mov r1, #0
ldr r0, [sp, #32] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #64] @ float
ldr r0, [sp, #20] @ float
str r3, [sp, #72]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #72]
str r2, [sp, #32]
ands r3, r2, r3
beq .L128
str r3, [sp, #72]
str r3, [sp, #32]
b .L129
.L135:
ldr r3, [sp, #40]
cmp r3, #0
strne r3, [sp, #20]
bne .L2446
.L2445:
ldr r3, .L8001+336
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #20]
movne r3, #0
strne r3, [sp, #20]
bne .L3028
.L2446:
ldr r3, .L8001+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L139
ldr r3, .L8001+356
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L140
ldr r3, [sp, #24]
cmp r3, #0
bne .L141
ldr r0, .L8001+436
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L142
ldr r1, .L8001+336
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8001+344
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #20]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #24]
str r1, [sp, #20]
bne .L95
ldr r3, [sp, #32]
cmp r3, #0
beq .L3026
.L1879:
ldr r3, [sp, #12]
cmp r3, #0
beq .L146
.L1878:
ldr r3, .L8001+348
ldr r1, [sp, #16] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #72]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
beq .L144
b .L146
.L150:
ldr r3, [sp, #12]
cmp r3, #0
beq .L2441
ldr r3, [sp, #24]
cmp r3, #0
bne .L7715
ldr r3, .L8001+336
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8001+344
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L154
.L3231:
ldr r3, .L8001+348
ldr r1, [sp, #76] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L154
b .L151
.L7714:
ldr r3, .L8001+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L115
ldr r3, [sp, #12]
cmp r3, #0
beq .L3036
ldr r3, .L8001+352
ldr r0, [sp, #20] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1881
.L1880:
ldr r3, [sp, #40]
cmp r3, #0
beq .L2458
.L121:
ldr r3, .L8001+344
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L123
ldr r3, .L8001+336
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L124
b .L123
.L155:
cmp r3, #0
movne r2, #0
bne .L95
b .L156
.L115:
ldr r3, .L8001+352
ldr r0, [sp, #20] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L119
b .L1880
.L7668:
ldr r3, .L8001+64
ldr r2, [sp, #24]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7716
cmp r3, #0
str r3, [sp, #40]
beq .L115
ldr r3, [sp, #12]
b .L7631
.L153:
ldr r3, [sp, #20]
cmp r3, #0
beq .L154
.L2441:
ldr r3, .L8001+336
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8001+344
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L151
b .L3231
.L7672:
ldr r3, .L8001+344
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L131
ldr r3, .L8001+336
ldr r2, [sp, #40]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #20]
bne .L131
ldr r3, .L8001+348
ldr r0, [sp, #16] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L133
.L134:
ldr r3, [sp, #12]
cmp r3, #0
streq r3, [sp, #40]
beq .L3233
b .L2445
.L7671:
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #20]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L129
ldr r2, .L8001+344
ldr r3, .L8001+336
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #40]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #20]
bne .L95
ldr r3, .L8001+360
ldr r3, [r3] @ float
str r3, [sp, #76] @ float
b .L134
.L139:
ldr r3, [sp, #32]
cmp r3, #0
beq .L144
.L2443:
ldr r3, [sp, #12]
cmp r3, #0
beq .L1878
b .L144
.L117:
ldr r3, .L8001+352
ldr r0, [sp, #20] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1880
b .L2452
.L7674:
ldr r3, [sp, #24]
cmp r3, #0
ldreq r3, [sp, #24]
streq r3, [sp, #20]
beq .L154
ldr r3, .L8001+64
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8001+356
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #20]
beq .L3232
mov r3, #0
str r3, [sp, #20]
b .L154
.L7675:
ldr r3, .L8001+356
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #12]
bne .L154
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L154
ldr r3, .L8001+336
ldr r2, [sp, #12]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8001+344
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #20]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #20]
bne .L95
b .L154
.L7676:
mov r2, #0
b .L95
.L7716:
ldr r3, .L8001+356
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
beq .L3235
.L113:
ldr r3, .L8001+352
ldr r0, [sp, #20] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #40]
beq .L3033
b .L2458
.L7713:
ldr r3, .L8001+356
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L3235
.L2460:
ldr r3, .L8001+336
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8001+344
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L114
ldr r3, .L8001+352
ldr r0, [sp, #20] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L3033
b .L121
.L3235:
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L112
ldr r3, .L8001+336
ldr r2, .L8001+344
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #40]
orrs r3, r2, r3
movne r2, #0
bne .L95
b .L113
.L160:
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8001+392
ldr r3, .L8001+364
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8001+396
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
b .L163
.L7673:
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #64]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L136
ldr r2, .L8001+344
ldr r3, .L8001+336
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #40]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #64]
str r3, [sp, #20]
bne .L95
ldr r3, [sp, #32]
cmp r3, #0
bne .L3027
b .L3026
.L141:
ldr r3, [sp, #32]
cmp r3, #0
bne .L145
b .L146
.L7715:
ldr r3, .L8001+64
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8001+356
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2441
.L3232:
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L153
ldr r3, .L8001+336
ldr r2, .L8001+344
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #20]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #20]
bne .L95
b .L154
.L112:
ldr r3, [sp, #40]
cmp r3, #0
bne .L2460
b .L113
.L7670:
ldr r3, .L8001+356
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L3033
b .L3034
.L142:
ldr r3, [sp, #32]
cmp r3, #0
bne .L1879
b .L146
.L8002:
.align 2
.L8001:
.word _x_s3_backoff
.word _x_s0_l1
.word _x_s2_backoff
.word _x_s1_x
.word _x_s6_x
.word _x_s1_backoff
.word _x_s1_lambda
.word _x_s2_l0
.word _x_s5_lambda
.word _x_s1_evt0
.word _x_s2_l1
.word _x_s5_backoff
.word _x_s1_evt1
.word _x_s13_x
.word _x_s1_evt2
.word _x_s4_evt2
.word _x_s19_l1
.word _x_bus_l1
.word _x_s9_evt0
.word _x_s2_x
.word _x_s3_l0
.word _x_s6_lambda
.word _x_s6_evt0
.word _x_s6_evt1
.word _x_s7_x
.word _x_s4_l0
.word _x_s7_lambda
.word _x_s7_evt0
.word _x_s7_evt1
.word _x_s7_evt2
.word _x_s8_x
.word _x_s5_l1
.word _x_s8_backoff
.word _x_s5_l0
.word _x_s8_lambda
.word _x_s8_evt0
.word _x_s8_evt1
.word _x_s8_evt2
.word _x_s9_x
.word _x_s6_l1
.word _x_s9_backoff
.word _x_s6_l0
.word _x_s9_lambda
.word _x_s9_evt1
.word _x_s9_evt2
.word _x_s12_lambda
.word _x_s9_l0
.word _x_s10_x
.word _x_s7_l1
.word _x_s10_backoff
.word _x_s7_l0
.word _x_s10_lambda
.word _x_s10_evt0
.word _x_s10_evt1
.word _x_s10_evt2
.word _x_s13_lambda
.word _x_s10_l0
.word _x_s11_x
.word _x_s8_l1
.word _x_s11_backoff
.word _x_s8_l0
.word _x_s11_lambda
.word _x_s11_evt0
.word _x_s11_evt1
.word _x_s11_evt2
.word _x_s14_lambda
.word _x_s11_l0
.word _x_s9_l1
.word _x_s12_backoff
.word _x_s12_evt0
.word _x_s12_evt1
.word _x_s12_evt2
.word _x_s10_l1
.word _x_s13_backoff
.word _x_s13_evt0
.word _x_s13_evt1
.word _x_s13_evt2
.word _x_s16_lambda
.word _x_s13_l0
.word _x_s11_l1
.word _x_s14_backoff
.word _x_s14_evt0
.word _x_s14_evt1
.word _x_s19_evt0
.word s19_evt0
.word s19_evt2
.word s19_evt1
.word s19_backoff
.word s19_lambda
.word s19_l1
.word s19_x
.word s18_evt2
.word s18_backoff
.word s18_x
.word s18_lambda
.word _x_s18_l1
.word s17_backoff
.word s17_evt2
.word s18_evt0
.word s18_evt1
.word s18_l1
.word s17_lambda
.word _x_s17_l1
.word s17_l1
.word s17_evt0
.word s17_evt1
.word _x_s14_l1
.word _x_s15_l1
.word s15_l1
.word delta
.word s15_evt0
.word s15_evt1
.L165:
ldr r3, .L8001+368
ldr r1, [sp, #64] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #32] @ float
str r3, [sp, #24]
bl __aeabi_fcmpeq
ldr r3, [sp, #24]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
beq .L166
.L167:
ldr r3, .L8001+364
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #24]
bne .L171
ldr r3, .L8001+392
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L170
ldr r3, .L8001+396
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L170
ldr r3, .L8001+376
ldr r0, [sp, #12] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #48] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L170
ldr r3, .L8001+380
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2433
ldr r3, [sp, #16]
cmp r3, #0
bne .L2433
.L7632:
str r3, [sp, #24]
.L3015:
ldr r3, .L8001+400
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #40]
orrs r2, r3, r2
str r2, [sp, #48]
bne .L178
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L178
ldr r2, .L8001+396
ldr r3, .L8001+392
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #24]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #48]
str r3, [sp, #24]
bne .L95
ldr r3, .L8001+376
ldr r0, [sp, #12] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #48] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L185
.L3012:
mov r1, #0
ldr r0, [sp, #32] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #48] @ float
ldr r0, [sp, #12] @ float
str r3, [sp, #56]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #32]
b .L189
.L201:
ldr r3, [sp, #32]
cmp r3, #0
bne .L206
ldr r3, [sp, #40]
cmp r3, #0
bne .L3004
.L207:
ldr r3, [sp, #12]
cmp r3, #0
bne .L211
.L3005:
ldr r3, .L8001+392
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L210
ldr r3, .L8001+396
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #12]
beq .L212
b .L210
.L171:
ldr r3, [sp, #16]
cmp r3, #0
bne .L2436
ldr r3, .L8001+380
ldr r2, [sp, #40]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7717
.L2436:
ldr r3, .L8001+392
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8001+396
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L7718
.L175:
ldr r3, .L8001+376
ldr r0, [sp, #12] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #48] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L184
.L180:
ldr r3, [sp, #16]
cmp r3, #0
beq .L3012
.L2432:
ldr r3, .L8001+380
ldr r2, [sp, #40]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7719
.L185:
mov r1, #0
ldr r0, [sp, #32] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #48] @ float
ldr r0, [sp, #12] @ float
str r3, [sp, #56]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #56]
str r2, [sp, #32]
ands r3, r2, r3
beq .L189
ldr r2, .L8001+380
str r3, [sp, #56]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #32]
cmp r2, #0
bne .L189
b .L190
.L211:
ldr r3, [sp, #16]
cmp r3, #0
beq .L2416
ldr r3, [sp, #40]
cmp r3, #0
bne .L7720
ldr r3, .L8001+392
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8001+396
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L215
.L3226:
ldr r3, .L8001+368
ldr r1, [sp, #72] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L215
b .L212
.L196:
ldr r3, [sp, #24]
cmp r3, #0
strne r3, [sp, #12]
beq .L2420
.L2421:
ldr r3, .L8001+380
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L200
ldr r3, .L8001+400
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L201
ldr r3, [sp, #40]
cmp r3, #0
bne .L202
ldr r0, .L8001+436
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L203
ldr r1, .L8001+392
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8001+396
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #12]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #40]
str r1, [sp, #12]
bne .L95
ldr r3, [sp, #32]
cmp r3, #0
beq .L3005
.L1872:
ldr r3, [sp, #16]
cmp r3, #0
beq .L207
.L1871:
ldr r3, .L8001+368
ldr r1, [sp, #64] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #56]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
beq .L205
b .L207
.L7721:
ldr r3, .L8001+400
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #24]
bne .L174
.L3230:
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L173
ldr r3, .L8001+392
ldr r2, .L8001+396
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #24]
orrs r3, r2, r3
movne r2, #0
bne .L95
.L174:
ldr r3, .L8001+376
ldr r0, [sp, #12] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #48] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #24]
beq .L3012
.L2433:
ldr r3, .L8001+392
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #24]
beq .L184
ldr r3, .L8001+396
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #24]
beq .L185
mov r3, #0
str r3, [sp, #24]
.L184:
ldr r3, [sp, #16]
cmp r3, #0
beq .L185
b .L2432
.L7718:
ldr r3, .L8001+380
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L176
ldr r3, [sp, #16]
cmp r3, #0
beq .L3015
ldr r3, .L8001+376
ldr r0, [sp, #12] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #48] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1874
.L1873:
ldr r3, [sp, #24]
cmp r3, #0
beq .L2433
.L182:
ldr r3, .L8001+396
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L184
ldr r3, .L8001+392
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L185
b .L184
.L7683:
ldr r3, [sp, #40]
cmp r3, #0
ldreq r3, [sp, #40]
streq r3, [sp, #12]
beq .L215
ldr r3, .L8001+380
ldr r2, .L8001+400
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orrs r3, r3, r2
str r3, [sp, #12]
movne r3, #0
strne r3, [sp, #12]
bne .L215
.L3227:
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L214
ldr r3, .L8001+392
ldr r2, .L8001+396
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #12]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #12]
bne .L95
b .L215
.L176:
ldr r3, .L8001+376
ldr r0, [sp, #12] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #48] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L180
b .L1873
.L7681:
ldr r3, .L8001+396
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L192
ldr r3, .L8001+392
ldr r2, [sp, #24]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #12]
bne .L192
ldr r3, .L8001+368
ldr r0, [sp, #64] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L194
.L195:
ldr r3, [sp, #16]
cmp r3, #0
streq r3, [sp, #24]
beq .L3228
.L2420:
ldr r3, .L8001+392
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #12]
movne r3, #0
strne r3, [sp, #12]
bne .L3007
b .L2421
.L7680:
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #12]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L190
ldr r2, .L8001+396
ldr r3, .L8001+392
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #24]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #12]
bne .L95
ldr r3, .L8001+372
ldr r3, [r3] @ float
str r3, [sp, #72] @ float
b .L195
.L200:
ldr r3, [sp, #32]
cmp r3, #0
beq .L205
.L2418:
ldr r3, [sp, #16]
cmp r3, #0
beq .L1871
b .L205
.L214:
ldr r3, [sp, #12]
cmp r3, #0
beq .L215
.L2416:
ldr r3, .L8001+392
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8001+396
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L212
b .L3226
.L178:
ldr r3, .L8001+376
ldr r0, [sp, #12] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #48] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1873
b .L2427
.L216:
cmp r3, #0
movne r2, #0
bne .L95
b .L217
.L7677:
ldr r3, .L8001+380
ldr r2, [sp, #40]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7721
cmp r3, #0
str r3, [sp, #24]
beq .L176
ldr r3, [sp, #16]
b .L7632
.L12:
cmp r3, #0
bne .L4988
b .L13
.L7684:
ldr r3, .L8001+400
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #16]
bne .L215
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L215
ldr r2, .L8001+396
ldr r3, .L8001+392
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #12]
orr r3, r3, r1
orr r3, r2, r3
ands r3, r3, #255
ldr r2, [sp, #16]
str r3, [sp, #12]
bne .L95
b .L215
.L7678:
ldr r3, .L8001+376
ldr r0, [sp, #12] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #48] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L180
b .L2433
.L20:
cmp r3, #0
bne .L4988
b .L21
.L16:
cmp r3, #0
bne .L4988
b .L17
.L203:
ldr r3, [sp, #32]
cmp r3, #0
beq .L207
b .L1872
.L202:
ldr r3, [sp, #32]
cmp r3, #0
bne .L206
b .L207
.L7717:
ldr r3, .L8001+400
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L3230
.L2435:
ldr r3, .L8001+392
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8001+396
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L175
ldr r3, .L8001+376
ldr r0, [sp, #12] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #48] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L3012
b .L182
.L7720:
ldr r3, .L8001+380
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8001+400
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2416
b .L3227
.L226:
ldr r3, .L8001+384
ldr r1, [sp, #72] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #40] @ float
str r3, [sp, #24]
bl __aeabi_fcmpeq
ldr r3, [sp, #24]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
beq .L227
.L228:
ldr r3, .L8001+388
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #24]
bne .L232
ldr r3, .L8001+416
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L231
ldr r3, .L8001+420
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L231
ldr r3, .L8001+404
ldr r0, [sp, #16] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #56] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L231
ldr r3, .L8001+408
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2408
ldr r3, [sp, #32]
cmp r3, #0
bne .L2408
.L7633:
str r3, [sp, #24]
.L2994:
ldr r3, .L8001+412
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #48]
orrs r2, r3, r2
str r2, [sp, #56]
bne .L239
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L239
ldr r2, .L8001+420
ldr r3, .L8001+416
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #24]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #56]
str r3, [sp, #24]
bne .L95
ldr r3, .L8001+404
ldr r0, [sp, #16] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #56] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L246
.L2991:
mov r1, #0
ldr r0, [sp, #40] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #56] @ float
ldr r0, [sp, #16] @ float
str r3, [sp, #64]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #40]
b .L250
.L221:
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8001+416
ldr r3, .L8001+388
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8001+420
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
b .L224
.L246:
mov r1, #0
ldr r0, [sp, #40] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #56] @ float
ldr r0, [sp, #16] @ float
str r3, [sp, #64]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #64]
str r2, [sp, #40]
ands r3, r3, r2
beq .L250
ldr r2, .L8001+408
str r3, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #40]
cmp r2, #0
bne .L250
b .L251
.L239:
ldr r3, .L8001+404
ldr r0, [sp, #16] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #56] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L2402
.L1866:
ldr r3, [sp, #24]
cmp r3, #0
beq .L2408
.L243:
ldr r3, .L8001+420
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L245
ldr r3, .L8001+416
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L246
.L245:
ldr r3, [sp, #32]
cmp r3, #0
beq .L246
.L2407:
ldr r3, .L8001+408
ldr r2, [sp, #48]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L246
ldr r3, .L8001+412
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L247
.L2992:
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L247
ldr r3, .L8001+416
ldr r2, .L8001+420
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #24]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #24]
bne .L95
.L247:
mov r1, #0
ldr r0, [sp, #40] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #56] @ float
ldr r0, [sp, #16] @ float
str r3, [sp, #64]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #64]
str r2, [sp, #40]
ands r3, r3, r2
beq .L250
str r3, [sp, #64]
str r3, [sp, #40]
b .L251
.L232:
ldr r3, [sp, #32]
cmp r3, #0
bne .L2411
ldr r3, .L8001+408
ldr r2, [sp, #48]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7722
.L2411:
ldr r3, .L8001+416
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8001+420
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L7723
.L236:
ldr r3, .L8001+404
ldr r0, [sp, #16] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #56] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L245
.L241:
ldr r3, [sp, #32]
cmp r3, #0
beq .L2991
b .L2407
.L7722:
ldr r3, .L8001+412
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L3225
.L2410:
ldr r3, .L8001+416
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8001+420
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L236
ldr r3, .L8001+404
ldr r0, [sp, #16] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #56] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L2991
b .L243
.L7723:
ldr r3, .L8001+408
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L237
ldr r3, [sp, #32]
cmp r3, #0
beq .L2994
ldr r3, .L8001+404
ldr r0, [sp, #16] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #56] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1869
b .L1866
.L7724:
ldr r3, .L8001+412
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #24]
bne .L235
.L3225:
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L234
ldr r3, .L8001+416
ldr r2, .L8001+420
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #24]
orrs r3, r2, r3
movne r2, #0
bne .L95
.L235:
ldr r3, .L8001+404
ldr r0, [sp, #16] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #56] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #24]
beq .L2991
.L2408:
ldr r3, .L8001+416
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #24]
beq .L245
ldr r3, .L8001+420
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #24]
beq .L246
mov r3, #0
str r3, [sp, #24]
b .L245
.L234:
ldr r3, [sp, #24]
cmp r3, #0
bne .L2410
b .L235
.L237:
ldr r3, .L8001+404
ldr r0, [sp, #16] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #56] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L241
b .L1866
.L7719:
ldr r3, .L8001+400
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L186
.L3013:
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L186
ldr r3, .L8001+392
ldr r2, .L8001+396
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #24]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #24]
bne .L95
.L186:
mov r1, #0
ldr r0, [sp, #32] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #48] @ float
ldr r0, [sp, #12] @ float
str r3, [sp, #56]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #56]
str r2, [sp, #32]
ands r3, r2, r3
beq .L189
str r3, [sp, #56]
str r3, [sp, #32]
b .L190
.L7679:
ldr r3, .L8001+400
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L3012
b .L3013
.L7685:
mov r2, #0
b .L95
.L7686:
ldr r3, .L8001+408
ldr r2, [sp, #48]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7724
cmp r3, #0
str r3, [sp, #24]
beq .L237
ldr r3, [sp, #32]
b .L7633
.L7687:
ldr r3, .L8001+404
ldr r0, [sp, #16] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #56] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L241
b .L2408
.L7691:
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #56]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L258
ldr r2, .L8001+420
ldr r3, .L8001+416
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #24]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #56]
str r3, [sp, #16]
bne .L95
ldr r3, [sp, #40]
cmp r3, #0
bne .L2985
.L2984:
ldr r3, .L8001+416
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L271
ldr r3, .L8001+420
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #16]
bne .L271
.L273:
ldr r3, .L8001+408
ldr r2, [sp, #84]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #80]
orrs r3, r2, r3
bne .L276
ldr r3, .L8001+412
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #24]
bne .L276
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L276
ldr r3, .L8001+416
ldr r2, [sp, #24]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8001+420
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #16]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #16]
bne .L95
b .L276
.L173:
ldr r3, [sp, #24]
cmp r3, #0
bne .L2435
b .L174
.L401:
ldr r3, .L8001+424
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1849
mov r2, #0
b .L95
.L399:
cmp r3, #0
movne r2, #0
bne .L95
b .L400
.L7710:
ldr r3, .L8001+432
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #40]
bne .L398
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L398
ldr r3, .L8001+440
ldr r2, [sp, #40]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8001+444
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #32]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #32]
bne .L95
b .L398
.L7709:
ldr r3, [sp, #64]
cmp r3, #0
ldreq r3, [sp, #64]
streq r3, [sp, #32]
beq .L398
ldr r3, .L8001+428
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8001+432
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #32]
beq .L3212
mov r3, #0
str r3, [sp, #32]
b .L398
.L36:
cmp r3, #0
bne .L4988
b .L37
.L28:
cmp r3, #0
bne .L4988
b .L29
.L32:
cmp r3, #0
bne .L4988
b .L33
.L7735:
ldr r3, .L8001+428
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8001+432
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2341
.L3212:
ldr r3, .L8001+436
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L397
ldr r3, .L8001+440
ldr r2, .L8001+444
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #32]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #32]
bne .L95
b .L398
.L68:
cmp r3, #0
bne .L4988
b .L69
.L52:
cmp r3, #0
bne .L4988
b .L53
.L48:
cmp r3, #0
bne .L4988
b .L49
.L44:
cmp r3, #0
bne .L4988
b .L45
.L40:
cmp r3, #0
bne .L4988
b .L41
.L60:
cmp r3, #0
bne .L4988
b .L61
.L56:
cmp r3, #0
bne .L4988
b .L57
.L64:
cmp r3, #0
bne .L4988
b .L65
.L397:
ldr r3, [sp, #32]
cmp r3, #0
beq .L398
.L2341:
ldr r3, .L8003+84
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8003+88
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L395
.L3211:
ldr r3, .L8003+68
ldr r1, [sp, #84] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L398
b .L395
.L324:
ldr r3, [sp, #48]
cmp r3, #0
beq .L329
.L328:
ldr r3, [sp, #40]
cmp r3, #0
bne .L1857
.L327:
ldr r3, [sp, #56]
cmp r3, #0
beq .L329
ldr r3, .L8003
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L329
.L2962:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L329
ldr r3, .L8003+4
ldr r2, .L8003+8
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #24]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
b .L332
.L323:
ldr r3, [sp, #48]
cmp r3, #0
bne .L328
ldr r3, [sp, #56]
cmp r3, #0
bne .L2962
.L329:
ldr r3, [sp, #24]
cmp r3, #0
beq .L2963
ldr r3, [sp, #40]
cmp r3, #0
beq .L2366
ldr r3, [sp, #56]
cmp r3, #0
bne .L7725
ldr r3, .L8003+4
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8003+8
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L337
.L3216:
ldr r3, .L8003+12
ldr r1, [sp, #80] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L337
.L334:
ldr r3, .L8003+16
ldr r2, [sp, #88]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #84]
orrs r3, r2, r3
bne .L337
ldr r3, .L8003
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #32]
bne .L337
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L337
ldr r3, .L8003+4
ldr r2, [sp, #32]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8003+8
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #24]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #24]
bne .L95
b .L337
.L7725:
ldr r3, .L8003+16
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8003
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L3217
.L2366:
ldr r3, .L8003+4
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8003+8
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L334
b .L3216
.L3217:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L336
ldr r3, .L8003+4
ldr r2, .L8003+8
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #24]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #24]
bne .L95
b .L337
.L322:
ldr r3, [sp, #48]
cmp r3, #0
beq .L327
.L2368:
ldr r3, [sp, #40]
cmp r3, #0
bne .L327
.L1857:
ldr r3, .L8003+12
ldr r1, [sp, #76] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #72]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
beq .L327
b .L329
.L336:
ldr r3, [sp, #24]
cmp r3, #0
beq .L337
b .L2366
.L321:
ldr r3, [sp, #48]
cmp r3, #0
beq .L327
.L2964:
ldr r3, .L8003+16
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L328
b .L2368
.L318:
ldr r3, [sp, #32]
cmp r3, #0
strne r3, [sp, #24]
bne .L2371
.L2370:
ldr r3, .L8003+4
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #24]
movne r3, #0
strne r3, [sp, #24]
bne .L2965
b .L2371
.L7698:
ldr r3, .L8003+8
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L314
ldr r3, .L8003+4
ldr r2, [sp, #32]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #24]
bne .L314
ldr r3, .L8003+12
ldr r0, [sp, #76] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L316
.L317:
ldr r3, [sp, #40]
cmp r3, #0
streq r3, [sp, #32]
beq .L3218
b .L2370
.L7697:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #24]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L312
ldr r2, .L8003+8
ldr r3, .L8003+4
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #32]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #24]
bne .L95
ldr r3, .L8003+20
ldr r3, [r3] @ float
str r3, [sp, #80] @ float
b .L317
.L257:
ldr r3, [sp, #24]
cmp r3, #0
strne r3, [sp, #16]
beq .L2395
.L2396:
ldr r3, .L8003+24
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L261
ldr r3, .L8003+28
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L262
ldr r3, [sp, #48]
cmp r3, #0
bne .L263
ldr r0, .L8003+228
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L264
ldr r1, .L8003+32
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8003+36
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #16]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #48]
str r1, [sp, #16]
bne .L95
ldr r3, [sp, #40]
cmp r3, #0
beq .L2984
.L1865:
ldr r3, [sp, #32]
cmp r3, #0
bne .L1864
.L268:
ldr r3, [sp, #16]
cmp r3, #0
beq .L2984
ldr r3, [sp, #32]
cmp r3, #0
beq .L2391
ldr r3, [sp, #48]
cmp r3, #0
bne .L7726
ldr r3, .L8003+32
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8003+36
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L276
.L3221:
ldr r3, .L8003+40
ldr r1, [sp, #76] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L276
b .L273
.L264:
ldr r3, [sp, #40]
cmp r3, #0
bne .L1865
b .L268
.L263:
ldr r3, [sp, #40]
cmp r3, #0
bne .L267
b .L268
.L262:
ldr r3, [sp, #40]
cmp r3, #0
bne .L267
ldr r3, [sp, #48]
cmp r3, #0
beq .L268
b .L2983
.L261:
ldr r3, [sp, #40]
cmp r3, #0
beq .L266
.L2393:
ldr r3, [sp, #32]
cmp r3, #0
bne .L266
.L1864:
ldr r3, .L8003+40
ldr r1, [sp, #72] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #64]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
beq .L266
b .L268
.L7726:
ldr r3, .L8003+24
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8003+28
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2391
.L3222:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L275
ldr r3, .L8003+32
ldr r2, .L8003+36
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #16]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #16]
bne .L95
b .L276
.L275:
ldr r3, [sp, #16]
cmp r3, #0
beq .L276
.L2391:
ldr r3, .L8003+32
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8003+36
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L273
b .L3221
.L7692:
ldr r3, .L8003+24
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8003+28
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #16]
movne r3, #0
strne r3, [sp, #16]
bne .L276
b .L3222
.L277:
cmp r3, #0
movne r2, #0
bne .L95
b .L278
.L7693:
mov r2, #0
b .L95
.L7696:
ldr r3, .L8003
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2970
.L2971:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L308
ldr r3, .L8003+4
ldr r2, .L8003+8
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #32]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #32]
bne .L95
.L308:
mov r1, #0
ldr r0, [sp, #48] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #64] @ float
ldr r0, [sp, #24] @ float
str r3, [sp, #72]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #72]
str r2, [sp, #48]
ands r3, r2, r3
beq .L311
str r3, [sp, #72]
str r3, [sp, #48]
b .L312
.L7694:
ldr r3, .L8003+16
ldr r2, [sp, #56]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7727
cmp r3, #0
str r3, [sp, #32]
beq .L298
ldr r3, [sp, #40]
.L7634:
str r3, [sp, #32]
.L2973:
ldr r3, .L8003
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #56]
orrs r2, r3, r2
str r2, [sp, #64]
bne .L300
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L300
ldr r2, .L8003+8
ldr r3, .L8003+4
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #32]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #64]
str r3, [sp, #32]
bne .L95
ldr r3, .L8003+44
ldr r0, [sp, #24] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L307
.L2970:
mov r1, #0
ldr r0, [sp, #48] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #64] @ float
ldr r0, [sp, #24] @ float
str r3, [sp, #72]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #48]
b .L311
.L287:
ldr r3, .L8003+12
ldr r1, [sp, #76] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #48] @ float
str r3, [sp, #32]
bl __aeabi_fcmpeq
ldr r3, [sp, #32]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
beq .L288
.L289:
ldr r3, .L8003+48
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #32]
bne .L293
ldr r3, .L8003+4
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L292
ldr r3, .L8003+8
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L292
ldr r3, .L8003+44
ldr r0, [sp, #24] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L292
ldr r3, .L8003+16
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2383
ldr r3, [sp, #40]
cmp r3, #0
beq .L7634
.L2383:
ldr r3, .L8003+4
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #32]
beq .L306
ldr r3, .L8003+8
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #32]
beq .L307
mov r3, #0
str r3, [sp, #32]
.L306:
ldr r3, [sp, #40]
cmp r3, #0
beq .L307
.L2382:
ldr r3, .L8003+16
ldr r2, [sp, #56]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7728
.L307:
mov r1, #0
ldr r0, [sp, #48] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #64] @ float
ldr r0, [sp, #24] @ float
str r3, [sp, #72]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #72]
str r2, [sp, #48]
ands r3, r3, r2
beq .L311
ldr r2, .L8003+16
str r3, [sp, #72]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #48]
cmp r2, #0
bne .L311
b .L312
.L7728:
ldr r3, .L8003
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L308
b .L2971
.L7695:
ldr r3, .L8003+44
ldr r0, [sp, #24] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L2383
.L302:
ldr r3, [sp, #40]
cmp r3, #0
beq .L2970
b .L2382
.L7689:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #16]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L251
ldr r2, .L8003+36
ldr r3, .L8003+32
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #24]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #16]
bne .L95
ldr r3, .L8003+52
ldr r3, [r3] @ float
str r3, [sp, #76] @ float
.L256:
ldr r3, [sp, #32]
cmp r3, #0
streq r3, [sp, #24]
beq .L3223
.L2395:
ldr r3, .L8003+32
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #16]
movne r3, #0
strne r3, [sp, #16]
bne .L2986
b .L2396
.L7688:
ldr r3, .L8003+28
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2991
b .L2992
.L293:
ldr r3, [sp, #40]
cmp r3, #0
bne .L2386
ldr r3, .L8003+16
ldr r2, [sp, #56]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7729
.L2386:
ldr r3, .L8003+4
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8003+8
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L7730
.L297:
ldr r3, .L8003+44
ldr r0, [sp, #24] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L306
b .L302
.L7729:
ldr r3, .L8003
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L3220
.L2385:
ldr r3, .L8003+8
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8003+4
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L297
ldr r3, .L8003+44
ldr r0, [sp, #24] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L2970
.L304:
ldr r3, .L8003+8
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L306
ldr r3, .L8003+4
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L307
b .L306
.L7730:
ldr r3, .L8003+16
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L298
ldr r3, [sp, #40]
cmp r3, #0
beq .L2973
ldr r3, .L8003+44
ldr r0, [sp, #24] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1860
.L1859:
ldr r3, [sp, #32]
cmp r3, #0
bne .L304
b .L2383
.L7727:
ldr r3, .L8003
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #32]
bne .L296
.L3220:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L295
ldr r3, .L8003+4
ldr r2, .L8003+8
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #32]
orrs r3, r2, r3
movne r2, #0
bne .L95
.L296:
ldr r3, .L8003+44
ldr r0, [sp, #24] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #32]
beq .L2970
b .L2383
.L282:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8003+4
ldr r3, .L8003+48
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8003+8
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
b .L285
.L7699:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #64]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L319
ldr r2, .L8003+8
ldr r3, .L8003+4
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #32]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #64]
str r3, [sp, #24]
bne .L95
ldr r3, [sp, #48]
cmp r3, #0
bne .L2964
b .L2963
.L295:
ldr r3, [sp, #32]
cmp r3, #0
bne .L2385
b .L296
.L7690:
ldr r3, .L8003+36
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L253
ldr r3, .L8003+32
ldr r2, [sp, #24]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #16]
bne .L253
ldr r3, .L8003+40
ldr r0, [sp, #72] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L255
b .L256
.L300:
ldr r3, .L8003+44
ldr r0, [sp, #24] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1859
b .L2377
.L298:
ldr r3, .L8003+44
ldr r0, [sp, #24] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L302
b .L1859
.L348:
ldr r3, .L8003+68
ldr r1, [sp, #80] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #56] @ float
str r3, [sp, #40]
bl __aeabi_fcmpeq
ldr r3, [sp, #40]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
beq .L349
.L350:
ldr r3, .L8003+56
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
bne .L354
ldr r3, .L8003+84
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L353
ldr r3, .L8003+88
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L353
ldr r3, .L8003+80
ldr r0, [sp, #32] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L353
ldr r3, .L8003+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2358
ldr r3, [sp, #48]
cmp r3, #0
bne .L2358
.L7635:
str r3, [sp, #40]
.L2952:
ldr r3, .L8003+76
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #64]
orrs r2, r3, r2
str r2, [sp, #72]
bne .L361
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L361
ldr r2, .L8003+88
ldr r3, .L8003+84
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #40]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #72]
str r3, [sp, #40]
bne .L95
ldr r3, .L8003+80
ldr r0, [sp, #32] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L368
.L2949:
mov r1, #0
ldr r0, [sp, #56] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #72] @ float
ldr r0, [sp, #32] @ float
str r3, [sp, #76]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #56]
.L372:
ldr r3, [sp, #64]
subs r2, r3, #0
ldr r3, .L8003+76
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
bne .L373
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #32]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L373
ldr r2, .L8003+88
ldr r3, .L8003+84
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #40]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #32]
bne .L95
ldr r3, .L8003+60
ldr r3, [r3] @ float
str r3, [sp, #84] @ float
.L378:
ldr r3, [sp, #48]
cmp r3, #0
streq r3, [sp, #40]
bne .L2345
.L3213:
ldr r3, .L8003+64
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #64]
orrs r2, r3, r2
bne .L380
ldr r3, .L8003+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7731
.L380:
ldr r3, [sp, #40]
cmp r3, #0
strne r3, [sp, #32]
beq .L7732
.L382:
ldr r3, [sp, #56]
cmp r3, #0
beq .L388
.L2943:
ldr r3, .L8003+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2343
.L389:
ldr r3, [sp, #48]
cmp r3, #0
bne .L1850
b .L388
.L361:
ldr r3, .L8003+80
ldr r0, [sp, #32] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1852
.L2352:
ldr r0, [sp, #56] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #56]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #76]
b .L372
.L354:
ldr r3, [sp, #48]
cmp r3, #0
beq .L7733
.L2361:
ldr r3, .L8003+84
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8003+88
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L358
ldr r3, .L8003+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7734
.L359:
ldr r3, .L8003+80
ldr r0, [sp, #32] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L363
.L1852:
ldr r3, [sp, #40]
cmp r3, #0
beq .L2358
.L365:
ldr r3, .L8003+88
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L367
ldr r3, .L8003+84
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L368
b .L367
.L358:
ldr r3, .L8003+80
ldr r0, [sp, #32] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L367
.L363:
ldr r3, [sp, #48]
cmp r3, #0
bne .L2357
b .L2949
.L8004:
.align 2
.L8003:
.word s16_l1
.word s16_evt0
.word s16_evt1
.word s16_backoff
.word _x_s16_l1
.word s16_x
.word _x_s17_l1
.word s17_l1
.word s17_evt0
.word s17_evt1
.word s17_backoff
.word s16_lambda
.word s16_evt2
.word s17_x
.word s15_evt2
.word s15_x
.word _x_s15_l1
.word s15_backoff
.word -1074790400
.word s15_l1
.word s15_lambda
.word s15_evt0
.word s15_evt1
.word s14_evt2
.word s14_lambda
.word s14_x
.word s14_backoff
.word s14_l1
.word s14_evt0
.word s14_evt1
.word _x_s14_l1
.word _x_s13_evt2
.word _x_s13_evt0
.word _x_s13_evt1
.word _x_s13_l0
.word _x_s13_backoff
.word _x_s13_lambda
.word _x_s13_x
.word s13_l0
.word s13_evt2
.word s13_lambda
.word s13_x
.word s13_backoff
.word s13_l1
.word s13_evt0
.word s13_evt1
.word _x_s13_l1
.word _x_s12_evt2
.word _x_s12_evt0
.word _x_s12_evt1
.word _x_s12_l0
.word _x_s12_backoff
.word 1095761920
.word _x_s12_lambda
.word _x_s12_x
.word s12_l0
.word s12_backoff
.word delta
.word s12_evt2
.word s12_lambda
.word s12_evt0
.word s12_evt1
.word s12_x
.word s12_l1
.word _x_s12_l1
.L7734:
ldr r3, [sp, #48]
cmp r3, #0
beq .L2952
ldr r3, .L8003+80
ldr r0, [sp, #32] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1852
.L1853:
ldr r3, .L8003+64
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2352
ldr r3, .L8003+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2949
.L2950:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L369
ldr r3, .L8003+84
ldr r2, .L8003+88
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #40]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #40]
bne .L95
.L369:
mov r1, #0
ldr r0, [sp, #56] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #72] @ float
ldr r0, [sp, #32] @ float
str r3, [sp, #76]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #76]
str r2, [sp, #56]
ands r3, r3, r2
beq .L372
str r3, [sp, #76]
str r3, [sp, #56]
b .L373
.L7733:
ldr r3, .L8003+64
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2361
ldr r3, .L8003+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L3215
.L2360:
ldr r3, .L8003+88
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8003+84
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L358
ldr r3, .L8003+80
ldr r0, [sp, #32] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L365
b .L2949
.L384:
ldr r3, [sp, #56]
cmp r3, #0
bne .L389
ldr r3, [sp, #64]
cmp r3, #0
beq .L390
.L2941:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L390
ldr r3, .L8003+84
ldr r2, .L8003+88
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #32]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
b .L393
.L383:
ldr r3, [sp, #56]
cmp r3, #0
beq .L388
.L2343:
ldr r3, [sp, #48]
cmp r3, #0
beq .L1850
b .L388
.L7732:
ldr r3, .L8003+84
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #32]
beq .L382
ldr r3, [sp, #40]
str r3, [sp, #32]
.L2944:
ldr r3, .L8003+88
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L377
ldr r3, .L8003+68
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #80] @ float
str r2, [sp, #40]
str r3, [sp, #44]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #40
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L8003+72
bl __aeabi_dcmple
cmp r0, #0
bne .L382
.L377:
ldr r3, [sp, #48]
cmp r3, #0
bne .L2346
b .L382
.L7731:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #72]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L380
ldr r2, .L8003+88
ldr r3, .L8003+84
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #40]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #72]
str r3, [sp, #32]
bne .L95
ldr r3, [sp, #56]
cmp r3, #0
beq .L2942
b .L2943
.L7990:
ldr r3, .L8003+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
bne .L357
.L3215:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L356
ldr r3, .L8003+84
ldr r2, .L8003+88
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #40]
orrs r3, r2, r3
movne r2, #0
bne .L95
.L357:
ldr r3, .L8003+80
ldr r1, [sp, #32] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #40]
bne .L2358
b .L2949
.L356:
ldr r3, [sp, #40]
cmp r3, #0
beq .L357
b .L2360
.L7708:
ldr r3, .L8003+88
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #32]
beq .L395
b .L393
.L394:
ldr r3, [sp, #48]
cmp r3, #0
beq .L2341
ldr r3, [sp, #64]
cmp r3, #0
bne .L7735
ldr r3, .L8003+84
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8003+88
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L398
b .L3211
.L386:
ldr r3, [sp, #56]
cmp r3, #0
bne .L1851
b .L390
.L385:
ldr r3, [sp, #56]
cmp r3, #0
bne .L389
b .L390
.L84:
cmp r3, #0
bne .L4988
b .L85
.L80:
cmp r3, #0
bne .L4988
b .L81
.L76:
cmp r3, #0
bne .L4988
b .L77
.L72:
cmp r3, #0
bne .L4988
b .L73
.L7711:
ldr r2, .L8003+112
ldr r3, .L8003+92
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8003+116
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
.L407:
ldr r3, [sp, #48]
cmp r3, #0
beq .L409
ldr r3, .L8003+120
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L410
.L409:
ldr r3, .L8003+104
ldr r1, [sp, #80] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #56] @ float
str r3, [sp, #40]
bl __aeabi_fcmpeq
ldr r3, [sp, #40]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L411
.L410:
ldr r3, .L8003+108
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #64]
orrs r2, r3, r2
str r2, [sp, #40]
bne .L411
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L411
ldr r2, .L8003+112
ldr r3, .L8003+92
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8003+116
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #40]
bne .L95
.L414:
ldr r3, [sp, #48]
cmp r3, #0
beq .L7736
ldr r3, .L8003+120
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
bne .L7737
ldr r3, .L8003+96
ldr r0, [sp] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L424
.L2333:
ldr r3, .L8003+112
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
beq .L428
ldr r3, .L8003+116
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
beq .L429
mov r3, #0
str r3, [sp, #40]
.L428:
ldr r3, [sp, #48]
cmp r3, #0
beq .L429
.L2332:
ldr r3, .L8003+120
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7738
.L429:
mov r1, #0
ldr r0, [sp, #56] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #72] @ float
ldr r0, [sp] @ float
str r3, [sp, #76]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #76]
str r2, [sp, #56]
ands r3, r3, r2
bne .L7739
.L433:
ldr r3, [sp, #64]
subs r2, r3, #0
ldr r3, .L8003+108
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7740
.L434:
ldr r3, .L8003+100
ldr r1, [sp, #72] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #84] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7741
.L436:
ldr r3, [sp, #48]
cmp r3, #0
bne .L440
.L3208:
ldr r3, .L8003+120
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #64]
orrs r2, r3, r2
bne .L441
ldr r3, .L8003+108
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7742
.L441:
ldr r3, [sp, #40]
cmp r3, #0
strne r3, [sp]
beq .L7743
.L443:
ldr r3, [sp, #56]
cmp r3, #0
beq .L449
.L2922:
ldr r3, .L8003+120
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L450
.L2318:
ldr r3, [sp, #48]
cmp r3, #0
bne .L449
.L1843:
ldr r3, .L8003+104
ldr r1, [sp, #80] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #76]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L451
.L449:
ldr r3, [sp, #64]
cmp r3, #0
beq .L451
ldr r3, .L8003+108
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L451
.L2920:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L451
ldr r3, .L8003+112
ldr r2, .L8003+116
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L454:
ldr r3, [sp, #48]
cmp r3, #0
bne .L7744
ldr r3, [sp, #48]
str r3, [sp]
.L456:
ldr r3, .L8003+120
ldr r2, [sp, #92]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #88]
orrs r3, r2, r3
beq .L7745
.L459:
ldr r3, .L8003+124
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8003+128
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L460
cmp r3, #0
beq .L461
ldr r3, .L8003+132
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L461:
ldr r3, .L8003+136
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #56]
bne .L462
.L1842:
ldr r3, .L8003+140
ldr r1, .L8003+208
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #84] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L8003+144
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #40] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L8003+148
ldr r0, [sp, #40] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #64] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L464
ldr r3, [sp, #56]
subs r2, r3, #0
ldr r3, .L8003+184
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L464:
ldr r3, .L8003+152
ldr r2, [sp, #56]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #72]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #104]
str r3, [sp, #92]
beq .L465
ldr r3, .L8003+172
ldr r2, .L8003+184
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L465
ldr r3, .L8003+160
ldr r0, [sp, #40] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L465
ldr r3, .L8003+164
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #64] @ float
str r2, [sp, #48]
str r3, [sp, #52]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #48
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L8003+228
str r2, [sp, #48]
str r3, [sp, #52]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #48
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L465
ldr r3, .L8003+168
ldr r0, [sp, #84] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L468
.L465:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8003+176
ldr r3, .L8003+156
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8003+180
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
.L468:
ldr r3, [sp, #56]
cmp r3, #0
beq .L470
ldr r3, .L8003+184
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L471
.L470:
ldr r3, .L8003+168
ldr r1, [sp, #84] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #64] @ float
str r3, [sp, #48]
bl __aeabi_fcmpeq
ldr r3, [sp, #48]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L472
.L471:
ldr r3, .L8003+172
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #72]
orrs r2, r3, r2
str r2, [sp, #48]
bne .L472
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L472
ldr r2, .L8003+176
ldr r3, .L8003+156
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8003+180
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #48]
bne .L95
.L475:
ldr r3, [sp, #56]
cmp r3, #0
beq .L7746
ldr r3, .L8003+184
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #48]
bne .L7747
ldr r3, .L8003+160
ldr r0, [sp, #40] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #76] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L485
.L2308:
ldr r3, .L8003+176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #48]
beq .L489
ldr r3, .L8003+180
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #48]
beq .L490
mov r3, #0
str r3, [sp, #48]
.L489:
ldr r3, [sp, #56]
cmp r3, #0
beq .L490
.L2307:
ldr r3, .L8003+184
ldr r2, [sp, #72]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7748
.L490:
mov r1, #0
ldr r0, [sp, #64] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #76] @ float
ldr r0, [sp, #40] @ float
str r3, [sp, #80]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #80]
str r2, [sp, #64]
ands r3, r3, r2
bne .L7749
.L494:
ldr r3, [sp, #72]
subs r2, r3, #0
ldr r3, .L8003+172
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7750
.L495:
ldr r3, .L8003+164
ldr r1, [sp, #76] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #88] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7751
.L497:
ldr r3, [sp, #56]
cmp r3, #0
bne .L501
.L3203:
ldr r3, .L8003+184
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #72]
orrs r2, r3, r2
bne .L502
ldr r3, .L8003+172
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7752
.L502:
ldr r3, [sp, #48]
cmp r3, #0
strne r3, [sp, #40]
beq .L7753
.L504:
ldr r3, [sp, #64]
cmp r3, #0
beq .L510
.L2901:
ldr r3, .L8003+184
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L511
.L2293:
ldr r3, [sp, #56]
cmp r3, #0
bne .L510
.L1836:
ldr r3, .L8003+168
ldr r1, [sp, #84] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #80]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L512
.L510:
ldr r3, [sp, #72]
cmp r3, #0
beq .L512
ldr r3, .L8003+172
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L512
.L2899:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L512
ldr r3, .L8003+176
ldr r2, .L8003+180
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #40]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L515:
ldr r3, [sp, #56]
cmp r3, #0
bne .L7754
ldr r3, [sp, #56]
str r3, [sp, #40]
.L517:
ldr r3, .L8003+184
ldr r2, [sp, #104]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #92]
orrs r3, r2, r3
beq .L7755
.L520:
ldr r3, .L8003+188
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8003+192
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L521
cmp r3, #0
beq .L522
ldr r3, .L8003+196
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L522:
ldr r3, .L8003+200
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L523
.L1835:
ldr r3, .L8003+204
ldr r1, .L8003+208
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #88] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L8003+212
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #48] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L8003+216
ldr r0, [sp, #48] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #72] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L525
ldr r3, [sp, #64]
subs r2, r3, #0
ldr r3, .L8003+256
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L525:
ldr r3, .L8003+220
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #76]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #96]
str r3, [sp, #104]
beq .L526
ldr r3, .L8003+252
ldr r2, .L8003+256
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L526
ldr r3, .L8003+236
ldr r0, [sp, #48] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L526
ldr r3, .L8003+248
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #72] @ float
str r2, [sp, #56]
str r3, [sp, #60]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #56
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L8003+228
str r2, [sp, #56]
str r3, [sp, #60]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #56
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L526
ldr r3, .L8003+224
ldr r0, [sp, #88] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L529
.L526:
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8003+240
ldr r3, .L8003+232
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8003+244
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
.L529:
ldr r3, [sp, #64]
cmp r3, #0
beq .L531
ldr r3, .L8003+256
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L532
.L531:
ldr r3, .L8003+224
ldr r1, [sp, #88] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #72] @ float
str r3, [sp, #56]
bl __aeabi_fcmpeq
ldr r3, [sp, #56]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L533
.L532:
ldr r3, .L8003+252
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #76]
orrs r2, r3, r2
str r2, [sp, #56]
bne .L533
ldr r3, .L8003+228
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L533
ldr r2, .L8003+240
ldr r3, .L8003+232
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8003+244
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #56]
bne .L95
.L536:
ldr r3, [sp, #64]
cmp r3, #0
beq .L7756
ldr r3, .L8003+256
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #56]
bne .L7757
ldr r3, .L8003+236
ldr r0, [sp, #48] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #80] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L546
.L2283:
ldr r3, .L8003+240
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #56]
beq .L550
ldr r3, .L8003+244
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #56]
beq .L551
mov r3, #0
str r3, [sp, #56]
.L550:
ldr r3, [sp, #64]
cmp r3, #0
beq .L551
.L2282:
ldr r3, .L8003+256
ldr r2, [sp, #76]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7758
.L551:
mov r1, #0
ldr r0, [sp, #72] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #80] @ float
ldr r0, [sp, #48] @ float
str r3, [sp, #84]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #84]
str r2, [sp, #72]
ands r3, r3, r2
bne .L7759
.L555:
ldr r3, [sp, #76]
subs r2, r3, #0
ldr r3, .L8003+252
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7760
.L556:
ldr r3, .L8003+248
ldr r1, [sp, #80] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #92] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7761
.L558:
ldr r3, [sp, #64]
cmp r3, #0
bne .L562
.L3198:
ldr r3, .L8003+256
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #76]
orrs r2, r3, r2
bne .L563
ldr r3, .L8003+252
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7762
.L563:
ldr r3, [sp, #56]
cmp r3, #0
strne r3, [sp, #48]
beq .L7763
.L565:
ldr r3, [sp, #72]
cmp r3, #0
beq .L571
.L2880:
ldr r3, .L8003+256
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L572
.L2268:
ldr r3, [sp, #64]
cmp r3, #0
bne .L571
.L1829:
ldr r3, .L8005
ldr r1, [sp, #88] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #84]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L573
.L571:
ldr r3, [sp, #76]
cmp r3, #0
beq .L573
ldr r3, .L8005+4
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L573
.L2878:
ldr r3, .L8005+8
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L573
ldr r3, .L8005+12
ldr r2, .L8005+16
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #48]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L576:
ldr r3, [sp, #64]
cmp r3, #0
bne .L7764
ldr r3, [sp, #64]
str r3, [sp, #48]
.L578:
ldr r3, .L8005+20
ldr r2, [sp, #96]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #104]
orrs r3, r2, r3
beq .L7765
.L581:
ldr r3, .L8005+24
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8005+28
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L582
cmp r3, #0
beq .L583
ldr r3, .L8005+32
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L583:
ldr r3, .L8005+36
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #72]
bne .L584
.L1828:
ldr r3, .L8005+40
ldr r1, .L8005+44
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #92] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L8005+48
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #56] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L8005+52
ldr r0, [sp, #56] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #76] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L586
ldr r3, [sp, #72]
subs r2, r3, #0
ldr r3, .L8005+56
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L586:
ldr r3, .L8005+60
ldr r2, [sp, #72]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #80]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #108]
str r3, [sp, #96]
beq .L587
ldr r3, .L8005+64
ldr r2, .L8005+56
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L587
ldr r3, .L8005+68
ldr r0, [sp, #56] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L587
ldr r3, .L8005+72
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #76] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L8005+8
str r2, [sp, #64]
str r3, [sp, #68]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L587
ldr r3, .L8005+76
ldr r0, [sp, #92] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L590
.L587:
ldr r3, .L8005+8
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8005+80
ldr r3, .L8005+84
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8005+88
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
.L590:
ldr r3, [sp, #72]
cmp r3, #0
beq .L592
ldr r3, .L8005+56
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L593
.L592:
ldr r3, .L8005+76
ldr r1, [sp, #92] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #76] @ float
str r3, [sp, #64]
bl __aeabi_fcmpeq
ldr r3, [sp, #64]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L594
.L593:
ldr r3, .L8005+64
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #80]
orrs r2, r3, r2
str r2, [sp, #64]
bne .L594
ldr r3, .L8005+8
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L594
ldr r2, .L8005+80
ldr r3, .L8005+84
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8005+88
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #64]
bne .L95
.L597:
ldr r3, [sp, #72]
cmp r3, #0
beq .L7766
ldr r3, .L8005+56
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L7767
ldr r3, .L8005+68
ldr r0, [sp, #56] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #84] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L607
.L2258:
ldr r3, .L8005+80
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L611
ldr r3, .L8005+88
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L612
mov r3, #0
str r3, [sp, #64]
.L611:
ldr r3, [sp, #72]
cmp r3, #0
beq .L612
.L2257:
ldr r3, .L8005+56
ldr r2, [sp, #80]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7768
.L612:
mov r1, #0
ldr r0, [sp, #76] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #84] @ float
ldr r0, [sp, #56] @ float
str r3, [sp, #88]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #88]
str r2, [sp, #76]
ands r3, r3, r2
bne .L7769
.L616:
ldr r3, [sp, #80]
subs r2, r3, #0
ldr r3, .L8005+64
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7770
.L617:
ldr r3, .L8005+72
ldr r1, [sp, #84] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #104] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7771
.L619:
ldr r3, [sp, #72]
cmp r3, #0
bne .L623
.L3193:
ldr r3, .L8005+56
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #80]
orrs r2, r3, r2
bne .L624
ldr r3, .L8005+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7772
.L624:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #56]
beq .L7773
.L626:
ldr r3, [sp, #76]
cmp r3, #0
beq .L632
.L2859:
ldr r3, .L8005+56
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L633
.L2243:
ldr r3, [sp, #72]
cmp r3, #0
bne .L632
.L1822:
ldr r3, .L8005+76
ldr r1, [sp, #92] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #88]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L634
.L632:
ldr r3, [sp, #80]
cmp r3, #0
beq .L634
ldr r3, .L8005+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L634
.L2857:
ldr r3, .L8005+8
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L634
ldr r3, .L8005+80
ldr r2, .L8005+88
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #56]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L637:
ldr r3, [sp, #72]
cmp r3, #0
bne .L7774
ldr r3, [sp, #72]
str r3, [sp, #56]
.L639:
ldr r3, .L8005+56
ldr r2, [sp, #108]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #96]
orrs r3, r2, r3
beq .L7775
.L642:
ldr r3, .L8005+92
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8005+96
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L643
cmp r3, #0
beq .L644
ldr r3, .L8005+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L644:
ldr r3, .L8005+104
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #76]
bne .L645
.L1821:
ldr r3, .L8005+108
ldr r1, .L8005+44
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #104] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L8005+112
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L8005+116
ldr r0, [sp, #72] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #80] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L647
ldr r3, [sp, #76]
subs r2, r3, #0
ldr r3, .L8005+120
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L647:
ldr r3, .L8005+124
ldr r2, [sp, #76]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #84]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #112]
str r3, [sp, #108]
beq .L648
ldr r3, .L8005+128
ldr r2, .L8005+120
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L648
ldr r3, .L8005+132
ldr r0, [sp, #72] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L648
ldr r3, .L8005+136
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #80] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L8005+8
str r2, [sp, #64]
str r3, [sp, #68]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L648
ldr r3, .L8005+140
ldr r0, [sp, #104] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L651
.L648:
ldr r3, .L8005+8
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8005+144
ldr r3, .L8005+148
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8005+152
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
.L651:
ldr r3, [sp, #76]
cmp r3, #0
beq .L653
ldr r3, .L8005+120
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L654
.L653:
ldr r3, .L8005+140
ldr r1, [sp, #104] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #80] @ float
str r3, [sp, #64]
bl __aeabi_fcmpeq
ldr r3, [sp, #64]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L655
.L654:
ldr r3, .L8005+128
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #84]
orrs r2, r3, r2
str r2, [sp, #64]
bne .L655
ldr r3, .L8005+8
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L655
ldr r2, .L8005+144
ldr r3, .L8005+148
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8005+152
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #64]
bne .L95
.L658:
ldr r3, [sp, #76]
cmp r3, #0
beq .L7776
ldr r3, .L8005+120
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L7777
ldr r3, .L8005+132
ldr r0, [sp, #72] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #88] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L668
.L2233:
ldr r3, .L8005+144
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L672
ldr r3, .L8005+152
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L673
mov r3, #0
str r3, [sp, #64]
.L672:
ldr r3, [sp, #76]
cmp r3, #0
beq .L673
.L2232:
ldr r3, .L8005+120
ldr r2, [sp, #84]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7778
.L673:
mov r1, #0
ldr r0, [sp, #80] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #88] @ float
ldr r0, [sp, #72] @ float
str r3, [sp, #92]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #92]
str r2, [sp, #80]
ands r3, r3, r2
bne .L7779
.L677:
ldr r3, [sp, #84]
subs r2, r3, #0
ldr r3, .L8005+128
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7780
.L678:
ldr r3, .L8005+136
ldr r1, [sp, #88] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #96] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7781
.L680:
ldr r3, [sp, #76]
cmp r3, #0
bne .L684
.L3188:
ldr r3, .L8005+120
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #84]
orrs r2, r3, r2
bne .L685
ldr r3, .L8005+128
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7782
.L685:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #72]
beq .L7783
.L687:
ldr r3, [sp, #80]
cmp r3, #0
beq .L693
.L2838:
ldr r3, .L8005+120
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L694
.L2218:
ldr r3, [sp, #76]
cmp r3, #0
bne .L693
.L1815:
ldr r3, .L8005+140
ldr r1, [sp, #104] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #92]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L695
.L693:
ldr r3, [sp, #84]
cmp r3, #0
beq .L695
ldr r3, .L8005+128
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L695
.L2836:
ldr r3, .L8005+8
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L695
ldr r3, .L8005+144
ldr r2, .L8005+152
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #72]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L698:
ldr r3, [sp, #76]
cmp r3, #0
bne .L7784
ldr r3, [sp, #76]
str r3, [sp, #72]
.L700:
ldr r3, .L8005+120
ldr r2, [sp, #112]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #108]
orrs r3, r2, r3
beq .L7785
.L703:
ldr r3, .L8005+156
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8005+160
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L704
cmp r3, #0
beq .L705
ldr r3, .L8005+164
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L705:
ldr r3, .L8005+168
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #80]
bne .L706
.L1814:
ldr r3, .L8005+172
ldr r1, .L8005+44
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #96] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L8005+176
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #76] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L8005+180
ldr r0, [sp, #76] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #84] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L708
ldr r3, [sp, #80]
subs r2, r3, #0
ldr r3, .L8005+184
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L708:
ldr r3, .L8005+188
ldr r2, [sp, #80]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #88]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #116]
str r3, [sp, #112]
beq .L709
ldr r3, .L8005+192
ldr r2, .L8005+184
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L709
ldr r3, .L8005+196
ldr r0, [sp, #76] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L709
ldr r3, .L8005+200
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #84] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L8005+8
str r2, [sp, #64]
str r3, [sp, #68]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L709
ldr r3, .L8005+204
ldr r0, [sp, #96] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L712
.L709:
ldr r3, .L8005+8
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8005+208
ldr r3, .L8005+212
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8005+216
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
.L712:
ldr r3, [sp, #80]
cmp r3, #0
beq .L714
ldr r3, .L8005+184
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L715
.L714:
ldr r3, .L8005+204
ldr r1, [sp, #96] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #84] @ float
str r3, [sp, #64]
bl __aeabi_fcmpeq
ldr r3, [sp, #64]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L716
.L715:
ldr r3, .L8005+192
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #88]
orrs r2, r3, r2
str r2, [sp, #64]
bne .L716
ldr r3, .L8005+8
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L716
ldr r2, .L8005+208
ldr r3, .L8005+212
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8005+216
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #64]
bne .L95
.L719:
ldr r3, [sp, #80]
cmp r3, #0
beq .L7786
ldr r3, .L8005+184
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L7787
ldr r3, .L8005+196
ldr r0, [sp, #76] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #92] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L729
.L2208:
ldr r3, .L8005+208
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L733
ldr r3, .L8005+216
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L734
mov r3, #0
str r3, [sp, #64]
.L733:
ldr r3, [sp, #80]
cmp r3, #0
beq .L734
.L2207:
ldr r3, .L8005+184
ldr r2, [sp, #88]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7788
.L734:
mov r1, #0
ldr r0, [sp, #84] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #92] @ float
ldr r0, [sp, #76] @ float
str r3, [sp, #104]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #104]
str r2, [sp, #84]
ands r3, r3, r2
bne .L7789
.L738:
ldr r3, [sp, #88]
subs r2, r3, #0
ldr r3, .L8005+192
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7790
.L739:
ldr r3, .L8005+200
ldr r1, [sp, #92] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #108] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7791
.L741:
ldr r3, [sp, #80]
cmp r3, #0
bne .L745
.L3183:
ldr r3, .L8005+184
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #88]
orrs r2, r3, r2
bne .L746
ldr r3, .L8005+192
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7792
.L746:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #76]
beq .L7793
.L748:
ldr r3, [sp, #84]
cmp r3, #0
beq .L754
.L2817:
ldr r3, .L8005+184
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L755
.L2193:
ldr r3, [sp, #80]
cmp r3, #0
bne .L754
.L1808:
ldr r3, .L8005+204
ldr r1, [sp, #96] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #104]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L756
.L754:
ldr r3, [sp, #88]
cmp r3, #0
beq .L756
ldr r3, .L8005+192
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L756
.L2815:
ldr r3, .L8005+8
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L756
ldr r3, .L8005+208
ldr r2, .L8005+216
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #76]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L759:
ldr r3, [sp, #80]
cmp r3, #0
bne .L7794
ldr r3, [sp, #80]
str r3, [sp, #76]
.L761:
ldr r3, .L8005+184
ldr r2, [sp, #116]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #112]
orrs r3, r2, r3
beq .L7795
.L764:
ldr r3, .L8005+220
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8005+224
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L765
cmp r3, #0
beq .L766
ldr r3, .L8005+228
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L766:
ldr r3, .L8005+232
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #84]
bne .L767
.L1807:
ldr r3, .L8005+236
ldr r1, .L8005+44
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #108] @ float
b .L8006
.L8007:
.align 2
.L8005:
.word s12_backoff
.word s12_l1
.word delta
.word s12_evt0
.word s12_evt1
.word _x_s12_l1
.word _x_s11_evt2
.word _x_s11_evt0
.word _x_s11_evt1
.word _x_s11_l0
.word _x_s11_backoff
.word 1095761920
.word _x_s11_lambda
.word _x_s11_x
.word _x_s11_l1
.word s11_l0
.word s11_l1
.word s11_lambda
.word s11_x
.word s11_backoff
.word s11_evt0
.word s11_evt2
.word s11_evt1
.word _x_s10_evt2
.word _x_s10_evt0
.word _x_s10_evt1
.word _x_s10_l0
.word _x_s10_backoff
.word _x_s10_lambda
.word _x_s10_x
.word _x_s10_l1
.word s10_l0
.word s10_l1
.word s10_lambda
.word s10_x
.word s10_backoff
.word s10_evt0
.word s10_evt2
.word s10_evt1
.word _x_s9_evt2
.word _x_s9_evt0
.word _x_s9_evt1
.word _x_s9_l0
.word _x_s9_backoff
.word _x_s9_lambda
.word _x_s9_x
.word _x_s9_l1
.word s9_l0
.word s9_l1
.word s9_lambda
.word s9_x
.word s9_backoff
.word s9_evt0
.word s9_evt2
.word s9_evt1
.word _x_s8_evt2
.word _x_s8_evt0
.word _x_s8_evt1
.word _x_s8_l0
.word _x_s8_backoff
.word _x_s8_lambda
.word _x_s8_x
.word s8_l0
.word s8_evt2
.word s8_lambda
.word s8_x
.word s8_backoff
.word s8_l1
.word s8_evt0
.word s8_evt1
.word _x_s8_l1
.word _x_s7_evt2
.word _x_s7_evt0
.word _x_s7_evt1
.word _x_s7_l0
.word _x_s7_backoff
.word _x_s7_lambda
.word _x_s7_x
.word s7_l0
.word s7_evt2
.word s7_lambda
.word s7_x
.word s7_backoff
.word s7_l1
.word s7_evt0
.word s7_evt1
.word _x_s7_l1
.word _x_s6_evt2
.word _x_s6_evt0
.word _x_s6_evt1
.word _x_s6_l0
.word _x_s6_backoff
.word _x_s6_lambda
.word _x_s6_x
.word s6_l0
.word s6_evt2
.word s6_lambda
.word s6_x
.word s6_backoff
.word s6_l1
.word delta
.word s6_evt0
.word s6_evt1
.word _x_s6_l1
.word _x_s5_evt2
.word _x_s5_evt0
.word _x_s5_evt1
.word _x_s5_l0
.word _x_s5_backoff
.word 1095761920
.word _x_s5_lambda
.word _x_s5_x
.word s5_l0
.word s5_l1
.word _x_s5_l1
.word s5_lambda
.word s5_x
.L8006:
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L8005+240
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #80] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L8005+244
ldr r0, [sp, #80] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #88] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L769
ldr r3, [sp, #84]
subs r2, r3, #0
ldr r3, .L8005+280
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L769:
ldr r3, .L8005+248
ldr r2, [sp, #84]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #92]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #128]
str r3, [sp, #116]
beq .L770
ldr r3, .L8005+268
ldr r2, .L8005+280
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L770
ldr r3, .L8005+256
ldr r0, [sp, #80] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L770
ldr r3, .L8005+260
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #88] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L8005+400
str r2, [sp, #64]
str r3, [sp, #68]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L770
ldr r3, .L8005+264
ldr r0, [sp, #108] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L773
.L770:
ldr r3, .L8005+400
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8005+272
ldr r3, .L8005+252
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8005+276
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
.L773:
ldr r3, [sp, #84]
cmp r3, #0
beq .L775
ldr r3, .L8005+280
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L776
.L775:
ldr r3, .L8005+264
ldr r1, [sp, #108] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #88] @ float
str r3, [sp, #64]
bl __aeabi_fcmpeq
ldr r3, [sp, #64]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L777
.L776:
ldr r3, .L8005+268
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #92]
orrs r2, r3, r2
str r2, [sp, #64]
bne .L777
ldr r3, .L8005+400
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L777
ldr r2, .L8005+272
ldr r3, .L8005+252
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8005+276
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #64]
bne .L95
.L780:
ldr r3, [sp, #84]
cmp r3, #0
beq .L7796
ldr r3, .L8005+280
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L7797
ldr r3, .L8005+256
ldr r0, [sp, #80] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #104] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L790
.L2183:
ldr r3, .L8005+272
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L794
ldr r3, .L8005+276
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L795
mov r3, #0
str r3, [sp, #64]
.L794:
ldr r3, [sp, #84]
cmp r3, #0
beq .L795
.L2182:
ldr r3, .L8005+280
ldr r2, [sp, #92]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7798
.L795:
mov r1, #0
ldr r0, [sp, #88] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #104] @ float
ldr r0, [sp, #80] @ float
str r3, [sp, #96]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #96]
str r2, [sp, #88]
ands r3, r3, r2
bne .L7799
.L799:
ldr r3, [sp, #92]
subs r2, r3, #0
ldr r3, .L8005+268
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7800
.L800:
ldr r3, .L8005+260
ldr r1, [sp, #104] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #112] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7801
.L802:
ldr r3, [sp, #84]
cmp r3, #0
bne .L806
.L3178:
ldr r3, .L8005+280
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #92]
orrs r2, r3, r2
bne .L807
ldr r3, .L8005+268
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7802
.L807:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #80]
beq .L7803
.L809:
ldr r3, [sp, #88]
cmp r3, #0
beq .L815
.L2796:
ldr r3, .L8005+280
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L816
.L2168:
ldr r3, [sp, #84]
cmp r3, #0
bne .L815
.L1801:
ldr r3, .L8005+264
ldr r1, [sp, #108] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #96]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L817
.L815:
ldr r3, [sp, #92]
cmp r3, #0
beq .L817
ldr r3, .L8005+268
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L817
.L2794:
ldr r3, .L8005+400
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L817
ldr r3, .L8005+272
ldr r2, .L8005+276
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #80]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L820:
ldr r3, [sp, #84]
cmp r3, #0
bne .L7804
ldr r3, [sp, #84]
str r3, [sp, #80]
.L822:
ldr r3, .L8005+280
ldr r2, [sp, #128]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #116]
orrs r3, r2, r3
beq .L7805
.L825:
ldr r3, .L8005+284
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8005+288
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L826
cmp r3, #0
beq .L827
ldr r3, .L8005+292
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L827:
ldr r3, .L8005+296
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #88]
bne .L828
.L1800:
ldr r3, .L8005+300
ldr r1, .L8005+436
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #112] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L8005+304
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #84] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L8005+308
ldr r0, [sp, #84] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #92] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L830
ldr r3, [sp, #88]
subs r2, r3, #0
ldr r3, .L8005+344
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L830:
ldr r3, .L8005+312
ldr r2, [sp, #88]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #104]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #120]
str r3, [sp, #128]
beq .L831
ldr r3, .L8005+332
ldr r2, .L8005+344
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L831
ldr r3, .L8005+320
ldr r0, [sp, #84] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L831
ldr r3, .L8005+324
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #92] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L8005+400
str r2, [sp, #64]
str r3, [sp, #68]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L831
ldr r3, .L8005+328
ldr r0, [sp, #112] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L834
.L831:
ldr r3, .L8005+400
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8005+336
ldr r3, .L8005+316
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8005+340
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
.L834:
ldr r3, [sp, #88]
cmp r3, #0
beq .L836
ldr r3, .L8005+344
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L837
.L836:
ldr r3, .L8005+328
ldr r1, [sp, #112] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #92] @ float
str r3, [sp, #64]
bl __aeabi_fcmpeq
ldr r3, [sp, #64]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L838
.L837:
ldr r3, .L8005+332
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #104]
orrs r2, r3, r2
str r2, [sp, #64]
bne .L838
ldr r3, .L8005+400
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L838
ldr r2, .L8005+336
ldr r3, .L8005+316
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8005+340
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #64]
bne .L95
.L841:
ldr r3, [sp, #88]
cmp r3, #0
beq .L7806
ldr r3, .L8005+344
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L7807
ldr r3, .L8005+320
ldr r0, [sp, #84] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L851
.L2158:
ldr r3, .L8005+336
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L855
ldr r3, .L8005+340
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L856
mov r3, #0
str r3, [sp, #64]
.L855:
ldr r3, [sp, #88]
cmp r3, #0
beq .L856
.L2157:
ldr r3, .L8005+344
ldr r2, [sp, #104]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7808
.L856:
mov r1, #0
ldr r0, [sp, #92] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #96] @ float
ldr r0, [sp, #84] @ float
str r3, [sp, #108]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #108]
str r2, [sp, #92]
ands r3, r3, r2
bne .L7809
.L860:
ldr r3, [sp, #104]
subs r2, r3, #0
ldr r3, .L8005+332
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7810
.L861:
ldr r3, .L8005+324
ldr r1, [sp, #96] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #116] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7811
.L863:
ldr r3, [sp, #88]
cmp r3, #0
bne .L867
.L3173:
ldr r3, .L8005+344
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #104]
orrs r2, r3, r2
bne .L868
ldr r3, .L8005+332
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7812
.L868:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #84]
beq .L7813
.L870:
ldr r3, [sp, #92]
cmp r3, #0
beq .L876
.L2775:
ldr r3, .L8005+344
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L877
.L2143:
ldr r3, [sp, #88]
cmp r3, #0
bne .L876
.L1794:
ldr r3, .L8005+328
ldr r1, [sp, #112] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #108]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L878
.L876:
ldr r3, [sp, #104]
cmp r3, #0
beq .L878
ldr r3, .L8005+332
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L878
.L2773:
ldr r3, .L8005+400
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L878
ldr r3, .L8005+336
ldr r2, .L8005+340
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #84]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L881:
ldr r3, [sp, #88]
cmp r3, #0
bne .L7814
ldr r3, [sp, #88]
str r3, [sp, #84]
.L883:
ldr r3, .L8005+344
ldr r2, [sp, #120]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #128]
orrs r3, r2, r3
beq .L7815
.L886:
ldr r3, .L8005+348
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8005+352
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L887
cmp r3, #0
beq .L888
ldr r3, .L8005+356
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L888:
ldr r3, .L8005+360
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #92]
bne .L889
.L1793:
ldr r3, .L8005+364
ldr r1, .L8005+436
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #116] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L8005+368
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #88] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L8005+372
ldr r0, [sp, #88] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #104] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L891
ldr r3, [sp, #92]
subs r2, r3, #0
ldr r3, .L8005+412
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L891:
ldr r3, .L8005+376
ldr r2, [sp, #92]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #96]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #132]
str r3, [sp, #120]
beq .L892
ldr r3, .L8005+396
ldr r2, .L8005+412
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L892
ldr r3, .L8005+384
ldr r0, [sp, #88] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L892
ldr r3, .L8005+388
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #104] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L8005+400
str r2, [sp, #64]
str r3, [sp, #68]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L892
ldr r3, .L8005+392
ldr r0, [sp, #116] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L895
.L892:
ldr r3, .L8005+400
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8005+404
ldr r3, .L8005+380
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8005+408
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
.L895:
ldr r3, [sp, #92]
cmp r3, #0
beq .L897
ldr r3, .L8005+412
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L898
.L897:
ldr r3, .L8005+392
ldr r1, [sp, #116] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #104] @ float
str r3, [sp, #64]
bl __aeabi_fcmpeq
ldr r3, [sp, #64]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L899
.L898:
ldr r3, .L8005+396
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #96]
orrs r2, r3, r2
str r2, [sp, #64]
bne .L899
ldr r3, .L8005+400
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L899
ldr r2, .L8005+404
ldr r3, .L8005+380
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8005+408
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #64]
bne .L95
.L902:
ldr r3, [sp, #92]
cmp r3, #0
beq .L7816
ldr r3, .L8005+412
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L7817
ldr r3, .L8005+384
ldr r0, [sp, #88] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #108] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L912
.L2133:
ldr r3, .L8005+404
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L916
ldr r3, .L8005+408
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L917
mov r3, #0
str r3, [sp, #64]
.L916:
ldr r3, [sp, #92]
cmp r3, #0
beq .L917
.L2132:
ldr r3, .L8005+412
ldr r2, [sp, #96]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7818
.L917:
mov r1, #0
ldr r0, [sp, #104] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #108] @ float
ldr r0, [sp, #88] @ float
str r3, [sp, #112]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #112]
str r2, [sp, #104]
ands r3, r3, r2
bne .L7819
.L921:
ldr r3, [sp, #96]
subs r2, r3, #0
ldr r3, .L8005+396
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7820
.L922:
ldr r3, .L8005+388
ldr r1, [sp, #108] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #128] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7821
.L924:
ldr r3, [sp, #92]
cmp r3, #0
bne .L928
.L3168:
ldr r3, .L8005+412
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #96]
orrs r2, r3, r2
bne .L929
ldr r3, .L8005+396
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7822
.L929:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #88]
beq .L7823
.L931:
ldr r3, [sp, #104]
cmp r3, #0
beq .L937
.L2754:
ldr r3, .L8005+412
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L938
.L2118:
ldr r3, [sp, #92]
cmp r3, #0
bne .L937
.L1787:
ldr r3, .L8005+392
ldr r1, [sp, #116] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #112]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L939
.L937:
ldr r3, [sp, #96]
cmp r3, #0
beq .L939
ldr r3, .L8005+396
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L939
.L2752:
ldr r3, .L8005+400
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L939
ldr r3, .L8005+404
ldr r2, .L8005+408
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #88]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L942:
ldr r3, [sp, #92]
cmp r3, #0
bne .L7824
ldr r3, [sp, #92]
str r3, [sp, #88]
.L944:
ldr r3, .L8005+412
ldr r2, [sp, #132]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #120]
orrs r3, r2, r3
beq .L7825
.L947:
ldr r3, .L8005+416
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8005+420
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L948
cmp r3, #0
beq .L949
ldr r3, .L8005+424
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L949:
ldr r3, .L8005+428
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #104]
bne .L950
.L1786:
ldr r3, .L8005+432
ldr r1, .L8005+436
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #128] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L8005+440
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #92] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L8005+444
ldr r0, [sp, #92] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #96] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L952
ldr r3, [sp, #104]
subs r2, r3, #0
ldr r3, .L8005+456
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L952:
ldr r3, .L8005+448
ldr r2, [sp, #104]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #108]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #136]
str r3, [sp, #132]
beq .L953
ldr r3, .L8005+452
ldr r2, .L8005+456
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L953
ldr r3, .L8005+460
ldr r0, [sp, #92] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L953
ldr r3, .L8005+464
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #96] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L8008
str r2, [sp, #64]
str r3, [sp, #68]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L953
ldr r3, .L8008+4
ldr r0, [sp, #128] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L956
.L953:
ldr r3, .L8008
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8008+8
ldr r3, .L8008+12
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8008+16
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
.L956:
ldr r3, [sp, #104]
cmp r3, #0
beq .L958
ldr r3, .L8008+20
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L959
.L958:
ldr r3, .L8008+4
ldr r1, [sp, #128] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #96] @ float
str r3, [sp, #64]
bl __aeabi_fcmpeq
ldr r3, [sp, #64]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L960
.L959:
ldr r3, .L8008+24
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #108]
orrs r2, r3, r2
str r2, [sp, #64]
bne .L960
ldr r3, .L8008
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L960
ldr r2, .L8008+8
ldr r3, .L8008+12
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8008+16
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #64]
bne .L95
.L963:
ldr r3, [sp, #104]
cmp r3, #0
beq .L7826
ldr r3, .L8008+20
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L7827
ldr r3, .L8008+28
ldr r0, [sp, #92] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #112] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L973
.L2108:
ldr r3, .L8008+8
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L977
ldr r3, .L8008+16
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L978
mov r3, #0
str r3, [sp, #64]
.L977:
ldr r3, [sp, #104]
cmp r3, #0
beq .L978
.L2107:
ldr r3, .L8008+20
ldr r2, [sp, #108]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7828
.L978:
mov r1, #0
ldr r0, [sp, #96] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #112] @ float
ldr r0, [sp, #92] @ float
str r3, [sp, #116]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #116]
str r2, [sp, #96]
ands r3, r3, r2
bne .L7829
.L982:
ldr r3, [sp, #108]
subs r2, r3, #0
ldr r3, .L8008+24
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7830
.L983:
ldr r3, .L8008+32
ldr r1, [sp, #112] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #120] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7831
.L985:
ldr r3, [sp, #104]
cmp r3, #0
bne .L989
.L3163:
ldr r3, .L8008+20
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #108]
orrs r2, r3, r2
bne .L990
ldr r3, .L8008+24
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7832
.L990:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #92]
beq .L7833
.L992:
ldr r3, [sp, #96]
cmp r3, #0
beq .L998
.L2733:
ldr r3, .L8008+20
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L999
.L2093:
ldr r3, [sp, #104]
cmp r3, #0
bne .L998
.L1780:
ldr r3, .L8008+4
ldr r1, [sp, #128] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #116]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L1000
.L998:
ldr r3, [sp, #108]
cmp r3, #0
beq .L1000
ldr r3, .L8008+24
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1000
.L2731:
ldr r3, .L8008
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1000
ldr r3, .L8008+8
ldr r2, .L8008+16
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #92]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L1003:
ldr r3, [sp, #104]
cmp r3, #0
bne .L7834
ldr r3, [sp, #104]
str r3, [sp, #92]
.L1005:
ldr r3, .L8008+20
ldr r2, [sp, #136]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #132]
orrs r3, r2, r3
beq .L7835
.L1008:
ldr r3, .L8008+36
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8008+40
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L1009
cmp r3, #0
beq .L1010
ldr r3, .L8008+44
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L1010:
ldr r3, .L8008+48
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #96]
bne .L1011
.L1779:
ldr r3, .L8008+52
ldr r1, .L8008+388
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #120] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L8008+56
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #104] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L8008+60
ldr r0, [sp, #104] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #108] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L1013
ldr r3, [sp, #96]
subs r2, r3, #0
ldr r3, .L8008+64
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L1013:
ldr r3, .L8008+68
ldr r2, [sp, #96]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #112]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #144]
str r3, [sp, #136]
beq .L1014
ldr r3, .L8008+72
ldr r2, .L8008+64
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L1014
ldr r3, .L8008+76
ldr r0, [sp, #104] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1014
ldr r3, .L8008+80
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #108] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L8008
str r2, [sp, #64]
str r3, [sp, #68]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L1014
ldr r3, .L8008+84
ldr r0, [sp, #120] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1017
.L1014:
ldr r3, .L8008
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8008+88
ldr r3, .L8008+92
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8008+96
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
.L1017:
ldr r3, [sp, #96]
cmp r3, #0
beq .L1019
ldr r3, .L8008+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1020
.L1019:
ldr r3, .L8008+84
ldr r1, [sp, #120] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #108] @ float
str r3, [sp, #64]
bl __aeabi_fcmpeq
ldr r3, [sp, #64]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L1021
.L1020:
ldr r3, .L8008+72
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #112]
orrs r2, r3, r2
str r2, [sp, #64]
bne .L1021
ldr r3, .L8008
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1021
ldr r2, .L8008+88
ldr r3, .L8008+92
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8008+96
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #64]
bne .L95
.L1024:
ldr r3, [sp, #96]
cmp r3, #0
beq .L7836
ldr r3, .L8008+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L7837
ldr r3, .L8008+76
ldr r0, [sp, #104] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #116] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1034
.L2083:
ldr r3, .L8008+88
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L1038
ldr r3, .L8008+96
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L1039
mov r3, #0
str r3, [sp, #64]
.L1038:
ldr r3, [sp, #96]
cmp r3, #0
beq .L1039
.L2082:
ldr r3, .L8008+64
ldr r2, [sp, #112]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7838
.L1039:
mov r1, #0
ldr r0, [sp, #108] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #116] @ float
ldr r0, [sp, #104] @ float
str r3, [sp, #128]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #128]
str r2, [sp, #108]
ands r3, r3, r2
bne .L7839
.L1043:
ldr r3, [sp, #112]
subs r2, r3, #0
ldr r3, .L8008+72
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7840
.L1044:
ldr r3, .L8008+80
ldr r1, [sp, #116] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #132] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7841
.L1046:
ldr r3, [sp, #96]
cmp r3, #0
bne .L1050
.L3158:
ldr r3, .L8008+64
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #112]
orrs r2, r3, r2
bne .L1051
ldr r3, .L8008+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7842
.L1051:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #104]
beq .L7843
.L1053:
ldr r3, [sp, #108]
cmp r3, #0
beq .L1059
.L2712:
ldr r3, .L8008+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1060
.L2068:
ldr r3, [sp, #96]
cmp r3, #0
bne .L1059
.L1773:
ldr r3, .L8008+84
ldr r1, [sp, #120] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #128]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L1061
.L1059:
ldr r3, [sp, #112]
cmp r3, #0
beq .L1061
ldr r3, .L8008+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1061
.L2710:
ldr r3, .L8008
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1061
ldr r3, .L8008+88
ldr r2, .L8008+96
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #104]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L1064:
ldr r3, [sp, #96]
cmp r3, #0
bne .L7844
ldr r3, [sp, #96]
str r3, [sp, #104]
.L1066:
ldr r3, .L8008+64
ldr r2, [sp, #144]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #136]
orrs r3, r2, r3
beq .L7845
.L1069:
ldr r3, .L8008+100
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8008+104
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L1070
cmp r3, #0
beq .L1071
ldr r3, .L8008+108
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L1071:
ldr r3, .L8008+112
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #96]
bne .L1072
.L1772:
ldr r3, .L8008+116
ldr r1, .L8008+388
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #132] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L8008+120
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #108] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L8008+124
ldr r0, [sp, #108] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #112] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L1074
ldr r3, [sp, #96]
subs r2, r3, #0
ldr r3, .L8008+128
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L1074:
ldr r3, .L8008+132
ldr r2, [sp, #96]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #116]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #148]
str r3, [sp, #144]
beq .L1075
ldr r3, .L8008+136
ldr r2, .L8008+128
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L1075
ldr r3, .L8008+140
ldr r0, [sp, #108] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1075
ldr r3, .L8008+144
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #112] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L8008
str r2, [sp, #64]
str r3, [sp, #68]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L1075
ldr r3, .L8008+148
ldr r0, [sp, #132] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1078
.L1075:
ldr r3, .L8008
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8008+152
ldr r3, .L8008+156
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8008+160
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
.L1078:
ldr r3, [sp, #96]
cmp r3, #0
beq .L1080
ldr r3, .L8008+128
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1081
.L1080:
ldr r3, .L8008+148
ldr r1, [sp, #132] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #112] @ float
str r3, [sp, #64]
bl __aeabi_fcmpeq
ldr r3, [sp, #64]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L1082
.L1081:
ldr r3, .L8008+136
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #116]
orrs r2, r3, r2
str r2, [sp, #64]
bne .L1082
ldr r3, .L8008
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1082
ldr r2, .L8008+152
ldr r3, .L8008+156
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8008+160
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #64]
bne .L95
.L1085:
ldr r3, [sp, #96]
cmp r3, #0
beq .L7846
ldr r3, .L8008+128
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L7847
ldr r3, .L8008+140
ldr r0, [sp, #108] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #128] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1095
.L2058:
ldr r3, .L8008+152
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L1099
ldr r3, .L8008+160
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L1100
mov r3, #0
str r3, [sp, #64]
.L1099:
ldr r3, [sp, #96]
cmp r3, #0
beq .L1100
.L2057:
ldr r3, .L8008+128
ldr r2, [sp, #116]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7848
.L1100:
mov r1, #0
ldr r0, [sp, #112] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #128] @ float
ldr r0, [sp, #108] @ float
str r3, [sp, #120]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #120]
str r2, [sp, #112]
ands r3, r3, r2
bne .L7849
.L1104:
ldr r3, [sp, #116]
subs r2, r3, #0
ldr r3, .L8008+136
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7850
.L1105:
ldr r3, .L8008+144
ldr r1, [sp, #128] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #136] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7851
.L1107:
ldr r3, [sp, #96]
cmp r3, #0
bne .L1111
.L3153:
ldr r3, .L8008+128
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #116]
orrs r2, r3, r2
bne .L1112
ldr r3, .L8008+136
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7852
.L1112:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #108]
beq .L7853
.L1114:
ldr r3, [sp, #112]
cmp r3, #0
beq .L1120
.L2691:
ldr r3, .L8008+128
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1121
.L2043:
ldr r3, [sp, #96]
cmp r3, #0
bne .L1120
.L1766:
ldr r3, .L8008+148
ldr r1, [sp, #132] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #120]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L1122
.L1120:
ldr r3, [sp, #116]
cmp r3, #0
beq .L1122
ldr r3, .L8008+136
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1122
.L2689:
ldr r3, .L8008
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1122
ldr r3, .L8008+152
ldr r2, .L8008+160
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #108]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L1125:
ldr r3, [sp, #96]
cmp r3, #0
bne .L7854
ldr r3, [sp, #96]
str r3, [sp, #108]
.L1127:
ldr r3, .L8008+128
ldr r2, [sp, #148]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #144]
orrs r3, r2, r3
beq .L7855
.L1130:
ldr r3, .L8008+164
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8008+168
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L1131
cmp r3, #0
beq .L1132
ldr r3, .L8008+172
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L1132:
ldr r3, .L8008+176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #96]
bne .L1133
.L1765:
ldr r3, .L8008+180
ldr r1, .L8008+388
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #136] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L8008+184
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #112] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L8008+188
ldr r0, [sp, #112] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #116] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L1135
ldr r3, [sp, #96]
subs r2, r3, #0
ldr r3, .L8008+224
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L1135:
ldr r3, .L8008+192
ldr r2, [sp, #96]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #128]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #152]
str r3, [sp, #148]
beq .L1136
ldr r3, .L8008+212
ldr r2, .L8008+224
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L1136
ldr r3, .L8008+200
ldr r0, [sp, #112] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1136
ldr r3, .L8008+204
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #116] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L8008
str r2, [sp, #64]
str r3, [sp, #68]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L1136
ldr r3, .L8008+208
ldr r0, [sp, #136] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1139
.L1136:
ldr r3, .L8008
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8008+216
ldr r3, .L8008+196
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8008+220
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
.L1139:
ldr r3, [sp, #96]
cmp r3, #0
beq .L1141
ldr r3, .L8008+224
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1142
.L1141:
ldr r3, .L8008+208
ldr r1, [sp, #136] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #116] @ float
str r3, [sp, #64]
bl __aeabi_fcmpeq
ldr r3, [sp, #64]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L1143
.L1142:
ldr r3, .L8008+212
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #128]
orrs r2, r3, r2
str r2, [sp, #64]
bne .L1143
ldr r3, .L8008
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
b .L8009
.L8010:
.align 2
.L8008:
.word delta
.word s5_backoff
.word s5_evt0
.word s5_evt2
.word s5_evt1
.word _x_s5_l1
.word s5_l1
.word s5_lambda
.word s5_x
.word _x_s4_evt2
.word _x_s4_evt0
.word _x_s4_evt1
.word _x_s4_l0
.word _x_s4_backoff
.word _x_s4_lambda
.word _x_s4_x
.word _x_s4_l1
.word s4_l0
.word s4_l1
.word s4_lambda
.word s4_x
.word s4_backoff
.word s4_evt0
.word s4_evt2
.word s4_evt1
.word _x_s3_evt2
.word _x_s3_evt0
.word _x_s3_evt1
.word _x_s3_l0
.word _x_s3_backoff
.word _x_s3_lambda
.word _x_s3_x
.word _x_s3_l1
.word s3_l0
.word s3_l1
.word s3_lambda
.word s3_x
.word s3_backoff
.word s3_evt0
.word s3_evt2
.word s3_evt1
.word _x_s2_evt2
.word _x_s2_evt0
.word _x_s2_evt1
.word _x_s2_l0
.word _x_s2_backoff
.word _x_s2_lambda
.word _x_s2_x
.word s2_l0
.word s2_evt2
.word s2_lambda
.word s2_x
.word s2_backoff
.word s2_l1
.word s2_evt0
.word s2_evt1
.word _x_s2_l1
.word _x_s1_evt2
.word _x_s1_evt0
.word _x_s1_evt1
.word _x_s1_l0
.word _x_s1_backoff
.word _x_s1_lambda
.word _x_s1_x
.word s1_l0
.word s1_evt2
.word s1_lambda
.word s1_x
.word s1_backoff
.word s1_l1
.word s1_evt0
.word s1_evt1
.word _x_s1_l1
.word _x_s0_evt2
.word _x_s0_evt0
.word _x_s0_evt1
.word _x_s0_l0
.word _x_s0_backoff
.word _x_s0_lambda
.word _x_s0_x
.word s0_l0
.word s0_evt2
.word s0_lambda
.word s0_x
.word s0_backoff
.word s0_l1
.word s0_evt0
.word s0_evt1
.word _x_s0_l1
.word _x_bus_evt2
.word _x_bus_evt0
.word _x_bus_l0
.word delta
.word bus_x
.word bus_evt2
.word bus_j
.word _x_bus_l1
.word 1095761920
.word bus_evt0
.word bus_evt1
.word bus_cd_id
.word bus_l0
.word bus_l1
.L8009:
cmp r0, #0
beq .L1143
ldr r2, .L8008+216
ldr r3, .L8008+196
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8008+220
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #64]
bne .L95
.L1146:
ldr r3, [sp, #96]
cmp r3, #0
beq .L7856
ldr r3, .L8008+224
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L7857
ldr r3, .L8008+200
ldr r0, [sp, #112] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #120] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1156
.L2033:
ldr r3, .L8008+216
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L1160
ldr r3, .L8008+220
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L1161
mov r3, #0
str r3, [sp, #64]
.L1160:
ldr r3, [sp, #96]
cmp r3, #0
beq .L1161
.L2032:
ldr r3, .L8008+224
ldr r2, [sp, #128]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7858
.L1161:
mov r1, #0
ldr r0, [sp, #116] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #120] @ float
ldr r0, [sp, #112] @ float
str r3, [sp, #132]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #132]
str r2, [sp, #116]
ands r3, r3, r2
bne .L7859
.L1165:
ldr r3, [sp, #128]
subs r2, r3, #0
ldr r3, .L8008+212
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7860
.L1166:
ldr r3, .L8008+204
ldr r1, [sp, #120] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #144] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7861
.L1168:
ldr r3, [sp, #96]
cmp r3, #0
bne .L1172
.L3148:
ldr r3, .L8008+224
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #128]
orrs r2, r3, r2
bne .L1173
ldr r3, .L8008+212
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7862
.L1173:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #112]
beq .L7863
.L1175:
ldr r3, [sp, #116]
cmp r3, #0
beq .L1181
.L2670:
ldr r3, .L8008+224
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1182
.L2018:
ldr r3, [sp, #96]
cmp r3, #0
bne .L1181
.L1759:
ldr r3, .L8008+208
ldr r1, [sp, #136] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #132]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L1183
.L1181:
ldr r3, [sp, #128]
cmp r3, #0
beq .L1183
ldr r3, .L8008+212
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1183
.L2668:
ldr r3, .L8008+368
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1183
ldr r3, .L8008+216
ldr r2, .L8008+220
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #112]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L1186:
ldr r3, [sp, #96]
cmp r3, #0
bne .L7864
ldr r3, [sp, #96]
str r3, [sp, #112]
.L1188:
ldr r3, .L8008+224
ldr r2, [sp, #152]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #148]
orrs r3, r2, r3
beq .L7865
.L1191:
ldr r3, .L8008+228
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8008+232
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L1192
cmp r3, #0
beq .L1193
ldr r3, .L8008+236
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L1193:
ldr r3, .L8008+240
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #116]
bne .L1194
.L1758:
ldr r3, .L8008+244
ldr r1, .L8008+388
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #144] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L8008+248
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #64] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L8008+252
ldr r0, [sp, #64] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #128] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L1196
ldr r3, [sp, #116]
subs r2, r3, #0
ldr r3, .L8008+288
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L1196:
ldr r3, .L8008+256
ldr r2, [sp, #116]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #120]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #156]
str r3, [sp, #152]
beq .L1197
ldr r3, .L8008+276
ldr r2, .L8008+288
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L1197
ldr r3, .L8008+264
ldr r0, [sp, #64] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1197
ldr r3, .L8008+268
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #128] @ float
str r2, [sp, #96]
str r3, [sp, #100]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #96
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L8008+368
str r2, [sp, #96]
str r3, [sp, #100]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #96
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L1197
ldr r3, .L8008+272
ldr r0, [sp, #144] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1200
.L1197:
ldr r3, .L8008+368
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8008+280
ldr r3, .L8008+260
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8008+284
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
.L1200:
ldr r3, [sp, #116]
cmp r3, #0
beq .L1202
ldr r3, .L8008+288
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1203
.L1202:
ldr r3, .L8008+272
ldr r1, [sp, #144] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #128] @ float
str r3, [sp, #96]
bl __aeabi_fcmpeq
ldr r3, [sp, #96]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L1204
.L1203:
ldr r3, .L8008+276
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #120]
orrs r2, r3, r2
str r2, [sp, #96]
bne .L1204
ldr r3, .L8008+368
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1204
ldr r2, .L8008+280
ldr r3, .L8008+260
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8008+284
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #96]
bne .L95
.L1207:
ldr r3, [sp, #116]
cmp r3, #0
beq .L7866
ldr r3, .L8008+288
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #96]
bne .L7867
ldr r3, .L8008+264
ldr r0, [sp, #64] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #132] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1217
.L2008:
ldr r3, .L8008+280
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #96]
beq .L1221
ldr r3, .L8008+284
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #96]
beq .L1222
mov r3, #0
str r3, [sp, #96]
.L1221:
ldr r3, [sp, #116]
cmp r3, #0
beq .L1222
.L2007:
ldr r3, .L8008+288
ldr r2, [sp, #120]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7868
.L1222:
mov r1, #0
ldr r0, [sp, #128] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #132] @ float
ldr r0, [sp, #64] @ float
str r3, [sp, #136]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #136]
str r2, [sp, #128]
ands r3, r3, r2
bne .L7869
.L1226:
ldr r3, [sp, #120]
subs r2, r3, #0
ldr r3, .L8008+276
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7870
.L1227:
ldr r3, .L8008+268
ldr r1, [sp, #132] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #148] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7871
.L1229:
ldr r3, [sp, #116]
cmp r3, #0
bne .L1233
.L3143:
ldr r3, .L8008+288
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #120]
orrs r2, r3, r2
bne .L1234
ldr r3, .L8008+276
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7872
.L1234:
ldr r3, [sp, #96]
cmp r3, #0
strne r3, [sp, #64]
beq .L7873
.L1236:
ldr r3, [sp, #128]
cmp r3, #0
beq .L1242
.L2649:
ldr r3, .L8008+288
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1243
.L1993:
ldr r3, [sp, #116]
cmp r3, #0
bne .L1242
.L1752:
ldr r3, .L8008+272
ldr r1, [sp, #144] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #136]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L1244
.L1242:
ldr r3, [sp, #120]
cmp r3, #0
beq .L1244
ldr r3, .L8008+276
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1244
.L2647:
ldr r3, .L8008+368
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1244
ldr r3, .L8008+280
ldr r2, .L8008+284
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L1247:
ldr r3, [sp, #116]
cmp r3, #0
bne .L7874
ldr r3, [sp, #116]
str r3, [sp, #64]
.L1249:
ldr r3, .L8008+288
ldr r2, [sp, #156]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #152]
orrs r3, r2, r3
beq .L7875
.L1252:
ldr r3, .L8008+292
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8008+296
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L1253
cmp r3, #0
beq .L1254
ldr r3, .L8008+300
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
.L1254:
ldr r3, .L8008+304
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #128]
bne .L1255
.L1751:
ldr r3, .L8008+308
ldr r1, .L8008+388
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #148] @ float
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L8008+312
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #116] @ float
bl __aeabi_fcmple
cmp r0, #0
movne r2, #0
bne .L95
ldr r2, .L8008+316
ldr r0, [sp, #116] @ float
ldr r2, [r2] @ float
mov r1, r2
str r2, [sp, #120] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L1257
ldr r3, [sp, #128]
subs r2, r3, #0
ldr r3, .L8008+352
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L95
.L1257:
ldr r3, .L8008+320
ldr r2, [sp, #128]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
str r3, [sp, #132]
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
str r2, [sp, #160]
str r3, [sp, #156]
beq .L1258
ldr r3, .L8008+340
ldr r2, .L8008+352
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
beq .L1258
ldr r3, .L8008+328
ldr r0, [sp, #116] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1258
ldr r3, .L8008+332
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #120] @ float
str r2, [sp, #96]
str r3, [sp, #100]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #96
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r1, .L8008+368
str r2, [sp, #96]
str r3, [sp, #100]
ldr r0, [r1] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #96
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L1258
ldr r3, .L8008+336
ldr r0, [sp, #148] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1261
.L1258:
ldr r3, .L8008+368
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8008+344
ldr r3, .L8008+324
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8008+348
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
.L1261:
ldr r3, [sp, #128]
cmp r3, #0
beq .L1263
ldr r3, .L8008+352
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1264
.L1263:
ldr r3, .L8008+336
ldr r1, [sp, #148] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
mov r1, #0
ldr r0, [sp, #120] @ float
str r3, [sp, #96]
bl __aeabi_fcmpeq
ldr r3, [sp, #96]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L1265
.L1264:
ldr r3, .L8008+340
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #132]
orrs r2, r3, r2
str r2, [sp, #96]
bne .L1265
ldr r3, .L8008+368
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1265
ldr r2, .L8008+344
ldr r3, .L8008+324
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8008+348
ldrb r3, [r3] @ zero_extendqisi2
ldrb r1, [r2] @ zero_extendqisi2
orr r3, r3, r0
orrs r3, r3, r1
ldrne r2, [sp, #96]
bne .L95
.L1268:
ldr r3, [sp, #128]
cmp r3, #0
beq .L7876
ldr r3, .L8008+352
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #96]
bne .L7877
ldr r3, .L8008+328
ldr r0, [sp, #116] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #136] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1278
.L1983:
ldr r3, .L8008+344
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #96]
beq .L1282
ldr r3, .L8008+348
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #96]
beq .L1283
mov r3, #0
str r3, [sp, #96]
.L1282:
ldr r3, [sp, #128]
cmp r3, #0
beq .L1283
.L1982:
ldr r3, .L8008+352
ldr r2, [sp, #132]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7878
.L1283:
mov r1, #0
ldr r0, [sp, #120] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #136] @ float
ldr r0, [sp, #116] @ float
str r3, [sp, #144]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #144]
str r2, [sp, #120]
ands r3, r3, r2
bne .L7879
.L1287:
ldr r3, [sp, #132]
subs r2, r3, #0
ldr r3, .L8008+340
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
beq .L7880
.L1288:
ldr r3, .L8008+332
ldr r1, [sp, #136] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #152] @ float
bl __aeabi_fcmpge
cmp r0, #0
bne .L7881
.L1290:
ldr r3, [sp, #128]
cmp r3, #0
bne .L1294
.L3138:
ldr r3, .L8008+352
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #132]
orrs r2, r3, r2
bne .L1295
ldr r3, .L8008+340
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7882
.L1295:
ldr r3, [sp, #96]
cmp r3, #0
strne r3, [sp, #116]
beq .L7883
.L1297:
ldr r3, [sp, #120]
cmp r3, #0
beq .L1303
.L2628:
ldr r3, .L8008+352
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1304
.L1968:
ldr r3, [sp, #128]
cmp r3, #0
bne .L1303
.L1745:
ldr r3, .L8008+336
ldr r1, [sp, #148] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
ldr r3, [sp, #144]
cmp r0, #0
moveq r3, #0
andne r3, r3, #1
cmp r3, #0
bne .L1305
.L1303:
ldr r3, [sp, #132]
cmp r3, #0
beq .L1305
ldr r3, .L8008+340
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1305
.L2626:
ldr r3, .L8008+368
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1305
ldr r3, .L8008+344
ldr r2, .L8008+348
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #116]
orr r3, r2, r3
tst r3, #255
movne r2, #0
bne .L95
.L1308:
ldr r3, [sp, #128]
cmp r3, #0
bne .L7884
ldr r3, [sp, #128]
str r3, [sp, #116]
.L1310:
ldr r3, .L8008+352
ldr r2, [sp, #160]
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
mov r3, r2
ldr r2, [sp, #156]
orrs r3, r2, r3
beq .L7885
.L1313:
ldr r3, .L8008+356
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8008+360
cmp r2, #0
ldrb r3, [r3] @ zero_extendqisi2
bne .L1314
cmp r3, #0
bne .L7886
.L1315:
ldr r3, .L8008+364
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #128]
bne .L1317
ldr r3, [r4] @ float
str r3, [sp, #132] @ float
.L7651:
ldr r3, [r6] @ float
str r3, [sp, #148] @ float
.L1741:
ldr r3, .L8008+368
mov r1, #0
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #96] @ float
bl __aeabi_fcmple
subs r2, r0, #0
str r2, [sp, #120]
ldr r0, [sp, #96] @ float
bne .L1318
bl __aeabi_f2d
ldr r3, .L8008+372
str r0, [sp, #272]
str r1, [sp, #276]
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #144] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #132] @ float
str r2, [sp, #136]
str r3, [sp, #140]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
add r3, sp, #272
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
subs r2, r0, #0
beq .L95
ldr r3, .L8008+404
ldr r1, [sp, #128]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r1, #0
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
ldreq r2, [sp, #120]
beq .L95
ldr r3, .L8008+408
ldr r1, .L8008+384
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r1] @ zero_extendqisi2
clz r3, r3
subs r2, r2, #0
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
ldreq r2, [sp, #120]
beq .L95
ldr r3, .L8008+380
ldr r2, [r3]
ldr r3, [r7]
cmp r2, r3
ldrne r2, [sp, #120]
bne .L95
.L1320:
ldr r3, .L8008+408
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8008+384
clz r1, r2
ldrb r3, [r3] @ zero_extendqisi2
lsr r1, r1, #5
subs r3, r3, #0
movne r3, #1
cmp r1, r3
beq .L1321
ldr r3, .L8008+380
ldr r3, [r3]
mov r1, r3
str r3, [sp, #120]
ldr r3, [r7]
cmp r1, r3
beq .L1323
.L1321:
ldr r3, .L8008+376
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1324
ldr r2, .L8008+392
ldr r1, .L8008+396
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orrs r2, r2, r1
beq .L95
mov r1, #0
ldr r0, [sp, #96] @ float
str r3, [sp, #120]
bl __aeabi_fcmpeq
clz r1, r0
ldr r3, .L8008+404
lsr r1, r1, #5
ldrb r0, [r3] @ zero_extendqisi2
ldr r3, .L8008+408
ldrb r2, [r3] @ zero_extendqisi2
orrs r3, r0, r2
moveq ip, r1
movne ip, #1
cmp ip, #0
moveq r2, ip
ldr r3, [sp, #120]
beq .L95
.L1331:
ldr ip, .L8008+380
ldr lr, [r7]
ldr ip, [ip]
str lr, [sp, #120]
cmp ip, lr
ldrne lr, [sp, #120]
strne ip, [sp, #120]
strne lr, [sp, #136]
beq .L1961
.L1333:
cmp r2, #0
beq .L1334
cmp r0, #0
movne r1, #1
cmp r1, #0
beq .L7887
.L1334:
cmp r3, #0
bne .L1328
.L1962:
ldr r3, .L8008+396
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1336
ldr r3, .L8008+392
mov r1, #0
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, [sp, #132] @ float
clz r3, r3
str r3, [sp, #152]
bl __aeabi_fcmpeq
ldr r3, [sp, #152]
cmp r0, #0
lsr r3, r3, #5
moveq r3, #0
cmp r3, #0
bne .L1337
.L1336:
mov r1, #0
ldr r0, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1335
.L1341:
mov r3, #0
.L1348:
ldr r2, [sp, #128]
cmp r2, #0
beq .L1354
.L1953:
ldr r2, .L8008+384
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1354
ldr r0, [sp, #144] @ float
ldr r1, .L8008+388
str r3, [sp, #152]
bl __aeabi_fcmpge
cmp r0, #0
ldr r3, [sp, #152]
bne .L1354
.L2615:
ldr r2, .L8008+392
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1354
ldr r2, .L8008+396
ldrb r2, [r2] @ zero_extendqisi2
orrs r2, r3, r2
bne .L1354
ldr r3, .L8008+400
ldr r2, [sp, #120]
ldr r3, [r3]
mov r1, #0
sub r3, r3, r2
clz r3, r3
ldr r0, [sp, #132] @ float
lsr r3, r3, #5
str r3, [sp, #144]
bl __aeabi_fcmpeq
cmp r0, #0
ldr r3, [sp, #144]
moveq r3, #0
cmp r3, #0
bne .L7888
.L1354:
ldr r2, .L8008+404
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1352
str r3, [sp, #152]
ldr r3, .L8008+408
mov r1, #0
ldrb r2, [r3] @ zero_extendqisi2
ldr r0, [sp, #96] @ float
subs r2, r2, #0
movne r2, #1
str r2, [sp, #144]
bl __aeabi_fcmpeq
cmp r0, #0
ldr r2, [sp, #144]
moveq r2, #1
cmp r2, #0
ldr r3, [sp, #152]
beq .L2614
.L1352:
ldr r2, [sp, #120]
ldr r1, [sp, #136]
sub r2, r2, r1
cmn r2, #1
beq .L7889
mov r1, #0
ldr r0, [sp, #96] @ float
str r3, [sp, #144]
bl __aeabi_fcmpeq
cmp r0, #0
ldr r3, [sp, #144]
beq .L1366
cmp r3, #0
bne .L1367
.L2609:
ldr r3, .L8011
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1368
ldr r3, .L8011+4
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7890
.L1369:
mov r1, #0
ldr r0, [sp, #148] @ float
str r3, [sp, #128]
bl __aeabi_fcmpge
subs r2, r0, #0
beq .L95
ldr r3, .L8011+8
ldr r2, .L8011+12
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #260]
str r2, [sp, #264]
orr r3, r3, r2
ldr r2, [sp, #116]
str r3, [sp, #268]
orr r2, r2, r3
tst r2, #255
ldr r2, .L8011+16
ldr r3, [sp, #128]
ldrb r2, [r2] @ zero_extendqisi2
beq .L1376
ldr r1, .L8011+20
ldr r0, .L8011+24
ldrb r1, [r1] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, .L8011+28
orr r2, r2, r0
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L8011+32
orr r2, r2, r1
ldr r1, .L8011+36
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8011+140
orr r2, r2, r1
ldr r1, .L8011+144
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8011+148
orr r2, r2, r1
ldr r1, .L8011+152
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8011+156
orr r2, r2, r1
ldr r1, .L8011+160
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8011+164
orr r2, r2, r1
ldr r1, .L8011+168
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8011+172
orr r2, r2, r1
ldr r1, .L8011+48
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8011+52
orr r2, r2, r1
ldr r1, .L8011+56
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8011+60
orr r2, r2, r1
ldr r1, .L8011+64
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8011+68
orr r2, r2, r1
ldr r1, .L8011+72
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8011+76
orr r2, r2, r1
ldr r1, .L8011+80
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8011+84
orr r2, r2, r1
ldr r1, .L8011+88
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8011+92
orr r2, r2, r1
ldr r1, .L8011+96
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8011+100
orr r2, r2, r1
ldr r1, .L8011+104
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8011+108
orr r2, r2, r1
ldr r1, .L8011+112
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8011+116
orr r2, r2, r1
ldr r1, .L8011+120
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8011+124
orr r2, r2, r1
ldr r1, .L8011+128
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8011+132
orr r2, r2, r1
ldr r1, .L8011+136
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
ldr r1, [sp, #12]
orr r2, r1, r2
ldr r1, [sp, #16]
orr r2, r1, r2
ldr r1, [sp, #24]
orr r2, r1, r2
ldr r1, [sp, #32]
orr r2, r1, r2
ldr r1, [sp]
orr r2, r1, r2
ldr r1, [sp, #40]
orr r2, r1, r2
ldr r1, [sp, #48]
orr r2, r1, r2
ldr r1, [sp, #56]
orr r2, r1, r2
ldr r1, [sp, #72]
orr r2, r1, r2
ldr r1, [sp, #76]
orr r2, r1, r2
ldr r1, [sp, #80]
orr r2, r1, r2
ldr r1, [sp, #84]
orr r2, r1, r2
ldr r1, [sp, #88]
orr r2, r1, r2
ldr r1, [sp, #92]
orr r2, r1, r2
ldr r1, [sp, #104]
orr r2, r1, r2
ldr r1, [sp, #108]
orr r2, r1, r2
ldr r1, [sp, #112]
orr r2, r1, r2
ldr r1, [sp, #64]
orr r2, r1, r2
tst r2, #255
bne .L1378
.L1377:
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L1379:
ldr r2, .L8011+24
ldr r1, .L8011+28
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #112]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+16
ldr r1, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r1, r2
tst r2, #255
bne .L1381
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L1381:
ldr r2, .L8011+32
ldr r1, .L8011+36
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #108]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+16
ldr r1, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r1, r2
tst r2, #255
bne .L1382
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L1382:
ldr r2, .L8011+140
ldr r1, .L8011+144
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #104]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+16
ldr r1, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r1, r2
tst r2, #255
bne .L1383
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L1383:
ldr r2, .L8011+148
ldr r1, .L8011+152
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #92]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+16
ldr r1, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r1, r2
tst r2, #255
bne .L1384
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L1384:
ldr r2, .L8011+156
ldr r1, .L8011+160
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #88]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+16
ldr r1, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r1, r2
tst r2, #255
bne .L1385
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L1385:
ldr r2, .L8011+164
ldr r1, .L8011+168
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #84]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+16
ldr r1, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r1, r2
tst r2, #255
bne .L1386
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L1386:
ldr r2, .L8011+172
ldr r1, .L8011+48
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #80]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+16
ldr r1, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r1, r2
tst r2, #255
bne .L1387
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L1387:
ldr r2, .L8011+52
ldr r1, .L8011+56
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #76]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+16
ldr r1, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r1, r2
tst r2, #255
bne .L1388
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L1388:
ldr r2, .L8011+60
ldr r1, .L8011+64
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #72]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+16
ldr r1, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r1, r2
tst r2, #255
bne .L1389
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L1389:
ldr r2, .L8011+68
ldr r1, .L8011+72
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #56]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+16
ldr r1, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r1, r2
tst r2, #255
bne .L1390
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L1390:
ldr r2, .L8011+76
ldr r1, .L8011+80
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #48]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+16
ldr r1, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r1, r2
tst r2, #255
bne .L1391
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L1391:
ldr r2, .L8011+84
ldr r1, .L8011+88
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #40]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+16
ldr r1, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r1, r2
tst r2, #255
bne .L1392
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L1392:
ldr r2, .L8011+92
ldr r1, .L8011+96
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+16
ldr r1, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r1, r2
tst r2, #255
bne .L1393
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L1393:
ldr r2, .L8011+100
ldr r1, .L8011+104
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #32]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+16
ldr r1, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r1, r2
tst r2, #255
bne .L1394
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L1394:
ldr r2, .L8011+108
ldr r1, .L8011+112
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #24]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+16
ldr r1, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r1, r2
tst r2, #255
bne .L1395
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L1395:
ldr r2, .L8011+116
ldr r1, .L8011+120
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+16
ldr r1, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r1, r2
tst r2, #255
bne .L7654
ldr r2, .L8011+20
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1380
.L7654:
ldr r2, .L8011+124
ldr r1, .L8011+128
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+132
ldr r1, .L8011+136
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
.L1380:
ldr r2, .L8011+24
ldr lr, [sp, #112]
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8011+28
str r0, [sp, #200]
ldrb ip, [r2] @ zero_extendqisi2
orr r2, r0, ip
str r2, [sp, #128]
orr r2, lr, r2
tst r2, #255
str ip, [sp, #204]
beq .L1398
ldr r2, .L8011+32
ldr r1, .L8011+36
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #108]
orr r2, r1, r2
tst r2, #255
bne .L1378
orr r1, r0, lr
tst r1, #255
bne .L1399
cmp ip, #0
bne .L7891
.L1398:
ldr r2, .L8011+32
ldr lr, [sp, #108]
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8011+36
str r0, [sp, #120]
ldrb ip, [r2] @ zero_extendqisi2
orr r2, r0, ip
str r2, [sp, #336]
orr r2, lr, r2
tst r2, #255
str ip, [sp, #208]
beq .L1428
ldr r2, .L8011+140
ldr r1, .L8011+144
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #104]
orr r2, r1, r2
tst r2, #255
bne .L1378
orr r1, r0, lr
tst r1, #255
bne .L1429
cmp ip, #0
bne .L7892
.L1428:
ldr r2, .L8011+140
ldr lr, [sp, #104]
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8011+144
str r0, [sp, #132]
ldrb ip, [r2] @ zero_extendqisi2
orr r2, r0, ip
str r2, [sp, #280]
orr r2, r2, lr
tst r2, #255
str ip, [sp, #136]
beq .L1456
ldr r2, .L8011+148
ldr r1, .L8011+152
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #92]
orr r2, r1, r2
tst r2, #255
bne .L1378
orr r1, r0, lr
tst r1, #255
bne .L1457
cmp ip, #0
beq .L1456
ldr r2, .L8011+156
ldr r1, .L8011+160
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #88]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+164
ldr r1, .L8011+168
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #84]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+172
ldr r1, .L8011+48
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #80]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+52
ldr r1, .L8011+56
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #76]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+60
ldr r1, .L8011+64
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #72]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+68
ldr r1, .L8011+72
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #56]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, [sp, #136]
cmp r2, #0
beq .L1456
ldr r2, .L8011+76
ldr r1, .L8011+80
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #48]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+84
ldr r1, .L8011+88
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #40]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+92
ldr r1, .L8011+96
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+100
ldr r1, .L8011+104
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #32]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+108
ldr r1, .L8011+112
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #24]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+116
ldr r1, .L8011+120
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
bne .L1378
.L3101:
ldr r2, [sp, #136]
cmp r2, #0
beq .L1456
.L7655:
ldr r2, .L8011+124
ldr r1, .L8011+128
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+132
ldr r1, .L8011+136
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
.L1456:
ldr r2, .L8011+148
ldr lr, [sp, #92]
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8011+152
str r0, [sp, #144]
ldrb ip, [r2] @ zero_extendqisi2
orr r2, r0, ip
str r2, [sp, #284]
orr r2, r2, lr
tst r2, #255
str ip, [sp, #212]
beq .L1470
ldr r2, .L8011+156
ldr r1, .L8011+160
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #88]
orr r2, r1, r2
tst r2, #255
bne .L1378
orr r2, r0, lr
tst r2, #255
bne .L1471
cmp ip, #0
beq .L1470
.L1471:
ldr r2, .L8011+164
ldr r1, .L8011+168
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #84]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+172
ldr r1, .L8011+48
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #80]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+52
ldr r1, .L8011+56
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #76]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+60
ldr r1, .L8011+64
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #72]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+68
ldr r1, .L8011+72
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #56]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+76
ldr r1, .L8011+80
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #48]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+84
ldr r1, .L8011+88
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #40]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+92
ldr r1, .L8011+96
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+100
ldr r1, .L8011+104
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #32]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+108
ldr r1, .L8011+112
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #24]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+116
ldr r1, .L8011+120
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+124
ldr r1, .L8011+128
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+132
ldr r1, .L8011+136
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
.L1470:
ldr r2, .L8011+156
ldr lr, [sp, #88]
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8011+160
str r0, [sp, #148]
ldrb ip, [r2] @ zero_extendqisi2
orr r2, r0, ip
str r2, [sp, #312]
orr r2, r2, lr
tst r2, #255
str ip, [sp, #216]
beq .L1484
ldr r2, .L8011+164
ldr r1, .L8011+168
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #84]
orr r2, r1, r2
tst r2, #255
bne .L1378
orr r2, r0, lr
tst r2, #255
bne .L1485
cmp ip, #0
beq .L1484
ldr r2, .L8011+172
ldr r1, .L8011+48
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #80]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+52
ldr r1, .L8011+56
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #76]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+60
ldr r1, .L8011+64
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #72]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+68
ldr r1, .L8011+72
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #56]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+76
ldr r1, .L8011+80
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #48]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+84
ldr r1, .L8011+88
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #40]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, [sp, #216]
cmp r2, #0
beq .L1484
.L7666:
ldr r2, .L8011+92
ldr r1, .L8011+96
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+100
ldr r1, .L8011+104
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #32]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+108
ldr r1, .L8011+112
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #24]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+116
ldr r1, .L8011+120
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+124
ldr r1, .L8011+128
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+132
ldr r1, .L8011+136
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
.L1484:
ldr r2, .L8011+164
ldr lr, [sp, #84]
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8011+168
str r0, [sp, #152]
ldrb ip, [r2] @ zero_extendqisi2
orr r2, r0, ip
str r2, [sp, #316]
orr r2, r2, lr
tst r2, #255
str ip, [sp, #220]
beq .L1496
ldr r2, .L8011+172
ldr r1, .L8011+48
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #80]
orr r2, r1, r2
tst r2, #255
bne .L1378
orr r2, r0, lr
tst r2, #255
bne .L1497
cmp ip, #0
beq .L1496
b .L8012
.L8013:
.align 2
.L8011:
.word bus_evt0
.word bus_evt1
.word s0_evt0
.word s0_evt1
.word s1_evt0
.word s1_evt1
.word s2_evt0
.word s2_evt1
.word s3_evt0
.word s3_evt1
.word _x__diverge_delta
.word _diverge_delta
.word s8_evt1
.word s9_evt0
.word s9_evt1
.word s10_evt0
.word s10_evt1
.word s11_evt0
.word s11_evt1
.word s12_evt0
.word s12_evt1
.word s13_evt0
.word s13_evt1
.word s14_evt0
.word s14_evt1
.word s15_evt0
.word s15_evt1
.word s16_evt0
.word s16_evt1
.word s17_evt0
.word s17_evt1
.word s18_evt0
.word s18_evt1
.word s19_evt0
.word s19_evt1
.word s4_evt0
.word s4_evt1
.word s5_evt0
.word s5_evt1
.word s6_evt0
.word s6_evt1
.word s7_evt0
.word s7_evt1
.word s8_evt0
.L8012:
.L1497:
ldr r2, .L8011+52
ldr r1, .L8011+56
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #76]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+60
ldr r1, .L8011+64
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #72]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+68
ldr r1, .L8011+72
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #56]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+76
ldr r1, .L8011+80
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #48]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+84
ldr r1, .L8011+88
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #40]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+92
ldr r1, .L8011+96
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+100
ldr r1, .L8011+104
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #32]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+108
ldr r1, .L8011+112
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #24]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+116
ldr r1, .L8011+120
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+124
ldr r1, .L8011+128
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+132
ldr r1, .L8011+136
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
.L1496:
ldr r2, .L8011+172
ldr lr, [sp, #80]
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8011+48
str r0, [sp, #156]
ldrb ip, [r2] @ zero_extendqisi2
orr r2, r0, ip
str r2, [sp, #320]
orr r2, r2, lr
tst r2, #255
str ip, [sp, #224]
beq .L1508
ldr r2, .L8011+52
ldr r1, .L8011+56
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #76]
orr r2, r1, r2
tst r2, #255
bne .L1378
orr r2, r0, lr
tst r2, #255
bne .L1509
cmp ip, #0
beq .L1508
ldr r2, .L8011+60
ldr r1, .L8011+64
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #72]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+68
ldr r1, .L8011+72
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #56]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+76
ldr r1, .L8011+80
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #48]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+84
ldr r1, .L8011+88
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #40]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+92
ldr r1, .L8011+96
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+100
ldr r1, .L8011+104
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #32]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, [sp, #224]
cmp r2, #0
beq .L1508
.L7662:
ldr r2, .L8011+108
ldr r1, .L8011+112
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #24]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+116
ldr r1, .L8011+120
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+124
ldr r1, .L8011+128
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+132
ldr r1, .L8011+136
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
.L1508:
ldr r2, .L8011+52
ldr lr, [sp, #76]
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8011+56
str r0, [sp, #160]
ldrb ip, [r2] @ zero_extendqisi2
orr r2, r0, ip
str r2, [sp, #332]
orr r2, r2, lr
tst r2, #255
str ip, [sp, #228]
beq .L1518
ldr r2, .L8011+60
ldr r1, .L8011+64
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #72]
orr r2, r1, r2
tst r2, #255
bne .L1378
orr r2, r0, lr
tst r2, #255
bne .L1519
cmp ip, #0
beq .L1518
.L1519:
ldr r2, .L8011+68
ldr r1, .L8011+72
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #56]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+76
ldr r1, .L8011+80
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #48]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+84
ldr r1, .L8011+88
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #40]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+92
ldr r1, .L8011+96
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+100
ldr r1, .L8011+104
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #32]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+108
ldr r1, .L8011+112
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #24]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+116
ldr r1, .L8011+120
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+124
ldr r1, .L8011+128
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+132
ldr r1, .L8011+136
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
.L1518:
ldr r2, .L8011+60
ldr lr, [sp, #72]
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8011+64
str r0, [sp, #164]
ldrb ip, [r2] @ zero_extendqisi2
orr r2, r0, ip
str r2, [sp, #296]
orr r2, r2, lr
tst r2, #255
str ip, [sp, #232]
beq .L1528
ldr r2, .L8011+68
ldr r1, .L8011+72
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #56]
orr r2, r1, r2
tst r2, #255
bne .L1378
orr r2, r0, lr
tst r2, #255
bne .L1529
cmp ip, #0
beq .L1528
ldr r2, .L8011+76
ldr r1, .L8011+80
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #48]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+84
ldr r1, .L8011+88
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #40]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+92
ldr r1, .L8011+96
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+100
ldr r1, .L8011+104
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #32]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+108
ldr r1, .L8011+112
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #24]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+116
ldr r1, .L8011+120
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, [sp, #232]
cmp r2, #0
beq .L1528
.L7656:
ldr r2, .L8011+124
ldr r1, .L8011+128
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+132
ldr r1, .L8011+136
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
.L1528:
ldr r2, .L8011+68
ldr lr, [sp, #56]
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8011+72
str r0, [sp, #168]
ldrb ip, [r2] @ zero_extendqisi2
orr r2, r0, ip
str r2, [sp, #328]
orr r2, lr, r2
tst r2, #255
str ip, [sp, #236]
beq .L1536
ldr r2, .L8011+76
ldr r1, .L8011+80
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #48]
orr r2, r1, r2
tst r2, #255
bne .L1378
orr r2, r0, lr
tst r2, #255
bne .L1537
cmp ip, #0
beq .L1536
.L1537:
ldr r2, .L8011+84
ldr r1, .L8011+88
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #40]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+92
ldr r1, .L8011+96
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+100
ldr r1, .L8011+104
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #32]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+108
ldr r1, .L8011+112
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #24]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+116
ldr r1, .L8011+120
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+124
ldr r1, .L8011+128
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+132
ldr r1, .L8011+136
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
.L1536:
ldr r2, .L8011+76
ldr lr, [sp, #48]
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8011+80
str r0, [sp, #172]
ldrb ip, [r2] @ zero_extendqisi2
orr r2, r0, ip
str r2, [sp, #288]
orr r2, lr, r2
tst r2, #255
str ip, [sp, #248]
beq .L1544
ldr r2, .L8011+84
ldr r1, .L8011+88
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #40]
orr r2, r1, r2
tst r2, #255
bne .L1378
orr r2, r0, lr
tst r2, #255
bne .L1545
cmp ip, #0
bne .L1545
.L1544:
ldr r2, .L8011+84
ldr lr, [sp, #40]
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8011+88
str r0, [sp, #176]
ldrb ip, [r2] @ zero_extendqisi2
orr r2, r0, ip
str r2, [sp, #308]
orr r2, lr, r2
tst r2, #255
str ip, [sp, #240]
beq .L1550
ldr r2, .L8011+92
ldr r1, .L8011+96
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp]
orr r2, r1, r2
tst r2, #255
bne .L1378
orr r2, r0, lr
tst r2, #255
bne .L1551
cmp ip, #0
beq .L1550
.L1551:
ldr r2, .L8011+100
ldr r1, .L8011+104
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #32]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+108
ldr r1, .L8011+112
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #24]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+116
ldr r1, .L8011+120
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+124
ldr r1, .L8011+128
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+132
ldr r1, .L8011+136
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
.L1550:
ldr r2, .L8011+92
ldr lr, [sp]
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8011+96
str r0, [sp, #180]
ldrb ip, [r2] @ zero_extendqisi2
orr r2, r0, ip
str r2, [sp, #304]
orr r2, lr, r2
tst r2, #255
str ip, [sp, #252]
beq .L1556
ldr r2, .L8011+100
ldr r1, .L8011+104
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #32]
orr r2, r1, r2
tst r2, #255
bne .L1378
orr r2, r0, lr
tst r2, #255
bne .L1557
cmp ip, #0
bne .L1557
.L1556:
ldr r2, .L8011+100
ldr lr, [sp, #32]
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8011+104
str r0, [sp, #184]
ldrb ip, [r2] @ zero_extendqisi2
orr r2, r0, ip
str r2, [sp, #324]
orr r2, lr, r2
tst r2, #255
str ip, [sp, #244]
beq .L1560
ldr r2, .L8011+108
ldr r1, .L8011+112
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #24]
orr r2, r1, r2
tst r2, #255
bne .L1378
orr r2, r0, lr
tst r2, #255
bne .L1561
cmp ip, #0
beq .L1560
.L1561:
ldr r2, .L8011+116
ldr r1, .L8011+120
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+124
ldr r1, .L8011+128
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+132
ldr r1, .L8011+136
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
.L1560:
ldr r2, .L8011+108
ldr lr, [sp, #24]
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8011+112
str r0, [sp, #188]
ldrb ip, [r2] @ zero_extendqisi2
orr r2, r0, ip
str r2, [sp, #300]
orr r2, lr, r2
tst r2, #255
str ip, [sp, #256]
beq .L1564
ldr r2, .L8011+116
ldr r1, .L8011+120
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
bne .L1378
orr r2, r0, lr
tst r2, #255
bne .L7657
cmp ip, #0
beq .L1564
.L7657:
ldr r2, .L8011+124
ldr r1, .L8011+128
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+132
ldr r1, .L8011+136
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
.L1564:
ldr r2, .L8011+116
ldr ip, [sp, #16]
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8011+120
str r0, [sp, #192]
ldrb r2, [r2] @ zero_extendqisi2
str r2, [sp, #196]
orr r2, r0, r2
str r2, [sp, #292]
orr r2, ip, r2
tst r2, #255
beq .L1566
ldr r2, .L8011+124
ldr r1, .L8011+128
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
orr r2, r0, ip
tst r2, #255
bne .L1568
ldr r2, [sp, #196]
cmp r2, #0
bne .L1568
.L2518:
ldr r2, .L8011+124
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8011+128
ldrb r2, [r2] @ zero_extendqisi2
orrs r2, r1, r2
beq .L1570
.L1569:
ldr r2, [sp, #20]
cmp r2, #0
bne .L1378
.L2517:
ldr r2, .L8011+132
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8011+136
ldrb r2, [r2] @ zero_extendqisi2
orrs r2, r1, r2
beq .L1571
.L1378:
mov r1, #0
ldr r0, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
movne r2, #0
bne .L95
.L1572:
ldr r3, .L8011+40
ldr r0, [sp, #96] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp] @ float
bl __aeabi_fcmpeq
subs r2, r0, #0
str r2, [sp, #12]
bne .L1722
ldr r3, .L8011+44
mov r1, #1065353216
ldr r0, [r3] @ float
bl __aeabi_fcmpge
cmp r0, #0
ldr r2, [sp, #12]
bne .L95
.L1722:
ldr r3, .L8011+44
mov r1, #1065353216
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #12]
bl __aeabi_fcmpge
cmp r0, #0
movne r2, #1
bne .L95
ldr r3, [sp, #12]
mov r0, r3
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp] @ float
stm sp, {r2-r3}
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldmia sp, {r0-r1}
bl __aeabi_dsub
add r3, sp, #272
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
subs r2, r0, #0
movne r2, #1
b .L95
.L1376:
ldr r1, [sp, #64]
orr r2, r1, r2
tst r2, #255
bne .L1379
b .L1377
.L7891:
ldr r2, .L8011+140
ldr r1, .L8011+144
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #104]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+148
ldr r1, .L8011+152
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #92]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+156
ldr r1, .L8011+160
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #88]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+164
ldr r1, .L8011+168
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #84]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+172
ldr r1, .L8011+48
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #80]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+52
ldr r1, .L8011+56
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #76]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+60
ldr r1, .L8011+64
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #72]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+68
ldr r1, .L8011+72
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #56]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+76
ldr r1, .L8011+80
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #48]
orr r2, r1, r2
tst r2, #255
bne .L1378
.L3125:
ldr r2, [sp, #204]
cmp r2, #0
beq .L1398
.L1417:
ldr r2, .L8011+84
ldr r1, .L8011+88
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #40]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+92
ldr r1, .L8011+96
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+100
ldr r1, .L8011+104
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #32]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+108
ldr r1, .L8011+112
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #24]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+116
ldr r1, .L8011+120
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+124
ldr r1, .L8011+128
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+132
ldr r1, .L8011+136
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
b .L1398
.L1399:
ldr r2, .L8011+140
ldr r0, .L8011+144
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #104]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+148
ldr r0, .L8011+152
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #92]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+156
ldr r0, .L8011+160
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #88]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+164
ldr r0, .L8011+168
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #84]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8011+172
ldr r0, .L8014
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #80]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+4
ldr r0, .L8014+8
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #76]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+12
ldr r0, .L8014+16
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #72]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+20
ldr r0, .L8014+24
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #56]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+28
ldr r0, .L8014+32
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #48]
orr r2, r0, r2
tst r2, #255
bne .L1378
tst r1, #255
bne .L1417
b .L3125
.L1509:
ldr r2, .L8014+12
ldr r1, .L8014+16
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #72]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+20
ldr r1, .L8014+24
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #56]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+28
ldr r1, .L8014+32
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #48]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+36
ldr r1, .L8014+40
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #40]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+44
ldr r1, .L8014+48
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+52
ldr r1, .L8014+56
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #32]
orr r2, r1, r2
tst r2, #255
beq .L7662
b .L1378
.L1529:
ldr r2, .L8014+28
ldr r1, .L8014+32
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #48]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+36
ldr r1, .L8014+40
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #40]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+44
ldr r1, .L8014+48
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+52
ldr r1, .L8014+56
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #32]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+60
ldr r1, .L8014+64
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #24]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+68
ldr r1, .L8014+72
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
beq .L7656
b .L1378
.L1545:
ldr r2, .L8014+44
ldr r1, .L8014+48
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+52
ldr r1, .L8014+56
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #32]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+60
ldr r1, .L8014+64
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #24]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+68
ldr r1, .L8014+72
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+120
ldr r1, .L8014+124
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+116
ldr r1, .L8014+108
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
b .L1544
.L1557:
ldr r2, .L8014+60
ldr r1, .L8014+64
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #24]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+68
ldr r1, .L8014+72
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+120
ldr r1, .L8014+124
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+116
ldr r1, .L8014+108
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
b .L1556
.L7892:
ldr r2, .L8014+76
ldr r1, .L8014+80
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #92]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+84
ldr r1, .L8014+88
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #88]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+92
ldr r1, .L8014+96
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #84]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+100
ldr r1, .L8014
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #80]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+4
ldr r1, .L8014+8
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #76]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+12
ldr r1, .L8014+16
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #72]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+20
ldr r1, .L8014+24
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #56]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+28
ldr r1, .L8014+32
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #48]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+36
ldr r1, .L8014+40
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #40]
orr r2, r1, r2
tst r2, #255
bne .L1378
.L3111:
ldr r2, [sp, #208]
cmp r2, #0
beq .L1428
.L1447:
ldr r2, .L8014+44
ldr r1, .L8014+48
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+52
ldr r1, .L8014+56
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #32]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+60
ldr r1, .L8014+64
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #24]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+68
ldr r1, .L8014+72
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #16]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+120
ldr r1, .L8014+124
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+116
ldr r1, .L8014+108
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
b .L1428
.L1429:
ldr r2, .L8014+76
ldr r0, .L8014+80
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #92]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+84
ldr r0, .L8014+88
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #88]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+92
ldr r0, .L8014+96
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #84]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+100
ldr r0, .L8014
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #80]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+4
ldr r0, .L8014+8
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #76]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+12
ldr r0, .L8014+16
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #72]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+20
ldr r0, .L8014+24
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #56]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+28
ldr r0, .L8014+32
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #48]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+36
ldr r0, .L8014+40
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #40]
orr r2, r0, r2
tst r2, #255
bne .L1378
tst r1, #255
bne .L1447
b .L3111
.L1457:
ldr r2, .L8014+84
ldr r0, .L8014+88
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #88]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+92
ldr r0, .L8014+96
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #84]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+100
ldr r0, .L8014
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #80]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+4
ldr r0, .L8014+8
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #76]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+12
ldr r0, .L8014+16
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #72]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+20
ldr r0, .L8014+24
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #56]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+28
ldr r0, .L8014+32
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #48]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+36
ldr r0, .L8014+40
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #40]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+44
ldr r0, .L8014+48
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+52
ldr r0, .L8014+56
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #32]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+60
ldr r0, .L8014+64
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #24]
orr r2, r0, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+68
ldr r0, .L8014+72
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, [sp, #16]
orr r2, r0, r2
tst r2, #255
bne .L1378
tst r1, #255
bne .L7655
b .L3101
.L1485:
ldr r2, .L8014+100
ldr r1, .L8014
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #80]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+4
ldr r1, .L8014+8
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #76]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+12
ldr r1, .L8014+16
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #72]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+20
ldr r1, .L8014+24
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #56]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+28
ldr r1, .L8014+32
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #48]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8014+36
ldr r1, .L8014+40
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #40]
orr r2, r1, r2
tst r2, #255
beq .L7666
b .L1378
.L8015:
.align 2
.L8014:
.word s8_evt1
.word s9_evt0
.word s9_evt1
.word s10_evt0
.word s10_evt1
.word s11_evt0
.word s11_evt1
.word s12_evt0
.word s12_evt1
.word s13_evt0
.word s13_evt1
.word s14_evt0
.word s14_evt1
.word s15_evt0
.word s15_evt1
.word s16_evt0
.word s16_evt1
.word s17_evt0
.word s17_evt1
.word s5_evt0
.word s5_evt1
.word s6_evt0
.word s6_evt1
.word s7_evt0
.word s7_evt1
.word s8_evt0
.word bus_evt1
.word s19_evt1
.word bus_evt0
.word s19_evt0
.word s18_evt0
.word s18_evt1
.word s1_evt0
.word s1_evt1
.word bus_cd_id
.L1571:
mov r1, #0
ldr r0, [sp, #96] @ float
str r3, [sp, #340]
bl __aeabi_fcmpeq
cmp r0, #0
ldrne r3, [sp, #340]
beq .L1572
.L1728:
ldr r1, [sp, #128]
ldr r2, [sp, #120]
ldr r0, [sp, #196]
orr r2, r2, r1
ldr r1, [sp, #208]
orr r2, r1, r2
ldr r1, [sp, #132]
orr r2, r1, r2
ldr r1, [sp, #136]
orr r2, r1, r2
ldr r1, [sp, #144]
orr r2, r1, r2
ldr r1, [sp, #212]
orr r2, r1, r2
ldr r1, [sp, #148]
orr r2, r1, r2
ldr r1, [sp, #216]
orr r2, r1, r2
ldr r1, [sp, #152]
orr r2, r1, r2
ldr r1, [sp, #220]
orr r2, r1, r2
ldr r1, [sp, #156]
orr r2, r1, r2
ldr r1, [sp, #224]
orr r2, r1, r2
ldr r1, [sp, #160]
orr r2, r1, r2
ldr r1, [sp, #228]
orr r2, r1, r2
ldr r1, [sp, #164]
orr r2, r1, r2
ldr r1, [sp, #232]
orr r2, r1, r2
ldr r1, [sp, #168]
orr r2, r1, r2
ldr r1, [sp, #236]
orr r2, r1, r2
ldr r1, [sp, #172]
orr r2, r1, r2
ldr r1, [sp, #248]
orr r2, r1, r2
ldr r1, [sp, #176]
orr r2, r1, r2
ldr r1, [sp, #240]
orr r2, r1, r2
ldr r1, [sp, #180]
orr r2, r1, r2
ldr r1, [sp, #252]
orr r2, r1, r2
ldr r1, [sp, #184]
orr r2, r1, r2
ldr r1, [sp, #244]
orr r2, r1, r2
ldr r1, [sp, #188]
orr r2, r1, r2
ldr r1, [sp, #256]
orr r2, r1, r2
ldr r1, [sp, #192]
orr r2, r1, r2
ldr r1, .L8014+108
orr r2, r0, r2
ldrb r1, [r1] @ zero_extendqisi2
ldr r0, .L8014+120
orr r2, r2, r1
ldr r1, .L8014+124
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
ldr r0, .L8014+128
orr r2, r2, r1
ldr r1, .L8014+132
ldrb r0, [r0] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r0
orr r2, r2, r1
ldr r1, [sp, #12]
orr r2, r1, r2
ldr r1, [sp, #16]
orr r2, r1, r2
ldr r1, [sp, #24]
orr r2, r1, r2
ldr r1, [sp, #32]
orr r2, r1, r2
ldr r1, [sp]
orr r2, r1, r2
ldr r1, [sp, #40]
orr r2, r1, r2
ldr r1, [sp, #48]
orr r2, r1, r2
ldr r1, [sp, #56]
orr r2, r1, r2
ldr r1, [sp, #72]
orr r2, r1, r2
ldr r1, [sp, #76]
orr r2, r1, r2
ldr r1, [sp, #80]
orr r2, r1, r2
ldr r1, [sp, #84]
orr r2, r1, r2
ldr r1, [sp, #88]
orr r2, r1, r2
ldr r1, [sp, #92]
orr r2, r1, r2
ldr r1, [sp, #104]
orr r2, r1, r2
ldr r1, [sp, #108]
orr r2, r1, r2
ldr r1, [sp, #112]
orr r2, r1, r2
ldr r1, [sp, #64]
orr r2, r1, r2
tst r2, #255
beq .L7893
.L2515:
cmp r3, #0
moveq r1, r3
beq .L1578
.L1727:
ldr r2, .L8014+112
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8014+104
ldrb r2, [r2] @ zero_extendqisi2
orrs r2, r1, r2
moveq r1, #1
movne r1, #0
.L1578:
ldr r2, [sp, #20]
cmp r2, #0
beq .L1580
ldr r2, .L8014+116
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8014+108
ldrb r2, [r2] @ zero_extendqisi2
orrs r2, r0, r2
beq .L3452
.L1580:
ldr r2, [sp, #12]
cmp r2, #0
beq .L1582
ldr r2, .L8014+120
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8014+124
ldrb r2, [r2] @ zero_extendqisi2
orrs r2, r0, r2
beq .L3452
.L1582:
ldr r2, [sp, #16]
cmp r2, #0
beq .L1583
ldr r2, [sp, #292]
cmp r2, #0
beq .L3452
.L1583:
ldr r2, [sp, #24]
cmp r2, #0
beq .L1584
ldr r2, [sp, #300]
cmp r2, #0
beq .L3452
.L1584:
ldr r2, [sp, #32]
cmp r2, #0
beq .L1585
ldr r2, [sp, #324]
cmp r2, #0
beq .L3452
.L1585:
ldr r2, [sp]
cmp r2, #0
beq .L1586
ldr r2, [sp, #304]
cmp r2, #0
beq .L3452
.L1586:
ldr r2, [sp, #40]
cmp r2, #0
beq .L1587
ldr r2, [sp, #308]
cmp r2, #0
beq .L3452
.L1587:
ldr r2, [sp, #48]
cmp r2, #0
beq .L1588
ldr r2, [sp, #288]
cmp r2, #0
beq .L3452
.L1588:
ldr r2, [sp, #56]
cmp r2, #0
beq .L1589
ldr r2, [sp, #328]
cmp r2, #0
beq .L3452
.L1589:
ldr r2, [sp, #72]
cmp r2, #0
beq .L1590
ldr r2, [sp, #296]
cmp r2, #0
beq .L3452
.L1590:
ldr r2, [sp, #76]
cmp r2, #0
beq .L1591
ldr r2, [sp, #332]
cmp r2, #0
beq .L3452
.L1591:
ldr r2, [sp, #80]
cmp r2, #0
beq .L1592
ldr r2, [sp, #320]
cmp r2, #0
beq .L3452
.L1592:
ldr r2, [sp, #84]
cmp r2, #0
beq .L1593
ldr r2, [sp, #316]
cmp r2, #0
beq .L3452
.L1593:
ldr r2, [sp, #88]
cmp r2, #0
beq .L1594
ldr r2, [sp, #312]
cmp r2, #0
beq .L3452
.L1594:
ldr r2, [sp, #92]
cmp r2, #0
beq .L1595
ldr r2, [sp, #284]
cmp r2, #0
beq .L3452
.L1595:
ldr r2, [sp, #104]
cmp r2, #0
beq .L1596
ldr r2, [sp, #280]
cmp r2, #0
beq .L3452
.L1596:
ldr r2, [sp, #108]
cmp r2, #0
beq .L1597
ldr r2, [sp, #336]
cmp r2, #0
beq .L3452
.L1597:
ldr r2, [sp, #112]
cmp r2, #0
beq .L1598
ldr r2, [sp, #128]
cmp r2, #0
beq .L3452
.L1598:
ldr r2, [sp, #116]
cmp r2, #0
beq .L1599
ldr r2, [sp, #268]
cmp r2, #0
beq .L3452
.L1599:
ldr r2, [sp, #64]
cmp r2, #0
ldreq r2, [sp, #64]
beq .L1581
ldr r2, .L8014+128
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8014+132
ldrb r2, [r2] @ zero_extendqisi2
orrs r2, r0, r2
moveq r2, #1
movne r2, #0
.L1581:
cmp r2, r1
movne r2, #0
bne .L95
ldr r2, .L8014+104
ldrb r2, [r2] @ zero_extendqisi2
str r2, [sp, #128]
cmp r2, #0
ldreq r1, [sp, #128]
beq .L1600
ldr r2, .L8014+112
ldrb r2, [r2] @ zero_extendqisi2
orrs r2, r3, r2
moveq r1, #1
movne r1, #0
.L1600:
ldr r2, .L8014+108
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #268]
beq .L1601
ldr r2, .L8014+116
ldr r0, [sp, #20]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r0, r2
tst r2, #255
beq .L3474
.L1601:
ldr r2, .L8014+124
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1603
ldr r2, .L8014+120
ldr r0, [sp, #12]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r0, r2
tst r2, #255
beq .L3474
.L1603:
ldr r2, [sp, #196]
cmp r2, #0
beq .L1604
ldr r2, [sp, #192]
ldr r0, [sp, #16]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1604:
ldr r2, [sp, #256]
cmp r2, #0
beq .L1605
ldr r2, [sp, #188]
ldr r0, [sp, #24]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1605:
ldr r2, [sp, #244]
cmp r2, #0
beq .L1606
ldr r2, [sp, #184]
ldr r0, [sp, #32]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1606:
ldr r2, [sp, #252]
cmp r2, #0
beq .L1607
ldr r2, [sp, #180]
ldr r0, [sp]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1607:
ldr r2, [sp, #240]
cmp r2, #0
beq .L1608
ldr r2, [sp, #176]
ldr r0, [sp, #40]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1608:
ldr r2, [sp, #248]
cmp r2, #0
beq .L1609
ldr r2, [sp, #172]
ldr r0, [sp, #48]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1609:
ldr r2, [sp, #236]
cmp r2, #0
beq .L1610
ldr r2, [sp, #168]
ldr r0, [sp, #56]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1610:
ldr r2, [sp, #232]
cmp r2, #0
beq .L1611
ldr r2, [sp, #164]
ldr r0, [sp, #72]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1611:
ldr r2, [sp, #228]
cmp r2, #0
beq .L1612
ldr r2, [sp, #160]
ldr r0, [sp, #76]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1612:
ldr r2, [sp, #224]
cmp r2, #0
beq .L1613
ldr r2, [sp, #156]
ldr r0, [sp, #80]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1613:
ldr r2, [sp, #220]
cmp r2, #0
beq .L1614
ldr r2, [sp, #152]
ldr r0, [sp, #84]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1614:
ldr r2, [sp, #216]
cmp r2, #0
beq .L1615
ldr r2, [sp, #148]
ldr r0, [sp, #88]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1615:
ldr r2, [sp, #212]
cmp r2, #0
beq .L1616
ldr r2, [sp, #144]
ldr r0, [sp, #92]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1616:
ldr r2, [sp, #136]
cmp r2, #0
beq .L1617
ldr r2, [sp, #132]
ldr r0, [sp, #104]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1617:
ldr r2, [sp, #208]
cmp r2, #0
beq .L1618
ldr r2, [sp, #120]
ldr r0, [sp, #108]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1618:
ldr r2, [sp, #204]
cmp r2, #0
beq .L1619
ldr r2, [sp, #200]
ldr r0, [sp, #112]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1619:
ldr r2, [sp, #264]
cmp r2, #0
beq .L1620
ldr r2, [sp, #260]
ldr r0, [sp, #116]
orr r2, r2, r0
tst r2, #255
beq .L3474
.L1620:
ldr r2, .L8014+132
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1602
ldr r2, .L8014+128
ldr r0, [sp, #64]
ldrb r2, [r2] @ zero_extendqisi2
orr r2, r0, r2
and r2, r2, #255
clz r2, r2
lsr r2, r2, #5
.L1602:
cmp r1, r2
movne r2, #0
bne .L95
cmp r3, #0
moveq r1, r3
beq .L1621
ldr r2, [sp, #128]
cmp r2, #0
ldrne r2, .L8014+112
ldreq r1, [sp, #128]
ldrbne r1, [r2] @ zero_extendqisi2
clzne r1, r1
lsrne r1, r1, #5
.L1621:
ldr r2, [sp, #20]
cmp r2, #0
beq .L1622
ldr r2, [sp, #268]
cmp r2, #0
beq .L1622
ldr r2, .L8014+116
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L3497
.L1622:
ldr r2, [sp, #12]
cmp r2, #0
beq .L1624
ldr r2, .L8014+124
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1624
ldr r2, .L8014+120
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L3497
.L1624:
ldr r2, [sp, #16]
cmp r2, #0
beq .L1625
ldr r2, [sp, #196]
cmp r2, #0
beq .L1625
ldr r2, [sp, #192]
cmp r2, #0
beq .L3497
.L1625:
ldr r2, [sp, #24]
cmp r2, #0
beq .L1626
ldr r2, [sp, #256]
cmp r2, #0
beq .L1626
ldr r2, [sp, #188]
cmp r2, #0
beq .L3497
.L1626:
ldr r2, [sp, #32]
cmp r2, #0
beq .L1627
ldr r2, [sp, #244]
cmp r2, #0
beq .L1627
ldr r2, [sp, #184]
cmp r2, #0
beq .L3497
.L1627:
ldr r2, [sp]
cmp r2, #0
beq .L1628
ldr r2, [sp, #252]
cmp r2, #0
beq .L1628
ldr r2, [sp, #180]
cmp r2, #0
beq .L3497
.L1628:
ldr r2, [sp, #40]
cmp r2, #0
beq .L1629
ldr r2, [sp, #240]
cmp r2, #0
beq .L1629
ldr r2, [sp, #176]
cmp r2, #0
beq .L3497
.L1629:
ldr r2, [sp, #48]
cmp r2, #0
beq .L1630
ldr r2, [sp, #248]
cmp r2, #0
beq .L1630
ldr r2, [sp, #172]
cmp r2, #0
beq .L3497
.L1630:
ldr r2, [sp, #56]
cmp r2, #0
beq .L1631
ldr r2, [sp, #236]
cmp r2, #0
beq .L1631
ldr r2, [sp, #168]
cmp r2, #0
beq .L3497
.L1631:
ldr r2, [sp, #72]
cmp r2, #0
beq .L1632
ldr r2, [sp, #232]
cmp r2, #0
beq .L1632
ldr r2, [sp, #164]
cmp r2, #0
beq .L3497
.L1632:
ldr r2, [sp, #76]
cmp r2, #0
beq .L1633
ldr r2, [sp, #228]
cmp r2, #0
beq .L1633
ldr r2, [sp, #160]
cmp r2, #0
beq .L3497
.L1633:
ldr r2, [sp, #80]
cmp r2, #0
beq .L1634
ldr r2, [sp, #224]
cmp r2, #0
beq .L1634
ldr r2, [sp, #156]
cmp r2, #0
beq .L3497
.L1634:
ldr r2, [sp, #84]
cmp r2, #0
beq .L1635
ldr r2, [sp, #220]
cmp r2, #0
beq .L1635
ldr r2, [sp, #152]
cmp r2, #0
beq .L3497
.L1635:
ldr r2, [sp, #88]
cmp r2, #0
beq .L1636
ldr r2, [sp, #216]
cmp r2, #0
beq .L1636
ldr r2, [sp, #148]
cmp r2, #0
beq .L3497
.L1636:
ldr r2, [sp, #92]
cmp r2, #0
beq .L1637
ldr r2, [sp, #212]
cmp r2, #0
beq .L1637
ldr r2, [sp, #144]
cmp r2, #0
beq .L3497
.L1637:
ldr r2, [sp, #104]
cmp r2, #0
beq .L1638
ldr r2, [sp, #136]
cmp r2, #0
beq .L1638
ldr r2, [sp, #132]
cmp r2, #0
beq .L3497
.L1638:
ldr r2, [sp, #108]
cmp r2, #0
beq .L1639
ldr r2, [sp, #208]
cmp r2, #0
beq .L1639
ldr r2, [sp, #120]
cmp r2, #0
beq .L3497
.L1639:
ldr r2, [sp, #112]
cmp r2, #0
beq .L1640
ldr r2, [sp, #204]
cmp r2, #0
beq .L1640
ldr r2, [sp, #200]
cmp r2, #0
beq .L3497
.L1640:
ldr r2, [sp, #116]
cmp r2, #0
beq .L1641
ldr r2, [sp, #264]
cmp r2, #0
beq .L1641
ldr r2, [sp, #260]
cmp r2, #0
beq .L3497
.L1641:
ldr r2, [sp, #64]
cmp r2, #0
ldreq r2, [sp, #64]
beq .L1623
ldr r2, .L8014+132
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
ldrne r2, .L8014+128
ldrbne r2, [r2] @ zero_extendqisi2
clzne r2, r2
lsrne r2, r2, #5
.L1623:
cmp r1, r2
movne r2, #0
bne .L95
ldr r2, .L8014+112
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
moveq r0, r2
beq .L1642
ldr r1, [sp, #128]
orrs r1, r1, r3
moveq r0, #1
movne r0, #0
.L1642:
ldr r1, .L8014+116
ldrb r1, [r1] @ zero_extendqisi2
cmp r1, #0
str r1, [sp, #280]
beq .L1643
ldr r1, [sp, #268]
ldr ip, [sp, #20]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1643:
ldr r1, .L8014+120
ldrb r1, [r1] @ zero_extendqisi2
cmp r1, #0
beq .L1645
ldr r1, .L8014+124
ldr ip, [sp, #12]
ldrb r1, [r1] @ zero_extendqisi2
orr r1, ip, r1
tst r1, #255
beq .L3520
.L1645:
ldr r1, [sp, #192]
cmp r1, #0
beq .L1646
ldr r1, [sp, #196]
ldr ip, [sp, #16]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1646:
ldr r1, [sp, #188]
cmp r1, #0
beq .L1647
ldr r1, [sp, #256]
ldr ip, [sp, #24]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1647:
ldr r1, [sp, #184]
cmp r1, #0
beq .L1648
ldr r1, [sp, #244]
ldr ip, [sp, #32]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1648:
ldr r1, [sp, #180]
cmp r1, #0
beq .L1649
ldr r1, [sp, #252]
ldr ip, [sp]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1649:
ldr r1, [sp, #176]
cmp r1, #0
beq .L1650
ldr r1, [sp, #240]
ldr ip, [sp, #40]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1650:
ldr r1, [sp, #172]
cmp r1, #0
beq .L1651
ldr r1, [sp, #248]
ldr ip, [sp, #48]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1651:
ldr r1, [sp, #168]
cmp r1, #0
beq .L1652
ldr r1, [sp, #236]
ldr ip, [sp, #56]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1652:
ldr r1, [sp, #164]
cmp r1, #0
beq .L1653
ldr r1, [sp, #232]
ldr ip, [sp, #72]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1653:
ldr r1, [sp, #160]
cmp r1, #0
beq .L1654
ldr r1, [sp, #228]
ldr ip, [sp, #76]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1654:
ldr r1, [sp, #156]
cmp r1, #0
beq .L1655
ldr r1, [sp, #224]
ldr ip, [sp, #80]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1655:
ldr r1, [sp, #152]
cmp r1, #0
beq .L1656
ldr r1, [sp, #220]
ldr ip, [sp, #84]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1656:
ldr r1, [sp, #148]
cmp r1, #0
beq .L1657
ldr r1, [sp, #216]
ldr ip, [sp, #88]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1657:
ldr r1, [sp, #144]
cmp r1, #0
beq .L1658
ldr r1, [sp, #212]
ldr ip, [sp, #92]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1658:
ldr r1, [sp, #132]
cmp r1, #0
beq .L1659
ldr r1, [sp, #136]
ldr ip, [sp, #104]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1659:
ldr r1, [sp, #120]
cmp r1, #0
beq .L1660
ldr r1, [sp, #208]
ldr ip, [sp, #108]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1660:
ldr r1, [sp, #200]
cmp r1, #0
beq .L1661
ldr r1, [sp, #204]
ldr ip, [sp, #112]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1661:
ldr r1, [sp, #260]
cmp r1, #0
beq .L1662
ldr r1, [sp, #264]
ldr ip, [sp, #116]
orr r1, r1, ip
tst r1, #255
beq .L3520
.L1662:
ldr r1, .L8014+128
ldrb r1, [r1] @ zero_extendqisi2
cmp r1, #0
beq .L1644
ldr r1, .L8014+132
ldr ip, [sp, #64]
ldrb r1, [r1] @ zero_extendqisi2
orr r1, ip, r1
and r1, r1, #255
clz r1, r1
lsr r1, r1, #5
.L1644:
cmp r0, r1
str r2, [sp, #284]
str r3, [sp, #288]
movne r2, #0
bne .L95
mov r1, #0
ldr r0, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1572
ldr r3, [sp, #260]
ldr r2, [sp, #284]
cmp r3, #0
ldr r3, [sp, #288]
beq .L1663
ldr r1, [sp, #264]
ldr r0, [sp, #116]
orr r1, r1, r0
ands r1, r1, #255
bne .L1663
cmp r3, #0
movne r2, r1
bne .L95
cmp r2, #0
beq .L95
mov r0, #1
.L2512:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8014+136
movne r1, #0
ldreq r1, [r1]
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, .L8014+128
ldrb r1, [r1] @ zero_extendqisi2
cmp r1, #0
beq .L1938
.L3062:
ldr r1, .L8014+132
ldr r0, [sp, #64]
ldrb r1, [r1] @ zero_extendqisi2
orr r1, r0, r1
ands r1, r1, #255
bne .L7894
cmp r3, #0
movne r2, r1
bne .L95
cmp r2, #0
beq .L95
mov r0, #1
.L2510:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8014+136
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #1
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, [sp, #200]
cmp r1, #0
beq .L1936
.L3061:
ldr r1, [sp, #204]
ldr r0, [sp, #112]
orr r1, r1, r0
tst r1, #255
bne .L1936
cmp r2, #0
beq .L95
mov r0, #1
.L2507:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8014+136
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #2
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, [sp, #120]
cmp r1, #0
beq .L1932
.L3060:
ldr r1, [sp, #208]
ldr r0, [sp, #108]
orr r1, r1, r0
ands r1, r1, #255
bne .L7895
cmp r3, #0
movne r2, r1
bne .L95
cmp r2, #0
beq .L95
mov r0, #1
.L2505:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8014+136
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #3
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, [sp, #132]
cmp r1, #0
beq .L1930
.L3059:
ldr r1, [sp, #136]
ldr r0, [sp, #104]
orr r1, r1, r0
ands r1, r1, #255
bne .L7896
cmp r3, #0
movne r2, r1
bne .L95
cmp r2, #0
beq .L95
mov r0, #1
.L2503:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8014+136
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #4
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, [sp, #144]
cmp r1, #0
beq .L1926
.L3058:
ldr r1, [sp, #212]
ldr r0, [sp, #92]
orr r1, r1, r0
tst r1, #255
bne .L1926
cmp r2, #0
beq .L95
mov r0, #1
.L2500:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8014+136
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #5
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, [sp, #148]
cmp r1, #0
beq .L1923
.L3057:
ldr r1, [sp, #216]
ldr r0, [sp, #88]
orr r1, r1, r0
ands r1, r1, #255
bne .L7897
cmp r3, #0
movne r2, r1
bne .L95
cmp r2, #0
beq .L95
mov r0, #1
.L2498:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8014+136
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #6
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, [sp, #152]
cmp r1, #0
beq .L1920
.L3056:
ldr r1, [sp, #220]
ldr r0, [sp, #84]
orr r1, r1, r0
tst r1, #255
bne .L1920
cmp r2, #0
beq .L95
mov r0, #1
.L2495:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8014+136
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #7
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, [sp, #156]
cmp r1, #0
beq .L1917
.L3055:
ldr r1, [sp, #224]
ldr r0, [sp, #80]
orr r1, r1, r0
ands r1, r1, #255
bne .L7898
cmp r3, #0
movne r2, r1
bne .L95
cmp r2, #0
beq .L95
mov r0, #1
.L2493:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8016+28
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #8
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, [sp, #160]
cmp r1, #0
beq .L1915
.L3054:
ldr r1, [sp, #228]
ldr r0, [sp, #76]
orr r1, r1, r0
tst r1, #255
bne .L1915
cmp r2, #0
beq .L95
mov r0, #1
.L2490:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8016+28
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #9
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, [sp, #164]
cmp r1, #0
beq .L1911
.L3053:
ldr r1, [sp, #232]
ldr r0, [sp, #72]
orr r1, r1, r0
ands r1, r1, #255
bne .L7899
cmp r3, #0
movne r2, r1
bne .L95
cmp r2, #0
beq .L95
mov r0, #1
.L2488:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8016+28
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #10
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, [sp, #168]
cmp r1, #0
beq .L1909
.L3052:
ldr r1, [sp, #236]
ldr r0, [sp, #56]
orr r1, r1, r0
tst r1, #255
bne .L1909
cmp r2, #0
beq .L95
mov r0, #1
.L2485:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8016+28
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #11
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, [sp, #172]
cmp r1, #0
beq .L1905
.L3051:
ldr r1, [sp, #248]
ldr r0, [sp, #48]
orr r1, r1, r0
ands r1, r1, #255
bne .L7900
cmp r3, #0
movne r2, r1
bne .L95
cmp r2, #0
beq .L95
mov r0, #1
.L2483:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8016+28
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #12
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, [sp, #176]
cmp r1, #0
beq .L1902
.L3050:
ldr r1, [sp, #240]
ldr r0, [sp, #40]
orr r1, r1, r0
tst r1, #255
bne .L1902
cmp r2, #0
beq .L95
mov r0, #1
.L2480:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8016+28
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #13
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, [sp, #180]
cmp r1, #0
beq .L1899
.L3049:
ldr r1, [sp, #252]
ldr r0, [sp]
orr r1, r1, r0
ands r1, r1, #255
bne .L7901
cmp r3, #0
movne r2, r1
bne .L95
cmp r2, #0
beq .L95
mov r0, #1
.L2478:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8016+28
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #14
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, [sp, #184]
cmp r1, #0
beq .L1896
.L3048:
ldr r1, [sp, #244]
ldr r0, [sp, #32]
orr r1, r1, r0
tst r1, #255
bne .L1896
cmp r2, #0
beq .L95
mov r0, #1
.L2475:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8016+28
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #15
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, [sp, #188]
cmp r1, #0
beq .L1894
.L3047:
ldr r1, [sp, #256]
ldr r0, [sp, #24]
orr r1, r1, r0
ands r1, r1, #255
bne .L7902
cmp r3, #0
movne r2, r1
bne .L95
cmp r2, #0
beq .L95
mov r0, #1
.L2473:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8016+28
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #16
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, [sp, #192]
cmp r1, #0
beq .L1714
.L3046:
ldr r1, [sp, #196]
ldr r0, [sp, #16]
orr r1, r1, r0
tst r1, #255
bne .L1714
.L1892:
cmp r2, #0
beq .L95
mov r0, #1
.L2470:
ldr r1, [sp, #128]
cmp r1, #0
ldreq r1, .L8016+28
movne r1, #0
ldreq r1, [r1]
subeq r1, r1, #17
clzeq r1, r1
lsreq r1, r1, #5
cmp r1, r0
movne r2, #0
bne .L95
ldr r1, .L8016
ldrb r1, [r1] @ zero_extendqisi2
cmp r1, #0
beq .L1888
.L3045:
ldr r1, .L8016+4
ldr r0, [sp, #12]
ldrb r1, [r1] @ zero_extendqisi2
orr r1, r0, r1
ands r1, r1, #255
bne .L7903
cmp r3, #0
movne r2, r1
bne .L95
cmp r2, #0
beq .L95
mov r1, #1
.L2468:
ldr r3, [sp, #128]
cmp r3, #0
ldreq r3, .L8016+28
movne r3, #0
ldreq r3, [r3]
subeq r3, r3, #18
clzeq r3, r3
lsreq r3, r3, #5
cmp r3, r1
movne r2, #0
bne .L95
ldr r3, [sp, #280]
cmp r3, #0
beq .L1720
.L3044:
ldr r3, [sp, #268]
ldr r1, [sp, #20]
orr r3, r3, r1
tst r3, #255
bne .L1720
.L1725:
cmp r2, #0
beq .L95
ldr r3, [sp, #128]
cmp r3, #0
movne r2, #0
bne .L95
ldr r3, .L8016+28
ldr r3, [r3]
cmp r3, #19
ldrne r2, [sp, #128]
bne .L95
b .L1572
.L7893:
cmp r3, #0
bne .L1576
ldr r2, .L8016+32
ldr r1, .L8016+36
ldrb r2, [r2] @ zero_extendqisi2
ldr r0, [sp, #268]
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r0, r2
orr r2, r2, r1
ldr r1, [sp, #116]
orr r2, r1, r2
tst r2, #255
moveq r2, r3
beq .L95
mov r1, #0
ldr r0, [sp, #96] @ float
str r3, [sp, #340]
bl __aeabi_fcmpeq
cmp r0, #0
ldrne r3, [sp, #340]
movne r1, r3
bne .L1578
b .L1572
.L1568:
ldr r2, .L8016+8
ldr r1, .L8016+12
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
ldr r1, [sp, #20]
orr r2, r1, r2
tst r2, #255
bne .L1378
ldr r2, .L8016
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8016+4
ldrb r2, [r2] @ zero_extendqisi2
orrs r2, r1, r2
bne .L2517
.L1570:
mov r1, #0
ldr r0, [sp, #96] @ float
str r3, [sp, #340]
bl __aeabi_fcmpeq
ldr r3, [sp, #20]
subs r1, r3, #0
movne r1, #1
cmp r0, #0
moveq r1, #1
cmp r1, #0
ldr r3, [sp, #340]
beq .L7904
mov r1, #0
ldr r0, [sp, #96] @ float
str r3, [sp, #340]
bl __aeabi_fcmpeq
cmp r0, #0
ldr r3, [sp, #340]
beq .L1572
b .L2515
.L1576:
mov r1, #0
ldr r0, [sp, #96] @ float
str r3, [sp, #340]
bl __aeabi_fcmpeq
cmp r0, #0
ldrne r3, [sp, #340]
bne .L1727
b .L1572
.L7904:
ldr r2, .L8016+8
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1728
cmp r3, #0
moveq r1, r3
beq .L1580
ldr r2, .L8016+32
ldrb r0, [r2] @ zero_extendqisi2
ldr r2, .L8016+36
ldrb r2, [r2] @ zero_extendqisi2
orrs r2, r0, r2
bne .L1578
mov r1, #1
b .L1580
.L3452:
mov r2, #1
b .L1581
.L3474:
mov r2, #1
b .L1602
.L3497:
mov r2, #1
b .L1623
.L3520:
mov r1, #1
b .L1644
.L1566:
ldr r2, [sp, #12]
cmp r2, #0
bne .L1569
b .L2518
.L1720:
cmp r2, #0
beq .L1572
ldr r3, [sp, #128]
cmp r3, #0
bne .L1572
ldr r3, .L8016+28
ldr r3, [r3]
cmp r3, #19
bne .L1572
ldr r2, [sp, #128]
b .L95
.L7903:
cmp r3, #0
bne .L1889
.L1888:
cmp r2, #0
beq .L7481
mov r1, #0
b .L2468
.L7902:
cmp r3, #0
bne .L1895
.L1894:
cmp r2, #0
beq .L7482
mov r0, #0
b .L2473
.L1916:
ldr r1, [sp, #164]
cmp r1, #0
bne .L3053
.L1912:
ldr r1, [sp, #168]
cmp r1, #0
beq .L1910
ldr r1, [sp, #236]
ldr r0, [sp, #56]
orr r1, r1, r0
ands r1, r1, #255
moveq r2, r1
beq .L95
cmp r3, #0
beq .L1909
.L1910:
ldr r1, [sp, #172]
cmp r1, #0
bne .L3051
.L1906:
ldr r1, [sp, #176]
cmp r1, #0
beq .L1903
ldr r1, [sp, #240]
ldr r0, [sp, #40]
orr r1, r1, r0
ands r1, r1, #255
moveq r2, r1
beq .L95
cmp r3, #0
beq .L1902
.L1903:
ldr r1, [sp, #180]
cmp r1, #0
bne .L3049
.L1900:
ldr r1, [sp, #184]
cmp r1, #0
beq .L1897
ldr r1, [sp, #244]
ldr r0, [sp, #32]
orr r1, r1, r0
ands r1, r1, #255
moveq r2, r1
beq .L95
cmp r3, #0
beq .L1896
.L1897:
ldr r1, [sp, #188]
cmp r1, #0
bne .L3047
.L1895:
ldr r1, [sp, #192]
cmp r1, #0
beq .L1891
ldr r1, [sp, #196]
ldr r0, [sp, #16]
orr r1, r1, r0
ands r1, r1, #255
bne .L1891
cmp r3, #0
movne r2, r1
bne .L95
b .L1892
.L1714:
cmp r2, #0
beq .L7343
mov r0, #0
b .L2470
.L7914:
ldr r1, .L8016+76
ldrb r1, [r1] @ zero_extendqisi2
cmp r1, #0
bne .L3062
.L7497:
ldr r1, [sp, #200]
cmp r1, #0
bne .L3061
.L7496:
ldr r1, [sp, #120]
cmp r1, #0
bne .L3060
.L7495:
ldr r1, [sp, #132]
cmp r1, #0
bne .L3059
.L7494:
ldr r1, [sp, #144]
cmp r1, #0
bne .L3058
.L7493:
ldr r1, [sp, #148]
cmp r1, #0
bne .L3057
.L7492:
ldr r1, [sp, #152]
cmp r1, #0
bne .L3056
.L7491:
ldr r1, [sp, #156]
cmp r1, #0
bne .L3055
.L7490:
ldr r1, [sp, #160]
cmp r1, #0
bne .L3054
.L7489:
ldr r1, [sp, #164]
cmp r1, #0
bne .L3053
.L7488:
ldr r1, [sp, #168]
cmp r1, #0
bne .L3052
.L7487:
ldr r1, [sp, #172]
cmp r1, #0
bne .L3051
.L7486:
ldr r1, [sp, #176]
cmp r1, #0
bne .L3050
.L7485:
ldr r1, [sp, #180]
cmp r1, #0
bne .L3049
.L7484:
ldr r1, [sp, #184]
cmp r1, #0
bne .L3048
.L7483:
ldr r1, [sp, #188]
cmp r1, #0
bne .L3047
.L7482:
ldr r1, [sp, #192]
cmp r1, #0
bne .L3046
.L7343:
ldr r1, .L8016
ldrb r1, [r1] @ zero_extendqisi2
cmp r1, #0
bne .L3045
.L7481:
ldr r3, [sp, #280]
cmp r3, #0
bne .L3044
b .L1572
.L1891:
ldr r1, .L8016
ldrb r1, [r1] @ zero_extendqisi2
cmp r1, #0
bne .L3045
.L1889:
ldr r1, [sp, #280]
cmp r1, #0
beq .L1572
ldr r1, [sp, #268]
ldr r0, [sp, #20]
orr r1, r1, r0
ands r1, r1, #255
bne .L1572
cmp r3, #0
movne r2, r1
bne .L95
b .L1725
.L1896:
cmp r2, #0
beq .L7483
mov r0, #0
b .L2475
.L7901:
cmp r3, #0
bne .L1900
.L1899:
cmp r2, #0
beq .L7484
mov r0, #0
b .L2478
.L1902:
cmp r2, #0
beq .L7485
mov r0, #0
b .L2480
.L7900:
cmp r3, #0
bne .L1906
.L1905:
cmp r2, #0
beq .L7486
mov r0, #0
b .L2483
.L1909:
cmp r2, #0
beq .L7487
mov r0, #0
b .L2485
.L7899:
cmp r3, #0
bne .L1912
.L1911:
cmp r2, #0
beq .L7488
mov r0, #0
b .L2488
.L1314:
cmp r3, #0
movne r2, #0
bne .L95
b .L1315
.L7885:
ldr r3, .L8016+112
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #96]
bne .L1313
ldr r3, .L8016+96
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1313
ldr r3, .L8016+104
ldr r2, [sp, #96]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8016+100
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #116]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #116]
bne .L95
b .L1313
.L7884:
ldr r3, [sp, #132]
cmp r3, #0
ldr r3, .L8016+84
ldrb r2, [r3] @ zero_extendqisi2
ldreq r3, [sp, #132]
streq r3, [sp, #116]
beq .L1313
ldr r3, .L8016+112
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #116]
beq .L3137
mov r3, #0
str r3, [sp, #116]
b .L1313
.L1323:
ldr r3, .L8016+16
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1326
.L1324:
ldr r2, .L8016+32
ldr r1, .L8016+36
ldrb r2, [r2] @ zero_extendqisi2
ldr r0, [sp, #128]
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r0, r2
orrs r2, r2, r1
bne .L1327
ldr r2, .L8016+44
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
bne .L7905
.L1327:
mov r1, #0
ldr r0, [sp, #96] @ float
str r3, [sp, #120]
bl __aeabi_fcmpeq
clz r1, r0
ldr r3, .L8016+48
lsr r1, r1, #5
ldrb r0, [r3] @ zero_extendqisi2
ldr r3, .L8016+40
ldrb r2, [r3] @ zero_extendqisi2
orrs r3, r0, r2
moveq ip, r1
movne ip, #1
cmp ip, #0
ldr r3, [sp, #120]
bne .L1331
.L2621:
ldr r1, .L8016+32
ldr ip, .L8016+36
ldrb r1, [r1] @ zero_extendqisi2
ldrb ip, [ip] @ zero_extendqisi2
orr r1, r1, ip
orrs r3, r3, r1
movne r2, #0
bne .L95
ldr r1, .L8016+20
ldr ip, [r7]
ldr r1, [r1]
str ip, [sp, #136]
cmp ip, r1
str r1, [sp, #120]
bne .L1962
mov r1, r3
.L1961:
ldr ip, [sp, #128]
cmp ip, #0
beq .L3423
ldr ip, .L8016+44
ldrb ip, [ip] @ zero_extendqisi2
cmp ip, #0
ldrne ip, [sp, #120]
strne ip, [sp, #136]
bne .L1333
.L3423:
ldr r2, [sp, #120]
str r2, [sp, #136]
b .L1334
.L7905:
ldr r2, .L8016+20
str r3, [sp, #152]
ldr r2, [r2]
ldr r3, [r7]
mov r1, #0
sub r2, r2, r3
clz r2, r2
ldr r0, [sp, #132] @ float
lsr r2, r2, #5
str r3, [sp, #120]
str r2, [sp, #136]
bl __aeabi_fcmpeq
cmp r0, #0
ldr r2, [sp, #136]
moveq r2, #0
cmp r2, #0
ldr r3, [sp, #152]
beq .L1327
ldr r2, [sp, #120]
str r2, [sp, #136]
.L1328:
mov r1, #0
ldr r0, [sp, #96] @ float
str r3, [sp, #152]
bl __aeabi_fcmpeq
cmp r0, #0
ldr r3, [sp, #152]
bne .L7906
ldr r2, .L8016+36
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1737
.L2618:
ldr r2, .L8016+32
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
bne .L1344
ldr r1, .L8016+24
ldr r0, [sp, #144] @ float
str r3, [sp, #156]
bl __aeabi_fcmpge
subs r2, r0, #0
movne r2, #1
ldr r1, [sp, #132] @ float
ldr r0, [sp, #144] @ float
str r2, [sp, #152]
bl __aeabi_fcmpeq
ldr r2, [sp, #152]
ldr r3, [sp, #156]
cmp r0, #0
moveq r2, #0
andne r2, r2, #1
cmp r2, #0
bne .L1345
.L1343:
mov r1, #0
ldr r0, [sp, #96] @ float
str r3, [sp, #152]
bl __aeabi_fcmpeq
cmp r0, #0
ldr r3, [sp, #152]
bne .L1738
.L1737:
ldr r2, .L8016+32
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
bne .L1348
ldr r2, .L8016+36
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
bne .L1348
.L2616:
ldr r1, .L8016+24
ldr r0, [sp, #144] @ float
str r3, [sp, #152]
bl __aeabi_fcmpge
cmp r0, #0
ldr r3, [sp, #152]
bne .L1345
mov r1, #0
ldr r0, [sp, #132] @ float
bl __aeabi_fcmpeq
cmp r0, #0
ldr r3, [sp, #152]
bne .L1348
.L1345:
mov r1, #0
ldr r0, [sp, #96] @ float
str r3, [sp, #152]
bl __aeabi_fcmpeq
cmp r0, #0
ldr r3, [sp, #152]
beq .L1348
.L1350:
ldr r2, .L8016+40
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1348
ldr r2, .L8016+48
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
ldr r2, [sp, #128]
bne .L1351
cmp r2, #0
beq .L1352
ldr r2, .L8016+44
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L95
ldr r0, [sp, #144] @ float
ldr r1, .L8016+24
str r3, [sp, #152]
bl __aeabi_fcmpge
cmp r0, #0
ldr r3, [sp, #152]
bne .L1352
b .L2615
.L7909:
ldr r2, .L8016+40
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8016+44
cmp r1, #0
ldrb r2, [r2] @ zero_extendqisi2
beq .L1959
.L3135:
ldr r1, .L8016+48
ldrb r1, [r1] @ zero_extendqisi2
orrs r2, r2, r1
beq .L95
cmp r3, #0
bne .L1959
.L1337:
mov r1, #0
ldr r0, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1341
ldr r3, .L8016+32
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8016+36
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L1348
ldr r3, .L8016+40
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7907
.L1735:
mov r1, #0
ldr r0, [sp, #96] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
beq .L1348
ldr r3, .L8016+32
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L3426
ldr r2, .L8016+36
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1348
b .L1350
.L1344:
mov r1, #0
ldr r0, [sp, #96] @ float
str r3, [sp, #152]
bl __aeabi_fcmpeq
cmp r0, #0
ldr r3, [sp, #152]
beq .L1348
.L1738:
ldr r2, .L8016+40
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
bne .L7908
.L1956:
ldr r2, .L8016+32
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
bne .L1345
ldr r2, .L8016+36
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
bne .L1345
b .L2616
.L1351:
cmp r2, #0
bne .L1953
b .L1352
.L7908:
ldr r2, .L8016+48
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
bne .L1956
ldr r1, .L8016+44
ldr r2, [sp, #128]
ldrb r1, [r1] @ zero_extendqisi2
subs r2, r2, #0
movne r2, #1
cmp r1, #0
moveq r2, #1
cmp r2, #0
bne .L1956
b .L95
.L3426:
mov r3, #0
b .L1350
.L7907:
ldr r3, .L8016+48
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1735
ldr r3, [sp, #128]
subs r2, r3, #0
ldr r3, .L8016+44
movne r2, #1
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
moveq r2, #1
cmp r2, #0
bne .L1735
b .L95
.L1326:
mov r1, #0
ldr r0, [sp, #96] @ float
str r3, [sp, #152]
str r2, [sp, #136]
bl __aeabi_fcmpeq
clz r1, r0
ldr r3, .L8016+48
ldr r2, [sp, #136]
ldrb r0, [r3] @ zero_extendqisi2
lsr r1, r1, #5
orrs r3, r0, r2
moveq ip, r1
movne ip, #1
cmp ip, #0
ldr r3, [sp, #152]
bne .L1961
b .L2621
.L7919:
ldr r3, .L8016+112
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L1966
.L3137:
ldr r3, .L8016+96
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1312
ldr r3, .L8016+104
ldr r2, .L8016+100
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #116]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #116]
bne .L95
b .L1313
.L7906:
ldr r2, [sp, #128]
cmp r2, #0
beq .L7909
.L1959:
ldr r2, .L8016+36
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1343
b .L2618
.L1312:
ldr r3, [sp, #116]
cmp r3, #0
beq .L1313
.L1966:
ldr r3, .L8016+104
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8016+100
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L1310
.L3136:
ldr r3, .L8016+88
ldr r1, [sp, #152] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L1313
b .L1310
.L7890:
ldr r3, .L8016+48
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7910
.L1372:
mov r1, #0
ldr r0, [sp, #96] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
beq .L1369
ldr r3, .L8016+36
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1369
.L7653:
mov r3, #0
.L1729:
ldr r2, .L8016+44
ldr r1, [sp, #128]
ldrb r2, [r2] @ zero_extendqisi2
orrs r2, r1, r2
bne .L1369
ldr r1, .L8016+48
ldrb r1, [r1] @ zero_extendqisi2
cmp r1, #0
beq .L1369
ldr r1, .L8016+40
ldrb r1, [r1] @ zero_extendqisi2
cmp r1, #0
bne .L95
b .L1369
.L1368:
ldr r3, .L8016+48
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7911
.L1364:
ldr r3, [sp, #120]
ldr r2, .L8016+36
sub r3, r3, #19
clz r3, r3
ldrb r2, [r2] @ zero_extendqisi2
lsr r3, r3, #5
cmp r2, #0
movne r3, #0
mov r1, #0
ldr r0, [sp, #132] @ float
str r3, [sp, #120]
bl __aeabi_fcmpeq
cmp r0, #0
ldr r3, [sp, #120]
moveq r3, #0
cmp r3, #0
bne .L2606
.L1373:
mov r1, #0
ldr r0, [sp, #96] @ float
bl __aeabi_fcmpeq
subs r3, r0, #0
beq .L1369
b .L7653
.L7910:
ldr r3, .L8016+40
ldr r2, [sp, #128]
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, #0
cmpne r3, #0
beq .L1372
.L2608:
ldr r3, .L8016+44
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
movne r2, #0
bne .L95
.L1946:
ldr r3, .L8016+32
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1372
b .L1364
.L8017:
.align 2
.L8016:
.word s18_evt0
.word s18_evt1
.word s19_evt0
.word s19_evt1
.word bus_evt2
.word bus_j
.word 1095761920
.word bus_cd_id
.word bus_evt0
.word bus_evt1
.word bus_l1
.word _x_bus_l1
.word bus_l0
.word s1_lambda
.word s1_x
.word s1_backoff
.word s1_evt1
.word _x_s1_l1
.word s1_l1
.word s1_evt0
.word s0_evt2
.word _x_s0_l1
.word s0_backoff
.word -1074790400
.word delta
.word s0_evt1
.word s0_evt0
.word s0_x
.word s0_l1
.word s0_lambda
.L7889:
cmp r3, #0
bne .L1361
ldr r3, .L8016+32
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1362
.L1356:
ldr r3, .L8016+36
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1363
ldr r3, .L8016+28
ldr r2, [sp, #120]
ldr r3, [r3]
mov r1, #0
sub r3, r3, r2
clz r3, r3
ldr r0, [sp, #132] @ float
lsr r3, r3, #5
str r3, [sp, #144]
bl __aeabi_fcmpeq
cmp r0, #0
ldr r3, [sp, #144]
moveq r3, #0
ldr r2, [sp, #120]
cmp r2, #18
movgt r3, #0
andle r3, r3, #1
cmp r3, #0
bne .L1364
.L1363:
mov r1, #0
ldr r0, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L2609
ldr r3, [sp, #120]
ldr r2, .L8016+36
sub r3, r3, #19
clz r3, r3
ldrb r2, [r2] @ zero_extendqisi2
lsr r3, r3, #5
cmp r2, #0
movne r3, #0
mov r1, #0
ldr r0, [sp, #132] @ float
str r3, [sp, #120]
bl __aeabi_fcmpeq
cmp r0, #0
ldr r3, [sp, #120]
moveq r3, #0
cmp r3, #0
beq .L1369
.L2606:
ldr r3, .L8016+28
ldr r2, [sp, #136]
ldr r3, [r3]
cmp r3, #19
cmpeq r2, #0
bne .L1373
mov r3, #0
b .L1369
.L7911:
ldr r3, .L8016+40
ldr r2, [sp, #128]
ldrb r3, [r3] @ zero_extendqisi2
cmp r2, #0
cmpne r3, #0
beq .L1364
b .L2608
.L1367:
ldr r2, .L8016+48
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
bne .L1732
.L1371:
mov r1, #0
ldr r0, [sp, #96] @ float
str r3, [sp, #120]
bl __aeabi_fcmpeq
cmp r0, #0
ldr r3, [sp, #120]
beq .L1369
b .L1729
.L1366:
cmp r3, #0
bne .L1369
b .L1946
.L1361:
mov r1, #0
ldr r0, [sp, #96] @ float
str r3, [sp, #120]
bl __aeabi_fcmpeq
cmp r0, #0
ldr r3, [sp, #120]
beq .L1369
ldr r2, .L8016+48
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #0
beq .L1729
.L1732:
ldr r2, [sp, #128]
ldr r1, .L8016+40
clz r2, r2
ldrb r1, [r1] @ zero_extendqisi2
lsr r2, r2, #5
cmp r1, #0
moveq r2, #1
cmp r2, #0
bne .L1371
ldr r1, .L8016+44
ldrb r1, [r1] @ zero_extendqisi2
cmp r1, #0
beq .L1371
b .L95
.L1362:
mov r1, #0
ldr r0, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1372
b .L2609
.L7912:
ldr r3, .L8016+40
mov r1, #0
ldrb r3, [r3] @ zero_extendqisi2
ldr r0, [sp, #96] @ float
subs r3, r3, #0
movne r3, #1
str r3, [sp, #144]
bl __aeabi_fcmpeq
cmp r0, #0
ldr r3, [sp, #144]
moveq r3, #1
cmp r3, #0
bne .L2612
.L2614:
ldr r2, .L8016+32
ldr r1, .L8016+36
ldrb r2, [r2] @ zero_extendqisi2
ldrb r1, [r1] @ zero_extendqisi2
orr r2, r2, r1
orrs r3, r3, r2
movne r2, #0
bne .L95
b .L2609
.L7887:
ldr r2, .L8016+32
ldr r0, .L8016+36
ldrb r2, [r2] @ zero_extendqisi2
ldrb r0, [r0] @ zero_extendqisi2
orr r2, r2, r0
orrs r3, r3, r2
movne r2, r1
bne .L95
.L1335:
ldr r3, .L8016+32
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8016+36
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L1337
ldr r3, [sp, #128]
cmp r3, #0
bne .L1337
ldr r3, .L8016+40
ldr r2, .L8016+44
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
cmp r3, #0
ldrne r3, [sp, #128]
bne .L3135
b .L1337
.L7888:
ldr r3, [sp, #120]
ldr r2, [sp, #136]
sub r3, r3, r2
cmn r3, #1
beq .L1356
ldr r3, .L8016+48
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L7912
.L2612:
mov r1, #0
ldr r0, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1946
b .L2609
.L7896:
cmp r3, #0
bne .L1931
.L1930:
cmp r2, #0
beq .L7494
mov r0, #0
b .L2503
.L7913:
ldr r1, .L8016+76
ldrb r1, [r1] @ zero_extendqisi2
cmp r1, #0
bne .L3062
.L1939:
ldr r1, [sp, #200]
cmp r1, #0
beq .L1937
ldr r1, [sp, #204]
ldr r0, [sp, #112]
orr r1, r1, r0
ands r1, r1, #255
moveq r2, r1
beq .L95
cmp r3, #0
beq .L1936
.L1937:
ldr r1, [sp, #120]
cmp r1, #0
bne .L3060
.L1933:
ldr r1, [sp, #132]
cmp r1, #0
bne .L3059
.L1931:
ldr r1, [sp, #144]
cmp r1, #0
beq .L1927
ldr r1, [sp, #212]
ldr r0, [sp, #92]
orr r1, r1, r0
ands r1, r1, #255
moveq r2, r1
beq .L95
cmp r3, #0
bne .L1927
.L1926:
cmp r2, #0
beq .L7493
mov r0, #0
b .L2500
.L1927:
ldr r1, [sp, #148]
cmp r1, #0
bne .L3057
.L1924:
ldr r1, [sp, #152]
cmp r1, #0
beq .L1921
ldr r1, [sp, #220]
ldr r0, [sp, #84]
orr r1, r1, r0
ands r1, r1, #255
moveq r2, r1
beq .L95
cmp r3, #0
bne .L1921
.L1920:
cmp r2, #0
beq .L7491
mov r0, #0
b .L2495
.L7897:
cmp r3, #0
bne .L1924
.L1923:
cmp r2, #0
beq .L7492
mov r0, #0
b .L2498
.L1921:
ldr r1, [sp, #156]
cmp r1, #0
bne .L3055
.L1918:
ldr r1, [sp, #160]
cmp r1, #0
beq .L1916
ldr r1, [sp, #228]
ldr r0, [sp, #76]
orr r1, r1, r0
ands r1, r1, #255
moveq r2, r1
beq .L95
cmp r3, #0
bne .L1916
.L1915:
cmp r2, #0
beq .L7489
mov r0, #0
b .L2490
.L7898:
cmp r3, #0
bne .L1918
.L1917:
cmp r2, #0
beq .L7490
mov r0, #0
b .L2493
.L1936:
cmp r2, #0
beq .L7496
mov r0, #0
b .L2507
.L7894:
cmp r3, #0
bne .L1939
.L1938:
cmp r2, #0
beq .L7497
mov r0, #0
b .L2510
.L1663:
cmp r3, #0
bne .L7913
cmp r2, #0
beq .L7914
mov r0, r3
b .L2512
.L7895:
cmp r3, #0
bne .L1933
.L1932:
cmp r2, #0
beq .L7495
mov r0, #0
b .L2505
.L7869:
ldr r2, .L8016+68
str r3, [sp, #136]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #128]
cmp r2, #0
beq .L1227
b .L1226
.L7872:
ldr r3, .L8016+96
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #132]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1234
ldr r2, .L8016+64
ldr r3, .L8016+76
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #96]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #132]
str r3, [sp, #64]
bne .L95
ldr r3, [sp, #128]
cmp r3, #0
bne .L2649
.L2648:
ldr r3, .L8016+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1247
ldr r3, .L8016+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L1249
b .L1247
.L7868:
ldr r3, .L8016+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1223
.L2656:
ldr r3, .L8016+96
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1223
ldr r3, .L8016+76
ldr r2, .L8016+64
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #96]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #96]
bne .L95
.L1223:
mov r1, #0
ldr r0, [sp, #128] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #132] @ float
ldr r0, [sp, #64] @ float
str r3, [sp, #136]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #136]
str r2, [sp, #128]
ands r3, r3, r2
beq .L1226
str r3, [sp, #136]
str r3, [sp, #128]
b .L1227
.L1212:
ldr r3, .L8016+52
ldr r0, [sp, #64] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #132] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1221
.L1217:
ldr r3, [sp, #116]
cmp r3, #0
bne .L2007
.L2655:
mov r1, #0
ldr r0, [sp, #128] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #132] @ float
ldr r0, [sp, #64] @ float
str r3, [sp, #136]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #128]
b .L1226
.L7871:
ldr r3, .L8016+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1229
ldr r3, .L8016+76
ldr r2, [sp, #96]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #64]
bne .L1229
ldr r3, .L8016+60
ldr r0, [sp, #144] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
beq .L1232
.L1231:
ldr r3, [sp, #116]
cmp r3, #0
beq .L1236
.L1997:
ldr r3, .L8016+68
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1237
ldr r3, .L8016+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1238
ldr r3, [sp, #120]
cmp r3, #0
bne .L1239
ldr r0, .L8016+96
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1240
ldr r1, .L8016+76
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8016+64
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #64]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #120]
str r1, [sp, #64]
bne .L95
ldr r3, [sp, #128]
cmp r3, #0
beq .L2648
.L1753:
ldr r3, [sp, #116]
cmp r3, #0
bne .L1752
.L1244:
ldr r3, [sp, #64]
cmp r3, #0
beq .L2648
ldr r3, [sp, #116]
cmp r3, #0
bne .L7915
.L1991:
ldr r3, .L8016+76
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8016+64
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L1249
.L3141:
ldr r3, .L8016+60
ldr r1, [sp, #148] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L1252
b .L1249
.L7870:
ldr r3, .L8016+96
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #64]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1227
ldr r2, .L8016+64
ldr r3, .L8016+76
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #96]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #64]
bne .L95
ldr r3, .L8016+56
ldr r3, [r3] @ float
str r3, [sp, #148] @ float
.L1232:
ldr r3, [sp, #116]
cmp r3, #0
streq r3, [sp, #96]
beq .L3143
.L1996:
ldr r3, .L8016+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L1997
mov r3, #0
str r3, [sp, #64]
.L2650:
ldr r3, .L8016+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1231
ldr r3, .L8016+60
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #144] @ float
str r2, [sp, #96]
str r3, [sp, #100]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #96
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L8016+92
bl __aeabi_dcmple
cmp r0, #0
beq .L1231
b .L1236
.L7915:
ldr r3, [sp, #120]
cmp r3, #0
ldr r3, .L8016+68
ldrb r2, [r3] @ zero_extendqisi2
bne .L7916
ldr r3, .L8016+76
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8016+64
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L3141
b .L1252
.L1239:
ldr r3, [sp, #128]
cmp r3, #0
beq .L1244
.L1243:
ldr r3, [sp, #116]
cmp r3, #0
bne .L1752
b .L1242
.L1240:
ldr r3, [sp, #128]
cmp r3, #0
bne .L1753
b .L1244
.L7916:
ldr r3, .L8016+72
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L1991
.L3142:
ldr r3, .L8016+96
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1251
ldr r3, .L8016+76
ldr r2, .L8016+64
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #64]
bne .L95
b .L1252
.L1237:
ldr r3, [sp, #128]
cmp r3, #0
bne .L1993
b .L1242
.L1238:
ldr r3, [sp, #128]
cmp r3, #0
bne .L1243
ldr r3, [sp, #120]
cmp r3, #0
beq .L1244
b .L2647
.L1251:
ldr r3, [sp, #64]
cmp r3, #0
bne .L1991
b .L1252
.L7875:
ldr r3, .L8016+72
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #96]
bne .L1252
ldr r3, .L8016+96
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1252
ldr r3, .L8016+76
ldr r2, [sp, #96]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8016+64
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #64]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #64]
bne .L95
b .L1252
.L7874:
ldr r3, [sp, #120]
cmp r3, #0
ldr r3, .L8016+68
ldrb r2, [r3] @ zero_extendqisi2
ldreq r3, [sp, #120]
streq r3, [sp, #64]
beq .L1252
ldr r3, .L8016+72
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #64]
beq .L3142
mov r3, #0
str r3, [sp, #64]
b .L1252
.L7873:
ldr r3, .L8016+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L1236
ldr r3, [sp, #96]
str r3, [sp, #64]
b .L2650
.L1233:
ldr r3, [sp, #96]
cmp r3, #0
strne r3, [sp, #64]
bne .L1997
b .L1996
.L1255:
ldr r3, .L8016+84
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
movne r2, #0
bne .L95
b .L1751
.L1265:
ldr r3, .L8016+80
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #96]
bne .L1269
ldr r3, .L8016+104
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1268
ldr r3, .L8016+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1268
ldr r3, .L8016+116
ldr r0, [sp, #116] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #136] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1268
ldr r3, .L8016+84
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1983
ldr r3, [sp, #128]
cmp r3, #0
bne .L1983
.L7650:
str r3, [sp, #96]
.L2637:
ldr r3, .L8016+112
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #132]
orrs r2, r3, r2
str r2, [sp, #136]
bne .L1276
ldr r3, .L8016+96
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1276
ldr r2, .L8016+100
ldr r3, .L8016+104
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #96]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #136]
str r3, [sp, #96]
bne .L95
ldr r3, .L8016+116
ldr r0, [sp, #116] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #136] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1283
.L2634:
mov r1, #0
ldr r0, [sp, #120] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #136] @ float
ldr r0, [sp, #116] @ float
str r3, [sp, #144]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #120]
b .L1287
.L1253:
cmp r3, #0
movne r2, #0
bne .L95
b .L1254
.L1276:
ldr r3, .L8016+116
ldr r0, [sp, #116] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #136] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1977
.L1748:
ldr r3, [sp, #96]
cmp r3, #0
beq .L1983
.L1280:
ldr r3, .L8016+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1282
ldr r3, .L8016+104
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1283
b .L1282
.L1269:
ldr r3, [sp, #128]
cmp r3, #0
beq .L7917
.L1986:
ldr r3, .L8016+104
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8016+100
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L1273
ldr r3, .L8016+84
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1274
ldr r3, [sp, #128]
cmp r3, #0
beq .L2637
ldr r3, .L8016+116
ldr r0, [sp, #116] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #136] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1748
.L1750:
ldr r3, .L8016+84
ldr r2, [sp, #132]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7918
.L1977:
ldr r0, [sp, #120] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #120]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #144]
b .L1287
.L7918:
ldr r3, .L8016+112
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2634
.L2635:
ldr r3, .L8016+96
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1284
ldr r3, .L8016+104
ldr r2, .L8016+100
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #96]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #96]
bne .L95
.L1284:
mov r1, #0
ldr r0, [sp, #120] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #136] @ float
ldr r0, [sp, #116] @ float
str r3, [sp, #144]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #144]
str r2, [sp, #120]
ands r3, r3, r2
beq .L1287
str r3, [sp, #144]
str r3, [sp, #120]
b .L1288
.L1274:
ldr r3, .L8016+116
ldr r0, [sp, #116] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #136] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1748
.L1278:
ldr r3, [sp, #128]
cmp r3, #0
beq .L2634
b .L1982
.L1273:
ldr r3, .L8016+116
ldr r0, [sp, #116] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #136] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1282
b .L1278
.L7917:
ldr r3, .L8016+84
ldr r2, [sp, #132]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L1986
ldr r3, .L8016+112
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L3140
.L1985:
ldr r3, .L8016+104
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8016+100
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L1273
ldr r3, .L8016+116
ldr r0, [sp, #116] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #136] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1280
b .L2634
.L7881:
ldr r3, .L8016+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1290
ldr r3, .L8016+104
ldr r2, [sp, #96]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #116]
bne .L1290
ldr r3, .L8016+88
ldr r0, [sp, #148] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
beq .L1293
.L1292:
ldr r3, [sp, #128]
cmp r3, #0
beq .L1297
.L1971:
ldr r3, .L8016+84
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1298
ldr r3, .L8016+112
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1299
ldr r3, [sp, #132]
cmp r3, #0
bne .L1300
ldr r0, .L8016+96
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1301
ldr r1, .L8016+104
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8016+100
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #116]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #132]
str r1, [sp, #116]
bne .L95
ldr r3, [sp, #120]
cmp r3, #0
beq .L2627
.L1746:
ldr r3, [sp, #128]
cmp r3, #0
bne .L1745
.L1305:
ldr r3, [sp, #116]
cmp r3, #0
bne .L1309
.L2627:
ldr r3, .L8016+104
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1308
ldr r3, .L8016+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #116]
beq .L1310
b .L1308
.L1309:
ldr r3, [sp, #128]
cmp r3, #0
beq .L1966
ldr r3, [sp, #132]
cmp r3, #0
ldr r3, .L8016+84
ldrb r2, [r3] @ zero_extendqisi2
bne .L7919
ldr r3, .L8016+104
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8016+100
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L3136
b .L1313
.L1301:
ldr r3, [sp, #120]
cmp r3, #0
bne .L1746
b .L1305
.L7883:
ldr r3, .L8016+104
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #116]
beq .L1297
ldr r3, [sp, #96]
str r3, [sp, #116]
.L2629:
ldr r3, .L8016+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1292
ldr r3, .L8016+88
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #148] @ float
str r2, [sp, #96]
str r3, [sp, #100]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #96
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L8016+92
bl __aeabi_dcmple
cmp r0, #0
beq .L1292
b .L1297
.L1294:
ldr r3, [sp, #96]
cmp r3, #0
strne r3, [sp, #116]
bne .L1971
.L1970:
ldr r3, .L8016+104
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #116]
beq .L1971
mov r3, #0
str r3, [sp, #116]
b .L2629
.L7880:
ldr r3, .L8016+96
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #116]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1288
ldr r2, .L8016+100
ldr r3, .L8016+104
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #96]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #116]
bne .L95
ldr r3, .L8016+108
ldr r3, [r3] @ float
str r3, [sp, #152] @ float
.L1293:
ldr r3, [sp, #128]
cmp r3, #0
streq r3, [sp, #96]
beq .L3138
b .L1970
.L1300:
ldr r3, [sp, #120]
cmp r3, #0
beq .L1305
.L1304:
ldr r3, [sp, #128]
cmp r3, #0
bne .L1745
b .L1303
.L7878:
ldr r3, .L8016+112
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1284
b .L2635
.L7877:
ldr r3, .L8016+116
ldr r0, [sp, #116] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #136] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #96]
beq .L1750
b .L1983
.L7876:
ldr r3, .L8018
ldr r2, [sp, #132]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7920
cmp r3, #0
str r3, [sp, #96]
beq .L1274
ldr r3, [sp, #128]
b .L7650
.L1299:
ldr r3, [sp, #120]
cmp r3, #0
bne .L1304
ldr r3, [sp, #132]
cmp r3, #0
beq .L1305
b .L2626
.L1298:
ldr r3, [sp, #120]
cmp r3, #0
bne .L1968
b .L1303
.L7920:
ldr r3, .L8018+4
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #96]
beq .L3140
.L1272:
ldr r3, .L8018+8
ldr r0, [sp, #116] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #136] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #96]
beq .L2634
b .L1983
.L7879:
ldr r2, .L8018
str r3, [sp, #144]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #120]
cmp r2, #0
beq .L1288
b .L1287
.L7882:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #136]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1295
ldr r2, .L8018+12
ldr r3, .L8018+16
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #96]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #136]
str r3, [sp, #116]
bne .L95
ldr r3, [sp, #120]
cmp r3, #0
bne .L2628
b .L2627
.L3140:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1271
ldr r3, .L8018+16
ldr r2, .L8018+12
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #96]
orrs r3, r2, r3
movne r2, #0
bne .L95
b .L1272
.L1317:
ldr r3, .L8018+20
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
beq .L7921
ldr r3, [r4] @ float
mov r1, #0
str r3, [sp, #132] @ float
ldr r3, [r6] @ float
mov r0, r3
str r3, [sp, #148] @ float
bl __aeabi_fcmpeq
subs r2, r0, #0
bne .L1741
b .L95
.L1318:
bl __aeabi_f2d
ldr r3, .L8018+24
str r0, [sp, #272]
str r1, [sp, #276]
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #144] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #132] @ float
str r2, [sp, #120]
str r3, [sp, #124]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #120
ldmia r1, {r0-r1}
bl __aeabi_dsub
add r3, sp, #272
ldmia r3, {r2-r3}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L1321
ldr r3, .L8018+28
ldr r2, [sp, #128]
ldrb r3, [r3] @ zero_extendqisi2
subs r2, r2, #0
clz r3, r3
movne r2, #1
lsr r3, r3, #5
cmp r3, r2
bne .L1320
b .L1321
.L7886:
ldr r3, .L8018+32
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L95
b .L1315
.L1271:
ldr r3, [sp, #96]
cmp r3, #0
bne .L1985
b .L1272
.L7921:
ldr r3, [r4] @ float
ldr r1, .L8018+36
mov r0, r3
str r2, [sp, #96]
str r3, [sp, #132] @ float
bl __aeabi_fcmpge
cmp r0, #0
ldr r2, [sp, #96]
bne .L95
b .L7651
.L7867:
ldr r3, .L8018+40
ldr r0, [sp, #64] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #132] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #96]
bne .L2008
.L1756:
ldr r3, .L8018+44
ldr r2, [sp, #120]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7922
.L2002:
ldr r0, [sp, #128] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #128]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #136]
b .L1226
.L1204:
ldr r3, .L8018+48
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #96]
bne .L1208
ldr r3, .L8018+52
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1207
ldr r3, .L8018+56
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1207
ldr r3, .L8018+40
ldr r0, [sp, #64] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #132] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1207
ldr r3, .L8018+44
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2008
ldr r3, [sp, #116]
cmp r3, #0
bne .L2008
.L7649:
str r3, [sp, #96]
.L2658:
ldr r3, .L8018+60
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #120]
orrs r2, r3, r2
str r2, [sp, #132]
bne .L1215
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1215
ldr r2, .L8018+56
ldr r3, .L8018+52
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #96]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #132]
str r3, [sp, #96]
bne .L95
ldr r3, .L8018+40
ldr r0, [sp, #64] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #132] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1222
b .L2655
.L7866:
ldr r3, .L8018+44
ldr r2, [sp, #120]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7923
cmp r3, #0
str r3, [sp, #96]
beq .L1213
ldr r3, [sp, #116]
b .L7649
.L7922:
ldr r3, .L8018+60
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2655
b .L2656
.L1213:
ldr r3, .L8018+40
ldr r0, [sp, #64] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #132] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1217
.L1754:
ldr r3, [sp, #96]
cmp r3, #0
beq .L2008
.L1219:
ldr r3, .L8018+56
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1221
ldr r3, .L8018+52
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1222
b .L1221
.L7923:
ldr r3, .L8018+60
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #96]
beq .L3145
.L1211:
ldr r3, .L8018+40
ldr r0, [sp, #64] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #132] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #96]
beq .L2655
b .L2008
.L1215:
ldr r3, .L8018+40
ldr r0, [sp, #64] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #132] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1754
b .L2002
.L1208:
ldr r3, [sp, #116]
cmp r3, #0
beq .L7924
.L2011:
ldr r3, .L8018+52
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8018+56
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L1212
ldr r3, .L8018+44
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1213
ldr r3, [sp, #116]
cmp r3, #0
beq .L2658
ldr r3, .L8018+40
ldr r0, [sp, #64] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #132] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1754
b .L1756
.L3145:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1210
ldr r3, .L8018+52
ldr r2, .L8018+56
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #96]
orrs r3, r2, r3
movne r2, #0
bne .L95
b .L1211
.L7924:
ldr r3, .L8018+44
ldr r2, [sp, #120]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2011
ldr r3, .L8018+60
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L3145
.L2010:
ldr r3, .L8018+56
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8018+52
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L1212
ldr r3, .L8018+40
ldr r0, [sp, #64] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #132] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1219
b .L2655
.L1210:
ldr r3, [sp, #96]
cmp r3, #0
bne .L2010
b .L1211
.L1194:
ldr r3, .L8018+44
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
movne r2, #0
bne .L95
b .L1758
.L1192:
cmp r3, #0
movne r2, #0
bne .L95
b .L1193
.L7865:
ldr r3, .L8018+64
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #64]
bne .L1191
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1191
ldr r3, .L8018+68
ldr r2, [sp, #64]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8018+72
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #112]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #112]
bne .L95
b .L1191
.L7864:
ldr r3, [sp, #128]
cmp r3, #0
ldr r3, .L8018+76
ldrb r2, [r3] @ zero_extendqisi2
ldreq r3, [sp, #128]
streq r3, [sp, #112]
beq .L1191
ldr r3, .L8018+64
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #112]
beq .L3147
mov r3, #0
str r3, [sp, #112]
b .L1191
.L7863:
ldr r3, .L8018+68
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #112]
beq .L1175
ldr r3, [sp, #64]
str r3, [sp, #112]
.L2671:
ldr r3, .L8018+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1170
ldr r3, .L8018+80
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #136] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L8018+128
bl __aeabi_dcmple
cmp r0, #0
bne .L1175
.L1170:
ldr r3, [sp, #96]
cmp r3, #0
beq .L1175
.L2021:
ldr r3, .L8018+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1176
ldr r3, .L8018+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1177
ldr r3, [sp, #128]
cmp r3, #0
bne .L1178
ldr r0, .L8018+148
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1179
ldr r1, .L8018+68
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8018+72
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #112]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #128]
str r1, [sp, #112]
bne .L95
ldr r3, [sp, #116]
cmp r3, #0
beq .L2669
.L1760:
ldr r3, [sp, #96]
cmp r3, #0
bne .L1759
.L1183:
ldr r3, [sp, #112]
cmp r3, #0
bne .L1187
.L2669:
ldr r3, .L8018+68
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1186
ldr r3, .L8018+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #112]
beq .L1188
b .L1186
.L1178:
ldr r3, [sp, #116]
cmp r3, #0
beq .L1183
.L1182:
ldr r3, [sp, #96]
cmp r3, #0
bne .L1759
b .L1181
.L1177:
ldr r3, [sp, #116]
cmp r3, #0
bne .L1182
ldr r3, [sp, #128]
cmp r3, #0
beq .L1183
b .L2668
.L1179:
ldr r3, [sp, #116]
cmp r3, #0
bne .L1760
b .L1183
.L1187:
ldr r3, [sp, #96]
cmp r3, #0
bne .L7925
.L2016:
ldr r3, .L8018+68
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8018+72
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L1188
.L3146:
ldr r3, .L8018+80
ldr r1, [sp, #144] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L1191
b .L1188
.L1176:
ldr r3, [sp, #116]
cmp r3, #0
bne .L2018
b .L1181
.L7925:
ldr r3, [sp, #128]
cmp r3, #0
ldr r3, .L8018+76
ldrb r2, [r3] @ zero_extendqisi2
bne .L7926
ldr r3, .L8018+68
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8018+72
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L3146
b .L1191
.L1172:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #112]
bne .L2021
.L2020:
ldr r3, .L8018+68
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #112]
beq .L2021
mov r3, #0
str r3, [sp, #112]
b .L2671
.L7926:
ldr r3, .L8018+64
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2016
.L3147:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1190
ldr r3, .L8018+68
ldr r2, .L8018+72
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #112]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #112]
bne .L95
b .L1191
.L1190:
ldr r3, [sp, #112]
cmp r3, #0
bne .L2016
b .L1191
.L7861:
ldr r3, .L8018+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1168
ldr r3, .L8018+68
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #112]
bne .L1168
ldr r3, .L8018+80
ldr r0, [sp, #136] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L1170
.L1171:
ldr r3, [sp, #96]
cmp r3, #0
streq r3, [sp, #64]
beq .L3148
b .L2020
.L7860:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #112]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1166
ldr r2, .L8018+72
ldr r3, .L8018+68
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #112]
bne .L95
ldr r3, .L8018+84
ldr r3, [r3] @ float
str r3, [sp, #144] @ float
b .L1171
.L7859:
ldr r2, .L8018+76
str r3, [sp, #132]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #116]
cmp r2, #0
beq .L1166
b .L1165
.L7862:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #120]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1173
ldr r2, .L8018+72
ldr r3, .L8018+68
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #120]
str r3, [sp, #112]
bne .L95
ldr r3, [sp, #116]
cmp r3, #0
bne .L2670
b .L2669
.L7858:
ldr r3, .L8018+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1162
.L2677:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1162
ldr r3, .L8018+68
ldr r2, .L8018+72
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #64]
bne .L95
.L1162:
mov r1, #0
ldr r0, [sp, #116] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #120] @ float
ldr r0, [sp, #112] @ float
str r3, [sp, #132]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #132]
str r2, [sp, #116]
ands r3, r3, r2
beq .L1165
str r3, [sp, #132]
str r3, [sp, #116]
b .L1166
.L1149:
ldr r3, [sp, #64]
cmp r3, #0
beq .L1150
.L2035:
ldr r3, .L8018+68
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8018+72
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L7927
.L1151:
ldr r3, .L8018+88
ldr r0, [sp, #112] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #120] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1160
.L1156:
ldr r3, [sp, #96]
cmp r3, #0
bne .L2032
.L2676:
mov r1, #0
ldr r0, [sp, #116] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #120] @ float
ldr r0, [sp, #112] @ float
str r3, [sp, #132]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #116]
b .L1165
.L7857:
ldr r3, .L8018+88
ldr r0, [sp, #112] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #120] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
bne .L2033
.L1762:
ldr r3, .L8018+76
ldr r2, [sp, #128]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7928
.L2027:
ldr r0, [sp, #116] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #116]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #132]
b .L1165
.L7856:
ldr r3, .L8018+76
ldr r2, [sp, #128]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7929
cmp r3, #0
str r3, [sp, #64]
beq .L1152
ldr r3, [sp, #96]
.L7648:
str r3, [sp, #64]
.L2679:
ldr r3, .L8018+64
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #128]
orrs r2, r3, r2
str r2, [sp, #120]
bne .L1154
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1154
ldr r2, .L8018+72
ldr r3, .L8018+68
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #120]
str r3, [sp, #64]
bne .L95
ldr r3, .L8018+88
ldr r0, [sp, #112] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #120] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1161
b .L2676
.L7928:
ldr r3, .L8018+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2676
b .L2677
.L1154:
ldr r3, .L8018+88
ldr r0, [sp, #112] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #120] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L2027
.L1761:
ldr r3, [sp, #64]
cmp r3, #0
beq .L2033
.L1158:
ldr r3, .L8018+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1160
ldr r3, .L8018+68
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1161
b .L1160
.L1152:
ldr r3, .L8018+88
ldr r0, [sp, #112] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #120] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1156
b .L1761
.L7929:
ldr r3, .L8018+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L3150
.L1150:
ldr r3, .L8018+88
ldr r0, [sp, #112] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #120] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
beq .L2676
b .L2033
.L1133:
ldr r3, .L8018+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
movne r2, #0
bne .L95
b .L1765
.L1143:
ldr r3, .L8018+92
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L1147
ldr r3, .L8018+68
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1146
ldr r3, .L8018+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1146
ldr r3, .L8018+88
ldr r0, [sp, #112] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #120] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1146
ldr r3, .L8018+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2033
ldr r3, [sp, #96]
cmp r3, #0
bne .L2033
b .L7648
.L1131:
cmp r3, #0
movne r2, #0
bne .L95
b .L1132
.L7930:
ldr r3, .L8018+76
ldr r2, [sp, #128]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2036
ldr r3, .L8018+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2035
.L3150:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1149
ldr r3, .L8018+68
ldr r2, .L8018+72
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
bne .L95
b .L1150
.L1147:
ldr r3, [sp, #96]
cmp r3, #0
beq .L7930
.L2036:
ldr r3, .L8018+68
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8018+72
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L1151
ldr r3, .L8018+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1152
ldr r3, [sp, #96]
cmp r3, #0
beq .L2679
ldr r3, .L8018+88
ldr r0, [sp, #112] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #120] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1761
b .L1762
.L7927:
ldr r3, .L8018+88
ldr r0, [sp, #112] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #120] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1158
b .L2676
.L7855:
ldr r3, .L8018+108
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #64]
bne .L1130
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1130
ldr r3, .L8018+112
ldr r2, [sp, #64]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8018+116
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #108]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #108]
bne .L95
b .L1130
.L7854:
ldr r3, [sp, #116]
cmp r3, #0
ldr r3, .L8018+124
ldrb r2, [r3] @ zero_extendqisi2
ldreq r3, [sp, #116]
streq r3, [sp, #108]
beq .L1130
ldr r3, .L8018+108
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #108]
beq .L3152
mov r3, #0
str r3, [sp, #108]
b .L1130
.L8019:
.align 2
.L8018:
.word _x_s0_l1
.word s0_l1
.word s0_lambda
.word s0_evt1
.word s0_evt0
.word _x_bus_l1
.word bus_x
.word bus_l0
.word _x_bus_evt1
.word 1095761920
.word s1_lambda
.word _x_s1_l1
.word s1_evt2
.word s1_evt0
.word s1_evt1
.word s1_l1
.word s2_l1
.word s2_evt0
.word s2_evt1
.word _x_s2_l1
.word s2_backoff
.word s2_x
.word s2_lambda
.word s2_evt2
.word s3_backoff
.word s3_x
.word s3_evt2
.word s3_l1
.word s3_evt0
.word s3_evt1
.word s3_lambda
.word _x_s3_l1
.word -1074790400
.word s4_backoff
.word s4_x
.word s4_l1
.word s5_l1
.word delta
.word s5_evt0
.word s5_evt1
.word s4_evt2
.word s4_evt0
.word s4_evt1
.word s4_lambda
.word _x_s4_l1
.L7853:
ldr r3, .L8018+112
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #108]
beq .L1114
ldr r3, [sp, #64]
str r3, [sp, #108]
.L2692:
ldr r3, .L8018+116
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1109
ldr r3, .L8018+96
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #132] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L8018+128
bl __aeabi_dcmple
cmp r0, #0
bne .L1114
.L1109:
ldr r3, [sp, #96]
cmp r3, #0
beq .L1114
.L2046:
ldr r3, .L8018+124
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1115
ldr r3, .L8018+108
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1116
ldr r3, [sp, #116]
cmp r3, #0
bne .L1117
ldr r0, .L8018+148
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1118
ldr r1, .L8018+112
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8018+116
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #108]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #116]
str r1, [sp, #108]
bne .L95
ldr r3, [sp, #112]
cmp r3, #0
beq .L2690
.L1767:
ldr r3, [sp, #96]
cmp r3, #0
bne .L1766
.L1122:
ldr r3, [sp, #108]
cmp r3, #0
bne .L1126
.L2690:
ldr r3, .L8018+112
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1125
ldr r3, .L8018+116
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #108]
beq .L1127
b .L1125
.L1118:
ldr r3, [sp, #112]
cmp r3, #0
bne .L1767
b .L1122
.L1126:
ldr r3, [sp, #96]
cmp r3, #0
bne .L7931
.L2041:
ldr r3, .L8018+112
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8018+116
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L1127
.L3151:
ldr r3, .L8018+96
ldr r1, [sp, #136] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L1130
b .L1127
.L1117:
ldr r3, [sp, #112]
cmp r3, #0
beq .L1122
.L1121:
ldr r3, [sp, #96]
cmp r3, #0
bne .L1766
b .L1120
.L7851:
ldr r3, .L8018+116
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1107
ldr r3, .L8018+112
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #108]
bne .L1107
ldr r3, .L8018+96
ldr r0, [sp, #132] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L1109
.L1110:
ldr r3, [sp, #96]
cmp r3, #0
streq r3, [sp, #64]
beq .L3153
.L2045:
ldr r3, .L8018+112
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #108]
beq .L2046
mov r3, #0
str r3, [sp, #108]
b .L2692
.L7850:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #108]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1105
ldr r2, .L8018+116
ldr r3, .L8018+112
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #108]
bne .L95
ldr r3, .L8018+100
ldr r3, [r3] @ float
str r3, [sp, #136] @ float
b .L1110
.L1115:
ldr r3, [sp, #112]
cmp r3, #0
bne .L2043
b .L1120
.L1111:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #108]
bne .L2046
b .L2045
.L7932:
ldr r3, .L8018+108
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2041
.L3152:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1129
ldr r3, .L8018+112
ldr r2, .L8018+116
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #108]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #108]
bne .L95
b .L1130
.L1116:
ldr r3, [sp, #112]
cmp r3, #0
bne .L1121
ldr r3, [sp, #116]
cmp r3, #0
beq .L1122
b .L2689
.L7931:
ldr r3, [sp, #116]
cmp r3, #0
ldr r3, .L8018+124
ldrb r2, [r3] @ zero_extendqisi2
bne .L7932
ldr r3, .L8018+112
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8018+116
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L3151
b .L1130
.L1129:
ldr r3, [sp, #108]
cmp r3, #0
bne .L2041
b .L1130
.L7849:
ldr r2, .L8018+124
str r3, [sp, #120]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #112]
cmp r2, #0
beq .L1105
b .L1104
.L7852:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #128]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1112
ldr r2, .L8018+116
ldr r3, .L8018+112
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #128]
str r3, [sp, #108]
bne .L95
ldr r3, [sp, #112]
cmp r3, #0
bne .L2691
b .L2690
.L7848:
ldr r3, .L8018+108
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1101
.L2698:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1101
ldr r3, .L8018+112
ldr r2, .L8018+116
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #64]
bne .L95
.L1101:
mov r1, #0
ldr r0, [sp, #112] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #128] @ float
ldr r0, [sp, #108] @ float
str r3, [sp, #120]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #120]
str r2, [sp, #112]
ands r3, r2, r3
beq .L1104
str r3, [sp, #120]
str r3, [sp, #112]
b .L1105
.L1090:
ldr r3, .L8018+120
ldr r0, [sp, #108] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #128] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1099
.L1095:
ldr r3, [sp, #96]
cmp r3, #0
bne .L2057
.L2697:
mov r1, #0
ldr r0, [sp, #112] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #128] @ float
ldr r0, [sp, #108] @ float
str r3, [sp, #120]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #112]
b .L1104
.L7847:
ldr r3, .L8018+120
ldr r0, [sp, #108] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #128] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
bne .L2058
.L1771:
ldr r3, .L8018+124
ldr r2, [sp, #116]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7933
.L2052:
ldr r0, [sp, #112] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #112]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #120]
b .L1104
.L1082:
ldr r3, .L8018+104
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L1086
ldr r3, .L8018+112
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1085
ldr r3, .L8018+116
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1085
ldr r3, .L8018+120
ldr r0, [sp, #108] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #128] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1085
ldr r3, .L8018+124
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2058
ldr r3, [sp, #96]
cmp r3, #0
bne .L2058
.L7647:
str r3, [sp, #64]
.L2700:
ldr r3, .L8018+108
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #116]
orrs r2, r3, r2
str r2, [sp, #128]
bne .L1093
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1093
ldr r2, .L8018+116
ldr r3, .L8018+112
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #128]
str r3, [sp, #64]
bne .L95
ldr r3, .L8018+120
ldr r0, [sp, #108] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #128] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1100
b .L2697
.L7846:
ldr r3, .L8018+124
ldr r2, [sp, #116]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7934
cmp r3, #0
str r3, [sp, #64]
beq .L1091
ldr r3, [sp, #96]
b .L7647
.L7933:
ldr r3, .L8018+108
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2697
b .L2698
.L1091:
ldr r3, .L8018+120
ldr r0, [sp, #108] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #128] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1095
.L1769:
ldr r3, [sp, #64]
cmp r3, #0
beq .L2058
.L1097:
ldr r3, .L8018+116
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1099
ldr r3, .L8018+112
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1100
b .L1099
.L7934:
ldr r3, .L8018+108
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L3155
.L1089:
ldr r3, .L8018+120
ldr r0, [sp, #108] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #128] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
beq .L2697
b .L2058
.L1093:
ldr r3, .L8018+120
ldr r0, [sp, #108] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #128] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1769
b .L2052
.L1086:
ldr r3, [sp, #96]
cmp r3, #0
beq .L7935
.L2061:
ldr r3, .L8018+112
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8018+116
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L1090
ldr r3, .L8018+124
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1091
ldr r3, [sp, #96]
cmp r3, #0
beq .L2700
ldr r3, .L8018+120
ldr r0, [sp, #108] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #128] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1769
b .L1771
.L3155:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1088
ldr r3, .L8018+112
ldr r2, .L8018+116
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
bne .L95
b .L1089
.L7935:
ldr r3, .L8018+124
ldr r2, [sp, #116]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2061
ldr r3, .L8018+108
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L3155
.L2060:
ldr r3, .L8018+112
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8018+116
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L1090
ldr r3, .L8018+120
ldr r0, [sp, #108] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #128] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1097
b .L2697
.L1088:
ldr r3, [sp, #64]
cmp r3, #0
bne .L2060
b .L1089
.L1072:
ldr r3, .L8018+124
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
movne r2, #0
bne .L95
b .L1772
.L1070:
cmp r3, #0
movne r2, #0
bne .L95
b .L1071
.L7845:
ldr r3, .L8018+140
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #64]
bne .L1069
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1069
ldr r3, .L8018+164
ldr r2, [sp, #64]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8018+168
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #104]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #104]
bne .L95
b .L1069
.L7844:
ldr r3, [sp, #112]
cmp r3, #0
ldr r3, .L8018+176
ldrb r2, [r3] @ zero_extendqisi2
ldreq r3, [sp, #112]
streq r3, [sp, #104]
beq .L1069
ldr r3, .L8018+140
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #104]
beq .L3157
mov r3, #0
str r3, [sp, #104]
b .L1069
.L7843:
ldr r3, .L8018+164
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #104]
beq .L1053
ldr r3, [sp, #64]
str r3, [sp, #104]
.L2713:
ldr r3, .L8018+168
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1048
ldr r3, .L8018+132
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #120] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L8018+128
bl __aeabi_dcmple
cmp r0, #0
bne .L1053
.L1048:
ldr r3, [sp, #96]
cmp r3, #0
beq .L1053
.L2071:
ldr r3, .L8018+176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1054
ldr r3, .L8018+140
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1055
ldr r3, [sp, #112]
cmp r3, #0
bne .L1056
ldr r0, .L8018+148
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1057
ldr r1, .L8018+164
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8018+168
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #104]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #112]
str r1, [sp, #104]
bne .L95
ldr r3, [sp, #108]
cmp r3, #0
beq .L2711
.L1774:
ldr r3, [sp, #96]
cmp r3, #0
bne .L1773
.L1061:
ldr r3, [sp, #104]
cmp r3, #0
bne .L1065
.L2711:
ldr r3, .L8018+164
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1064
ldr r3, .L8018+168
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #104]
beq .L1066
b .L1064
.L1065:
ldr r3, [sp, #96]
cmp r3, #0
bne .L7936
.L2066:
ldr r3, .L8018+164
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8018+168
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L1066
.L3156:
ldr r3, .L8018+132
ldr r1, [sp, #132] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L1069
b .L1066
.L1050:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #104]
bne .L2071
.L2070:
ldr r3, .L8018+164
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #104]
beq .L2071
mov r3, #0
str r3, [sp, #104]
b .L2713
.L1056:
ldr r3, [sp, #108]
cmp r3, #0
beq .L1061
.L1060:
ldr r3, [sp, #96]
cmp r3, #0
bne .L1773
b .L1059
.L7937:
ldr r3, .L8018+140
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2066
.L3157:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1068
ldr r3, .L8018+164
ldr r2, .L8018+168
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #104]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #104]
bne .L95
b .L1069
.L7936:
ldr r3, [sp, #112]
cmp r3, #0
ldr r3, .L8018+176
ldrb r2, [r3] @ zero_extendqisi2
bne .L7937
ldr r3, .L8018+164
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8018+168
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L3156
b .L1069
.L1068:
ldr r3, [sp, #104]
cmp r3, #0
bne .L2066
b .L1069
.L1057:
ldr r3, [sp, #108]
cmp r3, #0
bne .L1774
b .L1061
.L1055:
ldr r3, [sp, #108]
cmp r3, #0
bne .L1060
ldr r3, [sp, #112]
cmp r3, #0
beq .L1061
b .L2710
.L1054:
ldr r3, [sp, #108]
cmp r3, #0
bne .L2068
b .L1059
.L7841:
ldr r3, .L8018+168
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1046
ldr r3, .L8018+164
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #104]
bne .L1046
ldr r3, .L8018+132
ldr r0, [sp, #120] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L1048
.L1049:
ldr r3, [sp, #96]
cmp r3, #0
streq r3, [sp, #64]
beq .L3158
b .L2070
.L7840:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #104]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1044
ldr r2, .L8018+168
ldr r3, .L8018+164
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #104]
bne .L95
ldr r3, .L8018+136
ldr r3, [r3] @ float
str r3, [sp, #132] @ float
b .L1049
.L7839:
ldr r2, .L8018+176
str r3, [sp, #128]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #108]
cmp r2, #0
beq .L1044
b .L1043
.L7842:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #116]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1051
ldr r2, .L8018+168
ldr r3, .L8018+164
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #116]
str r3, [sp, #104]
bne .L95
ldr r3, [sp, #108]
cmp r3, #0
bne .L2712
b .L2711
.L7838:
ldr r3, .L8018+140
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1040
.L2719:
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1040
ldr r3, .L8018+164
ldr r2, .L8018+168
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #64]
bne .L95
.L1040:
mov r1, #0
ldr r0, [sp, #108] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #116] @ float
ldr r0, [sp, #104] @ float
str r3, [sp, #128]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #128]
str r2, [sp, #108]
ands r3, r3, r2
beq .L1043
str r3, [sp, #128]
str r3, [sp, #108]
b .L1044
.L1030:
ldr r3, .L8018+172
ldr r0, [sp, #104] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #116] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1775
.L1034:
ldr r3, [sp, #96]
cmp r3, #0
bne .L2082
.L2718:
mov r1, #0
ldr r0, [sp, #108] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #116] @ float
ldr r0, [sp, #104] @ float
str r3, [sp, #128]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #108]
b .L1043
.L7837:
ldr r3, .L8018+172
ldr r0, [sp, #104] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #116] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
bne .L2083
.L1777:
ldr r3, .L8018+176
ldr r2, [sp, #112]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7938
.L2077:
ldr r0, [sp, #108] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #108]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #128]
b .L1043
.L7836:
ldr r3, .L8018+176
ldr r2, [sp, #112]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7939
cmp r3, #0
str r3, [sp, #64]
beq .L1030
ldr r3, [sp, #96]
.L7646:
str r3, [sp, #64]
.L2721:
ldr r3, .L8018+140
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #112]
orrs r2, r3, r2
str r2, [sp, #116]
bne .L1032
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1032
ldr r2, .L8018+168
ldr r3, .L8018+164
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #116]
str r3, [sp, #64]
bne .L95
ldr r3, .L8018+172
ldr r0, [sp, #104] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #116] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1039
b .L2718
.L7938:
ldr r3, .L8018+140
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2718
b .L2719
.L1032:
ldr r3, .L8018+172
ldr r0, [sp, #104] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #116] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L2077
.L1775:
ldr r3, [sp, #64]
cmp r3, #0
beq .L2083
.L1036:
ldr r3, .L8018+168
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1038
ldr r3, .L8018+164
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1039
b .L1038
.L7939:
ldr r3, .L8018+140
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L3160
.L1028:
ldr r3, .L8018+172
ldr r0, [sp, #104] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #116] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
beq .L2718
b .L2083
.L7835:
ldr r3, .L8018+144
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #64]
bne .L1008
ldr r3, .L8018+148
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1008
ldr r3, .L8018+152
ldr r2, [sp, #64]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8018+156
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #92]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #92]
bne .L95
b .L1008
.L1011:
ldr r3, .L8018+176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
movne r2, #0
bne .L95
b .L1779
.L1021:
ldr r3, .L8018+160
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L1025
ldr r3, .L8018+164
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1024
ldr r3, .L8018+168
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L1024
ldr r3, .L8018+172
ldr r0, [sp, #104] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #116] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1024
ldr r3, .L8018+176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2083
ldr r3, [sp, #96]
cmp r3, #0
bne .L2083
b .L7646
.L1009:
cmp r3, #0
movne r2, #0
bne .L95
b .L1010
.L1025:
ldr r3, [sp, #96]
cmp r3, #0
beq .L7940
.L2086:
ldr r3, .L8020
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8020+4
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L1029
ldr r3, .L8020+8
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1030
ldr r3, [sp, #96]
cmp r3, #0
beq .L2721
ldr r3, .L8020+12
ldr r0, [sp, #104] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #116] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1775
b .L1777
.L7833:
ldr r3, .L8020+16
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #92]
beq .L992
ldr r3, [sp, #64]
str r3, [sp, #92]
.L2734:
ldr r3, .L8020+116
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L987
ldr r3, .L8020+92
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #128] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L8020+20
bl __aeabi_dcmple
cmp r0, #0
bne .L992
.L987:
ldr r3, [sp, #104]
cmp r3, #0
beq .L992
.L2096:
ldr r3, .L8020+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L993
ldr r3, .L8020+104
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L994
ldr r3, [sp, #108]
cmp r3, #0
bne .L995
ldr r0, .L8020+144
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L996
ldr r1, .L8020+16
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8020+116
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #92]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #108]
str r1, [sp, #92]
bne .L95
ldr r3, [sp, #96]
cmp r3, #0
beq .L2732
.L1781:
ldr r3, [sp, #104]
cmp r3, #0
bne .L1780
.L1000:
ldr r3, [sp, #92]
cmp r3, #0
bne .L1004
.L2732:
ldr r3, .L8020+16
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L1003
ldr r3, .L8020+116
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #92]
beq .L1005
b .L1003
.L1004:
ldr r3, [sp, #104]
cmp r3, #0
bne .L7941
.L2091:
ldr r3, .L8020+16
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8020+116
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L1005
.L3161:
ldr r3, .L8020+92
ldr r1, [sp, #120] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L1008
b .L1005
.L996:
ldr r3, [sp, #96]
cmp r3, #0
bne .L1781
b .L1000
.L995:
ldr r3, [sp, #96]
cmp r3, #0
beq .L1000
.L999:
ldr r3, [sp, #104]
cmp r3, #0
bne .L1780
b .L998
.L7941:
ldr r3, [sp, #108]
cmp r3, #0
ldr r3, .L8020+100
ldrb r2, [r3] @ zero_extendqisi2
bne .L7942
ldr r3, .L8020+16
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8020+116
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L3161
b .L1008
.L994:
ldr r3, [sp, #96]
cmp r3, #0
bne .L999
ldr r3, [sp, #108]
cmp r3, #0
beq .L1000
b .L2731
.L989:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #92]
bne .L2096
.L2095:
ldr r3, .L8020+16
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #92]
beq .L2096
mov r3, #0
str r3, [sp, #92]
b .L2734
.L993:
ldr r3, [sp, #96]
cmp r3, #0
bne .L2093
b .L998
.L7942:
ldr r3, .L8020+104
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2091
.L3162:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1007
ldr r3, .L8020+16
ldr r2, .L8020+116
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #92]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #92]
bne .L95
b .L1008
.L7834:
ldr r3, [sp, #108]
cmp r3, #0
ldr r3, .L8020+100
ldrb r2, [r3] @ zero_extendqisi2
ldreq r3, [sp, #108]
streq r3, [sp, #92]
beq .L1008
ldr r3, .L8020+104
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #92]
beq .L3162
mov r3, #0
str r3, [sp, #92]
b .L1008
.L1029:
ldr r3, .L8020+12
ldr r0, [sp, #104] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #116] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1038
b .L1034
.L7940:
ldr r3, .L8020+8
ldr r2, [sp, #112]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2086
ldr r3, .L8020+24
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L3160
.L2085:
ldr r3, .L8020+4
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8020
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L1029
ldr r3, .L8020+12
ldr r0, [sp, #104] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #116] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1036
b .L2718
.L3160:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L1027
ldr r3, .L8020
ldr r2, .L8020+4
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
bne .L95
b .L1028
.L1007:
ldr r3, [sp, #92]
cmp r3, #0
bne .L2091
b .L1008
.L1027:
ldr r3, [sp, #64]
cmp r3, #0
bne .L2085
b .L1028
.L7815:
ldr r3, .L8020+56
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #64]
bne .L886
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L886
ldr r3, .L8020+68
ldr r2, [sp, #64]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8020+64
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #84]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #84]
bne .L95
b .L886
.L7814:
ldr r3, [sp, #104]
cmp r3, #0
ldr r3, .L8020+52
ldrb r2, [r3] @ zero_extendqisi2
ldreq r3, [sp, #104]
streq r3, [sp, #84]
beq .L886
ldr r3, .L8020+56
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #84]
beq .L3172
mov r3, #0
str r3, [sp, #84]
b .L886
.L7813:
ldr r3, .L8020+68
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #84]
beq .L870
ldr r3, [sp, #64]
str r3, [sp, #84]
.L2776:
ldr r3, .L8020+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L865
ldr r3, .L8020+40
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #112] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L8020+20
bl __aeabi_dcmple
cmp r0, #0
bne .L870
.L865:
ldr r3, [sp, #88]
cmp r3, #0
beq .L870
.L2146:
ldr r3, .L8020+52
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L871
ldr r3, .L8020+56
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L872
ldr r3, [sp, #104]
cmp r3, #0
bne .L873
ldr r0, .L8020+144
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L874
ldr r1, .L8020+68
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8020+64
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #84]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #104]
str r1, [sp, #84]
bne .L95
ldr r3, [sp, #92]
cmp r3, #0
beq .L2774
.L1795:
ldr r3, [sp, #88]
cmp r3, #0
bne .L1794
.L878:
ldr r3, [sp, #84]
cmp r3, #0
bne .L882
.L2774:
ldr r3, .L8020+68
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L881
ldr r3, .L8020+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #84]
beq .L883
b .L881
.L874:
ldr r3, [sp, #92]
cmp r3, #0
bne .L1795
b .L878
.L882:
ldr r3, [sp, #88]
cmp r3, #0
bne .L7943
.L2141:
ldr r3, .L8020+68
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8020+64
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L883
.L3171:
ldr r3, .L8020+40
ldr r1, [sp, #116] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L886
b .L883
.L873:
ldr r3, [sp, #92]
cmp r3, #0
beq .L878
.L877:
ldr r3, [sp, #88]
cmp r3, #0
bne .L1794
b .L876
.L7823:
ldr r3, .L8020+152
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #88]
beq .L931
ldr r3, [sp, #64]
str r3, [sp, #88]
.L2755:
ldr r3, .L8020+148
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L926
ldr r3, .L8020+120
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #116] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L8020+20
bl __aeabi_dcmple
cmp r0, #0
bne .L931
.L926:
ldr r3, [sp, #92]
cmp r3, #0
beq .L931
.L2122:
ldr r3, .L8020+136
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L932
ldr r3, .L8020+140
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L933
ldr r3, [sp, #96]
cmp r3, #0
bne .L934
ldr r0, .L8020+144
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L935
ldr r1, .L8020+152
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8020+148
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #88]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #96]
str r1, [sp, #88]
bne .L95
ldr r3, [sp, #104]
cmp r3, #0
beq .L2753
.L1788:
ldr r3, [sp, #92]
cmp r3, #0
bne .L1787
.L939:
ldr r3, [sp, #88]
cmp r3, #0
bne .L943
.L2753:
ldr r3, .L8020+152
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L942
ldr r3, .L8020+148
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #88]
beq .L944
b .L942
.L943:
ldr r3, [sp, #92]
cmp r3, #0
bne .L7944
.L2116:
ldr r3, .L8020+152
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8020+148
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L944
.L3166:
ldr r3, .L8020+120
ldr r1, [sp, #128] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L947
b .L944
.L934:
ldr r3, [sp, #104]
cmp r3, #0
beq .L939
.L938:
ldr r3, [sp, #92]
cmp r3, #0
bne .L1787
b .L937
.L928:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #88]
bne .L2122
.L2121:
ldr r3, .L8020+152
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #88]
beq .L2122
mov r3, #0
str r3, [sp, #88]
b .L2755
.L7944:
ldr r3, [sp, #96]
cmp r3, #0
ldr r3, .L8020+136
ldrb r2, [r3] @ zero_extendqisi2
bne .L7945
ldr r3, .L8020+152
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8020+148
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L3166
b .L947
.L935:
ldr r3, [sp, #104]
cmp r3, #0
bne .L1788
b .L939
.L828:
ldr r3, .L8020+52
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
movne r2, #0
bne .L95
b .L1800
.L826:
cmp r3, #0
movne r2, #0
bne .L95
b .L827
.L7805:
ldr r3, .L8020+76
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #64]
bne .L825
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L825
ldr r3, .L8020+80
ldr r2, [sp, #64]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8020+84
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #80]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #80]
bne .L95
b .L825
.L7804:
ldr r3, [sp, #92]
cmp r3, #0
ldr r3, .L8020+72
ldrb r2, [r3] @ zero_extendqisi2
ldreq r3, [sp, #92]
streq r3, [sp, #80]
beq .L825
ldr r3, .L8020+76
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #80]
beq .L3177
mov r3, #0
str r3, [sp, #80]
b .L825
.L7803:
ldr r3, .L8020+80
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #80]
beq .L809
ldr r3, [sp, #64]
str r3, [sp, #80]
.L2797:
ldr r3, .L8020+84
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L804
ldr r3, .L8020+28
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #108] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L8020+20
bl __aeabi_dcmple
cmp r0, #0
bne .L809
.L804:
ldr r3, [sp, #84]
cmp r3, #0
beq .L809
.L2171:
ldr r3, .L8020+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L810
ldr r3, .L8020+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L811
ldr r3, [sp, #92]
cmp r3, #0
bne .L812
ldr r0, .L8020+144
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L813
ldr r1, .L8020+80
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8020+84
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #80]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #92]
str r1, [sp, #80]
bne .L95
ldr r3, [sp, #88]
cmp r3, #0
beq .L2795
.L1802:
ldr r3, [sp, #84]
cmp r3, #0
bne .L1801
.L817:
ldr r3, [sp, #80]
cmp r3, #0
bne .L821
.L2795:
ldr r3, .L8020+80
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L820
ldr r3, .L8020+84
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #80]
beq .L822
b .L820
.L821:
ldr r3, [sp, #84]
cmp r3, #0
bne .L7946
.L2166:
ldr r3, .L8020+80
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8020+84
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L822
.L3176:
ldr r3, .L8020+28
ldr r1, [sp, #112] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L825
b .L822
.L806:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #80]
bne .L2171
.L2170:
ldr r3, .L8020+80
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #80]
beq .L2171
mov r3, #0
str r3, [sp, #80]
b .L2797
.L812:
ldr r3, [sp, #88]
cmp r3, #0
beq .L817
.L816:
ldr r3, [sp, #84]
cmp r3, #0
bne .L1801
b .L815
.L7947:
ldr r3, .L8020+76
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2166
.L3177:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L824
ldr r3, .L8020+80
ldr r2, .L8020+84
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #80]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #80]
bne .L95
b .L825
.L7946:
ldr r3, [sp, #92]
cmp r3, #0
ldr r3, .L8020+72
ldrb r2, [r3] @ zero_extendqisi2
bne .L7947
ldr r3, .L8020+80
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8020+84
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L3176
b .L825
.L824:
ldr r3, [sp, #80]
cmp r3, #0
bne .L2166
b .L825
.L813:
ldr r3, [sp, #88]
cmp r3, #0
bne .L1802
b .L817
.L811:
ldr r3, [sp, #88]
cmp r3, #0
bne .L816
ldr r3, [sp, #92]
cmp r3, #0
beq .L817
b .L2794
.L810:
ldr r3, [sp, #88]
cmp r3, #0
bne .L2168
b .L815
.L7801:
ldr r3, .L8020+84
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L802
ldr r3, .L8020+80
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #80]
bne .L802
ldr r3, .L8020+28
ldr r0, [sp, #108] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L804
.L805:
ldr r3, [sp, #84]
cmp r3, #0
streq r3, [sp, #64]
beq .L3178
b .L2170
.L7800:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #80]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L800
ldr r2, .L8020+84
ldr r3, .L8020+80
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #80]
bne .L95
ldr r3, .L8020+32
ldr r3, [r3] @ float
str r3, [sp, #112] @ float
b .L805
.L7799:
ldr r2, .L8020+72
str r3, [sp, #96]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #88]
cmp r2, #0
beq .L800
b .L799
.L7802:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #104]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L807
ldr r2, .L8020+84
ldr r3, .L8020+80
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #104]
str r3, [sp, #80]
bne .L95
ldr r3, [sp, #88]
cmp r3, #0
bne .L2796
b .L2795
.L7798:
ldr r3, .L8020+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L796
.L2803:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L796
ldr r3, .L8020+80
ldr r2, .L8020+84
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #64]
bne .L95
.L796:
mov r1, #0
ldr r0, [sp, #88] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #104] @ float
ldr r0, [sp, #80] @ float
str r3, [sp, #96]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #96]
str r2, [sp, #88]
ands r3, r3, r2
beq .L799
str r3, [sp, #96]
str r3, [sp, #88]
b .L800
.L783:
ldr r3, [sp, #64]
cmp r3, #0
beq .L784
.L2185:
ldr r3, .L8020+80
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8020+84
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L7948
.L785:
ldr r3, .L8020+36
ldr r0, [sp, #80] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #104] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L794
.L790:
ldr r3, [sp, #84]
cmp r3, #0
bne .L2182
.L2802:
mov r1, #0
ldr r0, [sp, #88] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #104] @ float
ldr r0, [sp, #80] @ float
str r3, [sp, #96]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #88]
b .L799
.L7797:
ldr r3, .L8020+36
ldr r0, [sp, #80] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #104] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
bne .L2183
.L1805:
ldr r3, .L8020+72
ldr r2, [sp, #92]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7949
.L2177:
ldr r0, [sp, #88] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #88]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #96]
b .L799
.L7796:
ldr r3, .L8020+72
ldr r2, [sp, #92]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7950
cmp r3, #0
str r3, [sp, #64]
beq .L786
ldr r3, [sp, #84]
.L7642:
str r3, [sp, #64]
.L2805:
ldr r3, .L8020+76
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #92]
orrs r2, r3, r2
str r2, [sp, #104]
bne .L788
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L788
ldr r2, .L8020+84
ldr r3, .L8020+80
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #104]
str r3, [sp, #64]
bne .L95
ldr r3, .L8020+36
ldr r0, [sp, #80] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #104] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L795
b .L2802
.L7949:
ldr r3, .L8020+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2802
b .L2803
.L788:
ldr r3, .L8020+36
ldr r0, [sp, #80] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #104] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L2177
.L1803:
ldr r3, [sp, #64]
cmp r3, #0
beq .L2183
.L792:
ldr r3, .L8020+84
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L794
ldr r3, .L8020+80
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L795
b .L794
.L786:
ldr r3, .L8020+36
ldr r0, [sp, #80] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #104] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L790
b .L1803
.L7950:
ldr r3, .L8020+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L3180
.L784:
ldr r3, .L8020+36
ldr r0, [sp, #80] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #104] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
beq .L2802
b .L2183
.L7809:
ldr r2, .L8020+52
str r3, [sp, #108]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #92]
cmp r2, #0
beq .L861
b .L860
.L8021:
.align 2
.L8020:
.word s4_evt0
.word s4_evt1
.word _x_s4_l1
.word s4_lambda
.word s5_evt0
.word -1074790400
.word s4_l1
.word s8_backoff
.word s8_x
.word s8_lambda
.word s7_backoff
.word s7_x
.word s7_evt2
.word _x_s7_l1
.word s7_l1
.word s7_lambda
.word s7_evt1
.word s7_evt0
.word _x_s8_l1
.word s8_l1
.word s8_evt0
.word s8_evt1
.word s5_evt2
.word s5_backoff
.word s5_x
.word _x_s5_l1
.word s5_l1
.word s5_lambda
.word s5_evt0
.word s5_evt1
.word s6_backoff
.word s6_x
.word s6_evt2
.word s6_lambda
.word _x_s6_l1
.word s6_l1
.word delta
.word s6_evt1
.word s6_evt0
.L7811:
ldr r3, .L8020+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L863
ldr r3, .L8020+68
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #84]
bne .L863
ldr r3, .L8020+40
ldr r0, [sp, #112] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L865
.L866:
ldr r3, [sp, #88]
cmp r3, #0
streq r3, [sp, #64]
beq .L3173
.L2145:
ldr r3, .L8020+68
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #84]
beq .L2146
mov r3, #0
str r3, [sp, #84]
b .L2776
.L7810:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #84]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L861
ldr r2, .L8020+64
ldr r3, .L8020+68
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #84]
bne .L95
ldr r3, .L8020+44
ldr r3, [r3] @ float
str r3, [sp, #116] @ float
b .L866
.L871:
ldr r3, [sp, #92]
cmp r3, #0
bne .L2143
b .L876
.L867:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #84]
bne .L2146
b .L2145
.L7951:
ldr r3, .L8020+56
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2141
.L3172:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L885
ldr r3, .L8020+68
ldr r2, .L8020+64
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #84]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #84]
bne .L95
b .L886
.L872:
ldr r3, [sp, #92]
cmp r3, #0
bne .L877
ldr r3, [sp, #104]
cmp r3, #0
beq .L878
b .L2773
.L7943:
ldr r3, [sp, #104]
cmp r3, #0
ldr r3, .L8020+52
ldrb r2, [r3] @ zero_extendqisi2
bne .L7951
ldr r3, .L8020+68
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8020+64
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L3171
b .L886
.L885:
ldr r3, [sp, #84]
cmp r3, #0
bne .L2141
b .L886
.L7807:
ldr r3, .L8020+60
ldr r0, [sp, #84] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
bne .L2158
.L1799:
ldr r3, .L8020+52
ldr r2, [sp, #104]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7952
.L2152:
ldr r0, [sp, #92] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #92]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #108]
b .L860
.L838:
ldr r3, .L8020+48
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L842
ldr r3, .L8020+68
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L841
ldr r3, .L8020+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L841
ldr r3, .L8020+60
ldr r0, [sp, #84] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L841
ldr r3, .L8020+52
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2158
ldr r3, [sp, #88]
cmp r3, #0
bne .L2158
.L7643:
str r3, [sp, #64]
.L2784:
ldr r3, .L8020+56
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #104]
orrs r2, r3, r2
str r2, [sp, #96]
bne .L849
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L849
ldr r2, .L8020+64
ldr r3, .L8020+68
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #96]
str r3, [sp, #64]
bne .L95
ldr r3, .L8020+60
ldr r0, [sp, #84] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L856
.L2781:
mov r1, #0
ldr r0, [sp, #92] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #96] @ float
ldr r0, [sp, #84] @ float
str r3, [sp, #108]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #92]
b .L860
.L7806:
ldr r3, .L8020+52
ldr r2, [sp, #104]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7953
cmp r3, #0
str r3, [sp, #64]
beq .L847
ldr r3, [sp, #88]
b .L7643
.L7952:
ldr r3, .L8020+56
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2781
.L2782:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L857
ldr r3, .L8020+68
ldr r2, .L8020+64
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #64]
bne .L95
.L857:
mov r1, #0
ldr r0, [sp, #92] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #96] @ float
ldr r0, [sp, #84] @ float
str r3, [sp, #108]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #108]
str r2, [sp, #92]
ands r3, r3, r2
beq .L860
str r3, [sp, #108]
str r3, [sp, #92]
b .L861
.L847:
ldr r3, .L8020+60
ldr r0, [sp, #84] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L851
.L1797:
ldr r3, [sp, #64]
cmp r3, #0
beq .L2158
.L853:
ldr r3, .L8020+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L855
ldr r3, .L8020+68
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L856
b .L855
.L7953:
ldr r3, .L8020+56
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L3175
.L845:
ldr r3, .L8020+60
ldr r0, [sp, #84] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
beq .L2781
b .L2158
.L849:
ldr r3, .L8020+60
ldr r0, [sp, #84] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1797
b .L2152
.L842:
ldr r3, [sp, #88]
cmp r3, #0
beq .L7954
.L2161:
ldr r3, .L8020+68
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8020+64
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L846
ldr r3, .L8020+52
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L847
ldr r3, [sp, #88]
cmp r3, #0
beq .L2784
ldr r3, .L8020+60
ldr r0, [sp, #84] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1797
b .L1799
.L3175:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L844
ldr r3, .L8020+68
ldr r2, .L8020+64
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
bne .L95
b .L845
.L846:
ldr r3, .L8020+60
ldr r0, [sp, #84] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L855
.L851:
ldr r3, [sp, #88]
cmp r3, #0
beq .L2781
b .L2157
.L7808:
ldr r3, .L8020+56
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L857
b .L2782
.L7954:
ldr r3, .L8020+52
ldr r2, [sp, #104]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2161
ldr r3, .L8020+56
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L3175
.L2160:
ldr r3, .L8020+68
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8020+64
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L846
ldr r3, .L8020+60
ldr r0, [sp, #84] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #96] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L853
b .L2781
.L844:
ldr r3, [sp, #64]
cmp r3, #0
bne .L2160
b .L845
.L7812:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #96]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L868
ldr r2, .L8020+64
ldr r3, .L8020+68
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #96]
str r3, [sp, #84]
bne .L95
ldr r3, [sp, #92]
cmp r3, #0
bne .L2775
b .L2774
.L7972:
ldr r3, .L8020+72
ldr r2, [sp, #92]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2186
ldr r3, .L8020+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2185
.L3180:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L783
ldr r3, .L8020+80
ldr r2, .L8020+84
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
bne .L95
b .L784
.L7827:
ldr r3, .L8020+108
ldr r0, [sp, #92] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #112] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
bne .L2108
.L1783:
ldr r3, .L8020+100
ldr r2, [sp, #108]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7955
.L2102:
ldr r0, [sp, #96] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #96]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #116]
b .L982
.L960:
ldr r3, .L8020+88
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L964
ldr r3, .L8020+112
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L963
ldr r3, .L8020+116
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L963
ldr r3, .L8020+108
ldr r0, [sp, #92] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #112] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L963
ldr r3, .L8020+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2108
ldr r3, [sp, #104]
cmp r3, #0
bne .L2108
.L7645:
str r3, [sp, #64]
.L2742:
ldr r3, .L8020+104
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #108]
orrs r2, r3, r2
str r2, [sp, #112]
bne .L971
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L971
ldr r2, .L8020+116
ldr r3, .L8020+112
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #112]
str r3, [sp, #64]
bne .L95
ldr r3, .L8020+108
ldr r0, [sp, #92] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #112] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L978
.L2739:
mov r1, #0
ldr r0, [sp, #96] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #112] @ float
ldr r0, [sp, #92] @ float
str r3, [sp, #116]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #96]
b .L982
.L7955:
ldr r3, .L8020+104
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2739
.L2740:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L979
ldr r3, .L8020+112
ldr r2, .L8020+116
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #64]
bne .L95
.L979:
mov r1, #0
ldr r0, [sp, #96] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #112] @ float
ldr r0, [sp, #92] @ float
str r3, [sp, #116]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #116]
str r2, [sp, #96]
ands r3, r2, r3
beq .L982
str r3, [sp, #116]
str r3, [sp, #96]
b .L983
.L971:
ldr r3, .L8020+108
ldr r0, [sp, #92] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #112] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L2102
.L1782:
ldr r3, [sp, #64]
cmp r3, #0
beq .L2108
.L975:
ldr r3, .L8020+116
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L977
ldr r3, .L8020+112
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L978
b .L977
.L964:
ldr r3, [sp, #104]
cmp r3, #0
beq .L7956
.L2111:
ldr r3, .L8020+112
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8020+116
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L968
ldr r3, .L8020+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L969
ldr r3, [sp, #104]
cmp r3, #0
beq .L2742
ldr r3, .L8020+108
ldr r0, [sp, #92] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #112] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1782
b .L1783
.L7826:
ldr r3, .L8020+100
ldr r2, [sp, #108]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7957
cmp r3, #0
str r3, [sp, #64]
beq .L969
ldr r3, [sp, #104]
b .L7645
.L7818:
ldr r3, .L8020+140
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L918
.L2761:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L918
ldr r3, .L8020+152
ldr r2, .L8020+148
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #64]
bne .L95
.L918:
mov r1, #0
ldr r0, [sp, #104] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #108] @ float
ldr r0, [sp, #88] @ float
str r3, [sp, #112]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #112]
str r2, [sp, #104]
ands r3, r2, r3
beq .L921
str r3, [sp, #112]
str r3, [sp, #104]
b .L922
.L7829:
ldr r2, .L8020+100
str r3, [sp, #116]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #96]
cmp r2, #0
beq .L983
b .L982
.L7832:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #112]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L990
ldr r2, .L8020+116
ldr r3, .L8020+112
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #112]
str r3, [sp, #92]
bne .L95
ldr r3, [sp, #96]
cmp r3, #0
bne .L2733
b .L2732
.L7831:
ldr r3, .L8020+116
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L985
ldr r3, .L8020+112
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #92]
bne .L985
ldr r3, .L8020+92
ldr r0, [sp, #128] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L987
.L988:
ldr r3, [sp, #104]
cmp r3, #0
streq r3, [sp, #64]
beq .L3163
b .L2095
.L7830:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #92]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L983
ldr r2, .L8020+116
ldr r3, .L8020+112
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #92]
bne .L95
ldr r3, .L8020+96
ldr r3, [r3] @ float
str r3, [sp, #120] @ float
b .L988
.L7828:
ldr r3, .L8020+104
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L979
b .L2740
.L969:
ldr r3, .L8020+108
ldr r0, [sp, #92] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #112] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1782
.L973:
ldr r3, [sp, #104]
cmp r3, #0
beq .L2739
b .L2107
.L950:
ldr r3, .L8020+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
movne r2, #0
bne .L95
b .L1786
.L948:
cmp r3, #0
movne r2, #0
bne .L95
b .L949
.L7825:
ldr r3, .L8020+140
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #64]
bne .L947
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L947
ldr r3, .L8020+152
ldr r2, [sp, #64]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8020+148
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #88]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #88]
bne .L95
b .L947
.L7824:
ldr r3, [sp, #96]
cmp r3, #0
ldr r3, .L8020+136
ldrb r2, [r3] @ zero_extendqisi2
ldreq r3, [sp, #96]
streq r3, [sp, #88]
beq .L947
ldr r3, .L8020+140
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #88]
beq .L3167
mov r3, #0
str r3, [sp, #88]
b .L947
.L968:
ldr r3, .L8020+108
ldr r0, [sp, #92] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #112] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L977
b .L973
.L7957:
ldr r3, .L8020+104
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L3165
.L967:
ldr r3, .L8020+108
ldr r0, [sp, #92] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #112] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
beq .L2739
b .L2108
.L7956:
ldr r3, .L8020+100
ldr r2, [sp, #108]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2111
ldr r3, .L8020+104
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L3165
.L2110:
ldr r3, .L8020+112
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8020+116
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L968
ldr r3, .L8020+108
ldr r0, [sp, #92] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #112] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L975
b .L2739
.L7945:
ldr r3, .L8020+140
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2116
.L3167:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L946
ldr r3, .L8020+152
ldr r2, .L8020+148
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #88]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #88]
bne .L95
b .L947
.L3165:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L966
ldr r3, .L8020+112
ldr r2, .L8020+116
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
bne .L95
b .L967
.L946:
ldr r3, [sp, #88]
cmp r3, #0
bne .L2116
b .L947
.L966:
ldr r3, [sp, #64]
cmp r3, #0
bne .L2110
b .L967
.L7821:
ldr r3, .L8020+148
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L924
ldr r3, .L8020+152
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #88]
bne .L924
ldr r3, .L8020+120
ldr r0, [sp, #116] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L926
.L927:
ldr r3, [sp, #92]
cmp r3, #0
streq r3, [sp, #64]
beq .L3168
b .L2121
.L7820:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #88]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L922
ldr r2, .L8020+148
ldr r3, .L8020+152
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #88]
bne .L95
ldr r3, .L8020+124
ldr r3, [r3] @ float
str r3, [sp, #128] @ float
b .L927
.L7819:
ldr r2, .L8020+136
str r3, [sp, #112]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #104]
cmp r2, #0
beq .L922
b .L921
.L7822:
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #108]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L929
ldr r2, .L8020+148
ldr r3, .L8020+152
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #108]
str r3, [sp, #88]
bne .L95
ldr r3, [sp, #104]
cmp r3, #0
bne .L2754
b .L2753
.L933:
ldr r3, [sp, #104]
cmp r3, #0
bne .L938
ldr r3, [sp, #96]
cmp r3, #0
beq .L939
b .L2752
.L932:
ldr r3, [sp, #104]
cmp r3, #0
bne .L2118
b .L937
.L889:
ldr r3, .L8020+136
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
movne r2, #0
bne .L95
b .L1793
.L899:
ldr r3, .L8020+128
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L903
ldr r3, .L8020+152
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L902
ldr r3, .L8020+148
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L902
ldr r3, .L8020+132
ldr r0, [sp, #88] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #108] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L902
ldr r3, .L8020+136
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2133
ldr r3, [sp, #92]
cmp r3, #0
bne .L2133
.L7644:
str r3, [sp, #64]
.L2763:
ldr r3, .L8020+140
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #96]
orrs r2, r3, r2
str r2, [sp, #108]
bne .L910
ldr r3, .L8020+144
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L910
ldr r2, .L8020+148
ldr r3, .L8020+152
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #108]
str r3, [sp, #64]
bne .L95
ldr r3, .L8022
ldr r0, [sp, #88] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #108] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L917
.L2760:
mov r1, #0
ldr r0, [sp, #104] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #108] @ float
ldr r0, [sp, #88] @ float
str r3, [sp, #112]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #104]
b .L921
.L887:
cmp r3, #0
movne r2, #0
bne .L95
b .L888
.L910:
ldr r3, .L8022
ldr r0, [sp, #88] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #108] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L2127
.L1790:
ldr r3, [sp, #64]
cmp r3, #0
beq .L2133
.L914:
ldr r3, .L8022+4
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L916
ldr r3, .L8022+8
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L917
b .L916
.L903:
ldr r3, [sp, #92]
cmp r3, #0
beq .L7958
.L2136:
ldr r3, .L8022+8
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8022+4
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L907
ldr r3, .L8022+12
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L908
ldr r3, [sp, #92]
cmp r3, #0
beq .L2763
ldr r3, .L8022
ldr r0, [sp, #88] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #108] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1790
.L1792:
ldr r3, .L8022+12
ldr r2, [sp, #96]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7959
.L2127:
ldr r0, [sp, #104] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #104]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #112]
b .L921
.L7959:
ldr r3, .L8022+16
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2760
b .L2761
.L908:
ldr r3, .L8022
ldr r0, [sp, #88] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #108] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1790
.L912:
ldr r3, [sp, #92]
cmp r3, #0
beq .L2760
b .L2132
.L7948:
ldr r3, .L8022+104
ldr r0, [sp, #80] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #104] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L792
b .L2802
.L7817:
ldr r3, .L8022
ldr r0, [sp, #88] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #108] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
beq .L1792
b .L2133
.L7816:
ldr r3, .L8022+12
ldr r2, [sp, #96]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7960
cmp r3, #0
str r3, [sp, #64]
beq .L908
ldr r3, [sp, #92]
b .L7644
.L907:
ldr r3, .L8022
ldr r0, [sp, #88] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #108] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L916
b .L912
.L7958:
ldr r3, .L8022+12
ldr r2, [sp, #96]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2136
ldr r3, .L8022+16
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L3170
.L2135:
ldr r3, .L8022+8
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8022+4
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L907
ldr r3, .L8022
ldr r0, [sp, #88] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #108] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L914
b .L2760
.L7960:
ldr r3, .L8022+16
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L3170
.L906:
ldr r3, .L8022
ldr r0, [sp, #88] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #108] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
beq .L2760
b .L2133
.L3170:
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L905
ldr r3, .L8022+8
ldr r2, .L8022+4
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
bne .L95
b .L906
.L7761:
ldr r3, .L8022+120
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L558
ldr r3, .L8022+116
ldr r2, [sp, #56]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #48]
bne .L558
ldr r3, .L8022+20
ldr r0, [sp, #88] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
beq .L561
.L560:
ldr r3, [sp, #64]
cmp r3, #0
beq .L565
.L2271:
ldr r3, .L8022+124
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L566
ldr r3, .L8022+128
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L567
ldr r3, [sp, #76]
cmp r3, #0
bne .L568
ldr r0, .L8022+168
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L569
ldr r1, .L8022+116
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8022+120
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #48]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #76]
str r1, [sp, #48]
bne .L95
ldr r3, [sp, #72]
cmp r3, #0
beq .L2879
.L1830:
ldr r3, [sp, #64]
cmp r3, #0
bne .L1829
.L573:
ldr r3, [sp, #48]
cmp r3, #0
bne .L577
.L2879:
ldr r3, .L8022+116
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L576
ldr r3, .L8022+120
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #48]
beq .L578
b .L576
.L577:
ldr r3, [sp, #64]
cmp r3, #0
bne .L7961
.L2266:
ldr r3, .L8022+116
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8022+120
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L578
.L3196:
ldr r3, .L8022+20
ldr r1, [sp, #92] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L581
b .L578
.L569:
ldr r3, [sp, #72]
cmp r3, #0
bne .L1830
b .L573
.L568:
ldr r3, [sp, #72]
cmp r3, #0
beq .L573
.L572:
ldr r3, [sp, #64]
cmp r3, #0
bne .L1829
b .L571
.L7961:
ldr r3, [sp, #76]
cmp r3, #0
ldr r3, .L8022+124
ldrb r2, [r3] @ zero_extendqisi2
bne .L7962
ldr r3, .L8022+116
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8022+120
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L3196
b .L581
.L567:
ldr r3, [sp, #72]
cmp r3, #0
bne .L572
ldr r3, [sp, #76]
cmp r3, #0
beq .L573
b .L2878
.L7760:
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #48]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L556
ldr r2, .L8022+120
ldr r3, .L8022+116
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #56]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #48]
bne .L95
ldr r3, .L8022+24
ldr r3, [r3] @ float
str r3, [sp, #92] @ float
.L561:
ldr r3, [sp, #64]
cmp r3, #0
streq r3, [sp, #56]
beq .L3198
.L2270:
ldr r3, .L8022+116
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #48]
beq .L2271
mov r3, #0
str r3, [sp, #48]
.L2881:
ldr r3, .L8022+120
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L560
ldr r3, .L8022+20
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #88] @ float
str r2, [sp, #56]
str r3, [sp, #60]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #56
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L8022+108
bl __aeabi_dcmple
cmp r0, #0
beq .L560
b .L565
.L566:
ldr r3, [sp, #72]
cmp r3, #0
bne .L2268
b .L571
.L7962:
ldr r3, .L8022+128
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2266
.L3197:
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L580
ldr r3, .L8022+116
ldr r2, .L8022+120
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #48]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #48]
bne .L95
b .L581
.L7778:
ldr r3, .L8022+164
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L674
.L2845:
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L674
ldr r3, .L8022+176
ldr r2, .L8022+172
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #64]
bne .L95
.L674:
mov r1, #0
ldr r0, [sp, #80] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #88] @ float
ldr r0, [sp, #72] @ float
str r3, [sp, #92]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #92]
str r2, [sp, #80]
ands r3, r3, r2
beq .L677
str r3, [sp, #92]
str r3, [sp, #80]
b .L678
.L7743:
ldr r3, .L8022+28
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp]
beq .L443
ldr r3, [sp, #40]
str r3, [sp]
.L2923:
ldr r3, .L8022+32
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L438
ldr r3, .L8022+36
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #80] @ float
str r2, [sp, #40]
str r3, [sp, #44]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #40
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L8022+108
bl __aeabi_dcmple
cmp r0, #0
bne .L443
.L438:
ldr r3, [sp, #48]
cmp r3, #0
beq .L443
.L2321:
ldr r3, .L8022+40
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L444
ldr r3, .L8022+44
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L445
ldr r3, [sp, #64]
cmp r3, #0
bne .L446
ldr r0, .L8022+168
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L447
ldr r1, .L8022+28
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8022+32
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #64]
str r1, [sp]
bne .L95
ldr r3, [sp, #56]
cmp r3, #0
beq .L2921
.L1844:
ldr r3, [sp, #48]
cmp r3, #0
bne .L1843
.L451:
ldr r3, [sp]
cmp r3, #0
bne .L455
.L2921:
ldr r3, .L8022+28
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L454
ldr r3, .L8022+32
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp]
beq .L456
b .L454
.L455:
ldr r3, [sp, #48]
cmp r3, #0
bne .L7963
.L2316:
ldr r3, .L8022+28
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8022+32
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L456
.L3206:
ldr r3, .L8022+36
ldr r1, [sp, #84] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L459
b .L456
.L446:
ldr r3, [sp, #56]
cmp r3, #0
beq .L451
.L450:
ldr r3, [sp, #48]
cmp r3, #0
bne .L1843
b .L449
.L440:
ldr r3, [sp, #40]
cmp r3, #0
strne r3, [sp]
bne .L2321
.L2320:
ldr r3, .L8022+28
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp]
beq .L2321
mov r3, #0
str r3, [sp]
b .L2923
.L7963:
ldr r3, [sp, #64]
cmp r3, #0
ldr r3, .L8022+40
ldrb r2, [r3] @ zero_extendqisi2
bne .L7964
ldr r3, .L8022+28
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8022+32
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L3206
b .L459
.L447:
ldr r3, [sp, #56]
cmp r3, #0
bne .L1844
b .L451
.L7787:
ldr r3, .L8022+48
ldr r0, [sp, #76] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #92] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
bne .L2208
.L1811:
ldr r3, .L8022+76
ldr r2, [sp, #88]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7965
.L2202:
ldr r0, [sp, #84] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #84]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #104]
b .L738
.L716:
ldr r3, .L8022+52
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L720
ldr r3, .L8022+84
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L719
ldr r3, .L8022+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L719
ldr r3, .L8022+48
ldr r0, [sp, #76] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #92] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L719
ldr r3, .L8022+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2208
ldr r3, [sp, #80]
cmp r3, #0
bne .L2208
.L7641:
str r3, [sp, #64]
.L2826:
ldr r3, .L8022+80
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #88]
orrs r2, r3, r2
str r2, [sp, #92]
bne .L727
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L727
ldr r2, .L8022+72
ldr r3, .L8022+84
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #92]
str r3, [sp, #64]
bne .L95
ldr r3, .L8022+48
ldr r0, [sp, #76] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #92] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L734
.L2823:
mov r1, #0
ldr r0, [sp, #84] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #92] @ float
ldr r0, [sp, #76] @ float
str r3, [sp, #104]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #84]
b .L738
.L7786:
ldr r3, .L8022+76
ldr r2, [sp, #88]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7966
cmp r3, #0
str r3, [sp, #64]
beq .L725
ldr r3, [sp, #80]
b .L7641
.L7965:
ldr r3, .L8022+80
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2823
.L2824:
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L735
ldr r3, .L8022+84
ldr r2, .L8022+72
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #64]
bne .L95
.L735:
mov r1, #0
ldr r0, [sp, #84] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #92] @ float
ldr r0, [sp, #76] @ float
str r3, [sp, #104]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #104]
str r2, [sp, #84]
ands r3, r3, r2
beq .L738
str r3, [sp, #104]
str r3, [sp, #84]
b .L739
.L725:
ldr r3, .L8022+48
ldr r0, [sp, #76] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #92] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L729
.L1810:
ldr r3, [sp, #64]
cmp r3, #0
beq .L2208
.L731:
ldr r3, .L8022+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L733
ldr r3, .L8022+84
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L734
b .L733
.L7966:
ldr r3, .L8022+80
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L3185
.L723:
ldr r3, .L8022+48
ldr r0, [sp, #76] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #92] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
beq .L2823
b .L2208
.L727:
ldr r3, .L8022+48
ldr r0, [sp, #76] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #92] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1810
b .L2202
.L720:
ldr r3, [sp, #80]
cmp r3, #0
beq .L7967
.L2211:
ldr r3, .L8022+84
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8022+72
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L724
ldr r3, .L8022+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L725
ldr r3, [sp, #80]
cmp r3, #0
beq .L2826
ldr r3, .L8022+48
ldr r0, [sp, #76] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #92] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1810
b .L1811
.L3185:
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L722
ldr r3, .L8022+84
ldr r2, .L8022+72
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
bne .L95
b .L723
.L724:
ldr r3, .L8022+48
ldr r0, [sp, #76] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #92] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L733
.L729:
ldr r3, [sp, #80]
cmp r3, #0
beq .L2823
b .L2207
.L7967:
ldr r3, .L8022+76
ldr r2, [sp, #88]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2211
ldr r3, .L8022+80
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L3185
.L2210:
ldr r3, .L8022+84
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8022+72
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L724
ldr r3, .L8022+48
ldr r0, [sp, #76] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #92] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L731
b .L2823
.L722:
ldr r3, [sp, #64]
cmp r3, #0
bne .L2210
b .L723
.L706:
ldr r3, .L8022+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
movne r2, #0
bne .L95
b .L1814
.L704:
cmp r3, #0
movne r2, #0
bne .L95
b .L705
.L7785:
ldr r3, .L8022+164
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #64]
bne .L703
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L703
ldr r3, .L8022+176
ldr r2, [sp, #64]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8022+172
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #72]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #72]
bne .L95
b .L703
.L7784:
ldr r3, [sp, #84]
cmp r3, #0
ldr r3, .L8022+160
ldrb r2, [r3] @ zero_extendqisi2
ldreq r3, [sp, #84]
streq r3, [sp, #72]
beq .L703
ldr r3, .L8022+164
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #72]
beq .L3187
mov r3, #0
str r3, [sp, #72]
b .L703
.L7783:
ldr r3, .L8022+176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #72]
beq .L687
ldr r3, [sp, #64]
str r3, [sp, #72]
.L2839:
ldr r3, .L8022+172
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L682
ldr r3, .L8022+56
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #104] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L8022+108
bl __aeabi_dcmple
cmp r0, #0
bne .L687
.L682:
ldr r3, [sp, #76]
cmp r3, #0
beq .L687
.L2221:
ldr r3, .L8022+160
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L688
ldr r3, .L8022+164
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L689
ldr r3, [sp, #84]
cmp r3, #0
bne .L690
ldr r0, .L8022+168
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L691
ldr r1, .L8022+176
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8022+172
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #72]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #84]
str r1, [sp, #72]
bne .L95
ldr r3, [sp, #80]
cmp r3, #0
beq .L2837
.L1816:
ldr r3, [sp, #76]
cmp r3, #0
bne .L1815
.L695:
ldr r3, [sp, #72]
cmp r3, #0
bne .L699
.L2837:
ldr r3, .L8022+176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L698
ldr r3, .L8022+172
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #72]
beq .L700
b .L698
.L690:
ldr r3, [sp, #80]
cmp r3, #0
beq .L695
.L694:
ldr r3, [sp, #76]
cmp r3, #0
bne .L1815
b .L693
.L689:
ldr r3, [sp, #80]
cmp r3, #0
bne .L694
ldr r3, [sp, #84]
cmp r3, #0
beq .L695
b .L2836
.L691:
ldr r3, [sp, #80]
cmp r3, #0
bne .L1816
b .L695
.L699:
ldr r3, [sp, #76]
cmp r3, #0
bne .L7968
.L2216:
ldr r3, .L8022+176
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8022+172
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L700
.L3186:
ldr r3, .L8022+56
ldr r1, [sp, #96] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L703
b .L700
.L688:
ldr r3, [sp, #80]
cmp r3, #0
bne .L2218
b .L693
.L7968:
ldr r3, [sp, #84]
cmp r3, #0
ldr r3, .L8022+160
ldrb r2, [r3] @ zero_extendqisi2
bne .L7969
ldr r3, .L8022+176
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8022+172
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L3186
b .L703
.L684:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #72]
bne .L2221
.L2220:
ldr r3, .L8022+176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #72]
beq .L2221
mov r3, #0
str r3, [sp, #72]
b .L2839
.L8023:
.align 2
.L8022:
.word s6_lambda
.word s6_evt1
.word s6_evt0
.word _x_s6_l1
.word s6_l1
.word s12_backoff
.word s12_x
.word s14_evt0
.word s14_evt1
.word s14_backoff
.word _x_s14_l1
.word s14_l1
.word s9_lambda
.word s9_evt2
.word s10_backoff
.word s10_x
.word s9_x
.word s9_backoff
.word s9_evt1
.word _x_s9_l1
.word s9_l1
.word s9_evt0
.word s8_evt2
.word s8_evt0
.word s8_evt1
.word _x_s8_l1
.word s8_lambda
.word -1074790400
.word s11_backoff
.word s12_evt0
.word s12_evt1
.word _x_s12_l1
.word s12_l1
.word s11_evt2
.word _x_s11_l1
.word s11_l1
.word s11_lambda
.word s11_evt1
.word s11_evt0
.word s10_evt2
.word _x_s10_l1
.word s10_l1
.word delta
.word s10_evt1
.word s10_evt0
.word s10_lambda
.L7969:
ldr r3, .L8022+164
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2216
.L3187:
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L702
ldr r3, .L8022+176
ldr r2, .L8022+172
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #72]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #72]
bne .L95
b .L703
.L702:
ldr r3, [sp, #72]
cmp r3, #0
bne .L2216
b .L703
.L7781:
ldr r3, .L8022+172
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L680
ldr r3, .L8022+176
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #72]
bne .L680
ldr r3, .L8022+56
ldr r0, [sp, #104] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L682
.L683:
ldr r3, [sp, #76]
cmp r3, #0
streq r3, [sp, #64]
beq .L3188
b .L2220
.L7780:
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #72]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L678
ldr r2, .L8022+172
ldr r3, .L8022+176
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #72]
bne .L95
ldr r3, .L8022+60
ldr r3, [r3] @ float
str r3, [sp, #96] @ float
b .L683
.L7779:
ldr r2, .L8022+160
str r3, [sp, #92]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #80]
cmp r2, #0
beq .L678
b .L677
.L7782:
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #88]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L685
ldr r2, .L8022+172
ldr r3, .L8022+176
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #88]
str r3, [sp, #72]
bne .L95
ldr r3, [sp, #80]
cmp r3, #0
bne .L2838
b .L2837
.L7789:
ldr r2, .L8022+76
str r3, [sp, #104]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #84]
cmp r2, #0
beq .L739
b .L738
.L7788:
ldr r3, .L8022+80
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L735
b .L2824
.L7792:
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #92]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L746
ldr r2, .L8022+72
ldr r3, .L8022+84
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #92]
str r3, [sp, #76]
bne .L95
ldr r3, [sp, #84]
cmp r3, #0
bne .L2817
.L2816:
ldr r3, .L8022+84
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L759
ldr r3, .L8022+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #76]
beq .L761
b .L759
.L7791:
ldr r3, .L8022+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L741
ldr r3, .L8022+84
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #76]
bne .L741
ldr r3, .L8022+68
ldr r0, [sp, #96] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
beq .L744
.L743:
ldr r3, [sp, #80]
cmp r3, #0
beq .L748
.L2196:
ldr r3, .L8022+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L749
ldr r3, .L8022+80
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L750
ldr r3, [sp, #88]
cmp r3, #0
bne .L751
ldr r0, .L8022+168
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L752
ldr r1, .L8022+84
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8022+72
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #76]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #88]
str r1, [sp, #76]
bne .L95
ldr r3, [sp, #84]
cmp r3, #0
beq .L2816
.L1809:
ldr r3, [sp, #80]
cmp r3, #0
bne .L1808
.L756:
ldr r3, [sp, #76]
cmp r3, #0
beq .L2816
ldr r3, [sp, #80]
cmp r3, #0
bne .L7970
.L2191:
ldr r3, .L8022+84
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8022+72
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L761
.L3181:
ldr r3, .L8022+68
ldr r1, [sp, #108] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L764
b .L761
.L7790:
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #76]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L739
ldr r2, .L8022+72
ldr r3, .L8022+84
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #76]
bne .L95
ldr r3, .L8022+64
ldr r3, [r3] @ float
str r3, [sp, #108] @ float
.L744:
ldr r3, [sp, #80]
cmp r3, #0
streq r3, [sp, #64]
beq .L3183
.L2195:
ldr r3, .L8022+84
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #76]
beq .L2196
mov r3, #0
str r3, [sp, #76]
.L2818:
ldr r3, .L8022+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L743
ldr r3, .L8022+68
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #96] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L8022+108
bl __aeabi_dcmple
cmp r0, #0
beq .L743
b .L748
.L7970:
ldr r3, [sp, #88]
cmp r3, #0
ldr r3, .L8022+76
ldrb r2, [r3] @ zero_extendqisi2
bne .L7971
ldr r3, .L8022+84
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8022+72
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L3181
b .L764
.L751:
ldr r3, [sp, #84]
cmp r3, #0
beq .L756
.L755:
ldr r3, [sp, #80]
cmp r3, #0
bne .L1808
b .L754
.L752:
ldr r3, [sp, #84]
cmp r3, #0
bne .L1809
b .L756
.L7971:
ldr r3, .L8022+80
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2191
.L3182:
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L763
ldr r3, .L8022+84
ldr r2, .L8022+72
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #76]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #76]
bne .L95
b .L764
.L749:
ldr r3, [sp, #84]
cmp r3, #0
bne .L2193
b .L754
.L750:
ldr r3, [sp, #84]
cmp r3, #0
bne .L755
ldr r3, [sp, #88]
cmp r3, #0
beq .L756
b .L2815
.L763:
ldr r3, [sp, #76]
cmp r3, #0
bne .L2191
b .L764
.L7795:
ldr r3, .L8022+80
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #64]
bne .L764
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L764
ldr r3, .L8022+84
ldr r2, [sp, #64]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8022+72
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #76]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #76]
bne .L95
b .L764
.L7794:
ldr r3, [sp, #88]
cmp r3, #0
ldr r3, .L8022+76
ldrb r2, [r3] @ zero_extendqisi2
ldreq r3, [sp, #88]
streq r3, [sp, #76]
beq .L764
ldr r3, .L8022+80
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #76]
beq .L3182
mov r3, #0
str r3, [sp, #76]
b .L764
.L7793:
ldr r3, .L8022+84
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #76]
beq .L748
ldr r3, [sp, #64]
str r3, [sp, #76]
b .L2818
.L745:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #76]
bne .L2196
b .L2195
.L767:
ldr r3, .L8022+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
movne r2, #0
bne .L95
b .L1807
.L777:
ldr r3, .L8022+88
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L781
ldr r3, .L8022+92
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L780
ldr r3, .L8022+96
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L780
ldr r3, .L8022+104
ldr r0, [sp, #80] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #104] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L780
ldr r3, .L8022+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2183
ldr r3, [sp, #84]
cmp r3, #0
bne .L2183
b .L7642
.L765:
cmp r3, #0
movne r2, #0
bne .L95
b .L766
.L781:
ldr r3, [sp, #84]
cmp r3, #0
beq .L7972
.L2186:
ldr r3, .L8022+92
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8022+96
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L785
ldr r3, .L8022+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L786
ldr r3, [sp, #84]
cmp r3, #0
beq .L2805
ldr r3, .L8022+104
ldr r0, [sp, #80] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #104] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1803
b .L1805
.L7769:
ldr r2, .L8022+136
str r3, [sp, #88]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #76]
cmp r2, #0
beq .L617
b .L616
.L7775:
ldr r3, .L8022+140
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #64]
bne .L642
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L642
ldr r3, .L8022+152
ldr r2, [sp, #64]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8022+148
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #56]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #56]
bne .L95
b .L642
.L7774:
ldr r3, [sp, #80]
cmp r3, #0
ldr r3, .L8022+136
ldrb r2, [r3] @ zero_extendqisi2
ldreq r3, [sp, #80]
streq r3, [sp, #56]
beq .L642
ldr r3, .L8022+140
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #56]
beq .L3192
mov r3, #0
str r3, [sp, #56]
b .L642
.L7773:
ldr r3, .L8022+152
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #56]
beq .L626
ldr r3, [sp, #64]
str r3, [sp, #56]
.L2860:
ldr r3, .L8022+148
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L621
ldr r3, .L8022+112
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #92] @ float
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #64
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L8022+108
bl __aeabi_dcmple
cmp r0, #0
bne .L626
.L621:
ldr r3, [sp, #72]
cmp r3, #0
beq .L626
.L2247:
ldr r3, .L8022+136
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L627
ldr r3, .L8022+140
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L628
ldr r3, [sp, #80]
cmp r3, #0
bne .L629
ldr r0, .L8022+168
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L630
ldr r1, .L8022+152
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8022+148
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #56]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #80]
str r1, [sp, #56]
bne .L95
ldr r3, [sp, #76]
cmp r3, #0
beq .L2858
.L1823:
ldr r3, [sp, #72]
cmp r3, #0
bne .L1822
.L634:
ldr r3, [sp, #56]
cmp r3, #0
bne .L638
.L2858:
ldr r3, .L8022+152
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L637
ldr r3, .L8022+148
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #56]
beq .L639
b .L637
.L630:
ldr r3, [sp, #76]
cmp r3, #0
bne .L1823
b .L634
.L638:
ldr r3, [sp, #72]
cmp r3, #0
bne .L7973
.L2241:
ldr r3, .L8022+152
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8022+148
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L639
.L3191:
ldr r3, .L8022+112
ldr r1, [sp, #104] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L642
b .L639
.L629:
ldr r3, [sp, #76]
cmp r3, #0
beq .L634
.L633:
ldr r3, [sp, #72]
cmp r3, #0
bne .L1822
b .L632
.L584:
ldr r3, .L8022+136
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
movne r2, #0
bne .L95
b .L1828
.L582:
cmp r3, #0
movne r2, #0
bne .L95
b .L583
.L7763:
ldr r3, .L8022+116
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #48]
beq .L565
ldr r3, [sp, #56]
str r3, [sp, #48]
b .L2881
.L562:
ldr r3, [sp, #56]
cmp r3, #0
strne r3, [sp, #48]
bne .L2271
b .L2270
.L7765:
ldr r3, .L8022+128
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #56]
bne .L581
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L581
ldr r3, .L8022+116
ldr r2, [sp, #56]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8022+120
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #48]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #48]
bne .L95
b .L581
.L7764:
ldr r3, [sp, #76]
cmp r3, #0
ldr r3, .L8022+124
ldrb r2, [r3] @ zero_extendqisi2
ldreq r3, [sp, #76]
streq r3, [sp, #48]
beq .L581
ldr r3, .L8022+128
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #48]
beq .L3197
mov r3, #0
str r3, [sp, #48]
b .L581
.L7767:
ldr r3, .L8022+144
ldr r0, [sp, #56] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #84] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
bne .L2258
.L1826:
ldr r3, .L8022+136
ldr r2, [sp, #80]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7974
.L2252:
ldr r0, [sp, #76] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #76]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #88]
b .L616
.L594:
ldr r3, .L8022+132
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L598
ldr r3, .L8022+152
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L597
ldr r3, .L8022+148
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L597
ldr r3, .L8022+144
ldr r0, [sp, #56] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #84] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L597
ldr r3, .L8022+136
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2258
ldr r3, [sp, #72]
cmp r3, #0
bne .L2258
.L7639:
str r3, [sp, #64]
.L2868:
ldr r3, .L8022+140
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #80]
orrs r2, r3, r2
str r2, [sp, #84]
bne .L605
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L605
ldr r2, .L8022+148
ldr r3, .L8022+152
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #84]
str r3, [sp, #64]
bne .L95
ldr r3, .L8022+144
ldr r0, [sp, #56] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #84] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L612
.L2865:
mov r1, #0
ldr r0, [sp, #76] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #84] @ float
ldr r0, [sp, #56] @ float
str r3, [sp, #88]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #76]
b .L616
.L7766:
ldr r3, .L8022+136
ldr r2, [sp, #80]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7975
cmp r3, #0
str r3, [sp, #64]
beq .L603
ldr r3, [sp, #72]
b .L7639
.L7974:
ldr r3, .L8022+140
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2865
.L2866:
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L613
ldr r3, .L8022+152
ldr r2, .L8022+148
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #64]
bne .L95
.L613:
mov r1, #0
ldr r0, [sp, #76] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #84] @ float
ldr r0, [sp, #56] @ float
str r3, [sp, #88]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #88]
str r2, [sp, #76]
ands r3, r3, r2
beq .L616
str r3, [sp, #88]
str r3, [sp, #76]
b .L617
.L603:
ldr r3, .L8022+144
ldr r0, [sp, #56] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #84] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L607
.L1824:
ldr r3, [sp, #64]
cmp r3, #0
beq .L2258
.L609:
ldr r3, .L8022+148
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L611
ldr r3, .L8022+152
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L612
b .L611
.L7975:
ldr r3, .L8022+140
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L3195
.L601:
ldr r3, .L8022+144
ldr r0, [sp, #56] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #84] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
beq .L2865
b .L2258
.L605:
ldr r3, .L8022+144
ldr r0, [sp, #56] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #84] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1824
b .L2252
.L598:
ldr r3, [sp, #72]
cmp r3, #0
beq .L7976
.L2261:
ldr r3, .L8022+152
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8022+148
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L602
ldr r3, .L8022+136
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L603
ldr r3, [sp, #72]
cmp r3, #0
beq .L2868
ldr r3, .L8022+144
ldr r0, [sp, #56] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #84] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1824
b .L1826
.L3195:
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L600
ldr r3, .L8022+152
ldr r2, .L8022+148
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
bne .L95
b .L601
.L602:
ldr r3, .L8022+144
ldr r0, [sp, #56] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #84] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L611
.L607:
ldr r3, [sp, #72]
cmp r3, #0
beq .L2865
b .L2257
.L7768:
ldr r3, .L8022+140
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L613
b .L2866
.L7976:
ldr r3, .L8022+136
ldr r2, [sp, #80]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2261
ldr r3, .L8022+140
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L3195
.L2260:
ldr r3, .L8022+148
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8022+152
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L602
ldr r3, .L8022+144
ldr r0, [sp, #56] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #84] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L609
b .L2865
.L600:
ldr r3, [sp, #64]
cmp r3, #0
bne .L2260
b .L601
.L7772:
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #84]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L624
ldr r2, .L8022+148
ldr r3, .L8022+152
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #84]
str r3, [sp, #56]
bne .L95
ldr r3, [sp, #76]
cmp r3, #0
bne .L2859
b .L2858
.L645:
ldr r3, .L8022+160
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
movne r2, #0
bne .L95
b .L1821
.L655:
ldr r3, .L8022+156
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
bne .L659
ldr r3, .L8022+176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L658
ldr r3, .L8022+172
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L658
ldr r3, .L8022+180
ldr r0, [sp, #72] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #88] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L658
ldr r3, .L8022+160
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2233
ldr r3, [sp, #76]
cmp r3, #0
bne .L2233
.L7640:
str r3, [sp, #64]
.L2847:
ldr r3, .L8022+164
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #84]
orrs r2, r3, r2
str r2, [sp, #88]
bne .L666
ldr r3, .L8022+168
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L666
ldr r2, .L8022+172
ldr r3, .L8022+176
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #88]
str r3, [sp, #64]
bne .L95
ldr r3, .L8022+180
ldr r0, [sp, #72] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #88] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L673
.L2844:
mov r1, #0
ldr r0, [sp, #80] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #88] @ float
ldr r0, [sp, #72] @ float
str r3, [sp, #92]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #80]
b .L677
.L643:
cmp r3, #0
movne r2, #0
bne .L95
b .L644
.L666:
ldr r3, .L8024
ldr r0, [sp, #72] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #88] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L2227
.L1818:
ldr r3, [sp, #64]
cmp r3, #0
beq .L2233
.L670:
ldr r3, .L8024+4
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L672
ldr r3, .L8024+8
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L673
b .L672
.L659:
ldr r3, [sp, #76]
cmp r3, #0
beq .L7977
.L2236:
ldr r3, .L8024+8
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8024+4
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L663
ldr r3, .L8024+12
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L664
ldr r3, [sp, #76]
cmp r3, #0
beq .L2847
ldr r3, .L8024
ldr r0, [sp, #72] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #88] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1818
.L1820:
ldr r3, .L8024+12
ldr r2, [sp, #84]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7978
.L2227:
ldr r0, [sp, #80] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #80]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #92]
b .L677
.L7978:
ldr r3, .L8024+16
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2844
b .L2845
.L664:
ldr r3, .L8024
ldr r0, [sp, #72] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #88] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1818
.L668:
ldr r3, [sp, #76]
cmp r3, #0
beq .L2844
b .L2232
.L580:
ldr r3, [sp, #48]
cmp r3, #0
bne .L2266
b .L581
.L7777:
ldr r3, .L8024
ldr r0, [sp, #72] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #88] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
beq .L1820
b .L2233
.L7776:
ldr r3, .L8024+12
ldr r2, [sp, #84]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7979
cmp r3, #0
str r3, [sp, #64]
beq .L664
ldr r3, [sp, #76]
b .L7640
.L663:
ldr r3, .L8024
ldr r0, [sp, #72] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #88] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L672
b .L668
.L7977:
ldr r3, .L8024+12
ldr r2, [sp, #84]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2236
ldr r3, .L8024+16
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L3190
.L2235:
ldr r3, .L8024+8
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8024+4
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L663
ldr r3, .L8024
ldr r0, [sp, #72] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #88] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L670
b .L2844
.L7979:
ldr r3, .L8024+16
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #64]
beq .L3190
.L662:
ldr r3, .L8024
ldr r0, [sp, #72] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #88] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #64]
beq .L2844
b .L2233
.L3190:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L661
ldr r3, .L8024+8
ldr r2, .L8024+4
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #64]
orrs r3, r2, r3
movne r2, #0
bne .L95
b .L662
.L7771:
ldr r3, .L8024+20
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L619
ldr r3, .L8024+24
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #56]
bne .L619
ldr r3, .L8024+28
ldr r0, [sp, #92] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L621
.L622:
ldr r3, [sp, #72]
cmp r3, #0
streq r3, [sp, #64]
beq .L3193
.L2246:
ldr r3, .L8024+24
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #56]
beq .L2247
mov r3, #0
str r3, [sp, #56]
b .L2860
.L627:
ldr r3, [sp, #76]
cmp r3, #0
bne .L2243
b .L632
.L628:
ldr r3, [sp, #76]
cmp r3, #0
bne .L633
ldr r3, [sp, #80]
cmp r3, #0
beq .L634
b .L2857
.L7973:
ldr r3, [sp, #80]
cmp r3, #0
ldr r3, .L8024+32
ldrb r2, [r3] @ zero_extendqisi2
bne .L7980
ldr r3, .L8024+24
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8024+20
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L3191
b .L642
.L623:
ldr r3, [sp, #64]
cmp r3, #0
strne r3, [sp, #56]
bne .L2247
b .L2246
.L7770:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #56]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L617
ldr r2, .L8024+20
ldr r3, .L8024+24
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #64]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #56]
bne .L95
ldr r3, .L8024+36
ldr r3, [r3] @ float
str r3, [sp, #104] @ float
b .L622
.L661:
ldr r3, [sp, #64]
cmp r3, #0
bne .L2235
b .L662
.L7980:
ldr r3, .L8024+40
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2241
.L3192:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L641
ldr r3, .L8024+24
ldr r2, .L8024+20
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #56]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #56]
bne .L95
b .L642
.L641:
ldr r3, [sp, #56]
cmp r3, #0
bne .L2241
b .L642
.L7747:
ldr r3, .L8024+44
ldr r0, [sp, #40] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #76] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #48]
bne .L2308
.L1841:
ldr r3, .L8024+88
ldr r2, [sp, #72]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7981
.L2302:
ldr r0, [sp, #64] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #64]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #80]
b .L494
.L472:
ldr r3, .L8024+48
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #48]
bne .L476
ldr r3, .L8024+96
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L475
ldr r3, .L8024+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L475
ldr r3, .L8024+44
ldr r0, [sp, #40] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #76] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L475
ldr r3, .L8024+88
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2308
ldr r3, [sp, #56]
cmp r3, #0
bne .L2308
.L7637:
str r3, [sp, #48]
.L2910:
ldr r3, .L8024+92
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #72]
orrs r2, r3, r2
str r2, [sp, #76]
bne .L483
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L483
ldr r2, .L8024+100
ldr r3, .L8024+96
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #48]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #76]
str r3, [sp, #48]
bne .L95
ldr r3, .L8024+44
ldr r0, [sp, #40] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #76] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L490
.L2907:
mov r1, #0
ldr r0, [sp, #64] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #76] @ float
ldr r0, [sp, #40] @ float
str r3, [sp, #80]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #64]
b .L494
.L7746:
ldr r3, .L8024+88
ldr r2, [sp, #72]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7982
cmp r3, #0
str r3, [sp, #48]
beq .L481
ldr r3, [sp, #56]
b .L7637
.L7981:
ldr r3, .L8024+92
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2907
.L2908:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L491
ldr r3, .L8024+96
ldr r2, .L8024+100
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #48]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #48]
bne .L95
.L491:
mov r1, #0
ldr r0, [sp, #64] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #76] @ float
ldr r0, [sp, #40] @ float
str r3, [sp, #80]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #80]
str r2, [sp, #64]
ands r3, r2, r3
beq .L494
str r3, [sp, #80]
str r3, [sp, #64]
b .L495
.L481:
ldr r3, .L8024+44
ldr r0, [sp, #40] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #76] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L485
.L1839:
ldr r3, [sp, #48]
cmp r3, #0
beq .L2308
.L487:
ldr r3, .L8024+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L489
ldr r3, .L8024+96
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L490
b .L489
.L7982:
ldr r3, .L8024+92
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #48]
beq .L3205
.L479:
ldr r3, .L8024+44
ldr r0, [sp, #40] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #76] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #48]
beq .L2907
b .L2308
.L483:
ldr r3, .L8024+44
ldr r0, [sp, #40] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #76] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1839
b .L2302
.L476:
ldr r3, [sp, #56]
cmp r3, #0
beq .L7983
.L2311:
ldr r3, .L8024+96
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8024+100
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L480
ldr r3, .L8024+88
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L481
ldr r3, [sp, #56]
cmp r3, #0
beq .L2910
ldr r3, .L8024+44
ldr r0, [sp, #40] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #76] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1839
b .L1841
.L3205:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L478
ldr r3, .L8024+96
ldr r2, .L8024+100
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #48]
orrs r3, r2, r3
movne r2, #0
bne .L95
b .L479
.L480:
ldr r3, .L8024+44
ldr r0, [sp, #40] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #76] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L489
.L485:
ldr r3, [sp, #56]
cmp r3, #0
beq .L2907
b .L2307
.L7983:
ldr r3, .L8024+88
ldr r2, [sp, #72]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2311
ldr r3, .L8024+92
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L3205
.L2310:
ldr r3, .L8024+100
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8024+96
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L480
ldr r3, .L8024+44
ldr r0, [sp, #40] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #76] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L487
b .L2907
.L478:
ldr r3, [sp, #48]
cmp r3, #0
bne .L2310
b .L479
.L462:
ldr r3, .L8024+88
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
movne r2, #0
bne .L95
b .L1842
.L460:
cmp r3, #0
movne r2, #0
bne .L95
b .L461
.L7745:
ldr r3, .L8024+152
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #40]
bne .L459
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L459
ldr r3, .L8024+180
ldr r2, [sp, #40]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8024+176
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp]
bne .L95
b .L459
.L7744:
ldr r3, [sp, #64]
cmp r3, #0
ldr r3, .L8024+168
ldrb r2, [r3] @ zero_extendqisi2
ldreq r3, [sp, #64]
streq r3, [sp]
beq .L459
ldr r3, .L8024+152
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp]
beq .L3207
mov r3, #0
str r3, [sp]
b .L459
.L7749:
ldr r2, .L8024+88
str r3, [sp, #80]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #64]
cmp r2, #0
beq .L495
b .L494
.L7748:
ldr r3, .L8024+92
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L491
b .L2908
.L7752:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #76]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L502
ldr r2, .L8024+100
ldr r3, .L8024+96
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #48]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #76]
str r3, [sp, #40]
bne .L95
ldr r3, [sp, #64]
cmp r3, #0
bne .L2901
.L2900:
ldr r3, .L8024+96
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L515
ldr r3, .L8024+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
beq .L517
b .L515
.L7964:
ldr r3, .L8024+152
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2316
.L3207:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L458
ldr r3, .L8024+180
ldr r2, .L8024+176
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp]
bne .L95
b .L459
.L7751:
ldr r3, .L8024+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L497
ldr r3, .L8024+96
ldr r2, [sp, #48]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #40]
bne .L497
ldr r3, .L8024+52
ldr r0, [sp, #84] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
beq .L500
.L499:
ldr r3, [sp, #56]
cmp r3, #0
beq .L504
.L2296:
ldr r3, .L8024+88
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L505
ldr r3, .L8024+92
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L506
ldr r3, [sp, #72]
cmp r3, #0
bne .L507
ldr r0, .L8024+172
mov r1, #0
ldr r0, [r0] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L508
ldr r1, .L8024+96
ldrb r3, [r1] @ zero_extendqisi2
ldr r1, .L8024+100
ldrb r2, [r1] @ zero_extendqisi2
ldr r1, [sp, #40]
orr r3, r3, r2
orr r3, r1, r3
ands r1, r3, #255
ldrne r2, [sp, #72]
str r1, [sp, #40]
bne .L95
ldr r3, [sp, #64]
cmp r3, #0
beq .L2900
.L1837:
ldr r3, [sp, #56]
cmp r3, #0
bne .L1836
.L512:
ldr r3, [sp, #40]
cmp r3, #0
beq .L2900
ldr r3, [sp, #56]
cmp r3, #0
bne .L7984
.L2291:
ldr r3, .L8024+96
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8024+100
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L517
.L3201:
ldr r3, .L8024+52
ldr r1, [sp, #88] @ float
ldr r0, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L520
b .L517
.L7750:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #40]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L495
ldr r2, .L8024+100
ldr r3, .L8024+96
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #48]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #40]
bne .L95
ldr r3, .L8024+56
ldr r3, [r3] @ float
str r3, [sp, #88] @ float
.L500:
ldr r3, [sp, #56]
cmp r3, #0
streq r3, [sp, #48]
beq .L3203
.L2295:
ldr r3, .L8024+96
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
beq .L2296
mov r3, #0
str r3, [sp, #40]
.L2902:
ldr r3, .L8024+100
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L499
ldr r3, .L8024+52
ldr r0, [r3] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [sp, #84] @ float
str r2, [sp, #48]
str r3, [sp, #52]
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #48
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, #0
ldr r3, .L8024+60
bl __aeabi_dcmple
cmp r0, #0
beq .L499
b .L504
.L507:
ldr r3, [sp, #64]
cmp r3, #0
beq .L512
.L511:
ldr r3, [sp, #56]
cmp r3, #0
bne .L1836
b .L510
.L508:
ldr r3, [sp, #64]
cmp r3, #0
bne .L1837
b .L512
.L505:
ldr r3, [sp, #64]
cmp r3, #0
bne .L2293
b .L510
.L506:
ldr r3, [sp, #64]
cmp r3, #0
bne .L511
ldr r3, [sp, #72]
cmp r3, #0
beq .L512
b .L2899
.L458:
ldr r3, [sp]
cmp r3, #0
bne .L2316
b .L459
.L7984:
ldr r3, [sp, #72]
cmp r3, #0
ldr r3, .L8024+88
ldrb r2, [r3] @ zero_extendqisi2
bne .L7985
ldr r3, .L8024+96
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8024+100
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L3201
b .L520
.L7755:
ldr r3, .L8024+92
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #0
str r2, [sp, #48]
bne .L520
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L520
ldr r3, .L8024+96
ldr r2, [sp, #48]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8024+100
ldrb r3, [r3] @ zero_extendqisi2
orr r1, r1, r3
ldr r3, [sp, #40]
orr r1, r3, r1
ands r3, r1, #255
str r3, [sp, #40]
bne .L95
b .L520
.L7758:
ldr r3, .L8024+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L552
.L2887:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L552
ldr r3, .L8024+72
ldr r2, .L8024+76
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #56]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #56]
bne .L95
.L552:
mov r1, #0
ldr r0, [sp, #72] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #80] @ float
ldr r0, [sp, #48] @ float
str r3, [sp, #84]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #84]
str r2, [sp, #72]
ands r3, r3, r2
beq .L555
str r3, [sp, #84]
str r3, [sp, #72]
b .L556
.L539:
ldr r3, [sp, #56]
cmp r3, #0
beq .L540
.L2285:
ldr r3, .L8024+72
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8024+76
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L7986
.L541:
ldr r3, .L8024+84
ldr r0, [sp, #48] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #80] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L550
.L546:
ldr r3, [sp, #64]
cmp r3, #0
bne .L2282
.L2886:
mov r1, #0
ldr r0, [sp, #72] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #80] @ float
ldr r0, [sp, #48] @ float
str r3, [sp, #84]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #72]
b .L555
.L7757:
ldr r3, .L8024+84
ldr r0, [sp, #48] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #80] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #56]
bne .L2283
.L1832:
ldr r3, .L8024+80
ldr r2, [sp, #76]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7987
.L2277:
ldr r0, [sp, #72] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #72]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #84]
b .L555
.L7756:
ldr r3, .L8024+80
ldr r2, [sp, #76]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7988
cmp r3, #0
str r3, [sp, #56]
beq .L542
ldr r3, [sp, #64]
.L7638:
str r3, [sp, #56]
.L2889:
ldr r3, .L8024+64
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #76]
orrs r2, r3, r2
str r2, [sp, #80]
bne .L544
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L544
ldr r2, .L8024+76
ldr r3, .L8024+72
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #56]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #80]
str r3, [sp, #56]
bne .L95
ldr r3, .L8024+84
ldr r0, [sp, #48] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #80] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L551
b .L2886
.L7987:
ldr r3, .L8024+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2886
b .L2887
.L544:
ldr r3, .L8024+84
ldr r0, [sp, #48] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #80] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L2277
.L1831:
ldr r3, [sp, #56]
cmp r3, #0
beq .L2283
.L548:
ldr r3, .L8024+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L550
ldr r3, .L8024+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L551
b .L550
.L542:
ldr r3, .L8024+84
ldr r0, [sp, #48] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #80] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L546
b .L1831
.L8025:
.align 2
.L8024:
.word s10_lambda
.word s10_evt1
.word s10_evt0
.word _x_s10_l1
.word s10_l1
.word s11_evt1
.word s11_evt0
.word s11_backoff
.word _x_s11_l1
.word s11_x
.word s11_l1
.word s13_lambda
.word s13_evt2
.word s13_backoff
.word s13_x
.word -1074790400
.word s12_l1
.word s12_evt2
.word s12_evt0
.word s12_evt1
.word _x_s12_l1
.word s12_lambda
.word _x_s13_l1
.word s13_l1
.word s13_evt0
.word s13_evt1
.word _x_s15_l1
.word s15_lambda
.word s15_backoff
.word _x_s16_l1
.word s16_l1
.word s15_l1
.word s15_evt0
.word s15_evt2
.word s15_evt1
.word s18_evt0
.word s18_evt1
.word s14_evt2
.word s14_l1
.word s14_lambda
.word s14_backoff
.word s14_x
.word _x_s14_l1
.word delta
.word s14_evt1
.word s14_evt0
.L7988:
ldr r3, .L8024+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #56]
beq .L3200
.L540:
ldr r3, .L8024+84
ldr r0, [sp, #48] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #80] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #56]
beq .L2886
b .L2283
.L7759:
ldr r2, .L8024+80
str r3, [sp, #84]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #72]
cmp r2, #0
beq .L556
b .L555
.L905:
ldr r3, [sp, #64]
cmp r3, #0
bne .L2135
b .L906
.L7762:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #80]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L563
ldr r2, .L8024+76
ldr r3, .L8024+72
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #56]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #80]
str r3, [sp, #48]
bne .L95
ldr r3, [sp, #72]
cmp r3, #0
bne .L2880
b .L2879
.L7989:
ldr r3, .L8024+80
ldr r2, [sp, #76]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2286
ldr r3, .L8024+64
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2285
.L3200:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L539
ldr r3, .L8024+72
ldr r2, .L8024+76
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #56]
orrs r3, r2, r3
movne r2, #0
bne .L95
b .L540
.L523:
ldr r3, .L8024+80
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
movne r2, #0
bne .L95
b .L1835
.L533:
ldr r3, .L8024+68
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #56]
bne .L537
ldr r3, .L8024+72
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L536
ldr r3, .L8024+76
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L536
ldr r3, .L8024+84
ldr r0, [sp, #48] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #80] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L536
ldr r3, .L8024+80
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2283
ldr r3, [sp, #64]
cmp r3, #0
bne .L2283
b .L7638
.L521:
cmp r3, #0
movne r2, #0
bne .L95
b .L522
.L537:
ldr r3, [sp, #64]
cmp r3, #0
beq .L7989
.L2286:
ldr r3, .L8024+72
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8024+76
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L541
ldr r3, .L8024+80
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L542
ldr r3, [sp, #64]
cmp r3, #0
beq .L2889
ldr r3, .L8024+84
ldr r0, [sp, #48] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #80] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1831
b .L1832
.L7986:
ldr r3, .L8024+84
ldr r0, [sp, #48] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #80] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L548
b .L2886
.L7753:
ldr r3, .L8024+96
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
beq .L504
ldr r3, [sp, #48]
str r3, [sp, #40]
b .L2902
.L501:
ldr r3, [sp, #48]
cmp r3, #0
strne r3, [sp, #40]
bne .L2296
b .L2295
.L7754:
ldr r3, [sp, #72]
cmp r3, #0
ldr r3, .L8024+88
ldrb r2, [r3] @ zero_extendqisi2
ldreq r3, [sp, #72]
streq r3, [sp, #40]
beq .L520
ldr r3, .L8024+92
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #40]
beq .L3202
mov r3, #0
str r3, [sp, #40]
b .L520
.L7985:
ldr r3, .L8024+92
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2291
.L3202:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L519
ldr r3, .L8024+96
ldr r2, .L8024+100
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #40]
orr r3, r2, r3
ands r3, r3, #255
movne r2, #0
str r3, [sp, #40]
bne .L95
b .L520
.L7702:
ldr r3, .L8024+104
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7990
cmp r3, #0
str r3, [sp, #40]
beq .L359
ldr r3, [sp, #48]
b .L7635
.L7704:
ldr r3, .L8024+136
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
beq .L368
mov r3, #0
str r3, [sp, #40]
b .L367
.L7703:
ldr r3, .L8024+108
ldr r0, [sp, #32] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L2358
b .L363
.L519:
ldr r3, [sp, #40]
cmp r3, #0
bne .L2291
b .L520
.L7706:
ldr r3, .L8024+128
ldr r2, [sp, #40]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #32]
bne .L375
ldr r3, .L8024+112
ldr r0, [sp, #80] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L377
b .L378
.L338:
cmp r3, #0
movne r2, #0
bne .L95
b .L339
.L7700:
ldr r3, .L8024+116
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8024+120
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp, #24]
beq .L3217
mov r3, #0
str r3, [sp, #24]
b .L337
.L325:
ldr r3, [sp, #48]
cmp r3, #0
beq .L329
.L1858:
ldr r3, [sp, #40]
cmp r3, #0
beq .L329
b .L1857
.L7701:
mov r2, #0
b .L95
.L7705:
ldr r3, .L8024+124
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L369
b .L2950
.L343:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmple
subs r2, r0, #0
beq .L95
ldr r2, .L8024+128
ldr r3, .L8024+132
ldrb r1, [r2] @ zero_extendqisi2
ldr r2, .L8024+136
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r1
orrs r2, r3, r2
beq .L95
b .L346
.L7707:
mov r3, #0
str r3, [sp, #32]
b .L2944
.L7738:
ldr r3, .L8024+152
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L430
.L2929:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L430
ldr r3, .L8024+180
ldr r2, .L8024+176
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #40]
orrs r3, r2, r3
movne r2, #0
str r3, [sp, #40]
bne .L95
.L430:
mov r1, #0
ldr r0, [sp, #56] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #72] @ float
ldr r0, [sp] @ float
str r3, [sp, #76]
bl __aeabi_fcmpeq
subs r2, r0, #0
movne r2, #1
ldr r3, [sp, #76]
str r2, [sp, #56]
ands r3, r3, r2
beq .L433
str r3, [sp, #76]
str r3, [sp, #56]
b .L434
.L417:
ldr r3, [sp, #40]
cmp r3, #0
beq .L418
.L2335:
ldr r3, .L8024+180
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8024+176
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L7991
.L419:
ldr r3, .L8024+156
ldr r0, [sp] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L428
.L424:
ldr r3, [sp, #48]
cmp r3, #0
bne .L2332
.L2928:
mov r1, #0
ldr r0, [sp, #56] @ float
bl __aeabi_fcmpeq
mov r3, r0
subs r3, r3, #0
movne r3, #1
ldr r1, [sp, #72] @ float
ldr r0, [sp] @ float
str r3, [sp, #76]
bl __aeabi_fcmpeq
subs r3, r0, #0
movne r3, #1
str r3, [sp, #56]
b .L433
.L7737:
ldr r3, .L8024+156
ldr r0, [sp] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #40]
bne .L2333
.L1848:
ldr r3, .L8024+168
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L7992
.L2327:
ldr r0, [sp, #56] @ float
mov r1, #0
bl __aeabi_fcmpeq
mov r3, #0
str r3, [sp, #56]
subs r3, r0, r3
movne r3, #1
str r3, [sp, #76]
b .L433
.L7736:
ldr r3, .L8024+168
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r2, r2, r3
beq .L7993
cmp r3, #0
str r3, [sp, #40]
beq .L420
ldr r3, [sp, #48]
.L7636:
str r3, [sp, #40]
.L2931:
ldr r3, .L8024+152
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, [sp, #64]
orrs r2, r3, r2
str r2, [sp, #72]
bne .L422
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L422
ldr r2, .L8024+176
ldr r3, .L8024+180
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #40]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #72]
str r3, [sp, #40]
bne .L95
ldr r3, .L8024+156
ldr r0, [sp] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L429
b .L2928
.L7992:
ldr r3, .L8024+152
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2928
b .L2929
.L422:
ldr r3, .L8024+156
ldr r0, [sp] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L2327
.L1846:
ldr r3, [sp, #40]
cmp r3, #0
beq .L2333
.L426:
ldr r3, .L8024+176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L428
ldr r3, .L8024+180
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L429
b .L428
.L420:
ldr r3, .L8024+156
ldr r0, [sp] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L424
b .L1846
.L7993:
ldr r3, .L8024+152
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
beq .L3210
.L418:
ldr r3, .L8024+156
ldr r1, [sp] @ float
ldr r3, [r3] @ float
mov r0, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
moveq r3, #0
streq r3, [sp, #40]
beq .L2928
b .L2333
.L7682:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #48]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L197
ldr r3, .L8024+140
ldr r2, [sp, #24]
ldrb r1, [r3] @ zero_extendqisi2
ldr r3, .L8024+144
ldrb r3, [r3] @ zero_extendqisi2
orr r3, r1, r3
orrs r3, r2, r3
ldrne r2, [sp, #48]
str r3, [sp, #12]
bne .L95
ldr r3, [sp, #32]
cmp r3, #0
bne .L3006
b .L3005
.L411:
ldr r3, .L8024+148
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
str r3, [sp, #40]
bne .L415
ldr r3, .L8024+180
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L414
ldr r3, .L8024+176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L414
ldr r3, .L8024+156
ldr r0, [sp] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L414
ldr r3, .L8024+168
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L2333
ldr r3, [sp, #48]
cmp r3, #0
bne .L2333
b .L7636
.L7994:
ldr r3, .L8024+168
ldr r2, [sp, #64]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
bne .L2336
ldr r3, .L8024+152
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
bne .L2335
.L3210:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
bl __aeabi_fcmpeq
cmp r0, #0
beq .L417
ldr r3, .L8024+180
ldr r2, .L8024+176
ldrb r3, [r3] @ zero_extendqisi2
ldrb r2, [r2] @ zero_extendqisi2
orr r3, r3, r2
ldr r2, [sp, #40]
orrs r3, r2, r3
movne r2, #0
bne .L95
b .L418
.L415:
ldr r3, [sp, #48]
cmp r3, #0
beq .L7994
.L2336:
ldr r3, .L8024+180
ldrb r2, [r3] @ zero_extendqisi2
ldr r3, .L8024+176
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
beq .L419
ldr r3, .L8024+168
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L420
ldr r3, [sp, #48]
cmp r3, #0
beq .L2931
ldr r3, .L8024+156
ldr r0, [sp] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L1846
b .L1848
.L7991:
ldr r3, .L8024+156
ldr r0, [sp] @ float
ldr r3, [r3] @ float
mov r1, r3
str r3, [sp, #72] @ float
bl __aeabi_fcmpeq
cmp r0, #0
bne .L426
b .L2928
.L7741:
ldr r3, .L8024+176
ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0
beq .L436
ldr r3, .L8024+180
ldr r2, [sp, #40]
ldrb r3, [r3] @ zero_extendqisi2
orrs r3, r2, r3
str r3, [sp]
bne .L436
ldr r3, .L8024+160
ldr r0, [sp, #80] @ float
ldr r1, [r3] @ float
bl __aeabi_fcmple
cmp r0, #0
bne .L438
.L439:
ldr r3, [sp, #48]
cmp r3, #0
streq r3, [sp, #40]
beq .L3208
b .L2320
.L7740:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L434
ldr r2, .L8024+176
ldr r3, .L8024+180
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #40]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp]
bne .L95
ldr r3, .L8024+164
ldr r3, [r3] @ float
str r3, [sp, #84] @ float
b .L439
.L7739:
ldr r2, .L8024+168
str r3, [sp, #76]
ldrb r2, [r2] @ zero_extendqisi2
str r3, [sp, #56]
cmp r2, #0
beq .L434
b .L433
.L7742:
ldr r3, .L8024+172
mov r1, #0
ldr r0, [r3] @ float
str r2, [sp, #72]
bl __aeabi_fcmpeq
cmp r0, #0
beq .L441
ldr r2, .L8024+176
ldr r3, .L8024+180
ldrb r1, [r2] @ zero_extendqisi2
ldrb r3, [r3] @ zero_extendqisi2
ldr r2, [sp, #40]
orr r3, r3, r1
orrs r3, r2, r3
ldrne r2, [sp, #72]
str r3, [sp]
bne .L95
ldr r3, [sp, #56]
cmp r3, #0
bne .L2922
b .L2921
.L445:
ldr r3, [sp, #56]
cmp r3, #0
bne .L450
ldr r3, [sp, #64]
cmp r3, #0
beq .L451
b .L2920
.L444:
ldr r3, [sp, #56]
cmp r3, #0
bne .L2318
b .L449
.size main, .-main
.comm _x_s14_evt1,1,1
.comm s14_evt1,1,1
.comm _x_s14_evt0,1,1
.comm s14_evt0,1,1
.comm _x_s14_backoff,4,4
.comm s14_backoff,4,4
.comm _x_s11_l1,1,1
.comm s11_l1,1,1
.comm _x_s13_l0,1,1
.comm s13_l0,1,1
.comm _x_s16_lambda,4,4
.comm s16_lambda,4,4
.comm _x_s13_evt2,1,1
.comm s13_evt2,1,1
.comm _x_s13_evt1,1,1
.comm s13_evt1,1,1
.comm _x_s13_evt0,1,1
.comm s13_evt0,1,1
.comm _x_s13_backoff,4,4
.comm s13_backoff,4,4
.comm _x_s10_l1,1,1
.comm s10_l1,1,1
.comm _x_s12_evt2,1,1
.comm s12_evt2,1,1
.comm _x_s12_evt1,1,1
.comm s12_evt1,1,1
.comm _x_s12_evt0,1,1
.comm s12_evt0,1,1
.comm _x_s12_backoff,4,4
.comm s12_backoff,4,4
.comm _x_s9_l1,1,1
.comm s9_l1,1,1
.comm _x_s11_l0,1,1
.comm s11_l0,1,1
.comm _x_s14_lambda,4,4
.comm s14_lambda,4,4
.comm _x_s11_evt2,1,1
.comm s11_evt2,1,1
.comm _x_s11_evt1,1,1
.comm s11_evt1,1,1
.comm _x_s11_evt0,1,1
.comm s11_evt0,1,1
.comm _x_s11_lambda,4,4
.comm s11_lambda,4,4
.comm _x_s8_l0,1,1
.comm s8_l0,1,1
.comm _x_s11_backoff,4,4
.comm s11_backoff,4,4
.comm _x_s8_l1,1,1
.comm s8_l1,1,1
.comm _x_s11_x,4,4
.comm s11_x,4,4
.comm _x_s10_l0,1,1
.comm s10_l0,1,1
.comm _x_s13_lambda,4,4
.comm s13_lambda,4,4
.comm _x_s10_evt2,1,1
.comm s10_evt2,1,1
.comm _x_s10_evt1,1,1
.comm s10_evt1,1,1
.comm _x_s10_evt0,1,1
.comm s10_evt0,1,1
.comm _x_bus_x,4,4
.comm bus_x,4,4
.comm _x_s10_lambda,4,4
.comm s10_lambda,4,4
.comm _x_s7_l0,1,1
.comm s7_l0,1,1
.comm _x_s10_backoff,4,4
.comm s10_backoff,4,4
.comm _x_s7_l1,1,1
.comm s7_l1,1,1
.comm _x_s10_x,4,4
.comm s10_x,4,4
.comm _x_s9_l0,1,1
.comm s9_l0,1,1
.comm _x_s12_lambda,4,4
.comm s12_lambda,4,4
.comm _x_s9_evt2,1,1
.comm s9_evt2,1,1
.comm _x_s9_evt1,1,1
.comm s9_evt1,1,1
.comm _x_s9_lambda,4,4
.comm s9_lambda,4,4
.comm _x_s6_l0,1,1
.comm s6_l0,1,1
.comm _x_s9_backoff,4,4
.comm s9_backoff,4,4
.comm _x_s6_l1,1,1
.comm s6_l1,1,1
.comm _x_s9_x,4,4
.comm s9_x,4,4
.comm _x_s8_evt2,1,1
.comm s8_evt2,1,1
.comm _x_s8_evt1,1,1
.comm s8_evt1,1,1
.comm _x_s8_evt0,1,1
.comm s8_evt0,1,1
.comm _x_s8_lambda,4,4
.comm s8_lambda,4,4
.comm _x_s5_l0,1,1
.comm s5_l0,1,1
.comm _x_s8_backoff,4,4
.comm s8_backoff,4,4
.comm _x_s5_l1,1,1
.comm s5_l1,1,1
.comm _x_s8_x,4,4
.comm s8_x,4,4
.comm _x_s7_evt2,1,1
.comm s7_evt2,1,1
.comm _x_s7_evt1,1,1
.comm s7_evt1,1,1
.comm _x_s7_evt0,1,1
.comm s7_evt0,1,1
.comm _x_s7_lambda,4,4
.comm s7_lambda,4,4
.comm _x_s4_l0,1,1
.comm s4_l0,1,1
.comm _x_s7_x,4,4
.comm s7_x,4,4
.comm _x_s6_evt1,1,1
.comm s6_evt1,1,1
.comm _x_s6_evt0,1,1
.comm s6_evt0,1,1
.comm _x_s6_lambda,4,4
.comm s6_lambda,4,4
.comm _x_s3_l0,1,1
.comm s3_l0,1,1
.comm _x_s2_x,4,4
.comm s2_x,4,4
.comm _x_s9_evt0,1,1
.comm s9_evt0,1,1
.comm _x_bus_l1,1,1
.comm bus_l1,1,1
.comm _x_s19_l1,1,1
.comm s19_l1,1,1
.comm _x_s4_evt2,1,1
.comm s4_evt2,1,1
.comm _x_s1_evt2,1,1
.comm s1_evt2,1,1
.comm _x_s13_x,4,4
.comm s13_x,4,4
.comm _x_s1_evt1,1,1
.comm s1_evt1,1,1
.comm _x_s5_backoff,4,4
.comm s5_backoff,4,4
.comm _x_s2_l1,1,1
.comm s2_l1,1,1
.comm _x_s1_evt0,1,1
.comm s1_evt0,1,1
.comm _x_s5_lambda,4,4
.comm s5_lambda,4,4
.comm _x_s2_l0,1,1
.comm s2_l0,1,1
.comm _x_s1_lambda,4,4
.comm s1_lambda,4,4
.comm _x_s1_backoff,4,4
.comm s1_backoff,4,4
.comm _x_s6_x,4,4
.comm s6_x,4,4
.comm _x_s1_x,4,4
.comm s1_x,4,4
.comm _x_s2_backoff,4,4
.comm s2_backoff,4,4
.comm _x_s0_l1,1,1
.comm s0_l1,1,1
.comm _x_s3_backoff,4,4
.comm s3_backoff,4,4
.comm _x_s3_evt2,1,1
.comm s3_evt2,1,1
.comm _x_s2_lambda,4,4
.comm s2_lambda,4,4
.comm _x_s0_l0,1,1
.comm s0_l0,1,1
.comm _x_s3_lambda,4,4
.comm s3_lambda,4,4
.comm _x_s3_evt1,1,1
.comm s3_evt1,1,1
.comm _x_s7_backoff,4,4
.comm s7_backoff,4,4
.comm _x_s4_l1,1,1
.comm s4_l1,1,1
.comm _x_delta,4,4
.comm delta,4,4
.comm _x_s0_evt2,1,1
.comm s0_evt2,1,1
.comm _x_s5_evt0,1,1
.comm s5_evt0,1,1
.comm _x_bus_j,4,4
.comm bus_j,4,4
.comm _x_s16_l1,1,1
.comm s16_l1,1,1
.comm _x_s19_backoff,4,4
.comm s19_backoff,4,4
.comm _x_s12_l0,1,1
.comm s12_l0,1,1
.comm _x_s15_lambda,4,4
.comm s15_lambda,4,4
.comm _x_s12_x,4,4
.comm s12_x,4,4
.comm _x_s0_evt1,1,1
.comm s0_evt1,1,1
.comm _x_s4_backoff,4,4
.comm s4_backoff,4,4
.comm _x_s1_l1,1,1
.comm s1_l1,1,1
.comm _x_s6_evt2,1,1
.comm s6_evt2,1,1
.comm _x_bus_cd_id,4,4
.comm bus_cd_id,4,4
.comm _x_s16_l0,1,1
.comm s16_l0,1,1
.comm _x_s19_lambda,4,4
.comm s19_lambda,4,4
.comm _x_s0_evt0,1,1
.comm s0_evt0,1,1
.comm _x_s4_lambda,4,4
.comm s4_lambda,4,4
.comm _x_s1_l0,1,1
.comm s1_l0,1,1
.comm _x_bus_evt1,1,1
.comm bus_evt1,1,1
.comm _x_s19_evt1,1,1
.comm s19_evt1,1,1
.comm _x_bus_evt0,1,1
.comm bus_evt0,1,1
.comm _x_s19_evt0,1,1
.comm s19_evt0,1,1
.comm _x_s4_evt1,1,1
.comm s4_evt1,1,1
.comm _x_s2_evt0,1,1
.comm s2_evt0,1,1
.comm _x_s14_evt2,1,1
.comm s14_evt2,1,1
.comm _x_s0_x,4,4
.comm s0_x,4,4
.comm _x_s0_backoff,4,4
.comm s0_backoff,4,4
.comm _x_s5_x,4,4
.comm s5_x,4,4
.comm _x_bus_l0,1,1
.comm bus_l0,1,1
.comm _x_s19_l0,1,1
.comm s19_l0,1,1
.comm _x__diverge_delta,4,4
.comm _diverge_delta,4,4
.comm _x_s0_lambda,4,4
.comm s0_lambda,4,4
.comm _x_s14_x,4,4
.comm s14_x,4,4
.comm _x_s2_evt1,1,1
.comm s2_evt1,1,1
.comm _x_s6_backoff,4,4
.comm s6_backoff,4,4
.comm _x_s3_l1,1,1
.comm s3_l1,1,1
.comm _x_s2_evt2,1,1
.comm s2_evt2,1,1
.comm _x_s5_evt1,1,1
.comm s5_evt1,1,1
.comm _x_s5_evt2,1,1
.comm s5_evt2,1,1
.comm _x_s3_x,4,4
.comm s3_x,4,4
.comm _x_s12_l1,1,1
.comm s12_l1,1,1
.comm _x_s15_backoff,4,4
.comm s15_backoff,4,4
.comm _x_s3_evt0,1,1
.comm s3_evt0,1,1
.comm _x_bus_evt2,1,1
.comm bus_evt2,1,1
.comm _x_s19_evt2,1,1
.comm s19_evt2,1,1
.comm _x_s4_x,4,4
.comm s4_x,4,4
.comm _x_s13_l1,1,1
.comm s13_l1,1,1
.comm _x_s16_backoff,4,4
.comm s16_backoff,4,4
.comm _x_s4_evt0,1,1
.comm s4_evt0,1,1
.comm _x_s14_l0,1,1
.comm s14_l0,1,1
.comm _x_s17_lambda,4,4
.comm s17_lambda,4,4
.comm _x_s14_l1,1,1
.comm s14_l1,1,1
.comm _x_s17_backoff,4,4
.comm s17_backoff,4,4
.comm _x_s15_x,4,4
.comm s15_x,4,4
.comm _x_s15_evt0,1,1
.comm s15_evt0,1,1
.comm _x_s15_evt1,1,1
.comm s15_evt1,1,1
.comm _x_s15_evt2,1,1
.comm s15_evt2,1,1
.comm _x_s15_l0,1,1
.comm s15_l0,1,1
.comm _x_s18_lambda,4,4
.comm s18_lambda,4,4
.comm _x_s15_l1,1,1
.comm s15_l1,1,1
.comm _x_s18_backoff,4,4
.comm s18_backoff,4,4
.comm _x_s16_x,4,4
.comm s16_x,4,4
.comm _x_s16_evt0,1,1
.comm s16_evt0,1,1
.comm _x_s16_evt1,1,1
.comm s16_evt1,1,1
.comm _x_s16_evt2,1,1
.comm s16_evt2,1,1
.comm _x_s17_x,4,4
.comm s17_x,4,4
.comm _x_s17_evt0,1,1
.comm s17_evt0,1,1
.comm _x_s17_evt1,1,1
.comm s17_evt1,1,1
.comm _x_s17_evt2,1,1
.comm s17_evt2,1,1
.comm _x_s17_l0,1,1
.comm s17_l0,1,1
.comm _x_s17_l1,1,1
.comm s17_l1,1,1
.comm _x_s18_x,4,4
.comm s18_x,4,4
.comm _x_s18_evt0,1,1
.comm s18_evt0,1,1
.comm _x_s18_evt1,1,1
.comm s18_evt1,1,1
.comm _x_s18_evt2,1,1
.comm s18_evt2,1,1
.comm _x_s18_l0,1,1
.comm s18_l0,1,1
.comm _x_s18_l1,1,1
.comm s18_l1,1,1
.comm _x_s19_x,4,4
.comm s19_x,4,4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "9995.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%f"
.LC2:
.string "%d"
.text
.p2align 4
.globl scilab_rt_champ_d2i2i2d2i0d2_
.type scilab_rt_champ_d2i2i2d2i0d2_, @function
scilab_rt_champ_d2i2i2d2i0d2_:
.LFB23:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov ebp, ecx
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov ebx, r8d
sub rsp, 104
.cfi_def_cfa_offset 160
mov rax, QWORD PTR 176[rsp]
mov r14d, DWORD PTR 168[rsp]
mov QWORD PTR 64[rsp], r9
mov r13d, DWORD PTR 192[rsp]
mov r12d, DWORD PTR 224[rsp]
mov QWORD PTR 72[rsp], rax
mov rax, QWORD PTR 200[rsp]
mov r8d, DWORD PTR 160[rsp]
mov ecx, DWORD PTR 184[rsp]
mov QWORD PTR 80[rsp], rax
mov eax, DWORD PTR 208[rsp]
mov r15d, DWORD PTR 216[rsp]
mov DWORD PTR 20[rsp], eax
mov rax, QWORD PTR 232[rsp]
mov QWORD PTR 88[rsp], rax
movsx rax, ebx
mov QWORD PTR 32[rsp], rax
movsx rax, r14d
mov QWORD PTR 40[rsp], rax
movsx rax, r13d
mov QWORD PTR 48[rsp], rax
movsx rax, r12d
mov QWORD PTR 56[rsp], rax
test edi, edi
jle .L27
lea r10d, -1[rsi]
pxor xmm1, xmm1
movsx r11, esi
xor r9d, r9d
lea rdx, 8[rdx+r10*8]
not r10
sal r11, 3
movapd xmm0, xmm1
movsd QWORD PTR 8[rsp], xmm1
sal r10, 3
.p2align 4,,10
.p2align 3
.L3:
lea rax, [r10+rdx]
test esi, esi
jle .L6
.p2align 4,,10
.p2align 3
.L4:
addsd xmm0, QWORD PTR [rax]
add rax, 8
cmp rax, rdx
jne .L4
.L6:
add r9d, 1
add rdx, r11
cmp edi, r9d
jne .L3
.L2:
lea rsi, .LC1[rip]
mov edi, 1
mov eax, 1
mov DWORD PTR 28[rsp], ecx
mov DWORD PTR 24[rsp], r8d
call __printf_chk@PLT
test ebp, ebp
mov r8d, DWORD PTR 24[rsp]
mov ecx, DWORD PTR 28[rsp]
jle .L28
mov rax, QWORD PTR 64[rsp]
lea r10d, -1[rbx]
mov r9, QWORD PTR 32[rsp]
xor edi, edi
xor edx, edx
lea rsi, 4[rax+r10*4]
not r10
sal r9, 2
sal r10, 2
.p2align 4,,10
.p2align 3
.L8:
lea rax, [r10+rsi]
test ebx, ebx
jle .L11
.p2align 4,,10
.p2align 3
.L9:
add edx, DWORD PTR [rax]
add rax, 4
cmp rax, rsi
jne .L9
.L11:
add edi, 1
add rsi, r9
cmp ebp, edi
jne .L8
.L7:
xor eax, eax
lea rsi, .LC2[rip]
mov edi, 1
mov DWORD PTR 28[rsp], ecx
mov DWORD PTR 24[rsp], r8d
call __printf_chk@PLT
mov r8d, DWORD PTR 24[rsp]
mov ecx, DWORD PTR 28[rsp]
test r8d, r8d
jle .L29
mov rax, QWORD PTR 72[rsp]
lea r10d, -1[r14]
mov r9, QWORD PTR 40[rsp]
xor edx, edx
xor edi, edi
lea rsi, 4[rax+r10*4]
not r10
sal r9, 2
sal r10, 2
.p2align 4,,10
.p2align 3
.L13:
lea rax, [r10+rsi]
test r14d, r14d
jle .L16
.p2align 4,,10
.p2align 3
.L14:
add edx, DWORD PTR [rax]
add rax, 4
cmp rax, rsi
jne .L14
.L16:
add edi, 1
add rsi, r9
cmp r8d, edi
jne .L13
.L12:
lea rsi, .LC2[rip]
mov edi, 1
xor eax, eax
mov DWORD PTR 24[rsp], ecx
call __printf_chk@PLT
mov ecx, DWORD PTR 24[rsp]
test ecx, ecx
jle .L30
mov rax, QWORD PTR 80[rsp]
lea edi, -1[r13]
mov r8, QWORD PTR 48[rsp]
xor esi, esi
pxor xmm0, xmm0
lea rdx, 8[rax+rdi*8]
not rdi
sal r8, 3
sal rdi, 3
.p2align 4,,10
.p2align 3
.L18:
lea rax, [rdi+rdx]
test r13d, r13d
jle .L21
.p2align 4,,10
.p2align 3
.L19:
addsd xmm0, QWORD PTR [rax]
add rax, 8
cmp rax, rdx
jne .L19
.L21:
add esi, 1
add rdx, r8
cmp ecx, esi
jne .L18
.L17:
lea rsi, .LC1[rip]
mov edi, 1
mov eax, 1
call __printf_chk@PLT
mov edx, DWORD PTR 20[rsp]
xor eax, eax
mov edi, 1
lea rsi, .LC2[rip]
call __printf_chk@PLT
test r15d, r15d
jle .L31
mov rax, QWORD PTR 88[rsp]
lea esi, -1[r12]
pxor xmm0, xmm0
xor ecx, ecx
mov rdi, QWORD PTR 56[rsp]
lea rdx, 8[rax+rsi*8]
not rsi
sal rdi, 3
sal rsi, 3
.p2align 4,,10
.p2align 3
.L23:
lea rax, [rsi+rdx]
test r12d, r12d
jle .L26
.p2align 4,,10
.p2align 3
.L24:
addsd xmm0, QWORD PTR [rax]
add rax, 8
cmp rdx, rax
jne .L24
.L26:
add ecx, 1
add rdx, rdi
cmp r15d, ecx
jne .L23
.L22:
add rsp, 104
.cfi_remember_state
.cfi_def_cfa_offset 56
mov edi, 1
mov eax, 1
pop rbx
.cfi_def_cfa_offset 48
lea rsi, .LC1[rip]
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
jmp __printf_chk@PLT
.L27:
.cfi_restore_state
pxor xmm2, xmm2
movsd QWORD PTR 8[rsp], xmm2
movapd xmm0, xmm2
jmp .L2
.L28:
xor edx, edx
jmp .L7
.L29:
xor edx, edx
jmp .L12
.L30:
pxor xmm0, xmm0
jmp .L17
.L31:
pxor xmm0, xmm0
jmp .L22
.cfi_endproc
.LFE23:
.size scilab_rt_champ_d2i2i2d2i0d2_, .-scilab_rt_champ_d2i2i2d2i0d2_
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "9995.c"
.text
.global __aeabi_dadd
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%f\000"
.align 2
.LC1:
.ascii "%d\000"
.text
.align 2
.global scilab_rt_champ_d2i2i2d2i0d2_
.syntax unified
.arm
.fpu softvfp
.type scilab_rt_champ_d2i2i2d2i0d2_, %function
scilab_rt_champ_d2i2i2d2i0d2_:
@ args = 48, pretend = 0, frame = 48
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #52
str r3, [sp]
ldr r3, [sp, #92]
subs ip, r0, #0
str r3, [sp, #20]
ldr r3, [sp, #96]
ldr r10, [sp, #88]
str r3, [sp, #4]
ldr r3, [sp, #104]
ldr r9, [sp, #100]
str r3, [sp, #24]
ldr r3, [sp, #108]
ldr r8, [sp, #112]
str r3, [sp, #8]
ldr r3, [sp, #116]
ldr r7, [sp, #128]
str r3, [sp, #28]
ldr r3, [sp, #120]
str r3, [sp, #12]
ldr r3, [sp, #124]
str r3, [sp, #16]
ldr r3, [sp, #132]
str r3, [sp, #32]
ble .L22
lsl r3, r1, #3
mov r6, r1
str r10, [sp, #36]
str r9, [sp, #40]
str r8, [sp, #44]
mov fp, #0
mov r0, #0
mov r1, #0
mov r10, ip
mov r9, r3
mov r8, r2
.L3:
cmp r6, #0
movgt r5, r8
movgt r4, #0
ble .L5
.L4:
ldmia r5!, {r2-r3}
add r4, r4, #1
bl __aeabi_dadd
cmp r6, r4
bne .L4
.L5:
add fp, fp, #1
cmp r10, fp
add r8, r8, r9
bne .L3
ldr r10, [sp, #36]
ldr r9, [sp, #40]
ldr r8, [sp, #44]
.L2:
mov r2, r0
mov r3, r1
mov r0, #1
ldr r1, .L44
bl __printf_chk
ldr r5, [sp]
cmp r5, #0
ble .L24
mov ip, #0
mov r2, ip
ldr r3, [sp, #20]
lsl r4, r10, #2
sub lr, r3, #4
.L7:
cmp r10, #0
movgt r1, lr
movgt r3, #0
ble .L9
.L8:
ldr r0, [r1, #4]!
add r3, r3, #1
cmp r10, r3
add r2, r2, r0
bne .L8
.L9:
add ip, ip, #1
cmp r5, ip
add lr, lr, r4
bne .L7
.L6:
mov r0, #1
ldr r1, .L44+4
bl __printf_chk
ldr r5, [sp, #4]
mov r2, #0
cmp r5, #0
ble .L10
mov lr, r2
ldr r3, [sp, #24]
lsl r4, r9, #2
sub ip, r3, #4
.L11:
cmp r9, #0
movgt r1, ip
movgt r3, #0
ble .L13
.L12:
ldr r0, [r1, #4]!
add r3, r3, #1
cmp r9, r3
add r2, r2, r0
bne .L12
.L13:
add lr, lr, #1
cmp r5, lr
add ip, ip, r4
bne .L11
.L10:
mov r0, #1
ldr r1, .L44+4
bl __printf_chk
ldr fp, [sp, #8]
cmp fp, #0
ble .L28
mov r0, #0
mov r1, #0
mov r9, #0
ldr r6, [sp, #28]
lsl r10, r8, #3
.L15:
cmp r8, #0
movgt r5, r6
movgt r4, #0
ble .L17
.L16:
ldmia r5!, {r2-r3}
add r4, r4, #1
bl __aeabi_dadd
cmp r8, r4
bne .L16
.L17:
add r9, r9, #1
cmp fp, r9
add r6, r6, r10
bne .L15
.L14:
mov r2, r0
mov r3, r1
mov r0, #1
ldr r1, .L44
bl __printf_chk
mov r0, #1
ldr r2, [sp, #12]
ldr r1, .L44+4
bl __printf_chk
ldr r10, [sp, #16]
cmp r10, #0
ble .L30
mov r0, #0
mov r1, #0
mov r6, #0
ldr r8, [sp, #32]
lsl r9, r7, #3
.L19:
cmp r7, #0
movgt r5, r8
movgt r4, #0
ble .L21
.L20:
ldmia r5!, {r2-r3}
add r4, r4, #1
bl __aeabi_dadd
cmp r7, r4
bne .L20
.L21:
add r6, r6, #1
cmp r10, r6
add r8, r8, r9
bne .L19
.L18:
mov r2, r0
mov r3, r1
mov r0, #1
ldr r1, .L44
add sp, sp, #52
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
b __printf_chk
.L22:
mov r0, #0
mov r1, #0
b .L2
.L24:
mov r2, #0
b .L6
.L28:
mov r0, #0
mov r1, #0
b .L14
.L30:
mov r0, #0
mov r1, #0
b .L18
.L45:
.align 2
.L44:
.word .LC0
.word .LC1
.size scilab_rt_champ_d2i2i2d2i0d2_, .-scilab_rt_champ_d2i2i2d2i0d2_
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999525.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
xor eax, eax
ret
.cfi_endproc
.LFE39:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999525.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #0
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99954.c"
.intel_syntax noprefix
.text
.p2align 4
.globl ft_putchars
.type ft_putchars, @function
ft_putchars:
.LFB0:
.cfi_startproc
endbr64
test esi, esi
je .L8
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
movsx ebp, dil
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
mov ebx, esi
sub rsp, 8
.cfi_def_cfa_offset 32
.p2align 4,,10
.p2align 3
.L3:
mov edi, ebp
call ft_putchar@PLT
sub ebx, 1
jne .L3
add rsp, 8
.cfi_def_cfa_offset 24
pop rbx
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L8:
.cfi_restore 3
.cfi_restore 6
ret
.cfi_endproc
.LFE0:
.size ft_putchars, .-ft_putchars
.p2align 4
.globl calc_w
.type calc_w, @function
calc_w:
.LFB1:
.cfi_startproc
endbr64
test edi, edi
je .L17
lea edx, 9[rdi+rdi*2]
xor ecx, ecx
.p2align 4,,10
.p2align 3
.L14:
mov eax, edx
shr eax, 31
add eax, edx
sub edx, 3
sar eax
add ecx, eax
cmp edx, 9
jne .L14
lea eax, 3[rcx]
ret
.p2align 4,,10
.p2align 3
.L17:
mov eax, 3
ret
.cfi_endproc
.LFE1:
.size calc_w, .-calc_w
.p2align 4
.globl door_row
.type door_row, @function
door_row:
.LFB2:
.cfi_startproc
endbr64
sub edi, esi
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
add edi, edx
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
mov r13d, edx
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
lea r14d, -1[rdi]
mov r12d, ecx
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
mov ebp, esi
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
xor ebx, ebx
cmp edi, 1
je .L23
.p2align 4,,10
.p2align 3
.L22:
mov edi, 32
add rbx, 1
call ft_putchar@PLT
cmp rbx, r14
jne .L22
.L23:
mov edi, 47
mov ebx, ebp
call ft_putchar@PLT
sub ebx, r13d
cmp r13d, r12d
jg .L57
mov eax, r12d
shr eax, 31
add eax, r12d
sar eax
sub ebx, eax
mov ebp, ebx
je .L28
.p2align 4,,10
.p2align 3
.L27:
mov edi, 42
call ft_putchar@PLT
sub ebp, 1
jne .L27
.L28:
cmp r12d, 4
jg .L25
.L26:
test r12d, r12d
je .L30
.p2align 4,,10
.p2align 3
.L34:
mov edi, 124
call ft_putchar@PLT
sub r12d, 1
jne .L34
.L30:
test ebx, ebx
je .L33
.p2align 4,,10
.p2align 3
.L36:
mov edi, 42
call ft_putchar@PLT
sub ebx, 1
jne .L36
.L33:
mov edi, 92
call ft_putchar@PLT
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 40
mov edi, 10
pop rbp
.cfi_def_cfa_offset 32
pop r12
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
jmp ft_putchar@PLT
.p2align 4,,10
.p2align 3
.L57:
.cfi_restore_state
test ebx, ebx
je .L38
mov ebp, ebx
.p2align 4,,10
.p2align 3
.L39:
mov edi, 42
call ft_putchar@PLT
sub ebp, 1
jne .L39
mov edi, 42
call ft_putchar@PLT
.p2align 4,,10
.p2align 3
.L41:
mov edi, 42
call ft_putchar@PLT
sub ebx, 1
jne .L41
jmp .L33
.p2align 4,,10
.p2align 3
.L25:
mov eax, r12d
sar eax
add eax, 1
cmp eax, r13d
jne .L26
sub r12d, 3
.p2align 4,,10
.p2align 3
.L31:
mov edi, 124
call ft_putchar@PLT
sub r12d, 1
jnb .L31
mov edi, 36
call ft_putchar@PLT
mov edi, 124
call ft_putchar@PLT
jmp .L30
.L38:
mov edi, 42
call ft_putchar@PLT
jmp .L33
.cfi_endproc
.LFE2:
.size door_row, .-door_row
.p2align 4
.globl draw_layer_w_door
.type draw_layer_w_door, @function
draw_layer_w_door:
.LFB3:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
xor ecx, ecx
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
lea r12d, 3[rsi]
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
mov ebp, edi
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
mov ebx, edx
lea edx, [r12+r12*2]
sub rsp, 8
.cfi_def_cfa_offset 48
test esi, esi
je .L72
.p2align 4,,10
.p2align 3
.L64:
mov eax, edx
shr eax, 31
add eax, edx
sub edx, 3
sar eax
add ecx, eax
cmp edx, 9
jne .L64
lea r13d, 3[rcx]
test ebx, ebx
jne .L61
.L62:
test r12d, r12d
je .L58
.p2align 4,,10
.p2align 3
.L66:
mov edx, r12d
mov ecx, ebx
mov esi, r13d
mov edi, ebp
call door_row
sub r12d, 1
jne .L66
.L58:
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 40
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L72:
.cfi_restore_state
mov r13d, 3
test ebx, ebx
je .L66
.p2align 4,,10
.p2align 3
.L61:
mov ebx, esi
shr ebx, 31
add ebx, esi
or ebx, 1
jmp .L62
.cfi_endproc
.LFE3:
.size draw_layer_w_door, .-draw_layer_w_door
.p2align 4
.type sastantua.part.0, @function
sastantua.part.0:
.LFB6:
.cfi_startproc
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
mov r13d, edi
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 8
.cfi_def_cfa_offset 48
sub r13d, 1
je .L85
mov r12d, edi
lea eax, 6[rdi+rdi*2]
xor edx, edx
.p2align 4,,10
.p2align 3
.L79:
mov ecx, eax
sub eax, 3
sar ecx
add edx, ecx
cmp eax, 9
jne .L79
lea ebp, 3[rdx]
xor ebx, ebx
test r12d, r12d
jle .L73
.p2align 4,,10
.p2align 3
.L76:
xor edx, edx
cmp r13d, ebx
mov esi, ebx
mov edi, ebp
sete dl
add ebx, 1
call draw_layer_w_door
cmp r12d, ebx
jg .L76
.L73:
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 40
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L85:
.cfi_restore_state
add rsp, 8
.cfi_def_cfa_offset 40
mov edx, 1
xor esi, esi
mov edi, 3
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
jmp draw_layer_w_door
.cfi_endproc
.LFE6:
.size sastantua.part.0, .-sastantua.part.0
.p2align 4
.globl sastantua
.type sastantua, @function
sastantua:
.LFB4:
.cfi_startproc
endbr64
test edi, edi
jle .L86
jmp sastantua.part.0
.p2align 4,,10
.p2align 3
.L86:
ret
.cfi_endproc
.LFE4:
.size sastantua, .-sastantua
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB5:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov edi, 5
call sastantua.part.0
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE5:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99954.c"
.text
.align 2
.global ft_putchars
.syntax unified
.arm
.fpu softvfp
.type ft_putchars, %function
ft_putchars:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r1, #0
bxeq lr
push {r4, r5, r6, lr}
mov r5, r0
sub r4, r1, #1
.L3:
mov r0, r5
sub r4, r4, #1
bl ft_putchar
cmn r4, #1
bne .L3
pop {r4, r5, r6, pc}
.size ft_putchars, .-ft_putchars
.align 2
.global calc_w
.syntax unified
.arm
.fpu softvfp
.type calc_w, %function
calc_w:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
subs r3, r0, #0
addne r3, r3, #3
movne r0, #0
addne r3, r3, r3, lsl #1
beq .L18
.L15:
add r2, r3, r3, lsr #31
sub r3, r3, #3
cmp r3, #9
add r0, r0, r2, asr #1
bne .L15
add r0, r0, #3
bx lr
.L18:
mov r0, #3
bx lr
.size calc_w, .-calc_w
.align 2
.global door_row
.syntax unified
.arm
.fpu softvfp
.type door_row, %function
door_row:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
sub r4, r0, r1
add r4, r4, r2
cmp r4, #1
mov r5, r1
mov r6, r2
mov r8, r3
subne r4, r4, #2
beq .L23
.L20:
mov r0, #32
sub r4, r4, #1
bl ft_putchar
cmn r4, #1
bne .L20
.L23:
mov r0, #47
bl ft_putchar
cmp r6, r8
sub r5, r5, r6
bgt .L54
add r4, r8, r8, lsr #31
sub r5, r5, r4, asr #1
cmp r5, #0
sub r4, r5, #1
movne r7, r4
beq .L27
.L24:
mov r0, #42
sub r7, r7, #1
bl ft_putchar
cmn r7, #1
bne .L24
.L27:
cmp r8, #4
bgt .L25
.L26:
cmp r8, #0
sub r8, r8, #1
beq .L29
.L28:
mov r0, #124
sub r8, r8, #1
bl ft_putchar
cmn r8, #1
bne .L28
.L29:
cmp r5, #0
beq .L32
.L31:
mov r0, #42
sub r4, r4, #1
bl ft_putchar
cmn r4, #1
bne .L31
.L32:
mov r0, #92
bl ft_putchar
pop {r4, r5, r6, r7, r8, lr}
mov r0, #10
b ft_putchar
.L54:
cmp r5, #0
sub r4, r5, #1
beq .L35
mov r5, r4
.L36:
mov r0, #42
sub r5, r5, #1
bl ft_putchar
cmn r5, #1
bne .L36
mov r0, #42
bl ft_putchar
.L38:
mov r0, #42
sub r4, r4, #1
bl ft_putchar
cmn r4, #1
bne .L38
b .L32
.L25:
asr r3, r8, #1
add r3, r3, #1
cmp r3, r6
bne .L26
sub r8, r8, #3
.L30:
mov r0, #124
sub r8, r8, #1
bl ft_putchar
cmn r8, #1
bne .L30
mov r0, #36
bl ft_putchar
mov r0, #124
bl ft_putchar
b .L29
.L35:
mov r0, #42
bl ft_putchar
b .L32
.size door_row, .-door_row
.align 2
.global draw_layer_w_door
.syntax unified
.arm
.fpu softvfp
.type draw_layer_w_door, %function
draw_layer_w_door:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
cmp r1, #0
add r4, r1, #3
mov r7, r0
mov r6, r2
movne lr, #0
addne ip, r4, r4, lsl #1
beq .L71
.L61:
add r5, ip, ip, lsr #31
sub ip, ip, #3
cmp ip, #9
add lr, lr, r5, asr #1
bne .L61
cmp r6, #0
add r5, lr, #3
bne .L58
cmp r4, #0
popeq {r4, r5, r6, r7, r8, pc}
.L63:
mov r2, r4
mov r3, r6
mov r1, r5
mov r0, r7
bl door_row
subs r4, r4, #1
bne .L63
pop {r4, r5, r6, r7, r8, pc}
.L71:
cmp r2, #0
mov r5, #3
beq .L63
.L58:
add r1, r1, r1, lsr #31
cmp r4, #0
orr r6, r1, #1
bne .L63
pop {r4, r5, r6, r7, r8, pc}
.size draw_layer_w_door, .-draw_layer_w_door
.align 2
.syntax unified
.arm
.fpu softvfp
.type sastantua.part.0, %function
sastantua.part.0:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
subs r7, r0, #1
movne r6, r0
addne r3, r6, #2
movne r2, #0
addne r3, r3, r3, lsl #1
beq .L86
.L78:
add r2, r2, r3, asr #1
sub r3, r3, #3
cmp r3, #9
bne .L78
cmp r6, #0
add r5, r2, #3
pople {r4, r5, r6, r7, r8, pc}
mov r4, #0
.L75:
sub r2, r7, r4
clz r2, r2
mov r1, r4
mov r0, r5
lsr r2, r2, #5
add r4, r4, #1
bl draw_layer_w_door
cmp r6, r4
bgt .L75
pop {r4, r5, r6, r7, r8, pc}
.L86:
mov r1, r7
pop {r4, r5, r6, r7, r8, lr}
mov r2, #1
mov r0, #3
b draw_layer_w_door
.size sastantua.part.0, .-sastantua.part.0
.align 2
.global sastantua
.syntax unified
.arm
.fpu softvfp
.type sastantua, %function
sastantua:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r0, #0
bxle lr
b sastantua.part.0
.size sastantua, .-sastantua
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r0, #5
push {r4, lr}
bl sastantua.part.0
mov r0, #0
pop {r4, pc}
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999546.c"
.intel_syntax noprefix
.text
.p2align 4
.globl isprime
.type isprime, @function
isprime:
.LFB23:
.cfi_startproc
endbr64
ret
.cfi_endproc
.LFE23:
.size isprime, .-isprime
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Enter a number:"
.LC1:
.string "%d"
.LC2:
.string "%d is prime"
.LC3:
.string "%d is not prime"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB24:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
lea rsi, .LC0[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
xor edx, edx
lea rdi, .LC1[rip]
xor eax, eax
mov esi, edx
call __isoc99_scanf@PLT
xor edx, edx
lea rsi, .LC3[rip]
xor eax, eax
mov edi, 1
call __printf_chk@PLT
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE24:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999546.c"
.text
.align 2
.global isprime
.syntax unified
.arm
.fpu softvfp
.type isprime, %function
isprime:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
bx lr
.size isprime, .-isprime
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Enter a number:\000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "%d is prime\000"
.align 2
.LC3:
.ascii "%d is not prime\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r1, .L7
mov r0, #1
bl __printf_chk
mov r1, #0
ldr r0, .L7+4
bl __isoc99_scanf
mov r2, #0
ldr r1, .L7+8
mov r0, #1
bl __printf_chk
mov r0, #0
pop {r4, pc}
.L8:
.align 2
.L7:
.word .LC0
.word .LC1
.word .LC3
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99955.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Hello, world!"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
lea rdi, .LC0[rip]
call puts@PLT
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99955.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Hello, world!\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r0, .L4
bl puts
mov r0, #0
pop {r4, pc}
.L5:
.align 2
.L4:
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99956.c"
.intel_syntax noprefix
.text
.p2align 4
.globl k
.type k, @function
k:
.LFB0:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
xor eax, eax
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
mov rbx, rdi
sub rsp, 8
.cfi_def_cfa_offset 32
call m@PLT
test eax, eax
je .L2
.L4:
mov DWORD PTR [rbx], 0
.L3:
mov eax, DWORD PTR j[rip]
test eax, eax
je .L5
mov edi, 8
xor eax, eax
call o@PLT
add eax, 4
mov DWORD PTR 8[rbx], eax
.L6:
mov ebp, DWORD PTR 4[rbx]
test ebp, ebp
je .L7
cmp ebp, 9
je .L8
mov eax, DWORD PTR 20[rbx]
test eax, eax
jne .L31
.L22:
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 24
pop rbx
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L7:
.cfi_restore_state
xor eax, eax
call m@PLT
test eax, eax
jne .L10
mov edi, DWORD PTR 16[rbx]
.L11:
xor eax, eax
call o@PLT
xor eax, eax
call m@PLT
test eax, eax
jne .L12
mov edi, DWORD PTR 16[rbx]
.L13:
xor eax, eax
call p@PLT
xor eax, eax
call m@PLT
test eax, eax
jne .L14
mov edi, DWORD PTR 16[rbx]
.L15:
xor eax, eax
call p@PLT
xor eax, eax
call m@PLT
test eax, eax
jne .L16
mov edi, DWORD PTR 16[rbx]
.L17:
xor eax, eax
call p@PLT
xor eax, eax
call m@PLT
test eax, eax
jne .L18
mov edi, DWORD PTR 16[rbx]
.L19:
xor eax, eax
call p@PLT
xor eax, eax
call m@PLT
test eax, eax
jne .L20
mov ebp, DWORD PTR 16[rbx]
.L21:
xor eax, eax
mov edi, ebp
call p@PLT
xor eax, eax
call m@PLT
test eax, eax
je .L8
xor eax, eax
call o@PLT
mov DWORD PTR 12[rbx], eax
.p2align 4,,10
.p2align 3
.L8:
mov eax, DWORD PTR [rbx]
mov DWORD PTR 20[rbx], eax
test eax, eax
je .L22
.L31:
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 24
xor eax, eax
pop rbx
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
jmp q@PLT
.p2align 4,,10
.p2align 3
.L5:
.cfi_restore_state
mov edi, 6
xor eax, eax
call o@PLT
add eax, 4
mov DWORD PTR 8[rbx], eax
jmp .L6
.p2align 4,,10
.p2align 3
.L2:
xor eax, eax
call n@PLT
test eax, eax
jne .L4
call o@PLT
mov DWORD PTR [rbx], eax
jmp .L3
.p2align 4,,10
.p2align 3
.L10:
mov DWORD PTR 16[rbx], 0
xor edi, edi
jmp .L11
.p2align 4,,10
.p2align 3
.L20:
mov DWORD PTR 16[rbx], 0
jmp .L21
.p2align 4,,10
.p2align 3
.L18:
mov DWORD PTR 16[rbx], 0
xor edi, edi
jmp .L19
.p2align 4,,10
.p2align 3
.L16:
mov DWORD PTR 16[rbx], 0
xor edi, edi
jmp .L17
.p2align 4,,10
.p2align 3
.L14:
mov DWORD PTR 16[rbx], 0
xor edi, edi
jmp .L15
.p2align 4,,10
.p2align 3
.L12:
mov DWORD PTR 16[rbx], 0
xor edi, edi
jmp .L13
.cfi_endproc
.LFE0:
.size k, .-k
.globl j
.bss
.align 4
.type j, @object
.size j, 4
j:
.zero 4
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99956.c"
.text
.align 2
.global k
.syntax unified
.arm
.fpu softvfp
.type k, %function
k:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r4, r0
bl m
cmp r0, #0
beq .L2
.L4:
mov r3, #0
str r3, [r4]
.L3:
ldr r3, .L32
ldr r3, [r3]
cmp r3, #0
movne r0, #8
moveq r0, #6
bl o
ldr r5, [r4, #4]
add r0, r0, #4
cmp r5, #0
str r0, [r4, #8]
beq .L7
cmp r5, #9
beq .L8
ldr r3, [r4, #20]
cmp r3, #0
popeq {r4, r5, r6, pc}
.L31:
pop {r4, r5, r6, lr}
b q
.L7:
bl m
cmp r0, #0
movne r0, r5
ldreq r0, [r4, #16]
strne r5, [r4, #16]
bl o
bl m
cmp r0, #0
movne r3, #0
ldreq r0, [r4, #16]
movne r0, r3
strne r3, [r4, #16]
bl p
bl m
cmp r0, #0
movne r3, #0
ldreq r0, [r4, #16]
movne r0, r3
strne r3, [r4, #16]
bl p
bl m
cmp r0, #0
movne r3, #0
ldreq r0, [r4, #16]
movne r0, r3
strne r3, [r4, #16]
bl p
bl m
cmp r0, #0
movne r3, #0
ldreq r0, [r4, #16]
movne r0, r3
strne r3, [r4, #16]
bl p
bl m
cmp r0, #0
movne r3, #0
ldreq r5, [r4, #16]
strne r3, [r4, #16]
mov r0, r5
bl p
bl m
cmp r0, #0
beq .L8
bl o
str r0, [r4, #12]
.L8:
ldr r3, [r4]
cmp r3, #0
str r3, [r4, #20]
popeq {r4, r5, r6, pc}
b .L31
.L2:
bl n
cmp r0, #0
bne .L4
bl o
str r0, [r4]
b .L3
.L33:
.align 2
.L32:
.word j
.size k, .-k
.comm j,4,4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99957.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "clear"
.LC1:
.string "Dame el primer numero"
.LC2:
.string "%f"
.LC3:
.string "Dame el segundo numero"
.LC4:
.string "Suma"
.LC5:
.string "\t%f + %f = %f\n"
.LC6:
.string "Resta"
.LC7:
.string "\t%f - %f = %f\n"
.LC8:
.string "Multiplicaci\303\203\302\263n"
.LC9:
.string "\t%f * %f = %f\n"
.LC10:
.string "Divisi\303\203\302\263n"
.LC11:
.string "\t%f / %f = %f\n"
.LC12:
.string "M\303\203\302\263dulo"
.LC13:
.string "\tEl m\303\203\302\263dulo de %d/%d es %f\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC14:
.string "Ra\303\203\302\255z cuadrada del primer numero"
.align 8
.LC16:
.string "\tLa Ra\303\203\302\255z cuadrada de %f es %f\n"
.align 8
.LC17:
.string "Ra\303\203\302\255z cuadrada del segundo numero"
.section .rodata.str1.1
.LC18:
.string "Potencia"
.section .rodata.str1.8
.align 8
.LC19:
.string "\tEl n\303\203\302\272mero %f elevado a la potencia %f es %f\n"
.align 8
.LC20:
.string "Resultado del reto viral de Agosto"
.align 8
.LC21:
.string "\tEl resultado de %f/(%f(%f+%f))es %f\n"
.align 8
.LC22:
.string "\tEl resultado de %f/%f(%f+%f)es %f\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
lea rdi, .LC0[rip]
call system@PLT
lea rdi, .LC1[rip]
call puts@PLT
lea rsi, a[rip]
lea rdi, .LC2[rip]
xor eax, eax
call __isoc99_scanf@PLT
cvttss2si eax, DWORD PTR a[rip]
lea rdi, .LC3[rip]
mov DWORD PTR a1[rip], eax
call puts@PLT
lea rsi, b[rip]
lea rdi, .LC2[rip]
xor eax, eax
call __isoc99_scanf@PLT
cvttss2si eax, DWORD PTR b[rip]
lea rdi, .LC4[rip]
mov DWORD PTR b1[rip], eax
call puts@PLT
mov edi, 1
mov eax, 3
movss xmm0, DWORD PTR a[rip]
movss xmm1, DWORD PTR b[rip]
lea rsi, .LC5[rip]
movaps xmm2, xmm0
cvtss2sd xmm0, xmm0
addss xmm2, xmm1
cvtss2sd xmm1, xmm1
movss DWORD PTR c[rip], xmm2
cvtss2sd xmm2, xmm2
call __printf_chk@PLT
lea rdi, .LC6[rip]
call puts@PLT
mov edi, 1
mov eax, 3
movss xmm0, DWORD PTR a[rip]
movss xmm1, DWORD PTR b[rip]
lea rsi, .LC7[rip]
movaps xmm2, xmm0
cvtss2sd xmm0, xmm0
subss xmm2, xmm1
cvtss2sd xmm1, xmm1
movss DWORD PTR c[rip], xmm2
cvtss2sd xmm2, xmm2
call __printf_chk@PLT
lea rdi, .LC8[rip]
call puts@PLT
mov edi, 1
mov eax, 3
movss xmm0, DWORD PTR a[rip]
movss xmm1, DWORD PTR b[rip]
lea rsi, .LC9[rip]
movaps xmm2, xmm0
cvtss2sd xmm0, xmm0
mulss xmm2, xmm1
cvtss2sd xmm1, xmm1
movss DWORD PTR c[rip], xmm2
cvtss2sd xmm2, xmm2
call __printf_chk@PLT
lea rdi, .LC10[rip]
call puts@PLT
mov edi, 1
mov eax, 3
movss xmm0, DWORD PTR a[rip]
movss xmm1, DWORD PTR b[rip]
lea rsi, .LC11[rip]
movaps xmm2, xmm0
cvtss2sd xmm0, xmm0
divss xmm2, xmm1
cvtss2sd xmm1, xmm1
movss DWORD PTR c[rip], xmm2
cvtss2sd xmm2, xmm2
call __printf_chk@PLT
lea rdi, .LC12[rip]
call puts@PLT
mov r8d, DWORD PTR a1[rip]
pxor xmm0, xmm0
mov ecx, DWORD PTR b1[rip]
lea rsi, .LC13[rip]
mov edi, 1
mov eax, r8d
cdq
idiv ecx
mov eax, 1
cvtsi2ss xmm0, edx
mov edx, r8d
movss DWORD PTR c[rip], xmm0
cvtss2sd xmm0, xmm0
call __printf_chk@PLT
lea rdi, .LC14[rip]
call puts@PLT
movss xmm0, DWORD PTR a[rip]
pxor xmm5, xmm5
ucomiss xmm5, xmm0
ja .L10
movaps xmm1, xmm0
sqrtss xmm1, xmm1
.L4:
lea rsi, .LC16[rip]
mov edi, 1
cvtss2sd xmm0, xmm0
mov eax, 2
movss DWORD PTR c[rip], xmm1
cvtss2sd xmm1, xmm1
call __printf_chk@PLT
lea rdi, .LC17[rip]
call puts@PLT
movss xmm0, DWORD PTR b[rip]
pxor xmm6, xmm6
ucomiss xmm6, xmm0
ja .L11
movaps xmm1, xmm0
sqrtss xmm1, xmm1
.L7:
lea rsi, .LC16[rip]
mov edi, 1
cvtss2sd xmm0, xmm0
mov eax, 2
movss DWORD PTR c[rip], xmm1
cvtss2sd xmm1, xmm1
call __printf_chk@PLT
lea rdi, .LC18[rip]
call puts@PLT
pxor xmm0, xmm0
pxor xmm1, xmm1
cvtss2sd xmm1, DWORD PTR a[rip]
cvtss2sd xmm0, DWORD PTR b[rip]
call pow@PLT
pxor xmm2, xmm2
lea rsi, .LC19[rip]
cvtsd2ss xmm2, xmm0
mov edi, 1
pxor xmm0, xmm0
pxor xmm1, xmm1
mov eax, 3
cvtss2sd xmm0, DWORD PTR b[rip]
movss DWORD PTR c[rip], xmm2
cvtss2sd xmm1, DWORD PTR a[rip]
cvtss2sd xmm2, xmm2
call __printf_chk@PLT
lea rdi, .LC20[rip]
call puts@PLT
mov edi, 1
mov eax, 5
movss xmm1, DWORD PTR b[rip]
movss xmm0, DWORD PTR a[rip]
lea rsi, .LC21[rip]
movaps xmm3, xmm1
movaps xmm2, xmm1
addss xmm3, xmm1
movaps xmm4, xmm0
mulss xmm2, xmm3
divss xmm4, xmm2
movaps xmm2, xmm0
cvtss2sd xmm0, xmm0
divss xmm2, xmm1
cvtss2sd xmm1, xmm1
movss DWORD PTR c[rip], xmm4
cvtss2sd xmm4, xmm4
mulss xmm2, xmm3
movapd xmm3, xmm1
movss DWORD PTR d[rip], xmm2
movapd xmm2, xmm1
call __printf_chk@PLT
pxor xmm1, xmm1
pxor xmm0, xmm0
pxor xmm4, xmm4
cvtss2sd xmm1, DWORD PTR b[rip]
lea rsi, .LC22[rip]
movapd xmm3, xmm1
movapd xmm2, xmm1
mov edi, 1
mov eax, 5
cvtss2sd xmm0, DWORD PTR a[rip]
cvtss2sd xmm4, DWORD PTR d[rip]
call __printf_chk@PLT
xor eax, eax
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L10:
.cfi_restore_state
call sqrtf@PLT
movaps xmm1, xmm0
movss xmm0, DWORD PTR a[rip]
jmp .L4
.L11:
call sqrtf@PLT
movaps xmm1, xmm0
movss xmm0, DWORD PTR b[rip]
jmp .L7
.cfi_endproc
.LFE39:
.size main, .-main
.globl b1
.bss
.align 4
.type b1, @object
.size b1, 4
b1:
.zero 4
.globl a1
.align 4
.type a1, @object
.size a1, 4
a1:
.zero 4
.globl e
.align 4
.type e, @object
.size e, 4
e:
.zero 4
.globl d
.align 4
.type d, @object
.size d, 4
d:
.zero 4
.globl c
.align 4
.type c, @object
.size c, 4
c:
.zero 4
.globl b
.align 4
.type b, @object
.size b, 4
b:
.zero 4
.globl a
.align 4
.type a, @object
.size a, 4
a:
.zero 4
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99957.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "clear\000"
.align 2
.LC1:
.ascii "Dame el primer numero\000"
.align 2
.LC2:
.ascii "%f\000"
.global __aeabi_f2iz
.align 2
.LC3:
.ascii "Dame el segundo numero\000"
.align 2
.LC4:
.ascii "Suma\000"
.global __aeabi_fadd
.global __aeabi_f2d
.align 2
.LC5:
.ascii "\011%f + %f = %f\012\000"
.align 2
.LC6:
.ascii "Resta\000"
.global __aeabi_fsub
.align 2
.LC7:
.ascii "\011%f - %f = %f\012\000"
.align 2
.LC8:
.ascii "Multiplicaci\303\203\302\263n\000"
.global __aeabi_fmul
.align 2
.LC9:
.ascii "\011%f * %f = %f\012\000"
.align 2
.LC10:
.ascii "Divisi\303\203\302\263n\000"
.global __aeabi_fdiv
.align 2
.LC11:
.ascii "\011%f / %f = %f\012\000"
.align 2
.LC12:
.ascii "M\303\203\302\263dulo\000"
.global __aeabi_idivmod
.global __aeabi_i2f
.align 2
.LC13:
.ascii "\011El m\303\203\302\263dulo de %d/%d es %f\012\000"
.align 2
.LC14:
.ascii "Ra\303\203\302\255z cuadrada del primer numero\000"
.align 2
.LC15:
.ascii "\011La Ra\303\203\302\255z cuadrada de %f es %f\012"
.ascii "\000"
.align 2
.LC16:
.ascii "Ra\303\203\302\255z cuadrada del segundo numero\000"
.align 2
.LC17:
.ascii "Potencia\000"
.global __aeabi_d2f
.align 2
.LC18:
.ascii "\011El n\303\203\302\272mero %f elevado a la potenc"
.ascii "ia %f es %f\012\000"
.align 2
.LC19:
.ascii "Resultado del reto viral de Agosto\000"
.align 2
.LC20:
.ascii "\011El resultado de %f/(%f(%f+%f))es %f\012\000"
.align 2
.LC21:
.ascii "\011El resultado de %f/%f(%f+%f)es %f\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r0, .L4
sub sp, sp, #44
ldr r4, .L4+4
ldr r6, .L4+8
bl system
ldr r0, .L4+12
bl puts
mov r1, r4
mov r0, r6
bl __isoc99_scanf
ldr r0, [r4] @ float
bl __aeabi_f2iz
mov r3, r0
ldr r5, .L4+16
ldr r9, .L4+20
ldr r0, .L4+24
str r3, [r9]
bl puts
mov r1, r5
mov r0, r6
bl __isoc99_scanf
ldr r0, [r5] @ float
bl __aeabi_f2iz
mov r3, r0
ldr r8, .L4+28
ldr r0, .L4+32
str r3, [r8]
bl puts
ldr r3, [r5] @ float
ldr r10, [r4] @ float
mov r1, r3
mov r0, r10
str r3, [sp, #36]
bl __aeabi_fadd
mov r7, r0
ldr r6, .L4+36
mov r0, r10
str r7, [r6] @ float
bl __aeabi_f2d
mov r10, r0
mov r0, r7
mov fp, r1
bl __aeabi_f2d
mov r2, r1
mov r1, r0
ldr r3, [sp, #36]
str r1, [sp, #8]
str r2, [sp, #12]
mov r0, r3
bl __aeabi_f2d
mov r2, r10
mov r3, fp
stm sp, {r0-r1}
ldr r1, .L4+40
mov r0, #1
bl __printf_chk
ldr r0, .L4+44
bl puts
ldr r3, [r5] @ float
ldr r10, [r4] @ float
mov r1, r3
mov r0, r10
str r3, [sp, #36]
bl __aeabi_fsub
mov r7, r0
mov r0, r10
str r7, [r6] @ float
bl __aeabi_f2d
mov r10, r0
mov r0, r7
mov fp, r1
bl __aeabi_f2d
mov r2, r1
mov r1, r0
ldr r3, [sp, #36]
str r1, [sp, #8]
str r2, [sp, #12]
mov r0, r3
bl __aeabi_f2d
mov r2, r10
mov r3, fp
stm sp, {r0-r1}
ldr r1, .L4+48
mov r0, #1
bl __printf_chk
ldr r0, .L4+52
bl puts
ldr r3, [r5] @ float
ldr r10, [r4] @ float
mov r1, r3
mov r0, r10
str r3, [sp, #36]
bl __aeabi_fmul
mov r7, r0
mov r0, r10
str r7, [r6] @ float
bl __aeabi_f2d
mov r10, r0
mov r0, r7
mov fp, r1
bl __aeabi_f2d
mov r2, r1
mov r1, r0
ldr r3, [sp, #36]
str r1, [sp, #8]
str r2, [sp, #12]
mov r0, r3
bl __aeabi_f2d
mov r2, r10
mov r3, fp
stm sp, {r0-r1}
ldr r1, .L4+56
mov r0, #1
bl __printf_chk
ldr r0, .L4+60
bl puts
ldr r3, [r5] @ float
ldr r10, [r4] @ float
mov r1, r3
mov r0, r10
str r3, [sp, #36]
bl __aeabi_fdiv
mov r7, r0
mov r0, r10
str r7, [r6] @ float
bl __aeabi_f2d
mov r10, r0
mov r0, r7
mov fp, r1
bl __aeabi_f2d
mov r2, r1
mov r1, r0
ldr r3, [sp, #36]
str r1, [sp, #8]
str r2, [sp, #12]
mov r0, r3
bl __aeabi_f2d
mov r2, r10
mov r3, fp
stm sp, {r0-r1}
ldr r1, .L4+64
mov r0, #1
bl __printf_chk
ldr r0, .L4+68
bl puts
ldr r7, [r9]
ldr r8, [r8]
mov r0, r7
mov r1, r8
bl __aeabi_idivmod
mov r0, r1
bl __aeabi_i2f
str r0, [r6] @ float
bl __aeabi_f2d
mov r3, r8
mov r2, r7
stm sp, {r0-r1}
ldr r1, .L4+72
mov r0, #1
bl __printf_chk
ldr r0, .L4+76
bl puts
ldr r0, [r4] @ float
bl sqrtf
mov r7, r0
ldr r0, [r4] @ float
str r7, [r6] @ float
bl __aeabi_f2d
mov r8, r0
mov r0, r7
mov r9, r1
bl __aeabi_f2d
ldr r10, .L4+80
mov r2, r8
mov r3, r9
stm sp, {r0-r1}
mov r1, r10
mov r0, #1
bl __printf_chk
ldr r0, .L4+84
bl puts
ldr r0, [r5] @ float
bl sqrtf
mov r7, r0
ldr r0, [r5] @ float
str r7, [r6] @ float
bl __aeabi_f2d
mov r8, r0
mov r0, r7
mov r9, r1
bl __aeabi_f2d
mov r2, r8
mov r3, r9
stm sp, {r0-r1}
mov r1, r10
mov r0, #1
bl __printf_chk
ldr r0, .L4+88
bl puts
ldr r0, [r4] @ float
bl __aeabi_f2d
mov r8, r0
mov r9, r1
ldr r0, [r5] @ float
bl __aeabi_f2d
mov r2, r8
mov r3, r9
bl pow
bl __aeabi_d2f
mov r7, r0
ldr r0, [r5] @ float
str r7, [r6] @ float
bl __aeabi_f2d
mov r8, r0
mov r0, r7
mov r9, r1
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r0, [r4] @ float
str r2, [sp, #8]
str r3, [sp, #12]
bl __aeabi_f2d
mov r2, r8
mov r3, r9
stm sp, {r0-r1}
ldr r1, .L4+92
mov r0, #1
bl __printf_chk
ldr r0, .L4+96
bl puts
ldr r7, [r5] @ float
ldr fp, [r4] @ float
mov r1, r7
mov r0, r7
bl __aeabi_fadd
mov r8, r0
mov r0, r7
mov r1, r8
bl __aeabi_fmul
mov r1, r0
mov r0, fp
bl __aeabi_fdiv
mov r1, r7
mov r9, r0
str r0, [r6] @ float
mov r0, fp
bl __aeabi_fdiv
mov r1, r8
bl __aeabi_fmul
mov r3, r0
ldr r10, .L4+100
mov r0, r7
str r3, [r10] @ float
bl __aeabi_f2d
mov r6, r0
mov r0, fp
mov r7, r1
bl __aeabi_f2d
mov r2, r0
mov r0, r9
mov r8, r2
mov r9, r1
bl __aeabi_f2d
mov r3, r9
mov r2, r8
str r6, [sp, #16]
str r7, [sp, #20]
str r6, [sp, #8]
str r7, [sp, #12]
stm sp, {r6-r7}
str r0, [sp, #24]
str r1, [sp, #28]
ldr r1, .L4+104
mov r0, #1
bl __printf_chk
ldr r0, [r5] @ float
bl __aeabi_f2d
mov r2, r0
ldr r0, [r4] @ float
mov r5, r1
mov r4, r2
bl __aeabi_f2d
mov r6, r0
ldr r0, [r10] @ float
mov r7, r1
bl __aeabi_f2d
mov r2, r6
str r0, [sp, #24]
str r1, [sp, #28]
mov r3, r7
str r4, [sp, #16]
str r5, [sp, #20]
str r4, [sp, #8]
str r5, [sp, #12]
stm sp, {r4-r5}
ldr r1, .L4+108
mov r0, #1
bl __printf_chk
mov r0, #0
add sp, sp, #44
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L5:
.align 2
.L4:
.word .LC0
.word a
.word .LC2
.word .LC1
.word b
.word a1
.word .LC3
.word b1
.word .LC4
.word c
.word .LC5
.word .LC6
.word .LC7
.word .LC8
.word .LC9
.word .LC10
.word .LC11
.word .LC12
.word .LC13
.word .LC14
.word .LC15
.word .LC16
.word .LC17
.word .LC18
.word .LC19
.word d
.word .LC20
.word .LC21
.size main, .-main
.comm b1,4,4
.comm a1,4,4
.comm e,4,4
.comm d,4,4
.comm c,4,4
.comm b,4,4
.comm a,4,4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999580.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%s"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "Stud Name: %s\t AM: %s\t Semester: %d\t Grades: [%.1lf][%.1lf][%.1lf][%.1lf][%.1lf]\n"
.text
.p2align 4
.globl readInput
.type readInput, @function
readInput:
.LFB51:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 168
.cfi_def_cfa_offset 224
mov QWORD PTR [rsp], rdx
mov QWORD PTR 8[rsp], rcx
mov rax, QWORD PTR fs:40
mov QWORD PTR 152[rsp], rax
xor eax, eax
test edi, edi
je .L1
mov eax, edi
mov r14, rsi
mov r13, r8
xor ebp, ebp
mov QWORD PTR 16[rsp], rax
lea rax, 48[rsp]
lea r12, 46[rsp]
mov QWORD PTR 24[rsp], rax
.p2align 4,,10
.p2align 3
.L4:
mov rbx, QWORD PTR 24[rsp]
lea rdi, .LC0[rip]
xor eax, eax
mov rsi, rbx
call __isoc99_scanf@PLT
movzx eax, BYTE PTR 54[rsp]
mov rdi, rbx
mov rsi, r12
mov BYTE PTR 47[rsp], 0
xor ebx, ebx
mov BYTE PTR 46[rsp], al
call strtok@PLT
mov rsi, r12
xor edi, edi
mov QWORD PTR [r14+rbp*8], rax
call strtok@PLT
mov rcx, QWORD PTR [rsp]
mov rsi, r12
xor edi, edi
mov QWORD PTR [rcx+rbp*8], rax
call strtok@PLT
mov edx, 10
xor esi, esi
mov rdi, rax
call strtol@PLT
mov rdx, QWORD PTR 8[rsp]
mov rdi, QWORD PTR [r14+rbp*8]
mov WORD PTR [rdx+rbp*2], ax
call puts@PLT
.L3:
mov rsi, r12
xor edi, edi
call strtok@PLT
mov r15, QWORD PTR 0[r13+rbp*8]
xor esi, esi
mov rdi, rax
call strtod@PLT
add r15, rbx
add rbx, 8
movsd QWORD PTR [r15], xmm0
cmp rbx, 40
jne .L3
mov rax, QWORD PTR 0[r13+rbp*8]
mov rdx, QWORD PTR [rsp]
lea rsi, .LC1[rip]
mov edi, 1
mov rcx, QWORD PTR [r14+rbp*8]
movsd xmm4, QWORD PTR 32[rax]
movsd xmm3, QWORD PTR 24[rax]
movsd xmm2, QWORD PTR 16[rax]
movsd xmm1, QWORD PTR 8[rax]
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR 8[rsp]
mov rdx, QWORD PTR [rdx+rbp*8]
movsx r8d, WORD PTR [rax+rbp*2]
mov eax, 5
add rbp, 1
call __printf_chk@PLT
cmp QWORD PTR 16[rsp], rbp
jne .L4
.L1:
mov rax, QWORD PTR 152[rsp]
sub rax, QWORD PTR fs:40
jne .L11
add rsp, 168
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE51:
.size readInput, .-readInput
.section .rodata.str1.1
.LC2:
.string "w+"
.LC3:
.string "registry.txt"
.text
.p2align 4
.globl writeFile
.type writeFile, @function
writeFile:
.LFB52:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
mov r14, r8
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
mov r13, rcx
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
mov r12, rdx
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov rbp, rsi
lea rsi, .LC2[rip]
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov ebx, edi
lea rdi, .LC3[rip]
sub rsp, 24
.cfi_def_cfa_offset 80
mov rdx, QWORD PTR stdout[rip]
call freopen@PLT
mov QWORD PTR 8[rsp], rax
test ebx, ebx
je .L13
mov eax, ebx
lea r15, .LC1[rip]
xor ebx, ebx
mov QWORD PTR [rsp], rax
.p2align 4,,10
.p2align 3
.L14:
mov rax, QWORD PTR [r14+rbx*8]
mov rdx, QWORD PTR [r12+rbx*8]
mov rsi, r15
mov edi, 1
mov rcx, QWORD PTR 0[rbp+rbx*8]
movsx r8d, WORD PTR 0[r13+rbx*2]
add rbx, 1
movsd xmm4, QWORD PTR 32[rax]
movsd xmm3, QWORD PTR 24[rax]
movsd xmm2, QWORD PTR 16[rax]
movsd xmm1, QWORD PTR 8[rax]
movsd xmm0, QWORD PTR [rax]
mov eax, 5
call __printf_chk@PLT
cmp QWORD PTR [rsp], rbx
jne .L14
.L13:
mov rdi, QWORD PTR 8[rsp]
add rsp, 24
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
jmp fclose@PLT
.cfi_endproc
.LFE52:
.size writeFile, .-writeFile
.section .rodata.str1.1
.LC4:
.string "Number of students: "
.LC5:
.string "%d"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB50:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
lea rsi, .LC4[rip]
mov edi, 1
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 40
.cfi_def_cfa_offset 96
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
call __printf_chk@PLT
lea rsi, 20[rsp]
lea rdi, .LC5[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov r13d, DWORD PTR 20[rsp]
mov rdi, r13
mov r15, r13
call malloc@PLT
mov rbp, rax
test r13d, r13d
je .L21
mov rbx, rax
lea rax, 0[0+r13*8]
mov QWORD PTR [rsp], rax
lea r12, [rax+rbp]
.p2align 4,,10
.p2align 3
.L22:
mov edi, 7
add rbx, 8
call malloc@PLT
mov QWORD PTR -8[rbx], rax
cmp rbx, r12
jne .L22
lea rdi, [r13+r13]
call malloc@PLT
lea rdi, 0[0+r13*8]
mov QWORD PTR 8[rsp], rax
call malloc@PLT
mov r12, rax
mov r14, rax
mov rax, QWORD PTR [rsp]
lea rbx, [r12+rax]
.p2align 4,,10
.p2align 3
.L24:
mov edi, 48
add r14, 8
call malloc@PLT
mov QWORD PTR -8[r14], rax
cmp r14, rbx
jne .L24
mov rdi, r13
call malloc@PLT
mov rbx, QWORD PTR [rsp]
mov r13, rax
mov r14, rax
add rbx, rax
.p2align 4,,10
.p2align 3
.L26:
mov edi, 41
add r14, 8
call malloc@PLT
mov QWORD PTR -8[r14], rax
cmp rbx, r14
jne .L26
.L27:
mov rbx, QWORD PTR 8[rsp]
mov r8, r12
mov rdx, r13
mov rsi, rbp
mov edi, r15d
mov rcx, rbx
call readInput
mov edi, DWORD PTR 20[rsp]
mov r8, r12
mov rcx, rbx
mov rdx, r13
mov rsi, rbp
call writeFile
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L36
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L21:
.cfi_restore_state
xor edi, edi
call malloc@PLT
xor edi, edi
mov QWORD PTR 8[rsp], rax
call malloc@PLT
xor edi, edi
mov r12, rax
call malloc@PLT
mov r13, rax
jmp .L27
.L36:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE50:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999580.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%s\000"
.align 2
.LC1:
.ascii "Stud Name: %s\011 AM: %s\011 Semester: %d\011 Grade"
.ascii "s: [%.1lf][%.1lf][%.1lf][%.1lf][%.1lf]\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global readInput
.syntax unified
.arm
.fpu softvfp
.type readInput, %function
readInput:
@ args = 4, pretend = 0, frame = 120
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr ip, .L12
sub sp, sp, #172
cmp r0, #0
ldr ip, [ip]
str ip, [sp, #164]
mov ip,#0
ldr r4, [sp, #208]
beq .L1
sub r5, r1, #4
add r1, r5, r0, lsl #2
ldr r10, .L12+4
ldr r9, .L12+8
str r1, [sp, #52]
sub r7, r2, #4
sub r6, r3, #2
sub r4, r4, #4
.L4:
add r1, sp, #64
mov r0, r10
bl __isoc99_scanf
mov r2, #0
ldrb r3, [sp, #70] @ zero_extendqisi2
add r1, sp, #60
add r0, sp, #64
strb r3, [sp, #60]
strb r2, [sp, #61]
bl strtok
add r1, sp, #60
str r0, [r5, #4]!
mov r0, #0
bl strtok
add r1, sp, #60
str r0, [r7, #4]!
mov r0, #0
bl strtok
mov r2, #10
mov r1, #0
bl strtol
mov r3, r0
ldr r0, [r5]
strh r3, [r6, #2]! @ movhi
bl puts
mov r8, #0
.L3:
add r1, sp, #60
mov r0, #0
bl strtok
ldr r2, [r4, #4]
mov r1, #0
add fp, r2, r8
bl strtod
add r8, r8, #8
cmp r8, #40
stm fp, {r0-r1}
bne .L3
ldr r1, [r4, #4]!
ldrsh r0, [r6]
add r3, r1, #32
ldmia r3, {r2-r3}
str r2, [sp, #40]
str r3, [sp, #44]
add r3, r1, #24
ldmia r3, {r2-r3}
str r2, [sp, #32]
str r3, [sp, #36]
add r3, r1, #16
ldmia r3, {r2-r3}
str r2, [sp, #24]
str r3, [sp, #28]
add r3, r1, #8
ldmia r3, {r2-r3}
str r2, [sp, #16]
str r3, [sp, #20]
ldmia r1, {r1-r2}
ldr r3, [r5]
str r1, [sp, #8]
str r2, [sp, #12]
str r0, [sp]
mov r1, r9
mov r0, #1
ldr r2, [r7]
bl __printf_chk
ldr r3, [sp, #52]
cmp r5, r3
bne .L4
.L1:
ldr r3, .L12
ldr r2, [r3]
ldr r3, [sp, #164]
eors r2, r3, r2
mov r3, #0
bne .L11
add sp, sp, #172
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L11:
bl __stack_chk_fail
.L13:
.align 2
.L12:
.word .LC2
.word .LC0
.word .LC1
.size readInput, .-readInput
.section .rodata.str1.4
.align 2
.LC3:
.ascii "w+\000"
.align 2
.LC4:
.ascii "registry.txt\000"
.text
.align 2
.global writeFile
.syntax unified
.arm
.fpu softvfp
.type writeFile, %function
writeFile:
@ args = 4, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r4, r2
ldr r2, .L22
sub sp, sp, #60
mov r10, r0
mov r6, r1
ldr r2, [r2]
ldr r1, .L22+4
ldr r0, .L22+8
mov r5, r3
ldr r7, [sp, #96]
bl freopen
cmp r10, #0
str r0, [sp, #52]
beq .L15
sub r4, r4, #4
ldr fp, .L22+12
add r10, r4, r10, lsl #2
sub r6, r6, #4
sub r5, r5, #2
sub r7, r7, #4
.L16:
ldr ip, [r7, #4]!
ldrsh r0, [r5, #2]!
add r3, ip, #32
ldmia r3, {r2-r3}
str r2, [sp, #40]
str r3, [sp, #44]
add r3, ip, #24
ldmia r3, {r2-r3}
str r2, [sp, #32]
str r3, [sp, #36]
add r3, ip, #16
ldmia r3, {r2-r3}
str r2, [sp, #24]
str r3, [sp, #28]
add r3, ip, #8
ldmia r3, {r2-r3}
str r2, [sp, #16]
str r3, [sp, #20]
ldr r2, [r4, #4]!
ldr r3, [r6, #4]!
ldmia ip, {r8-r9}
mov r1, fp
str r0, [sp]
str r8, [sp, #8]
str r9, [sp, #12]
mov r0, #1
bl __printf_chk
cmp r4, r10
bne .L16
.L15:
ldr r0, [sp, #52]
add sp, sp, #60
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
b fclose
.L23:
.align 2
.L22:
.word stdout
.word .LC3
.word .LC4
.word .LC1
.size writeFile, .-writeFile
.section .rodata.str1.4
.align 2
.LC5:
.ascii "Number of students: \000"
.align 2
.LC6:
.ascii "%d\000"
.section .rodata.cst4
.align 2
.LC7:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
ldr r3, .L41
sub sp, sp, #16
ldr r1, .L41+4
mov r0, #1
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
bl __printf_chk
add r1, sp, #8
ldr r0, .L41+8
bl __isoc99_scanf
ldr r5, [sp, #8]
mov r0, r5
bl malloc
cmp r5, #0
mov r6, r0
beq .L25
lsl r9, r5, #2
sub r9, r9, #4
add r7, r0, r9
sub r4, r0, #4
.L26:
mov r0, #7
bl malloc
str r0, [r4, #4]!
cmp r4, r7
bne .L26
lsl r0, r5, #1
bl malloc
mov r8, r0
lsl r0, r5, #3
bl malloc
mov r7, r0
sub r4, r0, #4
add r10, r0, r9
.L28:
mov r0, #48
bl malloc
str r0, [r4, #4]!
cmp r10, r4
bne .L28
mov r0, r5
bl malloc
mov r10, r0
add r9, r0, r9
sub r4, r0, #4
.L30:
mov r0, #41
bl malloc
str r0, [r4, #4]!
cmp r4, r9
bne .L30
.L31:
mov r0, r5
mov r3, r8
mov r2, r10
mov r1, r6
str r7, [sp]
bl readInput
mov r3, r8
mov r2, r10
mov r1, r6
ldr r0, [sp, #8]
str r7, [sp]
bl writeFile
ldr r3, .L41
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L40
mov r0, #0
add sp, sp, #16
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L25:
mov r0, r5
bl malloc
mov r8, r0
mov r0, r5
bl malloc
mov r7, r0
mov r0, r5
bl malloc
mov r10, r0
b .L31
.L40:
bl __stack_chk_fail
.L42:
.align 2
.L41:
.word .LC7
.word .LC5
.word .LC6
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999583.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d%d%d + %d%d%d = %d%d%d \n"
.LC1:
.string "total = %d"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov edx, 1
lea rsi, .LC0[rip]
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 72
.cfi_def_cfa_offset 128
mov DWORD PTR 20[rsp], 0
.L2:
imul eax, edx, 100
mov ecx, 1
add eax, 10
mov DWORD PTR 24[rsp], eax
.L19:
mov eax, DWORD PTR 24[rsp]
cmp edx, ecx
mov r8d, 1
setne BYTE PTR 39[rsp]
add eax, 110
mov DWORD PTR 40[rsp], eax
.L17:
cmp edx, r8d
mov r9d, 1
mov r15d, edx
setne al
and al, BYTE PTR 39[rsp]
mov r11d, eax
mov eax, DWORD PTR 40[rsp]
mov ebp, r11d
add eax, r8d
mov DWORD PTR 28[rsp], eax
.L15:
mov eax, DWORD PTR 28[rsp]
mov r11d, 1
mov r13d, r11d
mov DWORD PTR 32[rsp], eax
.L13:
mov r11d, 1
mov r12d, r9d
.L11:
mov eax, DWORD PTR 32[rsp]
mov DWORD PTR 16[rsp], 110
mov DWORD PTR 12[rsp], 1
add eax, r11d
mov DWORD PTR 44[rsp], eax
.p2align 4,,10
.p2align 3
.L9:
mov r10d, DWORD PTR 16[rsp]
mov r14d, 1
.p2align 4,,10
.p2align 3
.L7:
mov ebx, 1
.p2align 4,,10
.p2align 3
.L4:
test bpl, bpl
je .L3
cmp r15d, r12d
je .L3
cmp r15d, r13d
je .L3
cmp r15d, r11d
je .L3
mov edi, DWORD PTR 12[rsp]
cmp r8d, edi
je .L3
cmp r15d, r14d
je .L3
cmp r15d, ebx
je .L3
cmp ecx, r8d
je .L3
cmp ecx, r12d
je .L3
cmp ecx, r13d
setne dl
cmp ecx, r11d
setne al
test dl, al
je .L3
cmp ecx, r14d
jne .L116
.p2align 4,,10
.p2align 3
.L3:
add ebx, 1
cmp ebx, 10
jne .L4
add r14d, 1
add r10d, 10
cmp r14d, 10
jne .L7
add DWORD PTR 12[rsp], 1
mov eax, DWORD PTR 12[rsp]
add DWORD PTR 16[rsp], 100
cmp eax, 10
jne .L9
add r11d, 1
cmp r11d, 10
jne .L11
add r13d, 1
add DWORD PTR 32[rsp], 10
mov r9d, r12d
cmp r13d, 10
jne .L13
add r9d, 1
add DWORD PTR 28[rsp], 100
cmp r9d, 10
jne .L15
add r8d, 1
mov edx, r15d
cmp r8d, 10
jne .L17
add ecx, 1
add DWORD PTR 24[rsp], 10
cmp ecx, 10
jne .L19
add edx, 1
cmp edx, 10
jne .L2
mov edx, DWORD PTR 20[rsp]
lea rsi, .LC1[rip]
mov edi, 1
xor eax, eax
sar edx
call __printf_chk@PLT
mov rdi, QWORD PTR stdin[rip]
call getc@PLT
mov rdi, QWORD PTR stdin[rip]
call getc@PLT
add rsp, 72
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L116:
.cfi_restore_state
cmp ecx, ebx
je .L3
cmp r8d, r12d
je .L3
cmp r8d, r13d
setne dl
cmp r8d, r11d
setne al
test dl, al
je .L3
cmp r8d, r14d
je .L3
cmp r8d, ebx
je .L3
cmp r12d, r13d
je .L3
cmp r12d, r11d
je .L3
cmp r12d, edi
je .L3
cmp r12d, r14d
je .L3
cmp r12d, ebx
je .L3
cmp r13d, r11d
je .L3
cmp r13d, edi
je .L3
cmp r13d, r14d
je .L3
cmp r13d, ebx
je .L3
cmp r11d, edi
je .L3
cmp r11d, r14d
je .L3
cmp r11d, ebx
je .L3
cmp edi, r14d
je .L3
cmp edi, ebx
je .L3
cmp r14d, ebx
je .L3
lea eax, [rbx+r10]
cmp DWORD PTR 44[rsp], eax
jne .L3
mov DWORD PTR 60[rsp], r10d
mov r9d, r12d
mov edx, r15d
mov edi, 1
add DWORD PTR 20[rsp], 1
sub rsp, 8
.cfi_def_cfa_offset 136
push rbx
.cfi_def_cfa_offset 144
push r14
.cfi_def_cfa_offset 152
mov eax, DWORD PTR 36[rsp]
push rax
.cfi_def_cfa_offset 160
xor eax, eax
push r11
.cfi_def_cfa_offset 168
mov DWORD PTR 96[rsp], r11d
push r13
.cfi_def_cfa_offset 176
mov DWORD PTR 100[rsp], r8d
mov DWORD PTR 96[rsp], ecx
call __printf_chk@PLT
add rsp, 48
.cfi_def_cfa_offset 128
mov r10d, DWORD PTR 60[rsp]
lea rsi, .LC0[rip]
mov r11d, DWORD PTR 56[rsp]
mov r8d, DWORD PTR 52[rsp]
mov ecx, DWORD PTR 48[rsp]
jmp .L3
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999583.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d%d%d + %d%d%d = %d%d%d \012\000"
.align 2
.LC1:
.ascii "total = %d\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 0, uses_anonymous_args = 0
mov r3, #110
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #84
str r3, [sp, #44]
mov r3, #0
mov r2, #1
ldr r1, .L72
str r3, [sp, #40]
.L2:
ldr r3, [sp, #44]
str r3, [sp, #48]
mov r3, #1
.L19:
mov r9, #1
subs r0, r2, r3
movne r0, #1
mov fp, r9
str r0, [sp, #60]
ldr r0, [sp, #48]
add r0, r0, #110
str r0, [sp, #64]
.L17:
ldr r5, [sp, #60]
mov r8, #1
cmp r2, fp
moveq r5, #0
andne r5, r5, #1
mov r9, fp
ldr r0, [sp, #64]
add r0, r0, fp
str r0, [sp, #52]
.L15:
mov r6, #1
mov fp, r9
ldr r0, [sp, #52]
str r0, [sp, #56]
.L13:
mov r9, #1
.L11:
mov r10, #1
ldr r0, [sp, #56]
add r0, r9, r0
str r0, [sp, #68]
.L9:
mov r7, #1
add r0, r10, r10, lsl #2
add r0, r0, r0, lsl #2
lsl r0, r0, #2
add r0, r0, #10
str r0, [sp, #36]
.L7:
mov r4, #1
.L4:
cmp r5, #0
beq .L3
cmp r2, r8
cmpne r2, r6
beq .L3
cmp r2, r9
cmpne fp, r10
beq .L3
cmp r2, r7
cmpne r2, r4
beq .L3
cmp r3, fp
cmpne r3, r8
beq .L3
cmp r3, r6
cmpne r3, r9
movne r0, #1
moveq r0, #0
cmp r3, r7
moveq r0, #0
andne r0, r0, #1
cmp r0, #0
bne .L71
.L3:
add r4, r4, #1
cmp r4, #10
bne .L4
ldr r0, [sp, #36]
add r7, r7, #1
add r0, r0, #10
cmp r7, #10
str r0, [sp, #36]
bne .L7
add r10, r10, #1
cmp r10, #10
bne .L9
add r9, r9, #1
cmp r9, #10
bne .L11
ldr r0, [sp, #56]
add r6, r6, #1
add r0, r0, #10
cmp r6, #10
str r0, [sp, #56]
bne .L13
ldr r0, [sp, #52]
add r8, r8, #1
add r0, r0, #100
cmp r8, #10
mov r9, fp
str r0, [sp, #52]
bne .L15
add fp, fp, #1
cmp fp, #10
bne .L17
ldr r0, [sp, #48]
add r3, r3, #1
add r0, r0, #10
cmp r3, #10
str r0, [sp, #48]
bne .L19
ldr r3, [sp, #44]
add r2, r2, #1
add r3, r3, #100
cmp r2, #10
str r3, [sp, #44]
bne .L2
ldr r3, [sp, #40]
ldr r4, .L72+4
ldr r1, .L72+8
asr r2, r3, #1
mov r0, #1
bl __printf_chk
ldr r0, [r4]
bl getc
ldr r0, [r4]
bl getc
mov r0, #0
add sp, sp, #84
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L71:
cmp r3, r4
cmpne fp, r8
beq .L3
cmp fp, r6
cmpne fp, r9
movne r0, #1
moveq r0, #0
cmp fp, r7
moveq r0, #0
andne r0, r0, #1
cmp r0, #0
beq .L3
cmp fp, r4
cmpne r8, r6
beq .L3
cmp r8, r9
cmpne r8, r10
beq .L3
cmp r8, r7
cmpne r8, r4
beq .L3
cmp r6, r9
cmpne r6, r10
beq .L3
cmp r6, r7
cmpne r6, r4
beq .L3
cmp r9, r10
cmpne r9, r7
beq .L3
cmp r9, r4
cmpne r10, r7
beq .L3
cmp r10, r4
cmpne r7, r4
beq .L3
ldr r0, [sp, #36]
ldr ip, [sp, #68]
add r0, r4, r0
cmp ip, r0
bne .L3
mov r0, #1
ldr ip, [sp, #40]
str r4, [sp, #24]
add ip, ip, r0
str r7, [sp, #20]
str r10, [sp, #16]
str r9, [sp, #12]
str r6, [sp, #8]
str r8, [sp, #4]
str fp, [sp]
str r3, [sp, #76]
str r2, [sp, #72]
str ip, [sp, #40]
bl __printf_chk
ldr r3, [sp, #76]
ldr r2, [sp, #72]
ldr r1, .L72
b .L3
.L73:
.align 2
.L72:
.word .LC0
.word stdin
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999599.c"
.intel_syntax noprefix
.text
.p2align 4
.globl parse
.type parse, @function
parse:
.LFB64:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov r8, rdi
mov rdi, rsi
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
lea r12, 6[r8]
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
mov rbx, r8
sub rsp, 16
.cfi_def_cfa_offset 48
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
mov rbp, rsp
.p2align 4,,10
.p2align 3
.L2:
mov edx, 16
mov rsi, rbp
add rbx, 1
call strtol@PLT
mov BYTE PTR -1[rbx], al
mov rax, QWORD PTR [rsp]
lea rdi, 1[rax]
cmp rbx, r12
jne .L2
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L7
add rsp, 16
.cfi_remember_state
.cfi_def_cfa_offset 32
xor eax, eax
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE64:
.size parse, .-parse
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "the_stack_data/999599.c"
.LC1:
.string "fd"
.text
.p2align 4
.globl emit
.type emit, @function
emit:
.LFB65:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
mov r13, rdx
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov r12, rsi
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 56
.cfi_def_cfa_offset 96
mov rax, QWORD PTR fs:40
mov QWORD PTR 40[rsp], rax
xor eax, eax
mov DWORD PTR 12[rsp], 1
call gethostbyname@PLT
pxor xmm0, xmm0
xor edx, edx
mov esi, 2
mov rax, QWORD PTR 24[rax]
movups XMMWORD PTR 16[rsp], xmm0
mov edi, 2
mov rax, QWORD PTR [rax]
mov eax, DWORD PTR [rax]
mov DWORD PTR 16[rsp], 117440514
mov DWORD PTR 20[rsp], eax
call socket@PLT
test eax, eax
je .L12
mov ebp, eax
lea rcx, 12[rsp]
mov r8d, 4
mov edi, eax
mov edx, 6
mov esi, 1
lea rbx, 16[rsp]
call setsockopt@PLT
xor ecx, ecx
mov edi, ebp
mov r9d, 16
mov r8, rbx
mov rdx, r13
mov rsi, r12
call sendto@PLT
mov edi, ebp
call close@PLT
mov rax, QWORD PTR 40[rsp]
sub rax, QWORD PTR fs:40
jne .L13
add rsp, 56
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L12:
.cfi_restore_state
lea rcx, __PRETTY_FUNCTION__.2[rip]
mov edx, 65
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.L13:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE65:
.size emit, .-emit
.section .rodata.str1.1
.LC2:
.string "mac"
.text
.p2align 4
.globl wol
.type wol, @function
wol:
.LFB66:
.cfi_startproc
endbr64
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
mov r12, rdi
mov rdi, rsi
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
sub rsp, 144
.cfi_def_cfa_offset 192
mov rax, QWORD PTR fs:40
mov QWORD PTR 136[rsp], rax
xor eax, eax
call strdup@PLT
test rax, rax
je .L22
mov rbp, rax
lea rbx, 130[rsp]
lea r13, 8[rsp]
mov rdi, rax
lea r14, 136[rsp]
.p2align 4,,10
.p2align 3
.L16:
mov edx, 16
mov rsi, r13
add rbx, 1
call strtol@PLT
mov BYTE PTR -1[rbx], al
mov rax, QWORD PTR 8[rsp]
lea rdi, 1[rax]
cmp rbx, r14
jne .L16
mov DWORD PTR 16[rsp], -1
mov eax, -1
mov ecx, DWORD PTR 130[rsp]
lea rsi, 118[rsp]
movzx edx, WORD PTR 134[rsp]
mov WORD PTR 20[rsp], ax
lea rax, 22[rsp]
.p2align 4,,10
.p2align 3
.L17:
mov DWORD PTR [rax], ecx
add rax, 6
mov WORD PTR -2[rax], dx
cmp rsi, rax
jne .L17
mov rdi, r12
lea rsi, 16[rsp]
mov edx, 102
call emit
mov rdi, rbp
call free@PLT
mov rax, QWORD PTR 136[rsp]
sub rax, QWORD PTR fs:40
jne .L23
add rsp, 144
.cfi_remember_state
.cfi_def_cfa_offset 48
xor eax, eax
pop rbx
.cfi_def_cfa_offset 40
pop rbp
.cfi_def_cfa_offset 32
pop r12
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
ret
.L22:
.cfi_restore_state
lea rcx, __PRETTY_FUNCTION__.1[rip]
mov edx, 81
lea rsi, .LC0[rip]
lea rdi, .LC2[rip]
call __assert_fail@PLT
.L23:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE66:
.size wol, .-wol
.section .rodata.str1.1
.LC3:
.string "usage: %s [-n network] mac\n"
.text
.p2align 4
.globl usage
.type usage, @function
usage:
.LFB67:
.cfi_startproc
endbr64
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
lea rdx, .LC3[rip]
mov esi, 1
xor eax, eax
sub rsp, 8
.cfi_def_cfa_offset 16
mov rdi, QWORD PTR stderr[rip]
mov rcx, QWORD PTR __progname[rip]
call __fprintf_chk@PLT
mov edi, 1
call exit@PLT
.cfi_endproc
.LFE67:
.size usage, .-usage
.section .rodata.str1.1
.LC4:
.string "255.255.255.255"
.LC5:
.string "bcast"
.LC6:
.string "n:"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB68:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
lea r13, .LC6[rip]
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov r12, rsi
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
lea rbp, .LC4[rip]
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
mov ebx, edi
sub rsp, 8
.cfi_def_cfa_offset 48
jmp .L27
.p2align 4,,10
.p2align 3
.L29:
cmp eax, 110
jne .L33
mov rdi, QWORD PTR optarg[rip]
call strdup@PLT
mov rbp, rax
test rax, rax
je .L34
.L27:
mov rdx, r13
mov rsi, r12
mov edi, ebx
call getopt@PLT
cmp eax, -1
jne .L29
movsx rdx, DWORD PTR optind[rip]
mov rax, rdx
lea rdx, [r12+rdx*8]
cmp eax, ebx
je .L33
mov rsi, QWORD PTR [rdx]
mov rdi, rbp
call wol
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L33:
.cfi_restore_state
call usage
.L34:
lea rcx, __PRETTY_FUNCTION__.0[rip]
mov edx, 114
lea rsi, .LC0[rip]
lea rdi, .LC5[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE68:
.size main, .-main
.section .rodata
.type __PRETTY_FUNCTION__.0, @object
.size __PRETTY_FUNCTION__.0, 5
__PRETTY_FUNCTION__.0:
.string "main"
.type __PRETTY_FUNCTION__.1, @object
.size __PRETTY_FUNCTION__.1, 4
__PRETTY_FUNCTION__.1:
.string "wol"
.type __PRETTY_FUNCTION__.2, @object
.size __PRETTY_FUNCTION__.2, 5
__PRETTY_FUNCTION__.2:
.string "emit"
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999599.c"
.text
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global parse
.syntax unified
.arm
.fpu softvfp
.type parse, %function
parse:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, lr}
ldr r3, .L8
mov r5, r0
sub sp, sp, #12
mov r0, r1
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
sub r4, r5, #1
add r5, r5, #5
.L2:
mov r1, sp
mov r2, #16
bl strtol
ldr r1, [sp]
strb r0, [r4, #1]!
cmp r4, r5
add r0, r1, #1
bne .L2
ldr r3, .L8
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L7
mov r0, #0
add sp, sp, #12
@ sp needed
pop {r4, r5, pc}
.L7:
bl __stack_chk_fail
.L9:
.align 2
.L8:
.word .LC0
.size parse, .-parse
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC1:
.ascii "the_stack_data/999599.c\000"
.align 2
.LC2:
.ascii "fd\000"
.section .rodata.cst4
.align 2
.LC3:
.word __stack_chk_guard
.text
.align 2
.global emit
.syntax unified
.arm
.fpu softvfp
.type emit, %function
emit:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
mov r8, #1
ldr r3, .L16
sub sp, sp, #32
mov r4, #0
ldr r3, [r3]
str r3, [sp, #28]
mov r3,#0
mov r6, r1
mov r7, r2
str r8, [sp, #8]
bl gethostbyname
mov r1, #2
str r4, [sp, #16]
str r4, [sp, #20]
str r4, [sp, #24]
ldr r3, [r0, #16]
str r4, [sp, #12]
ldr r2, [r3]
ldr r3, .L16+4
ldr ip, [r2]
mov r0, r1
mov r2, r4
str ip, [sp, #16]
str r3, [sp, #12]
bl socket
subs r5, r0, #0
beq .L14
mov r3, #4
mov r1, r8
mov r2, #6
str r3, [sp]
add r3, sp, #8
bl setsockopt
mov r3, #16
add r2, sp, #12
mov r1, r6
str r2, [sp]
str r3, [sp, #4]
mov r2, r7
mov r3, r4
mov r0, r5
bl sendto
mov r0, r5
bl close
ldr r3, .L16
ldr r2, [r3]
ldr r3, [sp, #28]
eors r2, r3, r2
mov r3, #0
bne .L15
mov r0, r4
add sp, sp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, pc}
.L14:
mov r2, #65
ldr r3, .L16+8
ldr r1, .L16+12
ldr r0, .L16+16
bl __assert_fail
.L15:
bl __stack_chk_fail
.L17:
.align 2
.L16:
.word .LC3
.word 117440514
.word .LANCHOR0
.word .LC1
.word .LC2
.size emit, .-emit
.section .rodata.str1.4
.align 2
.LC4:
.ascii "mac\000"
.section .rodata.cst4
.align 2
.LC5:
.word __stack_chk_guard
.text
.align 2
.global wol
.syntax unified
.arm
.fpu softvfp
.type wol, %function
wol:
@ args = 0, pretend = 0, frame = 120
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr r3, .L26
sub sp, sp, #120
mov r6, r0
mov r0, r1
ldr r3, [r3]
str r3, [sp, #116]
mov r3,#0
bl strdup
subs r5, r0, #0
beq .L24
mov r1, r5
add r0, sp, #108
bl parse
mvn r3, #0
add r0, sp, #4
strh r3, [sp, #8] @ movhi
str r3, [sp, #4]
add r4, sp, #100
.L20:
add r3, r0, #6
mov r0, r3
mov r2, #6
add r1, sp, #108
bl memcpy
cmp r0, r4
bne .L20
mov r2, #102
add r1, sp, #4
mov r0, r6
bl emit
mov r0, r5
bl free
ldr r3, .L26
ldr r2, [r3]
ldr r3, [sp, #116]
eors r2, r3, r2
mov r3, #0
bne .L25
mov r0, #0
add sp, sp, #120
@ sp needed
pop {r4, r5, r6, pc}
.L24:
mov r2, #81
ldr r3, .L26+4
ldr r1, .L26+8
ldr r0, .L26+12
bl __assert_fail
.L25:
bl __stack_chk_fail
.L27:
.align 2
.L26:
.word .LC5
.word .LANCHOR0+8
.word .LC1
.word .LC4
.size wol, .-wol
.section .rodata.str1.4
.align 2
.LC6:
.ascii "usage: %s [-n network] mac\012\000"
.text
.align 2
.global usage
.syntax unified
.arm
.fpu softvfp
.type usage, %function
usage:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r2, .L30
ldr r3, .L30+4
ldr r0, [r2]
mov r1, #1
push {r4, lr}
ldr r3, [r3]
ldr r2, .L30+8
bl __fprintf_chk
mov r0, #1
bl exit
.L31:
.align 2
.L30:
.word stderr
.word __progname
.word .LC6
.size usage, .-usage
.section .rodata.str1.4
.align 2
.LC7:
.ascii "255.255.255.255\000"
.align 2
.LC8:
.ascii "bcast\000"
.align 2
.LC9:
.ascii "n:\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
mov r6, r0
mov r5, r1
ldr r4, .L41
ldr r7, .L41+4
ldr r8, .L41+8
b .L33
.L35:
cmp r0, #110
bne .L39
ldr r0, [r8]
bl strdup
subs r4, r0, #0
beq .L40
.L33:
mov r2, r7
mov r1, r5
mov r0, r6
bl getopt
cmn r0, #1
bne .L35
ldr r3, .L41+12
ldr r3, [r3]
cmp r3, r6
beq .L39
mov r0, r4
ldr r1, [r5, r3, lsl #2]
bl wol
mov r0, #0
pop {r4, r5, r6, r7, r8, pc}
.L39:
bl usage
.L40:
mov r2, #114
ldr r3, .L41+16
ldr r1, .L41+20
ldr r0, .L41+24
bl __assert_fail
.L42:
.align 2
.L41:
.word .LC7
.word .LC9
.word optarg
.word optind
.word .LANCHOR0+12
.word .LC1
.word .LC8
.size main, .-main
.section .rodata
.align 2
.set .LANCHOR0,. + 0
.type __PRETTY_FUNCTION__.7239, %object
.size __PRETTY_FUNCTION__.7239, 5
__PRETTY_FUNCTION__.7239:
.ascii "emit\000"
.space 3
.type __PRETTY_FUNCTION__.7247, %object
.size __PRETTY_FUNCTION__.7247, 4
__PRETTY_FUNCTION__.7247:
.ascii "wol\000"
.type __PRETTY_FUNCTION__.7262, %object
.size __PRETTY_FUNCTION__.7262, 5
__PRETTY_FUNCTION__.7262:
.ascii "main\000"
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "9996.c"
.intel_syntax noprefix
.text
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "elf2bin [input file] [output file]"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Failed to open %s: %s\n"
.LC2:
.string "Failed to fstat(fd): %s\n"
.section .rodata.str1.8
.align 8
.LC3:
.string "Unable to read ELF file in: %s\n"
.section .rodata.str1.1
.LC4:
.string "Failed to mmap(): %s\n"
.LC5:
.string "data @ %08x, mapping @ %08x\n"
.LC6:
.string "memcpy(%08x, %08x, %08x)\n"
.LC7:
.string "Unable to dump memory: %s\n"
.section .rodata.str1.8
.align 8
.LC8:
.string "Unable to complete memory dump"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB69:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 200
.cfi_def_cfa_offset 256
mov QWORD PTR 24[rsp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR 184[rsp], rax
xor eax, eax
cmp edi, 2
jle .L19
mov rax, QWORD PTR 24[rsp]
xor esi, esi
mov rdi, QWORD PTR 8[rax]
xor eax, eax
call open@PLT
mov ebp, eax
cmp eax, -1
je .L20
lea rdx, 32[rsp]
mov esi, eax
mov edi, 1
call __fxstat@PLT
cmp eax, -1
je .L21
mov rsi, QWORD PTR 80[rsp]
xor r9d, r9d
mov r8d, ebp
mov ecx, 2
mov edx, 1
xor edi, edi
call mmap@PLT
mov r15, rax
cmp rax, -1
je .L22
mov edi, ebp
call close@PLT
xor r9d, r9d
mov r8d, -1
xor edi, edi
mov ecx, 34
mov edx, 7
mov esi, 33554432
call mmap@PLT
mov r13, rax
cmp rax, -1
je .L23
mov ebx, DWORD PTR 28[r15]
mov rcx, rax
mov rdx, r15
xor eax, eax
lea rsi, .LC5[rip]
mov edi, 1
call __printf_chk@PLT
add rbx, r15
cmp WORD PTR 44[r15], 0
je .L14
xor r12d, r12d
mov QWORD PTR 16[rsp], r13
xor r14d, r14d
mov r9, r15
mov r13d, r12d
.p2align 4,,10
.p2align 3
.L10:
cmp DWORD PTR [rbx], 1
jne .L8
mov r8d, DWORD PTR 8[rbx]
mov r11d, DWORD PTR 4[rbx]
mov edi, 1
lea rsi, .LC6[rip]
mov QWORD PTR 8[rsp], r9
mov eax, r8d
mov r15d, r8d
and eax, -4096
test r12d, r12d
cmove r12d, eax
and r11d, -4096
and r8d, 4095
xor eax, eax
add r11, r9
add r8d, DWORD PTR 16[rbx]
sub r15d, r12d
mov rcx, r11
mov ebp, r8d
mov QWORD PTR [rsp], r11
and r15d, -4096
add r15, QWORD PTR 16[rsp]
mov rdx, r15
call __printf_chk@PLT
mov r11, QWORD PTR [rsp]
movsx rdx, ebp
mov rdi, r15
mov rsi, r11
call memcpy@PLT
mov eax, DWORD PTR 8[rbx]
mov edx, DWORD PTR 20[rbx]
mov r9, QWORD PTR 8[rsp]
and eax, 4095
lea eax, 4095[rax+rdx]
and eax, -4096
add r13d, eax
.L8:
movzx eax, WORD PTR 44[r9]
add r14d, 1
add rbx, 32
cmp eax, r14d
jg .L10
movsx r12, r13d
mov r13, QWORD PTR 16[rsp]
.L7:
mov rax, QWORD PTR 24[rsp]
mov edx, 420
mov esi, 578
mov rdi, QWORD PTR 16[rax]
xor eax, eax
call open@PLT
mov ebp, eax
cmp eax, -1
je .L24
mov rdx, r12
mov rsi, r13
mov edi, eax
call write@PLT
cmp rax, r12
jne .L25
mov edi, ebp
call close@PLT
mov rax, QWORD PTR 184[rsp]
sub rax, QWORD PTR fs:40
jne .L26
add rsp, 200
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
xor r12d, r12d
jmp .L7
.L24:
call __errno_location@PLT
mov edi, DWORD PTR [rax]
call strerror@PLT
lea rsi, .LC7[rip]
mov rdx, rax
.L17:
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov edi, 1
call exit@PLT
.L23:
call __errno_location@PLT
mov edi, DWORD PTR [rax]
call strerror@PLT
lea rsi, .LC4[rip]
mov rdx, rax
jmp .L17
.L22:
call __errno_location@PLT
mov edi, DWORD PTR [rax]
call strerror@PLT
lea rsi, .LC3[rip]
mov rdx, rax
jmp .L17
.L21:
call __errno_location@PLT
mov edi, DWORD PTR [rax]
call strerror@PLT
lea rsi, .LC2[rip]
mov rdx, rax
jmp .L17
.L20:
call __errno_location@PLT
mov edi, DWORD PTR [rax]
call strerror@PLT
mov edi, 1
lea rsi, .LC1[rip]
mov rcx, rax
mov rax, QWORD PTR 24[rsp]
mov rdx, QWORD PTR 8[rax]
xor eax, eax
call __printf_chk@PLT
mov edi, 1
call exit@PLT
.L19:
lea rdi, .LC0[rip]
call puts@PLT
mov edi, 1
call exit@PLT
.L26:
call __stack_chk_fail@PLT
.L25:
lea rdi, .LC8[rip]
call puts@PLT
mov edi, 1
call exit@PLT
.cfi_endproc
.LFE69:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "9996.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "elf2bin [input file] [output file]\000"
.align 2
.LC1:
.ascii "Failed to open %s: %s\012\000"
.align 2
.LC2:
.ascii "Failed to fstat(fd): %s\012\000"
.align 2
.LC3:
.ascii "Unable to read ELF file in: %s\012\000"
.align 2
.LC4:
.ascii "Failed to mmap(): %s\012\000"
.align 2
.LC5:
.ascii "data @ %08x, mapping @ %08x\012\000"
.align 2
.LC6:
.ascii "memcpy(%08x, %08x, %08x)\012\000"
.align 2
.LC7:
.ascii "Unable to dump memory: %s\012\000"
.align 2
.LC8:
.ascii "Unable to complete memory dump\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC9:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 112
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L26
sub sp, sp, #124
str r1, [sp, #20]
cmp r0, #2
ldr r3, [r3]
str r3, [sp, #116]
mov r3,#0
ble .L18
ldr r3, [sp, #20]
mov r1, #0
ldr r0, [r3, #4]
bl open
cmn r0, #1
mov r4, r0
beq .L19
mov r1, r0
add r2, sp, #24
mov r0, #3
bl __fxstat
cmn r0, #1
beq .L20
mov r8, #0
mov r3, #2
mov r0, r8
mov r2, #1
stm sp, {r4, r8}
ldr r1, [sp, #68]
bl mmap
cmn r0, #1
mov r9, r0
beq .L21
mov r0, r4
bl close
mvn r3, #0
mov r2, #7
stm sp, {r3, r8}
mov r1, #33554432
mov r3, #34
mov r0, r8
bl mmap
cmn r0, #1
str r0, [sp, #12]
beq .L22
mov r2, r9
mov r0, #1
ldr r3, [sp, #12]
ldr r1, .L26+4
ldr r4, [r9, #28]
bl __printf_chk
ldrh r2, [r9, #44]
cmp r2, #0
beq .L14
mov fp, r8
mov r5, r8
add r4, r4, #32
ldr r10, .L26+8
add r4, r9, r4
.L10:
ldr r3, [r4, #-32]
cmp r3, #1
bne .L8
ldr r6, [r4, #-24]
cmp r8, #0
andeq r8, r6, r10
ldr r2, [r4, #-16]
ldr r3, [r4, #-28]
ldr r1, [sp, #12]
sub r7, r6, r8
lsl r6, r6, #20
and r7, r7, r10
lsr r6, r6, #20
add r7, r1, r7
add r6, r6, r2
and r3, r3, r10
add r3, r9, r3
mov r2, r7
ldr r1, .L26+12
mov r0, #1
str r6, [sp]
str r3, [sp, #16]
bl __printf_chk
ldr r3, [sp, #16]
mov r2, r6
mov r1, r3
mov r0, r7
bl memcpy
ldr r2, [r4, #-12]
ldr r3, [r4, #-24]
add r2, r2, #4080
lsl r3, r3, #20
add r2, r2, #15
lsr r3, r3, #20
add r3, r3, r2
and r3, r3, r10
ldrh r2, [r9, #44]
add fp, r3, fp
.L8:
add r5, r5, #1
cmp r2, r5
add r4, r4, #32
bgt .L10
.L7:
ldr r3, [sp, #20]
mov r2, #420
ldr r0, [r3, #8]
ldr r1, .L26+16
bl open
cmn r0, #1
mov r4, r0
beq .L23
mov r2, fp
ldr r1, [sp, #12]
bl write
cmp r0, fp
bne .L24
mov r0, r4
bl close
ldr r3, .L26
ldr r2, [r3]
ldr r3, [sp, #116]
eors r2, r3, r2
mov r3, #0
bne .L25
mov r0, #0
add sp, sp, #124
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L14:
mov fp, r2
b .L7
.L23:
bl __errno_location
ldr r0, [r0]
bl strerror
ldr r1, .L26+20
mov r2, r0
mov r0, #1
bl __printf_chk
mov r0, #1
bl exit
.L22:
bl __errno_location
ldr r0, [r0]
bl strerror
ldr r1, .L26+24
mov r2, r0
mov r0, #1
bl __printf_chk
mov r0, #1
bl exit
.L21:
bl __errno_location
ldr r0, [r0]
bl strerror
ldr r1, .L26+28
mov r2, r0
mov r0, #1
bl __printf_chk
mov r0, #1
bl exit
.L20:
bl __errno_location
ldr r0, [r0]
bl strerror
ldr r1, .L26+32
mov r2, r0
mov r0, #1
bl __printf_chk
mov r0, #1
bl exit
.L19:
bl __errno_location
ldr r3, [sp, #20]
ldr r0, [r0]
ldr r4, [r3, #4]
bl strerror
mov r2, r4
mov r3, r0
ldr r1, .L26+36
mov r0, #1
bl __printf_chk
mov r0, #1
bl exit
.L18:
ldr r0, .L26+40
bl puts
mov r0, #1
bl exit
.L25:
bl __stack_chk_fail
.L24:
ldr r0, .L26+44
bl puts
mov r0, #1
bl exit
.L27:
.align 2
.L26:
.word .LC9
.word .LC5
.word -4096
.word .LC6
.word 578
.word .LC7
.word .LC4
.word .LC3
.word .LC2
.word .LC1
.word .LC0
.word .LC8
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999608.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Enter value of trade: "
.LC2:
.string "%f"
.LC22:
.string "Commission is $%.2f\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
lea rsi, .LC1[rip]
mov edi, 1
sub rsp, 16
.cfi_def_cfa_offset 32
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
lea rbx, 4[rsp]
call __printf_chk@PLT
xor eax, eax
mov rsi, rbx
lea rdi, .LC2[rip]
call __isoc99_scanf@PLT
movss xmm1, DWORD PTR 4[rsp]
pxor xmm7, xmm7
comiss xmm1, xmm7
ja .L2
jmp .L15
.p2align 4,,10
.p2align 3
.L34:
mulsd xmm0, QWORD PTR .LC5[rip]
addsd xmm0, QWORD PTR .LC6[rip]
cvtsd2ss xmm0, xmm0
.L5:
movss xmm3, DWORD PTR .LC21[rip]
movsd xmm1, QWORD PTR .LC0[rip]
comiss xmm3, xmm0
ja .L14
pxor xmm1, xmm1
cvtss2sd xmm1, xmm0
.L14:
movapd xmm0, xmm1
mov edi, 1
mov eax, 1
lea rsi, .LC22[rip]
call __printf_chk@PLT
lea rsi, .LC1[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
xor eax, eax
mov rsi, rbx
lea rdi, .LC2[rip]
call __isoc99_scanf@PLT
movss xmm1, DWORD PTR 4[rsp]
pxor xmm4, xmm4
comiss xmm1, xmm4
jbe .L15
.L2:
movss xmm2, DWORD PTR .LC4[rip]
pxor xmm0, xmm0
cvtss2sd xmm0, xmm1
comiss xmm2, xmm1
ja .L34
movss xmm5, DWORD PTR .LC7[rip]
comiss xmm5, xmm1
jbe .L28
mulsd xmm0, QWORD PTR .LC8[rip]
addsd xmm0, QWORD PTR .LC9[rip]
cvtsd2ss xmm0, xmm0
jmp .L5
.p2align 4,,10
.p2align 3
.L28:
movss xmm6, DWORD PTR .LC10[rip]
comiss xmm6, xmm1
jbe .L29
mulsd xmm0, QWORD PTR .LC11[rip]
addsd xmm0, QWORD PTR .LC12[rip]
cvtsd2ss xmm0, xmm0
jmp .L5
.p2align 4,,10
.p2align 3
.L29:
movss xmm7, DWORD PTR .LC13[rip]
comiss xmm7, xmm1
jbe .L30
mulsd xmm0, QWORD PTR .LC14[rip]
addsd xmm0, QWORD PTR .LC15[rip]
cvtsd2ss xmm0, xmm0
jmp .L5
.p2align 4,,10
.p2align 3
.L15:
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L35
add rsp, 16
.cfi_remember_state
.cfi_def_cfa_offset 16
xor eax, eax
pop rbx
.cfi_def_cfa_offset 8
ret
.L30:
.cfi_restore_state
movss xmm7, DWORD PTR .LC16[rip]
comiss xmm7, xmm1
jbe .L31
mulsd xmm0, QWORD PTR .LC17[rip]
addsd xmm0, QWORD PTR .LC18[rip]
cvtsd2ss xmm0, xmm0
jmp .L5
.L31:
mulsd xmm0, QWORD PTR .LC19[rip]
addsd xmm0, QWORD PTR .LC20[rip]
cvtsd2ss xmm0, xmm0
jmp .L5
.L35:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE39:
.size main, .-main
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long 0
.long 1078165504
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC4:
.long 1159479296
.section .rodata.cst8
.align 8
.LC5:
.long -1340029796
.long 1066494066
.align 8
.LC6:
.long 0
.long 1077805056
.section .rodata.cst4
.align 4
.LC7:
.long 1170427904
.section .rodata.cst8
.align 8
.LC8:
.long 41231686
.long 1065027738
.align 8
.LC9:
.long 0
.long 1078722560
.section .rodata.cst4
.align 4
.LC10:
.long 1184645120
.section .rodata.cst8
.align 8
.LC11:
.long 432932703
.long 1064032849
.align 8
.LC12:
.long 0
.long 1079181312
.section .rodata.cst4
.align 4
.LC13:
.long 1195593728
.section .rodata.cst8
.align 8
.LC14:
.long 27487791
.long 1063388604
.align 8
.LC15:
.long 0
.long 1079574528
.section .rodata.cst4
.align 4
.LC16:
.long 1223959552
.section .rodata.cst8
.align 8
.LC17:
.long 27487791
.long 1062340028
.align 8
.LC18:
.long 0
.long 1080254464
.align 8
.LC19:
.long 1216334738
.long 1062043071
.align 8
.LC20:
.long 0
.long 1081073664
.section .rodata.cst4
.align 4
.LC21:
.long 1109131264
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999608.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Enter value of trade: \000"
.align 2
.LC1:
.ascii "%f\000"
.global __aeabi_fcmpgt
.global __aeabi_f2d
.global __aeabi_fcmplt
.global __aeabi_dmul
.global __aeabi_dadd
.global __aeabi_d2f
.align 2
.LC2:
.ascii "Commission is $%.2f\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC3:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L35
sub sp, sp, #12
ldr r1, .L35+4
mov r0, #1
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
bl __printf_chk
mov r1, sp
ldr r0, .L35+8
bl __isoc99_scanf
ldr fp, [sp] @ float
mov r1, #0
mov r0, fp
bl __aeabi_fcmpgt
cmp r0, #0
beq .L15
ldr r6, .L35+12
ldr r7, .L35+16
ldr r8, .L35+20
ldr r9, .L35+24
ldr r10, .L35+28
b .L2
.L33:
mov r0, r4
bl __aeabi_f2d
mov r2, r0
mov r3, r1
.L14:
ldr r1, .L35+32
mov r0, #1
bl __printf_chk
ldr r1, .L35+4
mov r0, #1
bl __printf_chk
mov r1, sp
ldr r0, .L35+8
bl __isoc99_scanf
ldr fp, [sp] @ float
mov r1, #0
mov r0, fp
bl __aeabi_fcmpgt
cmp r0, #0
beq .L15
.L2:
mov r0, fp
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r0, fp
mov r1, r6
bl __aeabi_fcmplt
cmp r0, #0
beq .L26
mov r0, r4
ldr r2, .L35+36
ldr r3, .L35+40
mov r1, r5
bl __aeabi_dmul
mov r2, #0
ldr r3, .L35+44
bl __aeabi_dadd
bl __aeabi_d2f
mov r4, r0
.L5:
mov r0, r4
ldr r1, .L35+48
bl __aeabi_fcmplt
cmp r0, #0
beq .L33
mov r2, #0
ldr r3, .L35+52
b .L14
.L26:
mov r1, r7
mov r0, fp
bl __aeabi_fcmplt
cmp r0, #0
beq .L27
mov r0, r4
ldr r2, .L35+56
ldr r3, .L35+60
mov r1, r5
bl __aeabi_dmul
mov r2, #0
ldr r3, .L35+64
bl __aeabi_dadd
bl __aeabi_d2f
mov r4, r0
b .L5
.L27:
mov r1, r8
mov r0, fp
bl __aeabi_fcmplt
cmp r0, #0
beq .L28
mov r0, r4
ldr r2, .L35+68
ldr r3, .L35+72
mov r1, r5
bl __aeabi_dmul
mov r2, #0
ldr r3, .L35+76
bl __aeabi_dadd
bl __aeabi_d2f
mov r4, r0
b .L5
.L28:
mov r1, r9
mov r0, fp
bl __aeabi_fcmplt
cmp r0, #0
beq .L29
mov r0, r4
ldr r2, .L35+80
ldr r3, .L35+84
mov r1, r5
bl __aeabi_dmul
mov r2, #0
ldr r3, .L35+88
bl __aeabi_dadd
bl __aeabi_d2f
mov r4, r0
b .L5
.L15:
ldr r3, .L35
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L34
mov r0, #0
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L29:
mov r0, fp
mov r1, r10
bl __aeabi_fcmplt
cmp r0, #0
beq .L30
mov r0, r4
ldr r2, .L35+80
ldr r3, .L35+92
mov r1, r5
bl __aeabi_dmul
mov r2, #0
ldr r3, .L35+96
bl __aeabi_dadd
bl __aeabi_d2f
mov r4, r0
b .L5
.L30:
mov r0, r4
ldr r2, .L35+100
ldr r3, .L35+104
mov r1, r5
bl __aeabi_dmul
mov r2, #0
ldr r3, .L35+108
bl __aeabi_dadd
bl __aeabi_d2f
mov r4, r0
b .L5
.L34:
bl __stack_chk_fail
.L36:
.align 2
.L35:
.word .LC3
.word .LC0
.word .LC1
.word 1159479296
.word 1170427904
.word 1184645120
.word 1195593728
.word 1223959552
.word .LC2
.word -1340029796
.word 1066494066
.word 1077805056
.word 1109131264
.word 1078165504
.word 41231686
.word 1065027738
.word 1078722560
.word 432932703
.word 1064032849
.word 1079181312
.word 27487791
.word 1063388604
.word 1079574528
.word 1062340028
.word 1080254464
.word 1216334738
.word 1062043071
.word 1081073664
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99961.c"
.intel_syntax noprefix
.text
.globl c
.section .rodata
.align 4
.type c, @object
.size c, 4
c:
.long 5
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99961.c"
.text
.global c
.section .rodata
.align 2
.type c, %object
.size c, 4
c:
.word 5
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "999620.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string ": illegal option -- "
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string ": option requires an argument -- "
.text
.p2align 4
.globl getopt
.type getopt, @function
getopt:
.LFB50:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov rbp, rsi
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 24
.cfi_def_cfa_offset 80
mov ebx, DWORD PTR sp.0[rip]
mov r14d, DWORD PTR optind[rip]
mov DWORD PTR 12[rsp], edi
mov rdi, rdx
cmp ebx, 1
je .L24
movsx rax, r14d
mov r15, QWORD PTR [rsi+rax*8]
.L5:
movsx r13, ebx
movsx r12d, BYTE PTR [r15+r13]
mov DWORD PTR optopt[rip], r12d
cmp r12d, 58
je .L6
mov esi, r12d
call strchr@PLT
test rax, rax
je .L6
cmp BYTE PTR 1[rax], 58
je .L25
add ebx, 1
mov DWORD PTR sp.0[rip], ebx
movsx rbx, ebx
cmp BYTE PTR [r15+rbx], 0
je .L26
.L14:
mov QWORD PTR optarg[rip], 0
.L1:
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 56
mov eax, r12d
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L26:
.cfi_restore_state
mov DWORD PTR sp.0[rip], 1
add r14d, 1
mov DWORD PTR optind[rip], r14d
jmp .L14
.p2align 4,,10
.p2align 3
.L24:
cmp DWORD PTR 12[rsp], r14d
jle .L17
movsx rax, r14d
mov r15, QWORD PTR [rsi+rax*8]
cmp BYTE PTR [r15], 45
jne .L17
cmp BYTE PTR 1[r15], 0
je .L17
cmp BYTE PTR 1[r15], 45
jne .L5
cmp BYTE PTR 2[r15], 0
jne .L5
add r14d, 1
mov r12d, -1
mov DWORD PTR optind[rip], r14d
jmp .L1
.p2align 4,,10
.p2align 3
.L25:
lea rdx, 1[r15+r13]
lea eax, 1[r14]
cmp BYTE PTR [rdx], 0
mov DWORD PTR optind[rip], eax
jne .L27
cmp DWORD PTR 12[rsp], eax
jle .L28
cdqe
add r14d, 2
mov rax, QWORD PTR 0[rbp+rax*8]
mov DWORD PTR optind[rip], r14d
mov QWORD PTR optarg[rip], rax
.L11:
mov DWORD PTR sp.0[rip], 1
jmp .L1
.p2align 4,,10
.p2align 3
.L6:
mov edx, DWORD PTR opterr[rip]
test edx, edx
jne .L29
.L8:
add ebx, 1
mov r12d, 63
mov DWORD PTR sp.0[rip], ebx
movsx rbx, ebx
cmp BYTE PTR [r15+rbx], 0
jne .L1
mov DWORD PTR sp.0[rip], 1
add r14d, 1
mov DWORD PTR optind[rip], r14d
jmp .L1
.p2align 4,,10
.p2align 3
.L27:
mov QWORD PTR optarg[rip], rdx
jmp .L11
.p2align 4,,10
.p2align 3
.L29:
mov rsi, QWORD PTR stderr[rip]
mov rdi, QWORD PTR 0[rbp]
call fputs@PLT
mov edx, 20
mov rcx, QWORD PTR stderr[rip]
mov esi, 1
lea rdi, .LC0[rip]
call fwrite@PLT
mov rsi, QWORD PTR stderr[rip]
mov edi, r12d
call fputc@PLT
mov rsi, QWORD PTR stderr[rip]
mov edi, 10
call fputc@PLT
movsx rax, DWORD PTR optind[rip]
mov ebx, DWORD PTR sp.0[rip]
mov r15, QWORD PTR 0[rbp+rax*8]
mov r14, rax
jmp .L8
.p2align 4,,10
.p2align 3
.L28:
mov eax, DWORD PTR opterr[rip]
test eax, eax
jne .L30
.L13:
mov DWORD PTR sp.0[rip], 1
mov r12d, 63
jmp .L1
.p2align 4,,10
.p2align 3
.L17:
mov r12d, -1
jmp .L1
.L30:
mov rdi, QWORD PTR 0[rbp]
mov rsi, QWORD PTR stderr[rip]
call fputs@PLT
mov edx, 33
mov rcx, QWORD PTR stderr[rip]
mov esi, 1
lea rdi, .LC1[rip]
call fwrite@PLT
mov rsi, QWORD PTR stderr[rip]
mov edi, r12d
call fputc@PLT
mov rsi, QWORD PTR stderr[rip]
mov edi, 10
call fputc@PLT
jmp .L13
.cfi_endproc
.LFE50:
.size getopt, .-getopt
.data
.align 4
.type sp.0, @object
.size sp.0, 4
sp.0:
.long 1
.globl optarg
.bss
.align 8
.type optarg, @object
.size optarg, 8
optarg:
.zero 8
.globl optopt
.align 4
.type optopt, @object
.size optopt, 4
optopt:
.zero 4
.globl optind
.data
.align 4
.type optind, @object
.size optind, 4
optind:
.long 1
.globl opterr
.align 4
.type opterr, @object
.size opterr, 4
opterr:
.long 1
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "999620.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii ": illegal option -- \000"
.align 2
.LC1:
.ascii ": option requires an argument -- \000"
.text
.align 2
.global getopt
.syntax unified
.arm
.fpu softvfp
.type getopt, %function
getopt:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
ldr r5, .L36
mov r9, r0
ldr r4, [r5]
ldr r8, [r5, #4]
cmp r4, #1
mov r7, r1
mov r0, r2
ldrne r10, [r1, r8, lsl #2]
beq .L30
.L5:
ldrb r6, [r10, r4] @ zero_extendqisi2
ldr r3, .L36+4
cmp r6, #58
str r6, [r3]
beq .L6
mov r1, r6
bl strchr
subs r3, r0, #0
beq .L6
ldrb r3, [r3, #1] @ zero_extendqisi2
add r4, r4, #1
cmp r3, #58
ldrb r3, [r10, r4] @ zero_extendqisi2
beq .L31
cmp r3, #0
moveq r3, #1
mov r2, #0
addeq r8, r8, r3
str r4, [r5]
stmeq r5, {r3, r8}
ldr r3, .L36+8
str r2, [r3]
.L1:
mov r0, r6
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L30:
cmp r9, r8
ble .L17
ldr r10, [r1, r8, lsl #2]
ldrb r3, [r10] @ zero_extendqisi2
cmp r3, #45
bne .L17
ldrb r3, [r10, #1] @ zero_extendqisi2
cmp r3, #0
beq .L17
cmp r3, #45
bne .L5
ldrb r3, [r10, #2] @ zero_extendqisi2
cmp r3, #0
addeq r8, r8, #1
mvneq r6, #0
streq r8, [r5, #4]
bne .L5
b .L1
.L31:
cmp r3, #0
add r4, r10, r4
add r3, r8, #1
bne .L32
cmp r9, r3
str r3, [r5, #4]
ble .L33
ldr r2, [r7, r3, lsl #2]
ldr r3, .L36+8
add r8, r8, #2
str r8, [r5, #4]
str r2, [r3]
.L11:
mov r3, #1
mov r0, r6
str r3, [r5]
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L6:
ldr r3, [r5, #8]
cmp r3, #0
bne .L34
.L8:
add r4, r4, #1
ldrb r3, [r10, r4] @ zero_extendqisi2
str r4, [r5]
cmp r3, #0
movne r6, #63
bne .L1
mov r3, #1
mov r6, #63
add r8, r8, r3
mov r0, r6
stm r5, {r3, r8}
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L32:
ldr r2, .L36+8
str r3, [r5, #4]
str r4, [r2]
b .L11
.L34:
ldr r4, .L36+12
ldr r0, [r7]
ldr r1, [r4]
bl fputs
ldr r3, [r4]
mov r2, #20
mov r1, #1
ldr r0, .L36+16
bl fwrite
ldr r1, [r4]
mov r0, r6
bl fputc
ldr r1, [r4]
mov r0, #10
bl fputc
ldm r5, {r4, r8}
ldr r10, [r7, r8, lsl #2]
b .L8
.L33:
ldr r3, [r5, #8]
cmp r3, #0
bne .L35
.L13:
mov r3, #1
mov r6, #63
str r3, [r5]
b .L1
.L17:
mvn r6, #0
b .L1
.L35:
ldr r4, .L36+12
ldr r0, [r7]
ldr r1, [r4]
bl fputs
mov r2, #33
ldr r3, [r4]
mov r1, #1
ldr r0, .L36+20
bl fwrite
ldr r1, [r4]
mov r0, r6
bl fputc
ldr r1, [r4]
mov r0, #10
bl fputc
b .L13
.L37:
.align 2
.L36:
.word .LANCHOR0
.word optopt
.word optarg
.word stderr
.word .LC0
.word .LC1
.size getopt, .-getopt
.comm optarg,4,4
.comm optopt,4,4
.global optind
.global opterr
.data
.align 2
.set .LANCHOR0,. + 0
.type sp.5679, %object
.size sp.5679, 4
sp.5679:
.word 1
.type optind, %object
.size optind, 4
optind:
.word 1
.type opterr, %object
.size opterr, 4
opterr:
.word 1
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
.file "99964.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "hello world "
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
lea rdi, .LC0[rip]
call puts@PLT
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
|
.arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "99964.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "hello world \000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r0, .L4
bl puts
mov r0, #0
pop {r4, pc}
.L5:
.align 2
.L4:
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
stack
|
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