Why is the Digital 0 not 0V in computer systems?

by Data2000   Last Updated September 11, 2019 10:25 AM


Apparently, back in the 80s, 5V was used as a 'high' and 1V was used to denote a 'low'. Nowadays, a 'high' is 0.75V and a 'low' is around 0.23V. He added that in the near future, we may shift to a system where 0.4V denotes a high, and 0.05V, a low.

He argued that these values are getting smaller so that we can reduce our power consumption. If that's the case, why do we take the trouble to set the 'low' to any positive voltage at all? Why don't we just set it to the true 0V (neutral from the power lines, I guess) voltage?

Answers 3

You are getting confused. Look at TTL for example: -

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Picture from here.

Andy aka
Andy aka
September 11, 2019 10:10 AM





September 11, 2019 10:14 AM

The mapping of logical values to voltages is arbitrary. It really depends on the technology you use. In the early 80's, TTL chips were commonly used, so 5V and 0V, defined '1' and '0'. Later on, CMOS technology adopted these levels for compatibility. In the early 90's, CMOS technology advanced enough to allow lower voltages and that progress continued to this day.

Now, consider this, Binary is only one mapping. There are multi level signaling technologies, where 0, 1, 2 and 3 are mapped to some voltage levels.

The actual limit depends on the semiconductor we use, and its band gap voltage. With silicon (and current doping), it is ~0.7V, below that, switching cannot happen.

Lior Bilia
Lior Bilia
September 11, 2019 10:16 AM

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