


More to the point, they have already shrunk to a size where every atom counts. Too few atoms can cause their insulation to break down, or allow current to leak to places it is not supposed to be because of a phenomenon called quantum tunnelling, in which electrons vanish spontaneously and reappear elsewhere. Too many atoms of the wrong sort, though, can be equally bad, interfering with a transistor's conductivity. Engineers are therefore endeavouring to redesign transistors yet again, so that Dr Moore's prediction can remain true a little longer.

Atom heart motherboard

A transistor is an electrically operated switch composed of four pieces: a source (where current enters), a drain (where it leaves), a channel (which links the two) and a gate (which opens and shuts the channel by varying in voltage). In a conventional transistor, these components lie in about the same plane. One idea for dealing with leaks is to change that by moving transistor design into three dimensions.

Building a transistor that sticks out of its parental chip lets many of its component atoms be deployed more usefully—particularly those that constitute the channel and the gate. By sticking the channel into the air and surrounding it on three sides with the atoms of the gate, you increase the surface area of the gate. That gives better control of the channel and reduces leaks. Having a better-functioning gate also lets more current flow when the transistor is on.

In May Intel, an American chip giant (co-founded, as it happens, by Dr Moore), announced plans to commercialise a technological fix of this sort under the marketing name “Tri-Gate”. The company reckons the new transistors, which should be available later this year, will consume half as much power as its existing offerings, making them particularly suitable for mobile computing, where battery life is an important selling point.

A universal change to three dimensions, though, will be difficult to sell to an industry that has grown up thinking in two. As an alternative the Silicon On Insulator (SOI) consortium, which includes Globalfoundries, an American firm, and ARM, a British one, is trying to improve flat transistors. The consortium's technology builds its transistors inside a sliver of pure silicon, laid on top of an insulator, which in turn sits on top of a standard wafer, the substrate on which transistors are constructed. The idea is to make the channel as thin as possible, allowing the electric field generated by the gate to penetrate the entire thing, thus improving the control that the gate is able to exert. But this approach also forces the consortium to tackle the second problem raised by the continual shrinkage of transistors: too many or too few atoms in the wrong places.

The silicon of which transistors are made is frequently doped with other elements, to affect its electrical properties. The latest devices, though, are so small that doping their channels involves placing just a handful of dopant atoms among the silicon. Get the number wrong, and things will not work properly. But fluctuations in the manufacturing process make the required consistency hard to achieve. Correctly doping the ultra-thin channels that the consortium hopes to use is simply too difficult—hence the decision to do without dopants altogether and build channels out of pure silicon. But the design requires that this silicon layer be no more than five nanometres (billionths of a metre) deep. That figure, moreover, must be almost constant across the entire wafer—an exacting standard which Intel (admittedly, not a dispassionate observer) believes will add to manufacturing costs.

SuVolta, a small company in Silicon Valley, has therefore come up with a third approach. It, too, plans to build flat transistors with undoped channels. But it will do so on conventional, cheap silicon wafers without the need for the modified wafers or ultra-thin channels required by the SOI consortium, a trick it accomplishes by adding a second gate beneath the channel. In concert, the two gates are able to control the undoped channel without its having to be ridiculously thin. Once again, the result is better-behaved transistors and reduced power consumption—as little as half that demanded by old-style transistors, says the firm, with no loss of performance. SuVolta has already piqued the interest of Fujitsu, a Japanese electronics giant, which has licensed the technology.

Room at the bottom

All these approaches mean that Moore's law should be able to chunter along for a few more years, at least. The International Technology Roadmap for Semiconductors, which is updated every year by a team of several hundred experts, predicts that standard transistors will be 16 nanometres across by 2013 (at the moment, 32 nanometres is the standard) and 11 nanometres by 2015. To go smaller than this, though, will require yet another conceptual leap. Fortunately, there are several on offer.

One promising approach was outlined last year by a team at the Tyndall National Institute in Ireland, led by Jean-Pierre Colinge. They published a paper announcing the creation of a junctionless transistor—an idea patented in 1925 by a physicist called Julius Lilienfeld, but which was, until recently, too difficult to manufacture.

The junctions in a transistor are between bits of silicon doped to conduct electrons (known as n-type material, because electrons are negatively charged), and p-type areas doped to conduct positively charged holes in the crystal lattice, which are places where electrons should be, but aren't. In some transistors, source and drain are p-type, and channel n-type. In others the reverse is true. The junctions between n- and p-type silicon act like valves, stopping current flowing in the wrong direction.

As transistors get smaller, however, laying down n-type and p-type materials in proximity gets harder, thanks once again to fluctuations in the concentrations of dopants. Dr Colinge's design—which, like Intel's Tri-Gate, clamps a 3D gate around a single, ultra-thin silicon wire—avoids this by building the entire device from a single type of semiconductor, with much higher dopant concentrations than a conventional flat transistor. The design incorporates a channel thin enough to become entirely devoid of carriers (ie, free electrons or holes) when switched off, thus acting as a valve, yet full of them when switched on. It should be shrinkable, too. The Tyndall Institute's researchers reported last year that atom-by-atom computer simulations of junctionless transistors with a gate length of just 3.1 nanometres show that they ought to work perfectly.

Such a gate length would keep Moore's law rolling for several years. To carry on beyond that, however, requires even more exotic thinking. A number of groups of academics and engineers, for example, are pondering how to make transistors in which quantum tunnelling is a feature rather than a bug. Quantum theory dictates that electrons are available only at certain energy levels, which means that a transistor which harnessed the tunnelling effect could switch directly from a low current (off) to a high current (on), with no ramp-up time.

That would be a neat trick. Whether it would be the last one up the engineers' sleeves, as the single-atom limit looms, remains to be seen. When he first promulgated it, Dr Moore thought his law might endure for ten years. The irresistible force of human ingenuity has ensured it has done far better than that. But that force is now up against the immovable object of atomic physics. It is a fascinating contest.