Image text transcribed for accessibility: Design a common - writter circuit with a small signal voltage gain of |Ar| = 50 while during a load RL = 10 k ohm, The source signal Vs = 0.02 emf tv and the source resistance is Rs = 2 k ohm. Bias the circuit at plusminus 10v, and the transistor with a maximum collector circuit 10m A and circuit gain in the range 80 beta 150.