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outputs synchronization

Dear Arnaud,

I use the FMC204 on ML605 using original BSP. I use it to output streams from memory. The problem that we encounter is that there is a random delay variations between the 4 outputs (on each power up). I assume that all DACs get the same clock. Can you detail the clocks that are used both in FPGA and on the card to pinpoint the area where synchronization might be missed?

Thank you

Shalom Dani,

The reference design does not take care of phase alignment of the DAC channels I assume this is the issue you are seeing. I would expect most of the phase incoherence to be related to the triggering.

Analysis of the source code would reveal that. Quite a few customers expect the four channels to be synchronous, "out of the box"

Best Regards,