#lang scheme/base

;; simulator


;; make debugging through simulation
;;   test units. (fine grain simulation)
;;   hardware while keeping the testing VIRTUAL (partial evaluation)

;; specification language, and a simulator generator that can
;; simulator.


;; Let's start with a basic architecture, which can then be extended
;; to perform more operations.


;; (define-io (name <inputs> <outputs>) <par-statements>)

'(define-io (add (A B) (D w n ov z c dc))
  (! (c D) (+ A B))
  (! z (zero? D))
  (! n  (ref D 3))
  (! dc (ref D 7))
  (! ov (xor c n)))

;; PIC18

'(register STATUS - - - N OV Z DC C)
'(register W)

;; convention: literals are lowercase, globals are uppercase.

  (addlw (k) "0000 1111 kkkk kkkk")
  (add (W k) (W N OV Z C DC)))

  ;; affects N, OV, C, DC, Z, W