1. Field of the Invention
The present invention relates to a manufacturing method of a semiconductor device, which forms semiconductor integrated circuit patterns by using charged particle beams.
2. Description of the Related Art
A lithography technology has been used for pattern formation of a semiconductor integrated circuit. In such a case, a light, an electron beam or the like is used as an energy beam to expose a photo-sensitive film. In photolithography using a light as an energy beam, in order to deal with microfabrication of a semiconductor device, a wavelength of a light source has been made shorter from a g line (436 nm) to an i line (365 nm), and to KrF (248 nm). This has been carried out because of the fact that resolution of a micro pattern is increased in inverse proportion to a wavelength. In the photolithography, resolution has accordingly been increased by a shorter wavelength. However, performance of a photolithography device has become insufficient for a pattern size required as device performance. Thus, further shortening of a wavelength of the light source has been pursued so as to increase resolution. However, not only light sources but also new lens materials and resists must be developed, necessitating enormous development costs. Consequently, device prices and process costs are increased, creating a problem of a high price of a manufactured semiconductor device.
On the other hand, electron beam lithography using an electron beam as an energy beam has an advantage of high resolution capability compared with the photolithography. In the case of a conventional electron beam lithography device, however, writing was carried out on a resist on a wafer by coating (direct writing) with a point (rectangular) beam or connecting a mask pattern of only several xcexcmxc3x97several xcexcm. In the case of the conventional electron beam, an electron source for obtaining high-density electron beams was not provided, and uniform electron beams were not provided in a wide range. Alternatively, aberration occurred between a center portion and a peripheral portion in the case of projecting an area of a large area. Consequently, resolution was deteriorated, making it impossible to project patterns of large areas all at once. Therefore, in a conventional electron beam writing method, since writing is carried out while connecting very small areas, many shots are necessary for writing on one wafer. In addition, since time is necessary until stabilization after an electron beam is deflected to a predetermined position for each shot, the increased number of shots causes a reduction in throughput. For such a reason, throughput has conventionally been low, about several pieces per hour (in 8-inch wafer), proving the method to be unsuitable as a mass-production technology.
As one of the measures to improve throughput of the electron beam lithography, for example as described in pp. 6897 to 6901, Japan Journal Applied Physics, vol., 39 (2000), electron projection lithography has been presented, which forms all patterns on a mask original plate (referred to as a reticle, hereinafter), and then projects/transfers the patterns by using electron beams. In this electron beam projection lithography, a lens was developed, which prevents aberration from being generated even when high-density electron means are provided uniformly in a wide range, and large-area irradiation is carried out. As in the case of the photolithography, the development of the lens enables the mask to be irradiated with electron beams, and scanned, greatly reducing the number of shots. Thus, the electron projection lithography is similar to the photolithography in terms of projection, its image being similar to a change of a light source from a light to an electron beam. Compared with several pieces/hour of the conventional electron beam lithography, throughput of one digit higher, i.e., 35 pieces/hour (in 8-inch wafer) is estimated.
A shape of the reticle for electron beam projection is descried in, for example pp.214 to 224 of Proceedings of SPIE vol. 3997 (2000). FIG. 2A is a bird""s eye view of a reticle for electron beam projection, FIG. 2B an expanded view of a area 203 of FIG. 2A, and FIG. 2C a view of the reticle seen from the above. The electron beam lithography has a limited projection range. Accordingly, circuit patterns constituting an LSI chip are divided at sizes 1000 xcexcmxe2x96xa1 on the reticle, and these circuit patterns are connected to form a pattern of the entire chip during projection. Hereinafter, one of such divided areas, i.e., a area on which the patterns are projected all at once, is referred to as a xe2x80x9csubfieldxe2x80x9d 201. A wafer, on which the circuit patterns are projected, is continuously moved, and each pattern projection is carried out by mechanically moving a reticle stage and deflecting electron beams corresponding to the wafer movement. A thickness of silicon (Si) of a pattern portion of the reticle is thin, 0.5 to 2 xcexcm, and consequently breaking easily occurs. Thus, a mechanical strength is increased by providing a silicon beam called a strut 202 between the subfields.
Now, a manufacturing flow of a reticle for electron beam projection is described by referring to FIGS. 3A to 3D. As shown in FIGS. 3A to 3D, a silicon-on-insulator (SOI) wafer having SiO2 buried in a Si substrate is used. The substrate has a thickness of about 400 to 800 xcexcm and, thereon, SiO2 is deposited by 0.1 to 0.5 xcexcm, and Si by 0.5 to 2 xcexcm. As methods of manufacturing a reticle for electron beam projection, there are available a preceding back etching method for carrying out back etching of the substrate before formation of a reticle pattern to manufacture the strut 202, and a succeeding back etching method for carrying out back etching of the substrate later. Here, the preceding back etching method is described. In the preceding method, first, a area of the strut 202 is subjected to patterning, and dry etching is carried out. According to the preceding back etching method, a reticle pattern is formed after blanks for a stencil mask are made. Thus, since blanks for a stencil mask can be made and stored, and only surface machining is needed thereafter, turn around time (TAT) can be shortened.
On the other hand, in the succeeding back etching method, patterning is carried out on a normal thick substrate. Accordingly, the number of special steps for manufacturing an EPL mask is relatively small. However, if mismatching is present in membrane stress between an oxide film of an intermediate layer and silicon on the surface by execution of etching of back-side Si, which makes TAT longer, mask deformation may occur, causing a shift in projection position. This positional shift is prevented by adding boron or the like to an oxide film on the surface to generate tensile stress on the substrate surface as well, and reducing stress between the oxide film and the substrate. Both methods have own features different from each other as described above, and the preceding back etching method enabling TAT to be shortened is considered to be more suitable. The oxide film is removed after the execution of the back etching. Accordingly, membrane blanks for the reticle for electron beam projection are made (FIG. 3B). Then, circuit patterns are divided into predetermined subfields, and a resist pattern 301 is formed on the reticle for electron beam projection by a resist process (FIG. 3C). A predetermined pattern is formed by further carrying out dry etching. Lastly, the reticle for electron beam projection is made by carrying out cleaning (FIG. 3D). As described herein, the reticle having an opening pattern for passing the energy beam is called a stencil type.
Representative features of the present invention can be summarized as follows.
In the case of using the electron projection lithography device, throughput can be greatly improved up to 35 pieces/hour compared with the electron beam direct writing method. Compared with the conventional photolithography, however, the throughput is lower, about xc2xd. In the case of the stencil-type reticle, since the opening pattern for passing the electron beam is provided, a xe2x80x9csquare-shapedxe2x80x9d pattern called a doughnut-type pattern cannot be included. This is because the inside of the xe2x80x9csquare-shapedxe2x80x9d portion is surrounded with the opening pattern, and thus no supports are present, causing it to fall. Therefore, to carry out pattern projection for one area, it was necessary to use a so-called complementary reticle for dividing patterns into two or more reticles, and executing electron beam projection for the same area by a plurality of times. In such a case, projection must be carried out twice for pattern projection of one area, and a reduction inevitably occurs in throughput. A current value of an electron beam must be increased in order to achieve high throughput. In such a case, repulsion between electron beams enlarges beam blur, lowering resolution. Accordingly, even if an electron projection lithography device that has been under development conventionally and now is used, it has been difficult to obtain throughput as high as that of the photolithography. Thus, there is a need to properly use the photolithography having high throughput, and the electron projection lithography having low throughput but high resolution. However, no effective proper using methods have been available.
In the electron projection lithography, it is necessary to properly use a complementary reticle having limited pattern constraints but low throughput, and a non-complementary reticle having many pattern constraints but high throughput. Thus far, however, no effective proper using methods have been presented. Therefore, objects of the present invention are to provide an effective method of properly using a photolithography device and an electron projection lithography device, and an effective method of properly using complementary and non-complementary reticles when electron projection lithography is used.
In the case of the reticle for electron beam projection, in a conventional reticle for cell-projection, a projection area is small, and a thickness of the reticle is about 10 xcexcm, thus providing a high mechanical strength. However, a thickness of a reticle for electron projection lithography is about 2 xcexcm or lower, which is very thin, and accordingly a mechanical strength is low. Further, since patterns are projected all at one on a large area of 1 mm or more, patterns having a large aspect ratio are formed in the opening pattern of the reticle. For example as shown in FIG. 20A, in a non-opening portion 2002 for scattering electron beams, openings 2001 for projecting patterns with electron beams non-scattered are densely formed at a large aspect ratio. Thus, a state before a cleaning step of the reticle was similar to that shown in FIG. 20A. After the cleaning step, however, as shown in FIG. 20B, surface tension of cleaning solution brought about bending 2003, chipping 2004, and adhesion of a foreign object caused by the chipping. Consequently, breaking or short-circuiting, and shifting in projection position occurred in a manufactured device circuit, creating a problem of impossible acquisition of initial performance.
The problems including the bending and the like have become conspicuous, because projection of patterns carried out all at once on the large area in the electron projection lithography device or the like has increased the aspect ratio of the transcribed patterns by 50 times or more, and a thickness of the stencil mask has become thin to 5 xcexcm or lower. Therefore, another object of the present invention is to provide a method of setting a beam interval, which prevents bending in a stencil mask.
A micro-beam provided for the purpose of preventing bending or the like can be made sufficiently thin to make projection of the patterns difficult. However, this may cause a problem such as narrowing, where the transcribed patterns become large or small in size locally at the micro-beam portion. Therefore, another object of the present invention is to suppress pattern deformation at a micro-beam portion by providing a forming place, a shape and a material of an optimal micro-beam, and a projection method.
As described above, throughput and resolution greatly varied depending on projection devices and methods, and required throughput and resolution were never satisfied simultaneously. Thus, regarding the two types of devices, i.e., photolithography having high throughput, and electron projection lithography having throughput low compared with that of the photolithography but still relatively high, and a high resolution capability, the present invention presents a projection device and a projection method capable of obtaining highest throughput while satisfying required accuracy and required resolution for each type and layer. The invention also presents a method of manufacturing a semiconductor device, which makes effective selection of two types of projection methods, i.e., non-complementary and complementary reticles, so as to obtain highest throughput while satisfying required accuracy and required resolution, when the electron projection lithography device is selected.
According to the invention, the electron projection lithography device is used at layers such as an isolation layer, a gate level, a contact hole layer, and a wiring layer just after the gate level, where pattern formation is difficult by the photolithography device. At other layers to be sufficiently processed even by the photolithography, the photolithography is used. In this way, pattern projection is carried out.
According to the invention, conditions for selecting the photolithography and the electron projection lithography are decided depending on an exposure wavelength of the photolithography device and numerical aperture of an exposure system.
According to the invention, for products small in number to be processed by one reticle or products with quick turnaround time, e.g., in small volume products or research developments, a variable-shaped electron writing system or a cell-projection electron beam writing system needing no manufacturing of reticles is used to directly write a pattern on a sample. Thus, it is possible to reduce mask manufacturing costs, and shorten mask manufacturing time.
According to the invention, the electron projection lithography by the complementary reticle is used at the wiring layer just after the gate level or at a layer having a high ratio of a transcribed pattern area in a chip. Accordingly, an opening area of a pattern can be reduced by complementary splitting at the layer having the high ratio of the transcribed pattern area. Thus, it is possible to improve resolution.
According to the invention, in order to increase a strength of a reticle for electron beam projection, if a short size of a non-opening pattern is Wnm, and a spacing with a non-opening pattern adjacent to the same is Snm, then a micro-beam formation interval Lnm is set equal to/lower than a predetermined interval so as to set 0 less than Lxe2x89xa6(S+Wxe2x88x9250)xc3x9750. However, each size is represented by nano meters.
According to the invention, in order to increase a strength of a reticle for electron beam projection, a micro-beam forming place is set at an intersection portion between T-shaped opening patterns.
According to the invention, as a material of the micro-beam, a material having a low electron scattering coefficient compared with that of a material of a reticle non-opening area is used. Thus, charged particles scattered at the micro-beam are suppressed to prevent projection of the micro-beam.
According to the invention, in unit areas to be subjected to charged particle projection all at once, a width of a micro-beam in a unit area having a large opening area is set larger than that of a micro-beam in a unit area having a small opening area. Accordingly, a maximum micro-beam width can be set, which prevents projection in each unit area. Thus, mask manufacturing can be facilitated, and a mechanical strength of the mask can be increased.
According to the invention, even in the same unit area, a width of a micro-beam at a place of a large opening pattern width is set larger than that of a micro-beam at a place of a small opening pattern width. Accordingly, a maximum micro-beam width can be set, which prevents projection, according to each pattern. Thus, mask manufacturing can be facilitated, and a mechanical strength of the mask can be increased.
According to the invention, in order to prevent approaching between the micro-beam and a pattern edge, an area having a distance between the micro-beam and a non-opening pattern parallel to the micro-beam set less than 10 times of a width of the micro-beam is set as a micro-beam formation limiting area, and a position of the micro-beam is shifted so as to set the distance larger by 10 times or more than a width of the micro-beam. Thus, projection of micro-beam patterns caused by dense disposition of micro-beams can be suppressed.
According to the invention, an area within a predetermined range, particularly an area requiring high pattern size accuracy, e.g., a gate pattern portion on an active area, is set as a micro-beam formation limiting area. Thus, it is possible to prevent pattern failures caused by micro-beams within the predetermined range.
According to the invention, the micro-beam is disposed obliquely to a chip arraying direction, especially +45xc2x0 or xe2x88x9245xc2x0 to the chip arraying direction. Thus, a size changing amount at the micro-beam can be halved.
According to the invention, a first round of projection is carried out by using a mask including a micro-beam having a non-opening area connected, and an opening pattern width shortened by a predetermined amount in a direction orthogonal to the micro-beam. A second round of projection is carried out by using the mask, and shifting a projection position in a direction orthogonal to an arraying direction of the micro-beam. Thus, it is possible to suppress formation of patterns of micro-beams on the semiconductor substrate.
According to the invention, double exposure is carried out in a direction orthogonal to the micro-beam, and by using a reticle having an opening pattern width shortened by a predetermined amount in the same direction as a shifting direction. Thus, it is possible to suppress an increase in pattern size caused by the double exposure with positional shifting.
According to the invention, as a method of carrying out the double exposure, shifting exposure is carried out by a deflector. Thus, it is possible to carry out the double exposure at a high speed.
According to the invention, double exposure for suppressing projection of the micro-beam can be carried out by undulating a relative relation between an area to be projected by charged particles all at once, and the semiconductor device. Accordingly, it is possible to separately control projection position deflection and undulation for shifting exposure, achieving a simpler device configuration.
According to the invention, a reticle having a larger opening width of an opening pattern adjacent to the micro-beam is used. Thus, it is possible to suppress projection of a micro-beam pattern.