1. Field of the Invention
The present invention relates to a digital-to-analog converter which converts a quantized digital signal into an analog signal, and more specifically, to an improvement in a current addition type digital-to-analog converter which uses weighted resistors.
2. Description of the Related Art
FIG. 1 is a block diagram of a conventional current addition type 16-bit digital-to-analog converter which uses weighted resistors. A 16-bit digital signal consisting of a train of pulses, each being quantized data "1" or "0", is applied to an input terminal IN. The pulses of the digital signal are successively stored in a shift register 1 in accordance with a shift clock input to a clock terminal CLK1. The digital signal stored in the shift register 1 is input to a latch 2 in accordance with a latch pulse which is input to a clock terminal CLK2 after all the 16 bits are stored in the shift register 1. 16 output terminals D0-D15 of the latch 2 are connected, through respective resistors R0-R15, to an inverting input terminal of an operational amplifier 3, which functions as an adder.
The inverting input terminal of the operational amplifier 3 is coupled to an output terminal OUT thereof via a resistor R16, and a non-inverting input terminal thereof is grounded. The resistors R0-R16 each has a weighted resistance equal to a multiple of 2. More specifically, the following relationships are established: R16=2R15, R15=2R14, Rn=2Rn-1, ..., R1=2R0.
Assuming that voltages output via the output terminals D0-D15 of the latch 2 are V0-V15 in the above-mentioned structure, an output voltage Vout of the operational amplifier 3 is: EQU Vout=(V15/R15+V14/R14+...+Vn/Rn+...+V0/R0)R16
Thus, when output data via the output terminals D0-D15a are "0", zero volt is generated, and when the output data are "1", 1 volt is generated. Thus, the 16-bit digital signal which consists of 16 data pieces, each having "1" or "0", and which is input to the input terminal IN are completely converted into an analog signal.
For example, in a case where a 12-bit D/A converter is used so that it converts a 16-bit digital signal into an analog signal, it is necessary to omit any four bits of the 16 bits.
(1) Normally, in many cases, four low-order bits are omitted. In a case where the digital signal ranges equally from the strongest sound to the weakest sound, the low-order bits are omitted. In this case, if the original digital signal has no distortion, an analog signal converted from the 12-bit digital signal does not deteriorate greatly. However, weak sound components expressed by the omitted four low-order bits are lost.
(2) If there is no strong sound, four high-order bits are omitted. When weak sound components are meaningful, and strong sound components are not significant (or does not appear frequently), the four high-order bits are omitted.
(3) Some high-order bits and some low-order bits are omitted. This method is intermediate between the above-mentioned methods (1) and (2) and suitable for cases where strong and weak sound components must be handled. It should be noted that none of the above-mentioned methods (1), (2) and (3) provide a dynamic range equal to or higher than 72 dB. Further, in each of the methods (1), (2) and (3), the input has information equal to 16 bits (92 dB), while each conventional method utilizes only 12 bits (72 dB).
In the aforementioned circuit configuration, the precision of the resistance values of the resistors R0-R15 which serve as an input resistor of the operational amplifier 3 directly determines the converting precision of the digital-to-analog converter.
In the 16-bit digital-to-analog converter, the resistance ratio of the resistor R16 to the resistor R0 is equal to 2.sup.16 (=65536). Assuming that the resistor R0 is selected to have a resistance equal to 10 k.OMEGA., the resistor R16 must have a resistance of 655.36 M.OMEGA.. It is difficult to realize such a high resistance by a highly precise resistor.
When the aforementioned digital-to-analog converter is formed on a single LSI chip, it is necessary to form large resistor cells in order to secure the required resistance precision. This leads to an increase in the chip size.
In order to overcome the problems as described above, a circuit is known which does not utilize a plurality of high-order and low-order bits. However, since predetermined high-order and low-order bits are always omitted, an output waveform may deteriorate greatly when input data mainly includes strong sound components or weak sound components.