The present invention generally relates to an interface for direct data transfers and, in particular, relates to such an interface for effecting direct data transfers between an intelligent switch and a microcomputer.
The direct data transfer from the random-access-memory (RAM) of one microcomputer to the RAM of another microcomputer is known. Characteristically, such transfers are effected by means of known handshake signal techniques. Basically, the initiating microcomputer accesses the other to request control of the other microcomputers local bus. When the accessed microcomputer yields control of its local bus, the initiating microcomputer, now controlling the local buses of both devices proceeds to read or write to the accessed RAM and, when the data transfer is complete, signals the completion of the transfer. The accessed device then regains control of its local bus.
Usually, such data transfers are executed to effect the transfer of large amounts of data. The direct data transfer, also referred to as "direct memory access" (DMA) results in a substantial savings of computing time compared to, for example, a first-in-first-out data transfer.
However, also characteristically, the accessed microcomputer, after religuishing its local bus, can only service the accessing microcomputer. For example, if a read is being performed on the accessed device, the accessed device must wait until the completion of that process before executing a read or write itself or participating in a data transfer with another device. It is for this reason that DMA transfers are conventionally restricted to large data transfers.
Further, when accessed, a device provides one address to the accessing device. This address represents a single starting address which the accessing device uses as a starting address from which it will read or to which it will write. That is, only a single starting address is generated by an accessed device for the transfer of substantial blocks of data. Hence, the transfer of a complete block of data must be completed before another starting address is supplied, i.e., before the device can be accessed again.
Still another characteristic of conventional DMA transfers is the requirement that the RAM of the accessing microcomputer must be linked, literally, directly, i.e., without intermediate storage devices, to the RAM of the accessed device. But for this characteristic, the use of DMA transfers would become disadvantageous due to the added read/write steps necessary to carry data through any storage medium.
These characteristics, however, place severe constraints on many potential implementations of such a technique. Hence, the direct transfer of data between a microcomputer and devices such as, for example, an intelligent switch, has, heretofore, been impractical.