This invention is concerned generally with digital information storage devices, and particularly with random access memories (RAM's) in which logic "1" or "0" bits are represented by charge stored in an array of individual memory cells. In prior art RAM's, each cell typically includes an MOS capacitor as a storage element and a transistor to gate the storage capacitor to an input-output (I-O) line, commonly referred to as a "bit-line". The memory cells are configured in an x-y (two-dimensional) array in which the storage capacitors of the elements in any column are all connected in parallel to the same bit-line, while the gates of all transistors of the memory elements of any row are connected in parallel to a "word-line". To access any particular memory element in the x-y array, the word-line corresponding to the desired row is brought high, permitting charge from the storage capacitors of each element in that row to pass through the gating transistor of that element and be shared with the associated bit-line. The resulting voltage swing of each bit-line is detected by a sense amplifier associated with that bit-line. A reading of the particular sense amplifier corresponding to the desired column gives an indication of the logic state of the selected memory cell.
The operation described above is a "destructive read" in that the charge stored in all of the memory cells of the selected row has now been lost. Thus, the data in the sense amplifiers must be rewritten back into these memory cells to restore each memory element to its original state. This "rewrite" operation, as well as the memory "write" operation itself is accomplished as follows: the sense amplifier for each column drives the associated bit-line to a "high" or "low" state which concomitantly charges the storage capacitor of the cells whose word lines are high.
In RAM's of the type discussed above the use of one sense amplifier for each bit-line is required to "read" the state of the memory cells, to restore the memory elements to their original state after the "read" operation and to "write" into the memory cells generally. However, the use of large numbers of sense amplifiers results in excessive power dissipation requirements for the semi conductor chip on which the memory is fabricated. This problem has become more severe as technology has made possible the fabrication of larger RAM's on smaller chips.