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| <title>NeuralFuse: Learning to Recover the Accuracy of Access-Limited Neural Network Inference in Low-Voltage Regimes</title> | |
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| <h1 class="title is-1 publication-title">✨NeuralFuse✨</h1> | |
| <h1 class="title publication-subtitle">Learning to Recover the Accuracy of Access-Limited Neural Network Inference in Low-Voltage Regimes</h1> | |
| <div class="is-size-5 publication-authors"> | |
| <span class="author-block"> | |
| <a href="https://scholar.google.com/citations?user=g2MolmMAAAAJ&hl=en" target="_blank">Hao-Lun Sun</a><sup>1</sup>,</span> | |
| <span class="author-block"> | |
| <a href="https://hsiung.cc" target="_blank">Lei Hsiung</a><sup>2</sup>,</span> | |
| <span class="author-block"> | |
| <a href="https://scholar.google.com/citations?user=qurg568AAAAJ&hl=en" target="_blank">Nandhini Chandramoorthy</a><sup>3</sup>, | |
| </span> | |
| <span class="author-block"> | |
| <a href="https://sites.google.com/site/pinyuchenpage/home" target="_blank">Pin-Yu Chen</a><sup>3</sup>, | |
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| <span class="author-block"> | |
| <a href="https://tsungyiho.github.io" target="_blank">Tsung-Yi Ho</a><sup>4</sup>, | |
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| <div class="is-size-5 publication-authors"> | |
| <span class="author-block"><sup>1</sup>National Tsing Hua University</span> | |
| <span class="author-block"><sup>2</sup>Dartmouth College</span> | |
| <span class="author-block"><sup>3</sup>IBM Research</span> | |
| <span class="author-block"><sup>4</sup>CUHK</span> | |
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| <a href="https://arxiv.org/abs/2306.16869" target="_blank" | |
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| <span>arXiv</span> | |
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| <h2 class="subtitle has-text-centered"> | |
| The pipeline of the <span class="small_caps">NeuralFuse</span> framework at inference. | |
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| <h2 class="title is-3">Abstract</h2> | |
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| Deep neural networks (DNNs) have become ubiquitous in machine learning, but their energy consumption remains problematically high. An effective strategy for reducing such consumption is supply-voltage reduction, but if done too aggressively, it can lead to accuracy degradation. This is due to random bit-flips in static random access memory (SRAM), where model parameters are stored. | |
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| <p> | |
| To address this challenge, we have developed <span class="small_caps">NeuralFuse</span>, a novel add-on module that handles the energy-accuracy tradeoff in low-voltage regimes by learning input transformations and using them to generate error-resistant data representations, thereby protecting DNN accuracy in both nominal and low-voltage scenarios. As well as being easy to implement, NeuralFuse can be readily applied to DNNs with limited access, such cloud-based APIs that are accessed remotely or non-configurable hardware. Our experimental results demonstrate that, at a 1% bit-error rate, NeuralFuse can reduce SRAM access energy by up to 24% while recovering accuracy by up to 57%. To the best of our knowledge, this is the first approach to addressing low-voltage-induced bit errors that requires no model retraining. | |
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| <h2 class="title is-3">Our Contributions</h2> | |
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| <p><span class="contribution-subtitle">Boosts DNN Accuracy Under Low Power</span> | |
| <span class="small_caps">NeuralFuse</span> improves the accuracy of deep neural networks (DNNs) operating in low-power environments with random bit errors, without needing to retrain the models. | |
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| <p><span class="contribution-subtitle">Protects DNN Accuracy Under Unstable Power</span> | |
| <span class="small_caps">NeuralFuse</span> improves the accuracy of deep neural networks (DNNs) operating in low-power environments with random bit errors, without needing to retrain the models. | |
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| <p><span class="contribution-subtitle">Adapts to Limited-Access Settings</span> | |
| <span class="small_caps">NeuralFuse</span> supports deployment in scenarios with limited access to model details, using flexible training methods to adapt effectively across diverse DNN architectures. | |
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| <p><span class="contribution-subtitle">Reduces Energy Use with Proven Performance</span> | |
| <span class="small_caps">NeuralFuse</span> recovers up to 57% of lost accuracy and reduces memory access energy by up to 24%, tested across diverse models (ResNet18, ResNet50, VGG11, VGG16, and VGG19) and datasets (CIFAR-10, CIFAR-100, GTSRB, and ImageNet-10). | |
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| <h2 class="title is-3">NeuralFuse Performance</h2> | |
| <h3 class="title is-4">Energy/Accuracy Tradeoff</h3> | |
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| <p> | |
| On the same base model (ResNet18), we illustrate the energy/accuracy tradeoff of six NeuralFuse implementations. | |
| The x-axis represents the percentage reduction in dynamic-memory access energy at low-voltage settings (base model protected by NeuralFuse), as compared to the bit-error-free (nominal) voltage. The y-axis represents the perturbed accuracy (evaluated at low voltage) with a 1% bit-error rate. | |
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| <img id="performance" src="./static/images/performance.png" | |
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| alt="NeuralFuse Performance"/> | |
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| <section class="section" id="BibTeX"> | |
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| <h2 class="title">BibTeX</h2> | |
| <pre><code>@inproceedings{sun2024neuralfuse, | |
| title={{NeuralFuse: Learning to Recover the Accuracy of Access-Limited Neural Network Inference in Low-Voltage Regimes}}, | |
| author={Hao-Lun Sun and Lei Hsiung and Nandhini Chandramoorthy and Pin-Yu Chen and Tsung-Yi Ho}, | |
| booktitle = {Advances in Neural Information Processing Systems}, | |
| publisher = {Curran Associates, Inc.}, | |
| volume = {37}, | |
| year = {2024} | |
| }</code></pre> | |
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