zmtarzmMachineFunctionInfo *zmtarzmFI = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * zmtarzmFI = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


VaArgOffset = CCInfo . getNextStackOffset ( ) ;


VarArgsSaveSize = XLenInBytes * (ArgRegs.size() - Idx);

VarArgsSaveSize = XLenInBytes * ( ArgRegs . size ( ) - Idx ) ;


int FI = MFI.CreateFixedObject(XLenInBytes, VaArgOffset, true);

int FI = MFI . CreateFixedObject ( XLenInBytes , VaArgOffset , true ) ;


zmtarzmFI -> setVarArgsFrameIndex ( FI ) ;


for (unsigned i = Idx; i < ArgRegs.size(); ++i, VaArgOffset += XLenInBytes) {

for ( unsigned i = Idx ; i < ArgRegs . size ( ) ; ++ i , VaArgOffset += XLenInBytes ) {


const Register Reg = RegInfo.createVirtualRegister(RC);

const Register Reg = RegInfo . createVirtualRegister ( RC ) ;


RegInfo . addLiveIn ( ArgRegs [ i ] , Reg ) ;


SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, XLenVT);

SDValue ArgValue = DAG . getCopyFromReg ( Chain , DL , Reg , XLenVT ) ;


FI = MFI.CreateFixedObject(XLenInBytes, VaArgOffset, true);

FI = MFI . CreateFixedObject ( XLenInBytes , VaArgOffset , true ) ;


SDValue PtrOff = DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout()));

SDValue PtrOff = DAG . getFrameIndex ( FI , getPointerTy ( DAG . getDataLayout ( ) ) ) ;


SDValue Store = DAG.getStore(Chain, DL, ArgValue, PtrOff, MachinePointerInfo::getFixedStack(MF, FI));

SDValue Store = DAG . getStore ( Chain , DL , ArgValue , PtrOff , MachinePointerInfo :: getFixedStack ( MF , FI ) ) ;


cast < StoreSDNode > ( Store . getNode ( ) ) -> getMemOperand ( ) -> setValue ( ( Value * ) nullptr ) ;


zmtarzmFI -> setVarArgsSaveSize ( VarArgsSaveSize ) ;


Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, OutChains);

Chain = DAG . getNode ( ISD :: TokenFactor , DL , MVT :: Other , OutChains ) ;


unsigned ArgOffset = ArgLocs.size() * 8;

unsigned ArgOffset = ArgLocs . size ( ) * 8 ;


zmtarzmMachineFunctionInfo *FuncInfo = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * FuncInfo = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


FuncInfo -> setVarArgsFrameOffset ( ArgOffset + ArgsBaseOffset ) ;


SDValue zmtarzmTargetLowering::LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const {

SDValue zmtarzmTargetLowering :: LowerFormalArguments ( SDValue Chain , CallingConv :: ID CallConv , bool IsVarArg , const SmallVectorImpl < ISD :: InputArg > & Ins , const SDLoc & DL , SelectionDAG & DAG , SmallVectorImpl < SDValue > & InVals ) const {


if ( CallCConv != CallingConv :: Fast ) {


report_fatal_error
(
"Unsupported calling convention"
)
;


LLVM_DEBUG(dbgs() << "ISelDAG: Lowering formal arguments\n");

LLVM_DEBUG
(
dbgs
(
)
<<
"ISelDAG: Lowering formal arguments\n"
)
;


LLVM_DEBUG(dbgs() << "ISelDAG: Can't lower variadic arguments\n");


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


MachineFrameInfo &MFI = MF.getFrameInfo();

MachineFrameInfo & MFI = MF . getFrameInfo ( ) ;


MachineRegisterInfo &MRI = MF.getRegInfo();

MachineRegisterInfo & MRI = MF . getRegInfo ( ) ;


SmallVector < CCValAssign , 16 > ArgLocs ;


CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());

CCState CCInfo ( CallConv , IsVarArg , MF , ArgLocs , * DAG . getContext ( ) ) ;


CCInfo . AnalyzeFormalArguments ( Ins , CCAssignFnForCall ( CallConv , IsVarArg ) ) ;


CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, *DAG.getContext());

CCState CCInfo ( CallConv , IsVarArg , DAG . getMachineFunction ( ) , ArgLocs , * DAG . getContext ( ) ) ;


CCInfo . AllocateStack ( ArgsPreserved , Align ( 8 ) ) ;


CCInfo . AnalyzeFormalArguments ( Ins , CC_zmtarzm ) ;


CCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext());

CCState CCInfo ( CallConv , isVarArg , MF , ArgLocs , * DAG . getContext ( ) ) ;


CCInfo . AnalyzeFormalArguments ( Ins , CCAssignFnForCall ( CallConv , isVarArg ) ) ;


Chain = DAG.getNode(zmtarzmISD::ENTRY_FLAG, DL, MVT::Other, {Chain, DAG.getRegister(zmtarzm::a1, MVT::i32), DAG.getTargetConstant(4, DL, MVT::i32)});

Chain = DAG . getNode ( zmtarzmISD :: ENTRY_FLAG , DL , MVT :: Other , { Chain , DAG . getRegister ( zmtarzm :: a1 , MVT :: i32 ) , DAG . getTargetConstant ( 4 , DL , MVT :: i32 ) } ) ;


CCInfo . AnalyzeFormalArguments ( Ins , getCCAssignFn ( CallConv ) ) ;


FuncInfo -> setVarArgsFrameIndex ( MFI . CreateFixedObject ( 1 , CCInfo . getNextStackOffset ( ) , true ) ) ;


for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {

for ( unsigned i = 0 , e = ArgLocs . size ( ) ; i != e ; ++ i ) {


bool IsF64Onzmtarzm = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64;

bool IsF64Onzmtarzm = VA . getLocVT ( ) == MVT :: i32 && VA . getValVT ( ) == MVT :: f64 ;


ArgValue = unpack64(DAG, Chain, VA, DL);

ArgValue = unpack64 ( DAG , Chain , VA , DL ) ;


ArgValue = unpackFromRegLoc(Subtarget, DAG, Chain, VA, DL);

ArgValue = unpackFromRegLoc ( Subtarget , DAG , Chain , VA , DL ) ;


ArgValue = unpackFromMemLoc(DAG, Chain, VA, DL);

ArgValue = unpackFromMemLoc ( DAG , Chain , VA , DL ) ;


unsigned VReg = MF.addLiveIn(VA.getLocReg(), getRegClassFor(VA.getLocVT()));

unsigned VReg = MF . addLiveIn ( VA . getLocReg ( ) , getRegClassFor ( VA . getLocVT ( ) ) ) ;


SDValue Arg = DAG.getCopyFromReg(Chain, DL, VReg, VA.getLocVT());

SDValue Arg = DAG . getCopyFromReg ( Chain , DL , VReg , VA . getLocVT ( ) ) ;


if ( VA . getValVT ( ) == MVT :: i32 ) {


Arg = DAG.getNode(ISD::SRL, DL, VA.getLocVT(), Arg, DAG.getConstant(32, DL, MVT::i32));

Arg = DAG . getNode ( ISD :: SRL , DL , VA . getLocVT ( ) , Arg , DAG . getConstant ( 32 , DL , MVT :: i32 ) ) ;


if (VA.getLocInfo() == CCValAssign::SExt) {

if ( VA . getLocInfo ( ) == CCValAssign :: SExt ) {


Arg = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Arg, DAG.getValueType(VA.getValVT()));

Arg = DAG . getNode ( ISD :: AssertSext , DL , VA . getLocVT ( ) , Arg , DAG . getValueType ( VA . getValVT ( ) ) ) ;


if (VA.getLocInfo() == CCValAssign::ZExt) {

if ( VA . getLocInfo ( ) == CCValAssign :: ZExt ) {


Arg = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Arg, DAG.getValueType(VA.getValVT()));

Arg = DAG . getNode ( ISD :: AssertZext , DL , VA . getLocVT ( ) , Arg , DAG . getValueType ( VA . getValVT ( ) ) ) ;


Arg = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Arg);

Arg = DAG . getNode ( ISD :: TRUNCATE , DL , VA . getValVT ( ) , Arg ) ;


unsigned Offset = VA.getLocMemOffset() + ArgsBaseOffset;

unsigned Offset = VA . getLocMemOffset ( ) + ArgsBaseOffset ;


unsigned ValSize = VA.getValVT().getSizeInBits() / 8;

unsigned ValSize = VA . getValVT ( ) . getSizeInBits ( ) / 8 ;


int FI = MF.getFrameInfo().CreateFixedObject(ValSize, Offset, true);

int FI = MF . getFrameInfo ( ) . CreateFixedObject ( ValSize , Offset , true ) ;


InVals.push_back(DAG.getLoad(VA.getValVT(), DL, Chain, DAG.getFrameIndex(FI, getPointerTy(MF.getDataLayout())),  MachinePointerInfo::getFixedStack(MF, FI)));

InVals . push_back ( DAG . getLoad ( VA . getValVT ( ) , DL , Chain , DAG . getFrameIndex ( FI , getPointerTy ( MF . getDataLayout ( ) ) ) , MachinePointerInfo :: getFixedStack ( MF , FI ) ) ) ;


unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);

unsigned Reg = MF . addLiveIn ( VA . getLocReg ( ) , RC ) ;


SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, RegVT);

SDValue ArgValue = DAG . getCopyFromReg ( Chain , DL , Reg , RegVT ) ;


if (VA.getLocInfo() == CCValAssign::Full) {

if ( VA . getLocInfo ( ) == CCValAssign :: Full ) {


if (VA.getLocInfo() == CCValAssign::BCvt) {

if ( VA . getLocInfo ( ) == CCValAssign :: BCvt ) {


ArgValue = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), ArgValue);

ArgValue = DAG . getNode ( ISD :: BITCAST , DL , VA . getValVT ( ) , ArgValue ) ;


SDValue Val = DAG.getLoad(VA.getLocInfo() == CCValAssign::AExt ? VA.getValVT() : VA.getLocVT(), DL, Chain, DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout())), MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), FI));

SDValue Val = DAG . getLoad ( VA . getLocInfo ( ) == CCValAssign :: AExt ? VA . getValVT ( ) : VA . getLocVT ( ) , DL , Chain , DAG . getFrameIndex ( FI , getPointerTy ( DAG . getDataLayout ( ) ) ) , MachinePointerInfo :: getFixedStack ( DAG . getMachineFunction ( ) , FI ) ) ;


Val = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Val, DAG.getValueType(VA.getValVT()));

Val = DAG . getNode ( ISD :: AssertZext , DL , VA . getLocVT ( ) , Val , DAG . getValueType ( VA . getValVT ( ) ) ) ;


Val = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Val, DAG.getValueType(VA.getValVT()));

Val = DAG . getNode ( ISD :: AssertSext , DL , VA . getLocVT ( ) , Val , DAG . getValueType ( VA . getValVT ( ) ) ) ;


InVals.push_back(DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Val));

InVals . push_back ( DAG . getNode ( ISD :: TRUNCATE , DL , VA . getValVT ( ) , Val ) ) ;


ArrayRef<MCPhysReg> ArgRegs = makeArrayRef(GPRArgRegs);

ArrayRef < MCPhysReg > ArgRegs = makeArrayRef ( GPRArgRegs ) ;


unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs);

unsigned Idx = CCInfo . getFirstUnallocated ( ArgRegs ) ;


const TargetRegisterClass *RC = &zmtarzm::GPRRegClass;

const TargetRegisterClass * RC = & zmtarzm :: GPRRegClass ;


MachineFrameInfo &MFI = MF.getFrameInfo();

MachineFrameInfo & MFI = MF . getFrameInfo ( ) ;


MachineRegisterInfo &RegInfo = MF.getRegInfo();

MachineRegisterInfo & RegInfo = MF . getRegInfo ( ) ;


zmtarzmMachineFunctionInfo *zmtarzmFI = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * zmtarzmFI = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


VaArgOffset = CCInfo . getNextStackOffset ( ) ;


VarArgsSaveSize = XLenInBytes * (ArgRegs.size() - Idx);

VarArgsSaveSize = XLenInBytes * ( ArgRegs . size ( ) - Idx ) ;


int FI = MFI.CreateFixedObject(XLenInBytes, VaArgOffset, true);

int FI = MFI . CreateFixedObject ( XLenInBytes , VaArgOffset , true ) ;


zmtarzmFI -> setVarArgsFrameIndex ( FI ) ;


for (unsigned i = Idx; i < ArgRegs.size(); ++i, VaArgOffset += XLenInBytes) {

for ( unsigned i = Idx ; i < ArgRegs . size ( ) ; ++ i , VaArgOffset += XLenInBytes ) {


const Register Reg = RegInfo.createVirtualRegister(RC);

const Register Reg = RegInfo . createVirtualRegister ( RC ) ;


RegInfo . addLiveIn ( ArgRegs [ i ] , Reg ) ;


SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, XLenVT);

SDValue ArgValue = DAG . getCopyFromReg ( Chain , DL , Reg , XLenVT ) ;


FI = MFI.CreateFixedObject(XLenInBytes, VaArgOffset, true);

FI = MFI . CreateFixedObject ( XLenInBytes , VaArgOffset , true ) ;


SDValue PtrOff = DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout()));

SDValue PtrOff = DAG . getFrameIndex ( FI , getPointerTy ( DAG . getDataLayout ( ) ) ) ;


SDValue Store = DAG.getStore(Chain, DL, ArgValue, PtrOff, MachinePointerInfo::getFixedStack(MF, FI));

SDValue Store = DAG . getStore ( Chain , DL , ArgValue , PtrOff , MachinePointerInfo :: getFixedStack ( MF , FI ) ) ;


cast < StoreSDNode > ( Store . getNode ( ) ) -> getMemOperand ( ) -> setValue ( ( Value * ) nullptr ) ;


zmtarzmFI -> setVarArgsSaveSize ( VarArgsSaveSize ) ;


Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, OutChains);

Chain = DAG . getNode ( ISD :: TokenFactor , DL , MVT :: Other , OutChains ) ;


unsigned ArgOffset = ArgLocs.size() * 8;

unsigned ArgOffset = ArgLocs . size ( ) * 8 ;


zmtarzmMachineFunctionInfo *FuncInfo = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * FuncInfo = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


FuncInfo -> setVarArgsFrameOffset ( ArgOffset + ArgsBaseOffset ) ;


SDValue zmtarzmTargetLowering::lowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: lowerFRAMEADDR ( SDValue Op , SelectionDAG & DAG ) const {


const zmtarzmRegisterInfo &RI = *Subtarget.getRegisterInfo();

const zmtarzmRegisterInfo & RI = * Subtarget . getRegisterInfo ( ) ;


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


MachineFrameInfo &MFI = MF.getFrameInfo();

MachineFrameInfo & MFI = MF . getFrameInfo ( ) ;


Register FrameReg = RI.getFrameRegister(MF);

Register FrameReg = RI . getFrameRegister ( MF ) ;


SDValue FrameAddr = DAG.getCopyFromReg(DAG.getEntryNode(), DL, FrameReg, VT);

SDValue FrameAddr = DAG . getCopyFromReg ( DAG . getEntryNode ( ) , DL , FrameReg , VT ) ;


unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();

unsigned Depth = cast < ConstantSDNode > ( Op . getOperand ( 0 ) ) -> getZExtValue ( ) ;


SDValue Ptr = DAG.getNode(ISD::ADD, DL, VT, FrameAddr, DAG.getIntPtrConstant(Offset, DL));

SDValue Ptr = DAG . getNode ( ISD :: ADD , DL , VT , FrameAddr , DAG . getIntPtrConstant ( Offset , DL ) ) ;


FrameAddr = DAG.getLoad(VT, DL, DAG.getEntryNode(), Ptr, MachinePointerInfo());

FrameAddr = DAG . getLoad ( VT , DL , DAG . getEntryNode ( ) , Ptr , MachinePointerInfo ( ) ) ;


SDValue zmtarzmTargetLowering::lowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: lowerGlobalAddress ( SDValue Op , SelectionDAG & DAG ) const {


GlobalAddressSDNode *N = cast<GlobalAddressSDNode>(Op);

GlobalAddressSDNode * N = cast < GlobalAddressSDNode > ( Op ) ;


const GlobalValue * GV = N -> getGlobal ( ) ;


bool IsLocal = getTargetMachine().shouldAssumeDSOLocal(*GV->getParent(), GV);

bool IsLocal = getTargetMachine ( ) . shouldAssumeDSOLocal ( * GV -> getParent ( ) , GV ) ;


SDValue Addr = getAddr(N, DAG, IsLocal);

SDValue Addr = getAddr ( N , DAG , IsLocal ) ;


return DAG.getNode(ISD::ADD, DL, Ty, Addr, DAG.getConstant(Offset, DL, XLenVT));

return DAG . getNode ( ISD :: ADD , DL , Ty , Addr , DAG . getConstant ( Offset , DL , XLenVT ) ) ;


MVT XLenVT = getPointerTy ( DAG . getDataLayout ( ) ) ;

MVT XLenVT = getPointerTy(DAG.getDataLayout());


SDValue zmtarzmTargetLowering::lowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: lowerGlobalTLSAddress ( SDValue Op , SelectionDAG & DAG ) const {


if ( DAG . getTarget ( ) . useEmulatedTLS ( ) ) {


return LowerToTLSEmulatedModel ( Node , DAG ) ;


const GlobalValue *GV = Node->getGlobal();

const GlobalValue * GV = Node -> getGlobal ( ) ;


EVT PtrVT = getPointerTy(DAG.getDataLayout());

EVT PtrVT = getPointerTy ( DAG . getDataLayout ( ) ) ;


TLSModel::Model Model = getTargetMachine().getTLSModel(N->getGlobal());

TLSModel :: Model Model = getTargetMachine ( ) . getTLSModel ( N -> getGlobal ( ) ) ;


if (DAG.getMachineFunction().getFunction().getCallingConv() == CallingConv::GHC) {

if ( DAG . getMachineFunction ( ) . getFunction ( ) . getCallingConv ( ) == CallingConv :: GHC ) {


report_fatal_error("In GHC calling convention TLS is not supported");


SDValue TP = lowerThreadPointer(DL, DAG);

SDValue TP = lowerThreadPointer ( DL , DAG ) ;


Addr = DAG.getNode(ISD::ADD, DL, PtrVT, TP, Offset);

Addr = DAG . getNode ( ISD :: ADD , DL , PtrVT , TP , Offset ) ;


if ( Model == TLSModel :: GeneralDynamic ) {

if (Model == TLSModel::GeneralDynamic) {


zmtarzmConstantPoolValue *CPV = zmtarzmConstantPoolValue::Create(GV, zmtarzmCP::TLSGD);

zmtarzmConstantPoolValue * CPV = zmtarzmConstantPoolValue :: Create ( GV , zmtarzmCP :: TLSGD ) ;


Offset = DAG.getConstantPool(CPV, PtrVT, 8);

Offset = DAG . getConstantPool ( CPV , PtrVT , 8 ) ;


Offset = DAG.getLoad(PtrVT, DL, DAG.getEntryNode(), Offset, MachinePointerInfo::getConstantPool(DAG.getMachineFunction()));

Offset = DAG . getLoad ( PtrVT , DL , DAG . getEntryNode ( ) , Offset , MachinePointerInfo :: getConstantPool ( DAG . getMachineFunction ( ) ) ) ;


Offset = lowerTLSGetOffset(Node, DAG, zmtarzmISD::TLS_GDCALL, Offset);

Offset = lowerTLSGetOffset ( Node , DAG , zmtarzmISD :: TLS_GDCALL , Offset ) ;


Addr = getStaticTLSAddr(N, DAG,  false);

Addr = getStaticTLSAddr ( N , DAG , false ) ;

Addr = getStaticTLSAddr(N, DAG,  false);


if ( Model == TLSModel :: InitialExec ) {


zmtarzmConstantPoolValue *CPV = zmtarzmConstantPoolValue::Create(GV, zmtarzmCP::NTPOFF);

zmtarzmConstantPoolValue * CPV = zmtarzmConstantPoolValue :: Create ( GV , zmtarzmCP :: NTPOFF ) ;


Addr = getStaticTLSAddr ( N , DAG , true ) ;


if ( Model == TLSModel :: LocalDynamic ) {

if ( Model == TLSModel :: InitialExec ) {


Offset = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, zmtarzmII::MO_INDNTPOFF);

Offset = DAG . getTargetGlobalAddress ( GV , DL , PtrVT , 0 , zmtarzmII :: MO_INDNTPOFF ) ;


Offset = DAG.getNode(zmtarzmISD::PCREL_WRAPPER, DL, PtrVT, Offset);

Offset = DAG . getNode ( zmtarzmISD :: PCREL_WRAPPER , DL , PtrVT , Offset ) ;


Offset = DAG.getLoad(PtrVT, DL, DAG.getEntryNode(), Offset, MachinePointerInfo::getGOT(DAG.getMachineFunction()));

Offset = DAG . getLoad ( PtrVT , DL , DAG . getEntryNode ( ) , Offset , MachinePointerInfo :: getGOT ( DAG . getMachineFunction ( ) ) ) ;


if (Model == TLSModel::GeneralDynamic) {

if ( Model == TLSModel :: GeneralDynamic ) {

if ( Model == TLSModel :: LocalDynamic ) {


zmtarzmConstantPoolValue *CPV = zmtarzmConstantPoolValue::Create(GV, zmtarzmCP::TLSLDM);

zmtarzmConstantPoolValue * CPV = zmtarzmConstantPoolValue :: Create ( GV , zmtarzmCP :: TLSLDM ) ;


zmtarzmMachineFunctionInfo* MFI = DAG.getMachineFunction().getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * MFI = DAG . getMachineFunction ( ) . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


MFI -> incNumLocalDynamicTLSAccesses ( ) ;


CPV = zmtarzmConstantPoolValue::Create(GV, zmtarzmCP::DTPOFF);

CPV = zmtarzmConstantPoolValue :: Create ( GV , zmtarzmCP :: DTPOFF ) ;


SDValue DTPOffset = DAG.getConstantPool(CPV, PtrVT, 8);

SDValue DTPOffset = DAG . getConstantPool ( CPV , PtrVT , 8 ) ;


DTPOffset = DAG.getLoad(PtrVT, DL, DAG.getEntryNode(), DTPOffset, MachinePointerInfo::getConstantPool(DAG.getMachineFunction()));

DTPOffset = DAG . getLoad ( PtrVT , DL , DAG . getEntryNode ( ) , DTPOffset , MachinePointerInfo :: getConstantPool ( DAG . getMachineFunction ( ) ) ) ;


Offset = DAG.getNode(ISD::ADD, DL, PtrVT, Offset, DTPOffset);

Offset = DAG . getNode ( ISD :: ADD , DL , PtrVT , Offset , DTPOffset ) ;


return DAG.getNode(ISD::ADD, DL, Ty, Addr, DAG.getConstant(Offset, DL, XLenVT));

return DAG . getNode ( ISD :: ADD , DL , Ty , Addr , DAG . getConstant ( Offset , DL , XLenVT ) ) ;


SDValue zmtarzmTargetLowering::lowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: lowerGlobalTLSAddress ( SDValue Op , SelectionDAG & DAG ) const {


if ( DAG . getTarget ( ) . useEmulatedTLS ( ) ) {


return LowerToTLSEmulatedModel ( Node , DAG ) ;


const GlobalValue *GV = Node->getGlobal();

const GlobalValue * GV = Node -> getGlobal ( ) ;


EVT PtrVT = getPointerTy(DAG.getDataLayout());

EVT PtrVT = getPointerTy ( DAG . getDataLayout ( ) ) ;


GlobalAddressSDNode *N = cast<GlobalAddressSDNode>(Op);

GlobalAddressSDNode * N = cast < GlobalAddressSDNode > ( Op ) ;


TLSModel::Model Model = getTargetMachine().getTLSModel(N->getGlobal());

TLSModel :: Model Model = getTargetMachine ( ) . getTLSModel ( N -> getGlobal ( ) ) ;


if (DAG.getMachineFunction().getFunction().getCallingConv() == CallingConv::GHC) {

if ( DAG . getMachineFunction ( ) . getFunction ( ) . getCallingConv ( ) == CallingConv :: GHC ) {


SDValue TP = lowerThreadPointer(DL, DAG);

SDValue TP = lowerThreadPointer ( DL , DAG ) ;


Addr = DAG.getNode(ISD::ADD, DL, PtrVT, TP, Offset);

Addr = DAG . getNode ( ISD :: ADD , DL , PtrVT , TP , Offset ) ;


zmtarzmConstantPoolValue *CPV = zmtarzmConstantPoolValue::Create(GV, zmtarzmCP::TLSGD);

zmtarzmConstantPoolValue * CPV = zmtarzmConstantPoolValue :: Create ( GV , zmtarzmCP :: TLSGD ) ;


Offset = DAG.getConstantPool(CPV, PtrVT, 8);

Offset = DAG . getConstantPool ( CPV , PtrVT , 8 ) ;


Offset = DAG.getLoad(PtrVT, DL, DAG.getEntryNode(), Offset, MachinePointerInfo::getConstantPool(DAG.getMachineFunction()));

Offset = DAG . getLoad ( PtrVT , DL , DAG . getEntryNode ( ) , Offset , MachinePointerInfo :: getConstantPool ( DAG . getMachineFunction ( ) ) ) ;


Offset = lowerTLSGetOffset(Node, DAG, zmtarzmISD::TLS_GDCALL, Offset);

Offset = lowerTLSGetOffset ( Node , DAG , zmtarzmISD :: TLS_GDCALL , Offset ) ;


Addr = getStaticTLSAddr(N, DAG,  false);

Addr = getStaticTLSAddr ( N , DAG , false ) ;

Addr = getStaticTLSAddr(N, DAG,  false);


if ( Model == TLSModel :: InitialExec ) {


zmtarzmConstantPoolValue *CPV = zmtarzmConstantPoolValue::Create(GV, zmtarzmCP::NTPOFF);

zmtarzmConstantPoolValue * CPV = zmtarzmConstantPoolValue :: Create ( GV , zmtarzmCP :: NTPOFF ) ;


Addr = getStaticTLSAddr ( N , DAG , true ) ;


if ( Model == TLSModel :: LocalDynamic ) {


Offset = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, zmtarzmII::MO_INDNTPOFF);

Offset = DAG . getTargetGlobalAddress ( GV , DL , PtrVT , 0 , zmtarzmII :: MO_INDNTPOFF ) ;


Offset = DAG.getNode(zmtarzmISD::PCREL_WRAPPER, DL, PtrVT, Offset);

Offset = DAG . getNode ( zmtarzmISD :: PCREL_WRAPPER , DL , PtrVT , Offset ) ;


Offset = DAG.getLoad(PtrVT, DL, DAG.getEntryNode(), Offset, MachinePointerInfo::getGOT(DAG.getMachineFunction()));

Offset = DAG . getLoad ( PtrVT , DL , DAG . getEntryNode ( ) , Offset , MachinePointerInfo :: getGOT ( DAG . getMachineFunction ( ) ) ) ;


if (Model == TLSModel::GeneralDynamic) {

if ( Model == TLSModel :: GeneralDynamic ) {


zmtarzmConstantPoolValue *CPV = zmtarzmConstantPoolValue::Create(GV, zmtarzmCP::TLSLDM);

zmtarzmConstantPoolValue * CPV = zmtarzmConstantPoolValue :: Create ( GV , zmtarzmCP :: TLSLDM ) ;


zmtarzmMachineFunctionInfo* MFI = DAG.getMachineFunction().getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * MFI = DAG . getMachineFunction ( ) . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


MFI -> incNumLocalDynamicTLSAccesses ( ) ;


CPV = zmtarzmConstantPoolValue::Create(GV, zmtarzmCP::DTPOFF);

CPV = zmtarzmConstantPoolValue :: Create ( GV , zmtarzmCP :: DTPOFF ) ;


SDValue DTPOffset = DAG.getConstantPool(CPV, PtrVT, 8);

SDValue DTPOffset = DAG . getConstantPool ( CPV , PtrVT , 8 ) ;


DTPOffset = DAG.getLoad(PtrVT, DL, DAG.getEntryNode(), DTPOffset, MachinePointerInfo::getConstantPool(DAG.getMachineFunction()));

DTPOffset = DAG . getLoad ( PtrVT , DL , DAG . getEntryNode ( ) , DTPOffset , MachinePointerInfo :: getConstantPool ( DAG . getMachineFunction ( ) ) ) ;


Offset = DAG.getNode(ISD::ADD, DL, PtrVT, Offset, DTPOffset);

Offset = DAG . getNode ( ISD :: ADD , DL , PtrVT , Offset , DTPOffset ) ;


return DAG.getNode(ISD::ADD, DL, Ty, Addr, DAG.getConstant(Offset, DL, XLenVT));

return DAG . getNode ( ISD :: ADD , DL , Ty , Addr , DAG . getConstant ( Offset , DL , XLenVT ) ) ;


SDValue zmtarzmTargetLowering::lowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: lowerINSERT_VECTOR_ELT ( SDValue Op , SelectionDAG & DAG ) const {


assert
(
Op
.
getOpcode
(
)
==
ISD
::
INSERT_VECTOR_ELT
&&
"Unknown opcode!"
)
;

assert(Op.getOpcode() == ISD::INSERT_VECTOR_ELT && "Unknown opcode!");


ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(2));

ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op . getOperand ( 2 ) ) ;


EVT VT = Op.getOperand(0).getValueType();

EVT VT = Op . getOperand ( 0 ) . getValueType ( ) ;


ConstantSDNode *CI = dyn_cast<ConstantSDNode>(Op.getOperand(2));

ConstantSDNode * CI = dyn_cast < ConstantSDNode > ( Op . getOperand ( 2 ) ) ;


if (CI->getZExtValue() >= VT.getVectorNumElements()) {

if ( CI -> getZExtValue ( ) >= VT . getVectorNumElements ( ) ) {


SDValue Mtvsrz = DAG.getNode(PPCISD::MTVSRZ, dl, VT, V2);

SDValue Mtvsrz = DAG . getNode ( PPCISD :: MTVSRZ , dl , VT , V2 ) ;


unsigned BytesInEachElement = VT.getVectorElementType().getSizeInBits() / 8;

unsigned BytesInEachElement = VT . getVectorElementType ( ) . getSizeInBits ( ) / 8 ;


unsigned InsertAtElement = C->getZExtValue();

unsigned InsertAtElement = C -> getZExtValue ( ) ;


unsigned InsertAtByte = InsertAtElement * BytesInEachElement;

unsigned InsertAtByte = InsertAtElement * BytesInEachElement ;


InsertAtByte = (16 - BytesInEachElement) - InsertAtByte;

InsertAtByte = ( 16 - BytesInEachElement ) - InsertAtByte ;


SDValue WideVec = WidenVector(Op.getOperand(0), DAG);

SDValue WideVec = WidenVector ( Op . getOperand ( 0 ) , DAG ) ;


EVT WideTy = WideVec . getValueType ( ) ;


SDValue Node = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, WideTy, WideVec, Op.getOperand(1), Op.getOperand(2));

SDValue Node = DAG . getNode ( ISD :: INSERT_VECTOR_ELT , DL , WideTy , WideVec , Op . getOperand ( 1 ) , Op . getOperand ( 2 ) ) ;


SDValue Val = DAG.getNode(ISD::BITCAST, SL, MVT::i16, Op.getOperand(1));

SDValue Val = DAG . getNode ( ISD :: BITCAST , SL , MVT :: i16 , Op . getOperand ( 1 ) ) ;


SDValue ExtVal = DAG.getNode(ISD::ZERO_EXTEND, SL, MVT::i32, Val);

SDValue ExtVal = DAG . getNode ( ISD :: ZERO_EXTEND , SL , MVT :: i32 , Val ) ;


SDValue ScaledIdx = DAG.getNode(ISD::SHL, SL, MVT::i32, Idx, DAG.getConstant(16, SL, MVT::i32));

SDValue ScaledIdx = DAG . getNode ( ISD :: SHL , SL , MVT :: i32 , Idx , DAG . getConstant ( 16 , SL , MVT :: i32 ) ) ;


SDValue BCVec = DAG.getNode(ISD::BITCAST, SL, MVT::i32, Vec);

SDValue BCVec = DAG . getNode ( ISD :: BITCAST , SL , MVT :: i32 , Vec ) ;


SDValue BFM = DAG.getNode(ISD::SHL, SL, MVT::i32, DAG.getConstant(0xffff, SL, MVT::i32), ScaledIdx);

SDValue BFM = DAG . getNode ( ISD :: SHL , SL , MVT :: i32 , DAG . getConstant ( 0xffff , SL , MVT :: i32 ) , ScaledIdx ) ;


SDValue LHS = DAG.getNode(ISD::AND, SL, MVT::i32, BFM, ExtVal);

SDValue LHS = DAG . getNode ( ISD :: AND , SL , MVT :: i32 , BFM , ExtVal ) ;


SDValue RHS = DAG.getNode(ISD::AND, SL, MVT::i32, DAG.getNOT(SL, BFM, MVT::i32), BCVec);

SDValue RHS = DAG . getNode ( ISD :: AND , SL , MVT :: i32 , DAG . getNOT ( SL , BFM , MVT :: i32 ) , BCVec ) ;


SDValue BFI = DAG.getNode(ISD::OR, SL, MVT::i32, LHS, RHS);

SDValue BFI = DAG . getNode ( ISD :: OR , SL , MVT :: i32 , LHS , RHS ) ;


MVT IntVT = MVT::getIntegerVT(VT.getScalarSizeInBits());

MVT IntVT = MVT :: getIntegerVT ( VT . getScalarSizeInBits ( ) ) ;


MVT IntVecVT = MVT::getVectorVT(IntVT, VT.getVectorNumElements());

MVT IntVecVT = MVT :: getVectorVT ( IntVT , VT . getVectorNumElements ( ) ) ;


SDValue Res = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, IntVecVT, DAG.getNode(ISD::BITCAST, DL, IntVecVT, Op0), DAG.getNode(ISD::BITCAST, DL, IntVT, Op1), Op2);

SDValue Res = DAG . getNode ( ISD :: INSERT_VECTOR_ELT , DL , IntVecVT , DAG . getNode ( ISD :: BITCAST , DL , IntVecVT , Op0 ) , DAG . getNode ( ISD :: BITCAST , DL , IntVT , Op1 ) , Op2 ) ;


SDValue zmtarzmTargetLowering::lowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: lowerINSERT_VECTOR_ELT ( SDValue Op , SelectionDAG & DAG ) const {


ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(2));

ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op . getOperand ( 2 ) ) ;


EVT VT = Op.getOperand(0).getValueType();

EVT VT = Op . getOperand ( 0 ) . getValueType ( ) ;


ConstantSDNode *CI = dyn_cast<ConstantSDNode>(Op.getOperand(2));

ConstantSDNode * CI = dyn_cast < ConstantSDNode > ( Op . getOperand ( 2 ) ) ;


if (CI->getZExtValue() >= VT.getVectorNumElements()) {

if ( CI -> getZExtValue ( ) >= VT . getVectorNumElements ( ) ) {


SDValue Mtvsrz = DAG.getNode(PPCISD::MTVSRZ, dl, VT, V2);

SDValue Mtvsrz = DAG . getNode ( PPCISD :: MTVSRZ , dl , VT , V2 ) ;


unsigned BytesInEachElement = VT.getVectorElementType().getSizeInBits() / 8;

unsigned BytesInEachElement = VT . getVectorElementType ( ) . getSizeInBits ( ) / 8 ;


unsigned InsertAtElement = C->getZExtValue();

unsigned InsertAtElement = C -> getZExtValue ( ) ;


unsigned InsertAtByte = InsertAtElement * BytesInEachElement;

unsigned InsertAtByte = InsertAtElement * BytesInEachElement ;


InsertAtByte = (16 - BytesInEachElement) - InsertAtByte;

InsertAtByte = ( 16 - BytesInEachElement ) - InsertAtByte ;


SDValue WideVec = WidenVector(Op.getOperand(0), DAG);

SDValue WideVec = WidenVector ( Op . getOperand ( 0 ) , DAG ) ;


EVT WideTy = WideVec . getValueType ( ) ;


SDValue Node = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, WideTy, WideVec, Op.getOperand(1), Op.getOperand(2));

SDValue Node = DAG . getNode ( ISD :: INSERT_VECTOR_ELT , DL , WideTy , WideVec , Op . getOperand ( 1 ) , Op . getOperand ( 2 ) ) ;


SDValue Val = DAG.getNode(ISD::BITCAST, SL, MVT::i16, Op.getOperand(1));

SDValue Val = DAG . getNode ( ISD :: BITCAST , SL , MVT :: i16 , Op . getOperand ( 1 ) ) ;


SDValue ExtVal = DAG.getNode(ISD::ZERO_EXTEND, SL, MVT::i32, Val);

SDValue ExtVal = DAG . getNode ( ISD :: ZERO_EXTEND , SL , MVT :: i32 , Val ) ;


SDValue ScaledIdx = DAG.getNode(ISD::SHL, SL, MVT::i32, Idx, DAG.getConstant(16, SL, MVT::i32));

SDValue ScaledIdx = DAG . getNode ( ISD :: SHL , SL , MVT :: i32 , Idx , DAG . getConstant ( 16 , SL , MVT :: i32 ) ) ;


SDValue BCVec = DAG.getNode(ISD::BITCAST, SL, MVT::i32, Vec);

SDValue BCVec = DAG . getNode ( ISD :: BITCAST , SL , MVT :: i32 , Vec ) ;


SDValue BFM = DAG.getNode(ISD::SHL, SL, MVT::i32, DAG.getConstant(0xffff, SL, MVT::i32), ScaledIdx);

SDValue BFM = DAG . getNode ( ISD :: SHL , SL , MVT :: i32 , DAG . getConstant ( 0xffff , SL , MVT :: i32 ) , ScaledIdx ) ;


SDValue LHS = DAG.getNode(ISD::AND, SL, MVT::i32, BFM, ExtVal);

SDValue LHS = DAG . getNode ( ISD :: AND , SL , MVT :: i32 , BFM , ExtVal ) ;


SDValue RHS = DAG.getNode(ISD::AND, SL, MVT::i32, DAG.getNOT(SL, BFM, MVT::i32), BCVec);

SDValue RHS = DAG . getNode ( ISD :: AND , SL , MVT :: i32 , DAG . getNOT ( SL , BFM , MVT :: i32 ) , BCVec ) ;


SDValue BFI = DAG.getNode(ISD::OR, SL, MVT::i32, LHS, RHS);

SDValue BFI = DAG . getNode ( ISD :: OR , SL , MVT :: i32 , LHS , RHS ) ;


MVT IntVT = MVT::getIntegerVT(VT.getScalarSizeInBits());

MVT IntVT = MVT :: getIntegerVT ( VT . getScalarSizeInBits ( ) ) ;


MVT IntVecVT = MVT::getVectorVT(IntVT, VT.getVectorNumElements());

MVT IntVecVT = MVT :: getVectorVT ( IntVT , VT . getVectorNumElements ( ) ) ;


SDValue Res = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, IntVecVT, DAG.getNode(ISD::BITCAST, DL, IntVecVT, Op0), DAG.getNode(ISD::BITCAST, DL, IntVT, Op1), Op2);

SDValue Res = DAG . getNode ( ISD :: INSERT_VECTOR_ELT , DL , IntVecVT , DAG . getNode ( ISD :: BITCAST , DL , IntVecVT , Op0 ) , DAG . getNode ( ISD :: BITCAST , DL , IntVT , Op1 ) , Op2 ) ;


return DAG . getNode ( ISD :: BITCAST , SL , Op . getValueType ( ) , BFI ) ;

return DAG.getNode(ISD::BITCAST, SL, Op.getValueType(), BFI);


SDValue zmtarzmTargetLowering::lowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: lowerINSERT_VECTOR_ELT ( SDValue Op , SelectionDAG & DAG ) const {


ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(2));

ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op . getOperand ( 2 ) ) ;


EVT VT = Op.getOperand(0).getValueType();

EVT VT = Op . getOperand ( 0 ) . getValueType ( ) ;


ConstantSDNode *CI = dyn_cast<ConstantSDNode>(Op.getOperand(2));

ConstantSDNode * CI = dyn_cast < ConstantSDNode > ( Op . getOperand ( 2 ) ) ;


if (CI->getZExtValue() >= VT.getVectorNumElements()) {

if ( CI -> getZExtValue ( ) >= VT . getVectorNumElements ( ) ) {


SDValue Mtvsrz = DAG.getNode(PPCISD::MTVSRZ, dl, VT, V2);

SDValue Mtvsrz = DAG . getNode ( PPCISD :: MTVSRZ , dl , VT , V2 ) ;


unsigned BytesInEachElement = VT.getVectorElementType().getSizeInBits() / 8;

unsigned BytesInEachElement = VT . getVectorElementType ( ) . getSizeInBits ( ) / 8 ;


unsigned InsertAtElement = C->getZExtValue();

unsigned InsertAtElement = C -> getZExtValue ( ) ;


unsigned InsertAtByte = InsertAtElement * BytesInEachElement;

unsigned InsertAtByte = InsertAtElement * BytesInEachElement ;


InsertAtByte = (16 - BytesInEachElement) - InsertAtByte;

InsertAtByte = ( 16 - BytesInEachElement ) - InsertAtByte ;


SDValue WideVec = WidenVector(Op.getOperand(0), DAG);

SDValue WideVec = WidenVector ( Op . getOperand ( 0 ) , DAG ) ;


EVT WideTy = WideVec . getValueType ( ) ;


SDValue Node = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, WideTy, WideVec, Op.getOperand(1), Op.getOperand(2));

SDValue Node = DAG . getNode ( ISD :: INSERT_VECTOR_ELT , DL , WideTy , WideVec , Op . getOperand ( 1 ) , Op . getOperand ( 2 ) ) ;


SDValue Val = DAG.getNode(ISD::BITCAST, SL, MVT::i16, Op.getOperand(1));

SDValue Val = DAG . getNode ( ISD :: BITCAST , SL , MVT :: i16 , Op . getOperand ( 1 ) ) ;


SDValue ExtVal = DAG.getNode(ISD::ZERO_EXTEND, SL, MVT::i32, Val);

SDValue ExtVal = DAG . getNode ( ISD :: ZERO_EXTEND , SL , MVT :: i32 , Val ) ;


SDValue ScaledIdx = DAG.getNode(ISD::SHL, SL, MVT::i32, Idx, DAG.getConstant(16, SL, MVT::i32));

SDValue ScaledIdx = DAG . getNode ( ISD :: SHL , SL , MVT :: i32 , Idx , DAG . getConstant ( 16 , SL , MVT :: i32 ) ) ;


SDValue BCVec = DAG.getNode(ISD::BITCAST, SL, MVT::i32, Vec);

SDValue BCVec = DAG . getNode ( ISD :: BITCAST , SL , MVT :: i32 , Vec ) ;


SDValue BFM = DAG.getNode(ISD::SHL, SL, MVT::i32, DAG.getConstant(0xffff, SL, MVT::i32), ScaledIdx);

SDValue BFM = DAG . getNode ( ISD :: SHL , SL , MVT :: i32 , DAG . getConstant ( 0xffff , SL , MVT :: i32 ) , ScaledIdx ) ;


SDValue LHS = DAG.getNode(ISD::AND, SL, MVT::i32, BFM, ExtVal);

SDValue LHS = DAG . getNode ( ISD :: AND , SL , MVT :: i32 , BFM , ExtVal ) ;


SDValue RHS = DAG.getNode(ISD::AND, SL, MVT::i32, DAG.getNOT(SL, BFM, MVT::i32), BCVec);

SDValue RHS = DAG . getNode ( ISD :: AND , SL , MVT :: i32 , DAG . getNOT ( SL , BFM , MVT :: i32 ) , BCVec ) ;


SDValue BFI = DAG.getNode(ISD::OR, SL, MVT::i32, LHS, RHS);

SDValue BFI = DAG . getNode ( ISD :: OR , SL , MVT :: i32 , LHS , RHS ) ;


MVT IntVT = MVT::getIntegerVT(VT.getScalarSizeInBits());

MVT IntVT = MVT :: getIntegerVT ( VT . getScalarSizeInBits ( ) ) ;


MVT IntVecVT = MVT::getVectorVT(IntVT, VT.getVectorNumElements());

MVT IntVecVT = MVT :: getVectorVT ( IntVT , VT . getVectorNumElements ( ) ) ;


SDValue Res = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, IntVecVT, DAG.getNode(ISD::BITCAST, DL, IntVecVT, Op0), DAG.getNode(ISD::BITCAST, DL, IntVT, Op1), Op2);

SDValue Res = DAG . getNode ( ISD :: INSERT_VECTOR_ELT , DL , IntVecVT , DAG . getNode ( ISD :: BITCAST , DL , IntVecVT , Op0 ) , DAG . getNode ( ISD :: BITCAST , DL , IntVT , Op1 ) , Op2 ) ;


return DAG . getNode ( ISD :: BITCAST , DL , VT , Res ) ;

return DAG.getNode(ISD::BITCAST, DL, VT, Res);


SDValue zmtarzmTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerINTRINSIC_WO_CHAIN ( SDValue Op , SelectionDAG & DAG ) const {


MVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();

MVT PtrVT = DAG . getTargetLoweringInfo ( ) . getPointerTy ( ) ;


unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();

unsigned IntNo = cast < ConstantSDNode > ( Op . getOperand ( 0 ) ) -> getZExtValue ( ) ;


if ( IntNo == Intrinsic :: zmtarzm_thread_pointer ) {

if (IntNo == Intrinsic::zmtarzm_thread_pointer) {


return DAG.getNode(zmtarzmISD::THREAD_POINTER, DL, PtrVT);

return DAG . getNode ( zmtarzmISD :: THREAD_POINTER , DL , PtrVT ) ;


if ( IntNo == Intrinsic :: zmtarzm_sjlj_setjmp ) {

if (IntNo == Intrinsic::zmtarzm_sjlj_setjmp) {


SmallVector<SDValue, 16> Ops(std::next(Op->op_begin()), Op->op_end());

SmallVector < SDValue , 16 > Ops ( std :: next ( Op -> op_begin ( ) ) , Op -> op_end ( ) ) ;


bool SmallTuple = Size <= zmtarzmTargetMachine::SmallTupleLimit;

bool SmallTuple = Size <= zmtarzmTargetMachine :: SmallTupleLimit ;


Ops.push_back(DAG.getConstant(Size, DL, MVT::i257, SmallTuple));

Ops . push_back ( DAG . getConstant ( Size , DL , MVT :: i257 , SmallTuple ) ) ;


unsigned Cmd = SmallTuple ? zmtarzmISD::TUPLE : zmtarzmISD::TUPLEVAR;

unsigned Cmd = SmallTuple ? zmtarzmISD :: TUPLE : zmtarzmISD :: TUPLEVAR ;


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


const zmtarzmTargetMachine *TM = static_cast<const zmtarzmTargetMachine *>(&DAG.getTarget());

const zmtarzmTargetMachine * TM = static_cast < const zmtarzmTargetMachine * > ( & DAG . getTarget ( ) ) ;


TM -> getStrList ( ) -> push_back ( std :: string ( ( Twine ( "GCC_except_table" ) + Twine ( MF . getFunctionNumber ( ) ) ) . str ( ) ) ) ;


SDValue Addr = DAG.getTargetExternalSymbol(TM->getStrList()->back().c_str(), VT, 0);

SDValue Addr = DAG . getTargetExternalSymbol ( TM -> getStrList ( ) -> back ( ) . c_str ( ) , VT , 0 ) ;


Addr = makeHiLoPair(Addr, zmtarzmMCExpr::VK_zmtarzm_GOTOFF_HI32, zmtarzmMCExpr::VK_zmtarzm_GOTOFF_LO32, DAG);

Addr = makeHiLoPair ( Addr , zmtarzmMCExpr :: VK_zmtarzm_GOTOFF_HI32 , zmtarzmMCExpr :: VK_zmtarzm_GOTOFF_LO32 , DAG ) ;


SDValue GlobalBase = DAG.getNode(zmtarzmISD::GLOBAL_BASE_REG, DL, VT);

SDValue GlobalBase = DAG . getNode ( zmtarzmISD :: GLOBAL_BASE_REG , DL , VT ) ;


return DAG.getNode(ISD::ADD, DL, VT, GlobalBase, Addr);

return DAG . getNode ( ISD :: ADD , DL , VT , GlobalBase , Addr ) ;


const zmtarzmTargetLowering &TLI = DAG.getTargetLoweringInfo();

const zmtarzmTargetLowering & TLI = DAG . getTargetLoweringInfo ( ) ;


MVT PtrVT = TLI.getPointerTy(DAG.getDataLayout());

MVT PtrVT = TLI . getPointerTy ( DAG . getDataLayout ( ) ) ;


auto &Context = MF.getMMI().getContext();

auto & Context = MF . getMMI ( ) . getContext ( ) ;


MCSymbol *S = Context.getOrCreateSymbol(Twine("GCC_except_table") + Twine(MF.getFunctionNumber()));

MCSymbol * S = Context . getOrCreateSymbol ( Twine ( "GCC_except_table" ) + Twine ( MF . getFunctionNumber ( ) ) ) ;


return DAG . getNode ( zmtarzmISD :: EH_SJLJ_SETJMP , DL , MVT :: i32 , Op . getOperand ( 1 ) ) ;

return DAG.getNode(zmtarzmISD::EH_SJLJ_SETJMP, DL, MVT::i32, Op.getOperand(1));


EVT PtrVT = getPointerTy(DAG.getDataLayout());

EVT PtrVT = getPointerTy ( DAG . getDataLayout ( ) ) ;


return DAG . getRegister ( zmtarzm :: G7 , PtrVT ) ;


SDValue zmtarzmTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerINTRINSIC_WO_CHAIN ( SDValue Op , SelectionDAG & DAG ) const {


MVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();

MVT PtrVT = DAG . getTargetLoweringInfo ( ) . getPointerTy ( ) ;


unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();

unsigned IntNo = cast < ConstantSDNode > ( Op . getOperand ( 0 ) ) -> getZExtValue ( ) ;


return DAG.getNode(zmtarzmISD::THREAD_POINTER, DL, PtrVT);

return DAG . getNode ( zmtarzmISD :: THREAD_POINTER , DL , PtrVT ) ;


if ( IntNo == Intrinsic :: zmtarzm_sjlj_lsda ) {

if (IntNo == Intrinsic::zmtarzm_sjlj_lsda) {


SmallVector<SDValue, 16> Ops(std::next(Op->op_begin()), Op->op_end());

SmallVector < SDValue , 16 > Ops ( std :: next ( Op -> op_begin ( ) ) , Op -> op_end ( ) ) ;


bool SmallTuple = Size <= zmtarzmTargetMachine::SmallTupleLimit;

bool SmallTuple = Size <= zmtarzmTargetMachine :: SmallTupleLimit ;


Ops.push_back(DAG.getConstant(Size, DL, MVT::i257, SmallTuple));

Ops . push_back ( DAG . getConstant ( Size , DL , MVT :: i257 , SmallTuple ) ) ;


unsigned Cmd = SmallTuple ? zmtarzmISD::TUPLE : zmtarzmISD::TUPLEVAR;

unsigned Cmd = SmallTuple ? zmtarzmISD :: TUPLE : zmtarzmISD :: TUPLEVAR ;


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


const zmtarzmTargetMachine *TM = static_cast<const zmtarzmTargetMachine *>(&DAG.getTarget());

const zmtarzmTargetMachine * TM = static_cast < const zmtarzmTargetMachine * > ( & DAG . getTarget ( ) ) ;


TM -> getStrList ( ) -> push_back ( std :: string ( ( Twine ( "GCC_except_table" ) + Twine ( MF . getFunctionNumber ( ) ) ) . str ( ) ) ) ;


SDValue Addr = DAG.getTargetExternalSymbol(TM->getStrList()->back().c_str(), VT, 0);

SDValue Addr = DAG . getTargetExternalSymbol ( TM -> getStrList ( ) -> back ( ) . c_str ( ) , VT , 0 ) ;


Addr = makeHiLoPair(Addr, zmtarzmMCExpr::VK_zmtarzm_GOTOFF_HI32, zmtarzmMCExpr::VK_zmtarzm_GOTOFF_LO32, DAG);

Addr = makeHiLoPair ( Addr , zmtarzmMCExpr :: VK_zmtarzm_GOTOFF_HI32 , zmtarzmMCExpr :: VK_zmtarzm_GOTOFF_LO32 , DAG ) ;


SDValue GlobalBase = DAG.getNode(zmtarzmISD::GLOBAL_BASE_REG, DL, VT);

SDValue GlobalBase = DAG . getNode ( zmtarzmISD :: GLOBAL_BASE_REG , DL , VT ) ;


return DAG.getNode(ISD::ADD, DL, VT, GlobalBase, Addr);

return DAG . getNode ( ISD :: ADD , DL , VT , GlobalBase , Addr ) ;


const zmtarzmTargetLowering &TLI = DAG.getTargetLoweringInfo();

const zmtarzmTargetLowering & TLI = DAG . getTargetLoweringInfo ( ) ;


MVT PtrVT = TLI.getPointerTy(DAG.getDataLayout());

MVT PtrVT = TLI . getPointerTy ( DAG . getDataLayout ( ) ) ;


auto &Context = MF.getMMI().getContext();

auto & Context = MF . getMMI ( ) . getContext ( ) ;


MCSymbol *S = Context.getOrCreateSymbol(Twine("GCC_except_table") + Twine(MF.getFunctionNumber()));

MCSymbol * S = Context . getOrCreateSymbol ( Twine ( "GCC_except_table" ) + Twine ( MF . getFunctionNumber ( ) ) ) ;


return makeHiLoPair ( Addr , zmtarzmMCExpr :: VK_zmtarzm_HI32 , zmtarzmMCExpr :: VK_zmtarzm_LO32 , DAG ) ;

return makeHiLoPair(Addr, zmtarzmMCExpr::VK_zmtarzm_HI32, zmtarzmMCExpr::VK_zmtarzm_LO32, DAG);


EVT PtrVT = getPointerTy(DAG.getDataLayout());

EVT PtrVT = getPointerTy ( DAG . getDataLayout ( ) ) ;


return DAG . getRegister ( zmtarzm :: G7 , PtrVT ) ;


SDValue zmtarzmTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerINTRINSIC_WO_CHAIN ( SDValue Op , SelectionDAG & DAG ) const {


MVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();

MVT PtrVT = DAG . getTargetLoweringInfo ( ) . getPointerTy ( ) ;


unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();

unsigned IntNo = cast < ConstantSDNode > ( Op . getOperand ( 0 ) ) -> getZExtValue ( ) ;


return DAG.getNode(zmtarzmISD::THREAD_POINTER, DL, PtrVT);

return DAG . getNode ( zmtarzmISD :: THREAD_POINTER , DL , PtrVT ) ;


if ( IntNo == Intrinsic :: zmtarzm_lsda ) {


SmallVector<SDValue, 16> Ops(std::next(Op->op_begin()), Op->op_end());

SmallVector < SDValue , 16 > Ops ( std :: next ( Op -> op_begin ( ) ) , Op -> op_end ( ) ) ;


bool SmallTuple = Size <= zmtarzmTargetMachine::SmallTupleLimit;

bool SmallTuple = Size <= zmtarzmTargetMachine :: SmallTupleLimit ;


Ops.push_back(DAG.getConstant(Size, DL, MVT::i257, SmallTuple));

Ops . push_back ( DAG . getConstant ( Size , DL , MVT :: i257 , SmallTuple ) ) ;


unsigned Cmd = SmallTuple ? zmtarzmISD::TUPLE : zmtarzmISD::TUPLEVAR;

unsigned Cmd = SmallTuple ? zmtarzmISD :: TUPLE : zmtarzmISD :: TUPLEVAR ;


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


const zmtarzmTargetMachine *TM = static_cast<const zmtarzmTargetMachine *>(&DAG.getTarget());

const zmtarzmTargetMachine * TM = static_cast < const zmtarzmTargetMachine * > ( & DAG . getTarget ( ) ) ;


TM -> getStrList ( ) -> push_back ( std :: string ( ( Twine ( "GCC_except_table" ) + Twine ( MF . getFunctionNumber ( ) ) ) . str ( ) ) ) ;


SDValue Addr = DAG.getTargetExternalSymbol(TM->getStrList()->back().c_str(), VT, 0);

SDValue Addr = DAG . getTargetExternalSymbol ( TM -> getStrList ( ) -> back ( ) . c_str ( ) , VT , 0 ) ;


Addr = makeHiLoPair(Addr, zmtarzmMCExpr::VK_zmtarzm_GOTOFF_HI32, zmtarzmMCExpr::VK_zmtarzm_GOTOFF_LO32, DAG);

Addr = makeHiLoPair ( Addr , zmtarzmMCExpr :: VK_zmtarzm_GOTOFF_HI32 , zmtarzmMCExpr :: VK_zmtarzm_GOTOFF_LO32 , DAG ) ;


SDValue GlobalBase = DAG.getNode(zmtarzmISD::GLOBAL_BASE_REG, DL, VT);

SDValue GlobalBase = DAG . getNode ( zmtarzmISD :: GLOBAL_BASE_REG , DL , VT ) ;


return DAG.getNode(ISD::ADD, DL, VT, GlobalBase, Addr);

return DAG . getNode ( ISD :: ADD , DL , VT , GlobalBase , Addr ) ;


const zmtarzmTargetLowering &TLI = DAG.getTargetLoweringInfo();

const zmtarzmTargetLowering & TLI = DAG . getTargetLoweringInfo ( ) ;


MVT PtrVT = TLI.getPointerTy(DAG.getDataLayout());

MVT PtrVT = TLI . getPointerTy ( DAG . getDataLayout ( ) ) ;


auto &Context = MF.getMMI().getContext();

auto & Context = MF . getMMI ( ) . getContext ( ) ;


MCSymbol *S = Context.getOrCreateSymbol(Twine("GCC_except_table") + Twine(MF.getFunctionNumber()));

MCSymbol * S = Context . getOrCreateSymbol ( Twine ( "GCC_except_table" ) + Twine ( MF . getFunctionNumber ( ) ) ) ;


return DAG . getNode ( zmtarzmISD :: Wrapper , DL , VT , DAG . getMCSymbol ( S , PtrVT ) ) ;

return DAG.getNode(zmtarzmISD::Wrapper, DL, VT, DAG.getMCSymbol(S, PtrVT));


EVT PtrVT = getPointerTy(DAG.getDataLayout());

EVT PtrVT = getPointerTy ( DAG . getDataLayout ( ) ) ;


return DAG . getRegister ( zmtarzm :: G7 , PtrVT ) ;


SDValue zmtarzmTargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerINTRINSIC_W_CHAIN ( SDValue Op , SelectionDAG & DAG ) const {


unsigned IntNo = Op.getConstantOperandVal(1);

unsigned IntNo = Op . getConstantOperandVal ( 1 ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTP);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTP ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTPDP);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTPDP ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTR_W);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTR_W ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTR_R_W);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTR_R_W ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTR_RS_W);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTR_RS_W ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTR_S_H);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTR_S_H ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::MTHLIP);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MTHLIP ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::MULSAQ_S_W_PH);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MULSAQ_S_W_PH ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::MAQ_S_W_PHL);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MAQ_S_W_PHL ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::MAQ_S_W_PHR);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MAQ_S_W_PHR ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::MAQ_SA_W_PHL);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MAQ_SA_W_PHL ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::MAQ_SA_W_PHR);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MAQ_SA_W_PHR ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPAQ_S_W_PH);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPAQ_S_W_PH ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPSQ_S_W_PH);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPSQ_S_W_PH ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPAQ_SA_L_W);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPAQ_SA_L_W ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPSQ_SA_L_W);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPSQ_SA_L_W ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPAQX_S_W_PH);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPAQX_S_W_PH ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPAQX_SA_W_PH);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPAQX_SA_W_PH ) ;


if ( IntNo == Intrinsic :: zmtarzm_mops_memset_tag ) {

if (IntNo == Intrinsic::zmtarzm_mops_memset_tag) {


auto Node = cast<MemIntrinsicSDNode>(Op.getNode());

auto Node = cast < MemIntrinsicSDNode > ( Op . getNode ( ) ) ;


Val = DAG.getAnyExtOrTrunc(Val, DL, MVT::i64);

Val = DAG . getAnyExtOrTrunc ( Val , DL , MVT :: i64 ) ;


auto Alignment = Node->getMemOperand()->getAlign();

auto Alignment = Node -> getMemOperand ( ) -> getAlign ( ) ;


auto DstPtrInfo = Node->getPointerInfo();

auto DstPtrInfo = Node -> getPointerInfo ( ) ;


const auto &SDI = static_cast<const zmtarzmSelectionDAGInfo &>(DAG.getSelectionDAGInfo());

const auto & SDI = static_cast < const zmtarzmSelectionDAGInfo & > ( DAG . getSelectionDAGInfo ( ) ) ;


SDValue MS = SDI.EmitMOPS(zmtarzmISD::MOPS_MEMSET_TAGGING, DAG, DL, Chain, Dst, Val, Size, Alignment, IsVol, DstPtrInfo, MachinePointerInfo{});

SDValue MS = SDI . EmitMOPS ( zmtarzmISD :: MOPS_MEMSET_TAGGING , DAG , DL , Chain , Dst , Val , Size , Alignment , IsVol , DstPtrInfo , MachinePointerInfo { } ) ;


return DAG . getMergeValues ( { MS . getValue ( 0 ) , MS . getValue ( 2 ) } , DL ) ;

return DAG.getMergeValues({MS.getValue(0), MS.getValue(2)}, DL);


if (isIntrinsicWithCCAndChain(Op, Opcode, CCValid)) {

if ( isIntrinsicWithCCAndChain ( Op , Opcode , CCValid ) ) {


SDNode *Node = emitIntrinsicWithCCAndChain(DAG, Op, Opcode);

SDNode * Node = emitIntrinsicWithCCAndChain ( DAG , Op , Opcode ) ;


SDValue CC = getCCResult(DAG, SDValue(Node, 0));

SDValue CC = getCCResult ( DAG , SDValue ( Node , 0 ) ) ;


DAG . ReplaceAllUsesOfValueWith ( SDValue ( Op . getNode ( ) , 0 ) , CC ) ;


SDValue zmtarzmTargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerINTRINSIC_W_CHAIN ( SDValue Op , SelectionDAG & DAG ) const {


unsigned IntNo = Op.getConstantOperandVal(1);

unsigned IntNo = Op . getConstantOperandVal ( 1 ) ;


if ( IntNo == Intrinsic :: zmtarzm_extp ) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTP);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTP ) ;


if ( IntNo == Intrinsic :: zmtarzm_extpdp ) {

if (IntNo == Intrinsic::zmtarzm_extpdp) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTPDP);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTPDP ) ;


if ( IntNo == Intrinsic :: zmtarzm_extr_w ) {

if (IntNo == Intrinsic::zmtarzm_extr_w) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTR_W);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTR_W ) ;


if ( IntNo == Intrinsic :: zmtarzm_extr_r_w ) {

if (IntNo == Intrinsic::zmtarzm_extr_r_w) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTR_R_W);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTR_R_W ) ;


if ( IntNo == Intrinsic :: zmtarzm_extr_rs_w ) {

if (IntNo == Intrinsic::zmtarzm_extr_rs_w) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTR_RS_W);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTR_RS_W ) ;


if ( IntNo == Intrinsic :: zmtarzm_extr_s_h ) {

if (IntNo == Intrinsic::zmtarzm_extr_s_h) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTR_S_H);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTR_S_H ) ;


if ( IntNo == Intrinsic :: zmtarzm_mthlip ) {

if (IntNo == Intrinsic::zmtarzm_mthlip) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::MTHLIP);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MTHLIP ) ;


if ( IntNo == Intrinsic :: zmtarzm_mulsaq_s_w_ph ) {

if (IntNo == Intrinsic::zmtarzm_mulsaq_s_w_ph) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::MULSAQ_S_W_PH);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MULSAQ_S_W_PH ) ;


if ( IntNo == Intrinsic :: zmtarzm_maq_s_w_phl ) {

if (IntNo == Intrinsic::zmtarzm_maq_s_w_phl) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::MAQ_S_W_PHL);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MAQ_S_W_PHL ) ;


if ( IntNo == Intrinsic :: zmtarzm_maq_s_w_phr ) {

if (IntNo == Intrinsic::zmtarzm_maq_s_w_phr) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::MAQ_S_W_PHR);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MAQ_S_W_PHR ) ;


if ( IntNo == Intrinsic :: zmtarzm_maq_sa_w_phl ) {

if (IntNo == Intrinsic::zmtarzm_maq_sa_w_phl) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::MAQ_SA_W_PHL);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MAQ_SA_W_PHL ) ;


if ( IntNo == Intrinsic :: zmtarzm_maq_sa_w_phr ) {

if (IntNo == Intrinsic::zmtarzm_maq_sa_w_phr) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::MAQ_SA_W_PHR);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MAQ_SA_W_PHR ) ;


if ( IntNo == Intrinsic :: zmtarzm_dpaq_s_w_ph ) {

if (IntNo == Intrinsic::zmtarzm_dpaq_s_w_ph) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPAQ_S_W_PH);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPAQ_S_W_PH ) ;


if ( IntNo == Intrinsic :: zmtarzm_dpsq_s_w_ph ) {

if (IntNo == Intrinsic::zmtarzm_dpsq_s_w_ph) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPSQ_S_W_PH);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPSQ_S_W_PH ) ;


if ( IntNo == Intrinsic :: zmtarzm_dpaq_sa_l_w ) {

if (IntNo == Intrinsic::zmtarzm_dpaq_sa_l_w) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPAQ_SA_L_W);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPAQ_SA_L_W ) ;


if ( IntNo == Intrinsic :: zmtarzm_dpsq_sa_l_w ) {

if (IntNo == Intrinsic::zmtarzm_dpsq_sa_l_w) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPSQ_SA_L_W);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPSQ_SA_L_W ) ;


if ( IntNo == Intrinsic :: zmtarzm_dpaqx_s_w_ph ) {

if (IntNo == Intrinsic::zmtarzm_dpaqx_s_w_ph) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPAQX_S_W_PH);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPAQX_S_W_PH ) ;


if ( IntNo == Intrinsic :: zmtarzm_dpaqx_sa_w_ph ) {

if (IntNo == Intrinsic::zmtarzm_dpaqx_sa_w_ph) {


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPAQX_SA_W_PH);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPAQX_SA_W_PH ) ;


if ( IntNo == Intrinsic :: zmtarzm_dpsqx_s_w_ph ) {

if (IntNo == Intrinsic::zmtarzm_dpsqx_s_w_ph) {


return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPSQX_S_W_PH ) ;

return lowerDSPIntr(Op, DAG, zmtarzmISD::DPSQX_S_W_PH);


if ( IntNo == Intrinsic :: zmtarzm_dpsqx_sa_w_ph ) {

if (IntNo == Intrinsic::zmtarzm_dpsqx_sa_w_ph) {


return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPSQX_SA_W_PH ) ;

return lowerDSPIntr(Op, DAG, zmtarzmISD::DPSQX_SA_W_PH);


if ( IntNo == Intrinsic :: zmtarzm_ld_b ) {


return lowerMSALoadIntr ( Op , DAG , Intr , Subtarget ) ;

return lowerMSALoadIntr(Op, DAG, Intr, Subtarget);


if ( IntNo == Intrinsic :: zmtarzm_ld_h ) {


if ( IntNo == Intrinsic :: zmtarzm_ld_w ) {


if ( IntNo == Intrinsic :: zmtarzm_ld_d ) {


auto Node = cast<MemIntrinsicSDNode>(Op.getNode());

auto Node = cast < MemIntrinsicSDNode > ( Op . getNode ( ) ) ;


Val = DAG.getAnyExtOrTrunc(Val, DL, MVT::i64);

Val = DAG . getAnyExtOrTrunc ( Val , DL , MVT :: i64 ) ;


auto Alignment = Node->getMemOperand()->getAlign();

auto Alignment = Node -> getMemOperand ( ) -> getAlign ( ) ;


auto DstPtrInfo = Node->getPointerInfo();

auto DstPtrInfo = Node -> getPointerInfo ( ) ;


const auto &SDI = static_cast<const zmtarzmSelectionDAGInfo &>(DAG.getSelectionDAGInfo());

const auto & SDI = static_cast < const zmtarzmSelectionDAGInfo & > ( DAG . getSelectionDAGInfo ( ) ) ;


SDValue MS = SDI.EmitMOPS(zmtarzmISD::MOPS_MEMSET_TAGGING, DAG, DL, Chain, Dst, Val, Size, Alignment, IsVol, DstPtrInfo, MachinePointerInfo{});

SDValue MS = SDI . EmitMOPS ( zmtarzmISD :: MOPS_MEMSET_TAGGING , DAG , DL , Chain , Dst , Val , Size , Alignment , IsVol , DstPtrInfo , MachinePointerInfo { } ) ;


if (isIntrinsicWithCCAndChain(Op, Opcode, CCValid)) {

if ( isIntrinsicWithCCAndChain ( Op , Opcode , CCValid ) ) {


SDNode *Node = emitIntrinsicWithCCAndChain(DAG, Op, Opcode);

SDNode * Node = emitIntrinsicWithCCAndChain ( DAG , Op , Opcode ) ;


SDValue CC = getCCResult(DAG, SDValue(Node, 0));

SDValue CC = getCCResult ( DAG , SDValue ( Node , 0 ) ) ;


DAG . ReplaceAllUsesOfValueWith ( SDValue ( Op . getNode ( ) , 0 ) , CC ) ;


SDValue zmtarzmTargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerINTRINSIC_W_CHAIN ( SDValue Op , SelectionDAG & DAG ) const {


unsigned IntNo = Op.getConstantOperandVal(1);

unsigned IntNo = Op . getConstantOperandVal ( 1 ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTP);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTP ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTPDP);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTPDP ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTR_W);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTR_W ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTR_R_W);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTR_R_W ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTR_RS_W);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTR_RS_W ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::EXTR_S_H);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: EXTR_S_H ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::MTHLIP);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MTHLIP ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::MULSAQ_S_W_PH);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MULSAQ_S_W_PH ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::MAQ_S_W_PHL);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MAQ_S_W_PHL ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::MAQ_S_W_PHR);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MAQ_S_W_PHR ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::MAQ_SA_W_PHL);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MAQ_SA_W_PHL ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::MAQ_SA_W_PHR);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: MAQ_SA_W_PHR ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPAQ_S_W_PH);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPAQ_S_W_PH ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPSQ_S_W_PH);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPSQ_S_W_PH ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPAQ_SA_L_W);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPAQ_SA_L_W ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPSQ_SA_L_W);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPSQ_SA_L_W ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPAQX_S_W_PH);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPAQX_S_W_PH ) ;


return lowerDSPIntr(Op, DAG, zmtarzmISD::DPAQX_SA_W_PH);

return lowerDSPIntr ( Op , DAG , zmtarzmISD :: DPAQX_SA_W_PH ) ;


auto Node = cast<MemIntrinsicSDNode>(Op.getNode());

auto Node = cast < MemIntrinsicSDNode > ( Op . getNode ( ) ) ;


Val = DAG.getAnyExtOrTrunc(Val, DL, MVT::i64);

Val = DAG . getAnyExtOrTrunc ( Val , DL , MVT :: i64 ) ;


auto Alignment = Node->getMemOperand()->getAlign();

auto Alignment = Node -> getMemOperand ( ) -> getAlign ( ) ;


auto DstPtrInfo = Node->getPointerInfo();

auto DstPtrInfo = Node -> getPointerInfo ( ) ;


const auto &SDI = static_cast<const zmtarzmSelectionDAGInfo &>(DAG.getSelectionDAGInfo());

const auto & SDI = static_cast < const zmtarzmSelectionDAGInfo & > ( DAG . getSelectionDAGInfo ( ) ) ;


SDValue MS = SDI.EmitMOPS(zmtarzmISD::MOPS_MEMSET_TAGGING, DAG, DL, Chain, Dst, Val, Size, Alignment, IsVol, DstPtrInfo, MachinePointerInfo{});

SDValue MS = SDI . EmitMOPS ( zmtarzmISD :: MOPS_MEMSET_TAGGING , DAG , DL , Chain , Dst , Val , Size , Alignment , IsVol , DstPtrInfo , MachinePointerInfo { } ) ;


if (isIntrinsicWithCCAndChain(Op, Opcode, CCValid)) {

if ( isIntrinsicWithCCAndChain ( Op , Opcode , CCValid ) ) {


assert
(
Op
->
getNumValues
(
)
==
2
&&
"Expected only CC result and chain"
)
;

assert(Op->getNumValues() == 2 && "Expected only CC result and chain");


SDNode *Node = emitIntrinsicWithCCAndChain(DAG, Op, Opcode);

SDNode * Node = emitIntrinsicWithCCAndChain ( DAG , Op , Opcode ) ;


SDValue CC = getCCResult(DAG, SDValue(Node, 0));

SDValue CC = getCCResult ( DAG , SDValue ( Node , 0 ) ) ;


DAG . ReplaceAllUsesOfValueWith ( SDValue ( Op . getNode ( ) , 0 ) , CC ) ;


SDValue zmtarzmTargetLowering::lowerJumpTable(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: lowerJumpTable ( SDValue Op , SelectionDAG & DAG ) const {


JumpTableSDNode *N = cast<JumpTableSDNode>(Op);

JumpTableSDNode * N = cast < JumpTableSDNode > ( Op ) ;


SDValue zmtarzmTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerOperation ( SDValue Op , SelectionDAG & DAG ) const {


return LowerGlobalAddress ( Op , DAG ) ;


return LowerExternalSymbol ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: SHL ) {


if ( Op . getOpcode ( ) == ISD :: SRA ) {


if ( Op . getOpcode ( ) == ISD :: SRL ) {


if ( Op . getOpcode ( ) == ISD :: GlobalAddress ) {

if (Op.getOpcode() == ISD::GlobalAddress) {


if ( Op . getOpcode ( ) == ISD :: BlockAddress ) {

if (Op.getOpcode() == ISD::BlockAddress) {


if ( Op . getOpcode ( ) == ISD :: BR_CC ) {


if ( Op . getOpcode ( ) == ISD :: SELECT_CC ) {


if ( Op . getOpcode ( ) == ISD :: SETCC ) {


if ( Op . getOpcode ( ) == ISD :: VASTART ) {


if ( Op . getOpcode ( ) == ISD :: ExternalSymbol ) {

if (Op.getOpcode() == ISD::ExternalSymbol) {


if ( Op . getOpcode ( ) == ISD :: SIGN_EXTEND ) {

if (Op.getOpcode() == ISD::SIGN_EXTEND) {


if ( Op . getOpcode ( ) == ISD :: RETURNADDR ) {

if (Op.getOpcode() == ISD::RETURNADDR) {


if ( Op . getOpcode ( ) == ISD :: FRAMEADDR ) {


if ( Op . getOpcode ( ) == ISD :: JumpTable ) {


report_fatal_error
(
"unimplemented operand"
)
;


SDValue zmtarzmTargetLowering :: LowerOperation ( SDValue Op , SelectionDAG & DAG ) const {


return LowerGlobalAddress ( Op , DAG ) ;


return LowerExternalSymbol ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: SELECT ) {


if ( Op . getOpcode ( ) == ISD :: SHL ) {


if ( Op . getOpcode ( ) == ISD :: SRA ) {


if ( Op . getOpcode ( ) == ISD :: SRL ) {


if ( Op . getOpcode ( ) == ISD :: ROTL ) {


if ( Op . getOpcode ( ) == ISD :: ROTR ) {


if ( Op . getOpcode ( ) == ISD :: GlobalAddress ) {


if ( Op . getOpcode ( ) == ISD :: BlockAddress ) {


if ( Op . getOpcode ( ) == ISD :: BR_CC ) {


if ( Op . getOpcode ( ) == ISD :: SELECT_CC ) {


if ( Op . getOpcode ( ) == ISD :: SETCC ) {


if ( Op . getOpcode ( ) == ISD :: VASTART ) {


if ( Op . getOpcode ( ) == ISD :: SDIVREM ) {


if ( Op . getOpcode ( ) == ISD :: UDIVREM ) {


report_fatal_error
(
"unimplemented operand"
)
;


SDValue zmtarzmTargetLowering :: LowerOperation ( SDValue Op , SelectionDAG & DAG ) const {


return LowerGlobalAddress ( Op , DAG ) ;


return LowerExternalSymbol ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: XOR ) {


if ( Op . getOpcode ( ) == ISD :: OR ) {


if ( Op . getOpcode ( ) == ISD :: AND ) {


return lowerGlobalTLSAddress ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: SELECT ) {


if ( Op . getOpcode ( ) == ISD :: FrameIndex ) {

if (Op.getOpcode() == ISD::FrameIndex) {


if ( Op . getOpcode ( ) == ISD :: GlobalAddress ) {


if ( Op . getOpcode ( ) == ISD :: ExternalSymbol ) {


if ( Op . getOpcode ( ) == ISD :: JumpTable ) {


if ( Op . getOpcode ( ) == ISD :: BR_JT ) {


if ( Op . getOpcode ( ) == ISD :: VASTART ) {


if ( Op . getOpcode ( ) == ISD :: RETURNADDR ) {


if ( Op . getOpcode ( ) == ISD :: FRAMEADDR ) {


if ( Op . getOpcode ( ) == ISD :: CopyToReg ) {


if ( Op . getOpcode ( ) == ISD :: EXTRACT_VECTOR_ELT ) {

if (Op.getOpcode() == ISD::EXTRACT_VECTOR_ELT) {


return LowerAccessVectorElement ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: INSERT_VECTOR_ELT ) {

if (Op.getOpcode() == ISD::INSERT_VECTOR_ELT) {


if ( Op . getOpcode ( ) == ISD :: INTRINSIC_VOID ) {

if (Op.getOpcode() == ISD::INTRINSIC_VOID) {


if ( Op . getOpcode ( ) == ISD :: INTRINSIC_WO_CHAIN ) {

if (Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN) {


if ( Op . getOpcode ( ) == ISD :: INTRINSIC_W_CHAIN ) {

if (Op.getOpcode() == ISD::INTRINSIC_W_CHAIN) {


if ( Op . getOpcode ( ) == ISD :: SIGN_EXTEND_INREG ) {

if (Op.getOpcode() == ISD::SIGN_EXTEND_INREG) {


return LowerSIGN_EXTEND_INREG ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: BUILD_VECTOR ) {

if (Op.getOpcode() == ISD::BUILD_VECTOR) {


if ( Op . getOpcode ( ) == ISD :: VECTOR_SHUFFLE ) {

if (Op.getOpcode() == ISD::VECTOR_SHUFFLE) {


return LowerVECTOR_SHUFFLE ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: SHL ) {


if ( Op . getOpcode ( ) == ISD :: SRA ) {


if ( Op . getOpcode ( ) == ISD :: SRL ) {


report_fatal_error
(
"unimplemented operand"
)
;


SDValue zmtarzmTargetLowering :: LowerOperation ( SDValue Op , SelectionDAG & DAG ) const {


return LowerGlobalAddress ( Op , DAG ) ;


return LowerExternalSymbol ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: ZERO_EXTEND ) {

if (Op.getOpcode() == ISD::ZERO_EXTEND) {


if ( Op . getOpcode ( ) == ISD :: SIGN_EXTEND ) {


if ( Op . getOpcode ( ) == ISD :: SUB ) {


if ( Op . getOpcode ( ) == ISD :: SUBC ) {


if ( Op . getOpcode ( ) == ISD :: ROTL ) {


if ( Op . getOpcode ( ) == ISD :: ROTR ) {


if ( Op . getOpcode ( ) == ISD :: AND ) {


if ( Op . getOpcode ( ) == ISD :: OR ) {


if ( Op . getOpcode ( ) == ISD :: XOR ) {


if ( Op . getOpcode ( ) == ISD :: SELECT_CC ) {


if ( Op . getOpcode ( ) == ISD :: BR_CC ) {


if ( Op . getOpcode ( ) == ISD :: GlobalAddress ) {


if ( Op . getOpcode ( ) == ISD :: STORE ) {


if ( Op . getOpcode ( ) == ISD :: LOAD ) {


report_fatal_error
(
"unimplemented operand"
)
;


SDValue zmtarzmTargetLowering::lowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const{

SDValue zmtarzmTargetLowering :: lowerRETURNADDR ( SDValue Op , SelectionDAG & DAG ) const {


const zmtarzmRegisterInfo &RI = *Subtarget.getRegisterInfo();

const zmtarzmRegisterInfo & RI = * Subtarget . getRegisterInfo ( ) ;


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


MachineFrameInfo &MFI = MF.getFrameInfo();

MachineFrameInfo & MFI = MF . getFrameInfo ( ) ;


MFI . setReturnAddressIsTaken ( true ) ;


if (verifyReturnAddressArgumentIsConstant(Op, DAG)) {

if ( verifyReturnAddressArgumentIsConstant ( Op , DAG ) ) {


unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();

unsigned Depth = cast < ConstantSDNode > ( Op . getOperand ( 0 ) ) -> getZExtValue ( ) ;


SDValue FrameAddr = lowerFRAMEADDR(Op, DAG);

SDValue FrameAddr = lowerFRAMEADDR ( Op , DAG ) ;


SDValue Offset = DAG.getConstant(Off, DL, VT);

SDValue Offset = DAG . getConstant ( Off , DL , VT ) ;


return DAG.getLoad(VT, DL, DAG.getEntryNode(), DAG.getNode(ISD::ADD, DL, VT, FrameAddr, Offset), MachinePointerInfo());

return DAG . getLoad ( VT , DL , DAG . getEntryNode ( ) , DAG . getNode ( ISD :: ADD , DL , VT , FrameAddr , Offset ) , MachinePointerInfo ( ) ) ;


Register Reg = MF.addLiveIn(RI.getRARegister(), getRegClassFor(XLenVT));

Register Reg = MF . addLiveIn ( RI . getRARegister ( ) , getRegClassFor ( XLenVT ) ) ;


return DAG.getCopyFromReg(DAG.getEntryNode(), DL, Reg, XLenVT);

return DAG . getCopyFromReg ( DAG . getEntryNode ( ) , DL , Reg , XLenVT ) ;


SDValue zmtarzmTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerReturn ( SDValue Chain , CallingConv :: ID CallConv , bool IsVarArg , const SmallVectorImpl < ISD :: OutputArg > & Outs , const SmallVectorImpl < SDValue > & OutVals , const SDLoc & DL , SelectionDAG & DAG ) const {


report_fatal_error
(
"VarArg not supported"
)
;


SmallVector < CCValAssign , 16 > RVLocs ;


CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, *DAG.getContext());

CCState CCInfo ( CallConv , IsVarArg , DAG . getMachineFunction ( ) , RVLocs , * DAG . getContext ( ) ) ;


CCInfo . AnalyzeReturn ( Outs , RetCC_zmtarzm ) ;


if ( DAG . getMachineFunction ( ) . getRegInfo ( ) . liveout_empty ( ) ) {


for (unsigned i = 0; i != RVLocs.size(); ++i)

for ( unsigned i = 0 ; i != RVLocs . size ( ) ; ++ i )


DAG . getMachineFunction ( ) . getRegInfo ( ) . addLiveOut ( RVLocs [ i ] . getLocReg ( ) ) ;


for (unsigned i = 0; i != RVLocs.size(); ++i) {

for ( unsigned i = 0 ; i != RVLocs . size ( ) ; ++ i ) {


AnalyzeReturnValues ( CCInfo , RVLocs , Outs ) ;


if ( MF . getRegInfo ( ) . liveout_empty ( ) ) {


MF . getRegInfo ( ) . addLiveOut ( RVLocs [ i ] . getLocReg ( ) ) ;


analyzeOutputArgs ( CCInfo , Outs , CC_zmtarzm ) ;


analyzeOutputArgs(DAG.getMachineFunction(), CCInfo, Outs,  true, nullptr);

analyzeOutputArgs ( DAG . getMachineFunction ( ) , CCInfo , Outs , true , nullptr ) ;


SmallVector<SDValue, 4> RetOps(1, Chain);

SmallVector < SDValue , 4 > RetOps ( 1 , Chain ) ;


assert(VA.isRegLoc() && "Can only return in registers!");

assert
(
VA
.
isRegLoc
(
)
&&
"Can only return in registers!"
)
;


if (VA.getLocInfo() == CCValAssign::SExt) {

if ( VA . getLocInfo ( ) == CCValAssign :: SExt ) {


ResValue = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ResValue);

ResValue = DAG . getNode ( ISD :: SIGN_EXTEND , dl , VA . getLocVT ( ) , ResValue ) ;


if (VA.getLocInfo() == CCValAssign::ZExt) {

if ( VA . getLocInfo ( ) == CCValAssign :: ZExt ) {


ResValue = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), ResValue);

ResValue = DAG . getNode ( ISD :: ZERO_EXTEND , dl , VA . getLocVT ( ) , ResValue ) ;


if (VA.getLocInfo() == CCValAssign::AExt) {

if ( VA . getLocInfo ( ) == CCValAssign :: AExt ) {


ResValue = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ResValue);

ResValue = DAG . getNode ( ISD :: ANY_EXTEND , dl , VA . getLocVT ( ) , ResValue ) ;


Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVals[i], Flag);

Chain = DAG . getCopyToReg ( Chain , DL , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ;


RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ;


bool IsF64Onzmtarzm = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64;

bool IsF64Onzmtarzm = VA . getLocVT ( ) == MVT :: i32 && VA . getValVT ( ) == MVT :: f64 ;


SDValue Split64 = DAG.getNode(zmtarzmISD::BITCAST_TO_LOHI, DL, DAG.getVTList(MVT::i32, MVT::i32), Val);

SDValue Split64 = DAG . getNode ( zmtarzmISD :: BITCAST_TO_LOHI , DL , DAG . getVTList ( MVT :: i32 , MVT :: i32 ) , Val ) ;


assert(RegLo < zmtarzm::R31 && "Invalid register pair");

assert
(
RegLo
<
zmtarzm
::
R31
&&
"Invalid register pair"
)
;


Chain = DAG.getCopyToReg(Chain, DL, RegLo, Lo, Glue);

Chain = DAG . getCopyToReg ( Chain , DL , RegLo , Lo , Glue ) ;


RetOps . push_back ( DAG . getRegister ( RegLo , MVT :: i32 ) ) ;


Chain = DAG.getCopyToReg(Chain, DL, RegHi, Hi, Glue);

Chain = DAG . getCopyToReg ( Chain , DL , RegHi , Hi , Glue ) ;


RetOps . push_back ( DAG . getRegister ( RegHi , MVT :: i32 ) ) ;


if ( DAG . getMachineFunction ( ) . getFunction ( ) . hasFnAttribute ( "interrupt" ) ) {


return DAG.getNode(zmtarzmISD::NIR, DL, MVT::Other, RetOps);

return DAG . getNode ( zmtarzmISD :: NIR , DL , MVT :: Other , RetOps ) ;


return DAG.getNode(zmtarzmISD::RET, DL, MVT::Other, RetOps);

return DAG . getNode ( zmtarzmISD :: RET , DL , MVT :: Other , RetOps ) ;


if ( VA . getLocVT ( ) != MVT :: i32 ) {


Val = convertValVTToLocVT(DAG, Val, VA, DL);

Val = convertValVTToLocVT ( DAG , Val , VA , DL ) ;


Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Val, Glue);

Chain = DAG . getCopyToReg ( Chain , DL , VA . getLocReg ( ) , Val , Glue ) ;


if ( VA . getValVT ( ) != MVT :: f64 ) {


if ( DAG . getMachineFunction ( ) . getFunction ( ) . hasStructRetAttr ( ) ) {


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


zmtarzmMachineFunctionInfo *zmtarzmMFI = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * zmtarzmMFI = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


Register Reg = zmtarzmMFI->getSRetReturnReg();

Register Reg = zmtarzmMFI -> getSRetReturnReg ( ) ;


SDValue Val = DAG.getCopyFromReg(Chain, DL, Reg, getPointerTy(DAG.getDataLayout()));

SDValue Val = DAG . getCopyFromReg ( Chain , DL , Reg , getPointerTy ( DAG . getDataLayout ( ) ) ) ;


Chain = DAG.getCopyToReg(Chain, DL, zmtarzm::RV, Val, Flag);

Chain = DAG . getCopyToReg ( Chain , DL , zmtarzm :: RV , Val , Flag ) ;


RetOps . push_back ( DAG . getRegister ( zmtarzm :: RV , getPointerTy ( DAG . getDataLayout ( ) ) ) ) ;


if ( MF . getFunction ( ) . hasStructRetAttr ( ) ) {


zmtarzmMachineFunctionInfo *FuncInfo = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * FuncInfo = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


unsigned Reg = FuncInfo->getSRetReturnReg();

unsigned Reg = FuncInfo -> getSRetReturnReg ( ) ;


llvm_unreachable("sret virtual register not created in entry block");


SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy(DAG.getDataLayout()));

SDValue Val = DAG . getCopyFromReg ( Chain , dl , Reg , getPointerTy ( DAG . getDataLayout ( ) ) ) ;


Chain = DAG.getCopyToReg(Chain, dl, R12, Val, Flag);

Chain = DAG . getCopyToReg ( Chain , dl , R12 , Val , Flag ) ;


RetOps . push_back ( DAG . getRegister ( R12 , getPointerTy ( DAG . getDataLayout ( ) ) ) ) ;


unsigned Opc = (CallConv == CallingConv::zmtarzm_INTR ? zmtarzmISD::RETI_FLAG : zmtarzmISD::RET_FLAG);

unsigned Opc = ( CallConv == CallingConv :: zmtarzm_INTR ? zmtarzmISD :: RETI_FLAG : zmtarzmISD :: RET_FLAG ) ;


if ( MF . getFunction ( ) -> hasStructRetAttr ( ) ) {


zmtarzmMachineFunctionInfo *SFI = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * SFI = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


zmtarzmMachineFunctionInfo *FI = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * FI = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


llvm_unreachable("sret virtual register not created in the entry block");


Chain = DAG.getCopyToReg(Chain, dl, zmtarzm::I0, Val, Flag);

Chain = DAG . getCopyToReg ( Chain , dl , zmtarzm :: I0 , Val , Flag ) ;


Chain = DAG.getCopyToReg(Chain, DL, zmtarzm::R0, Val, Flag);

Chain = DAG . getCopyToReg ( Chain , DL , zmtarzm :: R0 , Val , Flag ) ;


RetOps . push_back ( DAG . getRegister ( zmtarzm :: I0 , getPointerTy ( ) ) ) ;


if ( MF . getRegInfo ( ) . liveout_empty ( ) ) {


MF . getRegInfo ( ) . addLiveOut ( zmtarzm :: R0 ) ;


if ( DAG . getMachineFunction ( ) . getFunction ( ) -> hasStructRetAttr ( ) ) {


MachineFunction &MF      = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


zmtarzmFunctionInfo *zmtarzmFI = MF.getInfo<zmtarzmFunctionInfo>();

zmtarzmFunctionInfo * zmtarzmFI = MF . getInfo < zmtarzmFunctionInfo > ( ) ;


unsigned Reg = zmtarzmFI->getSRetReturnReg();

unsigned Reg = zmtarzmFI -> getSRetReturnReg ( ) ;


SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy());

SDValue Val = DAG . getCopyFromReg ( Chain , dl , Reg , getPointerTy ( ) ) ;


Chain = DAG.getCopyToReg(Chain, dl, zmtarzm::V0, Val, Flag);

Chain = DAG . getCopyToReg ( Chain , dl , zmtarzm :: V0 , Val , Flag ) ;


RetOps[1] = DAG.getConstant(RetAddrOffset, MVT::i32);

RetOps [ 1 ] = DAG . getConstant ( RetAddrOffset , MVT :: i32 ) ;


SDValue LinkReg = DAG.getRegister(zmtarzm::LinkRegister, getPointerTy());

SDValue LinkReg = DAG . getRegister ( zmtarzm :: LinkRegister , getPointerTy ( ) ) ;


return DAG.getNode(zmtarzmISD::Ret, dl, MVT::Other, Chain, DAG.getRegister(zmtarzm::RA, MVT::i32), Flag);

return DAG . getNode ( zmtarzmISD :: Ret , dl , MVT :: Other , Chain , DAG . getRegister ( zmtarzm :: RA , MVT :: i32 ) , Flag ) ;


const Function &Func = DAG.getMachineFunction().getFunction();

const Function & Func = DAG . getMachineFunction ( ) . getFunction ( ) ;


if ( Func . hasFnAttribute ( "interrupt" ) ) {


llvm_unreachable
(
"interrupts not supported"
)
;


return DAG . getNode ( zmtarzmISD :: RET_FLAG , DL , MVT :: Other , RetOps ) ;

return DAG.getNode(zmtarzmISD::RET_FLAG, DL, MVT::Other, RetOps);


return DAG.getNode(zmtarzmISD::Ret, dl, MVT::Other, Chain, DAG.getRegister(zmtarzm::RA, MVT::i32));

return DAG . getNode ( zmtarzmISD :: Ret , dl , MVT :: Other , Chain , DAG . getRegister ( zmtarzm :: RA , MVT :: i32 ) ) ;


return DAG.getNode(T64ISD::JRP, DL, MVT::Other, Chain, LinkReg);

return DAG . getNode ( T64ISD :: JRP , DL , MVT :: Other , Chain , LinkReg ) ;


SDValue zmtarzmTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerReturn ( SDValue Chain , CallingConv :: ID CallConv , bool IsVarArg , const SmallVectorImpl < ISD :: OutputArg > & Outs , const SmallVectorImpl < SDValue > & OutVals , const SDLoc & DL , SelectionDAG & DAG ) const {


report_fatal_error
(
"VarArg not supported"
)
;


MachineFunction &MF = DAG.getMachineFunction();


SmallVector < CCValAssign , 16 > RVLocs ;


CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, *DAG.getContext());

CCState CCInfo ( CallConv , IsVarArg , DAG . getMachineFunction ( ) , RVLocs , * DAG . getContext ( ) ) ;


CCInfo . AnalyzeReturn ( Outs , RetCC_zmtarzm ) ;


if ( DAG . getMachineFunction ( ) . getRegInfo ( ) . liveout_empty ( ) ) {


for (unsigned i = 0; i != RVLocs.size(); ++i)

for ( unsigned i = 0 ; i != RVLocs . size ( ) ; ++ i )


DAG . getMachineFunction ( ) . getRegInfo ( ) . addLiveOut ( RVLocs [ i ] . getLocReg ( ) ) ;


for (unsigned i = 0; i != RVLocs.size(); ++i) {

for ( unsigned i = 0 ; i != RVLocs . size ( ) ; ++ i ) {


AnalyzeReturnValues ( CCInfo , RVLocs , Outs ) ;


if ( MF . getRegInfo ( ) . liveout_empty ( ) ) {


MF . getRegInfo ( ) . addLiveOut ( RVLocs [ i ] . getLocReg ( ) ) ;


analyzeOutputArgs ( CCInfo , Outs , CC_zmtarzm ) ;


analyzeOutputArgs(DAG.getMachineFunction(), CCInfo, Outs,  true, nullptr);

analyzeOutputArgs ( DAG . getMachineFunction ( ) , CCInfo , Outs , true , nullptr ) ;


SmallVector<SDValue, 4> RetOps(1, Chain);

SmallVector < SDValue , 4 > RetOps ( 1 , Chain ) ;


assert(VA.isRegLoc() && "Can only return in registers!");

assert
(
VA
.
isRegLoc
(
)
&&
"Can only return in registers!"
)
;


if (VA.getLocInfo() == CCValAssign::SExt) {

if ( VA . getLocInfo ( ) == CCValAssign :: SExt ) {


ResValue = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ResValue);

ResValue = DAG . getNode ( ISD :: SIGN_EXTEND , dl , VA . getLocVT ( ) , ResValue ) ;


if (VA.getLocInfo() == CCValAssign::ZExt) {

if ( VA . getLocInfo ( ) == CCValAssign :: ZExt ) {


ResValue = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), ResValue);

ResValue = DAG . getNode ( ISD :: ZERO_EXTEND , dl , VA . getLocVT ( ) , ResValue ) ;


if (VA.getLocInfo() == CCValAssign::AExt) {

if ( VA . getLocInfo ( ) == CCValAssign :: AExt ) {


ResValue = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ResValue);

ResValue = DAG . getNode ( ISD :: ANY_EXTEND , dl , VA . getLocVT ( ) , ResValue ) ;


Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVals[i], Flag);

Chain = DAG . getCopyToReg ( Chain , DL , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ;


RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ;


bool IsF64Onzmtarzm = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64;

bool IsF64Onzmtarzm = VA . getLocVT ( ) == MVT :: i32 && VA . getValVT ( ) == MVT :: f64 ;


assert
(
VA
.
isRegLoc
(
)
&&
"Expected return via registers"
)
;

assert(VA.isRegLoc() && "Expected return via registers");


SDValue Split64 = DAG.getNode(zmtarzmISD::BITCAST_TO_LOHI, DL, DAG.getVTList(MVT::i32, MVT::i32), Val);

SDValue Split64 = DAG . getNode ( zmtarzmISD :: BITCAST_TO_LOHI , DL , DAG . getVTList ( MVT :: i32 , MVT :: i32 ) , Val ) ;


assert(RegLo < zmtarzm::R31 && "Invalid register pair");

assert
(
RegLo
<
zmtarzm
::
R31
&&
"Invalid register pair"
)
;


Chain = DAG.getCopyToReg(Chain, DL, RegLo, Lo, Glue);

Chain = DAG . getCopyToReg ( Chain , DL , RegLo , Lo , Glue ) ;


RetOps . push_back ( DAG . getRegister ( RegLo , MVT :: i32 ) ) ;


Chain = DAG.getCopyToReg(Chain, DL, RegHi, Hi, Glue);

Chain = DAG . getCopyToReg ( Chain , DL , RegHi , Hi , Glue ) ;


RetOps . push_back ( DAG . getRegister ( RegHi , MVT :: i32 ) ) ;


if ( DAG . getMachineFunction ( ) . getFunction ( ) . hasFnAttribute ( "interrupt" ) ) {


return DAG.getNode(zmtarzmISD::NIR, DL, MVT::Other, RetOps);

return DAG . getNode ( zmtarzmISD :: NIR , DL , MVT :: Other , RetOps ) ;


return DAG.getNode(zmtarzmISD::RET, DL, MVT::Other, RetOps);

return DAG . getNode ( zmtarzmISD :: RET , DL , MVT :: Other , RetOps ) ;


if ( VA . getLocVT ( ) != MVT :: i32 ) {


Val = convertValVTToLocVT(DAG, Val, VA, DL);

Val = convertValVTToLocVT ( DAG , Val , VA , DL ) ;


Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Val, Glue);

Chain = DAG . getCopyToReg ( Chain , DL , VA . getLocReg ( ) , Val , Glue ) ;


if ( VA . getValVT ( ) != MVT :: f64 ) {


if ( DAG . getMachineFunction ( ) . getFunction ( ) . hasStructRetAttr ( ) ) {


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


zmtarzmMachineFunctionInfo *zmtarzmMFI = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * zmtarzmMFI = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


Register Reg = zmtarzmMFI->getSRetReturnReg();

Register Reg = zmtarzmMFI -> getSRetReturnReg ( ) ;


SDValue Val = DAG.getCopyFromReg(Chain, DL, Reg, getPointerTy(DAG.getDataLayout()));

SDValue Val = DAG . getCopyFromReg ( Chain , DL , Reg , getPointerTy ( DAG . getDataLayout ( ) ) ) ;


Chain = DAG.getCopyToReg(Chain, DL, zmtarzm::RV, Val, Flag);

Chain = DAG . getCopyToReg ( Chain , DL , zmtarzm :: RV , Val , Flag ) ;


RetOps . push_back ( DAG . getRegister ( zmtarzm :: RV , getPointerTy ( DAG . getDataLayout ( ) ) ) ) ;


if ( MF . getFunction ( ) . hasStructRetAttr ( ) ) {


zmtarzmMachineFunctionInfo *FuncInfo = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * FuncInfo = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


unsigned Reg = FuncInfo->getSRetReturnReg();

unsigned Reg = FuncInfo -> getSRetReturnReg ( ) ;


llvm_unreachable("sret virtual register not created in entry block");


SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy(DAG.getDataLayout()));

SDValue Val = DAG . getCopyFromReg ( Chain , dl , Reg , getPointerTy ( DAG . getDataLayout ( ) ) ) ;


Chain = DAG.getCopyToReg(Chain, dl, R12, Val, Flag);

Chain = DAG . getCopyToReg ( Chain , dl , R12 , Val , Flag ) ;


RetOps . push_back ( DAG . getRegister ( R12 , getPointerTy ( DAG . getDataLayout ( ) ) ) ) ;


unsigned Opc = (CallConv == CallingConv::zmtarzm_INTR ? zmtarzmISD::RETI_FLAG : zmtarzmISD::RET_FLAG);

unsigned Opc = ( CallConv == CallingConv :: zmtarzm_INTR ? zmtarzmISD :: RETI_FLAG : zmtarzmISD :: RET_FLAG ) ;


if ( MF . getFunction ( ) -> hasStructRetAttr ( ) ) {


zmtarzmMachineFunctionInfo *SFI = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * SFI = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


zmtarzmMachineFunctionInfo *FI = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * FI = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


llvm_unreachable("sret virtual register not created in the entry block");


Chain = DAG.getCopyToReg(Chain, dl, zmtarzm::I0, Val, Flag);

Chain = DAG . getCopyToReg ( Chain , dl , zmtarzm :: I0 , Val , Flag ) ;


Chain = DAG.getCopyToReg(Chain, DL, zmtarzm::R0, Val, Flag);

Chain = DAG . getCopyToReg ( Chain , DL , zmtarzm :: R0 , Val , Flag ) ;


RetOps . push_back ( DAG . getRegister ( zmtarzm :: I0 , getPointerTy ( ) ) ) ;


if ( MF . getRegInfo ( ) . liveout_empty ( ) ) {


MF . getRegInfo ( ) . addLiveOut ( zmtarzm :: R0 ) ;


if ( DAG . getMachineFunction ( ) . getFunction ( ) -> hasStructRetAttr ( ) ) {


MachineFunction &MF      = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


zmtarzmFunctionInfo *zmtarzmFI = MF.getInfo<zmtarzmFunctionInfo>();

zmtarzmFunctionInfo * zmtarzmFI = MF . getInfo < zmtarzmFunctionInfo > ( ) ;


unsigned Reg = zmtarzmFI->getSRetReturnReg();

unsigned Reg = zmtarzmFI -> getSRetReturnReg ( ) ;


SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy());

SDValue Val = DAG . getCopyFromReg ( Chain , dl , Reg , getPointerTy ( ) ) ;


Chain = DAG.getCopyToReg(Chain, dl, zmtarzm::V0, Val, Flag);

Chain = DAG . getCopyToReg ( Chain , dl , zmtarzm :: V0 , Val , Flag ) ;


RetOps[1] = DAG.getConstant(RetAddrOffset, MVT::i32);

RetOps [ 1 ] = DAG . getConstant ( RetAddrOffset , MVT :: i32 ) ;


SDValue LinkReg = DAG.getRegister(zmtarzm::LinkRegister, getPointerTy());

SDValue LinkReg = DAG . getRegister ( zmtarzm :: LinkRegister , getPointerTy ( ) ) ;


return DAG.getNode(zmtarzmISD::Ret, dl, MVT::Other, Chain, DAG.getRegister(zmtarzm::RA, MVT::i32), Flag);

return DAG . getNode ( zmtarzmISD :: Ret , dl , MVT :: Other , Chain , DAG . getRegister ( zmtarzm :: RA , MVT :: i32 ) , Flag ) ;


const Function &Func = DAG.getMachineFunction().getFunction();

const Function & Func = DAG . getMachineFunction ( ) . getFunction ( ) ;


if ( Func . hasFnAttribute ( "interrupt" ) ) {


llvm_unreachable
(
"interrupts not supported"
)
;


return DAG.getNode(zmtarzmISD::Ret, dl, MVT::Other, Chain, DAG.getRegister(zmtarzm::RA, MVT::i32));

return DAG . getNode ( zmtarzmISD :: Ret , dl , MVT :: Other , Chain , DAG . getRegister ( zmtarzm :: RA , MVT :: i32 ) ) ;


return DAG.getNode(T64ISD::JRP, DL, MVT::Other, Chain, LinkReg);

return DAG . getNode ( T64ISD :: JRP , DL , MVT :: Other , Chain , LinkReg ) ;


SDValue zmtarzmTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerReturn ( SDValue Chain , CallingConv :: ID CallConv , bool IsVarArg , const SmallVectorImpl < ISD :: OutputArg > & Outs , const SmallVectorImpl < SDValue > & OutVals , const SDLoc & DL , SelectionDAG & DAG ) const {


report_fatal_error
(
"VarArg not supported"
)
;


MachineFunction &MF = DAG.getMachineFunction();


SmallVector < CCValAssign , 16 > RVLocs ;


CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, *DAG.getContext());

CCState CCInfo ( CallConv , IsVarArg , DAG . getMachineFunction ( ) , RVLocs , * DAG . getContext ( ) ) ;


CCInfo . AnalyzeReturn ( Outs , RetCC_zmtarzm ) ;


if ( DAG . getMachineFunction ( ) . getRegInfo ( ) . liveout_empty ( ) ) {


for (unsigned i = 0; i != RVLocs.size(); ++i)

for ( unsigned i = 0 ; i != RVLocs . size ( ) ; ++ i )


DAG . getMachineFunction ( ) . getRegInfo ( ) . addLiveOut ( RVLocs [ i ] . getLocReg ( ) ) ;


for (unsigned i = 0; i != RVLocs.size(); ++i) {

for ( unsigned i = 0 ; i != RVLocs . size ( ) ; ++ i ) {


AnalyzeReturnValues ( CCInfo , RVLocs , Outs ) ;


if ( MF . getRegInfo ( ) . liveout_empty ( ) ) {


MF . getRegInfo ( ) . addLiveOut ( RVLocs [ i ] . getLocReg ( ) ) ;


analyzeOutputArgs ( CCInfo , Outs , CC_zmtarzm ) ;


analyzeOutputArgs(DAG.getMachineFunction(), CCInfo, Outs,  true, nullptr);

analyzeOutputArgs ( DAG . getMachineFunction ( ) , CCInfo , Outs , true , nullptr ) ;


SmallVector<SDValue, 4> RetOps(1, Chain);

SmallVector < SDValue , 4 > RetOps ( 1 , Chain ) ;


assert(VA.isRegLoc() && "Can only return in registers!");

assert
(
VA
.
isRegLoc
(
)
&&
"Can only return in registers!"
)
;


if (VA.getLocInfo() == CCValAssign::SExt) {

if ( VA . getLocInfo ( ) == CCValAssign :: SExt ) {


ResValue = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ResValue);

ResValue = DAG . getNode ( ISD :: SIGN_EXTEND , dl , VA . getLocVT ( ) , ResValue ) ;


if (VA.getLocInfo() == CCValAssign::ZExt) {

if ( VA . getLocInfo ( ) == CCValAssign :: ZExt ) {


ResValue = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), ResValue);

ResValue = DAG . getNode ( ISD :: ZERO_EXTEND , dl , VA . getLocVT ( ) , ResValue ) ;


if (VA.getLocInfo() == CCValAssign::AExt) {

if ( VA . getLocInfo ( ) == CCValAssign :: AExt ) {


ResValue = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ResValue);

ResValue = DAG . getNode ( ISD :: ANY_EXTEND , dl , VA . getLocVT ( ) , ResValue ) ;


Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVals[i], Flag);

Chain = DAG . getCopyToReg ( Chain , DL , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ;


RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ;


bool IsF64Onzmtarzm = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64;

bool IsF64Onzmtarzm = VA . getLocVT ( ) == MVT :: i32 && VA . getValVT ( ) == MVT :: f64 ;


SDValue Split64 = DAG.getNode(zmtarzmISD::BITCAST_TO_LOHI, DL, DAG.getVTList(MVT::i32, MVT::i32), Val);

SDValue Split64 = DAG . getNode ( zmtarzmISD :: BITCAST_TO_LOHI , DL , DAG . getVTList ( MVT :: i32 , MVT :: i32 ) , Val ) ;


assert(RegLo < zmtarzm::R31 && "Invalid register pair");

assert
(
RegLo
<
zmtarzm
::
R31
&&
"Invalid register pair"
)
;


Chain = DAG.getCopyToReg(Chain, DL, RegLo, Lo, Glue);

Chain = DAG . getCopyToReg ( Chain , DL , RegLo , Lo , Glue ) ;


RetOps . push_back ( DAG . getRegister ( RegLo , MVT :: i32 ) ) ;


Chain = DAG.getCopyToReg(Chain, DL, RegHi, Hi, Glue);

Chain = DAG . getCopyToReg ( Chain , DL , RegHi , Hi , Glue ) ;


RetOps . push_back ( DAG . getRegister ( RegHi , MVT :: i32 ) ) ;


if ( DAG . getMachineFunction ( ) . getFunction ( ) . hasFnAttribute ( "interrupt" ) ) {


return DAG.getNode(zmtarzmISD::NIR, DL, MVT::Other, RetOps);

return DAG . getNode ( zmtarzmISD :: NIR , DL , MVT :: Other , RetOps ) ;


return DAG.getNode(zmtarzmISD::RET, DL, MVT::Other, RetOps);

return DAG . getNode ( zmtarzmISD :: RET , DL , MVT :: Other , RetOps ) ;


if ( VA . getLocVT ( ) != MVT :: i32 ) {


Val = convertValVTToLocVT(DAG, Val, VA, DL);

Val = convertValVTToLocVT ( DAG , Val , VA , DL ) ;


Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Val, Glue);

Chain = DAG . getCopyToReg ( Chain , DL , VA . getLocReg ( ) , Val , Glue ) ;


if ( VA . getValVT ( ) != MVT :: f64 ) {


if ( DAG . getMachineFunction ( ) . getFunction ( ) . hasStructRetAttr ( ) ) {


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


zmtarzmMachineFunctionInfo *zmtarzmMFI = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * zmtarzmMFI = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


Register Reg = zmtarzmMFI->getSRetReturnReg();

Register Reg = zmtarzmMFI -> getSRetReturnReg ( ) ;


assert(Reg && "SRetReturnReg should have been set in LowerFormalArguments().");


SDValue Val = DAG.getCopyFromReg(Chain, DL, Reg, getPointerTy(DAG.getDataLayout()));

SDValue Val = DAG . getCopyFromReg ( Chain , DL , Reg , getPointerTy ( DAG . getDataLayout ( ) ) ) ;


Chain = DAG.getCopyToReg(Chain, DL, zmtarzm::RV, Val, Flag);

Chain = DAG . getCopyToReg ( Chain , DL , zmtarzm :: RV , Val , Flag ) ;


RetOps . push_back ( DAG . getRegister ( zmtarzm :: RV , getPointerTy ( DAG . getDataLayout ( ) ) ) ) ;


if ( MF . getFunction ( ) . hasStructRetAttr ( ) ) {


zmtarzmMachineFunctionInfo *FuncInfo = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * FuncInfo = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


unsigned Reg = FuncInfo->getSRetReturnReg();

unsigned Reg = FuncInfo -> getSRetReturnReg ( ) ;


llvm_unreachable("sret virtual register not created in entry block");


SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy(DAG.getDataLayout()));

SDValue Val = DAG . getCopyFromReg ( Chain , dl , Reg , getPointerTy ( DAG . getDataLayout ( ) ) ) ;


Chain = DAG.getCopyToReg(Chain, dl, R12, Val, Flag);

Chain = DAG . getCopyToReg ( Chain , dl , R12 , Val , Flag ) ;


RetOps . push_back ( DAG . getRegister ( R12 , getPointerTy ( DAG . getDataLayout ( ) ) ) ) ;


unsigned Opc = (CallConv == CallingConv::zmtarzm_INTR ? zmtarzmISD::RETI_FLAG : zmtarzmISD::RET_FLAG);

unsigned Opc = ( CallConv == CallingConv :: zmtarzm_INTR ? zmtarzmISD :: RETI_FLAG : zmtarzmISD :: RET_FLAG ) ;


if ( MF . getFunction ( ) -> hasStructRetAttr ( ) ) {


zmtarzmMachineFunctionInfo *SFI = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * SFI = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


zmtarzmMachineFunctionInfo *FI = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * FI = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


llvm_unreachable("sret virtual register not created in the entry block");


Chain = DAG.getCopyToReg(Chain, dl, zmtarzm::I0, Val, Flag);

Chain = DAG . getCopyToReg ( Chain , dl , zmtarzm :: I0 , Val , Flag ) ;


Chain = DAG.getCopyToReg(Chain, DL, zmtarzm::R0, Val, Flag);

Chain = DAG . getCopyToReg ( Chain , DL , zmtarzm :: R0 , Val , Flag ) ;


RetOps . push_back ( DAG . getRegister ( zmtarzm :: I0 , getPointerTy ( ) ) ) ;


if ( MF . getRegInfo ( ) . liveout_empty ( ) ) {


MF . getRegInfo ( ) . addLiveOut ( zmtarzm :: R0 ) ;


if ( DAG . getMachineFunction ( ) . getFunction ( ) -> hasStructRetAttr ( ) ) {


MachineFunction &MF      = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


zmtarzmFunctionInfo *zmtarzmFI = MF.getInfo<zmtarzmFunctionInfo>();

zmtarzmFunctionInfo * zmtarzmFI = MF . getInfo < zmtarzmFunctionInfo > ( ) ;


unsigned Reg = zmtarzmFI->getSRetReturnReg();

unsigned Reg = zmtarzmFI -> getSRetReturnReg ( ) ;


SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy());

SDValue Val = DAG . getCopyFromReg ( Chain , dl , Reg , getPointerTy ( ) ) ;


Chain = DAG.getCopyToReg(Chain, dl, zmtarzm::V0, Val, Flag);

Chain = DAG . getCopyToReg ( Chain , dl , zmtarzm :: V0 , Val , Flag ) ;


RetOps[1] = DAG.getConstant(RetAddrOffset, MVT::i32);

RetOps [ 1 ] = DAG . getConstant ( RetAddrOffset , MVT :: i32 ) ;


SDValue LinkReg = DAG.getRegister(zmtarzm::LinkRegister, getPointerTy());

SDValue LinkReg = DAG . getRegister ( zmtarzm :: LinkRegister , getPointerTy ( ) ) ;


return DAG.getNode(zmtarzmISD::Ret, dl, MVT::Other, Chain, DAG.getRegister(zmtarzm::RA, MVT::i32), Flag);

return DAG . getNode ( zmtarzmISD :: Ret , dl , MVT :: Other , Chain , DAG . getRegister ( zmtarzm :: RA , MVT :: i32 ) , Flag ) ;


const Function &Func = DAG.getMachineFunction().getFunction();

const Function & Func = DAG . getMachineFunction ( ) . getFunction ( ) ;


if ( Func . hasFnAttribute ( "interrupt" ) ) {


llvm_unreachable
(
"interrupts not supported"
)
;


return DAG . getNode ( Opc , DL , MVT :: Other , ArrayRef < SDValue > ( & RetOps [ 0 ] , RetOps . size ( ) ) ) ;

return DAG.getNode(Opc, DL, MVT::Other, ArrayRef<SDValue>(&RetOps[0], RetOps.size()));


return DAG.getNode(zmtarzmISD::Ret, dl, MVT::Other, Chain, DAG.getRegister(zmtarzm::RA, MVT::i32));

return DAG . getNode ( zmtarzmISD :: Ret , dl , MVT :: Other , Chain , DAG . getRegister ( zmtarzm :: RA , MVT :: i32 ) ) ;


return DAG.getNode(T64ISD::JRP, DL, MVT::Other, Chain, LinkReg);

return DAG . getNode ( T64ISD :: JRP , DL , MVT :: Other , Chain , LinkReg ) ;


SDValue zmtarzmTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerReturn ( SDValue Chain , CallingConv :: ID CallConv , bool IsVarArg , const SmallVectorImpl < ISD :: OutputArg > & Outs , const SmallVectorImpl < SDValue > & OutVals , const SDLoc & DL , SelectionDAG & DAG ) const {


report_fatal_error
(
"VarArg not supported"
)
;


MachineFunction &MF = DAG.getMachineFunction();


SmallVector < CCValAssign , 16 > RVLocs ;


CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, *DAG.getContext());

CCState CCInfo ( CallConv , IsVarArg , DAG . getMachineFunction ( ) , RVLocs , * DAG . getContext ( ) ) ;


CCInfo . AnalyzeReturn ( Outs , RetCC_zmtarzm ) ;


if ( DAG . getMachineFunction ( ) . getRegInfo ( ) . liveout_empty ( ) ) {


for (unsigned i = 0; i != RVLocs.size(); ++i)

for ( unsigned i = 0 ; i != RVLocs . size ( ) ; ++ i )


DAG . getMachineFunction ( ) . getRegInfo ( ) . addLiveOut ( RVLocs [ i ] . getLocReg ( ) ) ;


for (unsigned i = 0; i != RVLocs.size(); ++i) {

for ( unsigned i = 0 ; i != RVLocs . size ( ) ; ++ i ) {


AnalyzeReturnValues ( CCInfo , RVLocs , Outs ) ;


if ( MF . getRegInfo ( ) . liveout_empty ( ) ) {


MF . getRegInfo ( ) . addLiveOut ( RVLocs [ i ] . getLocReg ( ) ) ;


analyzeOutputArgs ( CCInfo , Outs , CC_zmtarzm ) ;


analyzeOutputArgs(DAG.getMachineFunction(), CCInfo, Outs,  true, nullptr);

analyzeOutputArgs ( DAG . getMachineFunction ( ) , CCInfo , Outs , true , nullptr ) ;


SmallVector<SDValue, 4> RetOps(1, Chain);

SmallVector < SDValue , 4 > RetOps ( 1 , Chain ) ;


assert(VA.isRegLoc() && "Can only return in registers!");

assert
(
VA
.
isRegLoc
(
)
&&
"Can only return in registers!"
)
;


if (VA.getLocInfo() == CCValAssign::SExt) {

if ( VA . getLocInfo ( ) == CCValAssign :: SExt ) {


ResValue = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ResValue);

ResValue = DAG . getNode ( ISD :: SIGN_EXTEND , dl , VA . getLocVT ( ) , ResValue ) ;


if (VA.getLocInfo() == CCValAssign::ZExt) {

if ( VA . getLocInfo ( ) == CCValAssign :: ZExt ) {


ResValue = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), ResValue);

ResValue = DAG . getNode ( ISD :: ZERO_EXTEND , dl , VA . getLocVT ( ) , ResValue ) ;


if (VA.getLocInfo() == CCValAssign::AExt) {

if ( VA . getLocInfo ( ) == CCValAssign :: AExt ) {


ResValue = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ResValue);

ResValue = DAG . getNode ( ISD :: ANY_EXTEND , dl , VA . getLocVT ( ) , ResValue ) ;


Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVals[i], Flag);

Chain = DAG . getCopyToReg ( Chain , DL , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ;


RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ;


bool IsF64Onzmtarzm = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64;

bool IsF64Onzmtarzm = VA . getLocVT ( ) == MVT :: i32 && VA . getValVT ( ) == MVT :: f64 ;


SDValue Split64 = DAG.getNode(zmtarzmISD::BITCAST_TO_LOHI, DL, DAG.getVTList(MVT::i32, MVT::i32), Val);

SDValue Split64 = DAG . getNode ( zmtarzmISD :: BITCAST_TO_LOHI , DL , DAG . getVTList ( MVT :: i32 , MVT :: i32 ) , Val ) ;


assert(RegLo < zmtarzm::R31 && "Invalid register pair");

assert
(
RegLo
<
zmtarzm
::
R31
&&
"Invalid register pair"
)
;


Chain = DAG.getCopyToReg(Chain, DL, RegLo, Lo, Glue);

Chain = DAG . getCopyToReg ( Chain , DL , RegLo , Lo , Glue ) ;


RetOps . push_back ( DAG . getRegister ( RegLo , MVT :: i32 ) ) ;


Chain = DAG.getCopyToReg(Chain, DL, RegHi, Hi, Glue);

Chain = DAG . getCopyToReg ( Chain , DL , RegHi , Hi , Glue ) ;


RetOps . push_back ( DAG . getRegister ( RegHi , MVT :: i32 ) ) ;


if ( DAG . getMachineFunction ( ) . getFunction ( ) . hasFnAttribute ( "interrupt" ) ) {


return DAG.getNode(zmtarzmISD::NIR, DL, MVT::Other, RetOps);

return DAG . getNode ( zmtarzmISD :: NIR , DL , MVT :: Other , RetOps ) ;


return DAG.getNode(zmtarzmISD::RET, DL, MVT::Other, RetOps);

return DAG . getNode ( zmtarzmISD :: RET , DL , MVT :: Other , RetOps ) ;


if ( VA . getLocVT ( ) != MVT :: i32 ) {


Val = convertValVTToLocVT(DAG, Val, VA, DL);

Val = convertValVTToLocVT ( DAG , Val , VA , DL ) ;


Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Val, Glue);

Chain = DAG . getCopyToReg ( Chain , DL , VA . getLocReg ( ) , Val , Glue ) ;


if ( VA . getValVT ( ) != MVT :: f64 ) {


if ( DAG . getMachineFunction ( ) . getFunction ( ) . hasStructRetAttr ( ) ) {


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


zmtarzmMachineFunctionInfo *zmtarzmMFI = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * zmtarzmMFI = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


Register Reg = zmtarzmMFI->getSRetReturnReg();

Register Reg = zmtarzmMFI -> getSRetReturnReg ( ) ;


SDValue Val = DAG.getCopyFromReg(Chain, DL, Reg, getPointerTy(DAG.getDataLayout()));

SDValue Val = DAG . getCopyFromReg ( Chain , DL , Reg , getPointerTy ( DAG . getDataLayout ( ) ) ) ;


Chain = DAG.getCopyToReg(Chain, DL, zmtarzm::RV, Val, Flag);

Chain = DAG . getCopyToReg ( Chain , DL , zmtarzm :: RV , Val , Flag ) ;


RetOps . push_back ( DAG . getRegister ( zmtarzm :: RV , getPointerTy ( DAG . getDataLayout ( ) ) ) ) ;


if ( MF . getFunction ( ) . hasStructRetAttr ( ) ) {


zmtarzmMachineFunctionInfo *FuncInfo = MF.getInfo<zmtarzmMachineFunctionInfo>();

zmtarzmMachineFunctionInfo * FuncInfo = MF . getInfo < zmtarzmMachineFunctionInfo > ( ) ;


unsigned Reg = FuncInfo->getSRetReturnReg();

unsigned Reg = FuncInfo -> getSRetReturnReg ( ) ;