SDValue zmtarzmTargetLowering::lowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: lowerFRAMEADDR ( SDValue Op , SelectionDAG & DAG ) const {


const zmtarzmRegisterInfo &RI = *Subtarget.getRegisterInfo();

const zmtarzmRegisterInfo & RI = * Subtarget . getRegisterInfo ( ) ;


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


MachineFrameInfo &MFI = MF.getFrameInfo();

MachineFrameInfo & MFI = MF . getFrameInfo ( ) ;


Register FrameReg = RI.getFrameRegister(MF);

Register FrameReg = RI . getFrameRegister ( MF ) ;


SDValue FrameAddr = DAG.getCopyFromReg(DAG.getEntryNode(), DL, FrameReg, VT);

SDValue FrameAddr = DAG . getCopyFromReg ( DAG . getEntryNode ( ) , DL , FrameReg , VT ) ;


unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();

unsigned Depth = cast < ConstantSDNode > ( Op . getOperand ( 0 ) ) -> getZExtValue ( ) ;


SDValue Ptr = DAG.getNode(ISD::ADD, DL, VT, FrameAddr, DAG.getIntPtrConstant(Offset, DL));

SDValue Ptr = DAG . getNode ( ISD :: ADD , DL , VT , FrameAddr , DAG . getIntPtrConstant ( Offset , DL ) ) ;


FrameAddr = DAG.getLoad(VT, DL, DAG.getEntryNode(), Ptr, MachinePointerInfo());

FrameAddr = DAG . getLoad ( VT , DL , DAG . getEntryNode ( ) , Ptr , MachinePointerInfo ( ) ) ;


SDValue zmtarzmTargetLowering::LowerFRAME_TO_ARGS_OFFSET(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerFRAME_TO_ARGS_OFFSET ( SDValue Op , SelectionDAG & DAG ) const {


const zmtarzmRegisterInfo *RegInfo = Subtarget.getRegisterInfo();

const zmtarzmRegisterInfo * RegInfo = Subtarget . getRegisterInfo ( ) ;


return DAG.getIntPtrConstant(2 * RegInfo->getSlotSize(), SDLoc(Op));

return DAG . getIntPtrConstant ( 2 * RegInfo -> getSlotSize ( ) , SDLoc ( Op ) ) ;


SDValue zmtarzmTargetLowering::lowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: lowerGlobalAddress ( SDValue Op , SelectionDAG & DAG ) const {


GlobalAddressSDNode *N = cast<GlobalAddressSDNode>(Op);

GlobalAddressSDNode * N = cast < GlobalAddressSDNode > ( Op ) ;


const GlobalValue * GV = N -> getGlobal ( ) ;


bool IsLocal = getTargetMachine().shouldAssumeDSOLocal(*GV->getParent(), GV);

bool IsLocal = getTargetMachine ( ) . shouldAssumeDSOLocal ( * GV -> getParent ( ) , GV ) ;


SDValue Addr = getAddr(N, DAG, IsLocal);

SDValue Addr = getAddr ( N , DAG , IsLocal ) ;


return DAG.getNode(ISD::ADD, DL, Ty, Addr, DAG.getConstant(Offset, DL, XLenVT));

return DAG . getNode ( ISD :: ADD , DL , Ty , Addr , DAG . getConstant ( Offset , DL , XLenVT ) ) ;


MVT XLenVT = getPointerTy ( DAG . getDataLayout ( ) ) ;

MVT XLenVT = getPointerTy(DAG.getDataLayout());


SDValue zmtarzmTargetLowering::lowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: lowerGlobalTLSAddress ( SDValue Op , SelectionDAG & DAG ) const {


if ( DAG . getTarget ( ) . useEmulatedTLS ( ) ) {


return LowerToTLSEmulatedModel ( Node , DAG ) ;


if (DAG.getMachineFunction().getFunction().getCallingConv() == #) {

if ( DAG . getMachineFunction ( ) . getFunction ( ) . getCallingConv ( ) == # ) {

if ( DAG . getMachineFunction ( ) . getFunction ( ) . getCallingConv ( ) == CallingConv :: GHC ) {

if (DAG.getMachineFunction().getFunction().getCallingConv() == CallingConv::GHC) {


report_fatal_error("In GHC calling convention TLS is not supported");


if ( Model == TLSModel :: GeneralDynamic ) {

if (Model == TLSModel::GeneralDynamic) {


if ( Model == TLSModel :: InitialExec ) {


if ( Model == TLSModel :: LocalDynamic ) {


MFI -> incNumLocalDynamicTLSAccesses ( ) ;


if ( DAG . getMachineFunction ( ) . getFunction ( ) . getCallingConv ( ) == # ) {

if (DAG.getMachineFunction().getFunction().getCallingConv() == #) {


SDValue zmtarzmTargetLowering::LowerINIT_TRAMPOLINE(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerINIT_TRAMPOLINE ( SDValue Op , SelectionDAG & DAG ) const {


EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();

EVT PtrVT = DAG . getTargetLoweringInfo ( ) . getPointerTy ( ) ;


bool isPPC64 = ( PtrVT == MVT :: i64 ) ;


Type *IntPtrTy = DAG.getTargetLoweringInfo().getDataLayout()->getIntPtrType(*DAG.getContext());

Type * IntPtrTy = DAG . getTargetLoweringInfo ( ) . getDataLayout ( ) -> getIntPtrType ( * DAG . getContext ( ) ) ;


Entry.Node = DAG.getConstant(isPPC64 ? 48 : 40, isPPC64 ? MVT::i64 : MVT::i32);

Entry . Node = DAG . getConstant ( isPPC64 ? 48 : 40 , isPPC64 ? MVT :: i64 : MVT :: i32 ) ;


Entry.Node = DAG.getConstant(40, MVT::i32);

Entry . Node = DAG . getConstant ( 40 , MVT :: i32 ) ;


TargetLowering::CallLoweringInfo CLI(Chain, Type::getVoidTy(*DAG.getContext()), false, false, false, false, 0, CallingConv::C, false, false, true, DAG.getExternalSymbol("__trampoline_setup", PtrVT), Args, DAG, dl);

TargetLowering :: CallLoweringInfo CLI ( Chain , Type :: getVoidTy ( * DAG . getContext ( ) ) , false , false , false , false , 0 , CallingConv :: C , false , false , true , DAG . getExternalSymbol ( "__trampoline_setup" , PtrVT ) , Args , DAG , dl ) ;


std::pair<SDValue, SDValue> CallResult = LowerCallTo(CLI);

std :: pair < SDValue , SDValue > CallResult = LowerCallTo ( CLI ) ;


SDValue zmtarzmTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerINTRINSIC_WO_CHAIN ( SDValue Op , SelectionDAG & DAG ) const {


MVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();

MVT PtrVT = DAG . getTargetLoweringInfo ( ) . getPointerTy ( ) ;


unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();

unsigned IntNo = cast < ConstantSDNode > ( Op . getOperand ( 0 ) ) -> getZExtValue ( ) ;


if ( IntNo == Intrinsic :: zmtarzm_thread_pointer ) {

if (IntNo == Intrinsic::zmtarzm_thread_pointer) {


return DAG.getNode(zmtarzmISD::THREAD_POINTER, DL, PtrVT);

return DAG . getNode ( zmtarzmISD :: THREAD_POINTER , DL , PtrVT ) ;


if ( IntNo == Intrinsic :: zmtarzm_sjlj_setjmp ) {

if (IntNo == Intrinsic::zmtarzm_sjlj_setjmp) {


return DAG.getNode(zmtarzmISD::EH_SJLJ_SETJMP, DL, MVT::i32, Op.getOperand(1));

return DAG . getNode ( zmtarzmISD :: EH_SJLJ_SETJMP , DL , MVT :: i32 , Op . getOperand ( 1 ) ) ;


return DAG . getRegister ( zmtarzm :: G7 , PtrVT ) ;


SmallVector<SDValue, 16> Ops(std::next(Op->op_begin()), Op->op_end());

SmallVector < SDValue , 16 > Ops ( std :: next ( Op -> op_begin ( ) ) , Op -> op_end ( ) ) ;


Ops.push_back(DAG.getConstant(Size, DL, MVT::i257, SmallTuple));

Ops . push_back ( DAG . getConstant ( Size , DL , MVT :: i257 , SmallTuple ) ) ;


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


const zmtarzmTargetMachine *TM = static_cast<const zmtarzmTargetMachine *>(&DAG.getTarget());

const zmtarzmTargetMachine * TM = static_cast < const zmtarzmTargetMachine * > ( & DAG . getTarget ( ) ) ;


TM -> getStrList ( ) -> push_back ( std :: string ( ( Twine ( "GCC_except_table" ) + Twine ( MF . getFunctionNumber ( ) ) ) . str ( ) ) ) ;


SDValue Addr = DAG.getTargetExternalSymbol(TM->getStrList()->back().c_str(), VT, 0);

SDValue Addr = DAG . getTargetExternalSymbol ( TM -> getStrList ( ) -> back ( ) . c_str ( ) , VT , 0 ) ;


Addr = makeHiLoPair(Addr, zmtarzmMCExpr::VK_zmtarzm_GOTOFF_HI32, zmtarzmMCExpr::VK_zmtarzm_GOTOFF_LO32, DAG);

Addr = makeHiLoPair ( Addr , zmtarzmMCExpr :: VK_zmtarzm_GOTOFF_HI32 , zmtarzmMCExpr :: VK_zmtarzm_GOTOFF_LO32 , DAG ) ;


SDValue GlobalBase = DAG.getNode(zmtarzmISD::GLOBAL_BASE_REG, DL, VT);

SDValue GlobalBase = DAG . getNode ( zmtarzmISD :: GLOBAL_BASE_REG , DL , VT ) ;


const zmtarzmTargetLowering &TLI = DAG.getTargetLoweringInfo();

const zmtarzmTargetLowering & TLI = DAG . getTargetLoweringInfo ( ) ;


MVT PtrVT = TLI.getPointerTy(DAG.getDataLayout());

MVT PtrVT = TLI . getPointerTy ( DAG . getDataLayout ( ) ) ;


auto &Context = MF.getMMI().getContext();

auto & Context = MF . getMMI ( ) . getContext ( ) ;


MCSymbol *S = Context.getOrCreateSymbol(Twine("GCC_except_table") + Twine(MF.getFunctionNumber()));

MCSymbol * S = Context . getOrCreateSymbol ( Twine ( "GCC_except_table" ) + Twine ( MF . getFunctionNumber ( ) ) ) ;


return DAG.getNode(zmtarzmISD::Wrapper, DL, VT, DAG.getMCSymbol(S, PtrVT));

return DAG . getNode ( zmtarzmISD :: Wrapper , DL , VT , DAG . getMCSymbol ( S , PtrVT ) ) ;


SDValue zmtarzmTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerINTRINSIC_WO_CHAIN ( SDValue Op , SelectionDAG & DAG ) const {


MVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();

MVT PtrVT = DAG . getTargetLoweringInfo ( ) . getPointerTy ( ) ;


unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();

unsigned IntNo = cast < ConstantSDNode > ( Op . getOperand ( 0 ) ) -> getZExtValue ( ) ;


return DAG.getNode(zmtarzmISD::THREAD_POINTER, DL, PtrVT);

return DAG . getNode ( zmtarzmISD :: THREAD_POINTER , DL , PtrVT ) ;


if ( IntNo == Intrinsic :: zmtarzm_sjlj_lsda ) {

if (IntNo == Intrinsic::zmtarzm_sjlj_lsda) {


return DAG.getNode(zmtarzmISD::EH_SJLJ_SETJMP, DL, MVT::i32, Op.getOperand(1));

return DAG . getNode ( zmtarzmISD :: EH_SJLJ_SETJMP , DL , MVT :: i32 , Op . getOperand ( 1 ) ) ;


return DAG . getRegister ( zmtarzm :: G7 , PtrVT ) ;


SmallVector<SDValue, 16> Ops(std::next(Op->op_begin()), Op->op_end());

SmallVector < SDValue , 16 > Ops ( std :: next ( Op -> op_begin ( ) ) , Op -> op_end ( ) ) ;


Ops.push_back(DAG.getConstant(Size, DL, MVT::i257, SmallTuple));

Ops . push_back ( DAG . getConstant ( Size , DL , MVT :: i257 , SmallTuple ) ) ;


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


const zmtarzmTargetMachine *TM = static_cast<const zmtarzmTargetMachine *>(&DAG.getTarget());

const zmtarzmTargetMachine * TM = static_cast < const zmtarzmTargetMachine * > ( & DAG . getTarget ( ) ) ;


TM -> getStrList ( ) -> push_back ( std :: string ( ( Twine ( "GCC_except_table" ) + Twine ( MF . getFunctionNumber ( ) ) ) . str ( ) ) ) ;


SDValue Addr = DAG.getTargetExternalSymbol(TM->getStrList()->back().c_str(), VT, 0);

SDValue Addr = DAG . getTargetExternalSymbol ( TM -> getStrList ( ) -> back ( ) . c_str ( ) , VT , 0 ) ;


Addr = makeHiLoPair(Addr, zmtarzmMCExpr::VK_zmtarzm_GOTOFF_HI32, zmtarzmMCExpr::VK_zmtarzm_GOTOFF_LO32, DAG);

Addr = makeHiLoPair ( Addr , zmtarzmMCExpr :: VK_zmtarzm_GOTOFF_HI32 , zmtarzmMCExpr :: VK_zmtarzm_GOTOFF_LO32 , DAG ) ;


SDValue GlobalBase = DAG.getNode(zmtarzmISD::GLOBAL_BASE_REG, DL, VT);

SDValue GlobalBase = DAG . getNode ( zmtarzmISD :: GLOBAL_BASE_REG , DL , VT ) ;


return DAG . getNode ( ISD :: ADD , DL , VT , GlobalBase , Addr ) ;

return DAG.getNode(ISD::ADD, DL, VT, GlobalBase, Addr);


return makeHiLoPair ( Addr , zmtarzmMCExpr :: VK_zmtarzm_HI32 , zmtarzmMCExpr :: VK_zmtarzm_LO32 , DAG ) ;

return makeHiLoPair(Addr, zmtarzmMCExpr::VK_zmtarzm_HI32, zmtarzmMCExpr::VK_zmtarzm_LO32, DAG);


const zmtarzmTargetLowering &TLI = DAG.getTargetLoweringInfo();

const zmtarzmTargetLowering & TLI = DAG . getTargetLoweringInfo ( ) ;


MVT PtrVT = TLI.getPointerTy(DAG.getDataLayout());

MVT PtrVT = TLI . getPointerTy ( DAG . getDataLayout ( ) ) ;


auto &Context = MF.getMMI().getContext();

auto & Context = MF . getMMI ( ) . getContext ( ) ;


MCSymbol *S = Context.getOrCreateSymbol(Twine("GCC_except_table") + Twine(MF.getFunctionNumber()));

MCSymbol * S = Context . getOrCreateSymbol ( Twine ( "GCC_except_table" ) + Twine ( MF . getFunctionNumber ( ) ) ) ;


return DAG.getNode(zmtarzmISD::Wrapper, DL, VT, DAG.getMCSymbol(S, PtrVT));

return DAG . getNode ( zmtarzmISD :: Wrapper , DL , VT , DAG . getMCSymbol ( S , PtrVT ) ) ;


SDValue zmtarzmTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerINTRINSIC_WO_CHAIN ( SDValue Op , SelectionDAG & DAG ) const {


MVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();

MVT PtrVT = DAG . getTargetLoweringInfo ( ) . getPointerTy ( ) ;


unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();

unsigned IntNo = cast < ConstantSDNode > ( Op . getOperand ( 0 ) ) -> getZExtValue ( ) ;


return DAG.getNode(zmtarzmISD::THREAD_POINTER, DL, PtrVT);

return DAG . getNode ( zmtarzmISD :: THREAD_POINTER , DL , PtrVT ) ;


if ( IntNo == Intrinsic :: zmtarzm_lsda ) {


return DAG.getNode(zmtarzmISD::EH_SJLJ_SETJMP, DL, MVT::i32, Op.getOperand(1));

return DAG . getNode ( zmtarzmISD :: EH_SJLJ_SETJMP , DL , MVT :: i32 , Op . getOperand ( 1 ) ) ;


return DAG . getRegister ( zmtarzm :: G7 , PtrVT ) ;


SmallVector<SDValue, 16> Ops(std::next(Op->op_begin()), Op->op_end());

SmallVector < SDValue , 16 > Ops ( std :: next ( Op -> op_begin ( ) ) , Op -> op_end ( ) ) ;


Ops.push_back(DAG.getConstant(Size, DL, MVT::i257, SmallTuple));

Ops . push_back ( DAG . getConstant ( Size , DL , MVT :: i257 , SmallTuple ) ) ;


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


const zmtarzmTargetMachine *TM = static_cast<const zmtarzmTargetMachine *>(&DAG.getTarget());

const zmtarzmTargetMachine * TM = static_cast < const zmtarzmTargetMachine * > ( & DAG . getTarget ( ) ) ;


TM -> getStrList ( ) -> push_back ( std :: string ( ( Twine ( "GCC_except_table" ) + Twine ( MF . getFunctionNumber ( ) ) ) . str ( ) ) ) ;


SDValue Addr = DAG.getTargetExternalSymbol(TM->getStrList()->back().c_str(), VT, 0);

SDValue Addr = DAG . getTargetExternalSymbol ( TM -> getStrList ( ) -> back ( ) . c_str ( ) , VT , 0 ) ;


Addr = makeHiLoPair(Addr, zmtarzmMCExpr::VK_zmtarzm_GOTOFF_HI32, zmtarzmMCExpr::VK_zmtarzm_GOTOFF_LO32, DAG);

Addr = makeHiLoPair ( Addr , zmtarzmMCExpr :: VK_zmtarzm_GOTOFF_HI32 , zmtarzmMCExpr :: VK_zmtarzm_GOTOFF_LO32 , DAG ) ;


SDValue GlobalBase = DAG.getNode(zmtarzmISD::GLOBAL_BASE_REG, DL, VT);

SDValue GlobalBase = DAG . getNode ( zmtarzmISD :: GLOBAL_BASE_REG , DL , VT ) ;


const zmtarzmTargetLowering &TLI = DAG.getTargetLoweringInfo();

const zmtarzmTargetLowering & TLI = DAG . getTargetLoweringInfo ( ) ;


MVT PtrVT = TLI.getPointerTy(DAG.getDataLayout());

MVT PtrVT = TLI . getPointerTy ( DAG . getDataLayout ( ) ) ;


auto &Context = MF.getMMI().getContext();

auto & Context = MF . getMMI ( ) . getContext ( ) ;


MCSymbol *S = Context.getOrCreateSymbol(Twine("GCC_except_table") + Twine(MF.getFunctionNumber()));

MCSymbol * S = Context . getOrCreateSymbol ( Twine ( "GCC_except_table" ) + Twine ( MF . getFunctionNumber ( ) ) ) ;


return DAG.getNode(zmtarzmISD::Wrapper, DL, VT, DAG.getMCSymbol(S, PtrVT));

return DAG . getNode ( zmtarzmISD :: Wrapper , DL , VT , DAG . getMCSymbol ( S , PtrVT ) ) ;


SDValue zmtarzmTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerLOAD ( SDValue Op , SelectionDAG & DAG ) const {


StoreSDNode *StoreNode = cast<StoreSDNode>(Op);

StoreSDNode * StoreNode = cast < StoreSDNode > ( Op ) ;


assert (StoreNode && "Can only custom lower store nodes");

assert
(
StoreNode
&&
"Can only custom lower store nodes"
)
;


SDValue Value = StoreNode -> getValue ( ) ;


EVT MemVT = StoreNode -> getMemoryVT ( ) ;


assert (VT.isVector() && "Can only custom lower vector store types");


unsigned AS = StoreNode->getAddressSpace();

unsigned AS = StoreNode -> getAddressSpace ( ) ;


unsigned Align = StoreNode->getAlignment();

unsigned Align = StoreNode -> getAlignment ( ) ;


if (Align < MemVT.getStoreSize() && !allowsMisalignedMemoryAccesses(MemVT, AS, Align, StoreNode->getMemOperand()->getFlags(), nullptr)) {

if ( Align < MemVT . getStoreSize ( ) && ! allowsMisalignedMemoryAccesses ( MemVT , AS , Align , StoreNode -> getMemOperand ( ) -> getFlags ( ) , nullptr ) ) {


return scalarizeVectorStore ( StoreNode , DAG ) ;


if ( StoreNode -> isTruncatingStore ( ) ) {


return LowerTruncateVectorStore(Dl, StoreNode, VT, MemVT, DAG);

return LowerTruncateVectorStore ( Dl , StoreNode , VT , MemVT , DAG ) ;


if (VT == MVT::v2f16 && !allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(), VT, StoreNode->getAddressSpace(), StoreNode->getAlignment())) {

if ( VT == MVT :: v2f16 && ! allowsMemoryAccess ( * DAG . getContext ( ) , DAG . getDataLayout ( ) , VT , StoreNode -> getAddressSpace ( ) , StoreNode -> getAlignment ( ) ) ) {


return expandUnalignedStore ( Store , DAG ) ;


SDValue Val = DAG.getNode(ISD::BITCAST, dl, MVT::v2i32, StoreNode->getValue());

SDValue Val = DAG . getNode ( ISD :: BITCAST , dl , MVT :: v2i32 , StoreNode -> getValue ( ) ) ;


SDValue Chain = DAG.getStore(StoreNode->getChain(), dl, Val, StoreNode->getBasePtr(), StoreNode->getPointerInfo(), StoreNode->getAlignment(), StoreNode->getMemOperand()->getFlags(), StoreNode->getAAInfo());

SDValue Chain = DAG . getStore ( StoreNode -> getChain ( ) , dl , Val , StoreNode -> getBasePtr ( ) , StoreNode -> getPointerInfo ( ) , StoreNode -> getAlignment ( ) , StoreNode -> getMemOperand ( ) -> getFlags ( ) , StoreNode -> getAAInfo ( ) ) ;


SDValue zmtarzmTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerOperation ( SDValue Op , SelectionDAG & DAG ) const {


if ( Op . getOpcode ( ) == ISD :: MUL ) {


if ( Op . getOpcode ( ) == ISD :: ConstantPool ) {

if (Op.getOpcode() == ISD::ConstantPool) {


if ( Op . getOpcode ( ) == ISD :: SRL ) {


if ( Op . getOpcode ( ) == ISD :: GlobalAddress ) {

if (Op.getOpcode() == ISD::GlobalAddress) {


return LowerGlobalAddress ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: BlockAddress ) {

if (Op.getOpcode() == ISD::BlockAddress) {


if ( Op . getOpcode ( ) == ISD :: BR_CC ) {


if ( Op . getOpcode ( ) == ISD :: SELECT_CC ) {


if ( Op . getOpcode ( ) == ISD :: SETCC ) {


if ( Op . getOpcode ( ) == ISD :: VASTART ) {


if ( Op . getOpcode ( ) == ISD :: ExternalSymbol ) {

if (Op.getOpcode() == ISD::ExternalSymbol) {


return LowerExternalSymbol ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: SHL_PARTS ) {


if ( Op . getOpcode ( ) == ISD :: RETURNADDR ) {

if (Op.getOpcode() == ISD::RETURNADDR) {


if ( Op . getOpcode ( ) == ISD :: FRAMEADDR ) {


if ( Op . getOpcode ( ) == ISD :: JumpTable ) {


report_fatal_error
(
"unimplemented operand"
)
;


SDValue zmtarzmTargetLowering :: LowerOperation ( SDValue Op , SelectionDAG & DAG ) const {


if ( Op . getOpcode ( ) == ISD :: SELECT ) {


if ( Op . getOpcode ( ) == ISD :: SHL ) {


if ( Op . getOpcode ( ) == ISD :: SRA ) {


if ( Op . getOpcode ( ) == ISD :: SRL ) {


if ( Op . getOpcode ( ) == ISD :: ROTL ) {


if ( Op . getOpcode ( ) == ISD :: ROTR ) {


if ( Op . getOpcode ( ) == ISD :: GlobalAddress ) {


return LowerGlobalAddress ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: BlockAddress ) {


if ( Op . getOpcode ( ) == ISD :: BR_CC ) {


if ( Op . getOpcode ( ) == ISD :: SELECT_CC ) {


if ( Op . getOpcode ( ) == ISD :: SETCC ) {


if ( Op . getOpcode ( ) == ISD :: VASTART ) {


if ( Op . getOpcode ( ) == ISD :: SDIVREM ) {


if ( Op . getOpcode ( ) == ISD :: UDIVREM ) {


report_fatal_error
(
"unimplemented operand"
)
;


SDValue zmtarzmTargetLowering :: LowerOperation ( SDValue Op , SelectionDAG & DAG ) const {


if ( Op . getOpcode ( ) == ISD :: XOR ) {


if ( Op . getOpcode ( ) == ISD :: OR ) {


if ( Op . getOpcode ( ) == ISD :: AND ) {


return lowerGlobalTLSAddress ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: SELECT ) {


if ( Op . getOpcode ( ) == ISD :: ATOMIC_FENCE ) {

if (Op.getOpcode() == ISD::ATOMIC_FENCE) {


if ( Op . getOpcode ( ) == ISD :: ConstantPool ) {


if ( Op . getOpcode ( ) == ISD :: DYNAMIC_STACKALLOC ) {

if (Op.getOpcode() == ISD::DYNAMIC_STACKALLOC) {


return lowerDYNAMIC_STACKALLOC ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: GlobalAddress ) {


if ( Op . getOpcode ( ) == ISD :: LOAD ) {


if ( Op . getOpcode ( ) == ISD :: STORE ) {


if ( Op . getOpcode ( ) == ISD :: VASTART ) {


if ( Op . getOpcode ( ) == ISD :: VAARG ) {


if ( Op . getOpcode ( ) == ISD :: FrameIndex ) {

if (Op.getOpcode() == ISD::FrameIndex) {


return LowerGlobalAddress ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: ExternalSymbol ) {


return LowerExternalSymbol ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: JumpTable ) {


if ( Op . getOpcode ( ) == ISD :: BR_JT ) {


if ( Op . getOpcode ( ) == ISD :: RETURNADDR ) {


if ( Op . getOpcode ( ) == ISD :: FRAMEADDR ) {


if ( Op . getOpcode ( ) == ISD :: CopyToReg ) {


if ( Op . getOpcode ( ) == ISD :: EXTRACT_VECTOR_ELT ) {

if (Op.getOpcode() == ISD::EXTRACT_VECTOR_ELT) {


return LowerAccessVectorElement ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: INSERT_VECTOR_ELT ) {

if (Op.getOpcode() == ISD::INSERT_VECTOR_ELT) {


if ( Op . getOpcode ( ) == ISD :: INTRINSIC_VOID ) {

if (Op.getOpcode() == ISD::INTRINSIC_VOID) {


if ( Op . getOpcode ( ) == ISD :: INTRINSIC_WO_CHAIN ) {

if (Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN) {


if ( Op . getOpcode ( ) == ISD :: INTRINSIC_W_CHAIN ) {

if (Op.getOpcode() == ISD::INTRINSIC_W_CHAIN) {


if ( Op . getOpcode ( ) == ISD :: SIGN_EXTEND_INREG ) {

if (Op.getOpcode() == ISD::SIGN_EXTEND_INREG) {


return LowerSIGN_EXTEND_INREG ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: BUILD_VECTOR ) {

if (Op.getOpcode() == ISD::BUILD_VECTOR) {


if ( Op . getOpcode ( ) == ISD :: VECTOR_SHUFFLE ) {

if (Op.getOpcode() == ISD::VECTOR_SHUFFLE) {


return LowerVECTOR_SHUFFLE ( Op , DAG ) ;


if ( Op . getOpcode ( ) == ISD :: SHL ) {


if ( Op . getOpcode ( ) == ISD :: SRA ) {


if ( Op . getOpcode ( ) == ISD :: SRL ) {


report_fatal_error
(
"unimplemented operand"
)
;


SDValue zmtarzmTargetLowering::lowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const{

SDValue zmtarzmTargetLowering :: lowerRETURNADDR ( SDValue Op , SelectionDAG & DAG ) const {


const zmtarzmRegisterInfo &RI = *Subtarget.getRegisterInfo();

const zmtarzmRegisterInfo & RI = * Subtarget . getRegisterInfo ( ) ;


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


MachineFrameInfo &MFI = MF.getFrameInfo();

MachineFrameInfo & MFI = MF . getFrameInfo ( ) ;


MFI . setReturnAddressIsTaken ( true ) ;


if (verifyReturnAddressArgumentIsConstant(Op, DAG)) {

if ( verifyReturnAddressArgumentIsConstant ( Op , DAG ) ) {


unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();

unsigned Depth = cast < ConstantSDNode > ( Op . getOperand ( 0 ) ) -> getZExtValue ( ) ;


SDValue FrameAddr = lowerFRAMEADDR(Op, DAG);

SDValue FrameAddr = lowerFRAMEADDR ( Op , DAG ) ;


SDValue Offset = DAG.getConstant(Off, DL, VT);

SDValue Offset = DAG . getConstant ( Off , DL , VT ) ;


return DAG.getLoad(VT, DL, DAG.getEntryNode(), DAG.getNode(ISD::ADD, DL, VT, FrameAddr, Offset), MachinePointerInfo());

return DAG . getLoad ( VT , DL , DAG . getEntryNode ( ) , DAG . getNode ( ISD :: ADD , DL , VT , FrameAddr , Offset ) , MachinePointerInfo ( ) ) ;


Register Reg = MF.addLiveIn(RI.getRARegister(), getRegClassFor(XLenVT));

Register Reg = MF . addLiveIn ( RI . getRARegister ( ) , getRegClassFor ( XLenVT ) ) ;


return DAG.getCopyFromReg(DAG.getEntryNode(), DL, Reg, XLenVT);

return DAG . getCopyFromReg ( DAG . getEntryNode ( ) , DL , Reg , XLenVT ) ;


SDValue zmtarzmTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerReturn ( SDValue Chain , CallingConv :: ID CallConv , bool isVarArg , const SmallVectorImpl < ISD :: OutputArg > & Outs , const SmallVectorImpl < SDValue > & OutVals , const SDLoc & dl , SelectionDAG & DAG ) const {


auto *AFI = DAG.getMachineFunction().getInfo<zmtarzmFunctionInfo>();

auto * AFI = DAG . getMachineFunction ( ) . getInfo < zmtarzmFunctionInfo > ( ) ;


MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();

MachineFrameInfo * MFI = DAG . getMachineFunction ( ) . getFrameInfo ( ) ;


SmallVector < CCValAssign , 16 > RVLocs ;


CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), getTargetMachine(), RVLocs, *DAG.getContext());

CCState CCInfo ( CallConv , IsVarArg , DAG . getMachineFunction ( ) , getTargetMachine ( ) , RVLocs , * DAG . getContext ( ) ) ;


CCInfo . AllocateStack ( AFI -> getReturnStackOffset ( ) , 4 ) ;


CCInfo . AnalyzeReturn ( Outs , RetCC_zmtarzm ) ;


SmallVector < SDValue , 12 > MemOpChains ;


for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) {

for ( unsigned i = 0 , e = RVLocs . size ( ) ; i != e ; ++ i ) {


report_fatal_error("Can't return value from vararg function in memory");


unsigned ObjSize = VA.getLocVT().getStoreSize() / 8;

unsigned ObjSize = VA . getLocVT ( ) . getStoreSize ( ) / 8 ;


int FI = MFI->CreateFixedObject(ObjSize, Offset, false);

int FI = MFI -> CreateFixedObject ( ObjSize , Offset , false ) ;


SDValue FIN = DAG.getFrameIndex(FI, MVT::i32);

SDValue FIN = DAG . getFrameIndex ( FI , MVT :: i32 ) ;


MemOpChains.push_back(DAG.getStore(Chain, dl, OutVals[i], FIN, MachinePointerInfo::getFixedStack(FI), false, false, 0));

MemOpChains . push_back ( DAG . getStore ( Chain , dl , OutVals [ i ] , FIN , MachinePointerInfo :: getFixedStack ( FI ) , false , false , 0 ) ) ;


Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &MemOpChains[0], MemOpChains.size());

Chain = DAG . getNode ( ISD :: TokenFactor , dl , MVT :: Other , & MemOpChains [ 0 ] , MemOpChains . size ( ) ) ;


Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);

Chain = DAG . getCopyToReg ( Chain , dl , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ;


return DAG.getNode(#, dl, MVT::Other, Chain, DAG.getConstant(0, MVT::i32), Flag);

return DAG . getNode ( # , dl , MVT :: Other , Chain , DAG . getConstant ( 0 , MVT :: i32 ) , Flag ) ;

return DAG . getNode ( zmtarzmISD :: RET , dl , MVT :: Other , Chain , DAG . getConstant ( 0 , MVT :: i32 ) , Flag ) ;

return DAG.getNode(zmtarzmISD::RET, dl, MVT::Other, Chain, DAG.getConstant(0, MVT::i32), Flag);


return DAG.getNode(#, dl, MVT::Other, Chain, DAG.getConstant(0, MVT::i32));

return DAG . getNode ( # , dl , MVT :: Other , Chain , DAG . getConstant ( 0 , MVT :: i32 ) ) ;

return DAG . getNode ( zmtarzmISD :: RET , dl , MVT :: Other , Chain , DAG . getConstant ( 0 , MVT :: i32 ) ) ;

return DAG.getNode(zmtarzmISD::RET, dl, MVT::Other, Chain, DAG.getConstant(0, MVT::i32));


SDValue zmtarzmTargetLowering :: LowerReturn ( SDValue Chain , CallingConv :: ID CallConv , bool isVarArg , const SmallVectorImpl < ISD :: OutputArg > & Outs , const SmallVectorImpl < SDValue > & OutVals , const SDLoc & dl , SelectionDAG & DAG ) const {


auto * AFI = DAG . getMachineFunction ( ) . getInfo < zmtarzmFunctionInfo > ( ) ;


MachineFrameInfo * MFI = DAG . getMachineFunction ( ) . getFrameInfo ( ) ;


SmallVector < CCValAssign , 16 > RVLocs ;


CCState CCInfo ( CallConv , IsVarArg , DAG . getMachineFunction ( ) , getTargetMachine ( ) , RVLocs , * DAG . getContext ( ) ) ;


CCInfo . AllocateStack ( AFI -> getReturnStackOffset ( ) , 4 ) ;


CCInfo . AnalyzeReturn ( Outs , RetCC_zmtarzm ) ;


SmallVector < SDValue , 12 > MemOpChains ;


for ( unsigned i = 0 , e = RVLocs . size ( ) ; i != e ; ++ i ) {


"Can't return value from vararg function in memory"


unsigned ObjSize = VA . getLocVT ( ) . getStoreSize ( ) / 8 ;


int FI = MFI -> CreateFixedObject ( ObjSize , Offset , false ) ;


SDValue FIN = DAG . getFrameIndex ( FI , MVT :: i32 ) ;


MemOpChains . push_back ( DAG . getStore ( Chain , dl , OutVals [ i ] , FIN , MachinePointerInfo :: getFixedStack ( FI ) , false , false , 0 ) ) ;


Chain = DAG . getNode ( ISD :: TokenFactor , dl , MVT :: Other , & MemOpChains [ 0 ] , MemOpChains . size ( ) ) ;


Chain = DAG . getCopyToReg ( Chain , dl , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ;


return DAG . getNode ( # , dl , MVT :: Other , Chain , DAG . getConstant ( 0 , MVT :: i32 ) , Flag ) ;

return DAG . getNode ( zmtarzmISD :: RET_FLAG , dl , MVT :: Other , Chain , DAG . getConstant ( 0 , MVT :: i32 ) , Flag ) ;

return DAG.getNode(zmtarzmISD::RET_FLAG, dl, MVT::Other, Chain, DAG.getConstant(0, MVT::i32), Flag);


return DAG . getNode ( # , dl , MVT :: Other , Chain , DAG . getConstant ( 0 , MVT :: i32 ) ) ;

return DAG . getNode ( zmtarzmISD :: RET_FLAG , dl , MVT :: Other , Chain , DAG . getConstant ( 0 , MVT :: i32 ) ) ;

return DAG.getNode(zmtarzmISD::RET_FLAG, dl, MVT::Other, Chain, DAG.getConstant(0, MVT::i32));


SDValue zmtarzmTargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerSELECT_CC ( SDValue Op , SelectionDAG & DAG ) const {


SDValue Cond = DAG.getNode(ISD::SETCC, dl, MVT::i32, Op.getOperand(2), Op.getOperand(3), Op.getOperand(4));

SDValue Cond = DAG . getNode ( ISD :: SETCC , dl , MVT :: i32 , Op . getOperand ( 2 ) , Op . getOperand ( 3 ) , Op . getOperand ( 4 ) ) ;


return DAG.getNode(ISD::SELECT, dl, MVT::i32, Cond, Op.getOperand(0),Op.getOperand(1));

return DAG . getNode ( ISD :: SELECT , dl , MVT :: i32 , Cond , Op . getOperand ( 0 ) , Op . getOperand ( 1 ) ) ;


SDValue zmtarzmTargetLowering::LowerSMUL_LOHI(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerSMUL_LOHI ( SDValue Op , SelectionDAG & DAG ) const {


lowerMUL_LOHI32(DAG, DL, ISD::SIGN_EXTEND, Op.getOperand(0), Op.getOperand(1), Ops[1], Ops[0]);

lowerMUL_LOHI32 ( DAG , DL , ISD :: SIGN_EXTEND , Op . getOperand ( 0 ) , Op . getOperand ( 1 ) , Ops [ 1 ] , Ops [ 0 ] ) ;


else if (Subtarget.hasMiscellaneousExtensions2()) {

else if ( Subtarget . hasMiscellaneousExtensions2 ( ) ) {


lowerGR128Binary(DAG, DL, VT, zmtarzmISD::SMUL_LOHI, Op.getOperand(0), Op.getOperand(1), Ops[1], Ops[0]);

lowerGR128Binary ( DAG , DL , VT , zmtarzmISD :: SMUL_LOHI , Op . getOperand ( 0 ) , Op . getOperand ( 1 ) , Ops [ 1 ] , Ops [ 0 ] ) ;


SDValue C63 = DAG.getConstant(63, DL, MVT::i64);

SDValue C63 = DAG . getConstant ( 63 , DL , MVT :: i64 ) ;


SDValue LH = DAG.getNode(ISD::SRA, DL, VT, LL, C63);

SDValue LH = DAG . getNode ( ISD :: SRA , DL , VT , LL , C63 ) ;


SDValue RH = DAG.getNode(ISD::SRA, DL, VT, RL, C63);

SDValue RH = DAG . getNode ( ISD :: SRA , DL , VT , RL , C63 ) ;


lowerGR128Binary(DAG, DL, VT, zmtarzmISD::UMUL_LOHI, LL, RL, Ops[1], Ops[0]);

lowerGR128Binary ( DAG , DL , VT , zmtarzmISD :: UMUL_LOHI , LL , RL , Ops [ 1 ] , Ops [ 0 ] ) ;


SDValue NegLLTimesRH = DAG.getNode(ISD::AND, DL, VT, LL, RH);

SDValue NegLLTimesRH = DAG . getNode ( ISD :: AND , DL , VT , LL , RH ) ;


SDValue NegLHTimesRL = DAG.getNode(ISD::AND, DL, VT, LH, RL);

SDValue NegLHTimesRL = DAG . getNode ( ISD :: AND , DL , VT , LH , RL ) ;


SDValue NegSum = DAG.getNode(ISD::ADD, DL, VT, NegLLTimesRH, NegLHTimesRL);

SDValue NegSum = DAG . getNode ( ISD :: ADD , DL , VT , NegLLTimesRH , NegLHTimesRL ) ;


Ops[1] = DAG.getNode(ISD::SUB, DL, VT, Ops[1], NegSum);

Ops [ 1 ] = DAG . getNode ( ISD :: SUB , DL , VT , Ops [ 1 ] , NegSum ) ;


return DAG . getMergeValues ( Ops , DL ) ;


SDValue zmtarzmTargetLowering::LowerSTACKSAVE(SDValue Op,  SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerSTACKSAVE ( SDValue Op , SelectionDAG & DAG ) const {


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


MF . getInfo < zmtarzmMachineFunctionInfo > ( ) -> setManipulatesSP ( true ) ;


return DAG.getCopyFromReg(Op.getOperand(0), SDLoc(Op), zmtarzm::R15D, Op.getValueType());

return DAG . getCopyFromReg ( Op . getOperand ( 0 ) , SDLoc ( Op ) , zmtarzm :: R15D , Op . getValueType ( ) ) ;


SDValue zmtarzmTargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerSTORE ( SDValue Op , SelectionDAG & DAG ) const {


StoreSDNode *StoreNode = cast<StoreSDNode>(Op);

StoreSDNode * StoreNode = cast < StoreSDNode > ( Op ) ;


assert (StoreNode && "Can only custom lower store nodes");

assert
(
StoreNode
&&
"Can only custom lower store nodes"
)
;


SDValue Value = StoreNode -> getValue ( ) ;


EVT MemVT = StoreNode -> getMemoryVT ( ) ;


assert (VT.isVector() && "Can only custom lower vector store types");


unsigned AS = StoreNode->getAddressSpace();

unsigned AS = StoreNode -> getAddressSpace ( ) ;


unsigned Align = StoreNode->getAlignment();

unsigned Align = StoreNode -> getAlignment ( ) ;


if (Align < MemVT.getStoreSize() && !allowsMisalignedMemoryAccesses(MemVT, AS, Align, StoreNode->getMemOperand()->getFlags(), nullptr)) {

if ( Align < MemVT . getStoreSize ( ) && ! allowsMisalignedMemoryAccesses ( MemVT , AS , Align , StoreNode -> getMemOperand ( ) -> getFlags ( ) , nullptr ) ) {


return scalarizeVectorStore ( StoreNode , DAG ) ;


if ( StoreNode -> isTruncatingStore ( ) ) {


return LowerTruncateVectorStore(Dl, StoreNode, VT, MemVT, DAG);

return LowerTruncateVectorStore ( Dl , StoreNode , VT , MemVT , DAG ) ;


if (VT == MVT::v2f16 && !allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(), VT, StoreNode->getAddressSpace(), StoreNode->getAlignment())) {

if ( VT == MVT :: v2f16 && ! allowsMemoryAccess ( * DAG . getContext ( ) , DAG . getDataLayout ( ) , VT , StoreNode -> getAddressSpace ( ) , StoreNode -> getAlignment ( ) ) ) {


return expandUnalignedStore ( Store , DAG ) ;


SDValue Val = DAG.getNode(ISD::BITCAST, dl, MVT::v2i32, StoreNode->getValue());

SDValue Val = DAG . getNode ( ISD :: BITCAST , dl , MVT :: v2i32 , StoreNode -> getValue ( ) ) ;


SDValue Chain = DAG.getStore(StoreNode->getChain(), dl, Val, StoreNode->getBasePtr(), StoreNode->getPointerInfo(), StoreNode->getAlignment(), StoreNode->getMemOperand()->getFlags(), StoreNode->getAAInfo());

SDValue Chain = DAG . getStore ( StoreNode -> getChain ( ) , dl , Val , StoreNode -> getBasePtr ( ) , StoreNode -> getPointerInfo ( ) , StoreNode -> getAlignment ( ) , StoreNode -> getMemOperand ( ) -> getFlags ( ) , StoreNode -> getAAInfo ( ) ) ;


SDValue zmtarzmTargetLowering::LowerUMUL_LOHI(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerUMUL_LOHI ( SDValue Op , SelectionDAG & DAG ) const {


lowerMUL_LOHI32(DAG, DL, ISD::ZERO_EXTEND, Op.getOperand(0), Op.getOperand(1), Ops[1], Ops[0]);

lowerMUL_LOHI32 ( DAG , DL , ISD :: ZERO_EXTEND , Op . getOperand ( 0 ) , Op . getOperand ( 1 ) , Ops [ 1 ] , Ops [ 0 ] ) ;


lowerGR128Binary(DAG, DL, VT, zmtarzmISD::UMUL_LOHI, Op.getOperand(0), Op.getOperand(1), Ops[1], Ops[0]);

lowerGR128Binary ( DAG , DL , VT , zmtarzmISD :: UMUL_LOHI , Op . getOperand ( 0 ) , Op . getOperand ( 1 ) , Ops [ 1 ] , Ops [ 0 ] ) ;


return DAG . getMergeValues ( Ops , DL ) ;


SDValue zmtarzmTargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerVAARG ( SDValue Op , SelectionDAG & DAG ) const {


SDValue InChain = Node -> getOperand ( 0 ) ;


SDValue VAListPtr = Node->getOperand(1);

SDValue VAListPtr = Node -> getOperand ( 1 ) ;


const Value *SV = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();

const Value * SV = cast < SrcValueSDNode > ( Node -> getOperand ( 2 ) ) -> getValue ( ) ;


SDValue VAList = DAG.getLoad(getPointerTy(), DL, InChain, VAListPtr, MachinePointerInfo(SV), false, false, 0);

SDValue VAList = DAG . getLoad ( getPointerTy ( ) , DL , InChain , VAListPtr , MachinePointerInfo ( SV ) , false , false , 0 ) ;


SDValue NextPtr = DAG.getNode(ISD::ADD, DL, getPointerTy(), VAList, DAG.getIntPtrConstant(VT.getSizeInBits(), getPointerTy()));

SDValue NextPtr = DAG . getNode ( ISD :: ADD , DL , getPointerTy ( ) , VAList , DAG . getIntPtrConstant ( VT . getSizeInBits ( ) , getPointerTy ( ) ) ) ;


NextPtr = DAG.getStore(VAList.getValue(1), DL, NextPtr, VAListPtr, MachinePointerInfo(SV), false, false, 0);

NextPtr = DAG . getStore ( VAList . getValue ( 1 ) , DL , NextPtr , VAListPtr , MachinePointerInfo ( SV ) , false , false , 0 ) ;


return DAG.getLoad(VT, DL, InChain, VAList, MachinePointerInfo(), false, false, 0);

return DAG . getLoad ( VT , DL , InChain , VAList , MachinePointerInfo ( ) , false , false , 0 ) ;


SDValue zmtarzmTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {

SDValue zmtarzmTargetLowering :: LowerVASTART ( SDValue Op , SelectionDAG & DAG ) const {


MachineFunction &MF = DAG.getMachineFunction();

MachineFunction & MF = DAG . getMachineFunction ( ) ;


zmtarzmFunctionInfo *FuncInfo = MF.getInfo<zmtarzmFunctionInfo>();

zmtarzmFunctionInfo * FuncInfo = MF . getInfo < zmtarzmFunctionInfo > ( ) ;


SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), MVT::i32);

SDValue FR = DAG . getFrameIndex ( FuncInfo -> getVarArgsFrameIndex ( ) , MVT :: i32 ) ;


return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1), MachinePointerInfo(), false, false, 0);

return DAG . getStore ( Op . getOperand ( 0 ) , dl , FR , Op . getOperand ( 1 ) , MachinePointerInfo ( ) , false , false , 0 ) ;


SDValue zmtarzmTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const {

SDValue zmtarzmTargetLowering :: PerformDAGCombine ( SDNode * N , DAGCombinerInfo & DCI ) const {


if ( N -> getOpcode ( ) == ISD :: AND ) {


if ( N -> getOpcode ( ) == ISD :: OR ) {


return PerformORCombine ( N , DCI , getSubtarget ( ) ) ;

return PerformORCombine(N, DCI, getSubtarget());


if ( N -> getOpcode ( ) == ISD :: SHL ) {


return PerformShiftCombine ( N , DCI , getSubtarget ( ) ) ;

return PerformShiftCombine(N, DCI, getSubtarget());


if ( N -> getOpcode ( ) == ISD :: SRA ) {


if ( N -> getOpcode ( ) == ISD :: SRL ) {


if ( N -> getOpcode ( ) == ISD :: INTRINSIC_WO_CHAIN ) {

if (N->getOpcode() == ISD::INTRINSIC_WO_CHAIN) {


return PerformIntrinsicCombine ( N , DCI . DAG ) ;


if ( N -> getOpcode ( ) == ISD :: NEON_VDUPLANE ) {

if (N->getOpcode() == ISD::NEON_VDUPLANE) {


if ( N -> getOpcode ( ) == ISD :: NEON_LD2DUP ) {

if (N->getOpcode() == ISD::NEON_LD2DUP) {


if ( N -> getOpcode ( ) == ISD :: NEON_LD3DUP ) {

if (N->getOpcode() == ISD::NEON_LD3DUP) {


if ( N -> getOpcode ( ) == ISD :: NEON_LD4DUP ) {

if (N->getOpcode() == ISD::NEON_LD4DUP) {


if ( N -> getOpcode ( ) == ISD :: INTRINSIC_VOID ) {

if (N->getOpcode() == ISD::INTRINSIC_VOID) {


if ( N -> getOpcode ( ) == ISD :: INTRINSIC_W_CHAIN ) {

if (N->getOpcode() == ISD::INTRINSIC_W_CHAIN) {


if ( N -> getOpcode ( ) == ISD :: ADD ) {


return combineSelectAndUseCommutative ( N , DCI , false ) ;

return combineSelectAndUseCommutative(N, DCI, false);


if ( N -> getOpcode ( ) == ISD :: XOR ) {


if ( N -> getOpcode ( ) == ISD :: AND ) {


return combineSelectAndUseCommutative ( N , DCI , true ) ;

return combineSelectAndUseCommutative(N, DCI,  true);


if ( N -> getOpcode ( ) == ISD :: SUB ) {


SDValue zmtarzmTargetLowering :: PerformDAGCombine ( SDNode * N , DAGCombinerInfo & DCI ) const {


if ( N -> getOpcode ( ) == ISD :: SUBX ) {


if ( N -> getOpcode ( ) == ISD :: ADDX ) {


if ( N -> getOpcode ( ) == ISD :: SETCC ) {


return combinezmtarzmSetCC ( N , DAG , Subtarget ) ;

return combinezmtarzmSetCC(N, DAG, Subtarget);


if ( N -> getOpcode ( ) == ISD :: BRCOND ) {


return combinezmtarzmBrCond ( N , DAG , Subtarget ) ;

return combinezmtarzmBrCond(N, DAG, Subtarget);


if ( N -> getOpcode ( ) == ISD :: VECTOR_SHUFFLE ) {

if (N->getOpcode() == ISD::VECTOR_SHUFFLE) {


return performVECTOR_SHUFFLECombine ( N , DCI ) ;


if ( N -> getOpcode ( ) == ISD :: SIGN_EXTEND ) {

if (N->getOpcode() == ISD::SIGN_EXTEND) {


return performVectorExtendCombine ( N , DCI ) ;


if ( N -> getOpcode ( ) == ISD :: ZERO_EXTEND ) {

if (N->getOpcode() == ISD::ZERO_EXTEND) {


if ( N -> getOpcode ( ) == ISD :: FP_TO_SINT_SAT ) {

if (N->getOpcode() == ISD::FP_TO_SINT_SAT) {


return performVectorTruncZeroCombine ( N , DCI ) ;


if ( N -> getOpcode ( ) == ISD :: FP_TO_UINT_SAT ) {

if (N->getOpcode() == ISD::FP_TO_UINT_SAT) {


if ( N -> getOpcode ( ) == ISD :: FP_ROUND ) {


if ( N -> getOpcode ( ) == ISD :: CONCAT_VECTORS ) {

if (N->getOpcode() == ISD::CONCAT_VECTORS) {


void zmtarzmTargetLowering::ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results, SelectionDAG &DAG) const {

void zmtarzmTargetLowering :: ReplaceNodeResults ( SDNode * N , SmallVectorImpl < SDValue > & Results , SelectionDAG & DAG ) const {


if ( N -> getOpcode ( ) == ISD :: READ_REGISTER ) {

if (N->getOpcode() == ISD::READ_REGISTER) {


ExpandREAD_REGISTER ( N , Results , DAG ) ;


if ( N -> getOpcode ( ) == ISD :: BITCAST ) {


Res = ExpandBITCAST ( N , DAG , Subtarget ) ;


if ( N -> getOpcode ( ) == ISD :: SRL ) {


ReplaceBITCASTResults ( N , Results , DAG ) ;


Res = Expand64BitShift(N, DAG, Subtarget);

Res = Expand64BitShift ( N , DAG , Subtarget ) ;


if ( N -> getOpcode ( ) == ISD :: SRA ) {


Results . push_back ( LowerVECREDUCE ( SDValue ( N , 0 ) , DAG ) ) ;


if ( N -> getOpcode ( ) == ISD :: SHL ) {


if ( N -> getOpcode ( ) == ISD :: SREM ) {


if ( N -> getOpcode ( ) == ISD :: UREM ) {


if ( N -> getOpcode ( ) == ISD :: SDIVREM ) {


Res = LowerDivRem ( SDValue ( N , 0 ) , DAG ) ;


assert
(
Res
.
getNumOperands
(
)
==
2
&&
"DivRem needs two values"
)
;

assert(Res.getNumOperands() == 2 && "DivRem needs two values");


Results . push_back ( Res . getValue ( 0 ) ) ;


Results . push_back ( Res . getValue ( 1 ) ) ;


if ( N -> getOpcode ( ) == ISD :: UDIVREM ) {


Results . push_back ( LowerCTPOP ( SDValue ( N , 0 ) , DAG ) ) ;


if ( N -> getOpcode ( ) == ISD :: SADDSAT ) {


ReplaceReductionResults(N, Results, DAG, ISD::ADD, zmtarzmISD::SADDV);

ReplaceReductionResults ( N , Results , DAG , ISD :: ADD , zmtarzmISD :: SADDV ) ;


Res = LowerSADDSUBSAT(SDValue(N, 0), DAG, Subtarget);

Res = LowerSADDSUBSAT ( SDValue ( N , 0 ) , DAG , Subtarget ) ;


if ( N -> getOpcode ( ) == ISD :: SSUBSAT ) {


ReplaceReductionResults(N, Results, DAG, ISD::ADD, zmtarzmISD::UADDV);

ReplaceReductionResults ( N , Results , DAG , ISD :: ADD , zmtarzmISD :: UADDV ) ;


if ( N -> getOpcode ( ) == ISD :: READCYCLECOUNTER ) {

if (N->getOpcode() == ISD::READCYCLECOUNTER) {


ReplaceReductionResults(N, Results, DAG, ISD::SMIN, zmtarzmISD::SMINVV);

ReplaceReductionResults ( N , Results , DAG , ISD :: SMIN , zmtarzmISD :: SMINVV ) ;


ReplaceREADCYCLECOUNTER(N, Results, DAG, Subtarget);

ReplaceREADCYCLECOUNTER ( N , Results , DAG , Subtarget ) ;


if ( N -> getOpcode ( ) == ISD :: UDIV ) {


ReplaceReductionResults(N, Results, DAG, ISD::UMINV, zmtarzmISD::UMINV);

ReplaceReductionResults ( N , Results , DAG , ISD :: UMINV , zmtarzmISD :: UMINV ) ;


assert
(
Subtarget
->
isTargetWindows
(
)
&&
"can only expand DIV on Windows"
)
;

assert(Subtarget->isTargetWindows() && "can only expand DIV on Windows");


return ExpandDIV_Windows(SDValue(N, 0), DAG, N->getOpcode() == ISD::SDIV, Results);

return ExpandDIV_Windows ( SDValue ( N , 0 ) , DAG , N -> getOpcode ( ) == ISD :: SDIV , Results ) ;


if ( N -> getOpcode ( ) == ISD :: FP_TO_UINT ) {

if (N->getOpcode() == ISD::FP_TO_UINT) {


ReplaceReductionResults(N, Results, DAG, ISD::SMAX, zmtarzmISD::SMAXVV);

ReplaceReductionResults ( N , Results , DAG , ISD :: SMAX , zmtarzmISD :: SMAXVV ) ;


assert
(
N
->
getValueType
(
0
)
==
MVT
::
i128
&&
"unexpected illegal conversion"
)
;

assert(N->getValueType(0) == MVT::i128 && "unexpected illegal conversion");


if ( N -> getOpcode ( ) == ISD :: FP_TO_SINT ) {

if (N->getOpcode() == ISD::FP_TO_SINT) {


ReplaceReductionResults(N, Results, DAG, ISD::UMAX, zmtarzmISD::UMAXVV);

ReplaceReductionResults ( N , Results , DAG , ISD :: UMAX , zmtarzmISD :: UMAXVV ) ;


RTLIB::Libcall libCall = RTLIB::UNKNOWN_LIBCALL;

RTLIB :: Libcall libCall = RTLIB :: UNKNOWN_LIBCALL ;


if ( N -> getOpcode ( ) == ISD :: ATOMIC_CMP_SWAP ) {

if (N->getOpcode() == ISD::ATOMIC_CMP_SWAP) {


ReplaceCMP_SWAP_128Results(N, Results, DAG, Subtarget);

ReplaceCMP_SWAP_128Results ( N , Results , DAG , Subtarget ) ;


if (N->getOperand(0).getValueType() != MVT::f128) {

if ( N -> getOperand ( 0 ) . getValueType ( ) != MVT :: f128 ) {


if ( N -> getValueType ( 0 ) != MVT :: i64 ) {


Results.push_back(LowerF128Op(SDValue(N, 0), DAG, getLibcallName(libCall), 1));

Results . push_back ( LowerF128Op ( SDValue ( N , 0 ) , DAG , getLibcallName ( libCall ) , 1 ) ) ;


if ( N -> getOpcode ( ) == ISD :: LOAD ) {


assert
(
SDValue
(
N
,
0
)
.
getValueType
(
)
==
MVT
::
i128
&&
"unexpected load's value type"
)
;

assert(SDValue(N, 0).getValueType() == MVT::i128 && "unexpected load's value type");


LoadSDNode *LoadNode = cast<LoadSDNode>(N);

LoadSDNode * LoadNode = cast < LoadSDNode > ( N ) ;


if (LoadNode->getMemoryVT() != MVT::i128) {

if ( LoadNode -> getMemoryVT ( ) != MVT :: i128 ) {


SDValue Result = DAG.getMemIntrinsicNode(zmtarzmISD::LDP, SDLoc(N), DAG.getVTList({MVT::i64, MVT::i64, MVT::Other}), {LoadNode->getChain(), LoadNode->getBasePtr()}, LoadNode->getMemoryVT(), LoadNode->getMemOperand());

SDValue Result = DAG . getMemIntrinsicNode ( zmtarzmISD :: LDP , SDLoc ( N ) , DAG . getVTList ( { MVT :: i64 , MVT :: i64 , MVT :: Other } ) , { LoadNode -> getChain ( ) , LoadNode -> getBasePtr ( ) } , LoadNode -> getMemoryVT ( ) , LoadNode -> getMemOperand ( ) ) ;


SDValue Pair = DAG.getNode(ISD::BUILD_PAIR, SDLoc(N), MVT::i128, Result.getValue(0), Result.getValue(1));

SDValue Pair = DAG . getNode ( ISD :: BUILD_PAIR , SDLoc ( N ) , MVT :: i128 , Result . getValue ( 0 ) , Result . getValue ( 1 ) ) ;


Results.append({Pair, Result.getValue(2)  });

Results . append ( { Pair , Result . getValue ( 2 ) } ) ;


if ( N -> getOpcode ( ) == ISD :: EXTRACT_SUBVECTOR ) {

if (N->getOpcode() == ISD::EXTRACT_SUBVECTOR) {


ReplaceExtractSubVectorResults ( N , Results , DAG ) ;


SDValue Lo = DAG.getCopyFromReg(N->getOperand(0), DL, zmtarzm::ASR23, MVT::i32);

SDValue Lo = DAG . getCopyFromReg ( N -> getOperand ( 0 ) , DL , zmtarzm :: ASR23 , MVT :: i32 ) ;


SDValue Hi = DAG.getCopyFromReg(Lo, DL, zmtarzm::G0, MVT::i32);

SDValue Hi = DAG . getCopyFromReg ( Lo , DL , zmtarzm :: G0 , MVT :: i32 ) ;


SDValue Pair = DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Ops);

SDValue Pair = DAG . getNode ( ISD :: BUILD_PAIR , DL , MVT :: i64 , Ops ) ;


Results . push_back ( N -> getOperand ( 0 ) ) ;


if ( N -> getOpcode ( ) == ISD :: INTRINSIC_WO_CHAIN ) {

if (N->getOpcode() == ISD::INTRINSIC_WO_CHAIN) {


if ( N -> getValueType ( 0 ) != MVT :: f128 ) {


if (N->getOperand(0).getValueType() != MVT::i64) {

if ( N -> getOperand ( 0 ) . getValueType ( ) != MVT :: i64 ) {


Results . push_back ( LowerF128Op ( SDValue ( N , 0 ) , DAG , getLibcallName ( libCall ) , 1 ) ) ;


return ReplaceLongIntrinsic(N, Results, DAG);

return ReplaceLongIntrinsic ( N , Results , DAG ) ;


if ( N -> getOpcode ( ) == ISD :: ABS ) {


ReplaceLongIntrinsic ( N , Results , DAG ) ;


if ( N -> getOpcode ( ) == ISD :: LOAD ) {


ConstantSDNode *CN = cast<ConstantSDNode>(N->getOperand(0));

ConstantSDNode * CN = cast < ConstantSDNode > ( N -> getOperand ( 0 ) ) ;


Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue());

Intrinsic :: ID IntID = static_cast < Intrinsic :: ID > ( CN -> getZExtValue ( ) ) ;


if (IntID == Intrinsic::aarch64_sve_clasta_n) {

if ( IntID == Intrinsic :: aarch64_sve_clasta_n ) {


auto Op2 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, N->getOperand(2));

auto Op2 = DAG . getNode ( ISD :: ANY_EXTEND , DL , MVT :: i32 , N -> getOperand ( 2 ) ) ;


auto V = DAG.getNode(zmtarzmISD::CLASTA_N, DL, MVT::i32, N->getOperand(1), Op2, N->getOperand(3));

auto V = DAG . getNode ( zmtarzmISD :: CLASTA_N , DL , MVT :: i32 , N -> getOperand ( 1 ) , Op2 , N -> getOperand ( 3 ) ) ;


Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, VT, V));

Results . push_back ( DAG . getNode ( ISD :: TRUNCATE , DL , VT , V ) ) ;


if (IntID == Intrinsic::aarch64_sve_lasta) {

if ( IntID == Intrinsic :: aarch64_sve_lasta ) {


auto V = DAG.getNode(zmtarzmISD::LASTA, DL, MVT::i32, N->getOperand(1), N->getOperand(2));

auto V = DAG . getNode ( zmtarzmISD :: LASTA , DL , MVT :: i32 , N -> getOperand ( 1 ) , N -> getOperand ( 2 ) ) ;


if (IntID == Intrinsic::aarch64_sve_lastb) {

if ( IntID == Intrinsic :: aarch64_sve_lastb ) {


auto V = DAG.getNode(zmtarzmISD::LASTB, DL, MVT::i32, N->getOperand(1), N->getOperand(2));

auto V = DAG . getNode ( zmtarzmISD :: LASTB , DL , MVT :: i32 , N -> getOperand ( 1 ) , N -> getOperand ( 2 ) ) ;


LoadSDNode * Ld = cast < LoadSDNode > ( N ) ;


if ( Ld -> getValueType ( 0 ) != MVT :: i64 ) {


if ( Ld -> getMemoryVT ( ) != MVT :: i64 ) {


SDValue LoadRes = DAG.getExtLoad(Ld->getExtensionType(), DL, MVT::v2i32, Ld->getChain(), Ld->getBasePtr(), Ld->getPointerInfo(), MVT::v2i32, Ld->getAlignment(), Ld->getMemOperand()->getFlags(), Ld->getAAInfo());

SDValue LoadRes = DAG . getExtLoad ( Ld -> getExtensionType ( ) , DL , MVT :: v2i32 , Ld -> getChain ( ) , Ld -> getBasePtr ( ) , Ld -> getPointerInfo ( ) , MVT :: v2i32 , Ld -> getAlignment ( ) , Ld -> getMemOperand ( ) -> getFlags ( ) , Ld -> getAAInfo ( ) ) ;


SDValue Res = DAG.getNode(ISD::BITCAST, DL, MVT::i64, LoadRes);

SDValue Res = DAG . getNode ( ISD :: BITCAST , DL , MVT :: i64 , LoadRes ) ;


Results . push_back ( LoadRes . getValue ( 1 ) ) ;


llvm_unreachable("Don't know how to custom expand this");

llvm_unreachable
(
"Don't know how to custom expand this"
)
;


void zmtarzmTargetLowering::ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results, SelectionDAG &DAG) const {

void zmtarzmTargetLowering :: ReplaceNodeResults ( SDNode * N , SmallVectorImpl < SDValue > & Results , SelectionDAG & DAG ) const {


ExpandREAD_REGISTER ( N , Results , DAG ) ;


Res = ExpandBITCAST ( N , DAG , Subtarget ) ;


ReplaceBITCASTResults ( N , Results , DAG ) ;


Res = Expand64BitShift(N, DAG, Subtarget);

Res = Expand64BitShift ( N , DAG , Subtarget ) ;


Results . push_back ( LowerVECREDUCE ( SDValue ( N , 0 ) , DAG ) ) ;


Res = LowerDivRem ( SDValue ( N , 0 ) , DAG ) ;


Results . push_back ( Res . getValue ( 0 ) ) ;


Results . push_back ( Res . getValue ( 1 ) ) ;


Results . push_back ( LowerCTPOP ( SDValue ( N , 0 ) , DAG ) ) ;


ReplaceReductionResults(N, Results, DAG, ISD::ADD, zmtarzmISD::SADDV);

ReplaceReductionResults ( N , Results , DAG , ISD :: ADD , zmtarzmISD :: SADDV ) ;


Res = LowerSADDSUBSAT(SDValue(N, 0), DAG, Subtarget);

Res = LowerSADDSUBSAT ( SDValue ( N , 0 ) , DAG , Subtarget ) ;


ReplaceReductionResults(N, Results, DAG, ISD::ADD, zmtarzmISD::UADDV);

ReplaceReductionResults ( N , Results , DAG , ISD :: ADD , zmtarzmISD :: UADDV ) ;


ReplaceReductionResults(N, Results, DAG, ISD::SMIN, zmtarzmISD::SMINVV);

ReplaceReductionResults ( N , Results , DAG , ISD :: SMIN , zmtarzmISD :: SMINVV ) ;


ReplaceREADCYCLECOUNTER(N, Results, DAG, Subtarget);

ReplaceREADCYCLECOUNTER ( N , Results , DAG , Subtarget ) ;


ReplaceReductionResults(N, Results, DAG, ISD::UMINV, zmtarzmISD::UMINV);

ReplaceReductionResults ( N , Results , DAG , ISD :: UMINV , zmtarzmISD :: UMINV ) ;


return ExpandDIV_Windows(SDValue(N, 0), DAG, N->getOpcode() == ISD::SDIV, Results);

return ExpandDIV_Windows ( SDValue ( N , 0 ) , DAG , N -> getOpcode ( ) == ISD :: SDIV , Results ) ;


ReplaceReductionResults(N, Results, DAG, ISD::SMAX, zmtarzmISD::SMAXVV);

ReplaceReductionResults ( N , Results , DAG , ISD :: SMAX , zmtarzmISD :: SMAXVV ) ;


ReplaceReductionResults(N, Results, DAG, ISD::UMAX, zmtarzmISD::UMAXVV);

ReplaceReductionResults ( N , Results , DAG , ISD :: UMAX , zmtarzmISD :: UMAXVV ) ;


RTLIB::Libcall libCall = RTLIB::UNKNOWN_LIBCALL;

RTLIB :: Libcall libCall = RTLIB :: UNKNOWN_LIBCALL ;


if ( N -> getOpcode ( ) == ISD :: FP_TO_SINT ) {

if (N->getOpcode() == ISD::FP_TO_SINT) {


ReplaceCMP_SWAP_128Results(N, Results, DAG, Subtarget);

ReplaceCMP_SWAP_128Results ( N , Results , DAG , Subtarget ) ;


if (N->getOperand(0).getValueType() != MVT::f128) {

if ( N -> getOperand ( 0 ) . getValueType ( ) != MVT :: f128 ) {


if ( N -> getValueType ( 0 ) != MVT :: i64 ) {


Results.push_back(LowerF128Op(SDValue(N, 0), DAG, getLibcallName(libCall), 1));

Results . push_back ( LowerF128Op ( SDValue ( N , 0 ) , DAG , getLibcallName ( libCall ) , 1 ) ) ;


if ( N -> getOpcode ( ) == ISD :: FP_TO_UINT ) {

if (N->getOpcode() == ISD::FP_TO_UINT) {


LoadSDNode *LoadNode = cast<LoadSDNode>(N);

LoadSDNode * LoadNode = cast < LoadSDNode > ( N ) ;


if (LoadNode->getMemoryVT() != MVT::i128) {

if ( LoadNode -> getMemoryVT ( ) != MVT :: i128 ) {


SDValue Result = DAG.getMemIntrinsicNode(zmtarzmISD::LDP, SDLoc(N), DAG.getVTList({MVT::i64, MVT::i64, MVT::Other}), {LoadNode->getChain(), LoadNode->getBasePtr()}, LoadNode->getMemoryVT(), LoadNode->getMemOperand());

SDValue Result = DAG . getMemIntrinsicNode ( zmtarzmISD :: LDP , SDLoc ( N ) , DAG . getVTList ( { MVT :: i64 , MVT :: i64 , MVT :: Other } ) , { LoadNode -> getChain ( ) , LoadNode -> getBasePtr ( ) } , LoadNode -> getMemoryVT ( ) , LoadNode -> getMemOperand ( ) ) ;


SDValue Pair = DAG.getNode(ISD::BUILD_PAIR, SDLoc(N), MVT::i128, Result.getValue(0), Result.getValue(1));

SDValue Pair = DAG . getNode ( ISD :: BUILD_PAIR , SDLoc ( N ) , MVT :: i128 , Result . getValue ( 0 ) , Result . getValue ( 1 ) ) ;


Results.append({Pair, Result.getValue(2)  });

Results . append ( { Pair , Result . getValue ( 2 ) } ) ;


if ( N -> getOpcode ( ) == ISD :: READCYCLECOUNTER ) {

if (N->getOpcode() == ISD::READCYCLECOUNTER) {


ReplaceExtractSubVectorResults ( N , Results , DAG ) ;


assert ( Subtarget -> hasLeonCycleCounter ( ) ) ;


SDValue Lo = DAG.getCopyFromReg(N->getOperand(0), DL, zmtarzm::ASR23, MVT::i32);

SDValue Lo = DAG . getCopyFromReg ( N -> getOperand ( 0 ) , DL , zmtarzm :: ASR23 , MVT :: i32 ) ;


SDValue Hi = DAG.getCopyFromReg(Lo, DL, zmtarzm::G0, MVT::i32);

SDValue Hi = DAG . getCopyFromReg ( Lo , DL , zmtarzm :: G0 , MVT :: i32 ) ;


SDValue Pair = DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Ops);

SDValue Pair = DAG . getNode ( ISD :: BUILD_PAIR , DL , MVT :: i64 , Ops ) ;


Results . push_back ( N -> getOperand ( 0 ) ) ;


if ( N -> getOpcode ( ) == ISD :: SINT_TO_FP ) {

if (N->getOpcode() == ISD::SINT_TO_FP) {


if ( N -> getValueType ( 0 ) != MVT :: f128 ) {


if (N->getOperand(0).getValueType() != MVT::i64) {

if ( N -> getOperand ( 0 ) . getValueType ( ) != MVT :: i64 ) {


Results . push_back ( LowerF128Op ( SDValue ( N , 0 ) , DAG , getLibcallName ( libCall ) , 1 ) ) ;


return ReplaceLongIntrinsic(N, Results, DAG);

return ReplaceLongIntrinsic ( N , Results , DAG ) ;


if ( N -> getOpcode ( ) == ISD :: UINT_TO_FP ) {

if (N->getOpcode() == ISD::UINT_TO_FP) {


ReplaceLongIntrinsic ( N , Results , DAG ) ;


if ( N -> getOpcode ( ) == ISD :: LOAD ) {


ConstantSDNode *CN = cast<ConstantSDNode>(N->getOperand(0));

ConstantSDNode * CN = cast < ConstantSDNode > ( N -> getOperand ( 0 ) ) ;


Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue());

Intrinsic :: ID IntID = static_cast < Intrinsic :: ID > ( CN -> getZExtValue ( ) ) ;


if (IntID == Intrinsic::aarch64_sve_clasta_n) {

if ( IntID == Intrinsic :: aarch64_sve_clasta_n ) {


auto Op2 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, N->getOperand(2));

auto Op2 = DAG . getNode ( ISD :: ANY_EXTEND , DL , MVT :: i32 , N -> getOperand ( 2 ) ) ;


auto V = DAG.getNode(zmtarzmISD::CLASTA_N, DL, MVT::i32, N->getOperand(1), Op2, N->getOperand(3));

auto V = DAG . getNode ( zmtarzmISD :: CLASTA_N , DL , MVT :: i32 , N -> getOperand ( 1 ) , Op2 , N -> getOperand ( 3 ) ) ;


Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, VT, V));

Results . push_back ( DAG . getNode ( ISD :: TRUNCATE , DL , VT , V ) ) ;


if (IntID == Intrinsic::aarch64_sve_lasta) {

if ( IntID == Intrinsic :: aarch64_sve_lasta ) {


auto V = DAG.getNode(zmtarzmISD::LASTA, DL, MVT::i32, N->getOperand(1), N->getOperand(2));

auto V = DAG . getNode ( zmtarzmISD :: LASTA , DL , MVT :: i32 , N -> getOperand ( 1 ) , N -> getOperand ( 2 ) ) ;


if (IntID == Intrinsic::aarch64_sve_lastb) {

if ( IntID == Intrinsic :: aarch64_sve_lastb ) {


auto V = DAG.getNode(zmtarzmISD::LASTB, DL, MVT::i32, N->getOperand(1), N->getOperand(2));

auto V = DAG . getNode ( zmtarzmISD :: LASTB , DL , MVT :: i32 , N -> getOperand ( 1 ) , N -> getOperand ( 2 ) ) ;


LoadSDNode * Ld = cast < LoadSDNode > ( N ) ;


if ( Ld -> getValueType ( 0 ) != MVT :: i64 ) {


if ( Ld -> getMemoryVT ( ) != MVT :: i64 ) {


SDValue LoadRes = DAG.getExtLoad(Ld->getExtensionType(), DL, MVT::v2i32, Ld->getChain(), Ld->getBasePtr(), Ld->getPointerInfo(), MVT::v2i32, Ld->getAlignment(), Ld->getMemOperand()->getFlags(), Ld->getAAInfo());

SDValue LoadRes = DAG . getExtLoad ( Ld -> getExtensionType ( ) , DL , MVT :: v2i32 , Ld -> getChain ( ) , Ld -> getBasePtr ( ) , Ld -> getPointerInfo ( ) , MVT :: v2i32 , Ld -> getAlignment ( ) , Ld -> getMemOperand ( ) -> getFlags ( ) , Ld -> getAAInfo ( ) ) ;


SDValue Res = DAG.getNode(ISD::BITCAST, DL, MVT::i64, LoadRes);

SDValue Res = DAG . getNode ( ISD :: BITCAST , DL , MVT :: i64 , LoadRes ) ;


Results . push_back ( LoadRes . getValue ( 1 ) ) ;


llvm_unreachable("Don't know how to custom expand this");

llvm_unreachable
(
"Don't know how to custom expand this"
)
;


zmtarzmTargetLowering::zmtarzmTargetLowering(const TargetMachine &TM, const zmtarzmSubtarget &STI) : TargetLowering(TM), Subtarget(STI) {

zmtarzmTargetLowering :: zmtarzmTargetLowering ( const TargetMachine & TM , const zmtarzmSubtarget & STI ) : TargetLowering ( TM ) , Subtarget ( STI ) {


addRegisterClass ( MVT :: i16 , & zmtarzm :: GPRRegClass ) ;


computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: X1 ) ;


for (auto N : {ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}) {

for ( auto N : { ISD :: EXTLOAD , ISD :: SEXTLOAD , ISD :: ZEXTLOAD } ) {


setLoadExtAction ( N , MVT :: i16 , MVT :: i1 , Promote ) ;

N zmsplit  MVT::i16 zmsplit  MVT::i1 zmsplit  Promote

setLoadExtAction(N, MVT::i16, MVT::i1, Promote);


setBooleanContents ( ZeroOrOneBooleanContent ) ;


addRegisterClass ( MVT :: i32 , & zmtarzm :: GPRRegClass ) ;


auto *RegInfo = Subtarget.getRegisterInfo();

auto * RegInfo = Subtarget . getRegisterInfo ( ) ;


setStackPointerRegisterToSaveRestore ( # ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setBooleanContents ( ZeroOrOneBooleanContent , ZeroOrNegativeOneBooleanContent ) ;


for ( auto VT : { MVT :: i1 , MVT :: i8 } ) {


setLoadExtAction ( # , # , MVT :: i1 , # ) ;


setLoadExtAction ( # , # , MVT :: f32 , # ) ;


setLoadExtAction ( # , # , MVT :: f16 , # ) ;


setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);

setLoadExtAction ( ISD :: SEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote);

setLoadExtAction ( ISD :: ZEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction ( # , # , F16 # , # ) ;


setOperationAction ( ISD :: GlobalAddress , MVT :: i16 , Custom ) ;

ISD::GlobalAddress zmsplit MVT::i16 zmsplit Custom


setOperationAction ( ISD :: BRCOND , MVT :: Other , Expand ) ;

ISD::BRCOND zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: BR_CC , MVT :: i16 , Custom ) ;

ISD::BR_CC zmsplit MVT::i16 zmsplit Custom


setOperationAction ( ISD :: BR_JT , MVT :: Other , Expand ) ;

ISD::BR_JT zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: SELECT , MVT :: i16 , Custom ) ;

ISD::SELECT zmsplit MVT::i16 zmsplit Custom


setOperationAction ( ISD :: SELECT_CC , MVT :: i16 , Expand ) ;

ISD::SELECT_CC zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: SETCC , MVT :: i16 , Expand ) ;

ISD::SETCC zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: SIGN_EXTEND_INREG , VT , Expand ) ;

ISD::SIGN_EXTEND_INREG zmsplit VT zmsplit Expand


setOperationAction ( ISD :: MUL , MVT :: i16 , Expand ) ;

ISD::MUL zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: SMUL_LOHI , MVT :: i16 , Expand ) ;

ISD::SMUL_LOHI zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: UMUL_LOHI , MVT :: i16 , Expand ) ;

ISD::UMUL_LOHI zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: MULHS , MVT :: i16 , Expand ) ;

ISD::MULHS zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: MULHU , MVT :: i16 , Expand ) ;

ISD::MULHU zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: SREM , MVT :: i16 , Expand ) ;

ISD::SREM zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: SDIVREM , MVT :: i16 , Expand ) ;

ISD::SDIVREM zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: SDIV , MVT :: i16 , Expand ) ;

ISD::SDIV zmsplit MVT::i16 zmsplit Expand


setOperationAction(#,             #,   #);

setOperationAction(#,             #,   #);


setOperationAction(#,               #,   #);

setOperationAction(#,               #,   #);


setOperationAction(#,              #,   #);

setOperationAction(#,              #,   #);


setOperationAction ( ISD :: UREM , MVT :: i16 , Expand ) ;

ISD::UREM zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: UDIVREM , MVT :: i16 , Expand ) ;

ISD::UDIVREM zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: UDIV , MVT :: i16 , Expand ) ;

ISD::UDIV zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: DYNAMIC_STACKALLOC , MVT :: i16 , Expand ) ;

ISD::DYNAMIC_STACKALLOC zmsplit MVT::i16 zmsplit Expand

ISD :: DYNAMIC_STACKALLOC MVT :: i16 Expand


setOperationAction ( ISD :: STACKSAVE , MVT :: Other , Expand ) ;

ISD::STACKSAVE zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: STACKRESTORE , MVT :: Other , Expand ) ;

ISD::STACKRESTORE zmsplit MVT::Other zmsplit Expand


setBooleanContents ( ZeroOrOneBooleanContent ) ;


setMinimumJumpTableEntries ( INT_MAX ) ;


setCondCodeAction ( CC , VT , Expand ) ;


computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


setBooleanContents ( UndefinedBooleanContent ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R14 ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R3 ) ;


setMinFunctionAlignment ( FunctionAlignment ) ;


setSchedulingPreference ( Sched :: Source ) ;


setLibcallCallingConv ( static_cast < RTLIB :: Libcall > ( I ) , CallingConv :: Fast ) ;


setOperationAction(#,           #,   #);

setOperationAction(#,           #,   #);


setStackPointerRegisterToSaveRestore ( # ) ;


setMinFunctionAlignment ( Align :: Constant < 2 > ( ) ) ;


setStackPointerRegisterToSaveRestore(ABI.IsN64() ? zmtarzm::SP_64 : zmtarzm::SP);

setStackPointerRegisterToSaveRestore ( ABI . IsN64 ( ) ? zmtarzm :: SP_64 : zmtarzm :: SP ) ;


zmtarzmTargetLowering :: zmtarzmTargetLowering ( const TargetMachine & TM , const zmtarzmSubtarget & STI ) : TargetLowering ( TM ) , Subtarget ( STI ) {


setStackPointerRegisterToSaveRestore ( zmtarzm :: X1 ) ;


for ( auto N : { ISD :: EXTLOAD , ISD :: SEXTLOAD , ISD :: ZEXTLOAD } ) {


setBooleanContents ( ZeroOrOneBooleanContent ) ;


addRegisterClass ( MVT :: i32 , & zmtarzm :: GPRRegClass ) ;


auto * RegInfo = Subtarget . getRegisterInfo ( ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: SP ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setBooleanContents ( ZeroOrOneBooleanContent , ZeroOrNegativeOneBooleanContent ) ;


for ( auto VT : { MVT :: i1 , MVT :: i8 } ) {


setLoadExtAction ( # , # , MVT :: i1 , # ) ;


setLoadExtAction ( # , # , MVT :: f32 , # ) ;


setLoadExtAction ( # , # , MVT :: f16 , # ) ;


setLoadExtAction ( ISD :: SEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction ( ISD :: ZEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction ( # , # , F16 # , # ) ;


setOperationAction ( ISD :: BR_CC , MVT :: i32 , Custom ) ;

ISD::BR_CC zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: BR_JT , MVT :: Other , Expand ) ;

ISD::BR_JT zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: BRCOND , MVT :: Other , Expand ) ;

ISD::BRCOND zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: SETCC , MVT :: i32 , Custom ) ;

ISD::SETCC zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: SETCCE , MVT :: i32 , Custom ) ;

ISD::SETCCE zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: SELECT , MVT :: i32 , Expand ) ;

ISD::SELECT zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SELECT_CC , MVT :: i32 , Custom ) ;

ISD::SELECT_CC zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: GlobalAddress , MVT :: i32 , Custom ) ;

ISD::GlobalAddress zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: BlockAddress , MVT :: i32 , Custom ) ;

ISD::BlockAddress zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: JumpTable , MVT :: i32 , Custom ) ;

ISD::JumpTable zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: ConstantPool , MVT :: i32 , Custom ) ;

ISD::ConstantPool zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: DYNAMIC_STACKALLOC , MVT :: i32 , Custom ) ;

ISD::DYNAMIC_STACKALLOC zmsplit MVT::i32 zmsplit Custom

ISD :: DYNAMIC_STACKALLOC MVT :: i32 Custom


setOperationAction ( ISD :: STACKSAVE , MVT :: Other , Expand ) ;


setOperationAction ( ISD :: STACKRESTORE , MVT :: Other , Expand ) ;


setOperationAction ( ISD :: VASTART , MVT :: Other , Custom ) ;

ISD::VASTART zmsplit MVT::Other zmsplit Custom


setOperationAction ( ISD :: VAARG , MVT :: Other , Expand ) ;

ISD::VAARG zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: VACOPY , MVT :: Other , Expand ) ;

ISD::VACOPY zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: VAEND , MVT :: Other , Expand ) ;

ISD::VAEND zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: SDIV , MVT :: i32 , Expand ) ;

ISD::SDIV zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: UDIV , MVT :: i32 , Expand ) ;

ISD::UDIV zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SDIVREM , MVT :: i32 , Expand ) ;

ISD::SDIVREM zmsplit MVT::i32 zmsplit Expand


setBooleanContents ( ZeroOrOneBooleanContent ) ;


setMinimumJumpTableEntries ( INT_MAX ) ;


setOperationAction ( ISD :: UDIVREM , MVT :: i32 , Expand ) ;

ISD::UDIVREM zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SREM , MVT :: i32 , Expand ) ;

ISD::SREM zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: UREM , MVT :: i32 , Expand ) ;

ISD::UREM zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: MUL , MVT :: i32 , Custom ) ;

ISD::MUL zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: MULHU , MVT :: i32 , Expand ) ;

ISD::MULHU zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: MULHS , MVT :: i32 , Expand ) ;

ISD::MULHS zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: UMUL_LOHI , MVT :: i32 , Expand ) ;

ISD::UMUL_LOHI zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SMUL_LOHI , MVT :: i32 , Expand ) ;

ISD::SMUL_LOHI zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: ROTR , MVT :: i32 , Expand ) ;

ISD::ROTR zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: ROTL , MVT :: i32 , Expand ) ;

ISD::ROTL zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SHL_PARTS , MVT :: i32 , Expand ) ;

ISD::SHL_PARTS zmsplit MVT::i32 zmsplit Expand


setCondCodeAction ( CC , VT , Expand ) ;


computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


setBooleanContents ( UndefinedBooleanContent ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R14 ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R3 ) ;


setMinFunctionAlignment ( FunctionAlignment ) ;


setSchedulingPreference ( Sched :: Source ) ;


setOperationAction ( ISD :: SRL_PARTS , MVT :: i32 , Custom ) ;

ISD::SRL_PARTS zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: SRA_PARTS , MVT :: i32 , Expand ) ;

ISD::SRA_PARTS zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: BSWAP , MVT :: i32 , Expand ) ;

ISD::BSWAP zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: CTPOP , MVT :: i32 , Legal ) ;

ISD::CTPOP zmsplit MVT::i32 zmsplit Legal


setOperationAction ( ISD :: CTLZ , MVT :: i32 , Legal ) ;

ISD::CTLZ zmsplit MVT::i32 zmsplit Legal


setOperationAction ( ISD :: CTTZ , MVT :: i32 , Legal ) ;

ISD::CTTZ zmsplit MVT::i32 zmsplit Legal


setOperationAction ( ISD :: SIGN_EXTEND_INREG , MVT :: i1 , Expand ) ;

ISD::SIGN_EXTEND_INREG zmsplit MVT::i1 zmsplit Expand

ISD :: SIGN_EXTEND_INREG MVT :: i1 Expand


setOperationAction ( ISD :: SIGN_EXTEND_INREG , MVT :: i8 , Expand ) ;

ISD::SIGN_EXTEND_INREG zmsplit MVT::i8 zmsplit Expand

ISD :: SIGN_EXTEND_INREG MVT :: i8 Expand


setOperationAction ( ISD :: SIGN_EXTEND_INREG , MVT :: i16 , Expand ) ;

ISD::SIGN_EXTEND_INREG zmsplit MVT::i16 zmsplit Expand

ISD :: SIGN_EXTEND_INREG MVT :: i16 Expand


for ( MVT VT : MVT :: integer_valuetypes ( ) ) {

for (MVT VT : MVT::integer_valuetypes()) {


setLoadExtAction ( ISD :: EXTLOAD , VT , MVT :: i1 , Promote ) ;

setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote);


setLoadExtAction ( ISD :: ZEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction ( ISD :: SEXTLOAD , VT , MVT :: i1 , Promote ) ;


for ( int I = 0 ; I < RTLIB :: UNKNOWN_LIBCALL ; ++ I ) {

for (int I = 0; I < RTLIB::UNKNOWN_LIBCALL; ++I) {


setLibcallCallingConv ( static_cast < RTLIB :: Libcall > ( I ) , CallingConv :: Fast ) ;


setBooleanContents ( ZeroOrOneBooleanContent ) ;


setStackPointerRegisterToSaveRestore ( # ) ;


computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


setMinFunctionAlignment ( Align :: Constant < 2 > ( ) ) ;


setStackPointerRegisterToSaveRestore ( ABI . IsN64 ( ) ? zmtarzm :: SP_64 : zmtarzm :: SP ) ;


zmtarzmTargetLowering :: zmtarzmTargetLowering ( const TargetMachine & TM , const zmtarzmSubtarget & STI ) : TargetLowering ( TM ) , Subtarget ( STI ) {


setStackPointerRegisterToSaveRestore ( zmtarzm :: X1 ) ;


for ( auto N : { ISD :: EXTLOAD , ISD :: SEXTLOAD , ISD :: ZEXTLOAD } ) {


addRegisterClass ( MVT :: i32 , & zmtarzm :: GPRRegClass ) ;


auto * RegInfo = Subtarget . getRegisterInfo ( ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setBooleanContents ( ZeroOrOneBooleanContent , ZeroOrNegativeOneBooleanContent ) ;


for ( auto VT : { MVT :: i1 , MVT :: i8 } ) {


setLoadExtAction ( # , # , MVT :: i1 , # ) ;


setLoadExtAction ( # , # , MVT :: f32 , # ) ;


setLoadExtAction ( # , # , MVT :: f16 , # ) ;


for ( MVT VT : MVT :: integer_valuetypes ( ) ) {


setLoadExtAction ( ISD :: SEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction ( ISD :: ZEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction ( ISD :: EXTLOAD , VT , MVT :: i1 , Promote ) ;

setLoadExtAction(ISD::EXTLOAD,  VT, MVT::i1, Promote);


setLoadExtAction ( # , # , F16 # , # ) ;


setOperationAction ( ISD :: ADDC , MVT :: i32 , Expand ) ;

ISD::ADDC zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: ADDE , MVT :: i32 , Expand ) ;

ISD::ADDE zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SUBC , MVT :: i32 , Expand ) ;

ISD::SUBC zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SUBE , MVT :: i32 , Expand ) ;

ISD::SUBE zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: UDIV , MVT :: i32 , Expand ) ;

ISD::UDIV zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: UREM , MVT :: i32 , Expand ) ;

ISD::UREM zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SDIV , MVT :: i32 , Expand ) ;

ISD::SDIV zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SREM , MVT :: i32 , Expand ) ;

ISD::SREM zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: UDIVREM , MVT :: i32 , Expand ) ;

ISD::UDIVREM zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SDIVREM , MVT :: i32 , Expand ) ;

ISD::SDIVREM zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: MUL , MVT :: i32 , Expand ) ;

ISD::MUL zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: MULHS , MVT :: i32 , Expand ) ;

ISD::MULHS zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: MULHS , MVT :: i64 , Expand ) ;

ISD::MULHS zmsplit MVT::i64 zmsplit Expand


setOperationAction ( ISD :: MULHU , MVT :: i32 , Expand ) ;

ISD::MULHU zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: MULHU , MVT :: i64 , Expand ) ;

ISD::MULHU zmsplit MVT::i64 zmsplit Expand


setOperationAction ( ISD :: BITCAST , MVT :: f32 , Expand ) ;

ISD::BITCAST zmsplit MVT::f32 zmsplit Expand


setOperationAction ( ISD :: BITCAST , MVT :: i32 , Expand ) ;

ISD::BITCAST zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SMUL_LOHI , MVT :: i32 , Expand ) ;

ISD::SMUL_LOHI zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: UMUL_LOHI , MVT :: i32 , Expand ) ;

ISD::UMUL_LOHI zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SMUL_LOHI , MVT :: i64 , Expand ) ;

ISD::SMUL_LOHI zmsplit MVT::i64 zmsplit Expand


setOperationAction ( ISD :: UMUL_LOHI , MVT :: i64 , Expand ) ;

ISD::UMUL_LOHI zmsplit MVT::i64 zmsplit Expand


setOperationAction ( ISD :: SELECT_CC , MVT :: i32 , Custom ) ;

ISD::SELECT_CC zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: SELECT_CC , MVT :: Other , Expand ) ;

ISD::SELECT_CC zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: SETCC , MVT :: i1 , Promote ) ;

ISD::SETCC zmsplit MVT::i1 zmsplit Promote


setOperationAction ( ISD :: SETCC , MVT :: i64 , Expand ) ;

ISD::SETCC zmsplit MVT::i64 zmsplit Expand


setOperationAction ( ISD :: SETCC , MVT :: f32 , Expand ) ;

ISD::SETCC zmsplit MVT::f32 zmsplit Expand


setBooleanContents ( ZeroOrOneBooleanContent ) ;


setMinimumJumpTableEntries ( INT_MAX ) ;


setOperationAction ( ISD :: SETCC , MVT :: f64 , Expand ) ;

ISD::SETCC zmsplit MVT::f64 zmsplit Expand


setOperationAction ( ISD :: GlobalAddress , MVT :: i32 , Custom ) ;

ISD::GlobalAddress zmsplit MVT::i32 zmsplit Custom

setOperationAction(ISD::GlobalAddress,      MVT::i32,   Custom);


setOperationAction ( ISD :: GlobalTLSAddress , MVT :: i32 , Custom ) ;

ISD::GlobalTLSAddress zmsplit MVT::i32 zmsplit Custom

setOperationAction(ISD::GlobalTLSAddress,   MVT::i32,   Custom);

ISD :: GlobalTLSAddress MVT :: i32 Custom


setOperationAction ( ISD :: ConstantPool , MVT :: i32 , Custom ) ;

ISD::ConstantPool zmsplit MVT::i32 zmsplit Custom

setOperationAction(ISD::ConstantPool,       MVT::i32,   Custom);


setOperationAction ( ISD :: VASTART , MVT :: Other , Custom ) ;

ISD::VASTART zmsplit MVT::Other zmsplit Custom

setOperationAction(ISD::VASTART,            MVT::Other, Custom);


setOperationAction ( ISD :: VAEND , MVT :: Other , Expand ) ;

ISD::VAEND zmsplit MVT::Other zmsplit Expand

setOperationAction(ISD::VAEND,              MVT::Other, Expand);


setOperationAction ( ISD :: VAARG , MVT :: Other , Expand ) ;

ISD::VAARG zmsplit MVT::Other zmsplit Expand

setOperationAction(ISD::VAARG,              MVT::Other, Expand);


setOperationAction ( ISD :: VACOPY , MVT :: Other , Expand ) ;

ISD::VACOPY zmsplit MVT::Other zmsplit Expand

setOperationAction(ISD::VACOPY,             MVT::Other, Expand);


setOperationAction ( ISD :: BR_JT , MVT :: Other , Expand ) ;

ISD::BR_JT zmsplit MVT::Other zmsplit Expand

setOperationAction(ISD::BR_JT,              MVT::Other, Expand);


setOperationAction ( ISD :: JumpTable , MVT :: i32 , Custom ) ;

ISD::JumpTable zmsplit MVT::i32 zmsplit Custom

setOperationAction(ISD::JumpTable,          MVT::i32,   Custom);


setOperationAction ( ISD :: BR_CC , MVT :: f32 , Expand ) ;

ISD::BR_CC zmsplit MVT::f32 zmsplit Expand

setOperationAction(ISD::BR_CC,              MVT::f32,   Expand);


setCondCodeAction ( CC , VT , Expand ) ;


computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


setBooleanContents ( UndefinedBooleanContent ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R14 ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R3 ) ;


setMinFunctionAlignment ( FunctionAlignment ) ;


setSchedulingPreference ( Sched :: Source ) ;


setOperationAction ( ISD :: BR_CC , MVT :: f64 , Expand ) ;

ISD::BR_CC zmsplit MVT::f64 zmsplit Expand

setOperationAction(ISD::BR_CC,              MVT::f64,   Expand);


setOperationAction ( ISD :: BR_CC , MVT :: i32 , Expand ) ;

ISD::BR_CC zmsplit MVT::i32 zmsplit Expand

setOperationAction(ISD::BR_CC,              MVT::i32,   Expand);


setOperationAction ( ISD :: BR_CC , MVT :: i64 , Expand ) ;

ISD::BR_CC zmsplit MVT::i64 zmsplit Expand

setOperationAction(ISD::BR_CC,              MVT::i64,   Expand);


setOperationAction ( ISD :: SIGN_EXTEND_INREG , MVT :: i1 , Expand ) ;

ISD::SIGN_EXTEND_INREG zmsplit MVT::i1 zmsplit Expand

setOperationAction(ISD::SIGN_EXTEND_INREG,  MVT::i1,    Expand);


setOperationAction ( ISD :: SHL_PARTS , MVT :: i32 , Expand ) ;

ISD::SHL_PARTS zmsplit MVT::i32 zmsplit Expand

setOperationAction(ISD::SHL_PARTS,          MVT::i32,   Expand);


setOperationAction ( ISD :: SRA_PARTS , MVT :: i32 , Expand ) ;

ISD::SRA_PARTS zmsplit MVT::i32 zmsplit Expand

setOperationAction(ISD::SRA_PARTS,          MVT::i32,   Expand);


setOperationAction ( ISD :: SRL_PARTS , MVT :: i32 , Expand ) ;

ISD::SRL_PARTS zmsplit MVT::i32 zmsplit Expand

setOperationAction(ISD::SRL_PARTS,          MVT::i32,   Expand);


setOperationAction ( ISD :: FP_ROUND , MVT :: f32 , Expand ) ;

ISD::FP_ROUND zmsplit MVT::f32 zmsplit Expand

setOperationAction(ISD::FP_ROUND,           MVT::f32,   Expand);


setOperationAction ( ISD :: FP_ROUND , MVT :: f64 , Expand ) ;

ISD::FP_ROUND zmsplit MVT::f64 zmsplit Expand

setOperationAction(ISD::FP_ROUND,           MVT::f64,   Expand);


setLibcallCallingConv ( static_cast < RTLIB :: Libcall > ( I ) , CallingConv :: Fast ) ;


setBooleanContents ( ZeroOrOneBooleanContent ) ;


setOperationAction ( ISD :: CTPOP , MVT :: i32 , Expand ) ;

ISD::CTPOP zmsplit MVT::i32 zmsplit Expand

setOperationAction(ISD::CTPOP,              MVT::i32,   Expand);


setOperationAction ( ISD :: CTTZ , MVT :: i32 , Expand ) ;

ISD::CTTZ zmsplit MVT::i32 zmsplit Expand

setOperationAction(ISD::CTTZ,               MVT::i32,   Expand);


setOperationAction(#,           #,   #);


setOperationAction ( ISD :: CTLZ , MVT :: i32 , Expand ) ;

ISD::CTLZ zmsplit MVT::i32 zmsplit Expand

setOperationAction(ISD::CTLZ,               MVT::i32,   Expand);


setOperationAction ( ISD :: CTTZ_ZERO_UNDEF , MVT :: i32 , Expand ) ;

ISD::CTTZ_ZERO_UNDEF zmsplit MVT::i32 zmsplit Expand

setOperationAction(ISD::CTTZ_ZERO_UNDEF,    MVT::i32,   Expand);

ISD :: CTTZ_ZERO_UNDEF MVT :: i32 Expand


setOperationAction ( ISD :: CTLZ_ZERO_UNDEF , MVT :: i32 , Expand ) ;

ISD::CTLZ_ZERO_UNDEF zmsplit MVT::i32 zmsplit Expand

setOperationAction(ISD::CTLZ_ZERO_UNDEF,    MVT::i32,   Expand);

ISD :: CTLZ_ZERO_UNDEF MVT :: i32 Expand


setOperationAction ( ISD :: ROTL , MVT :: i32 , Expand ) ;

ISD::ROTL zmsplit MVT::i32 zmsplit Expand

setOperationAction(ISD::ROTL , MVT::i32, Expand);


setOperationAction ( ISD :: ROTR , MVT :: i32 , Expand ) ;

ISD::ROTR zmsplit MVT::i32 zmsplit Expand

setOperationAction(ISD::ROTR , MVT::i32, Expand);


setOperationAction ( ISD :: BSWAP , MVT :: i32 , Expand ) ;

ISD::BSWAP zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: FREM , MVT :: f32 , Expand ) ;

ISD::FREM zmsplit MVT::f32 zmsplit Expand

setOperationAction(ISD::FREM,       MVT::f32, Expand);


setOperationAction ( ISD :: UINT_TO_FP , MVT :: i8 , Expand ) ;

ISD::UINT_TO_FP zmsplit MVT::i8 zmsplit Expand

setOperationAction(ISD::UINT_TO_FP, MVT::i8,  Expand);


setOperationAction ( ISD :: UINT_TO_FP , MVT :: i16 , Expand ) ;

ISD::UINT_TO_FP zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: UINT_TO_FP , MVT :: i32 , Expand ) ;

ISD::UINT_TO_FP zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: FP_TO_UINT , MVT :: i32 , Expand ) ;

ISD::FP_TO_UINT zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: FP_ROUND , MVT :: f32 , Expand ) ;

setOperationAction(ISD::FP_ROUND,   MVT::f32, Expand);


setOperationAction ( ISD :: FP_ROUND , MVT :: f64 , Expand ) ;

setOperationAction(ISD::FP_ROUND,   MVT::f64, Expand);


setOperationAction ( ISD :: FCOPYSIGN , MVT :: f32 , Expand ) ;

ISD::FCOPYSIGN zmsplit MVT::f32 zmsplit Expand

setOperationAction(ISD::FCOPYSIGN,  MVT::f32, Expand);


setOperationAction ( ISD :: FCOPYSIGN , MVT :: f64 , Expand ) ;

ISD::FCOPYSIGN zmsplit MVT::f64 zmsplit Expand

setOperationAction(ISD::FCOPYSIGN,  MVT::f64, Expand);


setOperationAction ( ISD :: FSUB , MVT :: f32 , Expand ) ;

ISD::FSUB zmsplit MVT::f32 zmsplit Expand

setOperationAction(ISD::FSUB,       MVT::f32, Expand);


setOperationAction ( ISD :: FSIN , MVT :: f32 , Expand ) ;

ISD::FSIN zmsplit MVT::f32 zmsplit Expand

setOperationAction(ISD::FSIN,       MVT::f32, Expand);


setOperationAction ( ISD :: FCOS , MVT :: f32 , Expand ) ;

ISD::FCOS zmsplit MVT::f32 zmsplit Expand

setOperationAction(ISD::FCOS,       MVT::f32, Expand);


setOperationAction ( ISD :: FPOWI , MVT :: f32 , Expand ) ;

ISD::FPOWI zmsplit MVT::f32 zmsplit Expand

setOperationAction(ISD::FPOWI,      MVT::f32, Expand);


setOperationAction ( ISD :: FPOW , MVT :: f32 , Expand ) ;

ISD::FPOW zmsplit MVT::f32 zmsplit Expand

setOperationAction(ISD::FPOW,       MVT::f32, Expand);


setOperationAction ( ISD :: FPOW , MVT :: f64 , Expand ) ;

ISD::FPOW zmsplit MVT::f64 zmsplit Expand

setOperationAction(ISD::FPOW,       MVT::f64, Expand);


setOperationAction ( ISD :: FLOG , MVT :: f32 , Expand ) ;

ISD::FLOG zmsplit MVT::f32 zmsplit Expand

setOperationAction(ISD::FLOG,       MVT::f32, Expand);


setOperationAction ( ISD :: FLOG2 , MVT :: f32 , Expand ) ;

ISD::FLOG2 zmsplit MVT::f32 zmsplit Expand

setOperationAction(ISD::FLOG2,      MVT::f32, Expand);


setOperationAction ( ISD :: FLOG10 , MVT :: f32 , Expand ) ;

ISD::FLOG10 zmsplit MVT::f32 zmsplit Expand

setOperationAction(ISD::FLOG10,     MVT::f32, Expand);


setOperationAction ( ISD :: FEXP , MVT :: f32 , Expand ) ;

ISD::FEXP zmsplit MVT::f32 zmsplit Expand

setOperationAction(ISD::FEXP,       MVT::f32, Expand);


setOperationAction ( ISD :: FSQRT , MVT :: f64 , Expand ) ;

ISD::FSQRT zmsplit MVT::f64 zmsplit Expand

setOperationAction(ISD::FSQRT,      MVT::f64, Expand);


setOperationAction ( ISD :: FSQRT , MVT :: f32 , Expand ) ;

ISD::FSQRT zmsplit MVT::f32 zmsplit Expand

setOperationAction(ISD::FSQRT,      MVT::f32, Expand);


setOperationAction ( ISD :: EH_LABEL , MVT :: Other , Expand ) ;

ISD::EH_LABEL zmsplit MVT::Other zmsplit Expand

setOperationAction(ISD::EH_LABEL,          MVT::Other, Expand);


setOperationAction ( ISD :: DYNAMIC_STACKALLOC , MVT :: i32 , Expand ) ;

ISD::DYNAMIC_STACKALLOC zmsplit MVT::i32 zmsplit Expand

setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32,  Expand);

ISD :: DYNAMIC_STACKALLOC MVT :: i32 Expand


setOperationAction ( ISD :: STACKSAVE , MVT :: Other , Expand ) ;

ISD::STACKSAVE zmsplit MVT::Other zmsplit Expand

setOperationAction(ISD::STACKSAVE,         MVT::Other, Expand);


setOperationAction ( ISD :: STACKRESTORE , MVT :: Other , Expand ) ;

ISD::STACKRESTORE zmsplit MVT::Other zmsplit Expand

setOperationAction(ISD::STACKRESTORE,      MVT::Other, Expand);


setStackPointerRegisterToSaveRestore ( # ) ;

setStackPointerRegisterToSaveRestore ( zmtarzm :: RSP ) ;


computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


setMinFunctionAlignment ( Align :: Constant < 2 > ( ) ) ;


setStackPointerRegisterToSaveRestore ( ABI . IsN64 ( ) ? zmtarzm :: SP_64 : zmtarzm :: SP ) ;

setStackPointerRegisterToSaveRestore(ABI.IsN64() ? zmtarzm::SP_64 : zmtarzm::SP);


zmtarzmTargetLowering :: zmtarzmTargetLowering ( const TargetMachine & TM , const zmtarzmSubtarget & STI ) : TargetLowering ( TM ) , Subtarget ( STI ) {

zmtarzmTargetLowering::zmtarzmTargetLowering(const TargetMachine &TM, const zmtarzmSubtarget &STI) : TargetLowering(TM), Subtarget(STI) {


setStackPointerRegisterToSaveRestore ( zmtarzm :: X1 ) ;


for ( auto N : { ISD :: EXTLOAD , ISD :: SEXTLOAD , ISD :: ZEXTLOAD } ) {

for (auto N : {ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}) {


setBooleanContents ( ZeroOrOneBooleanContent ) ;


addRegisterClass ( MVT :: i32 , & zmtarzm :: GPRRegClass ) ;


auto * RegInfo = Subtarget . getRegisterInfo ( ) ;

auto *RegInfo = Subtarget.getRegisterInfo();


setStackPointerRegisterToSaveRestore ( RegInfo -> getStackRegister ( ) ) ;


addRegisterClass ( MVT :: i8 , & zmtarzm :: DR8RegClass ) ;


addRegisterClass ( MVT :: i16 , & zmtarzm :: XR16RegClass ) ;


addRegisterClass ( MVT :: i32 , & zmtarzm :: XR32RegClass ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setBooleanContents ( ZeroOrOneBooleanContent , ZeroOrNegativeOneBooleanContent ) ;


for ( auto VT : { MVT :: i1 , MVT :: i8 } ) {


setLoadExtAction ( # , # , MVT :: i1 , # ) ;


setLoadExtAction ( # , # , MVT :: f32 , # ) ;


setLoadExtAction ( # , # , MVT :: f16 , # ) ;


setLoadExtAction ( ISD :: SEXTLOAD , VT , MVT :: i1 , Promote ) ;

setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);


setLoadExtAction ( ISD :: ZEXTLOAD , VT , MVT :: i1 , Promote ) ;

setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote);


setLoadExtAction ( ISD :: EXTLOAD , VT , MVT :: i1 , Promote ) ;

setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote);


setLoadExtAction ( # , # , F16 # , # ) ;


setTruncStoreAction ( MVT :: i64 , MVT :: i32 , Expand ) ;

MVT::i64 zmsplit  MVT::i32 zmsplit  Expand


setTruncStoreAction ( MVT :: i64 , MVT :: i16 , Expand ) ;

MVT::i64 zmsplit  MVT::i16 zmsplit  Expand


setTruncStoreAction ( MVT :: i64 , MVT :: i8 , Expand ) ;

MVT::i64 zmsplit  MVT::i8 zmsplit  Expand


setTruncStoreAction ( MVT :: i32 , MVT :: i16 , Expand ) ;

MVT::i32 zmsplit  MVT::i16 zmsplit  Expand


setTruncStoreAction ( MVT :: i32 , MVT :: i8 , Expand ) ;

MVT::i32 zmsplit  MVT::i8 zmsplit  Expand


setTruncStoreAction ( MVT :: i16 , MVT :: i8 , Expand ) ;

MVT::i16 zmsplit  MVT::i8 zmsplit  Expand


setOperationAction ( ISD :: MUL , MVT :: i8 , Promote ) ;

ISD::MUL zmsplit MVT::i8 zmsplit Promote


setOperationAction ( ISD :: MUL , MVT :: i16 , Legal ) ;


setOperationAction ( ISD :: MUL , MVT :: i32 , Legal ) ;


if ( ! Subtarget . atLeastM68020 ( ) ) {


setOperationAction ( ISD :: MUL , MVT :: i32 , LibCall ) ;

ISD::MUL zmsplit MVT::i32 zmsplit LibCall


setOperationAction ( ISD :: MUL , MVT :: i64 , LibCall ) ;

ISD::MUL zmsplit MVT::i64 zmsplit LibCall


setOperationAction ( OP , MVT :: i8 , Promote ) ;


setOperationAction ( OP , MVT :: i16 , Legal ) ;


setOperationAction ( OP , MVT :: i32 , LibCall ) ;


setOperationAction(#,             #,   #);


setOperationAction(#,               #,   #);


setOperationAction(#,              #,   #);


setBooleanContents ( ZeroOrOneBooleanContent ) ;


setMinimumJumpTableEntries ( INT_MAX ) ;


setCondCodeAction ( CC , VT , Expand ) ;


computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


setBooleanContents ( UndefinedBooleanContent ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R14 ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R3 ) ;


setMinFunctionAlignment ( FunctionAlignment ) ;


setSchedulingPreference ( Sched :: Source ) ;


setOperationAction ( OP , MVT :: i8 , Expand ) ;


setOperationAction ( OP , MVT :: i16 , Expand ) ;


setLibcallCallingConv ( static_cast < RTLIB :: Libcall > ( I ) , CallingConv :: Fast ) ;


setOperationAction ( OP , MVT :: i32 , Expand ) ;


setOperationAction(#,           #,   #);


setOperationAction ( ISD :: ADDC , VT , Custom ) ;


setOperationAction ( ISD :: ADDE , VT , Custom ) ;


setOperationAction ( ISD :: SUBC , VT , Custom ) ;


setOperationAction ( ISD :: SUBE , VT , Custom ) ;


setOperationAction ( ISD :: SADDO , VT , Custom ) ;


setOperationAction ( ISD :: UADDO , VT , Custom ) ;


setOperationAction ( ISD :: SSUBO , VT , Custom ) ;


setOperationAction ( ISD :: USUBO , VT , Custom ) ;


setOperationAction ( ISD :: BR_JT , MVT :: Other , Expand ) ;

ISD::BR_JT zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: BRCOND , MVT :: Other , Custom ) ;

ISD::BRCOND zmsplit MVT::Other zmsplit Custom


setOperationAction ( ISD :: BR_CC , VT , Expand ) ;


setOperationAction ( ISD :: SELECT , VT , Custom ) ;


setOperationAction ( ISD :: SELECT_CC , VT , Expand ) ;

ISD::SELECT_CC zmsplit VT zmsplit Expand


setOperationAction ( ISD :: SETCC , VT , Custom ) ;


setOperationAction ( ISD :: SETCCCARRY , VT , Custom ) ;

ISD::SETCCCARRY zmsplit VT zmsplit Custom


setOperationAction ( ISD :: BSWAP , VT , Expand ) ;


setOperationAction ( ISD :: CTTZ , VT , Expand ) ;


setOperationAction ( ISD :: CTLZ , VT , Expand ) ;


setOperationAction ( ISD :: CTPOP , VT , Expand ) ;


setOperationAction ( ISD :: ConstantPool , MVT :: i32 , Custom ) ;

ISD::ConstantPool zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: JumpTable , MVT :: i32 , Custom ) ;

ISD::JumpTable zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: GlobalAddress , MVT :: i32 , Custom ) ;

ISD::GlobalAddress zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: GlobalTLSAddress , MVT :: i32 , Custom ) ;

ISD::GlobalTLSAddress zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: ExternalSymbol , MVT :: i32 , Custom ) ;

ISD::ExternalSymbol zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: BlockAddress , MVT :: i32 , Custom ) ;

ISD::BlockAddress zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: VASTART , MVT :: Other , Custom ) ;

ISD::VASTART zmsplit MVT::Other zmsplit Custom


setOperationAction ( ISD :: VAEND , MVT :: Other , Expand ) ;

ISD::VAEND zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: VAARG , MVT :: Other , Expand ) ;

ISD::VAARG zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: VACOPY , MVT :: Other , Expand ) ;

ISD::VACOPY zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: STACKSAVE , MVT :: Other , Expand ) ;

ISD::STACKSAVE zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: STACKRESTORE , MVT :: Other , Expand ) ;

ISD::STACKRESTORE zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: DYNAMIC_STACKALLOC , PtrVT , Custom ) ;

ISD::DYNAMIC_STACKALLOC zmsplit PtrVT zmsplit Custom


setStackPointerRegisterToSaveRestore ( # ) ;


computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


setMinFunctionAlignment ( Align :: Constant < 2 > ( ) ) ;


setStackPointerRegisterToSaveRestore ( ABI . IsN64 ( ) ? zmtarzm :: SP_64 : zmtarzm :: SP ) ;


zmtarzmTargetLowering :: zmtarzmTargetLowering ( const TargetMachine & TM , const zmtarzmSubtarget & STI ) : TargetLowering ( TM ) , Subtarget ( STI ) {


setStackPointerRegisterToSaveRestore ( zmtarzm :: X1 ) ;


for ( auto N : { ISD :: EXTLOAD , ISD :: SEXTLOAD , ISD :: ZEXTLOAD } ) {


setBooleanContents ( ZeroOrOneBooleanContent ) ;


addRegisterClass ( MVT :: i32 , & zmtarzm :: GPRRegClass ) ;


auto * RegInfo = Subtarget . getRegisterInfo ( ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setBooleanContents ( ZeroOrOneBooleanContent , ZeroOrNegativeOneBooleanContent ) ;


for ( auto VT : { MVT :: i1 , MVT :: i8 } ) {

for ( MVT VT : MVT :: integer_valuetypes ( ) ) {

for (MVT VT : MVT::integer_valuetypes()) {


setLoadExtAction ( # , # , MVT :: i1 , # ) ;

setLoadExtAction ( ISD :: EXTLOAD , VT , MVT :: i1 , Promote ) ;

ISD::EXTLOAD zmsplit VT zmsplit MVT::i1 zmsplit Promote

setLoadExtAction(ISD::EXTLOAD,  VT, MVT::i1,  Promote);


setLoadExtAction ( ISD :: ZEXTLOAD , VT , MVT :: i1 , Promote ) ;

ISD::ZEXTLOAD zmsplit VT zmsplit MVT::i1 zmsplit Promote

setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1,  Promote);


setLoadExtAction ( ISD :: SEXTLOAD , VT , MVT :: i1 , Promote ) ;

ISD::SEXTLOAD zmsplit VT zmsplit MVT::i1 zmsplit Promote

setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1,  Promote);


for ( MVT VT : MVT :: fp_valuetypes ( ) ) {


setLoadExtAction ( # , # , MVT :: f32 , # ) ;

setLoadExtAction ( ISD :: EXTLOAD , VT , MVT :: f32 , Expand ) ;

ISD::EXTLOAD zmsplit VT zmsplit MVT::f32 zmsplit Expand

setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand);


setLoadExtAction ( # , # , MVT :: f16 , # ) ;

setLoadExtAction ( ISD :: EXTLOAD , VT , MVT :: f16 , Expand ) ;

ISD::EXTLOAD zmsplit VT zmsplit MVT::f16 zmsplit Expand

setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand);


for ( MVT VT : MVT :: fp_vector_valuetypes ( ) ) {

for (MVT VT : MVT::fp_vector_valuetypes()) {


setLoadExtAction ( ISD :: SEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction ( ISD :: ZEXTLOAD , VT , MVT :: i1 , Promote ) ;


MVT F16VT = MVT :: getVectorVT ( MVT :: f16 , VT . getVectorNumElements ( ) ) ;

MVT F16VT = MVT::getVectorVT(MVT::f16, VT.getVectorNumElements());


setLoadExtAction ( # , # , F16 # , # ) ;

setLoadExtAction ( ISD :: EXTLOAD , VT , F16VT , Expand ) ;

ISD::EXTLOAD zmsplit VT zmsplit F16VT zmsplit Expand

setLoadExtAction(ISD::EXTLOAD, VT, F16VT, Expand);


setTruncStoreAction ( MVT :: f32 , MVT :: f16 , Expand ) ;

MVT::f32 zmsplit  MVT::f16 zmsplit  Expand


setTruncStoreAction ( MVT :: f64 , MVT :: f16 , Expand ) ;

MVT::f64 zmsplit  MVT::f16 zmsplit  Expand


setTruncStoreAction ( MVT :: f64 , MVT :: f32 , Expand ) ;

MVT::f64 zmsplit MVT::f32 zmsplit Expand


AddPromotedToType ( ISD :: SETCC , MVT :: i1 , MVT :: i32 ) ;

ISD::SETCC zmsplit MVT::i1 zmsplit MVT::i32


setOperationAction ( ISD :: BR_JT , MVT :: Other , Expand ) ;

ISD::BR_JT zmsplit MVT::Other zmsplit Expand

setOperationAction(ISD::BR_JT,              MVT::Other, Expand);


setOperationAction ( ISD :: GlobalAddress , MVT :: i32 , Custom ) ;

ISD::GlobalAddress zmsplit MVT::i32 zmsplit Custom

setOperationAction(ISD::GlobalAddress,      MVT::i32,   Custom);


setOperationAction ( ISD :: BlockAddress , MVT :: i32 , Custom ) ;

ISD::BlockAddress zmsplit MVT::i32 zmsplit Custom

setOperationAction(ISD::BlockAddress,       MVT::i32,   Custom);


setOperationAction ( ISD :: GlobalTLSAddress , MVT :: i32 , Custom ) ;

ISD::GlobalTLSAddress zmsplit MVT::i32 zmsplit Custom

setOperationAction(ISD::GlobalTLSAddress,   MVT::i32,   Custom);


setOperationAction ( ISD :: JumpTable , MVT :: i32 , Custom ) ;

ISD::JumpTable zmsplit MVT::i32 zmsplit Custom

setOperationAction(ISD::JumpTable,          MVT::i32,   Custom);


setOperationAction ( ISD :: ConstantPool , MVT :: i32 , Custom ) ;

ISD::ConstantPool zmsplit MVT::i32 zmsplit Custom

setOperationAction(ISD::ConstantPool,       MVT::i32,   Custom);


setOperationAction ( ISD :: SELECT , MVT :: f32 , Custom ) ;

ISD::SELECT zmsplit MVT::f32 zmsplit Custom

setOperationAction(ISD::SELECT,             MVT::f32,   Custom);


setOperationAction ( ISD :: SELECT , MVT :: f64 , Custom ) ;

ISD::SELECT zmsplit MVT::f64 zmsplit Custom

setOperationAction(ISD::SELECT,             MVT::f64,   Custom);


setOperationAction ( ISD :: SELECT , MVT :: i32 , Custom ) ;

ISD::SELECT zmsplit MVT::i32 zmsplit Custom

setOperationAction(ISD::SELECT,             MVT::i32,   Custom);


setOperationAction ( ISD :: SETCC , MVT :: f32 , Custom ) ;

ISD::SETCC zmsplit MVT::f32 zmsplit Custom

setOperationAction(ISD::SETCC,              MVT::f32,   Custom);


setOperationAction ( ISD :: SETCC , MVT :: f64 , Custom ) ;

ISD::SETCC zmsplit MVT::f64 zmsplit Custom

setOperationAction(ISD::SETCC,              MVT::f64,   Custom);


setOperationAction ( ISD :: BRCOND , MVT :: Other , Custom ) ;

ISD::BRCOND zmsplit MVT::Other zmsplit Custom

setOperationAction(ISD::BRCOND,             MVT::Other, Custom);


setOperationAction ( ISD :: FCOPYSIGN , MVT :: f32 , Custom ) ;

ISD::FCOPYSIGN zmsplit MVT::f32 zmsplit Custom

setOperationAction(ISD::FCOPYSIGN,          MVT::f32,   Custom);


setOperationAction ( ISD :: FCOPYSIGN , MVT :: f64 , Custom ) ;

ISD::FCOPYSIGN zmsplit MVT::f64 zmsplit Custom

setOperationAction(ISD::FCOPYSIGN,          MVT::f64,   Custom);


setOperationAction ( ISD :: FP_TO_SINT , MVT :: i32 , Custom ) ;

ISD::FP_TO_SINT zmsplit MVT::i32 zmsplit Custom

setOperationAction(ISD::FP_TO_SINT,         MVT::i32,   Custom);


setOperationAction ( ISD :: GlobalAddress , MVT :: i64 , Custom ) ;

ISD::GlobalAddress zmsplit MVT::i64 zmsplit Custom

setOperationAction(ISD::GlobalAddress,      MVT::i64,   Custom);


setOperationAction ( ISD :: BlockAddress , MVT :: i64 , Custom ) ;

ISD::BlockAddress zmsplit MVT::i64 zmsplit Custom

setOperationAction(ISD::BlockAddress,       MVT::i64,   Custom);


setOperationAction ( ISD :: GlobalTLSAddress , MVT :: i64 , Custom ) ;

ISD::GlobalTLSAddress zmsplit MVT::i64 zmsplit Custom

setOperationAction(ISD::GlobalTLSAddress,   MVT::i64,   Custom);

ISD :: GlobalTLSAddress MVT :: i64 Custom


setOperationAction ( ISD :: JumpTable , MVT :: i64 , Custom ) ;

ISD::JumpTable zmsplit MVT::i64 zmsplit Custom

setOperationAction(ISD::JumpTable,          MVT::i64,   Custom);


setOperationAction ( ISD :: ConstantPool , MVT :: i64 , Custom ) ;

ISD::ConstantPool zmsplit MVT::i64 zmsplit Custom

setOperationAction(ISD::ConstantPool,       MVT::i64,   Custom);


setOperationAction ( ISD :: SELECT , MVT :: i64 , Custom ) ;

ISD::SELECT zmsplit MVT::i64 zmsplit Custom

setOperationAction(ISD::SELECT,             MVT::i64,   Custom);


setOperationAction ( ISD :: LOAD , MVT :: i64 , Custom ) ;

ISD::LOAD zmsplit MVT::i64 zmsplit Custom

setOperationAction(ISD::LOAD,               MVT::i64,   Custom);


setOperationAction ( ISD :: STORE , MVT :: i64 , Custom ) ;

ISD::STORE zmsplit MVT::i64 zmsplit Custom

setOperationAction(ISD::STORE,              MVT::i64,   Custom);


setOperationAction ( ISD :: FP_TO_SINT , MVT :: i64 , Custom ) ;

ISD::FP_TO_SINT zmsplit MVT::i64 zmsplit Custom

setOperationAction(ISD::FP_TO_SINT,         MVT::i64,   Custom);


setOperationAction ( ISD :: SHL_PARTS , MVT :: i64 , Custom ) ;

ISD::SHL_PARTS zmsplit MVT::i64 zmsplit Custom

setOperationAction(ISD::SHL_PARTS,          MVT::i64,   Custom);


setOperationAction ( ISD :: SRA_PARTS , MVT :: i64 , Custom ) ;

ISD::SRA_PARTS zmsplit MVT::i64 zmsplit Custom

setOperationAction(ISD::SRA_PARTS,          MVT::i64,   Custom);


setOperationAction ( ISD :: SRL_PARTS , MVT :: i64 , Custom ) ;

ISD::SRL_PARTS zmsplit MVT::i64 zmsplit Custom

setOperationAction(ISD::SRL_PARTS,          MVT::i64,   Custom);


setOperationAction ( ISD :: SHL_PARTS , MVT :: i32 , Custom ) ;

ISD::SHL_PARTS zmsplit MVT::i32 zmsplit Custom

setOperationAction(ISD::SHL_PARTS,          MVT::i32,   Custom);


setOperationAction ( ISD :: SRA_PARTS , MVT :: i32 , Custom ) ;

ISD::SRA_PARTS zmsplit MVT::i32 zmsplit Custom

setOperationAction(ISD::SRA_PARTS,          MVT::i32,   Custom);


setOperationAction ( ISD :: SRL_PARTS , MVT :: i32 , Custom ) ;

ISD::SRL_PARTS zmsplit MVT::i32 zmsplit Custom

setOperationAction(ISD::SRL_PARTS,          MVT::i32,   Custom);


setOperationAction ( ISD :: EH_DWARF_CFA , MVT :: i32 , Custom ) ;

ISD::EH_DWARF_CFA zmsplit MVT::i32 zmsplit Custom

setOperationAction(ISD::EH_DWARF_CFA,         MVT::i32,   Custom);


setOperationAction ( ISD :: EH_DWARF_CFA , MVT :: i64 , Custom ) ;

ISD::EH_DWARF_CFA zmsplit MVT::i64 zmsplit Custom

setOperationAction(ISD::EH_DWARF_CFA,       MVT::i64,   Custom);


setOperationAction ( ISD :: SDIV , MVT :: i32 , Expand ) ;

ISD::SDIV zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SREM , MVT :: i32 , Expand ) ;

ISD::SREM zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: UDIV , MVT :: i32 , Expand ) ;

ISD::UDIV zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: UREM , MVT :: i32 , Expand ) ;

ISD::UREM zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SDIV , MVT :: i64 , Expand ) ;

ISD::SDIV zmsplit MVT::i64 zmsplit Expand


setBooleanContents ( ZeroOrOneBooleanContent ) ;


setMinimumJumpTableEntries ( INT_MAX ) ;


setOperationAction ( ISD :: SREM , MVT :: i64 , Expand ) ;

ISD::SREM zmsplit MVT::i64 zmsplit Expand