if (N->getOperand(0).getValueType() != MVT::i64) {

if ( N -> getOperand ( 0 ) . getValueType ( ) != MVT :: i64 ) {


Results.push_back(LowerF128Op(SDValue(N, 0), DAG, getLibcallName(libCall), 1));

Results . push_back ( LowerF128Op ( SDValue ( N , 0 ) , DAG , getLibcallName ( libCall ) , 1 ) ) ;


return ReplaceLongIntrinsic(N, Results, DAG);

return ReplaceLongIntrinsic ( N , Results , DAG ) ;


if ( N -> getOpcode ( ) == ISD :: EXTRACT_SUBVECTOR ) {

if (N->getOpcode() == ISD::EXTRACT_SUBVECTOR) {


ReplaceExtractSubVectorResults ( N , Results , DAG ) ;


ReplaceLongIntrinsic ( N , Results , DAG ) ;


if ( N -> getValueType ( 0 ) != MVT :: f128 ) {


if ( N -> getOpcode ( ) == ISD :: INTRINSIC_WO_CHAIN ) {

if (N->getOpcode() == ISD::INTRINSIC_WO_CHAIN) {


assert
(
(
VT
==
MVT
::
i8
||
VT
==
MVT
::
i16
)
&&
"custom lowering for unexpected type"
)
;

assert((VT == MVT::i8 || VT == MVT::i16) &&"custom lowering for unexpected type");


ConstantSDNode *CN = cast<ConstantSDNode>(N->getOperand(0));

ConstantSDNode * CN = cast < ConstantSDNode > ( N -> getOperand ( 0 ) ) ;


Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue());

Intrinsic :: ID IntID = static_cast < Intrinsic :: ID > ( CN -> getZExtValue ( ) ) ;


if (IntID == Intrinsic::aarch64_sve_clasta_n) {

if ( IntID == Intrinsic :: aarch64_sve_clasta_n ) {


auto Op2 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, N->getOperand(2));

auto Op2 = DAG . getNode ( ISD :: ANY_EXTEND , DL , MVT :: i32 , N -> getOperand ( 2 ) ) ;


auto V = DAG.getNode(zmtarzmISD::CLASTA_N, DL, MVT::i32, N->getOperand(1), Op2, N->getOperand(3));

auto V = DAG . getNode ( zmtarzmISD :: CLASTA_N , DL , MVT :: i32 , N -> getOperand ( 1 ) , Op2 , N -> getOperand ( 3 ) ) ;


Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, VT, V));

Results . push_back ( DAG . getNode ( ISD :: TRUNCATE , DL , VT , V ) ) ;


if (IntID == Intrinsic::aarch64_sve_lasta) {

if ( IntID == Intrinsic :: aarch64_sve_lasta ) {


auto V = DAG.getNode(zmtarzmISD::LASTA, DL, MVT::i32, N->getOperand(1), N->getOperand(2));

auto V = DAG . getNode ( zmtarzmISD :: LASTA , DL , MVT :: i32 , N -> getOperand ( 1 ) , N -> getOperand ( 2 ) ) ;


if (IntID == Intrinsic::aarch64_sve_lastb) {

if ( IntID == Intrinsic :: aarch64_sve_lastb ) {


auto V = DAG.getNode(zmtarzmISD::LASTB, DL, MVT::i32, N->getOperand(1), N->getOperand(2));

auto V = DAG . getNode ( zmtarzmISD :: LASTB , DL , MVT :: i32 , N -> getOperand ( 1 ) , N -> getOperand ( 2 ) ) ;


LoadSDNode * Ld = cast < LoadSDNode > ( N ) ;


if ( Ld -> getValueType ( 0 ) != MVT :: i64 ) {


if ( Ld -> getMemoryVT ( ) != MVT :: i64 ) {


SDValue LoadRes = DAG.getExtLoad(Ld->getExtensionType(), DL, MVT::v2i32, Ld->getChain(), Ld->getBasePtr(), Ld->getPointerInfo(), MVT::v2i32, Ld->getAlignment(), Ld->getMemOperand()->getFlags(), Ld->getAAInfo());

SDValue LoadRes = DAG . getExtLoad ( Ld -> getExtensionType ( ) , DL , MVT :: v2i32 , Ld -> getChain ( ) , Ld -> getBasePtr ( ) , Ld -> getPointerInfo ( ) , MVT :: v2i32 , Ld -> getAlignment ( ) , Ld -> getMemOperand ( ) -> getFlags ( ) , Ld -> getAAInfo ( ) ) ;


SDValue Res = DAG.getNode(ISD::BITCAST, DL, MVT::i64, LoadRes);

SDValue Res = DAG . getNode ( ISD :: BITCAST , DL , MVT :: i64 , LoadRes ) ;


Results . push_back ( LoadRes . getValue ( 1 ) ) ;


llvm_unreachable("Don't know how to custom expand this");

llvm_unreachable
(
"Don't know how to custom expand this"
)
;


void zmtarzmTargetLowering::ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results, SelectionDAG &DAG) const {

void zmtarzmTargetLowering :: ReplaceNodeResults ( SDNode * N , SmallVectorImpl < SDValue > & Results , SelectionDAG & DAG ) const {


if ( N -> getOpcode ( ) == ISD :: READ_REGISTER ) {

if (N->getOpcode() == ISD::READ_REGISTER) {


ExpandREAD_REGISTER ( N , Results , DAG ) ;


if ( N -> getOpcode ( ) == ISD :: BITCAST ) {


Res = ExpandBITCAST ( N , DAG , Subtarget ) ;


if ( N -> getOpcode ( ) == ISD :: SRL ) {


ReplaceBITCASTResults ( N , Results , DAG ) ;


Res = Expand64BitShift(N, DAG, Subtarget);

Res = Expand64BitShift ( N , DAG , Subtarget ) ;


if ( N -> getOpcode ( ) == ISD :: SRA ) {


Results . push_back ( LowerVECREDUCE ( SDValue ( N , 0 ) , DAG ) ) ;


if ( N -> getOpcode ( ) == ISD :: SHL ) {


if ( N -> getOpcode ( ) == ISD :: SREM ) {


if ( N -> getOpcode ( ) == ISD :: UREM ) {


if ( N -> getOpcode ( ) == ISD :: SDIVREM ) {


Res = LowerDivRem ( SDValue ( N , 0 ) , DAG ) ;


assert
(
Res
.
getNumOperands
(
)
==
2
&&
"DivRem needs two values"
)
;

assert(Res.getNumOperands() == 2 && "DivRem needs two values");


Results . push_back ( Res . getValue ( 0 ) ) ;


Results . push_back ( Res . getValue ( 1 ) ) ;


if ( N -> getOpcode ( ) == ISD :: UDIVREM ) {


Results . push_back ( LowerCTPOP ( SDValue ( N , 0 ) , DAG ) ) ;


if ( N -> getOpcode ( ) == ISD :: SADDSAT ) {


ReplaceReductionResults(N, Results, DAG, ISD::ADD, zmtarzmISD::SADDV);

ReplaceReductionResults ( N , Results , DAG , ISD :: ADD , zmtarzmISD :: SADDV ) ;


Res = LowerSADDSUBSAT(SDValue(N, 0), DAG, Subtarget);

Res = LowerSADDSUBSAT ( SDValue ( N , 0 ) , DAG , Subtarget ) ;


if ( N -> getOpcode ( ) == ISD :: SSUBSAT ) {


ReplaceReductionResults(N, Results, DAG, ISD::ADD, zmtarzmISD::UADDV);

ReplaceReductionResults ( N , Results , DAG , ISD :: ADD , zmtarzmISD :: UADDV ) ;


if ( N -> getOpcode ( ) == ISD :: READCYCLECOUNTER ) {

if (N->getOpcode() == ISD::READCYCLECOUNTER) {


ReplaceReductionResults(N, Results, DAG, ISD::SMIN, zmtarzmISD::SMINVV);

ReplaceReductionResults ( N , Results , DAG , ISD :: SMIN , zmtarzmISD :: SMINVV ) ;


ReplaceREADCYCLECOUNTER(N, Results, DAG, Subtarget);

ReplaceREADCYCLECOUNTER ( N , Results , DAG , Subtarget ) ;


if ( N -> getOpcode ( ) == ISD :: UDIV ) {


ReplaceReductionResults(N, Results, DAG, ISD::UMINV, zmtarzmISD::UMINV);

ReplaceReductionResults ( N , Results , DAG , ISD :: UMINV , zmtarzmISD :: UMINV ) ;


assert
(
Subtarget
->
isTargetWindows
(
)
&&
"can only expand DIV on Windows"
)
;

assert(Subtarget->isTargetWindows() && "can only expand DIV on Windows");


return ExpandDIV_Windows(SDValue(N, 0), DAG, N->getOpcode() == ISD::SDIV, Results);

return ExpandDIV_Windows ( SDValue ( N , 0 ) , DAG , N -> getOpcode ( ) == ISD :: SDIV , Results ) ;


if ( N -> getOpcode ( ) == ISD :: FP_TO_UINT ) {

if (N->getOpcode() == ISD::FP_TO_UINT) {


ReplaceReductionResults(N, Results, DAG, ISD::SMAX, zmtarzmISD::SMAXVV);

ReplaceReductionResults ( N , Results , DAG , ISD :: SMAX , zmtarzmISD :: SMAXVV ) ;


assert
(
N
->
getValueType
(
0
)
==
MVT
::
i128
&&
"unexpected illegal conversion"
)
;

assert(N->getValueType(0) == MVT::i128 && "unexpected illegal conversion");


if ( N -> getOpcode ( ) == ISD :: FP_TO_SINT ) {

if (N->getOpcode() == ISD::FP_TO_SINT) {


ReplaceReductionResults(N, Results, DAG, ISD::UMAX, zmtarzmISD::UMAXVV);

ReplaceReductionResults ( N , Results , DAG , ISD :: UMAX , zmtarzmISD :: UMAXVV ) ;


RTLIB::Libcall libCall = RTLIB::UNKNOWN_LIBCALL;

RTLIB :: Libcall libCall = RTLIB :: UNKNOWN_LIBCALL ;


if ( N -> getOpcode ( ) == ISD :: ATOMIC_CMP_SWAP ) {

if (N->getOpcode() == ISD::ATOMIC_CMP_SWAP) {


ReplaceCMP_SWAP_128Results(N, Results, DAG, Subtarget);

ReplaceCMP_SWAP_128Results ( N , Results , DAG , Subtarget ) ;


if (N->getOperand(0).getValueType() != MVT::f128) {

if ( N -> getOperand ( 0 ) . getValueType ( ) != MVT :: f128 ) {


if ( N -> getValueType ( 0 ) != MVT :: i64 ) {


Results.push_back(LowerF128Op(SDValue(N, 0), DAG, getLibcallName(libCall), 1));

Results . push_back ( LowerF128Op ( SDValue ( N , 0 ) , DAG , getLibcallName ( libCall ) , 1 ) ) ;


if ( N -> getOpcode ( ) == ISD :: LOAD ) {


assert
(
SDValue
(
N
,
0
)
.
getValueType
(
)
==
MVT
::
i128
&&
"unexpected load's value type"
)
;

assert(SDValue(N, 0).getValueType() == MVT::i128 && "unexpected load's value type");


LoadSDNode *LoadNode = cast<LoadSDNode>(N);

LoadSDNode * LoadNode = cast < LoadSDNode > ( N ) ;


if (LoadNode->getMemoryVT() != MVT::i128) {

if ( LoadNode -> getMemoryVT ( ) != MVT :: i128 ) {


SDValue Result = DAG.getMemIntrinsicNode(zmtarzmISD::LDP, SDLoc(N), DAG.getVTList({MVT::i64, MVT::i64, MVT::Other}), {LoadNode->getChain(), LoadNode->getBasePtr()}, LoadNode->getMemoryVT(), LoadNode->getMemOperand());

SDValue Result = DAG . getMemIntrinsicNode ( zmtarzmISD :: LDP , SDLoc ( N ) , DAG . getVTList ( { MVT :: i64 , MVT :: i64 , MVT :: Other } ) , { LoadNode -> getChain ( ) , LoadNode -> getBasePtr ( ) } , LoadNode -> getMemoryVT ( ) , LoadNode -> getMemOperand ( ) ) ;


SDValue Pair = DAG.getNode(ISD::BUILD_PAIR, SDLoc(N), MVT::i128, Result.getValue(0), Result.getValue(1));

SDValue Pair = DAG . getNode ( ISD :: BUILD_PAIR , SDLoc ( N ) , MVT :: i128 , Result . getValue ( 0 ) , Result . getValue ( 1 ) ) ;


Results.append({Pair, Result.getValue(2)  });

Results . append ( { Pair , Result . getValue ( 2 ) } ) ;


if ( N -> getOpcode ( ) == ISD :: EXTRACT_SUBVECTOR ) {

if (N->getOpcode() == ISD::EXTRACT_SUBVECTOR) {


ReplaceExtractSubVectorResults ( N , Results , DAG ) ;


SDValue Lo = DAG.getCopyFromReg(N->getOperand(0), DL, zmtarzm::ASR23, MVT::i32);

SDValue Lo = DAG . getCopyFromReg ( N -> getOperand ( 0 ) , DL , zmtarzm :: ASR23 , MVT :: i32 ) ;


SDValue Hi = DAG.getCopyFromReg(Lo, DL, zmtarzm::G0, MVT::i32);

SDValue Hi = DAG . getCopyFromReg ( Lo , DL , zmtarzm :: G0 , MVT :: i32 ) ;


SDValue Pair = DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Ops);

SDValue Pair = DAG . getNode ( ISD :: BUILD_PAIR , DL , MVT :: i64 , Ops ) ;


Results . push_back ( N -> getOperand ( 0 ) ) ;


if ( N -> getOpcode ( ) == ISD :: INTRINSIC_WO_CHAIN ) {

if (N->getOpcode() == ISD::INTRINSIC_WO_CHAIN) {


if ( N -> getValueType ( 0 ) != MVT :: f128 ) {


if (N->getOperand(0).getValueType() != MVT::i64) {

if ( N -> getOperand ( 0 ) . getValueType ( ) != MVT :: i64 ) {


Results . push_back ( LowerF128Op ( SDValue ( N , 0 ) , DAG , getLibcallName ( libCall ) , 1 ) ) ;


return ReplaceLongIntrinsic(N, Results, DAG);

return ReplaceLongIntrinsic ( N , Results , DAG ) ;


if ( N -> getOpcode ( ) == ISD :: ABS ) {


ReplaceLongIntrinsic ( N , Results , DAG ) ;


if ( N -> getOpcode ( ) == ISD :: LOAD ) {


ConstantSDNode *CN = cast<ConstantSDNode>(N->getOperand(0));

ConstantSDNode * CN = cast < ConstantSDNode > ( N -> getOperand ( 0 ) ) ;


Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue());

Intrinsic :: ID IntID = static_cast < Intrinsic :: ID > ( CN -> getZExtValue ( ) ) ;


if (IntID == Intrinsic::aarch64_sve_clasta_n) {

if ( IntID == Intrinsic :: aarch64_sve_clasta_n ) {


auto Op2 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, N->getOperand(2));

auto Op2 = DAG . getNode ( ISD :: ANY_EXTEND , DL , MVT :: i32 , N -> getOperand ( 2 ) ) ;


auto V = DAG.getNode(zmtarzmISD::CLASTA_N, DL, MVT::i32, N->getOperand(1), Op2, N->getOperand(3));

auto V = DAG . getNode ( zmtarzmISD :: CLASTA_N , DL , MVT :: i32 , N -> getOperand ( 1 ) , Op2 , N -> getOperand ( 3 ) ) ;


Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, VT, V));

Results . push_back ( DAG . getNode ( ISD :: TRUNCATE , DL , VT , V ) ) ;


if (IntID == Intrinsic::aarch64_sve_lasta) {

if ( IntID == Intrinsic :: aarch64_sve_lasta ) {


auto V = DAG.getNode(zmtarzmISD::LASTA, DL, MVT::i32, N->getOperand(1), N->getOperand(2));

auto V = DAG . getNode ( zmtarzmISD :: LASTA , DL , MVT :: i32 , N -> getOperand ( 1 ) , N -> getOperand ( 2 ) ) ;


if (IntID == Intrinsic::aarch64_sve_lastb) {

if ( IntID == Intrinsic :: aarch64_sve_lastb ) {


auto V = DAG.getNode(zmtarzmISD::LASTB, DL, MVT::i32, N->getOperand(1), N->getOperand(2));

auto V = DAG . getNode ( zmtarzmISD :: LASTB , DL , MVT :: i32 , N -> getOperand ( 1 ) , N -> getOperand ( 2 ) ) ;


LoadSDNode * Ld = cast < LoadSDNode > ( N ) ;


if ( Ld -> getValueType ( 0 ) != MVT :: i64 ) {


if ( Ld -> getMemoryVT ( ) != MVT :: i64 ) {


SDValue LoadRes = DAG.getExtLoad(Ld->getExtensionType(), DL, MVT::v2i32, Ld->getChain(), Ld->getBasePtr(), Ld->getPointerInfo(), MVT::v2i32, Ld->getAlignment(), Ld->getMemOperand()->getFlags(), Ld->getAAInfo());

SDValue LoadRes = DAG . getExtLoad ( Ld -> getExtensionType ( ) , DL , MVT :: v2i32 , Ld -> getChain ( ) , Ld -> getBasePtr ( ) , Ld -> getPointerInfo ( ) , MVT :: v2i32 , Ld -> getAlignment ( ) , Ld -> getMemOperand ( ) -> getFlags ( ) , Ld -> getAAInfo ( ) ) ;


SDValue Res = DAG.getNode(ISD::BITCAST, DL, MVT::i64, LoadRes);

SDValue Res = DAG . getNode ( ISD :: BITCAST , DL , MVT :: i64 , LoadRes ) ;


Results . push_back ( LoadRes . getValue ( 1 ) ) ;


llvm_unreachable("Don't know how to custom expand this");

llvm_unreachable
(
"Don't know how to custom expand this"
)
;


void zmtarzmTargetLowering::ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results, SelectionDAG &DAG) const {

void zmtarzmTargetLowering :: ReplaceNodeResults ( SDNode * N , SmallVectorImpl < SDValue > & Results , SelectionDAG & DAG ) const {


ExpandREAD_REGISTER ( N , Results , DAG ) ;


Res = ExpandBITCAST ( N , DAG , Subtarget ) ;


ReplaceBITCASTResults ( N , Results , DAG ) ;


Res = Expand64BitShift(N, DAG, Subtarget);

Res = Expand64BitShift ( N , DAG , Subtarget ) ;


Results . push_back ( LowerVECREDUCE ( SDValue ( N , 0 ) , DAG ) ) ;


Res = LowerDivRem ( SDValue ( N , 0 ) , DAG ) ;


Results . push_back ( Res . getValue ( 0 ) ) ;


Results . push_back ( Res . getValue ( 1 ) ) ;


Results . push_back ( LowerCTPOP ( SDValue ( N , 0 ) , DAG ) ) ;


ReplaceReductionResults(N, Results, DAG, ISD::ADD, zmtarzmISD::SADDV);

ReplaceReductionResults ( N , Results , DAG , ISD :: ADD , zmtarzmISD :: SADDV ) ;


Res = LowerSADDSUBSAT(SDValue(N, 0), DAG, Subtarget);

Res = LowerSADDSUBSAT ( SDValue ( N , 0 ) , DAG , Subtarget ) ;


ReplaceReductionResults(N, Results, DAG, ISD::ADD, zmtarzmISD::UADDV);

ReplaceReductionResults ( N , Results , DAG , ISD :: ADD , zmtarzmISD :: UADDV ) ;


ReplaceReductionResults(N, Results, DAG, ISD::SMIN, zmtarzmISD::SMINVV);

ReplaceReductionResults ( N , Results , DAG , ISD :: SMIN , zmtarzmISD :: SMINVV ) ;


ReplaceREADCYCLECOUNTER(N, Results, DAG, Subtarget);

ReplaceREADCYCLECOUNTER ( N , Results , DAG , Subtarget ) ;


ReplaceReductionResults(N, Results, DAG, ISD::UMINV, zmtarzmISD::UMINV);

ReplaceReductionResults ( N , Results , DAG , ISD :: UMINV , zmtarzmISD :: UMINV ) ;


return ExpandDIV_Windows(SDValue(N, 0), DAG, N->getOpcode() == ISD::SDIV, Results);

return ExpandDIV_Windows ( SDValue ( N , 0 ) , DAG , N -> getOpcode ( ) == ISD :: SDIV , Results ) ;


ReplaceReductionResults(N, Results, DAG, ISD::SMAX, zmtarzmISD::SMAXVV);

ReplaceReductionResults ( N , Results , DAG , ISD :: SMAX , zmtarzmISD :: SMAXVV ) ;


ReplaceReductionResults(N, Results, DAG, ISD::UMAX, zmtarzmISD::UMAXVV);

ReplaceReductionResults ( N , Results , DAG , ISD :: UMAX , zmtarzmISD :: UMAXVV ) ;


RTLIB::Libcall libCall = RTLIB::UNKNOWN_LIBCALL;

RTLIB :: Libcall libCall = RTLIB :: UNKNOWN_LIBCALL ;


if ( N -> getOpcode ( ) == ISD :: FP_TO_SINT ) {

if (N->getOpcode() == ISD::FP_TO_SINT) {


ReplaceCMP_SWAP_128Results(N, Results, DAG, Subtarget);

ReplaceCMP_SWAP_128Results ( N , Results , DAG , Subtarget ) ;


if (N->getOperand(0).getValueType() != MVT::f128) {

if ( N -> getOperand ( 0 ) . getValueType ( ) != MVT :: f128 ) {


if ( N -> getValueType ( 0 ) != MVT :: i64 ) {


Results.push_back(LowerF128Op(SDValue(N, 0), DAG, getLibcallName(libCall), 1));

Results . push_back ( LowerF128Op ( SDValue ( N , 0 ) , DAG , getLibcallName ( libCall ) , 1 ) ) ;


if ( N -> getOpcode ( ) == ISD :: FP_TO_UINT ) {

if (N->getOpcode() == ISD::FP_TO_UINT) {


LoadSDNode *LoadNode = cast<LoadSDNode>(N);

LoadSDNode * LoadNode = cast < LoadSDNode > ( N ) ;


if (LoadNode->getMemoryVT() != MVT::i128) {

if ( LoadNode -> getMemoryVT ( ) != MVT :: i128 ) {


SDValue Result = DAG.getMemIntrinsicNode(zmtarzmISD::LDP, SDLoc(N), DAG.getVTList({MVT::i64, MVT::i64, MVT::Other}), {LoadNode->getChain(), LoadNode->getBasePtr()}, LoadNode->getMemoryVT(), LoadNode->getMemOperand());

SDValue Result = DAG . getMemIntrinsicNode ( zmtarzmISD :: LDP , SDLoc ( N ) , DAG . getVTList ( { MVT :: i64 , MVT :: i64 , MVT :: Other } ) , { LoadNode -> getChain ( ) , LoadNode -> getBasePtr ( ) } , LoadNode -> getMemoryVT ( ) , LoadNode -> getMemOperand ( ) ) ;


SDValue Pair = DAG.getNode(ISD::BUILD_PAIR, SDLoc(N), MVT::i128, Result.getValue(0), Result.getValue(1));

SDValue Pair = DAG . getNode ( ISD :: BUILD_PAIR , SDLoc ( N ) , MVT :: i128 , Result . getValue ( 0 ) , Result . getValue ( 1 ) ) ;


Results.append({Pair, Result.getValue(2)  });

Results . append ( { Pair , Result . getValue ( 2 ) } ) ;


if ( N -> getOpcode ( ) == ISD :: READCYCLECOUNTER ) {

if (N->getOpcode() == ISD::READCYCLECOUNTER) {


ReplaceExtractSubVectorResults ( N , Results , DAG ) ;


assert ( Subtarget -> hasLeonCycleCounter ( ) ) ;


SDValue Lo = DAG.getCopyFromReg(N->getOperand(0), DL, zmtarzm::ASR23, MVT::i32);

SDValue Lo = DAG . getCopyFromReg ( N -> getOperand ( 0 ) , DL , zmtarzm :: ASR23 , MVT :: i32 ) ;


SDValue Hi = DAG.getCopyFromReg(Lo, DL, zmtarzm::G0, MVT::i32);

SDValue Hi = DAG . getCopyFromReg ( Lo , DL , zmtarzm :: G0 , MVT :: i32 ) ;


SDValue Pair = DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Ops);

SDValue Pair = DAG . getNode ( ISD :: BUILD_PAIR , DL , MVT :: i64 , Ops ) ;


Results . push_back ( N -> getOperand ( 0 ) ) ;


if ( N -> getOpcode ( ) == ISD :: SINT_TO_FP ) {

if (N->getOpcode() == ISD::SINT_TO_FP) {


if ( N -> getValueType ( 0 ) != MVT :: f128 ) {


if (N->getOperand(0).getValueType() != MVT::i64) {

if ( N -> getOperand ( 0 ) . getValueType ( ) != MVT :: i64 ) {


Results . push_back ( LowerF128Op ( SDValue ( N , 0 ) , DAG , getLibcallName ( libCall ) , 1 ) ) ;


return ReplaceLongIntrinsic(N, Results, DAG);

return ReplaceLongIntrinsic ( N , Results , DAG ) ;


if ( N -> getOpcode ( ) == ISD :: UINT_TO_FP ) {

if (N->getOpcode() == ISD::UINT_TO_FP) {


ReplaceLongIntrinsic ( N , Results , DAG ) ;


if ( N -> getOpcode ( ) == ISD :: LOAD ) {


ConstantSDNode *CN = cast<ConstantSDNode>(N->getOperand(0));

ConstantSDNode * CN = cast < ConstantSDNode > ( N -> getOperand ( 0 ) ) ;


Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue());

Intrinsic :: ID IntID = static_cast < Intrinsic :: ID > ( CN -> getZExtValue ( ) ) ;


if (IntID == Intrinsic::aarch64_sve_clasta_n) {

if ( IntID == Intrinsic :: aarch64_sve_clasta_n ) {


auto Op2 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, N->getOperand(2));

auto Op2 = DAG . getNode ( ISD :: ANY_EXTEND , DL , MVT :: i32 , N -> getOperand ( 2 ) ) ;


auto V = DAG.getNode(zmtarzmISD::CLASTA_N, DL, MVT::i32, N->getOperand(1), Op2, N->getOperand(3));

auto V = DAG . getNode ( zmtarzmISD :: CLASTA_N , DL , MVT :: i32 , N -> getOperand ( 1 ) , Op2 , N -> getOperand ( 3 ) ) ;


Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, VT, V));

Results . push_back ( DAG . getNode ( ISD :: TRUNCATE , DL , VT , V ) ) ;


if (IntID == Intrinsic::aarch64_sve_lasta) {

if ( IntID == Intrinsic :: aarch64_sve_lasta ) {


auto V = DAG.getNode(zmtarzmISD::LASTA, DL, MVT::i32, N->getOperand(1), N->getOperand(2));

auto V = DAG . getNode ( zmtarzmISD :: LASTA , DL , MVT :: i32 , N -> getOperand ( 1 ) , N -> getOperand ( 2 ) ) ;


if (IntID == Intrinsic::aarch64_sve_lastb) {

if ( IntID == Intrinsic :: aarch64_sve_lastb ) {


auto V = DAG.getNode(zmtarzmISD::LASTB, DL, MVT::i32, N->getOperand(1), N->getOperand(2));

auto V = DAG . getNode ( zmtarzmISD :: LASTB , DL , MVT :: i32 , N -> getOperand ( 1 ) , N -> getOperand ( 2 ) ) ;


LoadSDNode * Ld = cast < LoadSDNode > ( N ) ;


if ( Ld -> getValueType ( 0 ) != MVT :: i64 ) {


if ( Ld -> getMemoryVT ( ) != MVT :: i64 ) {


SDValue LoadRes = DAG.getExtLoad(Ld->getExtensionType(), DL, MVT::v2i32, Ld->getChain(), Ld->getBasePtr(), Ld->getPointerInfo(), MVT::v2i32, Ld->getAlignment(), Ld->getMemOperand()->getFlags(), Ld->getAAInfo());

SDValue LoadRes = DAG . getExtLoad ( Ld -> getExtensionType ( ) , DL , MVT :: v2i32 , Ld -> getChain ( ) , Ld -> getBasePtr ( ) , Ld -> getPointerInfo ( ) , MVT :: v2i32 , Ld -> getAlignment ( ) , Ld -> getMemOperand ( ) -> getFlags ( ) , Ld -> getAAInfo ( ) ) ;


SDValue Res = DAG.getNode(ISD::BITCAST, DL, MVT::i64, LoadRes);

SDValue Res = DAG . getNode ( ISD :: BITCAST , DL , MVT :: i64 , LoadRes ) ;


Results . push_back ( LoadRes . getValue ( 1 ) ) ;


llvm_unreachable("Don't know how to custom expand this");

llvm_unreachable
(
"Don't know how to custom expand this"
)
;


bool shouldConsiderGEPOffsetSplit() const override {

bool shouldConsiderGEPOffsetSplit ( ) const override {


bool shouldConvertConstantLoadToIntImm(const APInt &Imm, Type *Ty) const override {

bool shouldConvertConstantLoadToIntImm ( const APInt & Imm , Type * Ty ) const override {


TargetLowering::AtomicExpansionKind zmtarzmTargetLowering::shouldExpandAtomicCmpXchgInIR(AtomicCmpXchgInst *AI) const {

TargetLowering :: AtomicExpansionKind zmtarzmTargetLowering :: shouldExpandAtomicCmpXchgInIR ( AtomicCmpXchgInst * AI ) const {


unsigned Size = AI->getCompareOperand()->getType()->getPrimitiveSizeInBits();

unsigned Size = AI -> getCompareOperand ( ) -> getType ( ) -> getPrimitiveSizeInBits ( ) ;


TargetLowering::AtomicExpansionKind zmtarzmTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {

TargetLowering :: AtomicExpansionKind zmtarzmTargetLowering :: shouldExpandAtomicRMWInIR ( AtomicRMWInst * AI ) const {


if ( AI -> isFloatingPointOperation ( ) ) {


if (getTargetMachine().getOptLevel() == #) {

if ( getTargetMachine ( ) . getOptLevel ( ) == # ) {


unsigned Size = AI->getType()->getPrimitiveSizeInBits();

unsigned Size = AI -> getType ( ) -> getPrimitiveSizeInBits ( ) ;


if ( AI -> getOperation ( ) == AtomicRMWInst :: Nand ) {

if (AI->getOperation() == AtomicRMWInst::Nand) {


bool hasAtomicRMW = !Subtarget->isThumb() || Subtarget->hasV8MBaselineOps();

bool hasAtomicRMW = ! Subtarget -> isThumb ( ) || Subtarget -> hasV8MBaselineOps ( ) ;


if ( getTargetMachine ( ) . getOptLevel ( ) == CodeGenOpt :: None ) {

if (getTargetMachine().getOptLevel() == CodeGenOpt::None) {


if ( Size <= ( Subtarget -> isMClass ( ) ? 32U : 64U ) ) {

if (Size <= (Subtarget->isMClass() ? 32U : 64U)) {


bool shouldExpandShift(SelectionDAG &DAG, SDNode *N) const override {

bool shouldExpandShift ( SelectionDAG & DAG , SDNode * N ) const override {


if ( DAG . getMachineFunction ( ) . getFunction ( ) . hasMinSize ( ) ) {


if ( ! Subtarget -> isTargetWindows ( ) ) {


if ( Subtarget -> isTargetWindows ( ) ) {


bool zmtarzmTargetLowering::shouldExtendTypeInLibCall(EVT Type) const {

bool zmtarzmTargetLowering :: shouldExtendTypeInLibCall ( EVT Type ) const {


if ( Subtarget . abiUsesSoftFloat ( ) ) {


bool shouldInsertFencesForAtomic(const Instruction *I) const override {

bool shouldInsertFencesForAtomic ( const Instruction * I ) const override {


bool zmtarzmTargetLowering::shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const {

bool zmtarzmTargetLowering :: shouldSignExtendTypeInLibCall ( EVT Type , bool IsSigned ) const {


zmtarzmTargetLowering::zmtarzmTargetLowering(const TargetMachine &TM, const zmtarzmSubtarget &STI) : TargetLowering(TM), Subtarget(STI) {

zmtarzmTargetLowering :: zmtarzmTargetLowering ( const TargetMachine & TM , const zmtarzmSubtarget & STI ) : TargetLowering ( TM ) , Subtarget ( STI ) {


addRegisterClass ( MVT :: i16 , & zmtarzm :: GPRRegClass ) ;


computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: X1 ) ;


for (auto N : {ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}) {

for ( auto N : { ISD :: EXTLOAD , ISD :: SEXTLOAD , ISD :: ZEXTLOAD } ) {


setLoadExtAction ( N , MVT :: i16 , MVT :: i1 , Promote ) ;

N zmsplit  MVT::i16 zmsplit  MVT::i1 zmsplit  Promote

setLoadExtAction(N, MVT::i16, MVT::i1, Promote);


setBooleanContents ( ZeroOrOneBooleanContent ) ;


addRegisterClass ( MVT :: i32 , & zmtarzm :: GPRRegClass ) ;


auto *RegInfo = Subtarget.getRegisterInfo();

auto * RegInfo = Subtarget . getRegisterInfo ( ) ;


setStackPointerRegisterToSaveRestore ( # ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setBooleanContents ( ZeroOrOneBooleanContent , ZeroOrNegativeOneBooleanContent ) ;


for ( auto VT : { MVT :: i1 , MVT :: i8 } ) {


setLoadExtAction ( # , # , MVT :: i1 , # ) ;


setLoadExtAction ( # , # , MVT :: f32 , # ) ;


setLoadExtAction ( # , # , MVT :: f16 , # ) ;


setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);

setLoadExtAction ( ISD :: SEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote);

setLoadExtAction ( ISD :: ZEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction ( # , # , F16 # , # ) ;


setOperationAction ( ISD :: GlobalAddress , MVT :: i16 , Custom ) ;

ISD::GlobalAddress zmsplit MVT::i16 zmsplit Custom


setOperationAction ( ISD :: BRCOND , MVT :: Other , Expand ) ;

ISD::BRCOND zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: BR_CC , MVT :: i16 , Custom ) ;

ISD::BR_CC zmsplit MVT::i16 zmsplit Custom


setOperationAction ( ISD :: BR_JT , MVT :: Other , Expand ) ;

ISD::BR_JT zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: SELECT , MVT :: i16 , Custom ) ;

ISD::SELECT zmsplit MVT::i16 zmsplit Custom


setOperationAction ( ISD :: SELECT_CC , MVT :: i16 , Expand ) ;

ISD::SELECT_CC zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: SETCC , MVT :: i16 , Expand ) ;

ISD::SETCC zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: SIGN_EXTEND_INREG , VT , Expand ) ;

ISD::SIGN_EXTEND_INREG zmsplit VT zmsplit Expand


setOperationAction ( ISD :: MUL , MVT :: i16 , Expand ) ;

ISD::MUL zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: SMUL_LOHI , MVT :: i16 , Expand ) ;

ISD::SMUL_LOHI zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: UMUL_LOHI , MVT :: i16 , Expand ) ;

ISD::UMUL_LOHI zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: MULHS , MVT :: i16 , Expand ) ;

ISD::MULHS zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: MULHU , MVT :: i16 , Expand ) ;

ISD::MULHU zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: SREM , MVT :: i16 , Expand ) ;

ISD::SREM zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: SDIVREM , MVT :: i16 , Expand ) ;

ISD::SDIVREM zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: SDIV , MVT :: i16 , Expand ) ;

ISD::SDIV zmsplit MVT::i16 zmsplit Expand


setOperationAction(#,             #,   #);

setOperationAction(#,             #,   #);


setOperationAction(#,               #,   #);

setOperationAction(#,               #,   #);


setOperationAction(#,              #,   #);

setOperationAction(#,              #,   #);


setOperationAction ( ISD :: UREM , MVT :: i16 , Expand ) ;

ISD::UREM zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: UDIVREM , MVT :: i16 , Expand ) ;

ISD::UDIVREM zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: UDIV , MVT :: i16 , Expand ) ;

ISD::UDIV zmsplit MVT::i16 zmsplit Expand


setOperationAction ( ISD :: DYNAMIC_STACKALLOC , MVT :: i16 , Expand ) ;

ISD::DYNAMIC_STACKALLOC zmsplit MVT::i16 zmsplit Expand

ISD :: DYNAMIC_STACKALLOC MVT :: i16 Expand


setOperationAction ( ISD :: STACKSAVE , MVT :: Other , Expand ) ;

ISD::STACKSAVE zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: STACKRESTORE , MVT :: Other , Expand ) ;

ISD::STACKRESTORE zmsplit MVT::Other zmsplit Expand


setBooleanContents ( ZeroOrOneBooleanContent ) ;


setMinimumJumpTableEntries ( INT_MAX ) ;


setCondCodeAction ( CC , VT , Expand ) ;


computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


setBooleanContents ( UndefinedBooleanContent ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R14 ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R3 ) ;


setMinFunctionAlignment ( FunctionAlignment ) ;


setSchedulingPreference ( Sched :: Source ) ;


setLibcallCallingConv ( static_cast < RTLIB :: Libcall > ( I ) , CallingConv :: Fast ) ;


setOperationAction(#,           #,   #);

setOperationAction(#,           #,   #);


setStackPointerRegisterToSaveRestore ( # ) ;


setMinFunctionAlignment ( Align :: Constant < 2 > ( ) ) ;


setStackPointerRegisterToSaveRestore(ABI.IsN64() ? zmtarzm::SP_64 : zmtarzm::SP);

setStackPointerRegisterToSaveRestore ( ABI . IsN64 ( ) ? zmtarzm :: SP_64 : zmtarzm :: SP ) ;


zmtarzmTargetLowering :: zmtarzmTargetLowering ( const TargetMachine & TM , const zmtarzmSubtarget & STI ) : TargetLowering ( TM ) , Subtarget ( STI ) {


setStackPointerRegisterToSaveRestore ( zmtarzm :: X1 ) ;


for ( auto N : { ISD :: EXTLOAD , ISD :: SEXTLOAD , ISD :: ZEXTLOAD } ) {


setBooleanContents ( ZeroOrOneBooleanContent ) ;


addRegisterClass ( MVT :: i32 , & zmtarzm :: GPRRegClass ) ;


addRegisterClass ( MVT :: f32 , & zmtarzm :: sFPR32RegClass ) ;


addRegisterClass ( MVT :: f32 , & zmtarzm :: FPR32RegClass ) ;


addRegisterClass ( MVT :: f64 , & zmtarzm :: sFPR64RegClass ) ;


addRegisterClass ( MVT :: f64 , & zmtarzm :: FPR64RegClass ) ;


auto * RegInfo = Subtarget . getRegisterInfo ( ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setBooleanContents ( ZeroOrOneBooleanContent , ZeroOrNegativeOneBooleanContent ) ;


for ( auto VT : { MVT :: i1 , MVT :: i8 } ) {


setLoadExtAction ( # , # , MVT :: i1 , # ) ;


setLoadExtAction ( # , # , MVT :: f32 , # ) ;


setLoadExtAction ( # , # , MVT :: f16 , # ) ;


setLoadExtAction ( ISD :: SEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction ( ISD :: ZEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction ( # , # , F16 # , # ) ;


setOperationAction ( ISD :: ADDCARRY , MVT :: i32 , Legal ) ;

ISD::ADDCARRY zmsplit MVT::i32 zmsplit Legal


setOperationAction ( ISD :: SUBCARRY , MVT :: i32 , Legal ) ;

ISD::SUBCARRY zmsplit MVT::i32 zmsplit Legal


setOperationAction ( ISD :: BITREVERSE , MVT :: i32 , Legal ) ;

ISD::BITREVERSE zmsplit MVT::i32 zmsplit Legal


setOperationAction ( ISD :: SREM , MVT :: i32 , Expand ) ;

ISD::SREM zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: UREM , MVT :: i32 , Expand ) ;

ISD::UREM zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: UDIVREM , MVT :: i32 , Expand ) ;

ISD::UDIVREM zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SDIVREM , MVT :: i32 , Expand ) ;

ISD::SDIVREM zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: CTTZ , MVT :: i32 , Expand ) ;

ISD::CTTZ zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: CTPOP , MVT :: i32 , Expand ) ;

ISD::CTPOP zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: ROTR , MVT :: i32 , Expand ) ;

ISD::ROTR zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SHL_PARTS , MVT :: i32 , Expand ) ;

ISD::SHL_PARTS zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SRL_PARTS , MVT :: i32 , Expand ) ;

ISD::SRL_PARTS zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SRA_PARTS , MVT :: i32 , Expand ) ;

ISD::SRA_PARTS zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: UMUL_LOHI , MVT :: i32 , Expand ) ;

ISD::UMUL_LOHI zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SMUL_LOHI , MVT :: i32 , Expand ) ;

ISD::SMUL_LOHI zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SELECT_CC , MVT :: i32 , Expand ) ;

ISD::SELECT_CC zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: BR_CC , MVT :: i32 , Expand ) ;

ISD::BR_CC zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: BR_JT , MVT :: Other , Expand ) ;

ISD::BR_JT zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: DYNAMIC_STACKALLOC , MVT :: i32 , Expand ) ;

ISD::DYNAMIC_STACKALLOC zmsplit MVT::i32 zmsplit Expand

ISD :: DYNAMIC_STACKALLOC MVT :: i32 Expand


setOperationAction ( ISD :: STACKSAVE , MVT :: Other , Expand ) ;

ISD::STACKSAVE zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: STACKRESTORE , MVT :: Other , Expand ) ;

ISD::STACKRESTORE zmsplit MVT::Other zmsplit Expand


setBooleanContents ( ZeroOrOneBooleanContent ) ;


setMinimumJumpTableEntries ( INT_MAX ) ;


setOperationAction ( ISD :: MULHS , MVT :: i32 , Expand ) ;

ISD::MULHS zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: MULHU , MVT :: i32 , Expand ) ;

ISD::MULHU zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: VAARG , MVT :: Other , Expand ) ;

ISD::VAARG zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: VACOPY , MVT :: Other , Expand ) ;

ISD::VACOPY zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: VAEND , MVT :: Other , Expand ) ;

ISD::VAEND zmsplit MVT::Other zmsplit Expand


setLoadExtAction ( ISD :: EXTLOAD , MVT :: i32 , MVT :: i1 , Promote ) ;

ISD::EXTLOAD zmsplit  MVT::i32 zmsplit  MVT::i1 zmsplit  Promote

setLoadExtAction(ISD::EXTLOAD, MVT::i32, MVT::i1, Promote);

ISD :: EXTLOAD MVT :: i32 MVT :: i1 Promote


setLoadExtAction ( ISD :: SEXTLOAD , MVT :: i32 , MVT :: i1 , Promote ) ;

ISD::SEXTLOAD zmsplit  MVT::i32 zmsplit  MVT::i1 zmsplit  Promote

setLoadExtAction(ISD::SEXTLOAD, MVT::i32, MVT::i1, Promote);

ISD :: SEXTLOAD MVT :: i32 MVT :: i1 Promote


setLoadExtAction ( ISD :: ZEXTLOAD , MVT :: i32 , MVT :: i1 , Promote ) ;

ISD::ZEXTLOAD zmsplit  MVT::i32 zmsplit  MVT::i1 zmsplit  Promote

setLoadExtAction(ISD::ZEXTLOAD, MVT::i32, MVT::i1, Promote);

ISD :: ZEXTLOAD MVT :: i32 MVT :: i1 Promote


setOperationAction ( ISD :: GlobalAddress , MVT :: i32 , Custom ) ;

ISD::GlobalAddress zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: ExternalSymbol , MVT :: i32 , Custom ) ;

ISD::ExternalSymbol zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: GlobalTLSAddress , MVT :: i32 , Custom ) ;

ISD::GlobalTLSAddress zmsplit MVT::i32 zmsplit Custom

ISD :: GlobalTLSAddress MVT :: i32 Custom


setOperationAction ( ISD :: BlockAddress , MVT :: i32 , Custom ) ;

ISD::BlockAddress zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: JumpTable , MVT :: i32 , Custom ) ;

ISD::JumpTable zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: VASTART , MVT :: Other , Custom ) ;

ISD::VASTART zmsplit MVT::Other zmsplit Custom


setLoadExtAction ( ISD :: SEXTLOAD , MVT :: i32 , MVT :: i8 , Expand ) ;

ISD::SEXTLOAD zmsplit  MVT::i32 zmsplit  MVT::i8 zmsplit  Expand

setLoadExtAction(ISD::SEXTLOAD, MVT::i32, MVT::i8, Expand);

ISD :: SEXTLOAD MVT :: i32 MVT :: i8 Expand


setLoadExtAction ( ISD :: SEXTLOAD , MVT :: i32 , MVT :: i16 , Expand ) ;

ISD::SEXTLOAD zmsplit  MVT::i32 zmsplit  MVT::i16 zmsplit  Expand

setLoadExtAction(ISD::SEXTLOAD, MVT::i32, MVT::i16, Expand);

ISD :: SEXTLOAD MVT :: i32 MVT :: i16 Expand


setOperationAction ( ISD :: CTLZ , MVT :: i32 , Expand ) ;

ISD::CTLZ zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: BSWAP , MVT :: i32 , Expand ) ;

ISD::BSWAP zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: ABS , MVT :: i32 , Expand ) ;

ISD::ABS zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: BITREVERSE , MVT :: i32 , Expand ) ;

ISD::BITREVERSE zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SDIV , MVT :: i32 , Expand ) ;

ISD::SDIV zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: UDIV , MVT :: i32 , Expand ) ;

ISD::UDIV zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: ATOMIC_FENCE , MVT :: Other , Expand ) ;

ISD::ATOMIC_FENCE zmsplit MVT::Other zmsplit Expand


ISD :: CondCode FPCCToExtend [ ] = { ISD :: SETONE , ISD :: SETUEQ , ISD :: SETUGT , ISD :: SETUGE , ISD :: SETULT , ISD :: SETULE } ;

ISD::CondCode FPCCToExtend[] = {ISD::SETONE, ISD::SETUEQ, ISD::SETUGT, ISD::SETUGE, ISD::SETULT, ISD::SETULE};


ISD :: NodeType FPOpToExpand [ ] = { ISD :: FSIN , ISD :: FCOS , ISD :: FSINCOS , ISD :: FPOW , ISD :: FREM , ISD :: FCOPYSIGN } ;

ISD::NodeType FPOpToExpand[] = {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FCOPYSIGN};


MVT AllVTy [ ] = { MVT :: f32 , MVT :: f64 } ;


setOperationAction ( ISD :: FREM , VT , Expand ) ;


setOperationAction ( ISD :: SELECT_CC , VT , Expand ) ;

ISD::SELECT_CC zmsplit VT zmsplit Expand


setOperationAction ( ISD :: BR_CC , VT , Expand ) ;


setCondCodeAction ( CC , VT , Expand ) ;


setOperationAction ( Op , VT , Expand ) ;


setOperationAction ( ISD :: ConstantFP , MVT :: f32 , Legal ) ;

ISD::ConstantFP zmsplit MVT::f32 zmsplit Legal


setLoadExtAction ( ISD :: EXTLOAD , MVT :: f64 , MVT :: f32 , Expand ) ;

ISD::EXTLOAD zmsplit  MVT::f64 zmsplit  MVT::f32 zmsplit  Expand

setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand);

ISD :: EXTLOAD MVT :: f64 MVT :: f32 Expand


setTruncStoreAction ( MVT :: f64 , MVT :: f32 , Expand ) ;

MVT::f64 zmsplit MVT::f32 zmsplit Expand


computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


setBooleanContents ( UndefinedBooleanContent ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R14 ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R3 ) ;


setMinFunctionAlignment ( FunctionAlignment ) ;


setSchedulingPreference ( Sched :: Source ) ;


setLibcallCallingConv ( static_cast < RTLIB :: Libcall > ( I ) , CallingConv :: Fast ) ;


setBooleanContents ( ZeroOrOneBooleanContent ) ;


setStackPointerRegisterToSaveRestore ( # ) ;


setMinFunctionAlignment ( Align :: Constant < 2 > ( ) ) ;


setStackPointerRegisterToSaveRestore ( ABI . IsN64 ( ) ? zmtarzm :: SP_64 : zmtarzm :: SP ) ;


zmtarzmTargetLowering :: zmtarzmTargetLowering ( const TargetMachine & TM , const zmtarzmSubtarget & STI ) : TargetLowering ( TM ) , Subtarget ( STI ) {

zmtarzmTargetLowering::zmtarzmTargetLowering(const TargetMachine &TM, const zmtarzmSubtarget &STI) : TargetLowering(TM), Subtarget(STI) {


setStackPointerRegisterToSaveRestore ( zmtarzm :: X1 ) ;


for ( auto N : { ISD :: EXTLOAD , ISD :: SEXTLOAD , ISD :: ZEXTLOAD } ) {

for (auto N : {ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}) {


addRegisterClass ( MVT :: i32 , & zmtarzm :: GPRRegClass ) ;


auto * RegInfo = Subtarget . getRegisterInfo ( ) ;

auto *RegInfo = Subtarget.getRegisterInfo();


setStackPointerRegisterToSaveRestore ( zmtarzm :: SP ) ;


setBooleanContents ( ZeroOrOneBooleanContent , ZeroOrNegativeOneBooleanContent ) ;


for ( auto VT : { MVT :: i1 , MVT :: i8 } ) {


setLoadExtAction ( # , # , MVT :: i1 , # ) ;


setLoadExtAction ( # , # , MVT :: f32 , # ) ;


setLoadExtAction ( # , # , MVT :: f16 , # ) ;


setLoadExtAction ( ISD :: SEXTLOAD , VT , MVT :: i1 , Promote ) ;

setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);


setLoadExtAction ( ISD :: ZEXTLOAD , VT , MVT :: i1 , Promote ) ;

setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote);


setLoadExtAction ( # , # , F16 # , # ) ;


setOperationAction ( ISD :: BR_CC , MVT :: i32 , Custom ) ;

ISD::BR_CC zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: BR_JT , MVT :: Other , Expand ) ;

ISD::BR_JT zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: BRCOND , MVT :: Other , Expand ) ;

ISD::BRCOND zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: SETCC , MVT :: i32 , Custom ) ;

ISD::SETCC zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: SETCCE , MVT :: i32 , Custom ) ;

ISD::SETCCE zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: SELECT , MVT :: i32 , Expand ) ;

ISD::SELECT zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SELECT_CC , MVT :: i32 , Custom ) ;

ISD::SELECT_CC zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: GlobalAddress , MVT :: i32 , Custom ) ;

ISD::GlobalAddress zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: BlockAddress , MVT :: i32 , Custom ) ;

ISD::BlockAddress zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: JumpTable , MVT :: i32 , Custom ) ;

ISD::JumpTable zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: ConstantPool , MVT :: i32 , Custom ) ;

ISD::ConstantPool zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: DYNAMIC_STACKALLOC , MVT :: i32 , Custom ) ;

ISD::DYNAMIC_STACKALLOC zmsplit MVT::i32 zmsplit Custom

ISD :: DYNAMIC_STACKALLOC MVT :: i32 Custom


setOperationAction ( ISD :: STACKSAVE , MVT :: Other , Expand ) ;

ISD::STACKSAVE zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: STACKRESTORE , MVT :: Other , Expand ) ;

ISD::STACKRESTORE zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: VASTART , MVT :: Other , Custom ) ;

ISD::VASTART zmsplit MVT::Other zmsplit Custom


setOperationAction(#,             #,   #);


setOperationAction(#,               #,   #);


setOperationAction(#,              #,   #);


setOperationAction ( ISD :: VAARG , MVT :: Other , Expand ) ;

ISD::VAARG zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: VACOPY , MVT :: Other , Expand ) ;

ISD::VACOPY zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: VAEND , MVT :: Other , Expand ) ;

ISD::VAEND zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: SDIV , MVT :: i32 , Expand ) ;

ISD::SDIV zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: UDIV , MVT :: i32 , Expand ) ;

ISD::UDIV zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SDIVREM , MVT :: i32 , Expand ) ;

ISD::SDIVREM zmsplit MVT::i32 zmsplit Expand


setBooleanContents ( ZeroOrOneBooleanContent ) ;


setMinimumJumpTableEntries ( INT_MAX ) ;


setOperationAction ( ISD :: UDIVREM , MVT :: i32 , Expand ) ;

ISD::UDIVREM zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SREM , MVT :: i32 , Expand ) ;

ISD::SREM zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: UREM , MVT :: i32 , Expand ) ;

ISD::UREM zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: MUL , MVT :: i32 , Custom ) ;

ISD::MUL zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: MULHU , MVT :: i32 , Expand ) ;

ISD::MULHU zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: MULHS , MVT :: i32 , Expand ) ;

ISD::MULHS zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: UMUL_LOHI , MVT :: i32 , Expand ) ;

ISD::UMUL_LOHI zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SMUL_LOHI , MVT :: i32 , Expand ) ;

ISD::SMUL_LOHI zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: ROTR , MVT :: i32 , Expand ) ;

ISD::ROTR zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: ROTL , MVT :: i32 , Expand ) ;

ISD::ROTL zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: SHL_PARTS , MVT :: i32 , Expand ) ;

ISD::SHL_PARTS zmsplit MVT::i32 zmsplit Expand


setCondCodeAction ( CC , VT , Expand ) ;


computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


setBooleanContents ( UndefinedBooleanContent ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R14 ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R3 ) ;


setMinFunctionAlignment ( FunctionAlignment ) ;


setSchedulingPreference ( Sched :: Source ) ;


setOperationAction ( ISD :: SRL_PARTS , MVT :: i32 , Custom ) ;

ISD::SRL_PARTS zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: SRA_PARTS , MVT :: i32 , Expand ) ;

ISD::SRA_PARTS zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: BSWAP , MVT :: i32 , Expand ) ;

ISD::BSWAP zmsplit MVT::i32 zmsplit Expand


setOperationAction ( ISD :: CTPOP , MVT :: i32 , Legal ) ;

ISD::CTPOP zmsplit MVT::i32 zmsplit Legal


setOperationAction ( ISD :: CTLZ , MVT :: i32 , Legal ) ;

ISD::CTLZ zmsplit MVT::i32 zmsplit Legal


setOperationAction ( ISD :: CTTZ , MVT :: i32 , Legal ) ;

ISD::CTTZ zmsplit MVT::i32 zmsplit Legal


setOperationAction ( ISD :: SIGN_EXTEND_INREG , MVT :: i1 , Expand ) ;

ISD::SIGN_EXTEND_INREG zmsplit MVT::i1 zmsplit Expand

ISD :: SIGN_EXTEND_INREG MVT :: i1 Expand


setOperationAction ( ISD :: SIGN_EXTEND_INREG , MVT :: i8 , Expand ) ;

ISD::SIGN_EXTEND_INREG zmsplit MVT::i8 zmsplit Expand

ISD :: SIGN_EXTEND_INREG MVT :: i8 Expand


setOperationAction ( ISD :: SIGN_EXTEND_INREG , MVT :: i16 , Expand ) ;

ISD::SIGN_EXTEND_INREG zmsplit MVT::i16 zmsplit Expand

ISD :: SIGN_EXTEND_INREG MVT :: i16 Expand


for ( MVT VT : MVT :: integer_valuetypes ( ) ) {

for (MVT VT : MVT::integer_valuetypes()) {


setLoadExtAction ( ISD :: EXTLOAD , VT , MVT :: i1 , Promote ) ;

setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote);


setLoadExtAction ( ISD :: ZEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction ( ISD :: SEXTLOAD , VT , MVT :: i1 , Promote ) ;


for ( int I = 0 ; I < RTLIB :: UNKNOWN_LIBCALL ; ++ I ) {

for (int I = 0; I < RTLIB::UNKNOWN_LIBCALL; ++I) {


setLibcallCallingConv ( static_cast < RTLIB :: Libcall > ( I ) , CallingConv :: Fast ) ;


setBooleanContents ( ZeroOrOneBooleanContent ) ;


setOperationAction(#,           #,   #);


setStackPointerRegisterToSaveRestore ( # ) ;


computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


setMinFunctionAlignment ( Align :: Constant < 2 > ( ) ) ;


setStackPointerRegisterToSaveRestore ( ABI . IsN64 ( ) ? zmtarzm :: SP_64 : zmtarzm :: SP ) ;

setStackPointerRegisterToSaveRestore(ABI.IsN64() ? zmtarzm::SP_64 : zmtarzm::SP);


zmtarzmTargetLowering :: zmtarzmTargetLowering ( const TargetMachine & TM , const zmtarzmSubtarget & STI ) : TargetLowering ( TM ) , Subtarget ( STI ) {


setStackPointerRegisterToSaveRestore ( zmtarzm :: X1 ) ;


for ( auto N : { ISD :: EXTLOAD , ISD :: SEXTLOAD , ISD :: ZEXTLOAD } ) {


addRegisterClass ( MVT :: i32 , & zmtarzm :: GPRRegClass ) ;


auto * RegInfo = Subtarget . getRegisterInfo ( ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setBooleanContents ( ZeroOrOneBooleanContent , ZeroOrNegativeOneBooleanContent ) ;


for ( auto VT : { MVT :: i1 , MVT :: i8 } ) {


setLoadExtAction ( # , # , MVT :: i1 , # ) ;


setLoadExtAction ( # , # , MVT :: f32 , # ) ;


setLoadExtAction ( # , # , MVT :: f16 , # ) ;


setLoadExtAction ( ISD :: SEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction ( ISD :: ZEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction ( # , # , F16 # , # ) ;


setBooleanContents ( ZeroOrOneBooleanContent ) ;


setMinimumJumpTableEntries ( INT_MAX ) ;


setCondCodeAction ( CC , VT , Expand ) ;


addRegisterClass ( GRLenVT , & zmtarzm :: GPRRegClass ) ;


computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


setBooleanContents ( UndefinedBooleanContent ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R14 ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R3 ) ;


setMinFunctionAlignment ( FunctionAlignment ) ;


setSchedulingPreference ( Sched :: Source ) ;


setLibcallCallingConv ( static_cast < RTLIB :: Libcall > ( I ) , CallingConv :: Fast ) ;


setStackPointerRegisterToSaveRestore ( # ) ;


setMinFunctionAlignment ( Align :: Constant < 2 > ( ) ) ;


setStackPointerRegisterToSaveRestore ( ABI . IsN64 ( ) ? zmtarzm :: SP_64 : zmtarzm :: SP ) ;


zmtarzmTargetLowering :: zmtarzmTargetLowering ( const TargetMachine & TM , const zmtarzmSubtarget & STI ) : TargetLowering ( TM ) , Subtarget ( STI ) {


setStackPointerRegisterToSaveRestore ( zmtarzm :: X1 ) ;


for ( auto N : { ISD :: EXTLOAD , ISD :: SEXTLOAD , ISD :: ZEXTLOAD } ) {


setBooleanContents ( ZeroOrOneBooleanContent ) ;


addRegisterClass ( MVT :: i32 , & zmtarzm :: GPRRegClass ) ;


auto * RegInfo = Subtarget . getRegisterInfo ( ) ;


setStackPointerRegisterToSaveRestore ( RegInfo -> getStackRegister ( ) ) ;


addRegisterClass ( MVT :: i8 , & zmtarzm :: DR8RegClass ) ;


addRegisterClass ( MVT :: i16 , & zmtarzm :: XR16RegClass ) ;


addRegisterClass ( MVT :: i32 , & zmtarzm :: XR32RegClass ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setBooleanContents ( ZeroOrOneBooleanContent , ZeroOrNegativeOneBooleanContent ) ;


for ( auto VT : { MVT :: i1 , MVT :: i8 } ) {


setLoadExtAction ( # , # , MVT :: i1 , # ) ;


setLoadExtAction ( # , # , MVT :: f32 , # ) ;


setLoadExtAction ( # , # , MVT :: f16 , # ) ;


setLoadExtAction ( ISD :: SEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction ( ISD :: ZEXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction ( ISD :: EXTLOAD , VT , MVT :: i1 , Promote ) ;


setLoadExtAction ( # , # , F16 # , # ) ;


setTruncStoreAction ( MVT :: i64 , MVT :: i32 , Expand ) ;

MVT::i64 zmsplit  MVT::i32 zmsplit  Expand


setTruncStoreAction ( MVT :: i64 , MVT :: i16 , Expand ) ;

MVT::i64 zmsplit  MVT::i16 zmsplit  Expand


setTruncStoreAction ( MVT :: i64 , MVT :: i8 , Expand ) ;

MVT::i64 zmsplit  MVT::i8 zmsplit  Expand


setTruncStoreAction ( MVT :: i32 , MVT :: i16 , Expand ) ;

MVT::i32 zmsplit  MVT::i16 zmsplit  Expand


setTruncStoreAction ( MVT :: i32 , MVT :: i8 , Expand ) ;

MVT::i32 zmsplit  MVT::i8 zmsplit  Expand


setTruncStoreAction ( MVT :: i16 , MVT :: i8 , Expand ) ;

MVT::i16 zmsplit  MVT::i8 zmsplit  Expand


setOperationAction ( ISD :: MUL , MVT :: i8 , Promote ) ;

ISD::MUL zmsplit MVT::i8 zmsplit Promote


setOperationAction ( ISD :: MUL , MVT :: i16 , Legal ) ;


setOperationAction ( ISD :: MUL , MVT :: i32 , Legal ) ;


if ( ! Subtarget . atLeastM68020 ( ) ) {


setOperationAction ( ISD :: MUL , MVT :: i32 , LibCall ) ;

ISD::MUL zmsplit MVT::i32 zmsplit LibCall


setOperationAction ( ISD :: MUL , MVT :: i64 , LibCall ) ;

ISD::MUL zmsplit MVT::i64 zmsplit LibCall


setOperationAction ( OP , MVT :: i8 , Promote ) ;


setOperationAction ( OP , MVT :: i16 , Legal ) ;


setOperationAction ( OP , MVT :: i32 , LibCall ) ;


setBooleanContents ( ZeroOrOneBooleanContent ) ;


setMinimumJumpTableEntries ( INT_MAX ) ;


setCondCodeAction ( CC , VT , Expand ) ;


computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


setBooleanContents ( UndefinedBooleanContent ) ;


setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R14 ) ;


setStackPointerRegisterToSaveRestore ( zmtarzm :: R3 ) ;


setMinFunctionAlignment ( FunctionAlignment ) ;


setSchedulingPreference ( Sched :: Source ) ;


setOperationAction ( OP , MVT :: i8 , Expand ) ;


setOperationAction ( OP , MVT :: i16 , Expand ) ;


setLibcallCallingConv ( static_cast < RTLIB :: Libcall > ( I ) , CallingConv :: Fast ) ;


setOperationAction ( OP , MVT :: i32 , Expand ) ;


setOperationAction ( ISD :: ADDC , VT , Custom ) ;


setOperationAction ( ISD :: ADDE , VT , Custom ) ;


setOperationAction ( ISD :: SUBC , VT , Custom ) ;


setOperationAction ( ISD :: SUBE , VT , Custom ) ;


setOperationAction ( ISD :: SADDO , VT , Custom ) ;


setOperationAction ( ISD :: UADDO , VT , Custom ) ;


setOperationAction ( ISD :: SSUBO , VT , Custom ) ;


setOperationAction ( ISD :: USUBO , VT , Custom ) ;


setOperationAction ( ISD :: BR_JT , MVT :: Other , Expand ) ;

ISD::BR_JT zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: BRCOND , MVT :: Other , Custom ) ;

ISD::BRCOND zmsplit MVT::Other zmsplit Custom


setOperationAction ( ISD :: BR_CC , VT , Expand ) ;


setOperationAction ( ISD :: SELECT , VT , Custom ) ;


setOperationAction ( ISD :: SELECT_CC , VT , Expand ) ;

ISD::SELECT_CC zmsplit VT zmsplit Expand


setOperationAction ( ISD :: SETCC , VT , Custom ) ;


setOperationAction ( ISD :: SETCCCARRY , VT , Custom ) ;

ISD::SETCCCARRY zmsplit VT zmsplit Custom


setOperationAction ( ISD :: BSWAP , VT , Expand ) ;


setOperationAction ( ISD :: CTTZ , VT , Expand ) ;


setOperationAction ( ISD :: CTLZ , VT , Expand ) ;


setOperationAction ( ISD :: CTPOP , VT , Expand ) ;


setOperationAction ( ISD :: ConstantPool , MVT :: i32 , Custom ) ;

ISD::ConstantPool zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: JumpTable , MVT :: i32 , Custom ) ;

ISD::JumpTable zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: GlobalAddress , MVT :: i32 , Custom ) ;

ISD::GlobalAddress zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: GlobalTLSAddress , MVT :: i32 , Custom ) ;

ISD::GlobalTLSAddress zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: ExternalSymbol , MVT :: i32 , Custom ) ;

ISD::ExternalSymbol zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: BlockAddress , MVT :: i32 , Custom ) ;

ISD::BlockAddress zmsplit MVT::i32 zmsplit Custom


setOperationAction ( ISD :: VASTART , MVT :: Other , Custom ) ;

ISD::VASTART zmsplit MVT::Other zmsplit Custom


setOperationAction ( ISD :: VAEND , MVT :: Other , Expand ) ;

ISD::VAEND zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: VAARG , MVT :: Other , Expand ) ;

ISD::VAARG zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: VACOPY , MVT :: Other , Expand ) ;

ISD::VACOPY zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: STACKSAVE , MVT :: Other , Expand ) ;

ISD::STACKSAVE zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: STACKRESTORE , MVT :: Other , Expand ) ;

ISD::STACKRESTORE zmsplit MVT::Other zmsplit Expand


setOperationAction ( ISD :: DYNAMIC_STACKALLOC , PtrVT , Custom ) ;

ISD::DYNAMIC_STACKALLOC zmsplit PtrVT zmsplit Custom


setStackPointerRegisterToSaveRestore ( # ) ;


computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


setMinFunctionAlignment ( Align :: Constant < 2 > ( ) ) ;


setStackPointerRegisterToSaveRestore ( ABI . IsN64 ( ) ? zmtarzm :: SP_64 : zmtarzm :: SP ) ;


bool zmtarzmTargetLowering::targetShrinkDemandedConstant(SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts, TargetLoweringOpt &TLO) const {

bool zmtarzmTargetLowering :: targetShrinkDemandedConstant ( SDValue Op , const APInt & DemandedBits , const APInt & DemandedElts , TargetLoweringOpt & TLO ) const {


if ( Op . getOpcode ( ) != ISD :: AND ) {


assert
(
VT
==
MVT
::
i32
&&
"Unexpected integer type"
)
;

assert(VT == MVT::i32 && "Unexpected integer type");


unsigned Size = VT . getSizeInBits ( ) ;


ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1));

ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op . getOperand ( 1 ) ) ;


const APInt & Mask = C -> getAPIntValue ( ) ;


APInt ShrunkMask = Mask & DemandedBits ;


APInt ExpandedMask = Mask | ~ Demanded ;


return TLO . CombineTo ( Op , Op . getOperand ( 0 ) ) ;


unsigned Width = ShrunkMask.getActiveBits();

unsigned Width = ShrunkMask . getActiveBits ( ) ;


Width = PowerOf2Ceil(std::max(Width, 8U));

Width = PowerOf2Ceil ( std :: max ( Width , 8U ) ) ;


APInt ZeroExtendMask = APInt::getLowBitsSet(Size, Width);

APInt ZeroExtendMask = APInt :: getLowBitsSet ( Size , Width ) ;


if (!ZeroExtendMask.isSubsetOf(Mask | ~Demanded)) {

if ( ! ZeroExtendMask . isSubsetOf ( Mask | ~ Demanded ) ) {


SDValue NewC = TLO.DAG.getConstant(NewMask, DL, VT);

SDValue NewC = TLO . DAG . getConstant ( NewMask , DL , VT ) ;


SDValue NewOp = TLO.DAG.getNode(ISD::AND, DL, VT, Op.getOperand(0), NewC);

SDValue NewOp = TLO . DAG . getNode ( ISD :: AND , DL , VT , Op . getOperand ( 0 ) , NewC ) ;


void zmtarzmTargetLowering::validateCCReservedRegs(const SmallVectorImpl<std::pair<llvm::Register, llvm::SDValue>> &Regs, MachineFunction &MF) const {

void zmtarzmTargetLowering :: validateCCReservedRegs ( const SmallVectorImpl < std :: pair < llvm :: Register , llvm :: SDValue >> & Regs , MachineFunction & MF ) const {


auto *CA = dyn_cast<ConstantSDNode>(Ptr);

auto * CA = dyn_cast < ConstantSDNode > ( Ptr ) ;


unsigned Addr = CA -> getZExtValue ( ) ;


Align HaveAlign = Addr != 0 ? Align(1ull << countTrailingZeros(Addr)) : NeedAlign;

Align HaveAlign = Addr != 0 ? Align ( 1ull << countTrailingZeros ( Addr ) ) : NeedAlign ;


static int DK_MisalignedTrap = llvm::getNextAvailablePluginDiagnosticKind();

static int DK_MisalignedTrap = llvm :: getNextAvailablePluginDiagnosticKind ( ) ;


OS << "Misaligned constant address: " << format_hex(Addr, 10) << " has alignment " << HaveAlign.value() << ", but the memory access requires " << NeedAlign.value();

OS
<<
"Misaligned constant address: "
<<
format_hex
(
Addr
,
10
)
<<
" has alignment "
<<
HaveAlign
.
value
(
)
<<
", but the memory access requires "
<<
NeedAlign
.
value
(
)
;


if ( DebugLoc DL = dl . getDebugLoc ( ) ) {


OS << ". The instruction has been replaced with a trap.";


DAG . getContext ( ) -> diagnose ( DiagnosticInfoMisalignedTrap ( O . str ( ) ) ) ;


zmtarzmLegalizerInfo::zmtarzmLegalizerInfo(const zmtarzmSubtarget &ST) {

zmtarzmLegalizerInfo :: zmtarzmLegalizerInfo ( const zmtarzmSubtarget & ST ) {


unsigned getLibCallStackSize ( ) const {


int getMoveF64FrameIndex(MachineFunction &MF) {

int getMoveF64FrameIndex ( MachineFunction & MF ) {


zmtarzmMachineFunctionInfo(const MachineFunction &MF) {

zmtarzmMachineFunctionInfo ( const MachineFunction & MF ) {


void setLibCallStackSize(unsigned Size) {

void setLibCallStackSize ( unsigned Size ) {


void setVarArgsFrameIndex ( int Index ) {


bool useSaveRestoreLibCalls(const MachineFunction &MF) const {

bool useSaveRestoreLibCalls ( const MachineFunction & MF ) const {


MatInt::InstSeq MatInt::generateInstSeq(int64_t Val) {

MatInt :: InstSeq MatInt :: generateInstSeq ( int64_t Val ) {


const int64_t Highest12 = Val >> 52 & 0xFFF;


const int64_t Higher20 = Val >> 32 & 0xFFFFF;


const int64_t Hi20 = Val >> 12 & 0xFFFFF;


if ( SignExtend64 < 52 > ( Val ) == 0 ) {


Insts . push_back ( Inst ( zmtarzm :: LU52I_D , SignExtend64 < 12 > ( Highest12 ) ) ) ;


Insts . push_back ( Inst ( zmtarzm :: ORI , Lo12 ) ) ;


Insts . push_back ( Inst ( zmtarzm :: ADDI_W , SignExtend64 < 12 > ( Lo12 ) ) ) ;


Insts . push_back ( Inst ( zmtarzm :: LU12I_W , SignExtend64 < 20 > ( Hi20 ) ) ) ;


if (SignExtend32<1>(Hi20 >> 19) != SignExtend32<20>(Higher20)) {

if ( SignExtend32 < 1 > ( Hi20 >> 19 ) != SignExtend32 < 20 > ( Higher20 ) ) {


Insts . push_back ( Inst ( zmtarzm :: LU32I_D , SignExtend64 < 20 > ( Higher20 ) ) ) ;


if (SignExtend32<1>(Higher20 >> 19) != SignExtend32<12>(Highest12)) {

if ( SignExtend32 < 1 > ( Higher20 >> 19 ) != SignExtend32 < 12 > ( Highest12 ) ) {


int getIntMatCost(const APInt &Val, unsigned Size, bool IsRV64) {

int getIntMatCost ( const APInt & Val , unsigned Size , bool IsRV64 ) {


if (zmtarzm_AM::isLogicalImmediate(Val, 64)) {

if ( zmtarzm_AM :: isLogicalImmediate ( Val , 64 ) ) {


SmallVector < zmtarzm_IMM :: ImmInsnModel , 4 > Insn ;


zmtarzm_IMM :: expandMOVImm ( Val , 64 , Insn ) ;


return BaseT :: getIntImmCost ( Imm , Ty ) ;


unsigned BitSize = Ty->getPrimitiveSizeInBits();

unsigned BitSize = Ty -> getPrimitiveSizeInBits ( ) ;


int64_t SImmVal = Imm . getSExtValue ( ) ;


uint64_t ZImmVal = Imm . getZExtValue ( ) ;


if (zmtarzm_AM::getSOImmVal(ZImmVal) != -1) {

if ( zmtarzm_AM :: getSOImmVal ( ZImmVal ) != - 1 ) {


if (zmtarzm_AM::getSOImmVal(~ZImmVal) != -1) {

if ( zmtarzm_AM :: getSOImmVal ( ~ ZImmVal ) != - 1 ) {


if ( zmtarzm_AM :: isThumbImmShiftedVal ( ZImmVal ) ) {


if ( isInt < # > ( Imm . getSExtValue ( ) ) ) {


if ( isInt < 32 > ( Imm . getSExtValue ( ) ) ) {


if ((Imm.getZExtValue() & 0xFFFF) == 0) {

if ( ( Imm . getZExtValue ( ) & 0xFFFF ) == 0 ) {


if ( isUInt < # > ( Imm . getZExtValue ( ) ) ) {


if ((Imm.getZExtValue() & 0xffffffff) == 0) {

if ( ( Imm . getZExtValue ( ) & 0xffffffff ) == 0 ) {


if ( isInt < 16 > ( Imm . getSExtValue ( ) ) ) {


int getIntMatCost ( const APInt & Val , unsigned Size , bool IsRV64 ) {


if ( zmtarzm_AM :: isLogicalImmediate ( Val , 64 ) ) {


SmallVector < zmtarzm_IMM :: ImmInsnModel , 4 > Insn ;


zmtarzm_IMM :: expandMOVImm ( Val , 64 , Insn ) ;


return BaseT :: getIntImmCost ( Imm , Ty ) ;


unsigned BitSize = Ty -> getPrimitiveSizeInBits ( ) ;


int64_t SImmVal = Imm . getSExtValue ( ) ;


uint64_t ZImmVal = Imm . getZExtValue ( ) ;


if ( zmtarzm_AM :: getSOImmVal ( ZImmVal ) != - 1 ) {


if ( zmtarzm_AM :: getSOImmVal ( ~ ZImmVal ) != - 1 ) {


if ( zmtarzm_AM :: isThumbImmShiftedVal ( ZImmVal ) ) {


if ( isInt < # > ( Imm . getSExtValue ( ) ) ) {


if ( isInt < 32 > ( Imm . getSExtValue ( ) ) ) {


if ( ( Imm . getZExtValue ( ) & 0xFFFF ) == 0 ) {


if ( isUInt < 32 > ( Imm . getZExtValue ( ) ) ) {


if ( ( Imm . getZExtValue ( ) & 0xffffffff ) == 0 ) {


Inst(unsigned Opc, int64_t Imm) : Opc(Opc), Imm(Imm) {

Inst ( unsigned Opc , int64_t Imm ) : Opc ( Opc ) , Imm ( Imm ) {


MCCodeEmitter *llvm::createzmtarzmMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx) {

MCCodeEmitter * llvm :: createzmtarzmMCCodeEmitter ( const MCInstrInfo & MCII , const MCRegisterInfo & MRI , MCContext & Ctx ) {


return new zmtarzmMCCodeEmitter(Ctx, MCII);

return new zmtarzmMCCodeEmitter ( Ctx , MCII ) ;


void zmtarzmMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {

void zmtarzmMCCodeEmitter :: encodeInstruction ( const MCInst & MI , raw_ostream & OS , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


verifyInstructionPredicates ( MI , computeAvailableFeatures ( STI . getFeatureBits ( ) ) ) ;


Desc = MCII . get ( MI . getOpcode ( ) ) ;


if ( MI . getOpcode ( ) == zmtarzm :: TLSDESCCALL ) {

if (MI.getOpcode() == zmtarzm::TLSDESCCALL) {


expand_TLSDESCCALL(MI, OS, Fixups, STI);

expand_TLSDESCCALL ( MI , OS , Fixups , STI ) ;


if ( MI . getOpcode ( ) == zmtarzm :: CompilerBarrier ) {

if(MI.getOpcode() == zmtarzm::CompilerBarrier) {


expand_CompilerBarrier(MI, OS, Fixups, STI);

expand_CompilerBarrier ( MI , OS , Fixups , STI ) ;


if ( MI . getOpcode ( ) == zmtarzm :: SPACE ) {


expand_SPACE ( MI , OS , Fixups , STI ) ;


if ( MI . getOpcode ( ) == zmtarzm :: EH_SjLj_Setup ) {

if(MI.getOpcode() == zmtarzm::EH_SjLj_Setup) {


expand_EH_SjLj_Setup(MI, OS, Fixups, STI);

expand_EH_SjLj_Setup ( MI , OS , Fixups , STI ) ;


CallExpr = MI . getOperand ( 0 ) . getExpr ( ) ;


TmpInst = MCInstBuilder ( zmtarzm :: JS ) . addImm ( 0 ) ;


TmpInst = MCInstBuilder ( zmtarzm :: J ) . addImm ( - 2 ) ;


Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI);

Binary = getBinaryCodeForInstr ( TmpInst , Fixups , STI ) ;


support :: endian :: write < # > ( OS , Bits , # ) ;

support :: endian :: write < # > ( OS , # , # ) ;


expand_COPY_TO_REGCLASS(MI, OS, Fixups, STI);

expand_COPY_TO_REGCLASS ( MI , OS , Fixups , STI ) ;


Bits = getBinaryCodeForInstr(MI, Fixups, STI);

Bits = getBinaryCodeForInstr ( MI , Fixups , STI ) ;


support :: endian :: write < # > ( OS , Bits , # ) ;


support :: endian :: write < # > ( OS , # , # ) ;


support :: endian :: write < uint32_t > ( OS , Bits , support :: little ) ;

uint32_t zmsplit Bits zmsplit  support::little


llvm_unreachable
(
"Unhandled encodeInstruction length!"
)
;


void zmtarzmMCCodeEmitter :: encodeInstruction ( const MCInst & MI , raw_ostream & OS , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


verifyInstructionPredicates ( MI , computeAvailableFeatures ( STI . getFeatureBits ( ) ) ) ;


Desc = MCII . get ( MI . getOpcode ( ) ) ;


expand_TLSDESCCALL ( MI , OS , Fixups , STI ) ;


expand_CompilerBarrier ( MI , OS , Fixups , STI ) ;


expand_SPACE ( MI , OS , Fixups , STI ) ;


expand_EH_SjLj_Setup ( MI , OS , Fixups , STI ) ;


CallExpr = MI . getOperand ( 0 ) . getExpr ( ) ;


TmpInst = MCInstBuilder ( zmtarzm :: JS ) . addImm ( 0 ) ;


TmpInst = MCInstBuilder ( zmtarzm :: J ) . addImm ( - 2 ) ;


Binary = getBinaryCodeForInstr ( TmpInst , Fixups , STI ) ;


expand_COPY_TO_REGCLASS ( MI , OS , Fixups , STI ) ;


Bits = getBinaryCodeForInstr ( MI , Fixups , STI ) ;


support :: endian :: write < # > ( OS , Bits , # ) ;


support :: endian :: write < uint32_t > ( OS , Bits , support :: little ) ;


if ( MI . getOpcode ( ) == zmtarzm :: PseudoHLT ) {

if (MI.getOpcode() == zmtarzm::PseudoHLT) {


support :: endian :: write < uint16_t > ( OS , Binary , support :: little ) ;

uint16_t zmsplit Binary zmsplit support::little


support :: endian :: write < uint16_t > ( OS , Bits , support :: little ) ;

uint16_t zmsplit Bits zmsplit  support::little


support :: endian :: write < uint8_t > ( OS , ( Bits >> 16 ) & 0xff , support :: little ) ;

uint8_t zmsplit (Bits >> 16) & 0xff zmsplit  support::little

support::endian::write<uint8_t>(OS, (Bits >> 16) & 0xff, support::little);

uint8_t ( Bits >> 16 ) & 0xff support :: little


support :: endian :: write < # > ( OS , # , # ) ;


llvm_unreachable
(
"Unhandled encodeInstruction length!"
)
;


void zmtarzmMCCodeEmitter :: encodeInstruction ( const MCInst & MI , raw_ostream & OS , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


verifyInstructionPredicates ( MI , computeAvailableFeatures ( STI . getFeatureBits ( ) ) ) ;


Desc = MCII . get ( MI . getOpcode ( ) ) ;


expand_TLSDESCCALL ( MI , OS , Fixups , STI ) ;


expand_CompilerBarrier ( MI , OS , Fixups , STI ) ;


expand_SPACE ( MI , OS , Fixups , STI ) ;


expand_EH_SjLj_Setup ( MI , OS , Fixups , STI ) ;


CallExpr = MI . getOperand ( 0 ) . getExpr ( ) ;


TmpInst = MCInstBuilder ( zmtarzm :: JS ) . addImm ( 0 ) ;


TmpInst = MCInstBuilder ( zmtarzm :: J ) . addImm ( - 2 ) ;


Binary = getBinaryCodeForInstr ( TmpInst , Fixups , STI ) ;


expand_COPY_TO_REGCLASS ( MI , OS , Fixups , STI ) ;


Bits = getBinaryCodeForInstr ( MI , Fixups , STI ) ;


support :: endian :: write < uint32_t > ( OS , Bits , support :: little ) ;


support :: endian :: write < # > ( OS , Bits , # ) ;


support :: endian :: write < # > ( OS , # , # ) ;


support :: endian :: write < uint32_t > ( OS , Bits , support :: big ) ;

uint32_t zmsplit Bits zmsplit support::big


llvm_unreachable
(
"Unhandled encodeInstruction length!"
)
;


void zmtarzmMCCodeEmitter :: encodeInstruction ( const MCInst & MI , raw_ostream & OS , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


verifyInstructionPredicates ( MI , computeAvailableFeatures ( STI . getFeatureBits ( ) ) ) ;


Desc = MCII . get ( MI . getOpcode ( ) ) ;


expand_TLSDESCCALL ( MI , OS , Fixups , STI ) ;


expand_CompilerBarrier ( MI , OS , Fixups , STI ) ;


expand_SPACE ( MI , OS , Fixups , STI ) ;


if ( MI . getOpcode ( ) == zmtarzm :: COPY_TO_REGCLASS ) {

if (MI.getOpcode() == zmtarzm::COPY_TO_REGCLASS) {


expand_EH_SjLj_Setup ( MI , OS , Fixups , STI ) ;


CallExpr = MI . getOperand ( 0 ) . getExpr ( ) ;


TmpInst = MCInstBuilder ( zmtarzm :: JS ) . addImm ( 0 ) ;


TmpInst = MCInstBuilder ( zmtarzm :: J ) . addImm ( - 2 ) ;


Binary = getBinaryCodeForInstr ( TmpInst , Fixups , STI ) ;


expand_COPY_TO_REGCLASS ( MI , OS , Fixups , STI ) ;


Bits = getBinaryCodeForInstr ( MI , Fixups , STI ) ;


support :: endian :: write < # > ( OS , Bits , # ) ;


support :: endian :: write < uint32_t > ( OS , Bits , support :: little ) ;


support :: endian :: write < # > ( OS , # , # ) ;


support :: endian :: write < uint64_t > ( OS , Bits , support :: little ) ;

uint64_t zmsplit Bits zmsplit support::little


llvm_unreachable
(
"Unhandled encodeInstruction length!"
)
;


void zmtarzmMCCodeEmitter :: encodeInstruction ( const MCInst & MI , raw_ostream & OS , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


verifyInstructionPredicates ( MI , computeAvailableFeatures ( STI . getFeatureBits ( ) ) ) ;


Desc = MCII . get ( MI . getOpcode ( ) ) ;


expand_TLSDESCCALL ( MI , OS , Fixups , STI ) ;


expand_CompilerBarrier ( MI , OS , Fixups , STI ) ;


expand_SPACE ( MI , OS , Fixups , STI ) ;


if ( MI . getOpcode ( ) == zmtarzm :: PseudoHLT ) {


expand_EH_SjLj_Setup ( MI , OS , Fixups , STI ) ;


CallExpr = MI . getOperand ( 0 ) . getExpr ( ) ;


TmpInst = MCInstBuilder ( zmtarzm :: JS ) . addImm ( 0 ) ;


TmpInst = MCInstBuilder ( zmtarzm :: J ) . addImm ( - 2 ) ;


Binary = getBinaryCodeForInstr ( TmpInst , Fixups , STI ) ;


support :: endian :: write < uint32_t > ( OS , Binary , support :: little ) ;

uint32_t zmsplit Binary zmsplit support::little


expand_COPY_TO_REGCLASS ( MI , OS , Fixups , STI ) ;


Bits = getBinaryCodeForInstr ( MI , Fixups , STI ) ;


support :: endian :: write < # > ( OS , Bits , # ) ;


support :: endian :: write < uint16_t > ( OS , Bits , support :: little ) ;


support :: endian :: write < # > ( OS , # , # ) ;


support :: endian :: write < uint32_t > ( OS , Bits , support :: little ) ;


llvm_unreachable
(
"Unhandled encodeInstruction length!"
)
;


unsigned zmtarzmMCCodeEmitter::getImmOpValueAsr1(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {

unsigned zmtarzmMCCodeEmitter :: getImmOpValueAsr1 ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


return Ctx . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;


return static_cast < unsigned > ( MO . getImm ( ) ) ;


return cast < MCConstantExpr > ( Expr ) -> getValue ( ) ;


Expr = static_cast<const MCBinaryExpr*>(Expr)->getLHS();

Expr = static_cast < const MCBinaryExpr * > ( Expr ) -> getLHS ( ) ;


assert (Kind == MCExpr::SymbolRef && "unknown MCExpr kind");

assert
(
Kind
==
MCExpr
::
SymbolRef
&&
"unknown MCExpr kind"
)
;


if (cast<MCSymbolRefExpr>(Expr)->getKind() == #) {

if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == # ) {


Fixups.push_back(MCFixup::create(0, MO.getExpr(), MCFixupKind(FixupKind), MI.getLoc()));

Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( FixupKind ) , MI . getLoc ( ) ) ) ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_None ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_None) {


FixupKind = zmtarzm :: fixup_zmtarzm_32 ;


llvm_unreachable
(
"Unknown fixup kind!"
)
;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_Q1 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_Q1) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_q1_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_Q2 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_Q2) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_q2_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_Q3 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_Q3) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_q3_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_Q4 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_Q4) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_q4_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_CALL26 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_CALL26) {


FixupKind = zmtarzm :: fixup_zmtarzm_call26_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_CALL19 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_CALL19) {


FixupKind = zmtarzm :: fixup_zmtarzm_call19_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_9BIT ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_9BIT) {


FixupKind = zmtarzm :: fixup_zmtarzm_9bit_address ;


Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( FixupKind ) , MI . getLoc ( ) ) ) ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_6BIT ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_6BIT) {


FixupKind = zmtarzm :: fixup_zmtarzm_6bit_shamt ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_12BIT ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_12BIT) {


FixupKind = zmtarzm :: fixup_zmtarzm_12bit_imm ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_MOVRZ ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_MOVRZ) {


FixupKind = zmtarzm :: fixup_zmtarzm_movrz_pcrel ;


llvm_unreachable
(
"Unknown fixup kind!"
)
;


unsigned zmtarzmMCCodeEmitter :: getImmOpValueAsr1 ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


return Ctx . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;


return static_cast < unsigned > ( MO . getImm ( ) ) ;


return cast < MCConstantExpr > ( Expr ) -> getValue ( ) ;


Expr = static_cast < const MCBinaryExpr * > ( Expr ) -> getLHS ( ) ;


assert
(
Kind
==
MCExpr
::
SymbolRef
&&
"unknown MCExpr kind"
)
;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == # ) {


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_LO ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_LO) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_lo16_pcrel ;


Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( FixupKind ) , MI . getLoc ( ) ) ) ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_HI ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_HI) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_hi16_pcrel ;


unsigned zmtarzmMCCodeEmitter::getImmOpValueAsr1(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {


Expr = static_cast<const MCBinaryExpr*>(Expr)->getLHS();


assert (Kind == MCExpr::SymbolRef && "unknown MCExpr kind");


if (cast<MCSymbolRefExpr>(Expr)->getKind() == #) {


Fixups.push_back(MCFixup::create(0, MO.getExpr(), MCFixupKind(FixupKind), MI.getLoc()));


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_None ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_None) {


FixupKind = zmtarzm :: fixup_zmtarzm_REL26 ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_ABS_HI ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_ABS_HI) {


FixupKind = zmtarzm :: fixup_zmtarzm_HI16_INSN ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_ABS_LO ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_ABS_LO) {


FixupKind = zmtarzm :: fixup_zmtarzm_LO16_INSN ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_PLT ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_PLT) {


FixupKind = zmtarzm :: fixup_zmtarzm_PLT26 ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_GOTPCHI ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_GOTPCHI) {


FixupKind = zmtarzm :: fixup_zmtarzm_GOTPC_HI16 ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_GOTPCLO ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_GOTPCLO) {


FixupKind = zmtarzm :: fixup_zmtarzm_GOTPC_LO16 ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_GOTOFFHI ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_GOTOFFHI) {


FixupKind = zmtarzm :: fixup_zmtarzm_GOTOFF_HI16 ;


Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( FixupKind ) , MI . getLoc ( ) ) ) ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_GOTOFFLO ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_GOTOFFLO) {


FixupKind = zmtarzm :: fixup_zmtarzm_GOTOFF_LO16 ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_GOT ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_GOT) {


FixupKind = zmtarzm :: fixup_zmtarzm_GOT16 ;


llvm_unreachable
(
"Unknown fixup kind!"
)
;


unsigned zmtarzmMCCodeEmitter :: getImmOpValueAsr1 ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


return Ctx . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;


return static_cast < unsigned > ( MO . getImm ( ) ) ;


return cast < MCConstantExpr > ( Expr ) -> getValue ( ) ;


Expr = static_cast < const MCBinaryExpr * > ( Expr ) -> getLHS ( ) ;


assert
(
Kind
==
MCExpr
::
SymbolRef
&&
"unknown MCExpr kind"
)
;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == # ) {


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_LO ) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_lo16_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_HI ) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_hi16_pcrel ;


Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( FixupKind ) , MI . getLoc ( ) ) ) ;


unsigned zmtarzmMCCodeEmitter::getImmOpValueMinus1(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {

unsigned zmtarzmMCCodeEmitter :: getImmOpValueMinus1 ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_None ) {


FixupKind = zmtarzm :: fixup_zmtarzm_32 ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_Q1 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_Q1) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_q1_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_Q2 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_Q2) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_q2_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_Q3 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_Q3) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_q3_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_Q4 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_Q4) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_q4_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_CALL26 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_CALL26) {


FixupKind = zmtarzm :: fixup_zmtarzm_call26_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_CALL19 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_CALL19) {


FixupKind = zmtarzm :: fixup_zmtarzm_call19_pcrel ;


Fixups.push_back(MCFixup::create(0, MO.getExpr(), MCFixupKind(FixupKind), MI.getLoc()));


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_9BIT ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_9BIT) {


FixupKind = zmtarzm :: fixup_zmtarzm_9bit_address ;


Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( FixupKind ) , MI . getLoc ( ) ) ) ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_6BIT ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_6BIT) {


FixupKind = zmtarzm :: fixup_zmtarzm_6bit_shamt ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_12BIT ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_12BIT) {


FixupKind = zmtarzm :: fixup_zmtarzm_12bit_imm ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_MOVRZ ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_MOVRZ) {


FixupKind = zmtarzm :: fixup_zmtarzm_movrz_pcrel ;


llvm_unreachable
(
"Unknown fixup kind!"
)
;


unsigned zmtarzmMCCodeEmitter :: getImmOpValueMinus1 ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


return Ctx . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;


return static_cast < unsigned > ( MO . getImm ( ) ) ;


return cast < MCConstantExpr > ( Expr ) -> getValue ( ) ;


Expr = static_cast < const MCBinaryExpr * > ( Expr ) -> getLHS ( ) ;

Expr = static_cast<const MCBinaryExpr*>(Expr)->getLHS();


assert
(
Kind
==
MCExpr
::
SymbolRef
&&
"unknown MCExpr kind"
)
;

assert (Kind == MCExpr::SymbolRef && "unknown MCExpr kind");


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == # ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == #) {


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_LO ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_LO) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_lo16_pcrel ;


Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( FixupKind ) , MI . getLoc ( ) ) ) ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_HI ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_HI) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_hi16_pcrel ;


unsigned zmtarzmMCCodeEmitter::getImmOpValueMinus1(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_None ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_None) {


FixupKind = zmtarzm :: fixup_zmtarzm_REL26 ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_ABS_HI ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_ABS_HI) {


FixupKind = zmtarzm :: fixup_zmtarzm_HI16_INSN ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_ABS_LO ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_ABS_LO) {


FixupKind = zmtarzm :: fixup_zmtarzm_LO16_INSN ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_PLT ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_PLT) {


FixupKind = zmtarzm :: fixup_zmtarzm_PLT26 ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_GOTPCHI ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_GOTPCHI) {


FixupKind = zmtarzm :: fixup_zmtarzm_GOTPC_HI16 ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_GOTPCLO ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_GOTPCLO) {


FixupKind = zmtarzm :: fixup_zmtarzm_GOTPC_LO16 ;


Fixups.push_back(MCFixup::create(0, MO.getExpr(), MCFixupKind(FixupKind), MI.getLoc()));


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_GOTOFFHI ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_GOTOFFHI) {


FixupKind = zmtarzm :: fixup_zmtarzm_GOTOFF_HI16 ;


Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( FixupKind ) , MI . getLoc ( ) ) ) ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_GOTOFFLO ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_GOTOFFLO) {


FixupKind = zmtarzm :: fixup_zmtarzm_GOTOFF_LO16 ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_GOT ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_GOT) {


FixupKind = zmtarzm :: fixup_zmtarzm_GOT16 ;


llvm_unreachable
(
"Unknown fixup kind!"
)
;


unsigned zmtarzmMCCodeEmitter :: getImmOpValueMinus1 ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


return Ctx . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;


return static_cast < unsigned > ( MO . getImm ( ) ) ;


return cast < MCConstantExpr > ( Expr ) -> getValue ( ) ;


Expr = static_cast < const MCBinaryExpr * > ( Expr ) -> getLHS ( ) ;


assert
(
Kind
==
MCExpr
::
SymbolRef
&&
"unknown MCExpr kind"
)
;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == # ) {


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_LO ) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_lo16_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_HI ) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_hi16_pcrel ;


Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( FixupKind ) , MI . getLoc ( ) ) ) ;


unsigned zmtarzmMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {

unsigned zmtarzmMCCodeEmitter :: getImmOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


Expr = static_cast<const MCBinaryExpr*>(Expr)->getLHS();


assert (Kind == MCExpr::SymbolRef && "unknown MCExpr kind");


if (cast<MCSymbolRefExpr>(Expr)->getKind() == #) {


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_None ) {


FixupKind = zmtarzm :: fixup_zmtarzm_32 ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_Q1 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_Q1) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_q1_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_Q2 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_Q2) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_q2_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_Q3 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_Q3) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_q3_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_Q4 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_Q4) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_q4_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_CALL26 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_CALL26) {


FixupKind = zmtarzm :: fixup_zmtarzm_call26_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_CALL19 ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_CALL19) {


FixupKind = zmtarzm :: fixup_zmtarzm_call19_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_9BIT ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_9BIT) {


FixupKind = zmtarzm :: fixup_zmtarzm_9bit_address ;


Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( FixupKind ) , MI . getLoc ( ) ) ) ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_6BIT ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_6BIT) {


FixupKind = zmtarzm :: fixup_zmtarzm_6bit_shamt ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_12BIT ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_12BIT) {


FixupKind = zmtarzm :: fixup_zmtarzm_12bit_imm ;


Fixups.push_back(MCFixup::create(0, MO.getExpr(), MCFixupKind(FixupKind), MI.getLoc()));


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_MOVRZ ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_MOVRZ) {


FixupKind = zmtarzm :: fixup_zmtarzm_movrz_pcrel ;


llvm_unreachable
(
"Unknown fixup kind!"
)
;


unsigned zmtarzmMCCodeEmitter :: getImmOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


return Ctx . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;


return static_cast < unsigned > ( MO . getImm ( ) ) ;


return cast < MCConstantExpr > ( Expr ) -> getValue ( ) ;


Expr = static_cast < const MCBinaryExpr * > ( Expr ) -> getLHS ( ) ;


assert
(
Kind
==
MCExpr
::
SymbolRef
&&
"unknown MCExpr kind"
)
;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == # ) {


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_LO ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_LO) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_lo16_pcrel ;


Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( FixupKind ) , MI . getLoc ( ) ) ) ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_HI ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_HI) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_hi16_pcrel ;


unsigned zmtarzmMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {


Expr = static_cast<const MCBinaryExpr*>(Expr)->getLHS();


assert (Kind == MCExpr::SymbolRef && "unknown MCExpr kind");


if (cast<MCSymbolRefExpr>(Expr)->getKind() == #) {


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_None ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_None) {


FixupKind = zmtarzm :: fixup_zmtarzm_REL26 ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_ABS_HI ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_ABS_HI) {


FixupKind = zmtarzm :: fixup_zmtarzm_HI16_INSN ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_ABS_LO ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_ABS_LO) {


FixupKind = zmtarzm :: fixup_zmtarzm_LO16_INSN ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_PLT ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_PLT) {


FixupKind = zmtarzm :: fixup_zmtarzm_PLT26 ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_GOTPCHI ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_GOTPCHI) {


FixupKind = zmtarzm :: fixup_zmtarzm_GOTPC_HI16 ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_GOTPCLO ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_GOTPCLO) {


FixupKind = zmtarzm :: fixup_zmtarzm_GOTPC_LO16 ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_GOTOFFHI ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_GOTOFFHI) {


FixupKind = zmtarzm :: fixup_zmtarzm_GOTOFF_HI16 ;


Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( FixupKind ) , MI . getLoc ( ) ) ) ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_GOTOFFLO ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_GOTOFFLO) {


FixupKind = zmtarzm :: fixup_zmtarzm_GOTOFF_LO16 ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_GOT ) {

if (cast<MCSymbolRefExpr>(Expr)->getKind() == zmtarzmMCExpr::VK_zmtarzm_GOT) {


FixupKind = zmtarzm :: fixup_zmtarzm_GOT16 ;


Fixups.push_back(MCFixup::create(0, MO.getExpr(), MCFixupKind(FixupKind), MI.getLoc()));


llvm_unreachable
(
"Unknown fixup kind!"
)
;


unsigned zmtarzmMCCodeEmitter :: getImmOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


return Ctx . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;


return static_cast < unsigned > ( MO . getImm ( ) ) ;


return cast < MCConstantExpr > ( Expr ) -> getValue ( ) ;


Expr = static_cast < const MCBinaryExpr * > ( Expr ) -> getLHS ( ) ;


assert
(
Kind
==
MCExpr
::
SymbolRef
&&
"unknown MCExpr kind"
)
;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == # ) {


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_LO ) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_lo16_pcrel ;


if ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) == zmtarzmMCExpr :: VK_zmtarzm_HI ) {


FixupKind = zmtarzm :: fixup_zmtarzm_mov_hi16_pcrel ;


Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( FixupKind ) , MI . getLoc ( ) ) ) ;


unsigned zmtarzmMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {

unsigned zmtarzmMCCodeEmitter :: getMachineOpValue ( const MCInst & MI , const MCOperand & MO , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


if ( MI . getOpcode ( ) == zmtarzm :: BAL ) {


Fixups.push_back(MCFixup::create(0, MO.getExpr(), MCFixupKind(#), MI.getLoc()));

Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( # ) , MI . getLoc ( ) ) ) ;

Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( zmtarzm :: fixup_zmtarzm_BAL32 ) , MI . getLoc ( ) ) ) ;

Fixups.push_back(MCFixup::create(0, MO.getExpr(), MCFixupKind(zmtarzm::fixup_zmtarzm_BAL32), MI.getLoc()));


if ( MI . getOpcode ( ) == zmtarzm :: BAL_short ) {

if (MI.getOpcode() == zmtarzm::BAL_short) {


Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( zmtarzm :: fixup_zmtarzm_BAL16 ) , MI . getLoc ( ) ) ) ;

Fixups.push_back(MCFixup::create(0, MO.getExpr(), MCFixupKind(zmtarzm::fixup_zmtarzm_BAL16), MI.getLoc()));


llvm_unreachable
(
"Unhandled expression!"
)
;


return Ctx . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;


return static_cast < unsigned > ( MO . getImm ( ) ) ;


if ( MI . getOpcode ( ) == zmtarzm :: JAL ) {


Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( zmtarzm :: fixup_zmtarzm_PCRel_4 ) , MI . getLoc ( ) ) ) ;

Fixups.push_back(MCFixup::create(0, MO.getExpr(), MCFixupKind(zmtarzm::fixup_zmtarzm_PCRel_4), MI.getLoc()));


if ( MI . getOpcode ( ) == zmtarzm :: LD_imm64 ) {

if (MI.getOpcode() == zmtarzm::LD_imm64) {


Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( zmtarzm :: fixup_zmtarzm_SecRel_8 ) , MI . getLoc ( ) ) ) ;

Fixups.push_back(MCFixup::create(0, MO.getExpr(), MCFixupKind(zmtarzm::fixup_zmtarzm_SecRel_8), MI.getLoc()));


Fixups . push_back ( MCFixup :: create ( 0 , MO . getExpr ( ) , MCFixupKind ( # ) , MI . getLoc ( ) ) ) ;

Fixups.push_back(MCFixup::create(0, MO.getExpr(), MCFixupKind(#), MI.getLoc()));


unsigned zmtarzmMCCodeEmitter::getVMaskReg(const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {

unsigned zmtarzmMCCodeEmitter :: getVMaskReg ( const MCInst & MI , unsigned OpNo , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


assert(MO.isReg() && "Expected a register.");

assert
(
MO
.
isReg
(
)
&&
"Expected a register."
)
;


if ( MO . getReg ( ) == zmtarzm :: R27R26 ) {


if ( MO . getReg ( ) == zmtarzm :: R29R28 ) {


if ( MO . getReg ( ) == zmtarzm :: R31R30 ) {


llvm_unreachable
(
"Invalid mask register."
)
;


if ( MO . getReg ( ) == zmtarzm :: R0 ) {


if ( MO . getReg ( ) == zmtarzm :: R1 ) {


if ( MO . getReg ( ) == zmtarzm :: LR ) {


if ( MO . getReg ( ) == zmtarzm :: R27 ) {


if ( MO . getReg ( ) == zmtarzm :: R28 ) {


if ( MO . getReg ( ) == zmtarzm :: r7 ) {


if ( MO . getReg ( ) == zmtarzm :: r8 ) {


if ( MO . getReg ( ) == zmtarzm :: r9 ) {


if ( MO . getReg ( ) == zmtarzm :: r10 ) {


if ( MO . getReg ( ) == zmtarzm :: r11 ) {


if ( MO . getReg ( ) == zmtarzm :: ZERO ) {


if ( MO . getReg ( ) == zmtarzm :: R2 ) {


if ( MO . getReg ( ) == zmtarzm :: R29 ) {


if ( MO . getReg ( ) == zmtarzm :: R30 ) {


if ( MO . getReg ( ) == zmtarzm :: R31 ) {


unsigned zmtarzmMCCodeEmitter :: getVMaskReg ( const MCInst & MI , unsigned OpNo , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


assert
(
MO
.
isReg
(
)
&&
"Expected a register."
)
;


if ( MO . getReg ( ) == zmtarzm :: R3 ) {


if ( MO . getReg ( ) == zmtarzm :: R7 ) {


if ( MO . getReg ( ) == zmtarzm :: R8 ) {


if ( MO . getReg ( ) == zmtarzm :: R27 ) {


llvm_unreachable
(
"Invalid mask register."
)
;


if ( MO . getReg ( ) == zmtarzm :: R0 ) {


if ( MO . getReg ( ) == zmtarzm :: R1 ) {


if ( MO . getReg ( ) == zmtarzm :: R4 ) {


if ( MO . getReg ( ) == zmtarzm :: R6 ) {


if ( MO . getReg ( ) == zmtarzm :: RPVR9 ) {


if ( MO . getReg ( ) == zmtarzm :: RPVR10 ) {


if ( MO . getReg ( ) == zmtarzm :: RPVR11 ) {


if ( MO . getReg ( ) == zmtarzm :: R2 ) {


if ( MO . getReg ( ) == zmtarzm :: R24 ) {


if ( MO . getReg ( ) == zmtarzm :: R31 ) {


unsigned zmtarzmMCCodeEmitter :: getVMaskReg ( const MCInst & MI , unsigned OpNo , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


assert
(
MO
.
isReg
(
)
&&
"Expected a register."
)
;


if ( MO . getReg ( ) == zmtarzm :: R31R30 ) {


if ( MO . getReg ( ) == zmtarzm :: R29R28 ) {


if ( MO . getReg ( ) == zmtarzm :: R27R26 ) {


zmtarzmMCCodeEmitter(MCContext &ctx, MCInstrInfo const &MCII) : Ctx(ctx), MCII(MCII) {

zmtarzmMCCodeEmitter ( MCContext & ctx , MCInstrInfo const & MCII ) : Ctx ( ctx ) , MCII ( MCII ) {


static bool classof ( const MCExpr * E ) {


return E -> getKind ( ) == MCExpr :: Target ;


static bool classof(const zmtarzmMCExpr *) {

static bool classof ( const zmtarzmMCExpr * ) {


const zmtarzmMCExpr *zmtarzmMCExpr::create(const MCExpr *Expr, VariantKind Kind, MCContext &Ctx) {

const zmtarzmMCExpr * zmtarzmMCExpr :: create ( const MCExpr * Expr , VariantKind Kind , MCContext & Ctx ) {


return new (Ctx) zmtarzmMCExpr(Expr, Kind);

return new ( Ctx ) zmtarzmMCExpr ( Expr , Kind ) ;


bool zmtarzmMCExpr::evaluateAsConstant(int64_t &Res) const {

bool zmtarzmMCExpr :: evaluateAsConstant ( int64_t & Res ) const {


if (!getSubExpr()->evaluateAsRelocatable(Value, nullptr, nullptr)) {

if ( ! getSubExpr ( ) -> evaluateAsRelocatable ( Value , nullptr , nullptr ) ) {


Res = evaluateAsInt64 ( Value . getConstant ( ) ) ;


int64_t zmtarzmMCExpr::evaluateAsInt64(int64_t Value) const {

int64_t zmtarzmMCExpr :: evaluateAsInt64 ( int64_t Value ) const {


if ( Kind == zmtarzmMCExpr :: VK_zmtarzm_LO8 ) {

if(Kind == zmtarzmMCExpr::VK_zmtarzm_LO8) {


if ( Kind == zmtarzmMCExpr :: VK_zmtarzm_HI8 ) {

if(Kind == zmtarzmMCExpr::VK_zmtarzm_HI8) {


if ( Kind == zmtarzmMCExpr :: VK_zmtarzm_HH8 ) {

if(Kind == zmtarzmMCExpr::VK_zmtarzm_HH8) {


if ( Kind == zmtarzmMCExpr :: VK_zmtarzm_HHI8 ) {

if(Kind == zmtarzmMCExpr::VK_zmtarzm_HHI8) {


if ( Kind == zmtarzmMCExpr :: VK_zmtarzm_PM_LO8 ) {

if(Kind == zmtarzmMCExpr::VK_zmtarzm_PM_LO8) {


if ( Kind == zmtarzmMCExpr :: VK_zmtarzm_PM_HI8 ) {

if(Kind == zmtarzmMCExpr::VK_zmtarzm_PM_HI8) {


if ( Kind == zmtarzmMCExpr :: VK_zmtarzm_PM_HH8 ) {

if(Kind == zmtarzmMCExpr::VK_zmtarzm_PM_HH8) {


if ( Kind == zmtarzmMCExpr :: VK_zmtarzm_LO ) {

if(Kind == zmtarzmMCExpr::VK_zmtarzm_LO) {


if ( Kind == zmtarzmMCExpr :: VK_zmtarzm_HI ) {

if(Kind == zmtarzmMCExpr::VK_zmtarzm_HI) {


Value = ( ( Value & 0xff00 ) >> 8 ) & 0xff ;


Value = ( ( Value >> 1 ) & 0xff ) & 0xff ;


if ( Kind == zmtarzmMCExpr :: VK_zmtarzm_LO8_GS ) {

if(Kind == zmtarzmMCExpr::VK_zmtarzm_LO8_GS) {


if ( Kind == zmtarzmMCExpr :: VK_zmtarzm_HI8_GS ) {

if(Kind == zmtarzmMCExpr::VK_zmtarzm_HI8_GS) {


if ( Kind == zmtarzmMCExpr :: VK_zmtarzm_PM ) {

if(Kind == zmtarzmMCExpr::VK_zmtarzm_PM) {


if ( Kind == zmtarzmMCExpr :: VK_zmtarzm_GS ) {

if(Kind == zmtarzmMCExpr::VK_zmtarzm_GS) {