Explanation: In triple diffused pnp transistor fabrication process, an extra p-type diffusion is added to a standard npn-transistor after the n-diffusion to obtain a pnp transistor. However, the usefulness of such a structure is not used due to its limitation. 6. The ‘buried layer’ reduces collector series resistance by providing,
A. A low resistivity current path from n-type layer to n+ contact layer
B. A low resistivity current path from p-type layer to n+ contact layer
C. A high resistivity current path from n-type layer to n+ contact layer
D. A high resistivity current path from p-type layer to n+ contact layer
Answer:A
Explanation: In triple diffused pnp transistor fabrication process, an extra p-type diffusion is added to a standard npn-transistor after the n-diffusion to obtain a pnp transistor. However, the usefulness of such a structure is not used due to its limitation. 6. The ‘buried layer’ reduces collector series resistance by providing,
A. A low resistivity current path from n-type layer to n+ contact layer B. A low resistivity current path from p-type layer to n+ contact layer C. A high resistivity current path from n-type layer to n+ contact layer D. A high resistivity current path from p-type layer to n+ contact layer
Explanation: A heavily doped n+ region is sandwiched between the n-type epitaxial collector and p-type substrate. This buried n+ region provide a low resistivity current path from active collector region (n-type layer) to the collector contact (n+ contact layer). In effect, the n+ layer shunt n-layer of collector region with respect to flow of current, thus effectively reduces the collector resistance. 7. At what potential, the substrate of a vertical pnp transistor should be kept to attain good isolation?