Which of the following is not a stage of pipeline of a RISC processor?
A. read registers and decode the instructions
B. fetch instructions from registers
C. write result into a register
D. access an operand in data memory
Answer:A
Which of the following is not a stage of pipeline of a RISC processor?
A. read registers and decode the instructions B. fetch instructions from registers C. write result into a register D. access an operand in data memory
Explanation: There are 5 stages in pipelining. They are