In the sample and hold circuit, the period during which the voltage across capacitor is equal to input voltage
A. Sample period
B. Hold period
C. Delay period
D. Charging period
Answer:A
In the sample and hold circuit, the period during which the voltage across capacitor is equal to input voltage
A. Sample period B. Hold period C. Delay period D. Charging period
Explanation: The time periods of the sample and hold control voltage during which the voltage across capacitor is equal to the input voltage are called sample period. 10. During which period the op-amps output of sample and hold circuits is processed?