For deriving chip selects of isolated memory or IO devices, the gates that are traditionally used are
A. NOR and NAND
B. NAND and NOT
C. NOT and NOR
D. AND, OR and NOT
Answer:A
For deriving chip selects of isolated memory or IO devices, the gates that are traditionally used are
A. NOR and NAND B. NAND and NOT C. NOT and NOR D. AND, OR and NOT
Explanation: For deriving chip selects of isolated memory or IO devices, the NAND and NOT gates are traditionally used.