If Clock Mode (input pin is held low, then the CLK input is divided by
A. 1
B. 2
C. 3
D. 4
Answer:A
If Clock Mode (input pin is held low, then the CLK input is divided by
A. 1 B. 2 C. 3 D. 4
Explanation: If Clock Mode (CM) input pin is held high, then the CLK input is directly used for deriving the internal timings. Else, it is divided by 2.