Explanation: Monolithic phase detectors are not sensitive to harmonics of the input signal and change in duty cycle of input and output frequency. 4. Determine the capture range of IC PLL 565 for a lock-in range of ± 1kHz.
A. △fc = ±31.453Hz
B. None of the mentioned
C. △fc = ±87.653Hz
D. △fc = ±66.505Hz
Answer:A
Explanation: Monolithic phase detectors are not sensitive to harmonics of the input signal and change in duty cycle of input and output frequency. 4. Determine the capture range of IC PLL 565 for a lock-in range of ± 1kHz.
A. △fc = ±31.453Hz B. None of the mentioned C. △fc = ±87.653Hz D. △fc = ±66.505Hz
Explanation: The capture range is △fc = ±[△fL/ (2π×3.6×103×C]0.5 = ±[1kHz/(2π×3.6×kΩ×10µF)]0.5 = ±[1kHz/226.08×-6]0.5 = [4423]0.5 = ±66.505Hz. 5. Find the lock-in range of monolithic Phase-Locked Loop from the given diagram.