Explanation: The capture range is △fc = ±[△fL/ (2π×3.6×103×C]0.5 = ±[1kHz/(2π×3.6×kΩ×10µF)]0.5 = ±[1kHz/226.08×-6]0.5 = [4423]0.5 = ±66.505Hz. 5. Find the lock-in range of monolithic Phase-Locked Loop from the given diagram.
A. -fo-△fL to fo-△fL
B. -fo-△fL to -fo-△fC
C. fo-△fL to fo-△fC
D. -fo-△fC to fo-△fC
Answer:A
Explanation: The capture range is △fc = ±[△fL/ (2π×3.6×103×C]0.5 = ±[1kHz/(2π×3.6×kΩ×10µF)]0.5 = ±[1kHz/226.08×-6]0.5 = [4423]0.5 = ±66.505Hz. 5. Find the lock-in range of monolithic Phase-Locked Loop from the given diagram.
A. -fo-△fL to fo-△fL B. -fo-△fL to -fo-△fC C. fo-△fL to fo-△fC D. -fo-△fC to fo-△fC
Explanation: Lock-in range of monolithic PLL is from -fo-△fL to fo-△fL.