Explanation: In an op-amp clamper circuit, a pre-determined dc level is deliberately inserted at the output voltage. For this reason, the clamper is sometimes called as DC inserter. 15. At what values of Ci and Rd a precision clamping can obtained in peak clamper when the time period of the input waveform is 0.4s?
A. Ci=0.1µF and Rd=10kΩ
B. Ci=0.47µF and Rd=10kΩ
C. Ci=33µF and Rd=10kΩ
D. Ci=2.5µF and Rd=10kΩ
Answer:A
Explanation: In an op-amp clamper circuit, a pre-determined dc level is deliberately inserted at the output voltage. For this reason, the clamper is sometimes called as DC inserter. 15. At what values of Ci and Rd a precision clamping can obtained in peak clamper when the time period of the input waveform is 0.4s?
A. Ci=0.1µF and Rd=10kΩ B. Ci=0.47µF and Rd=10kΩ C. Ci=33µF and Rd=10kΩ D. Ci=2.5µF and Rd=10kΩ