description: Insufficient DRAM address validation in System Management Unit (SMU) may result in a DMA read from invalid DRAM address to SRAM resulting in SMU not servicing further requests.
problem types: tbd
affected:
{
product: Ryzen™ Series
vendor: AMD
versions:
status: affected, version: various
}
{
product:  Athlon™ Series
vendor: AMD
versions:
status: affected, version: various
}
