2067
Potential Mitigations
Phase: Architecture and Design
Phase: Implementation
Ensure proper access control mechanisms protect software-controllable features altering
physical operating conditions such as clock frequency and voltage.
Demonstrative Examples
Example 1:
This example considers the Rowhammer problem [REF-1083]. The Rowhammer issue was caused
by a program in a tight loop writing repeatedly to a location to which the program was allowed to
write but causing an adjacent memory location value to change.
Example Language: Other (Bad)
Continuously writing the same value to the same address causes the value of an adjacent location to change value.
Preventing the loop required to defeat the Rowhammer exploit is not always possible:
Example Language: Other (Good)
Redesign the RAM devices to reduce inter capacitive coupling making the Rowhammer exploit impossible.
While the redesign may be possible for new devices, a redesign is not possible in existing devices.
There is also the possibility that reducing capacitance with a relayout would impact the density of
the device resulting in a less capable, more costly device.
Example 2:
Suppose a hardware design implements a set of software-accessible registers for scaling clock
frequency and voltage but does not control access to these registers. Attackers may cause register
and memory changes and race conditions by changing the clock or voltage of the device under
their control.
Example 3:
Consider the following SoC design. Security-critical settings for scaling clock frequency and voltage
are available in a range of registers bounded by [PRIV_END_ADDR : PRIV_START_ADDR] in the
tmcu.csr module in the HW Root of Trust. These values are writable based on the lock_bit register
in the same module. The lock_bit is only writable by privileged software running on the tmcu.
We assume that untrusted software running on any of the Core{0-N} processors has access to
the input and output ports of the hrot_iface. If untrusted software can clear the lock_bit or write the
clock frequency and voltage registers due to inadequate protection, a fault injection attack could be
performed.
Observed Examples
Reference Description
CVE-2019-11157 Plundervolt: Improper conditions check in voltage settings for some Intel(R)
Processors may allow a privileged user to potentially enable escalation of
privilege and/or information disclosure via local access [REF-1081].
https://www.cve.org/CVERecord?id=CVE-2019-11157
CVE-2020-8694 PLATYPUS Attack: Insufficient access control in the Linux kernel driver for
some Intel processors allows information disclosure.
https://www.cve.org/CVERecord?id=CVE-2020-8694
CWE Version 4.14
CWE-1257: Improper Access Control Applied to Mirrored or Aliased Memory Regions
CWE-1257: Improper Access Control Applied
to Mirrored or Aliased Memory Regions 2068
Reference Description
CVE-2020-8695 Observable discrepancy in the RAPL interface for some Intel processors
allows information disclosure.
https://www.cve.org/CVERecord?id=CVE-2020-8695
CVE-2020-12912 AMD extension to a Linux service does not require privileged access to the
RAPL interface, allowing side-channel attacks.
https://www.cve.org/CVERecord?id=CVE-2020-12912
CVE-2015-0565 NaCl in 2015 allowed the CLFLUSH instruction, making Rowhammer attacks
possible.
https://www.cve.org/CVERecord?id=CVE-2015-0565
Functional Areas
• Power
• Clock
MemberOf Relationships
This MemberOf relationships table shows additional CWE Catgeories and Views that reference this
weakness as a member. This information is often useful in understanding where a weakness fits
within the context of external information sources.
Nature Type ID Name Page
MemberOf 1206 Power, Clock, Thermal, and Reset Concerns 1194 2473
MemberOf 1343 Weaknesses in the 2021 CWE Most Important
Hardware Weaknesses List
1343 2592
MemberOf 1396 Comprehensive Categorization: Access Control 1400 2519
Related Attack Patterns
CAPEC-ID Attack Pattern Name
624 Hardware Fault Injection
625 Mobile Device Fault Injection
References
[REF-1081]Kit Murdock, David Oswald, Flavio D Garcia, Jo Van Bulck, Frank Piessens and Daniel
Gruss. "Plundervolt". < https://plundervolt.com/ >.
[REF-1082]Adrian Tang, Simha Sethumadhavan and Salvatore Stolfo. "CLKSCREW: Exposing
the Perils of Security-Oblivious Energy Management". < https://www.usenix.org/system/files/
conference/usenixsecurity17/sec17-tang.pdf >.
[REF-1083]Yoongu Kim, Ross Daly, Jeremie Kim, Ji Hye Lee, Donghyuk Lee, Chris Wilkerson,
Konrad Lai and Onur Mutlu. "Flipping Bits in Memory Without Accessing Them: An Experimental
Study of DRAM Disturbance Errors". < https://users.ece.cmu.edu/~yoonguk/papers/kim-isca14.pdf
>.
[REF-1225]Project Zero. "Exploiting the DRAM rowhammer bug to gain kernel privileges". 2015
March 9. < https://googleprojectzero.blogspot.com/2015/03/exploiting-dram-rowhammer-bug-togain.
html >.
[REF-1217]Ross Anderson. "Security Engineering". 2001. < https://www.cl.cam.ac.uk/~rja14/
musicfiles/manuscripts/SEv1.pdf >.
CWE-1257: Improper Access Control Applied to Mirrored or Aliased Memory
Regions
Weakness ID : 1257
Structure : Simple
Abstraction : Base
CWE Version 4.14
CWE-1257: Improper Access Control Applied to Mirrored or Aliased Memory Regions
CWE-1257: Improper Access Control Applied
to Mirrored or Aliased Memory Regions