2077
• Access_policy.read_np: if set to one, allows reads from Non_privileged_SW
• Access_policy.write_np: if set to one, allows writes from Non_privileged_SW
• Access_policy.execute_np: if set to one, allows code execution by Non_privileged_SW
• Access_policy.read_p: if set to one, allows reads from Privileged_SW
• Access_policy.write_p: if set to one, allows writes from Privileged_SW
• Access_policy.execute_p: if set to one, allows code execution by Privileged_SW
For any requests from software, an address-protection filter checks the address range and access
policies for each of the three regions, and only allows software access if all three filters allow
access.
Consider the following goals for access control as intended by the designer:
• Region_0 & Region_1: registers are programmable by Privileged_SW
• Region_2: registers are programmable by Non_privileged_SW
The intention is that Non_privileged_SW cannot modify memory region and policies defined by
Privileged_SW in Region_0 and Region_1. Thus, it cannot read or write the memory regions that
Privileged_SW is using.
Example Language: (Bad)
Non_privileged_SW can program the Address_range register for Region_2 so that its address overlaps with the ranges
defined by Region_0 or Region_1. Using this capability, it is possible for Non_privileged_SW to block any memory region
from being accessed by Privileged_SW, i.e., Region_0 and Region_1.
This design could be improved in several ways.
Example Language: (Good)
Ensure that software accesses to memory regions are only permitted if all three filters permit access. Additionally, the
scheme could define a memory region priority to ensure that Region_2 (the memory region defined by Non_privileged_SW)
cannot overlap Region_0 or Region_1 (which are used by Privileged_SW).
Example 2:
The example code below is taken from the IOMMU controller module of the HACK@DAC'19 buggy
CVA6 SoC [REF-1338]. The static memory map is composed of a set of Memory-Mapped Input/
Output (MMIO) regions covering different IP agents within the SoC. Each region is defined by
two 64-bit variables representing the base address and size of the memory region (XXXBase and
XXXLength).
In this example, we have 12 IP agents, and only 4 of them are called out for illustration purposes
in the code snippets. Access to the AES IP MMIO region is considered privileged as it provides
access to AES secret key, internal states, or decrypted data.
Example Language: Verilog (Bad)
...
localparam logic[63:0] PLICLength = 64'h03FF_FFFF;
localparam logic[63:0] UARTLength = 64'h0011_1000;
localparam logic[63:0] AESLength = 64'h0000_1000;
localparam logic[63:0] SPILength = 64'h0080_0000;
...
typedef enum logic [63:0] {
...
PLICBase = 64'h0C00_0000,
UARTBase = 64'h1000_0000,
AESBase = 64'h1010_0000,
SPIBase = 64'h2000_0000,
...
CWE Version 4.14
CWE-1260: Improper Handling of Overlap Between Protected Memory Ranges
CWE-1260: Improper Handling of Overlap Between Protected Memory Ranges