1062
This MemberOf relationships table shows additional CWE Catgeories and Views that reference this
weakness as a member. This information is often useful in understanding where a weakness fits
within the context of external information sources.
Nature Type ID Name Page
MemberOf 1001 SFP Secondary Cluster: Use of an Improper API 888 2420
MemberOf 1398 Comprehensive Categorization: Component Interaction 1400 2524
Taxonomy Mappings
Mapped Taxonomy Name Node ID Fit Mapped Node Name
PLOVER CHANGE Behavioral Change
CWE-440: Expected Behavior Violation
Weakness ID : 440
Structure : Simple
Abstraction : Base
Description
A feature, API, or function does not perform according to its specification.
Relationships
The table(s) below shows the weaknesses and high level categories that are related to this
weakness. These relationships are defined as ChildOf, ParentOf, MemberOr and give insight to
similar items that may exist at higher and lower levels of abstraction. In addition, relationships such
as PeerOf and CanAlsoBe are defined to show similar weaknesses that may want to be explored.
Relevant to the view "Research Concepts" (CWE-1000)
Nature Type ID Name Page
ChildOf 684 Incorrect Provision of Specified Functionality 1505
Relevant to the view "Software Development" (CWE-699)
Nature Type ID Name Page
MemberOf 438 Behavioral Problems 2326
Applicable Platforms
Language : Not Language-Specific (Prevalence = Undetermined)
Technology : ICS/OT (Prevalence = Undetermined)
Common Consequences
Scope Impact Likelihood
Other Quality Degradation
Varies by Context
Demonstrative Examples
Example 1:
The provided code is extracted from the Control and Status Register (CSR), csr_regfile, module
within the Hack@DAC'21 OpenPiton System-on-Chip (SoC). This module is designed to implement
CSR registers in accordance with the RISC-V specification. The mie (machine interrupt enable)
register is a 64-bit register [REF-1384], where bits correspond to different interrupt sources. As the
name suggests, mie is a machine-level register that determines which interrupts are enabled. Note
that in the example below the mie_q and mie_d registers represent the conceptual mie reigster in
the RISC-V specification. The mie_d register is the value to be stored in the mie register while the
mie_q register holds the current value of the mie register [REF-1385].
CWE Version 4.14
CWE-440: Expected Behavior Violation
CWE-440: Expected Behavior Violation