2154
Description
The product's debug components contain incorrect chaining or granularity of debug components.
Extended Description
For debugging and troubleshooting a chip, several hardware design elements are often
implemented, including:
• Various Test Access Ports (TAPs) allow boundary scan commands to be executed.
• For scanning the internal components of a chip, there are scan cells that allow the chip to be
used as a "stimulus and response" mechanism.
• Chipmakers might create custom methods to observe the internal components of their chips
by placing various tracing hubs within their chip and creating hierarchical or interconnected
structures among those hubs.
Logic errors during design or synthesis could misconfigure the interconnection of the debug
components, which could allow unintended access permissions.
Relationships
The table(s) below shows the weaknesses and high level categories that are related to this
weakness. These relationships are defined as ChildOf, ParentOf, MemberOr and give insight to
similar items that may exist at higher and lower levels of abstraction. In addition, relationships such
as PeerOf and CanAlsoBe are defined to show similar weaknesses that may want to be explored.
Relevant to the view "Research Concepts" (CWE-1000)
Nature Type ID Name Page
ChildOf 284 Improper Access Control 680
Applicable Platforms
Language : Verilog (Prevalence = Undetermined)
Language : VHDL (Prevalence = Undetermined)
Language : Not Language-Specific (Prevalence = Undetermined)
Operating_System : Not OS-Specific (Prevalence = Undetermined)
Architecture : Not Architecture-Specific (Prevalence = Undetermined)
Technology : Processor Hardware (Prevalence = Undetermined)
Technology : Not Technology-Specific (Prevalence = Undetermined)
Common Consequences
Scope Impact Likelihood
Confidentiality
Integrity
Access Control
Authentication
Authorization
Availability
Accountability
Gain Privileges or Assume Identity
Bypass Protection Mechanism
Execute Unauthorized Code or Commands
Modify Memory
Modify Files or Directories
Depending on the access to debug component(s)
erroneously granted, an attacker could use the debug
component to gain additional understanding about
the system to further an attack and/or execute other
commands. This could compromise any security property,
including the ones listed above.
Medium
Detection Methods
Architecture or Design Review
CWE Version 4.14
CWE-1296: Incorrect Chaining or Granularity of Debug Components
CWE-1296: Incorrect Chaining or Granularity of Debug Components