/* Given a struct clk of a rate-selectable clksel clock, and a register field value to search for, find the corresponding clock divisor. The register field value should be pre-masked and shifted down so the LSB is at bit 0 before calling. Returns 0 on error  */
u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val)
/* Given a struct clk of a rate-selectable clksel clock, and a register field value to search for, find the corresponding clock divisor. The register field value should be pre-masked and shifted down so the LSB is at bit 0 before calling. Returns 0 on error  */
u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val)
{
	const struct clksel *clks;
	const struct clksel_rate *clkr;
	clks = omap2_get_clksel_by_parent(clk, clk->parent);
	if (!clks)
		return 0;
	for (clkr = clks->rates; clkr->div; clkr++) {
		if ((clkr->flags & cpu_mask) && (clkr->val == field_val))
			break;
	}
	if (!clkr->div) {
		printk(KERN_ERR "clock: Could not find fieldval %d for "
		       "clock %s parent %s\n", field_val, clk->name,
		       clk->parent->name);
		return 0;
	}
	return clkr->div;
}