/* Enable clock and set baud rate, parity etc.  */
void pxa_setbrg_common(struct pxa_uart_regs *uart_regs, int port, int baudrate)
/* Enable clock and set baud rate, parity etc.  */
void pxa_setbrg_common(struct pxa_uart_regs *uart_regs, int port, int baudrate)
{
	uint32_t divider = pxa_uart_get_baud_divider(baudrate);
	if (!divider)
		hang();
	pxa_uart_toggle_clock(port, 1);
	writel(0, &uart_regs->ier);
	writel(0, &uart_regs->fcr);
	writel(LCR_WLS0 | LCR_WLS1 | LCR_DLAB, &uart_regs->lcr);
	writel(divider & 0xff, &uart_regs->dll);
	writel(divider >> 8, &uart_regs->dlh);
	writel(LCR_WLS0 | LCR_WLS1, &uart_regs->lcr);
	writel(IER_UUE, &uart_regs->ier);
}