/* brief Return PLL0 output clock rate param recompute : Forces a PLL rate recomputation if true return PLL0 output clock rate note The PLL rate is cached in the driver in a variable as the rate computation function can take some time to perform. It is recommended to use 'false' with the 'recompute' parameter.  */
uint32_t CLOCK_GetPLL0OutClockRate(bool recompute)
/* brief Return PLL0 output clock rate param recompute : Forces a PLL rate recomputation if true return PLL0 output clock rate note The PLL rate is cached in the driver in a variable as the rate computation function can take some time to perform. It is recommended to use 'false' with the 'recompute' parameter.  */
uint32_t CLOCK_GetPLL0OutClockRate(bool recompute)
{
    pll_setup_t Setup;
    uint32_t rate;
    if ((recompute) || (s_Pll0_Freq == 0U))
    {
        Setup.pllctrl    = SYSCON->PLL0CTRL;
        Setup.pllndec    = SYSCON->PLL0NDEC;
        Setup.pllpdec    = SYSCON->PLL0PDEC;
        Setup.pllsscg[0] = SYSCON->PLL0SSCG0;
        Setup.pllsscg[1] = SYSCON->PLL0SSCG1;
        CLOCK_GetPLL0OutFromSetupUpdate(&Setup);
    }
    rate = s_Pll0_Freq;
    return rate;
}