/* This function sets the SCC Manager (Scan Chain Control Manager) register and optionally triggers the SCC update for all ranks.  */
static void scc_mgr_set_all_ranks(struct socfpga_sdrseq *seq, const u32 off, const u32 grp, const u32 val, const int update)
/* This function sets the SCC Manager (Scan Chain Control Manager) register and optionally triggers the SCC update for all ranks.  */
static void scc_mgr_set_all_ranks(struct socfpga_sdrseq *seq, const u32 off, const u32 grp, const u32 val, const int update)
{
	u32 r;
	for (r = 0; r < seq->rwcfg->mem_number_of_ranks;
	     r += NUM_RANKS_PER_SHADOW_REG) {
		scc_mgr_set(off, grp, val);
		if (update || (r == 0)) {
			writel(grp, &sdr_scc_mgr->dqs_ena);
			writel(0, &sdr_scc_mgr->update);
		}
	}
}