/* sdk_flashchip_t sdk_flashchip = { 0x1640ef, CONFIG_SPI_FLASH_SIZE, 64 * 1024, 4 * 1024, 256, 0xffff };  */
static void IRAM Cache_Read_Disable_2()
/* sdk_flashchip_t sdk_flashchip = { 0x1640ef, CONFIG_SPI_FLASH_SIZE, 64 * 1024, 4 * 1024, 256, 0xffff };  */
static void IRAM Cache_Read_Disable_2()
{
    CLEAR_PERI_REG_MASK(CACHE_FLASH_CTRL_REG, CACHE_READ_EN_BIT);
    while(REG_READ(SPI_EXT2(0)) != 0) { }
    CLEAR_PERI_REG_MASK(PERIPHS_SPI_FLASH_CTRL, SPI_CMD_ENABLE_AHB);
}