/* Configures the SAI clock Divider coming from PLLSAI.  */
void RCC_SAIPLLSAIClkDivConfig(uint32_t RCC_PLLSAIDivQ)
/* Configures the SAI clock Divider coming from PLLSAI.  */
void RCC_SAIPLLSAIClkDivConfig(uint32_t RCC_PLLSAIDivQ)
{
  uint32_t tmpreg = 0;
  assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(RCC_PLLSAIDivQ));
  tmpreg = RCC->DCKCFGR;
  tmpreg &= ~(RCC_DCKCFGR_PLLSAIDIVQ);
  tmpreg |= ((RCC_PLLSAIDivQ - 1) << 8);
  RCC->DCKCFGR = tmpreg;
}