/* gpmc_prefetch_enable - configures and starts prefetch transfer @cs: nand cs (chip select) number @dma_mode: dma mode enable (1) or disable (0) @u32_count: number of bytes to be transferred @is_write: prefetch read(0) or write post(1) mode  */
int gpmc_prefetch_enable(int cs, int dma_mode, unsigned int u32_count, int is_write)
/* gpmc_prefetch_enable - configures and starts prefetch transfer @cs: nand cs (chip select) number @dma_mode: dma mode enable (1) or disable (0) @u32_count: number of bytes to be transferred @is_write: prefetch read(0) or write post(1) mode  */
int gpmc_prefetch_enable(int cs, int dma_mode, unsigned int u32_count, int is_write)
{
	uint32_t prefetch_config1;
	if (!(gpmc_read_reg(GPMC_PREFETCH_CONTROL))) {
		gpmc_write_reg(GPMC_PREFETCH_CONFIG2, u32_count);
		prefetch_config1 = ((cs << CS_NUM_SHIFT) |
					PREFETCH_FIFOTHRESHOLD |
					ENABLE_PREFETCH |
					(dma_mode << DMA_MPU_MODE) |
					(0x1 & is_write));
		gpmc_write_reg(GPMC_PREFETCH_CONFIG1, prefetch_config1);
	} else {
		return -EBUSY;
	}
	gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x1);
	return 0;
}