/* Ensure that the I and D caches are coherent within specified region. This is typically used when code has been written to a memory region, and will be executed. */
void v7m_coherent_kern_range(unsigned long start, unsigned long end)
/* Ensure that the I and D caches are coherent within specified region. This is typically used when code has been written to a memory region, and will be executed. */
void v7m_coherent_kern_range(unsigned long start, unsigned long end)
{
	asm("dsb");
	asm("isb");
	if (start & (L1_CACHE_BYTES - 1)) {
		DCCMVAC(start);
		asm("dsb");
		ICIMVAU(start);
		start = (start + L1_CACHE_BYTES) & ~(L1_CACHE_BYTES - 1);
	}
	if (end & (L1_CACHE_BYTES - 1)) {
		DCCMVAC(start);
		asm("dsb");
		ICIMVAU(start);
		end &= ~(L1_CACHE_BYTES - 1);
	}
	for ( ; start < end; start += L1_CACHE_BYTES) {
		DCCMVAC(start);
		asm("dsb");
		ICIMVAU(start);
	}
	asm("dsb");
	asm("isb");
}