/* Stop a DMA transfer occurring on the specified DMA Channel.  */
void dmac_channel_stop_transfer(Dmac *p_dmac, uint32_t ul_num)
/* Stop a DMA transfer occurring on the specified DMA Channel.  */
void dmac_channel_stop_transfer(Dmac *p_dmac, uint32_t ul_num)
{
	uint32_t status;
	Assert(p_dmac);
	Assert(ul_num<=3);
	status = dmac_channel_get_status(p_dmac);
	if (!(status & (DMAC_CHSR_ENA0 << ul_num))) {
		return;
	} else {
		dmac_channel_suspend(p_dmac, ul_num);
		do {
			status = dmac_channel_get_status(p_dmac);
			if (status & (DMAC_CHSR_EMPT0 << ul_num)) {
				break;
			}
		} while (1);
		dmac_channel_disable(p_dmac, ul_num);
		dmac_channel_resume(p_dmac, ul_num);
	}
}