/* Some R6XX/R7XX doesn't seems to take into account HDP flush performed through ring buffer, this leads to corruption in rendering, see  */
void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo)
/* Some R6XX/R7XX doesn't seems to take into account HDP flush performed through ring buffer, this leads to corruption in rendering, see  */
void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo)
{
	WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);
}