/* Xilinx PS GPIO controller parent device ISR. 
Interrupt service routine for the Xilinx PS GPIO controller's IRQ. The ISR iterates all associated MIO / EMIO GPIO pink bank child device instances and checks each bank's interrupt status. If any pending interrupt is detected within a GPIO pin bank, the callbacks registered for the respective bank are triggered using the functionality provided by the GPIO sub-system. */
static void gpio_xlnx_ps_isr(const struct device *dev)
/* Xilinx PS GPIO controller parent device ISR. 
Interrupt service routine for the Xilinx PS GPIO controller's IRQ. The ISR iterates all associated MIO / EMIO GPIO pink bank child device instances and checks each bank's interrupt status. If any pending interrupt is detected within a GPIO pin bank, the callbacks registered for the respective bank are triggered using the functionality provided by the GPIO sub-system. */
static void gpio_xlnx_ps_isr(const struct device *dev)
{
	const struct gpio_xlnx_ps_dev_cfg *dev_conf = dev->config;
	const struct gpio_driver_api *api;
	struct gpio_xlnx_ps_bank_dev_data *bank_data;
	uint32_t bank;
	uint32_t int_mask;
	for (bank = 0; bank < dev_conf->num_banks; bank++) {
		api = dev_conf->bank_devices[bank]->api;
		int_mask = 0;
		if (api != NULL) {
			int_mask = api->get_pending_int(dev_conf->bank_devices[bank]);
		}
		if (int_mask) {
			bank_data = (struct gpio_xlnx_ps_bank_dev_data *)
				dev_conf->bank_devices[bank]->data;
			gpio_fire_callbacks(&bank_data->callbacks,
				dev_conf->bank_devices[bank], int_mask);
		}
	}
}