/* The MSI interrupt handler for the NAPI case (i.e., response queues serviced by NAPI polling). Handles data events from SGE response queues as well as error and other async events as they all use the same MSI vector. We use one SGE response queue per port in this mode and protect all response queues with queue 0's lock.  */
static irqreturn_t t3_intr_msi_napi(int irq, void *cookie)
/* The MSI interrupt handler for the NAPI case (i.e., response queues serviced by NAPI polling). Handles data events from SGE response queues as well as error and other async events as they all use the same MSI vector. We use one SGE response queue per port in this mode and protect all response queues with queue 0's lock.  */
static irqreturn_t t3_intr_msi_napi(int irq, void *cookie)
{
	int new_packets;
	struct adapter *adap = cookie;
	struct sge_rspq *q = &adap->sge.qs[0].rspq;
	spin_lock(&q->lock);
	new_packets = rspq_check_napi(&adap->sge.qs[0]);
	if (adap->params.nports == 2)
		new_packets += rspq_check_napi(&adap->sge.qs[1]);
	if (!new_packets && t3_slow_intr_handler(adap) == 0)
		q->unhandled_irqs++;
	spin_unlock(&q->lock);
	return IRQ_HANDLED;
}