/* The USBCMD HSEE Bit will be reset to default 0 by USBCMD Host Controller Reset(HCRST). This function is to set USBCMD HSEE Bit if PCICMD SERR# Enable Bit is set. */
VOID XhcSetHsee(IN USB_XHCI_INSTANCE *Xhc)
/* The USBCMD HSEE Bit will be reset to default 0 by USBCMD Host Controller Reset(HCRST). This function is to set USBCMD HSEE Bit if PCICMD SERR# Enable Bit is set. */
VOID XhcSetHsee(IN USB_XHCI_INSTANCE *Xhc)
{
  EFI_STATUS           Status;
  EFI_PCI_IO_PROTOCOL  *PciIo;
  UINT16               XhciCmd;
  PciIo  = Xhc->PciIo;
  Status = PciIo->Pci.Read (
                        PciIo,
                        EfiPciIoWidthUint16,
                        PCI_COMMAND_OFFSET,
                        sizeof (XhciCmd) / sizeof (UINT16),
                        &XhciCmd
                        );
  if (!EFI_ERROR (Status)) {
    if ((XhciCmd & EFI_PCI_COMMAND_SERR) != 0) {
      XhcSetOpRegBit (Xhc, XHC_USBCMD_OFFSET, XHC_USBCMD_HSEE);
    }
  }
}