/* Read a 32-bit word from a location in VPD EEPROM using the card's PCI VPD ROM capability. A zero is written to the flag bit when the addres is written to the control register. The hardware device will set the flag to 1 when 4 bytes have been read into the data register.  */
int t3_seeprom_read(struct adapter *adapter, u32 addr, __le32 *data)
/* Read a 32-bit word from a location in VPD EEPROM using the card's PCI VPD ROM capability. A zero is written to the flag bit when the addres is written to the control register. The hardware device will set the flag to 1 when 4 bytes have been read into the data register.  */
int t3_seeprom_read(struct adapter *adapter, u32 addr, __le32 *data)
{
	u16 val;
	int attempts = EEPROM_MAX_POLL;
	u32 v;
	unsigned int base = adapter->params.pci.vpd_cap_addr;
	if ((addr >= EEPROMSIZE && addr != EEPROM_STAT_ADDR) || (addr & 3))
		return -EINVAL;
	pci_write_config_word(adapter->pdev, base + PCI_VPD_ADDR, addr);
	do {
		udelay(10);
		pci_read_config_word(adapter->pdev, base + PCI_VPD_ADDR, &val);
	} while (!(val & PCI_VPD_ADDR_F) && --attempts);
	if (!(val & PCI_VPD_ADDR_F)) {
		CH_ERR(adapter, "reading EEPROM address 0x%x failed\n", addr);
		return -EIO;
	}
	pci_read_config_dword(adapter->pdev, base + PCI_VPD_DATA, &v);
	*data = cpu_to_le32(v);
	return 0;
}