/* RCC Set the HSE Frequency Divider used as PLL Clock Source.  */
void rcc_set_pllxtpre(uint32_t pllxtpre)
/* RCC Set the HSE Frequency Divider used as PLL Clock Source.  */
void rcc_set_pllxtpre(uint32_t pllxtpre)
{
	RCC_CFGR = (RCC_CFGR & ~RCC_CFGR_PLLXTPRE) |
			(pllxtpre << 17);
}