/* Disable the irq on the current core for chips that have the EN*_W1{S,C} registers.  */
static void octeon_irq_ciu0_disable_v2(unsigned int irq)
/* Disable the irq on the current core for chips that have the EN*_W1{S,C} registers.  */
static void octeon_irq_ciu0_disable_v2(unsigned int irq)
{
	int index = cvmx_get_core_num() * 2;
	u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0);
	cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask);
}