/* Initialize a Xilinx PS GPIO controller parent device. 
Initialize a Xilinx PS GPIO controller parent device, whose task it is to handle the IRQ line of each controller instance, while the configuration, status and data acquisition of each MIO / EMIO GPIO pin associated with the parent controller instance is handled via the respective GPIO pin bank's child device. */
static int gpio_xlnx_ps_init(const struct device *dev)
/* Initialize a Xilinx PS GPIO controller parent device. 
Initialize a Xilinx PS GPIO controller parent device, whose task it is to handle the IRQ line of each controller instance, while the configuration, status and data acquisition of each MIO / EMIO GPIO pin associated with the parent controller instance is handled via the respective GPIO pin bank's child device. */
static int gpio_xlnx_ps_init(const struct device *dev)
{
	const struct gpio_xlnx_ps_dev_cfg *dev_conf = dev->config;
	dev_conf->config_func(dev);
	return 0;
}