/* Set features in the Cadence NAND controller using PIO operations. */
static int cdns_nand_pio_set_features(uintptr_t base_address, uint8_t feat_addr, uint8_t feat_val, uint8_t thread, uint8_t vol_id)
/* Set features in the Cadence NAND controller using PIO operations. */
static int cdns_nand_pio_set_features(uintptr_t base_address, uint8_t feat_addr, uint8_t feat_val, uint8_t thread, uint8_t vol_id)
{
	uint32_t status = 0;
	int ret = 0;
	ret = cdns_wait_for_thread(base_address, thread);
	if (ret != 0) {
		return ret;
	}
	sys_write32(SET_FEAT_ADDR(feat_addr), (base_address + CDNS_CMD_REG1));
	sys_write32(feat_val, (base_address + CDNS_CMD_REG2));
	status = CMD_0_THREAD_POS_SET(thread);
	status |= CMD_0_C_MODE_SET(CT_PIO_MODE);
	status |= PIO_CMD0_CT_SET(PIO_SET_FEA_MODE);
	status |= CMD_0_VOL_ID_SET(vol_id);
	sys_write32(status, (base_address + CDNS_CMD_REG0));
	return 0;
}