/* Config DMA destination transfer count under non-sequence mode.  */
int32_t DMA_SetNonSeqDestCount(CM_DMA_TypeDef *DMAx, uint8_t u8Ch, uint32_t u32Count)
/* Config DMA destination transfer count under non-sequence mode.  */
int32_t DMA_SetNonSeqDestCount(CM_DMA_TypeDef *DMAx, uint8_t u8Ch, uint32_t u32Count)
{
    __IO uint32_t *DNSEQCTLx;
    DDL_ASSERT(IS_DMA_UNIT(DMAx));
    DDL_ASSERT(IS_DMA_CH(u8Ch));
    DDL_ASSERT(IS_DMA_NON_SEQ_TRANS_CNT(u32Count));
    DNSEQCTLx = &DMA_CH_REG(DMAx->DNSEQCTL0, u8Ch);
    MODIFY_REG32(*DNSEQCTLx, DMA_DNSEQCTL_DNSCNT, (u32Count << DMA_DNSEQCTL_DNSCNT_POS));
    return LL_OK;
}