/* apply and load a particular input delay for the DQ pins in a group group_bgn is the index of the first dq pin (in the write group)  */
static void scc_mgr_apply_group_dq_in_delay(struct socfpga_sdrseq *seq, u32 group_bgn, u32 delay)
/* apply and load a particular input delay for the DQ pins in a group group_bgn is the index of the first dq pin (in the write group)  */
static void scc_mgr_apply_group_dq_in_delay(struct socfpga_sdrseq *seq, u32 group_bgn, u32 delay)
{
	u32 i, p;
	for (i = 0, p = group_bgn; i < seq->rwcfg->mem_dq_per_read_dqs;
	     i++, p++) {
		scc_mgr_set_dq_in_delay(p, delay);
		scc_mgr_load_dq(p);
	}
}