/* In instruction register encoding 31 can refer to ZR (zero register) or the SP (stack pointer) depending on context. In QEMU's case we map SP to cpu_X and ZR accesses to a temporary which can be discarded. This is the point of the _sp forms.  */
static TCGv_i64 cpu_reg(DisasContext *s, int reg)
/* In instruction register encoding 31 can refer to ZR (zero register) or the SP (stack pointer) depending on context. In QEMU's case we map SP to cpu_X and ZR accesses to a temporary which can be discarded. This is the point of the _sp forms.  */
static TCGv_i64 cpu_reg(DisasContext *s, int reg)
{
    if (reg == 31) {
        return new_tmp_a64_zero(s);
    } else {
        return cpu_X[reg];
    }
}