/* Program the PIO/MWDMA timing for this channel according to the current clock. These share the same register so are managed by the DMA start/stop sequence as with the old driver.  */
static void it821x_program(struct ata_port *ap, struct ata_device *adev, u16 timing)
/* Program the PIO/MWDMA timing for this channel according to the current clock. These share the same register so are managed by the DMA start/stop sequence as with the old driver.  */
static void it821x_program(struct ata_port *ap, struct ata_device *adev, u16 timing)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	struct it821x_dev *itdev = ap->private_data;
	int channel = ap->port_no;
	u8 conf;
	if (itdev->clock_mode == ATA_66)
		conf = timing >> 8;
	else
		conf = timing & 0xFF;
	pci_write_config_byte(pdev, 0x54 + 4 * channel, conf);
}