/* Initialize a MIO / EMIO GPIO bank sub-device. 
Initialize a MIO / EMIO GPIO bank sub-device, which is a child of the parent Xilinx PS GPIO controller device driver. This ini- tialization function sets up a defined initial state for each GPIO bank. */
static int gpio_xlnx_ps_bank_init(const struct device *dev)
/* Initialize a MIO / EMIO GPIO bank sub-device. 
Initialize a MIO / EMIO GPIO bank sub-device, which is a child of the parent Xilinx PS GPIO controller device driver. This ini- tialization function sets up a defined initial state for each GPIO bank. */
static int gpio_xlnx_ps_bank_init(const struct device *dev)
{
	const struct gpio_xlnx_ps_bank_dev_cfg *dev_conf = dev->config;
	sys_write32(~0x0, GPIO_XLNX_PS_BANK_INT_DIS_REG);
	sys_write32(~0x0, GPIO_XLNX_PS_BANK_INT_STAT_REG);
	sys_write32(0x0, GPIO_XLNX_PS_BANK_OEN_REG);
	sys_write32(0x0, GPIO_XLNX_PS_BANK_DIRM_REG);
	sys_write32(0x0, GPIO_XLNX_PS_BANK_DATA_REG);
	return 0;
}