/* Load up a virtual<->physical translation for @eaddr<->@paddr in the pre-allocated TLB slot @config_addr (see sh64_get_wired_dtlb_entry).  */
void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr, unsigned long asid, unsigned long paddr)
/* Load up a virtual<->physical translation for @eaddr<->@paddr in the pre-allocated TLB slot @config_addr (see sh64_get_wired_dtlb_entry).  */
void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr, unsigned long asid, unsigned long paddr)
{
	unsigned long long pteh, ptel;
	pteh = neff_sign_extend(eaddr);
	pteh &= PAGE_MASK;
	pteh |= (asid << PTEH_ASID_SHIFT) | PTEH_VALID;
	ptel = neff_sign_extend(paddr);
	ptel &= PAGE_MASK;
	ptel |= (_PAGE_CACHABLE | _PAGE_READ | _PAGE_WRITE);
	asm volatile("putcfg %0, 1, %1\n\t"
			"putcfg %0, 0, %2\n"
			: : "r" (config_addr), "r" (ptel), "r" (pteh));
}