/* brief Return PLL0 output clock rate from setup structure param pSetup : Pointer to a PLL setup structure return PLL0 output clock rate the setup structure will generate  */
uint32_t CLOCK_GetPLL0OutFromSetup(pll_setup_t *pSetup)
/* brief Return PLL0 output clock rate from setup structure param pSetup : Pointer to a PLL setup structure return PLL0 output clock rate the setup structure will generate  */
uint32_t CLOCK_GetPLL0OutFromSetup(pll_setup_t *pSetup)
{
    uint32_t clkRate = 0;
    uint32_t prediv, postdiv;
    float workRate = 0.0F;
    clkRate = CLOCK_GetPLL0InClockRate();
    if (((pSetup->pllctrl & SYSCON_PLL0CTRL_BYPASSPLL_MASK) == 0UL) &&
        ((pSetup->pllctrl & SYSCON_PLL0CTRL_CLKEN_MASK) != 0UL) &&
        ((PMC->PDRUNCFG0 & PMC_PDRUNCFG0_PDEN_PLL0_MASK) == 0UL) &&
        ((PMC->PDRUNCFG0 & PMC_PDRUNCFG0_PDEN_PLL0_SSCG_MASK) == 0UL))
    {
        prediv  = findPll0PreDiv();
        postdiv = findPll0PostDiv();
        clkRate = clkRate / prediv;
        workRate = (float)clkRate * (float)findPll0MMult();
        workRate /= (float)postdiv;
    }
    return (uint32_t)workRate;
}