/* MSS_SPI_configure_master_mode() See "mss_spi.h" for details of how to use this function.  */
void MSS_SPI_configure_master_mode(volatile mss_spi_instance_t *this_spi, mss_spi_slave_t slave, mss_spi_protocol_mode_t protocol_mode, mss_spi_pclk_div_t clk_rate, uint8_t frame_bit_length)
/* MSS_SPI_configure_master_mode() See "mss_spi.h" for details of how to use this function.  */
void MSS_SPI_configure_master_mode(volatile mss_spi_instance_t *this_spi, mss_spi_slave_t slave, mss_spi_protocol_mode_t protocol_mode, mss_spi_pclk_div_t clk_rate, uint8_t frame_bit_length)
{
    ASSERT((this_spi == &g_mss_spi0) || (this_spi == &g_mss_spi1));
    ASSERT(slave < MSS_SPI_MAX_NB_OF_SLAVES);
    ASSERT(frame_bit_length <= 32);
    this_spi->hw_reg->CONTROL &= ~CTRL_ENABLE_MASK;
    this_spi->hw_reg->CONTROL |= CTRL_MASTER_MASK;
    this_spi->hw_reg->CONTROL |= CTRL_ENABLE_MASK;
    if(slave < MSS_SPI_MAX_NB_OF_SLAVES)     
    {
        this_spi->slaves_cfg[slave].ctrl_reg = MASTER_MODE_MASK |
                                               BIGFIFO_MASK |
                                               (uint32_t)protocol_mode | 
                                               ((uint32_t)1 << TXRXDFCOUNT_SHIFT);
        this_spi->slaves_cfg[slave].txrxdf_size_reg = frame_bit_length;
        this_spi->slaves_cfg[slave].clk_gen = (uint8_t)clk_rate;
    }
}