/* It may also be possible to leave the 66MHz clock on and readjust the timing parameters.  */
static void pdc_old_enable_66MHz_clock(ide_hwif_t *hwif)
/* It may also be possible to leave the 66MHz clock on and readjust the timing parameters.  */
static void pdc_old_enable_66MHz_clock(ide_hwif_t *hwif)
{
	unsigned long clock_reg = hwif->extra_base + 0x01;
	u8 clock = inb(clock_reg);
	outb(clock | (hwif->channel ? 0x08 : 0x02), clock_reg);
}