/* clkout_nr: clock output number mask_regX: preserve or zero MMCM register X bits by selecting 1 or 0 on desired specific mask positions bitset_regX: set those bits in MMCM register X which are 1 in bitset  */
static int litex_clk_set_clock(uint8_t clkout_nr, uint16_t mask_reg1, uint16_t bitset_reg1, uint16_t mask_reg2, uint16_t bitset_reg2)
/* clkout_nr: clock output number mask_regX: preserve or zero MMCM register X bits by selecting 1 or 0 on desired specific mask positions bitset_regX: set those bits in MMCM register X which are 1 in bitset  */
static int litex_clk_set_clock(uint8_t clkout_nr, uint16_t mask_reg1, uint16_t bitset_reg1, uint16_t mask_reg2, uint16_t bitset_reg2)
{
	struct litex_clk_regs_addr drp_addr = litex_clk_regs_addr_init();
	int ret;
	if (!(mask_reg2 == FULL_REG_16 && bitset_reg2 == ZERO_REG)) {
		ret = litex_clk_change_value(mask_reg2, bitset_reg2,
					     drp_addr.clkout[clkout_nr].reg2);
		if (ret != 0) {
			return ret;
		}
	}
	if (!(mask_reg1 == FULL_REG_16 && bitset_reg1 == ZERO_REG)) {
		ret = litex_clk_change_value(mask_reg1, bitset_reg1,
					     drp_addr.clkout[clkout_nr].reg1);
		if (ret != 0) {
			return ret;
		}
	}
	return 0;
}