/* Configures the PLL clock source and DM DN factor. This function must be used only when the PLL is disabled.  */
void RCC_PLLDMDNConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLDN, uint32_t RCC_PLLDP, uint32_t RCC_PLLDM)
/* Configures the PLL clock source and DM DN factor. This function must be used only when the PLL is disabled.  */
void RCC_PLLDMDNConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLDN, uint32_t RCC_PLLDP, uint32_t RCC_PLLDM)
{
  uint32_t tmpreg0 = 0;
  assert_param(IS_RCC_PLL_SOURCE(RCC_PLLSource));
  assert_param(IS_RCC_PLL_MUL(RCC_PLLMul));
    if(RCC_PLLSource == 0)
    {
            tmpreg0 &= ~(1<<22);
    }
    else
    {
            TK499_PLL_FACTOR |= 0x10000;
            tmpreg0 |= (1<<22);
    }
  RCC_PLLDN &= 0x7f;
    RCC_PLLDP &= 0x3;
    RCC_PLLDM &= 0xf;
  tmpreg0 |= (u32)((u32)(RCC_PLLDN<<6))|((u32)(RCC_PLLDP<<4))|((u32)RCC_PLLDM);
  RCC->PLLCFGR = tmpreg0;
}