/* For example, a divider value of 1 results in an EPI clock rate of half the system clock, value of 2 or 3 yields one quarter of the system clock and a value of 4 results in one sixth of the system clock rate. */
void EPIDividerCSSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32Divider)
/* For example, a divider value of 1 results in an EPI clock rate of half the system clock, value of 2 or 3 yields one quarter of the system clock and a value of 4 results in one sixth of the system clock rate. */
void EPIDividerCSSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32Divider)
{
    uint32_t ui32Reg;
    ASSERT(ui32Base == EPI0_BASE);
    ASSERT(ui32CS < 4);
    if (ui32CS < 2)
    {
        ui32Reg = HWREG(ui32Base + EPI_O_BAUD) & ~(0xffff << (16 * ui32CS));
        ui32Reg |= ((ui32Divider & 0xffff) << (16 * ui32CS));
        HWREG(ui32Base + EPI_O_BAUD) = ui32Reg;
    }
    else
    {
        ui32Reg = (HWREG(ui32Base + EPI_O_BAUD2) &
                   ~(0xffff << (16 * (ui32CS - 2))));
        ui32Reg |= ((ui32Divider & 0xffff) << (16 * (ui32CS - 2)));
        HWREG(ui32Base + EPI_O_BAUD2) = ui32Reg;
    }
}