/* U: unsigned when set size: encoded in imm5 (see ARM ARM LowestSetBit())  */
static void handle_simd_umov_smov(DisasContext *s, int is_q, int is_signed, int rn, int rd, int imm5)
/* U: unsigned when set size: encoded in imm5 (see ARM ARM LowestSetBit())  */
static void handle_simd_umov_smov(DisasContext *s, int is_q, int is_signed, int rn, int rd, int imm5)
{
    int size = ctz32(imm5);
    int element;
    TCGv_i64 tcg_rd;
    if (is_signed) {
        if (size > 2 || (size == 2 && !is_q)) {
            unallocated_encoding(s);
            return;
        }
    } else {
        if (size > 3
            || (size < 3 && is_q)
            || (size == 3 && !is_q)) {
            unallocated_encoding(s);
            return;
        }
    }
    if (!fp_access_check(s)) {
        return;
    }
    element = extract32(imm5, 1+size, 4);
    tcg_rd = cpu_reg(s, rd);
    read_vec_element(s, tcg_rd, rn, element, size | (is_signed ? MO_SIGN : 0));
    if (is_signed && !is_q) {
        tcg_gen_ext32u_i64(tcg_rd, tcg_rd);
    }
}