/* Change Logs: Date Author Notes  quanzhao the first version  */
rt_inline rt_uint32_t rt_cpu_icache_line_size(void)
/* Change Logs: Date Author Notes  quanzhao the first version  */
rt_inline rt_uint32_t rt_cpu_icache_line_size(void)
{
    rt_uint32_t ctr;
    asm volatile ("mrc p15, 0, %0, c0, c0, 1" : "=r"(ctr));
    return 4 << (ctr & 0xF);
}