/* configure the system clock to 72M by PLL which selects IRC8M/2 as its clock source  */
static void system_clock_72m_irc8m(void)
/* configure the system clock to 72M by PLL which selects IRC8M/2 as its clock source  */
static void system_clock_72m_irc8m(void)
{
    RCU_CFG0 |= RCU_AHB_CKSYS_DIV1;
    RCU_CFG0 |= RCU_APB2_CKAHB_DIV1;
    RCU_CFG0 |= RCU_APB1_CKAHB_DIV1;
    RCU_CFG0 &= ~(RCU_CFG0_PLLSEL | RCU_CFG0_PLLMF);
    RCU_CFG0 |= (RCU_PLLSRC_IRC8M_DIV2 | RCU_PLL_MUL18);
    RCU_CTL0 |= RCU_CTL0_PLLEN;
    while(0 == (RCU_CTL0 & RCU_CTL0_PLLSTB));
    RCU_CFG0 &= ~RCU_CFG0_SCS;
    RCU_CFG0 |= RCU_CKSYSSRC_PLL;
    while(0 == (RCU_CFG0 & RCU_SCSS_PLL));
}