/* Latch interrupt request on INT1_SRC (31h), with INT1_SRC(31h) register cleared by reading INT1_SRC (31h) itself..  */
int32_t lis2dh12_int1_pin_notification_mode_get(stmdev_ctx_t *ctx, lis2dh12_lir_int1_t *val)
/* Latch interrupt request on INT1_SRC (31h), with INT1_SRC(31h) register cleared by reading INT1_SRC (31h) itself..  */
int32_t lis2dh12_int1_pin_notification_mode_get(stmdev_ctx_t *ctx, lis2dh12_lir_int1_t *val)
{
  lis2dh12_ctrl_reg5_t ctrl_reg5;
  int32_t ret;
  ret = lis2dh12_read_reg(ctx, LIS2DH12_CTRL_REG5,
                          (uint8_t *)&ctrl_reg5, 1);
  switch (ctrl_reg5.lir_int1)
  {
    case LIS2DH12_INT1_PULSED:
      *val = LIS2DH12_INT1_PULSED;
      break;
    case LIS2DH12_INT1_LATCHED:
      *val = LIS2DH12_INT1_LATCHED;
      break;
    default:
      *val = LIS2DH12_INT1_PULSED;
      break;
  }
  return ret;
}