/* ECR is reset in a sane state (interrupts and DMA disabled), and placed in mode @mode. Go through PS2 mode if needed.  */
static void parport_ip32_set_mode(struct parport *p, unsigned int mode)
/* ECR is reset in a sane state (interrupts and DMA disabled), and placed in mode @mode. Go through PS2 mode if needed.  */
static void parport_ip32_set_mode(struct parport *p, unsigned int mode)
{
	unsigned int omode;
	mode &= ECR_MODE_MASK;
	omode = parport_ip32_read_econtrol(p) & ECR_MODE_MASK;
	if (!(mode == ECR_MODE_SPP || mode == ECR_MODE_PS2
	      || omode == ECR_MODE_SPP || omode == ECR_MODE_PS2)) {
		unsigned int ecr = ECR_MODE_PS2 | ECR_nERRINTR | ECR_SERVINTR;
		parport_ip32_write_econtrol(p, ecr);
	}
	parport_ip32_write_econtrol(p, mode | ECR_nERRINTR | ECR_SERVINTR);
}