/* Given a struct clk of a rate-selectable clksel clock, and a clock divisor, find the corresponding register field value. The return register value is the value before left-shifting. Returns ~0 on error  */
u32 omap2_divisor_to_clksel(struct clk *clk, u32 div)
/* Given a struct clk of a rate-selectable clksel clock, and a clock divisor, find the corresponding register field value. The return register value is the value before left-shifting. Returns ~0 on error  */
u32 omap2_divisor_to_clksel(struct clk *clk, u32 div)
{
	const struct clksel *clks;
	const struct clksel_rate *clkr;
	WARN_ON(div == 0);
	clks = omap2_get_clksel_by_parent(clk, clk->parent);
	if (!clks)
		return ~0;
	for (clkr = clks->rates; clkr->div; clkr++) {
		if ((clkr->flags & cpu_mask) && (clkr->div == div))
			break;
	}
	if (!clkr->div) {
		printk(KERN_ERR "clock: Could not find divisor %d for "
		       "clock %s parent %s\n", div, clk->name,
		       clk->parent->name);
		return ~0;
	}
	return clkr->val;
}