/* Disables GPIO pins and USART2 from FPGA register access.  */
static void spiDisable(void)
/* Disables GPIO pins and USART2 from FPGA register access.  */
static void spiDisable(void)
{
  USART_TypeDef *usart = USART2;
  GPIO_TypeDef  *gpio  = GPIO;
  usart->CTRL  = _USART_CTRL_RESETVALUE;
  usart->ROUTE = _USART_ROUTE_RESETVALUE;
  usart->CMD   = USART_CMD_MASTERDIS | USART_CMD_TXDIS | USART_CMD_RXDIS;
  gpio->P[2].MODEH &= ~(_GPIO_P_MODEH_MODE13_MASK);
  gpio->P[2].MODEL &= ~(_GPIO_P_MODEL_MODE2_MASK |
                        _GPIO_P_MODEL_MODE3_MASK |
                        _GPIO_P_MODEL_MODE4_MASK |
                        _GPIO_P_MODEL_MODE5_MASK);
}