/* Check the status of the Tx buffer of the specified SPI port.  */
xtBoolean SPIIsTxFull(unsigned long ulBase)
/* Check the status of the Tx buffer of the specified SPI port.  */
xtBoolean SPIIsTxFull(unsigned long ulBase)
{
    xASSERT((ulBase == SPI0_BASE) || (ulBase == SPI1_BASE)||
            (ulBase == SPI2_BASE) || (ulBase == SPI3_BASE));
    return ((xHWREG(ulBase + SPI_CNTRL) & SPI_CNTRL_TX_FULL)? xtrue : xfalse);
}