/* Return the value of the trigger type register for the IRQ. 
In the event edge irq is enable this will return the trigger value of the irq. In the event edge irq is not supported this routine will return 0 */
static uint32_t __maybe_unused riscv_plic_irq_trig_val(const struct device *dev, uint32_t local_irq)
/* Return the value of the trigger type register for the IRQ. 
In the event edge irq is enable this will return the trigger value of the irq. In the event edge irq is not supported this routine will return 0 */
static uint32_t __maybe_unused riscv_plic_irq_trig_val(const struct device *dev, uint32_t local_irq)
{
	if (!IS_ENABLED(PLIC_SUPPORTS_TRIG_TYPE)) {
		return PLIC_TRIG_LEVEL;
	}
	const struct plic_config *config = dev->config;
	mem_addr_t trig_addr = config->trig + local_irq_to_reg_offset(local_irq);
	uint32_t offset = local_irq * PLIC_REG_TRIG_TYPE_WIDTH;
	return sys_read32(trig_addr) & GENMASK(offset + PLIC_REG_TRIG_TYPE_WIDTH - 1, offset);
}