/* Set up the control registers for the SPI clock spi_no - SPI (0) or HSPI (1) prediv - predivider value (actual division value) cntdiv - postdivider value (actual division value) Set either divider to 0 to disable all division (80MHz sysclock)  */
void spi_clock(uint8_t spi_no, uint16_t prediv, uint8_t cntdiv)
/* Set up the control registers for the SPI clock spi_no - SPI (0) or HSPI (1) prediv - predivider value (actual division value) cntdiv - postdivider value (actual division value) Set either divider to 0 to disable all division (80MHz sysclock)  */
void spi_clock(uint8_t spi_no, uint16_t prediv, uint8_t cntdiv)
{
        WRITE_PERI_REG(SPI_CLOCK(spi_no), SPI_CLK_EQU_SYSCLK);
    } else {
        WRITE_PERI_REG(SPI_CLOCK(spi_no),
            (((prediv - 1) & SPI_CLKDIV_PRE) << SPI_CLKDIV_PRE_S) |
            (((cntdiv - 1) & SPI_CLKCNT_N) << SPI_CLKCNT_N_S) |
            (((cntdiv >> 1) & SPI_CLKCNT_H) << SPI_CLKCNT_H_S) |
            ((0 & SPI_CLKCNT_L) << SPI_CLKCNT_L_S)
            );
    }
}