/* Disable the irq on the all cores for chips that have the EN*_W1{S,C} registers.  */
static void octeon_irq_ciu1_disable_all_v2(unsigned int irq)
/* Disable the irq on the all cores for chips that have the EN*_W1{S,C} registers.  */
static void octeon_irq_ciu1_disable_all_v2(unsigned int irq)
{
	u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0);
	int index;
	int cpu;
	for_each_online_cpu(cpu) {
		index = octeon_coreid_for_cpu(cpu) * 2 + 1;
		cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask);
	}
}