/* NOTE: for mode 0,1 and 2 drives 8-bit IDE command control registers are used for mode 3 and 4 drives 8 and 16-bit timings are the same  */
static void compute_clocks(u8 pio, pio_clocks_t *p_pclk)
/* NOTE: for mode 0,1 and 2 drives 8-bit IDE command control registers are used for mode 3 and 4 drives 8 and 16-bit timings are the same  */
static void compute_clocks(u8 pio, pio_clocks_t *p_pclk)
{
	struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
	int clk1, clk2;
	int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
	p_pclk->address_time = (u8)calc_clk(t->setup, bus_speed);
	clk1 = calc_clk(t->active, bus_speed);
	clk2 = t->cycle - t->active - t->setup;
	clk2 = calc_clk(clk2, bus_speed);
	clk1 = (clk1<<4)|clk2;
	p_pclk->time_16r = (u8)clk1;
	p_pclk->time_16w = (u8)clk1;
	p_pclk->time_8 = (u8)clk1;
}