/* There are three register spaces: two per-channel ones and a shared one. We have to define accessors appropriately. All registers are 64-bit and all but the Baud Rate Clock registers only define 8 least significant bits. There is also a workaround to take into account. Raw accessors use the full register width, but cooked ones truncate it intentionally so that the rest of the driver does not care.  */
static u64 __read_sbdchn(struct sbd_port *sport, int reg)
/* There are three register spaces: two per-channel ones and a shared one. We have to define accessors appropriately. All registers are 64-bit and all but the Baud Rate Clock registers only define 8 least significant bits. There is also a workaround to take into account. Raw accessors use the full register width, but cooked ones truncate it intentionally so that the rest of the driver does not care.  */
static u64 __read_sbdchn(struct sbd_port *sport, int reg)
{
	void __iomem *csr = sport->port.membase + reg;
	return __raw_readq(csr);
}