/* Returns the CORE_CLK rate. CORE_CLK can have one of three rate sources on OMAP2xxx: the DPLL CLKOUT rate, DPLL CLKOUTX2, or 32KHz (the latter is unusual). This currently should be called with struct clk *dpll_ck, which is a composite clock of dpll_ck and core_ck.  */
unsigned long omap2xxx_clk_get_core_rate(struct clk *clk)
/* Returns the CORE_CLK rate. CORE_CLK can have one of three rate sources on OMAP2xxx: the DPLL CLKOUT rate, DPLL CLKOUTX2, or 32KHz (the latter is unusual). This currently should be called with struct clk *dpll_ck, which is a composite clock of dpll_ck and core_ck.  */
unsigned long omap2xxx_clk_get_core_rate(struct clk *clk)
{
	long long core_clk;
	u32 v;
	core_clk = omap2_get_dpll_rate(clk);
	v = cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
	v &= OMAP24XX_CORE_CLK_SRC_MASK;
	if (v == CORE_CLK_SRC_32K)
		core_clk = 32768;
	else
		core_clk *= v;
	return core_clk;
}