/* This function gets the channel enable bits status from the ADC Channel Selection Sequencer Registers. */
u32 XAdcPs_GetSeqChEnables(XAdcPs *InstancePtr)
/* This function gets the channel enable bits status from the ADC Channel Selection Sequencer Registers. */
u32 XAdcPs_GetSeqChEnables(XAdcPs *InstancePtr)
{
	u32 RegValEnable;
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	RegValEnable = XAdcPs_ReadInternalReg(InstancePtr,
				XADCPS_SEQ00_OFFSET) &
				XADCPS_SEQ00_CH_VALID_MASK;
	RegValEnable |= (XAdcPs_ReadInternalReg(InstancePtr,
				XADCPS_SEQ01_OFFSET) &
				XADCPS_SEQ01_CH_VALID_MASK) <<
				XADCPS_SEQ_CH_AUX_SHIFT;
	return RegValEnable;
}