/* Normally, the status interrupt is cleared by reading the controller status using  */
void CANIntClear(uint32_t ui32Base, uint32_t ui32IntClr)
/* Normally, the status interrupt is cleared by reading the controller status using  */
void CANIntClear(uint32_t ui32Base, uint32_t ui32IntClr)
{
    ASSERT(_CANBaseValid(ui32Base));
    ASSERT((ui32IntClr == CAN_INT_INTID_STATUS) ||
           ((ui32IntClr >= 1) && (ui32IntClr <= 32)));
    if(ui32IntClr == CAN_INT_INTID_STATUS)
    {
        HWREG(ui32Base + CAN_O_STS);
    }
    else
    {
        while(HWREG(ui32Base + CAN_O_IF1CRQ) & CAN_IF1CRQ_BUSY)
        {
        }
        HWREG(ui32Base + CAN_O_IF1CMSK) = CAN_IF1CMSK_CLRINTPND;
        HWREG(ui32Base + CAN_O_IF1CRQ) = ui32IntClr & CAN_IF1CRQ_MNUM_M;
        while(HWREG(ui32Base + CAN_O_IF1CRQ) & CAN_IF1CRQ_BUSY)
        {
        }
    }
}