/* Offsets are specified to support either contiguous or discontiguous memory transfers, or repeated access to a hardware register, as needed. When accessing hardware registers, both offsets are normally zero.  */
void edma3_set_dest_index(u32 base, unsigned slot, int bidx, int cidx)
/* Offsets are specified to support either contiguous or discontiguous memory transfers, or repeated access to a hardware register, as needed. When accessing hardware registers, both offsets are normally zero.  */
void edma3_set_dest_index(u32 base, unsigned slot, int bidx, int cidx)
{
	u32 src_dst_bidx;
	u32 src_dst_cidx;
	struct edma3_slot_layout *rg;
	rg = (struct edma3_slot_layout *)(base + EDMA3_SL_BASE(slot));
	src_dst_bidx = __raw_readl(&rg->src_dst_bidx);
	src_dst_cidx = __raw_readl(&rg->src_dst_cidx);
	__raw_writel((src_dst_bidx & 0x0000ffff) | (bidx << 16),
		     &rg->src_dst_bidx);
	__raw_writel((src_dst_cidx & 0x0000ffff) | (cidx << 16),
		     &rg->src_dst_cidx);
}