/* @hsotg: Programming view of DWC_otg controller @num: Tx FIFO to flush  */
void dwc2_flush_tx_fifo(struct dwc2_hsotg *hsotg, const int num)
/* @hsotg: Programming view of DWC_otg controller @num: Tx FIFO to flush  */
void dwc2_flush_tx_fifo(struct dwc2_hsotg *hsotg, const int num)
{
	u32 greset;
	int count = 0;
	dev_vdbg(hsotg->dev, "Flush Tx FIFO %d\n", num);
	greset = GRSTCTL_TXFFLSH;
	greset |= num << GRSTCTL_TXFNUM_SHIFT & GRSTCTL_TXFNUM_MASK;
	writel(greset, hsotg->regs + GRSTCTL);
	do {
		greset = readl(hsotg->regs + GRSTCTL);
		if (++count > 10000) {
			dev_warn(hsotg->dev,
				 "%s() HANG! GRSTCTL=%0x GNPTXSTS=0x%08x\n",
				 __func__, greset,
				 readl(hsotg->regs + GNPTXSTS));
			break;
		}
		udelay(1);
	} while (greset & GRSTCTL_TXFFLSH);
	udelay(1);
}