/* master send target length data use interrupt mode.  */
int32_t spi_master_write_stream(spi_t *obj, char *tx_buffer, uint32_t length)
/* master send target length data use interrupt mode.  */
int32_t spi_master_write_stream(spi_t *obj, char *tx_buffer, uint32_t length)
{
	uint8_t  spi_idx = obj->spi_idx &0x0F;
	PHAL_SSI_ADAPTOR ssi_adapter = &ssi_adapter_g[spi_idx];
	int32_t ret;
	if (obj->state & SPI_STATE_TX_BUSY) {
		DBG_PRINTF(MODULE_SPI, LEVEL_WARN, "spim int tx: state(0x%x) is not ready\r\n",
			obj->state);
		return HAL_BUSY;
	}
	obj->state |= SPI_STATE_TX_BUSY;
	if ((ret=ssi_int_write(ssi_adapter, (u8 *) tx_buffer, length)) != _TRUE) {
		obj->state &= ~SPI_STATE_TX_BUSY;
	}
	return (ret == _TRUE) ? HAL_OK : HAL_BUSY;
}