/* Slave Requests Master R/W/Exe Access to Shared SARAM. */
uint16_t IPCLiteReqMemAccess(uint32_t ulFlag, uint32_t ulMask, uint16_t ulMaster, uint32_t ulStatusFlag)
/* Slave Requests Master R/W/Exe Access to Shared SARAM. */
uint16_t IPCLiteReqMemAccess(uint32_t ulFlag, uint32_t ulMask, uint16_t ulMaster, uint32_t ulStatusFlag)
{
    uint16_t status;
    uint32_t GSxMSEL_REGaddress = (uint32_t)(&MemCfgRegs.GSxMSEL.all);
    if (ulMaster == IPC_GSX_CPU2_MASTER)
    {
        status =
            IPCLiteLtoRSetBits_Protected (ulFlag, GSxMSEL_REGaddress, ulMask,
                                          IPC_LENGTH_32_BITS,
                                          ulStatusFlag);
    }
    else if (ulMaster == IPC_GSX_CPU1_MASTER)
    {
        status =
            IPCLiteLtoRClearBits_Protected (ulFlag, GSxMSEL_REGaddress, ulMask,
                                            IPC_LENGTH_32_BITS,
                                            ulStatusFlag);
    }
    return status;
}