/* Absolute Wrist Tilt latency register (r/w). Absolute wrist tilt latency parameters. 1 LSB = 40 ms. Default value: 0Fh (600 ms)..  */
int32_t lsm6dsl_tilt_latency_get(stmdev_ctx_t *ctx, uint8_t *buff)
/* Absolute Wrist Tilt latency register (r/w). Absolute wrist tilt latency parameters. 1 LSB = 40 ms. Default value: 0Fh (600 ms)..  */
int32_t lsm6dsl_tilt_latency_get(stmdev_ctx_t *ctx, uint8_t *buff)
{
  int32_t ret;
  ret = lsm6dsl_mem_bank_set(ctx, LSM6DSL_BANK_B);
  if(ret == 0){
    ret = lsm6dsl_read_reg(ctx, LSM6DSL_A_WRIST_TILT_LAT, buff, 1);
    if(ret == 0){
      ret = lsm6dsl_mem_bank_set(ctx, LSM6DSL_USER_BANK);
    }
  }
  return ret;
}