/* Set a default value for the TMRA initialization structure.  */
int32_t TMRA_StructInit(stc_tmra_init_t *pstcTmraInit)
/* Set a default value for the TMRA initialization structure.  */
int32_t TMRA_StructInit(stc_tmra_init_t *pstcTmraInit)
{
    int32_t i32Ret = LL_ERR_INVD_PARAM;
    if (pstcTmraInit != NULL) {
        pstcTmraInit->u8CountSrc                = TMRA_CNT_SRC_SW;
        pstcTmraInit->sw_count.u8ClockDiv       = TMRA_CLK_DIV1;
        pstcTmraInit->sw_count.u8CountMode      = TMRA_MD_SAWTOOTH;
        pstcTmraInit->sw_count.u8CountDir       = TMRA_DIR_UP;
        pstcTmraInit->hw_count.u16CountUpCond   = TMRA_CNT_UP_COND_INVD;
        pstcTmraInit->hw_count.u16CountDownCond = TMRA_CNT_DOWN_COND_INVD;
        pstcTmraInit->u32PeriodValue            = (TMRA_REG_TYPE)0xFFFFFFFFUL;
        i32Ret = LL_OK;
    }
    return i32Ret;
}