/* Enables or disables TIMx peripheral Preload register on ARR.  */
void RTIM_ARRPreloadConfig(RTIM_TypeDef *TIMx, u32 NewState)
/* Enables or disables TIMx peripheral Preload register on ARR.  */
void RTIM_ARRPreloadConfig(RTIM_TypeDef *TIMx, u32 NewState)
{
	assert_param(IS_TIM_ALL_TIM(TIMx));
	if (NewState != DISABLE) {
		TIMx->CR |= TIM_CR_ARPE;
	} else {
		TIMx->CR &= ~TIM_CR_ARPE;
	}
}