/* Enable or Disable Host config 0x6 to reset SDU sdu_rst_ sd_rst_.  */
BL_Err_Type GLB_Config_SDIO_Host_Reset_SDU(uint8_t enable)
/* Enable or Disable Host config 0x6 to reset SDU sdu_rst_ sd_rst_.  */
BL_Err_Type GLB_Config_SDIO_Host_Reset_SDU(uint8_t enable)
{
    uint32_t tmpVal = 0;
    tmpVal = BL_RD_REG(GLB_BASE, GLB_SDIO_CFG0);
    if (enable) {
        tmpVal = BL_CLR_REG_BIT(tmpVal, GLB_REG_SDU_RST_SD_DIS);
        tmpVal = BL_CLR_REG_BIT(tmpVal, GLB_REG_SD_RST_SD_DIS);
    } else {
        tmpVal = BL_SET_REG_BIT(tmpVal, GLB_REG_SDU_RST_SD_DIS);
        tmpVal = BL_SET_REG_BIT(tmpVal, GLB_REG_SD_RST_SD_DIS);
    }
    BL_WR_REG(GLB_BASE, GLB_SDIO_CFG0, tmpVal);
    return SUCCESS;
}