/* Fuse bank 1 row 9 is "reserved for future use" and therefore available for customer use. The APF27 board revision 1 uses the bit 0 to permanently store the presence of the second RAM chip 0: AFP27 with 1 RAM of 64 MiB 1: AFP27 with 2 RAM chips of 64 MiB each (128MB)  */
static int get_num_ram_bank(void)
/* Fuse bank 1 row 9 is "reserved for future use" and therefore available for customer use. The APF27 board revision 1 uses the bit 0 to permanently store the presence of the second RAM chip 0: AFP27 with 1 RAM of 64 MiB 1: AFP27 with 2 RAM chips of 64 MiB each (128MB)  */
static int get_num_ram_bank(void)
{
	struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
	int nr_dram_banks = 1;
	if ((get_board_rev() > 0) && (CONFIG_NR_DRAM_BANKS > 1))
		nr_dram_banks += readl(&iim->bank[1].fuse_regs[9]) & 0x01;
	else
		nr_dram_banks = CONFIG_NR_DRAM_POPULATED;
	return nr_dram_banks;
}