/* Autoselect a master bus to use for the transfer. Slave will be the chosen as victim in case src & dest are not similarly aligned. i.e. If after aligning masters address with width requirements of transfer (by sending few byte by byte data), slave is still not aligned, then its width will be reduced to BYTE. */
static void pl08x_choose_master_bus(struct pl08x_lli_build_data *bd, struct pl08x_bus_data **mbus, struct pl08x_bus_data **sbus, u32 cctl)
/* Autoselect a master bus to use for the transfer. Slave will be the chosen as victim in case src & dest are not similarly aligned. i.e. If after aligning masters address with width requirements of transfer (by sending few byte by byte data), slave is still not aligned, then its width will be reduced to BYTE. */
static void pl08x_choose_master_bus(struct pl08x_lli_build_data *bd, struct pl08x_bus_data **mbus, struct pl08x_bus_data **sbus, u32 cctl)
{
	if (!(cctl & PL080_CONTROL_DST_INCR)) {
		*mbus = &bd->dstbus;
		*sbus = &bd->srcbus;
	} else if (!(cctl & PL080_CONTROL_SRC_INCR)) {
		*mbus = &bd->srcbus;
		*sbus = &bd->dstbus;
	} else {
		if (bd->dstbus.buswidth >= bd->srcbus.buswidth) {
			*mbus = &bd->dstbus;
			*sbus = &bd->srcbus;
		} else {
			*mbus = &bd->srcbus;
			*sbus = &bd->dstbus;
		}
	}
}