/* Program QMSPI frequency. MEC1501 base frequency is 48MHz. QMSPI frequency divider field in the mode register is defined as: 0=maximum divider of 256. Values 1 through 255 divide 48MHz by that value.  */
static void qmspi_set_frequency(QMSPI_Type *regs, uint32_t freq_hz)
/* Program QMSPI frequency. MEC1501 base frequency is 48MHz. QMSPI frequency divider field in the mode register is defined as: 0=maximum divider of 256. Values 1 through 255 divide 48MHz by that value.  */
static void qmspi_set_frequency(QMSPI_Type *regs, uint32_t freq_hz)
{
	uint32_t div, qmode;
	if (freq_hz == 0) {
		div = 0;
	} else {
		div = MCHP_QMSPI_INPUT_CLOCK_FREQ_HZ / freq_hz;
		if (div == 0) {
			div = 1;
		} else if (div > 0xffu) {
			div = 0u;
		}
	}
	qmode = regs->MODE & ~(MCHP_QMSPI_M_FDIV_MASK);
	qmode |= (div << MCHP_QMSPI_M_FDIV_POS) & MCHP_QMSPI_M_FDIV_MASK;
	regs->MODE = qmode;
}