/* When @lch is a channel, any active transfer is paused and all pending hardware events are cleared. The current transfer may not be resumed, and the channel's Parameter RAM should be reinitialized before being reused.  */
void edma_stop(unsigned channel)
/* When @lch is a channel, any active transfer is paused and all pending hardware events are cleared. The current transfer may not be resumed, and the channel's Parameter RAM should be reinitialized before being reused.  */
void edma_stop(unsigned channel)
{
    unsigned ctlr;
    ctlr = EDMA_CTLR(channel);
    channel = EDMA_CHAN_SLOT(channel);
    if (channel < edma_cc[ctlr]->num_channels) {
        int j = channel >> 5;
        unsigned int mask = BIT(channel & 0x1f);
        edma_shadow0_write_array(ctlr, SH_EECR, j, mask);
        edma_shadow0_write_array(ctlr, SH_ECR, j, mask);
        edma_shadow0_write_array(ctlr, SH_SECR, j, mask);
        edma_write_array(ctlr, EDMA_EMCR, j, mask);
        edma_dbg("EDMA: EER%d %08x\n", j,
                edma_shadow0_read_array(ctlr, SH_EER, j));
    }
}