/* Enable ECC logic and reset syndrome/parity bits previously calculated Syndrome/parity bits is cleared by setting the ECCEN bit to 0  */
static void stm32_fmc2_hwctl(struct mtd_info *mtd, int mode)
/* Enable ECC logic and reset syndrome/parity bits previously calculated Syndrome/parity bits is cleared by setting the ECCEN bit to 0  */
static void stm32_fmc2_hwctl(struct mtd_info *mtd, int mode)
{
	struct nand_chip *chip = mtd_to_nand(mtd);
	struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller);
	stm32_fmc2_set_ecc(fmc2, false);
	if (chip->ecc.strength != FMC2_ECC_HAM) {
		u32 pcr = readl(fmc2->io_base + FMC2_PCR);
		if (mode == NAND_ECC_WRITE)
			pcr |= FMC2_PCR_WEN;
		else
			pcr &= ~FMC2_PCR_WEN;
		writel(pcr, fmc2->io_base + FMC2_PCR);
		stm32_fmc2_clear_bch_irq(fmc2);
	}
	stm32_fmc2_set_ecc(fmc2, true);
}