/* Setup the USB PLL to 480 MHz If enable equals 0 then disable PLL Only clock sources IRC and XTAL are valid Mode1a only: Normal operating mode without post- and pre-divider 
Set PLL USB (PL550M) */
void SetPLLUSB(CLKSRC_Type src_clk, uint8_t enable)
/* Setup the USB PLL to 480 MHz If enable equals 0 then disable PLL Only clock sources IRC and XTAL are valid Mode1a only: Normal operating mode without post- and pre-divider 
Set PLL USB (PL550M) */
void SetPLLUSB(CLKSRC_Type src_clk, uint8_t enable)
{
	if(!enable)
	{
		LPC_CGU->PLL0USB_CTRL |= PD_ENABLE;
	}
	else
	{
		LPC_CGU->PLL0USB_CTRL |= PD_ENABLE;
		LPC_CGU->PLL0USB_NP_DIV = (98<<0) | (514<<12);
		LPC_CGU->PLL0USB_MDIV = (0xB<<17)|(0x10<<22)|(0<<28)|(0x7FFA<<0); 		LPC_CGU->PLL0USB_CTRL =(SRC_XTAL<<24) | (0x3<<2) | CLKEN;
		LPC_CGU->BASE_USB0_CLK = (0<<0) | (1<<11) | (SRC_PL550M_0<<24);		while((LPC_CGU->PLL0USB_STAT&1) == 0x0);
	}
	PL550Frequency = 480000000UL;
}