/* Perform a calibration cycle on the HPT3xN DPLL. Returns 1 if this succeeds  */
static int hpt3xn_calibrate_dpll(struct pci_dev *dev)
/* Perform a calibration cycle on the HPT3xN DPLL. Returns 1 if this succeeds  */
static int hpt3xn_calibrate_dpll(struct pci_dev *dev)
{
	u8 reg5b;
	u32 reg5c;
	int tries;
	for(tries = 0; tries < 0x5000; tries++) {
		udelay(50);
		pci_read_config_byte(dev, 0x5b, &reg5b);
		if (reg5b & 0x80) {
			for(tries = 0; tries < 0x1000; tries ++) {
				pci_read_config_byte(dev, 0x5b, &reg5b);
				if ((reg5b & 0x80) == 0)
					return 0;
			}
			pci_read_config_dword(dev, 0x5c, &reg5c);
			pci_write_config_dword(dev, 0x5c, reg5c & ~ 0x100);
			return 1;
		}
	}
	return 0;
}