/* Set the USCI_SPI bus clock. Only available in Master mode.  */
uint32_t USPI_SetBusClock(USPI_T *uspi, uint32_t u32BusClock)
/* Set the USCI_SPI bus clock. Only available in Master mode.  */
uint32_t USPI_SetBusClock(USPI_T *uspi, uint32_t u32BusClock)
{
    uint32_t u32ClkDiv;
    uint32_t u32Pclk;
    if(uspi == USPI0)
    {
        u32Pclk = CLK_GetPCLK0Freq();
    }
    else
    {
        u32Pclk = CLK_GetPCLK1Freq();
    }
    u32ClkDiv = (uint32_t) ((((((u32Pclk/2ul)*10ul)/(u32BusClock))+5ul)/10ul)-1ul);
    uspi->BRGEN &= ~USPI_BRGEN_CLKDIV_Msk;
    uspi->BRGEN |=  (u32ClkDiv << USPI_BRGEN_CLKDIV_Pos);
    return ( u32Pclk / ((u32ClkDiv+1ul)<<1) );
}