/* Routine: get_board_mem_timings Description: If we use SPL then there is no x-loader nor config header so we have to setup the DDR timings ourself on the first bank. This provides the timing values back to the function that configures the memory. We have either one or two banks of 128MB DDR.  */
void get_board_mem_timings(struct board_sdrc_timings *timings)
/* Routine: get_board_mem_timings Description: If we use SPL then there is no x-loader nor config header so we have to setup the DDR timings ourself on the first bank. This provides the timing values back to the function that configures the memory. We have either one or two banks of 128MB DDR.  */
void get_board_mem_timings(struct board_sdrc_timings *timings)
{
	timings->mcfg = MICRON_V_MCFG_165(128 << 20);
	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
	timings->ctrla = MICRON_V_ACTIMA_165;
	timings->ctrlb = MICRON_V_ACTIMB_165;
	timings->mr = MICRON_V_MR_165;
}