/* Configure USART operating in synchronous mode to use a given baudrate (or as close as possible to specified baudrate). 
Fractional clock division is suppressed, although the HW design allows it. It could cause half clock cycles to exceed specified limit, and thus potentially violate specifications for the slave device. In some special situations fractional clock division may be useful even in synchronous mode, but in those cases it must be directly adjusted, possibly assisted by  */
void USART_BaudrateSyncSet(USART_TypeDef *usart, uint32_t refFreq, uint32_t baudrate)
/* Configure USART operating in synchronous mode to use a given baudrate (or as close as possible to specified baudrate). 
Fractional clock division is suppressed, although the HW design allows it. It could cause half clock cycles to exceed specified limit, and thus potentially violate specifications for the slave device. In some special situations fractional clock division may be useful even in synchronous mode, but in those cases it must be directly adjusted, possibly assisted by  */
void USART_BaudrateSyncSet(USART_TypeDef *usart, uint32_t refFreq, uint32_t baudrate)
{
  uint32_t clkdiv;
  EFM_ASSERT(baudrate);
  if (!refFreq)
  {
    refFreq = CMU_ClockFreqGet(cmuClock_HFPER);
  }
  clkdiv  = 2 * refFreq;
  clkdiv /= baudrate;
  clkdiv -= 4;
  clkdiv *= 64;
  clkdiv       += 0xc0;
  clkdiv       &= 0xffffff00;
  clkdiv       &= _USART_CLKDIV_DIV_MASK;
  usart->CLKDIV = clkdiv;
}