/* param base USART peripheral base address. param handle USART handle pointer. param xfer USART transfer structure. See #usart_transfer_t. retval kStatus_Success Successfully start the data transmission. retval kStatus_USART_TxBusy Previous transmission still not finished, data not all written to TX register yet. retval kStatus_InvalidArgument Invalid argument.  */
status_t USART_TransferSendNonBlocking(USART_Type *base, usart_handle_t *handle, usart_transfer_t *xfer)
/* param base USART peripheral base address. param handle USART handle pointer. param xfer USART transfer structure. See #usart_transfer_t. retval kStatus_Success Successfully start the data transmission. retval kStatus_USART_TxBusy Previous transmission still not finished, data not all written to TX register yet. retval kStatus_InvalidArgument Invalid argument.  */
status_t USART_TransferSendNonBlocking(USART_Type *base, usart_handle_t *handle, usart_transfer_t *xfer)
{
    assert(!((NULL == base) || (NULL == handle) || (NULL == xfer)));
    if ((NULL == base) || (NULL == handle) || (NULL == xfer))
    {
        return kStatus_InvalidArgument;
    }
    assert(!((0U == xfer->dataSize) || (NULL == xfer->data)));
    if ((0U == xfer->dataSize) || (NULL == xfer->data))
    {
        return kStatus_InvalidArgument;
    }
    if ((uint8_t)kUSART_TxBusy == handle->txState)
    {
        return kStatus_USART_TxBusy;
    }
    else
    {
        uint32_t regPrimask   = DisableGlobalIRQ();
        handle->txData        = xfer->data;
        handle->txDataSize    = xfer->dataSize;
        handle->txDataSizeAll = xfer->dataSize;
        handle->txState       = (uint8_t)kUSART_TxBusy;
        base->FIFOINTENSET = USART_FIFOINTENSET_TXLVL_MASK;
        EnableGlobalIRQ(regPrimask);
    }
    return kStatus_Success;
}