/* Check the status of the Tx buffer of the specified SPI port.  */
xtBoolean xSPIIsTxEmpty(unsigned long ulBase)
/* Check the status of the Tx buffer of the specified SPI port.  */
xtBoolean xSPIIsTxEmpty(unsigned long ulBase)
{
    xASSERT((ulBase == SPI0_BASE) || (ulBase == SPI1_BASE)||
            (ulBase == SPI2_BASE)||(ulBase == SPI3_BASE) );
    return ((xHWREG(ulBase + SPI_STATUS) & SPI_STATUS_TX_EMPTY)? xtrue : xfalse);
}