/* get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of the specified bus in HZ.  */
static ulong get_PLLCLK(int pllreg)
/* get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of the specified bus in HZ.  */
static ulong get_PLLCLK(int pllreg)
{
	ulong r, m, p, s;
	switch (pllreg) {
	case APLL:
		r = APLL_CON_REG;
		break;
	case MPLL:
		r = MPLL_CON_REG;
		break;
	case EPLL:
		r = EPLL_CON0_REG;
		break;
	default:
		hang();
	}
	m = (r >> 16) & 0x3ff;
	p = (r >> 8) & 0x3f;
	s = r & 0x7;
	return m * (CONFIG_SYS_CLK_FREQ / (p * (1 << s)));
}