/* ASUS P55T2P4D with CMD646 chipset revision 0x01 requires the old event order for DMA transfers.  */
static int cmd646_1_dma_end(ide_drive_t *drive)
/* ASUS P55T2P4D with CMD646 chipset revision 0x01 requires the old event order for DMA transfers.  */
static int cmd646_1_dma_end(ide_drive_t *drive)
{
	ide_hwif_t *hwif = drive->hwif;
	u8 dma_stat = 0, dma_cmd = 0;
	dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
	dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
	outb(dma_cmd & ~1, hwif->dma_base + ATA_DMA_CMD);
	outb(dma_stat | 6, hwif->dma_base + ATA_DMA_STATUS);
	return (dma_stat & 7) != 4;
}