/* Enable or disable the specified hardware clear condition.  */
void TMR2_HWClearCondCmd(CM_TMR2_TypeDef *TMR2x, uint32_t u32Ch, uint32_t u32Cond, en_functional_state_t enNewState)
/* Enable or disable the specified hardware clear condition.  */
void TMR2_HWClearCondCmd(CM_TMR2_TypeDef *TMR2x, uint32_t u32Ch, uint32_t u32Cond, en_functional_state_t enNewState)
{
    DDL_ASSERT(IS_TMR2_UNIT(TMR2x));
    DDL_ASSERT(IS_TMR2_CH(u32Ch));
    DDL_ASSERT(IS_TMR2_CLR_COND(u32Cond));
    DDL_ASSERT(IS_FUNCTIONAL_STATE(enNewState));
    u32Cond <<= (u32Ch * TMR2_CH_OFFSET);
    if (enNewState == ENABLE) {
        SET_REG32_BIT(TMR2x->HCONR, u32Cond);
    } else {
        CLR_REG32_BIT(TMR2x->HCONR, u32Cond);
    }
}