/* Change the PLL divisor. 
The PLL is bypassed before modifying the divisor, and the function blocks until the PLL is locked, then the bypass is disabled, before returning. */
void rcc_change_pll_divisor(uint8_t pll_div400)
/* Change the PLL divisor. 
The PLL is bypassed before modifying the divisor, and the function blocks until the PLL is locked, then the bypass is disabled, before returning. */
void rcc_change_pll_divisor(uint8_t pll_div400)
{
	rcc_pll_bypass_enable();
	rcc_set_pll_divisor(pll_div400);
	rcc_wait_for_pll_ready();
	rcc_pll_bypass_disable();
	lm4f_rcc_sysclk_freq = (uint32_t)400E6 / pll_div400;
}