/* Reads timer registers in posted and non-posted mode. The posted mode bit is encoded in reg. Note that in posted mode write pending bit must be checked. Otherwise a read of a non completed write will produce an error.  */
static u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
/* Reads timer registers in posted and non-posted mode. The posted mode bit is encoded in reg. Note that in posted mode write pending bit must be checked. Otherwise a read of a non completed write will produce an error.  */
static u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
{
	if (timer->posted)
		while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
				& (reg >> WPSHIFT))
			cpu_relax();
	return readl(timer->io_base + (reg & 0xff));
}