/* This triggers the DRAM initialization. It performs sending the mode registers to the DRAM among other things. Very likely the ZQCL command is also getting executed (to do the initial impedance calibration on the DRAM side of the wire). The memory controller and the PHY must be already configured before calling this function.  */
static void mctl_ddr3_initialize(void)
/* This triggers the DRAM initialization. It performs sending the mode registers to the DRAM among other things. Very likely the ZQCL command is also getting executed (to do the initial impedance calibration on the DRAM side of the wire). The memory controller and the PHY must be already configured before calling this function.  */
static void mctl_ddr3_initialize(void)
{
	struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE;
	setbits_le32(&dram->ccr, DRAM_CCR_INIT);
	await_bits_clear(&dram->ccr, DRAM_CCR_INIT);
}