/* The 48 MHz clock is derived from one of the four following sources: */
void rcc_set_clock48_source(uint32_t clksel)
/* The 48 MHz clock is derived from one of the four following sources: */
void rcc_set_clock48_source(uint32_t clksel)
{
	RCC_CCIPR &= ~(RCC_CCIPR_CLK48SEL_MASK << RCC_CCIPR_CLK48SEL_SHIFT);
	RCC_CCIPR |= (clksel << RCC_CCIPR_CLK48SEL_SHIFT);
}