/* Set clock divisor value for booting from EMMC. Set DWMMC channel-0 clk div to operate mmc0 device at 50MHz.  */
void emmc_boot_clk_div_set(void)
/* Set clock divisor value for booting from EMMC. Set DWMMC channel-0 clk div to operate mmc0 device at 50MHz.  */
void emmc_boot_clk_div_set(void)
{
	struct exynos5_clock *clk =
		(struct exynos5_clock *)samsung_get_base_clock();
	unsigned int div_mmc;
	div_mmc = readl((unsigned int) &clk->div_fsys1) & ~FSYS1_MMC0_DIV_MASK;
	div_mmc |= FSYS1_MMC0_DIV_VAL;
	writel(div_mmc, (unsigned int) &clk->div_fsys1);
}