/* There are maximum 64 Multi-Pourpose Pins on Kirkwood Each MPP functionality can be configuration by a 4bit value of MPP control reg, the value and associated functionality depends upon used SoC varient  */
int kw_config_mpp(u32 mpp0_7, u32 mpp8_15, u32 mpp16_23, u32 mpp24_31, u32 mpp32_39, u32 mpp40_47, u32 mpp48_55)
/* There are maximum 64 Multi-Pourpose Pins on Kirkwood Each MPP functionality can be configuration by a 4bit value of MPP control reg, the value and associated functionality depends upon used SoC varient  */
int kw_config_mpp(u32 mpp0_7, u32 mpp8_15, u32 mpp16_23, u32 mpp24_31, u32 mpp32_39, u32 mpp40_47, u32 mpp48_55)
{
	u32 *mppreg = (u32 *) KW_MPP_BASE;
	writel(mpp0_7, &mppreg[0]);
	writel(mpp8_15, &mppreg[1]);
	writel(mpp16_23, &mppreg[2]);
	writel(mpp24_31, &mppreg[3]);
	writel(mpp32_39, &mppreg[4]);
	writel(mpp40_47, &mppreg[5]);
	writel(mpp48_55, &mppreg[6]);
	return 0;
}