/* Allows specifying size of FIFO block (in term of available messages in FIFO and FIFO base address within CAN message RAM. Note, that there are no limitations nor checking on address provided.  */
void fdcan_init_fifo_ram(uint32_t canport, unsigned fifo_id, uint32_t fxsa, uint8_t fxs)
/* Allows specifying size of FIFO block (in term of available messages in FIFO and FIFO base address within CAN message RAM. Note, that there are no limitations nor checking on address provided.  */
void fdcan_init_fifo_ram(uint32_t canport, unsigned fifo_id, uint32_t fxsa, uint8_t fxs)
{
	FDCAN_RXFIC(canport, fifo_id) = (FDCAN_RXFIC(canport, fifo_id)
		& ~(
			(FDCAN_RXFIC_FIS_MASK << FDCAN_RXFIC_FIS_SHIFT)
			| (FDCAN_RXFIC_FISA_MASK << FDCAN_RXFIC_FISA_SHIFT)
			))
		| (fxs << FDCAN_RXFIC_FIS_SHIFT)
		| (fxsa & (FDCAN_RXFIC_FISA_MASK << FDCAN_RXFIC_FISA_SHIFT));
}