/* param divValue The divide value to be set, the available range is 0~63.  */
void CLOCK_OSC_SetOscRc400MRefClkDiv(uint8_t divValue)
/* param divValue The divide value to be set, the available range is 0~63.  */
void CLOCK_OSC_SetOscRc400MRefClkDiv(uint8_t divValue)
{
    uint32_t tmp32;
    tmp32 = ANATOP_AI_Read(kAI_Itf_400m, kAI_RCOSC400M_CTRL0);
    tmp32 = ((tmp32 & ~AI_RCOSC400M_CTRL0_REF_CLK_DIV_MASK) | AI_RCOSC400M_CTRL0_REF_CLK_DIV(divValue));
    ANATOP_AI_Write(kAI_Itf_400m, kAI_RCOSC400M_CTRL0, tmp32);
}