/* brief Return PLL1 output clock rate from setup structure param pSetup : Pointer to a PLL setup structure return PLL0 output clock rate the setup structure will generate  */
uint32_t CLOCK_GetPLL1OutFromSetup(pll_setup_t *pSetup)
/* brief Return PLL1 output clock rate from setup structure param pSetup : Pointer to a PLL setup structure return PLL0 output clock rate the setup structure will generate  */
uint32_t CLOCK_GetPLL1OutFromSetup(pll_setup_t *pSetup)
{
    uint32_t clkRate = 0;
    uint32_t prediv, postdiv;
    uint32_t workRate = 0UL;
    clkRate = CLOCK_GetPLL1InClockRate();
    if (((pSetup->pllctrl & SYSCON_PLL1CTRL_BYPASSPLL_MASK) == 0UL) &&
        ((pSetup->pllctrl & SYSCON_PLL1CTRL_CLKEN_MASK) != 0UL) &&
        ((PMC->PDRUNCFG0 & PMC_PDRUNCFG0_PDEN_PLL1_MASK) == 0UL))
    {
        prediv  = findPll1PreDiv();
        postdiv = findPll1PostDiv();
        clkRate = clkRate / prediv;
        workRate = clkRate * findPll1MMult();
        workRate /= postdiv;
    }
    return workRate;
}