/* Wait for BCH complete IRQ and clear the IRQ  */
static int mxs_nand_wait_for_bch_complete(struct mxs_nand_info *nand_info)
/* Wait for BCH complete IRQ and clear the IRQ  */
static int mxs_nand_wait_for_bch_complete(struct mxs_nand_info *nand_info)
{
	int timeout = MXS_NAND_BCH_TIMEOUT;
	int ret;
	ret = mxs_wait_mask_set(&nand_info->bch_regs->hw_bch_ctrl_reg,
		BCH_CTRL_COMPLETE_IRQ, timeout);
	writel(BCH_CTRL_COMPLETE_IRQ, &nand_info->bch_regs->hw_bch_ctrl_clr);
	return ret;
}