/* Some U-Boot versions set the number of chipselects to two for Sequoia/Rainier boards while they only have one chipselect hardwired. Hardcode the number of chipselects to one for sequioa/rainer board models or read the actual value from the memory controller register DDR0_10 otherwise.  */
static u32 ibm4xx_denali_get_cs(void)
/* Some U-Boot versions set the number of chipselects to two for Sequoia/Rainier boards while they only have one chipselect hardwired. Hardcode the number of chipselects to one for sequioa/rainer board models or read the actual value from the memory controller register DDR0_10 otherwise.  */
static u32 ibm4xx_denali_get_cs(void)
{
	void *devp;
	char model[64];
	u32 val, cs;
	devp = finddevice("/");
	if (!devp)
		goto read_cs;
	if (getprop(devp, "model", model, sizeof(model)) <= 0)
		goto read_cs;
	model[sizeof(model)-1] = 0;
	if (!strcmp(model, "amcc,sequoia") ||
	    !strcmp(model, "amcc,rainier"))
		return 1;
read_cs:
	val = SDRAM0_READ(DDR0_10);
	val = DDR_GET_VAL(val, DDR_CS_MAP, DDR_CS_MAP_SHIFT);
	cs = 0;
	while (val) {
		if (val & 0x1)
			cs++;
		val = val >> 1;
	}
	return cs;
}