/* PHY register read PHY registers are not accessed directly, but through the MII  */
static u16 enc28j60_phy_read(struct enc28j60_net *priv, u8 address)
/* PHY register read PHY registers are not accessed directly, but through the MII  */
static u16 enc28j60_phy_read(struct enc28j60_net *priv, u8 address)
{
	u16 ret;
	mutex_lock(&priv->lock);
	nolock_regb_write(priv, MIREGADR, address);
	nolock_regb_write(priv, MICMD, MICMD_MIIRD);
	wait_phy_ready(priv);
	nolock_regb_write(priv, MICMD, 0x00);
	ret  = nolock_regw_read(priv, MIRDL);
	mutex_unlock(&priv->lock);
	return ret;
}