/* Set up a mapping of an available irq and vector, and enable the specified MMR that defines the MSI that is to be sent to the specified CPU when an interrupt is raised.  */
int uv_setup_irq(char *irq_name, int cpu, int mmr_blade, unsigned long mmr_offset, int restrict)
/* Set up a mapping of an available irq and vector, and enable the specified MMR that defines the MSI that is to be sent to the specified CPU when an interrupt is raised.  */
int uv_setup_irq(char *irq_name, int cpu, int mmr_blade, unsigned long mmr_offset, int restrict)
{
	int irq, ret;
	irq = create_irq_nr(NR_IRQS_LEGACY, uv_blade_to_memory_nid(mmr_blade));
	if (irq <= 0)
		return -EBUSY;
	ret = arch_enable_uv_irq(irq_name, irq, cpu, mmr_blade, mmr_offset,
		restrict);
	if (ret == irq)
		uv_set_irq_2_mmr_info(irq, mmr_offset, mmr_blade);
	else
		destroy_irq(irq);
	return ret;
}