/* Removes the TD_IC flag from previous descriptor to improve TX performance. If the flag is changed on a descriptor that is being read by the hardware, I assume PCI transaction ordering will mean you are either successful or just miss asserting the change to the hardware. Anyway you're messing with a descriptor you don't own, but this shouldn't kill the chip provided the descriptor register is read only to the hardware.  */
static void load_packet(struct net_device *dev, char *buf, u32 flags, struct sk_buff *skb)
/* Removes the TD_IC flag from previous descriptor to improve TX performance. If the flag is changed on a descriptor that is being read by the hardware, I assume PCI transaction ordering will mean you are either successful or just miss asserting the change to the hardware. Anyway you're messing with a descriptor you don't own, but this shouldn't kill the chip provided the descriptor register is read only to the hardware.  */
static void load_packet(struct net_device *dev, char *buf, u32 flags, struct sk_buff *skb)
{
    struct de4x5_private *lp = netdev_priv(dev);
    int entry = (lp->tx_new ? lp->tx_new-1 : lp->txRingSize-1);
    dma_addr_t buf_dma = dma_map_single(lp->gendev, buf, flags & TD_TBS1, DMA_TO_DEVICE);
    lp->tx_ring[lp->tx_new].buf = cpu_to_le32(buf_dma);
    lp->tx_ring[lp->tx_new].des1 &= cpu_to_le32(TD_TER);
    lp->tx_ring[lp->tx_new].des1 |= cpu_to_le32(flags);
    lp->tx_skb[lp->tx_new] = skb;
    lp->tx_ring[entry].des1 &= cpu_to_le32(~TD_IC);
    barrier();
    lp->tx_ring[lp->tx_new].status = cpu_to_le32(T_OWN);
    barrier();
}