/* CORE timer Configuration. 
Initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is in free running mode to generate periodic interrupts.  */
uint32_t drv_coret_config(uint32_t ticks, int32_t IRQn)
/* CORE timer Configuration. 
Initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is in free running mode to generate periodic interrupts.  */
uint32_t drv_coret_config(uint32_t ticks, int32_t IRQn)
{
    if ((ticks - 1UL) > CORET_LOAD_RELOAD_Msk)
    {
        return (1UL);
    }
    CORET->LOAD  = (uint32_t)(ticks - 1UL);
    drv_nvic_set_prio(IRQn, (1UL << s_nvic_prio_bits) - 1UL);
    CORET->VAL   = 0UL;
    CORET->CTRL  = CORET_CTRL_CLKSOURCE_Msk |
                   CORET_CTRL_TICKINT_Msk |
                   CORET_CTRL_ENABLE_Msk;
    return (0UL);
}