/* Send a master data receive request with an NACK when the master have obtained control of the bus(Write Step2). 
Users call also can xI2CMasterStop() to terminate this transmition and release the I2C bus. */
unsigned long I2CMasterReadLastRequestS2(unsigned long ulBase)
/* Send a master data receive request with an NACK when the master have obtained control of the bus(Write Step2). 
Users call also can xI2CMasterStop() to terminate this transmition and release the I2C bus. */
unsigned long I2CMasterReadLastRequestS2(unsigned long ulBase)
{
    xHWREG(ulBase + I2C_CONCLR) = CONCLR_AAC;
    xHWREG(ulBase + I2C_CONCLR) = CONCLR_SIC;
    while(xHWREG(ulBase + I2C_STAT) != I2C_STAT_M_RX_DAT_ACK);
    return ( xHWREG(ulBase + I2C_DAT) );
}