Field-programmable gate array
The FPGA engineering software has to translate the abstract HDL code into the logic elements available in the selected FPGA. That is called logic synthesis. Then a process of place and route is done to position the logic elements in the FPGA. The result is a bitfile that can be programmed into the FPGA or the configuration memory. This is usually done with a USB programmer connected to the JTAG port of the FPGA.