Field-programmable gate array
FPGAs are generally built upon programmable logic elements and programmable interconnects. One building block of logic elements is a programmable lookup table (LUT). A LUT can be programmed to output any value given input values. In this way, a LUT can be programmed to be any type of logic with the same number of inputs and outputs. For example, a 2-input, 1-output LUT can be programmed to emulate the logic of a 2-input AND, OR, NAND, NOR, XOR, etc. The output of this LUT can be either saved using a register or connected to the input of other LUTs. Using a programmable mux, the FPGA can be programmed to choose the registered or non-registered output. This combination of a LUT, a register, and a mux is the general structure of a logic element.