text: /dts-v1/;
  
  #include "mt7620a.dtsi"
  
  #include <dt-bindings/gpio/gpio.h>
  #include <dt-bindings/input/input.h>
  
  / {
  	compatible = "ralink,mt7620a-mt7610e-evb", "ralink,mt7620a-soc";
  	model = "Ralink MT7620A evaluation board";
  
  	keys {
  		compatible = "gpio-keys";
  
  		wps {
  			label = "wps";
  			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  			linux,code = <BTN_0>;
  		};
  
  		reset {
  			label = "reset";
  			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  			linux,code = <BTN_1>;
  		};
  	};
  };
  
  &gpio0 {
  	status = "okay";
  };
  
  &spi0 {
  	status = "okay";
  
  	flash@0 {
  		compatible = "jedec,spi-nor";
  		reg = <0>;
  		spi-max-frequency = <1000000>;
  
  		partitions {
  			compatible = "fixed-partitions";
  			#address-cells = <1>;
  			#size-cells = <1>;
  
  			partition@0 {
  				label = "u-boot";
  				reg = <0x0 0x30000>;
  				read-only;
  			};
  
  			partition@30000 {
  				label = "u-boot-env";
  				reg = <0x30000 0x10000>;
  				read-only;
  			};
  
  			factory: partition@40000 {
  				label = "factory";
  				reg = <0x40000 0x10000>;
  				read-only;
  			};
  
  			partition@50000 {
  				compatible = "denx,uimage";
  				label = "firmware";
  				reg = <0x50000 0x7b0000>;
  			};
  		};
  	};
  };
  
  &ethernet {
  	pinctrl-names = "default";
  	pinctrl-0 = <&ephy_pins>;
  
  	mediatek,portmap = "llllw";
  };
  
  &gsw {
  	mediatek,port4 = "ephy";
  };
  
  &sdhci {
  	status = "okay";
  };
  
  &pcie {
  	status = "okay";
  };
  
  &pcie0 {
  	wifi@0,0 {
  		reg = <0x0000 0 0 0 0>;
  		mediatek,mtd-eeprom = <&factory 0x8000>;
  		ieee80211-freq-limit = <5000000 6000000>;
  	};
  };
  