text: 1. Technical Field of the Invention
  The present invention generally relates to the telecommunications field and, in particular, to a wireless communications system and method capable of supporting an incremental redundancy error .handling scheme using available gross rate channels.
  2. Description of Related Art
  Wireless communication systems convey a digital data block by transmitting a modulated signal from a transmitter to a receiver over a transmission channel. Transmission channels often contain noise that tends to corrupt the transmitted signal, resulting in transmission errors and the loss of part of the transmitted data block. For instance, this noise could be interference from other transmitters. Furthermore, fading (e.g. log-normal fading, Rayleigh fading) can corrupt the transmitted channel. Corruption of the transmitted digital data block is problematic for wireless communication systems.
  To minimize the impact of noise on the transmitted digital data block, various coding.techniques often referred to as Link Adaptation (LA) and Type I/II/III hybrid ARQ (Automatic Repeat-Request) schemes that make use of Forward Error Correction (FEC) and Incremental Redundancy (IR) have been proposed. Brief descriptions of a known wireless communications system 100 and how these known coding techniques are incorporated therein are discussed below with respect to FIGS. 1-3.
  Referring to FIG. 1, there is illustrated a block diagram of a traditional wireless communications system 100. The traditional wireless communications system 100 includes a transmitter 120 for coding and transmitting a modulated signal, and a receiver 140 for receiving and decoding the received modulated signal. The transmitter 120 and receiver 140 include components, described below, which are selected, arranged and configured to communicate with one another over a fixed rate channel 150.
  The transmitter 120 includes an information source 122, a coding circuit 124, a puncturing circuit 126 and a modulating circuit 128. The information source 122 generates a digital data block formed by a stream of bits. The coding circuit 124 codes the digital data block to form a coded data block, and a puncturing circuit 126 punctures the coded data block to produce a punctured data block. More specifically, the digital data block is coded according to a selected.code rate to provide error protection for symbols of the digital data block. And, the coded data block is punctured according to a selected deleting pattern to produce a corresponding punctured data block having erasures. The modulating circuit 128 uses the punctured data block to produce a modulated signal which is transmitted over the fixed rate channel 150.
  The receiver 140 includes a demodulating circuit 142, a depuncturing circuit 144 and a decoding circuit 146. The demodulating circuit 142 demodulates the received modulated signal and outputs a demodulated signal. The demodulated signal corresponds to the punctured data block after it has been corrupted by the communication channel. The depuncturing circuit 144 uses the deleting pattern of the puncturing circuit 126 to depuncture the demodulated signal and output a depunctured data block. The decoding circuit 146 uses the code of the coding circuit 124 to decode the depunctured data block and output an estimated data block.
  Referring to FIG. 2, there is a block digram illustrating in greater detail the coding, puncturing and modulating of a digital data block in the traditional wireless communications system 100 according to the FEC coding technique. In the LA coding technique, Modulation and Coding Schemes (MCS) are selected based on link quality measurements. For example, the GPRS (General Packet Radio Service) standard uses GMSK (Gaussian Minimum Shift Keying) modulation and allows the use of four different Coding Schemes (CS) i.e. CS-1 through CS-4 with coding rates xc2xd, ⅔, xc2xe, and 1 respectively. An example of Logical Link Control (LLC) frame segmentation in GPRS is depicted in FIG. 2. A frame 202 is segmented into digital data blocks 204 (one shown) having a header H1 and a Frame Check Sequence (FCS). The digital data block 204 is coded with a convolutional code rate xc2xd (for example) to form a coded data block 206 and then punctured (if needed) to form a punctured data block 208. It should be noted that a single puncturing pattern (e.g., puncturing pattern P1) is used for a given coding scheme because there is one-to-one relation between the data block 204 and the resulting punctured data block 208. Thereafter, the punctured data block 208 is modulated and transmitted to the receiver 140 over the fixed rate channel 150.
  Referring to FIG. 3, there is a block diagram illustrating in greater detail the coding, puncturing and modulating of a digital data block in the traditional wireless communications system 100 according to the Type II hybrid ARQ coding techniques. Basically, the ARQ coding techniques are link level techniques that can provide low bit error rates by effectively retransmitting modulated signals to the receiver 140. In other words, the ARQ coding technique uses at least one fixed rate channel 150a, 150b. . . 150n to support the retransmission of a modulated signal. The ARQ coding techniques can be divided into fixed redundancy and variable redundancy error control schemes. The Type I hybrid ARQ coding technique is essentially a fixed redundancy error control scheme. And, the Type II hybrid ARQ coding technique is based on a variable redundancy control scheme. The LA coding technique of FIG. 1 can be viewed as using a set of Type I hybrid ARQ coding techniques.
  In the Type II hybrid ARQ coding technique shown in FIG. 3, data redundancy or retransmission of modulated signals which are not necessarily the same signals is continued until the receiver 140 successfully decodes a digital data block 304. As shown:, the digital data block 304 (shown on left) is coded using a predetermined code (e.g., systematic convolutional code) to form a mother code word 306 (shown on left). The mother code word 306 (shown on left) is punctured using a predetermined puncturing pattern P1 to form a subblock 308a. The subblock 308a is then modulated and transmitted to the receiver 140 over a first fixed rate channel 150a. If the receiver 140 is able to successfully decode the digital data block 304 then an acknowledgment signal 360 is sent to the transmitter 120 and the next digital data block (not shown) is transmitted to the receiver 140. In the event the receiver 140 is not able to successfully decode the digital data block 304, then a retransmission request, signal 362 is sent to the transmitter 120.
  Upon receiving the retransmission request signal 362, the transmitter 120 operates again to code the digital data block 304 (shown in middle) using the predetermined code to form the mother code word 306 (shown in middle). The mother code word 306 (shown in middle) is punctured using another predetermined puncturing pattern P2 to form a subblock 308b. The subblock 308b which may not have the same bits as subblock 308a is modulated.and transmitted to the receiver 140 over a second fixed rate channel 150b. If the receiver 140 is now able to successfully decode the digital data block 304 also using information from previously received subblocks in joint decoding then an acknowledgment signal 360 is sent to the transmitter 120 and the next digital data block (not shown) is transmitted to the receiver 140. In the event the receiver 140 is still not able, to successfully decode the digital data block 304, then another retransmission request signal 362 is sent to the transmitter 120.
  Upon receiving the retransmission request signal 362, the transmitter 120 yet again operates to code the digital data block 304 (shown on right) using the predetermined code to form the mother code word 306 (shown on right). The mother code word 306 (shown on right) is punctured using another predetermined puncturing pattern Pn to form a subblock 308n. It should be understood that the number xe2x80x9cnxe2x80x9d of subblocks is arbitrary, i.e., that the subblock 308n does not necessarily come after subblock 308b. The subblock 308n is modulated and transmitted to the receiver 140 over another fixed rate channel 150n. If the receiver 140 is still not able to successfully decode the digital data block 304 then this process of coding, puncturing, modulating and transmitting the digital data block 304 is repeated until the receiver 140 successfully decodes the digital data block 304 and forwards the acknowledgment signal 360 to the transmitter 120.
  A description about the Type II hybrid ARQ coding technique can be found in: (1) S. Lin, D. J. Costello, xe2x80x9cAutomatic Repeat-Request Error Control Schemesxe2x80x9d; IEEE Commun. Mag., vol. 12, pp. 5-17, December 1984; and (2) J. Hagenauer, xe2x80x9cRate-Compatible Punctured Convolutional Codes (RCPC Codes) and their Applicationsxe2x80x9d, IEEE Trans. Comm., vol. 36, no. 4, April 1988. Both of these articles are hereby incorporated into the present application.
  The Type III Hybrid ARQ coding technique is a special form of the Type II Hybrid PRQ coding technique, where all the subblocks have certain properties. A description about the Type III hybrid ARQ coding technique can be found in S. Kallel, xe2x80x9cComplementary Punctured Convoluntional (CPC) Codes and Their Applicationxe2x80x9d, IEEE transactions on-communications, vol. 43, no. 6, June 1995. However, it should be understood that both Type II and Type III Hybrid ARQ coding techniques can be designed so that decoding of single sub-blocks themselves is possible. Both the Type II Hybrid ARQ and Type III Hybrid ARQ coding techniques are referred to as Incremental Redundancy (IR) hereinafter. Unfortunately, the traditional wireless communications system 100 that use fixed rate channels 150a, 150b . . . 150n have several disadvantages. For instance, some of the disadvantages are as follows:
  1. No good solution using incremental redundancy over available gross rate channels exists. Since the subblocks 308a, 308b . . . 308n are of equal or fixed sizes, they are not suitable for transmission over available gross rate channels. One problematic solution is to have very small subblocks, and hence one would be able to fit different numbers of these subblocks oh the available gross rate channel. However, this causes much overhead, since each subblock normally contains a header.
  2. No flexible way of designing and utilizing incremental redundancy code words exists. Current methods require one puncturing pattern for each subblock. If many different subblocks (e.g., of different lengths) are needed to cope with available gross rate channels, then as many puncturing patterns are needed. This causes high complexity. Additionally, the signaling of which puncturing pattern that has been used gives a large overhead.
  3. No flexible way of signaling which puncturing pattern P1, P2 . . . Pn is used exists. Normally a number of predetermined puncturing schemes, i.e. bitmaps containing one""s and zero""s are applied, and which puncturing scheme is used is signaled to the receiver 120 in the subblock header.
  Accordingly, there is a need for a wireless communications system and method that addresses the aforementioned problems of the traditional wireless communications system by supporting incremental redundancy error handling schemes using available gross rate channels. This need and other needs are satisfied by the wireless communications system, transmitter, receiver and method of the present invention.
  The present invention is a wireless communications system, transmitter, receiver and method that addresses the deficiencies of the prior art by supporting incremental redundancy error handling schemes using available gross rate channels. More specifically, the transmitter includes a coding circuit for coding a digital data block and generating a mother code word, and a reordering circuit for reordering the mother code word and generating a reordered mother code word. The transmitter also includes a subsequence selection circuit for selecting at least one subsequence from the reordered mother code word, and a modulating circuit for modulating and forwarding at least one subsequence to the receiver. Each subsequence has desired number of bits, taken from the reordered mother code word, to fill the available bandwidth of at least one available gross bitrate channel. The transmitter continues to forward and modulate subsequences of the reordered mother code word until the receiver successfully decodes the digital data block.