At version 3.4, LLVM supports many instruction sets, including ARM, Qualcomm Hexagon, MIPS, Nvidia Parallel Thread Execution (PTX; called "NVPTX" in LLVM documentation), PowerPC, AMD TeraScale, AMD Graphics Core Next (GCN), SPARC, z/Architecture (called "SystemZ" in LLVM documentation), x86, x86-64, and XCore. Some features are not available on some platforms. Most features are present for x86, x86-64, z/Architecture, ARM, and PowerPC. RISC-V is supported as of version 7. In the past LLVM also supported fully or partially other backends, including C backend, Cell SPU, mblaze (MicroBlaze), AMD R600, DEC/Compaq Alpha (Alpha AXP) and Nios2, but most of this hardware is mostly obsolete, and the LLVM support and maintenance for it couldn't be justified.