In order to allow more parts of configuration space to be standardized without conflicting with existing uses, there can be a list of "capabilities" defined within the remain 192 bytes of PCI configuration space. Each capability has one byte that describes which capability it is, and one byte to point to the next capability. The number of additional bytes depends on the capability ID. If capabilities are being used, a bit in the "Status" register is set, and a pointer to the first in a linked list of capabilities is provided in the "Cap. pointer" register defined in the Standardized Registers.