The 128-word thin-film memory "general register stack" (16 each arithmetic, index, and repeat with a few in common) had a 300-nanosecond access time with a complete cycle time of 600 nanoseconds. Six cycles of thin-film memory per core memory cycle and fast adder circuitry permitted memory address indexing within the current instruction core memory cycle and also modification of the index value (the signed upper 18 bits were added to the lower 18 bits) in the specified index register (16 were available). The 16 input/output (I/O) channels also used thin-film memory locations for direct-to-memory I/O memory location registers. Programs could not be executed from unused thin-film memory locations.