Additional 1108 hardware instructions included double precision arithmetic, double-word load, store, and comparison instructions. The processor could have up to 16 input/output channels for peripherals. The 1108 CPU was, with the exception of the 128-word (200 octal) ICR (Integrated Control Register) stack, entirely implemented via discrete component logic cards, each with a 55-pin high density connector, which interfaced to a machine wire wrapped backplane. Additional hand applied twisted pair wiring was utilized to implement backplane connections with sensitive timing, connections between machine wire wrapped backplanes, and connections to the I/O channel connector panel in the lower section of the CPU Cabinet. The ICR (Integrated Control Register) stack was implemented with "new" integrated circuit technology, replacing the thin film registers on the 1107. The ICR consisted of 128 38-bits, with a half-word Parity Bit calculated and checked with each access. The ICR was logically the first 128 memory addresses (200 Octal), but was contained in the CPU. The core memory was contained in a one or more separate cabinet(s), and consisted of two separate 32K modules, for a total capacity of 64K 38-bit words (36-bits data and a Parity Bit for each 18-bit half-word). The basic cycle time of the core memory was 750 ns, and the supporting circuitry was implemented with the same circuit card/backplane technology as the 1108 CPU.