The mechanism is illustrated in Figure 3. The gate current makes an equivalent NPN transistor switch on, which in turn draws current from the base of an equivalent PNP transistor, turning it on also. Part of the gate current (dotted line) is lost through the ohmic path across the p-silicon, flowing directly into MT1 without passing through the NPN transistor base. In this case, the injection of holes in the p-silicon makes the stacked n, p and n layers beneath MT1 behave like a NPN transistor, which turns on due to the presence of a current in its base. This, in turn, causes the p, n and p layers over MT2 to behave like a PNP transistor, which turns on because its n-type base becomes forward-biased with respect to its emitter (MT2). Thus, the triggering scheme is the same as an SCR. The equivalent circuit is depicted in Figure 4.