The advantage to the 680x style access was that dynamic RAM chips of the era generally ran at 2 MHz. Due to the cycle timing, there were periods of the internal clock where the memory bus was guaranteed to be free. This allowed the computer designer to interleave access to memory between the CPU and an external device, say a direct memory access controller, or more commonly, a graphics display chip. By running both chips at 1 MHz and stepping them one after the other, they could share access to the memory without any additional complexity or circuitry. Depending on version and speed grade, approximately 40–60% of a single clock cycle is typically available for memory access in a 6800, 6502, or 6809.