There were three reasons for the 6502's low cost. One was that the designers stripped out any feature that wasn't absolutely required. This led to the removal of one accumulator and the use of smaller 8-bit index registers, both resulting in less internal wiring. Another change was the move to depletion-load NMOS logic, a new technique that required only +5V; the 6800 had only a single +5V pin externally but had multiple voltages inside the chip that all require separate power rails. These two changes allowed the 6502 to be 16.6 mm2, as opposed to the 6800's 29.0 mm2, meaning twice as many chips could be produced from a single wafer. Finally, MOS was using the new Micralign lithography system that improved average yield from perhaps 10% to 70%.