Embedded HardCopy blocked harden standard or logic-intensive applications, increasing integration and delivering twice the density without a cost or power penalty. Altera developed a user-friendly method for partial reconfiguration, so core functionality can be changed easily and on the fly. There is a path to HardCopy V ASICs, when designs are ready for volume production. Altera’s 28 nm FPGAs aimed to reduce power requirements to 200 mW per channel. In 2004, the company began collaborating with Synopsys on HardCopy Structured ASICs.