The CPU contains two identical 16-bit processors running in hot standby mode. The original CPU core was referred to as the NT40 CPU and was implemented in approximately 250 discrete logic devices across several circuit boards running at 36 MHz. The NT40 core consisted mainly of the NT1X44 stack card, which provides some register and stack functions of the processor, the NT1X45 which contained the arithmetic and logic functions, the NT1X46 which provides more registers and the load-route read-only memory (ROM) and the NT1X47 timing and control card which provides the micro-cycle source and microstore decoding functions of the processor. The NT1X47 card also contained the 2-digit hexadecimal display to indicate test result codes and the condition of the core. The NT1X48 processor maintenance card contained a thumbwheel on the faceplate to enable various diagnostic tests of the CPU. A later modification of these same five circuit boards with faster pin-compatible discrete logic devices enabled the CPU to operate at 40 MHz allowing central offices to improve call throughput capacity by 10 percent. When the CPU is configured in dual hot standby mode, a mate exchange bus (MEB) between the two CPUs enables the state of one CPU to be continuously compared to that of the other CPU on a cycle by cycle basis. Any discrepancy between the two CPUs results in maintenance circuitry determining which CPU is at fault and activity to change to the same CPU.