At the 65-nanometer technology node, "ID" ≈ 1.2 mA/μ of width, supply voltage is "VDD" = 1.1 V; "Vth" ≈ 165 mV, and "Vov = VGS-Vth ≈ 5%VDD" ≈ 55 mV. Taking a typical length as twice the minimum, "L" = 2 "Lmin" = 0.130 μm and a typical value of λ ≈ 1/(4 V/μm "L"), we find 1/λ ≈ 2 V, and "gmrO" ≈ 110, still a large value. The point is that because "gmrO" is large almost regardless of the technology, the tabulated gain and the output resistance for both the MOSFET and the bipolar cascode are very large. That fact has implications in the discussion that follows.