Memory address control apparatus with separate translation look aside buffers for {HEAD ~ a data processor} using {TAIL ~ a virtual memory technique} 
Memory address control apparatus with separate translation look aside buffers for { HEAD ~ a data processor } using { TAIL ~ a virtual memory technique }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL