An integrated circuit comprising {HEAD ~ a relatively simple high voltage tolerant output circuit} that may be placed in {TAIL ~ a high impedance state} when the voltage at a corresponding signal connection point reaches a predetermined voltage reflecting a logic high level 
An integrated circuit comprising { HEAD ~ a relatively simple high voltage tolerant output circuit } that may be placed in { TAIL ~ a high impedance state } when the voltage at a corresponding signal connection point reaches a predetermined voltage reflecting a logic high level
OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH