As described above, according to the invention, abnormalities in flatness occurring in {HEAD ~ the vicinity} of the center and in {TAIL ~ the peripheral edge portion} of a ground surface of a wafer are restricted at the possible lowest level and a planarization or polishing method suited for correcting such abnormalities in flatness is used to correct and planarize the wafer and thereby a large effect can be achieved that semiconductor wafers each with high flatness are manufactured with good efficiency 
As described above , according to the invention , abnormalities in flatness occurring in { HEAD ~ the vicinity } of the center and in { TAIL ~ the peripheral edge portion } of a ground surface of a wafer are restricted at the possible lowest level and a planarization or polishing method suited for correcting such abnormalities in flatness is used to correct and planarize the wafer and thereby a large effect can be achieved that semiconductor wafers each with high flatness are manufactured with good efficiency
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH