The latch 62 is reset by {TAIL ~ the RUN signal} and is gated to receive data from {HEAD ~ the data BUS} under control of the signal I63 
The latch 62 is reset by { TAIL ~ the RUN signal } and is gated to receive data from { HEAD ~ the data BUS } under control of the signal I63
OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH