{HEAD ~ The distributed system structure} contains an address switch, {TAIL ~ multiple memory subsystems}, and multiple master devices, either processors, I/O agents, or coherent memory adapters, organized into a set of nodes supported by a node controller 
{ HEAD ~ The distributed system structure } contains an address switch , { TAIL ~ multiple memory subsystems } , and multiple master devices , either processors , I / O agents , or coherent memory adapters , organized into a set of nodes supported by a node controller
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