Alternatively, for increased cell speed, {TAIL ~ the transistors} from the pair can each further include an associated second structure including a n type semiconductor region proximate to a p type semiconductor region so as to serve as {HEAD ~ the second source/drain region} of a transistor of the pair 
Alternatively , for increased cell speed , { TAIL ~ the transistors } from the pair can each further include an associated second structure including a n type semiconductor region proximate to a p type semiconductor region so as to serve as { HEAD ~ the second source / drain region } of a transistor of the pair
OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH