In yet another aspect, a pre arbiter intercepts {TAIL ~ memory access request signals} from each of the agents and outputs {HEAD ~ a respective conditioned pre arbitrated memory access request signal} to provide the ability for one or more agents to lock ownership of the shared synchronous memory 
In yet another aspect , a pre arbiter intercepts { TAIL ~ memory access request signals } from each of the agents and outputs { HEAD ~ a respective conditioned pre arbitrated memory access request signal } to provide the ability for one or more agents to lock ownership of the shared synchronous memory
OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH