In another embodiment, the present invention includes the steps of selectively coupling {HEAD ~ a logic signal} on {TAIL ~ at least one input node} to an intermediate node, applying bias to the intermediate node, and amplifying the logic signal on the intermediate node to an output node 
In another embodiment , the present invention includes the steps of selectively coupling { HEAD ~ a logic signal } on { TAIL ~ at least one input node } to an intermediate node , applying bias to the intermediate node , and amplifying the logic signal on the intermediate node to an output node
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH