{HEAD ~ The steps} of a method or {TAIL ~ algorithm} described in connection with the present disclosure may be embodied directly in hardware, in a software module executed by a processor or in a combination of the two 
{ HEAD ~ The steps } of a method or { TAIL ~ algorithm } described in connection with the present disclosure may be embodied directly in hardware , in a software module executed by a processor or in a combination of the two
HEAD HEAD HEAD HEAD HEAD HEAD REL OTH OTH OTH TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH