Memory and circuit for accessing {TAIL ~ data bits} in a memory array in {HEAD ~ multi data rate operation} 
Memory and circuit for accessing { TAIL ~ data bits } in a memory array in { HEAD ~ multi data rate operation }
OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD