The interpreter 30 may be digital logic circuitry that compares the states of the signals GH and GL or may be {HEAD ~ a microprocessor} that employs {TAIL ~ software routines} to accomplish the same purpose 
The interpreter 30 may be digital logic circuitry that compares the states of the signals GH and GL or may be { HEAD ~ a microprocessor } that employs { TAIL ~ software routines } to accomplish the same purpose
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH