In order to reduce a period comparison error, synchronization circuitry operates to synchronize {HEAD ~ the N divider} of the PLL and an M divider of {TAIL ~ the coarse tuning circuit} 
In order to reduce a period comparison error , synchronization circuitry operates to synchronize { HEAD ~ the N divider } of the PLL and an M divider of { TAIL ~ the coarse tuning circuit }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL