The signal “MODE” is set to a logical “low” level when the clock signal arrives and the entire buck boost converter is configured in {HEAD ~ buck mode} of {TAIL ~ operation} 
The signal “ MODE ” is set to a logical “ low ” level when the clock signal arrives and the entire buck boost converter is configured in { HEAD ~ buck mode } of { TAIL ~ operation }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL