Each pipeline includes a sample and hold circuit that samples the programming voltage when {HEAD ~ the pipeline} begins {TAIL ~ a write operation} 
Each pipeline includes a sample and hold circuit that samples the programming voltage when { HEAD ~ the pipeline } begins { TAIL ~ a write operation }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL