A memory cell of {TAIL ~ an SRAM} has two drive MISFETs and {HEAD ~ two vertical MISFETs} 
A memory cell of { TAIL ~ an SRAM } has two drive MISFETs and { HEAD ~ two vertical MISFETs }
OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD