A clock buffer in a semiconductor memory device includes {HEAD ~ two kinds} of interface circuits, {TAIL ~ i.e., an LVTTL interface} and an SSTL interface 
A clock buffer in a semiconductor memory device includes { HEAD ~ two kinds } of interface circuits , { TAIL ~ i.e. , an LVTTL interface } and an SSTL interface
OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH