{TAIL ~ The presence} or absence of power voltage VDD supply from {HEAD ~ the terminal 12 side} is determined from the output of detector 33 
{ TAIL ~ The presence } or absence of power voltage VDD supply from { HEAD ~ the terminal 12 side } is determined from the output of detector 33
TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH