In addition, a bus arbiter in the node controller parks {HEAD ~ a data bus} towards {TAIL ~ a memory subsystem} 
In addition , a bus arbiter in the node controller parks { HEAD ~ a data bus } towards { TAIL ~ a memory subsystem }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL