In memory array blocks, such as in DRAM and SRAM memory designs, connected pins are generally separated by {TAIL ~ large distances} in a first direction and small distances in {HEAD ~ a second direction}, or a spine or channel region 
In memory array blocks , such as in DRAM and SRAM memory designs , connected pins are generally separated by { TAIL ~ large distances } in a first direction and small distances in { HEAD ~ a second direction } , or a spine or channel region
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH