A multiplier core circuit according to {HEAD ~ a second aspect} of {TAIL ~ the present invention} is the same in configuration as the multiplier core circuit according to the first aspect except for the input signals 
A multiplier core circuit according to { HEAD ~ a second aspect } of { TAIL ~ the present invention } is the same in configuration as the multiplier core circuit according to the first aspect except for the input signals
OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH