Moreover, the portion of the clock tree is configured to individually conditionally gate {HEAD ~ at least some} of {TAIL ~ the plurality} of clocks responsive to activity in the respective subcircuits of the execution circuit 
Moreover , the portion of the clock tree is configured to individually conditionally gate { HEAD ~ at least some } of { TAIL ~ the plurality } of clocks responsive to activity in the respective subcircuits of the execution circuit
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH