{TAIL ~ The detector circuit} 26 asserts {HEAD ~ the second synchronization signal} when it subsequently detects a falling edge on the digital signal to notify the interpolation circuit 10 and the signal processing circuitry 28 that a trailing pulse edge has been detected 
{ TAIL ~ The detector circuit } 26 asserts { HEAD ~ the second synchronization signal } when it subsequently detects a falling edge on the digital signal to notify the interpolation circuit 10 and the signal processing circuitry 28 that a trailing pulse edge has been detected
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