{HEAD ~ FIGS 2 5 exemplify phase advance} and {TAIL ~ phase delay capabilities} of the circuit 100 of FIG 1 
{ HEAD ~ FIGS 2 5 exemplify phase advance } and { TAIL ~ phase delay capabilities } of the circuit 100 of FIG 1
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH