In {TAIL ~ addition}, {HEAD ~ a bus arbiter} in the node controller parks a data bus towards a memory subsystem 
In { TAIL ~ addition } , { HEAD ~ a bus arbiter } in the node controller parks a data bus towards a memory subsystem
REL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH