For example when input terminals 530 and 531 are both at logical 0 state, the input of NAND gate 501 will both be at logic 1 state and line 537 will be at {HEAD ~ logical 0 state}, which will be inverted to {TAIL ~ logic 1 state} by inverter 511 at output terminal L0 
For example when input terminals 530 and 531 are both at logical 0 state , the input of NAND gate 501 will both be at logic 1 state and line 537 will be at { HEAD ~ logical 0 state } , which will be inverted to { TAIL ~ logic 1 state } by inverter 511 at output terminal L0
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH