a second multiplexer receiving as inputs an output of {TAIL ~ said second inverted XOR gate} and an output of {HEAD ~ said third inverted XOR gate}, said first and second multiplexers under control of a common clocking signal, 
a second multiplexer receiving as inputs an output of { TAIL ~ said second inverted XOR gate } and an output of { HEAD ~ said third inverted XOR gate } , said first and second multiplexers under control of a common clocking signal ,
OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH