A gate dielectric layer 14 is formed over {HEAD ~ the semiconductor substrate} 10 including {TAIL ~ the lower pillar} 11C 
A gate dielectric layer 14 is formed over { HEAD ~ the semiconductor substrate } 10 including { TAIL ~ the lower pillar } 11C
OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH