The semiconductor structure 3 wherein {HEAD ~ the electrical isolation} of the source and drain regions comprises {TAIL ~ a dielectric region} partly surrounding the regions and a dielectric layer under each of the regions 
The semiconductor structure 3 wherein { HEAD ~ the electrical isolation } of the source and drain regions comprises { TAIL ~ a dielectric region } partly surrounding the regions and a dielectric layer under each of the regions
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH