In order to reduce a period comparison error, {HEAD ~ synchronization circuitry} operates to synchronize the N divider of the PLL and {TAIL ~ an M divider} of the coarse tuning circuit 
In order to reduce a period comparison error , { HEAD ~ synchronization circuitry } operates to synchronize the N divider of the PLL and { TAIL ~ an M divider } of the coarse tuning circuit
OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL REL REL OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH