{TAIL ~ A second address compare circuit} compares a second received address for {HEAD ~ the second memory} with the first redundant address 
{ TAIL ~ A second address compare circuit } compares a second received address for { HEAD ~ the second memory } with the first redundant address
TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH