In this embodiment the memory control means includes a lock having a counter for registering the number of control pulses received, and gating means connected to control {HEAD ~ application} of {TAIL ~ clock signals} to the shift register 
In this embodiment the memory control means includes a lock having a counter for registering the number of control pulses received , and gating means connected to control { HEAD ~ application } of { TAIL ~ clock signals } to the shift register
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH