Still alternatively, {TAIL ~ thebody} of the selected transistor from the pair is connected to {HEAD ~ both the gate} of one inverter and the drain of the other inverter 
Still alternatively , { TAIL ~ thebody } of the selected transistor from the pair is connected to { HEAD ~ both the gate } of one inverter and the drain of the other inverter
OTH OTH OTH TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH