It includes {HEAD ~ a decoding scheme} wherein the memory chip has a row address bit which is used for {TAIL ~ the row} decoding also participates in the column and bit line decoding process 
It includes { HEAD ~ a decoding scheme } wherein the memory chip has a row address bit which is used for { TAIL ~ the row } decoding also participates in the column and bit line decoding process
OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH