Moreover, the portion of {HEAD ~ the clock tree} is configured to individually conditionally gate at least some of the plurality of clocks responsive to activity in {TAIL ~ the respective subcircuits} of the execution circuit 
Moreover , the portion of { HEAD ~ the clock tree } is configured to individually conditionally gate at least some of the plurality of clocks responsive to activity in { TAIL ~ the respective subcircuits } of the execution circuit
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH