Alternatively, one or more edges of the routing area may coincide with {HEAD ~ one or more edges} of {TAIL ~ chips} or circuit elements 
Alternatively , one or more edges of the routing area may coincide with { HEAD ~ one or more edges } of { TAIL ~ chips } or circuit elements
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH