The apparatus 2 wherein {HEAD ~ the pitch} of {TAIL ~ the array} of mounting holes in each of two orthogonal directions is an integral submultiple of the expected minimum center to center distance of the chips arranged on the circuit board 
The apparatus 2 wherein { HEAD ~ the pitch } of { TAIL ~ the array } of mounting holes in each of two orthogonal directions is an integral submultiple of the expected minimum center to center distance of the chips arranged on the circuit board
OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH