wherein, in the step , a gate electrode of a third MISFET is formed by patterning the conductive film such that the gate electrode of the second MISFET is arranged, in the first direction, between the gate electrode of {TAIL ~ the first MISFET} and {HEAD ~ the gate electrode} of the third MISFET, 
wherein , in the step , a gate electrode of a third MISFET is formed by patterning the conductive film such that the gate electrode of the second MISFET is arranged , in the first direction , between the gate electrode of { TAIL ~ the first MISFET } and { HEAD ~ the gate electrode } of the third MISFET ,
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH