The schematic in FIG 17 can be considered as {HEAD ~ a sequential implementation} for using two update functions but can be easily extended to accommodate multiple update functions which is also considered within the scope of {TAIL ~ this invention} 
The schematic in FIG 17 can be considered as { HEAD ~ a sequential implementation } for using two update functions but can be easily extended to accommodate multiple update functions which is also considered within the scope of { TAIL ~ this invention }
OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL