and {HEAD ~ each phase enable signal} is {TAIL ~ a logic} true at a different time than the other phase enable signals 704 b, 704 c, 704 d 
and { HEAD ~ each phase enable signal } is { TAIL ~ a logic } true at a different time than the other phase enable signals 704 b , 704 c , 704 d
OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH