In another aspect of the present invention there is provided a semiconductor device comprising a chip region, a sealing ring region which surrounds the chip region in plan, and a dummy region which surrounds {HEAD ~ an outer periphery} of {TAIL ~ the sealing ring region} in plan 
In another aspect of the present invention there is provided a semiconductor device comprising a chip region , a sealing ring region which surrounds the chip region in plan , and a dummy region which surrounds { HEAD ~ an outer periphery } of { TAIL ~ the sealing ring region } in plan
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH