The device 1 wherein {HEAD ~ the input conductors} associated with each of the logic blocks receive {TAIL ~ signals} from the first set of conductors 
The device 1 wherein { HEAD ~ the input conductors } associated with each of the logic blocks receive { TAIL ~ signals } from the first set of conductors
OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH