Alternatively, {HEAD ~ one or more edges} of the routing area may coincide with {TAIL ~ one or more edges} of chips or circuit elements 
Alternatively , { HEAD ~ one or more edges } of the routing area may coincide with { TAIL ~ one or more edges } of chips or circuit elements
OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH