The latched binary states of the input signal and the pulse count of {HEAD ~ the digital counter} are evaluated by {TAIL ~ an interpreter} such as logic circuitry or a microprocessor 
The latched binary states of the input signal and the pulse count of { HEAD ~ the digital counter } are evaluated by { TAIL ~ an interpreter } such as logic circuitry or a microprocessor
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH