{HEAD ~ Hardware} implemented cache coherency protocol with {TAIL ~ duplicated distributed directories} for high performance multiprocessors 
{ HEAD ~ Hardware } implemented cache coherency protocol with { TAIL ~ duplicated distributed directories } for high performance multiprocessors
HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH