The structure 8 further including {TAIL ~ a third set} of switches for selectively reading out said signals from {HEAD ~ said first and second set} of storage capacitors onto a set of output lines as line signals 
The structure 8 further including { TAIL ~ a third set } of switches for selectively reading out said signals from { HEAD ~ said first and second set } of storage capacitors onto a set of output lines as line signals
OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH