Alternatively, {HEAD ~ one or more edges} of {TAIL ~ the routing area} may coincide with one or more edges of chips or circuit elements 
Alternatively , { HEAD ~ one or more edges } of { TAIL ~ the routing area } may coincide with one or more edges of chips or circuit elements
OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH