A test circuit is configured to change the logic code stored in {HEAD ~ the register circuit} and store the changed logic code irrespective of the logic code of {TAIL ~ the fuse circuit} for test operation of the NAND flash memory device 
A test circuit is configured to change the logic code stored in { HEAD ~ the register circuit } and store the changed logic code irrespective of the logic code of { TAIL ~ the fuse circuit } for test operation of the NAND flash memory device
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH