a first counter receiving an output of {HEAD ~ said first multiplexer} and outputting {TAIL ~ a first count signal}, 
a first counter receiving an output of { HEAD ~ said first multiplexer } and outputting { TAIL ~ a first count signal } ,
OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH