The metallization line defining at least one interconnect feature having {TAIL ~ a first thickness}, and depositing a first silicon nitride barrier layer having {HEAD ~ a second thickness} over the substrate and the metallization line 
The metallization line defining at least one interconnect feature having { TAIL ~ a first thickness } , and depositing a first silicon nitride barrier layer having { HEAD ~ a second thickness } over the substrate and the metallization line
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH