In another aspect of the present invention there is provided a semiconductor device comprising a chip region, a sealing ring region which surrounds {HEAD ~ the chip region} in plan, and a dummy region which surrounds an outer periphery of the sealing ring region in {TAIL ~ plan} 
In another aspect of the present invention there is provided a semiconductor device comprising a chip region , a sealing ring region which surrounds { HEAD ~ the chip region } in plan , and a dummy region which surrounds an outer periphery of the sealing ring region in { TAIL ~ plan }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL