The microprocessor 18 handles {HEAD ~ the interface} to {TAIL ~ the controller} 20, the channel interface 16 and the RAM 12, as well as determining when to read/write the video in the RAM to/from the disk drive 14 
The microprocessor 18 handles { HEAD ~ the interface } to { TAIL ~ the controller } 20 , the channel interface 16 and the RAM 12 , as well as determining when to read / write the video in the RAM to / from the disk drive 14
OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH