Provided is a manufacturing process for a semiconductor wafer according to which semiconductor wafers each with higher flatness can be manufactured with good efficiency from a wafer work having passed through a surface grinding step by enabling restriction of reduction in flatness in the vicinity of the center and in the outer peripheral edge portion of a surface ground wafer at the lowest level possible, and correction of the reduction in {HEAD ~ flatness} of {TAIL ~ both portions} with ease to planarize in a planarization or polishing step 
Provided is a manufacturing process for a semiconductor wafer according to which semiconductor wafers each with higher flatness can be manufactured with good efficiency from a wafer work having passed through a surface grinding step by enabling restriction of reduction in flatness in the vicinity of the center and in the outer peripheral edge portion of a surface ground wafer at the lowest level possible , and correction of the reduction in { HEAD ~ flatness } of { TAIL ~ both portions } with ease to planarize in a planarization or polishing step
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH