{HEAD ~ The output} of the sync mark detector is enabled according to the current state of {TAIL ~ the state machine}, i.e., at a predetermined sample period interval 
{ HEAD ~ The output } of the sync mark detector is enabled according to the current state of { TAIL ~ the state machine } , i.e. , at a predetermined sample period interval
HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH