A design structure for a loop filter in a phase lock loop circuit comprising {TAIL ~ a reference precision resistor}, a first and second FET, wherein the gate of the first FET is tied to the gate of the second FET, and a filter capacitor connected to the first FET for producing {HEAD ~ a capacitor voltage} 
A design structure for a loop filter in a phase lock loop circuit comprising { TAIL ~ a reference precision resistor } , a first and second FET , wherein the gate of the first FET is tied to the gate of the second FET , and a filter capacitor connected to the first FET for producing { HEAD ~ a capacitor voltage }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD