It is still another object to provide a CPU reset circuit having a level detector and a watch dog circuit, wherein {TAIL ~ an output} from {HEAD ~ the level detector} is provided as an input to the watch dog circuit 
It is still another object to provide a CPU reset circuit having a level detector and a watch dog circuit , wherein { TAIL ~ an output } from { HEAD ~ the level detector } is provided as an input to the watch dog circuit
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH