{HEAD ~ A semiconductor memory device} includes different types of memory matrices adjacently arranged such that bit lines are aligned in the same cell matrix region, a column decoder for selecting the bit lines of {TAIL ~ the memory matrix}, and a row decoder for selecting the row lines of the memory matrix 
{ HEAD ~ A semiconductor memory device } includes different types of memory matrices adjacently arranged such that bit lines are aligned in the same cell matrix region , a column decoder for selecting the bit lines of { TAIL ~ the memory matrix } , and a row decoder for selecting the row lines of the memory matrix
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