Each the plurality of memory modules includes a memory MMW transceiver and {HEAD ~ a plurality} of {TAIL ~ memory cells} 
Each the plurality of memory modules includes a memory MMW transceiver and { HEAD ~ a plurality } of { TAIL ~ memory cells }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL