The apparatus includes a storage circuit, a first processing circuit which accesses the storage circuit for processing data obtained from each of the packets, and a second processing circuit which accesses {HEAD ~ the storage circuit} for {TAIL ~ processing data} stored in the storage circuit 
The apparatus includes a storage circuit , a first processing circuit which accesses the storage circuit for processing data obtained from each of the packets , and a second processing circuit which accesses { HEAD ~ the storage circuit } for { TAIL ~ processing data } stored in the storage circuit
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