A separate translation look aside buffer is connected to {HEAD ~ each cache memory}, with the TLB connected to the cache memory storing instructions operating to translate logical addresses to real addresses in the MMU storing instructions, while the TLB connected to the cache memory storing operand data operating to translate {TAIL ~ logical addresses} to real addresses in the MMU storing operand data 
A separate translation look aside buffer is connected to { HEAD ~ each cache memory } , with the TLB connected to the cache memory storing instructions operating to translate logical addresses to real addresses in the MMU storing instructions , while the TLB connected to the cache memory storing operand data operating to translate { TAIL ~ logical addresses } to real addresses in the MMU storing operand data
OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH