According to another embodiment of the present invention, {HEAD ~ the AGC circuit} provides {TAIL ~ at least a minimum level} of chip gain, which is settable, and which is then divided into analog or VGA gain values and digital gain values 
According to another embodiment of the present invention , { HEAD ~ the AGC circuit } provides { TAIL ~ at least a minimum level } of chip gain , which is settable , and which is then divided into analog or VGA gain values and digital gain values
OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH