{HEAD ~ STS 1 row counter counts pulses} of {TAIL ~ the STS 1 local clock signal} and generates a gapped STS 1 enable control signal, which is combined with the AIS/Idle bytecount enable control signal fed back to enable and disable the DS3 AIS/Idle code generation means for mapping DS3 AIS/Idle code bytes in the given row of the STS 1 frame 
{ HEAD ~ STS 1 row counter counts pulses } of { TAIL ~ the STS 1 local clock signal } and generates a gapped STS 1 enable control signal , which is combined with the AIS / Idle bytecount enable control signal fed back to enable and disable the DS3 AIS / Idle code generation means for mapping DS3 AIS / Idle code bytes in the given row of the STS 1 frame
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH