Disabling the output circuit following such a delay severs the potential current path between {TAIL ~ the internal operating voltage rails} of the integrated circuit and {HEAD ~ an external voltage source} coupled to the signal line via a pull up device 
Disabling the output circuit following such a delay severs the potential current path between { TAIL ~ the internal operating voltage rails } of the integrated circuit and { HEAD ~ an external voltage source } coupled to the signal line via a pull up device
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH