{TAIL ~ The means} for generating the fourth signal, at the first output of the level 2 comparator block, advantageously include an “OR” gate of which the outputs are connected to {HEAD ~ the first outputs} of the level 1 comparator blocks 
{ TAIL ~ The means } for generating the fourth signal , at the first output of the level 2 comparator block , advantageously include an “ OR ” gate of which the outputs are connected to { HEAD ~ the first outputs } of the level 1 comparator blocks
TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH