{TAIL ~ A source/drain impurity area} may be formed over a second silicon layer on {HEAD ~ both sides} of a gate electrode 
{ TAIL ~ A source / drain impurity area } may be formed over a second silicon layer on { HEAD ~ both sides } of a gate electrode
TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH