{HEAD ~ The portion} of the clock tree is coupled to receive {TAIL ~ the control signal} for collectively conditionally gating the plurality of clock, and is also configured to individually conditionally gate at least some of the plurality of clocks responsive to activity in the respective subcircuits of the execution circuit 
{ HEAD ~ The portion } of the clock tree is coupled to receive { TAIL ~ the control signal } for collectively conditionally gating the plurality of clock , and is also configured to individually conditionally gate at least some of the plurality of clocks responsive to activity in the respective subcircuits of the execution circuit
HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH REL REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH