A chip clock signal 1181 is connected to {TAIL ~ each} of {HEAD ~ the accumulators} 1175, 1176, 1777 and 1178, and causes the accumulators 1175, 1176, 1177 and 1178 to sample their inputs once each chip period 
A chip clock signal 1181 is connected to { TAIL ~ each } of { HEAD ~ the accumulators } 1175 , 1176 , 1777 and 1178 , and causes the accumulators 1175 , 1176 , 1177 and 1178 to sample their inputs once each chip period
OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH