{HEAD ~ The power regulating system} 1, wherein {TAIL ~ the regulator circuit} is implemented in silicon dye and mounted on a support substrate 
wherein
{ HEAD ~ The power regulating system } 1 , wherein { TAIL ~ the regulator circuit } is implemented in silicon dye and mounted on a support substrate
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH