{HEAD ~ A gate insulating layer}, a gate electrode, and {TAIL ~ a spacer} may be formed over a second silicon layer 
{ HEAD ~ A gate insulating layer } , a gate electrode , and { TAIL ~ a spacer } may be formed over a second silicon layer
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH