Only one additional mask is needed to fabricate this device in {TAIL ~ addition} to the others normally encountered in {HEAD ~ a VLSI logic process} 
Only one additional mask is needed to fabricate this device in { TAIL ~ addition } to the others normally encountered in { HEAD ~ a VLSI logic process }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD