in a first clock cycle, old data are latched into the cache memory sense amplifiers, while {HEAD ~ new data} are latched in {TAIL ~ the DRAM memory sense amplifiers}, 
are latched in
in a first clock cycle , old data are latched into the cache memory sense amplifiers , while { HEAD ~ new data } are latched in { TAIL ~ the DRAM memory sense amplifiers } ,
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH