a first multiplexer receiving as inputs an output of said first inverted XOR logic gate and {HEAD ~ an output} of {TAIL ~ said second inverted XOR gate}, 
of
a first multiplexer receiving as inputs an output of said first inverted XOR logic gate and { HEAD ~ an output } of { TAIL ~ said second inverted XOR gate } ,
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH