As shown in FIG 5, the regulator circuit 51 is controlled by {HEAD ~ three control buses 30a a}, thereby providing {TAIL ~ triple redundancy} 
providing
As shown in FIG 5 , the regulator circuit 51 is controlled by { HEAD ~ three control buses 30a a } , thereby providing { TAIL ~ triple redundancy }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL