The preferred embodiment circuit of FIG 2 combines the prior art circuit of FIG 1 with {HEAD ~ additional circuitry}, involving two falling edge 1 shots 34 and 36, and {TAIL ~ an SR flip flop} 38 
involving
The preferred embodiment circuit of FIG 2 combines the prior art circuit of FIG 1 with { HEAD ~ additional circuitry } , involving two falling edge 1 shots 34 and 36 , and { TAIL ~ an SR flip flop } 38
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH REL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH