{HEAD ~ The device} 1, further comprising a gate pad and {TAIL ~ a data pad} on the first substrate 
comprising
{ HEAD ~ The device } 1 , further comprising a gate pad and { TAIL ~ a data pad } on the first substrate
HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH REL OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH