In {TAIL ~ another embodiment}, {HEAD ~ the present invention} includes the steps of selectively coupling a logic signal on at least one input node to an intermediate node, applying bias to the intermediate node, and amplifying the logic signal on the intermediate node to an output node 
In
In { TAIL ~ another embodiment } , { HEAD ~ the present invention } includes the steps of selectively coupling a logic signal on at least one input node to an intermediate node , applying bias to the intermediate node , and amplifying the logic signal on the intermediate node to an output node
REL TAIL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH