{HEAD ~ The system} 10, wherein {TAIL ~ said memory device} includes a dynamic random access memory 
wherein
{ HEAD ~ The system } 10 , wherein { TAIL ~ said memory device } includes a dynamic random access memory
HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH