The suppression circuit may be a single varistor or a number of varistors in parallel with {TAIL ~ a number} of lines in {HEAD ~ the distribution circuit} 
The suppression circuit may be a single varistor or a number of varistors in parallel with { TAIL ~ a number } of lines in { HEAD ~ the distribution circuit }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD