Therefore, read data is supplied from {HEAD ~ a selected memory cell} such as {TAIL ~ Coo} via the sense amplifier 6 to the transition circuit 7 which transits the read data as output data DO to the output portion 82 of the I/O buffer 8 
such as
Therefore , read data is supplied from { HEAD ~ a selected memory cell } such as { TAIL ~ Coo } via the sense amplifier 6 to the transition circuit 7 which transits the read data as output data DO to the output portion 82 of the I / O buffer 8
OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH