{HEAD ~ A conductive layer} for {TAIL ~ a gate electrode} is formed over a resultant structure, and an etchback is performed on the conductive layer until the gate dielectric layer 14 is exposed, thereby forming a surround type gate electrode 15 surrounding the lower pillar 11C 
for
{ HEAD ~ A conductive layer } for { TAIL ~ a gate electrode } is formed over a resultant structure , and an etchback is performed on the conductive layer until the gate dielectric layer 14 is exposed , thereby forming a surround type gate electrode 15 surrounding the lower pillar 11C
HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH