Then the method includes applying a second voltage across the bitline BL and the sourceline SL and applying a second gate voltage across the gate of the semiconductor transistor 22 to allow the second voltage to form a second write current second time duration from the bitline BL to the sourceline SL and writing {HEAD ~ a second data state} to {TAIL ~ the resistive sense memory cell} 10 
to
Then the method includes applying a second voltage across the bitline BL and the sourceline SL and applying a second gate voltage across the gate of the semiconductor transistor 22 to allow the second voltage to form a second write current second time duration from the bitline BL to the sourceline SL and writing { HEAD ~ a second data state } to { TAIL ~ the resistive sense memory cell } 10
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH