making a pulse of a pulse width modulating signal rise synchronously with one of the first clock signal and the clock signal generated in step , and making the pulse of the pulse width modulating signal fall synchronously with a remaining one of the first clock signal and {HEAD ~ the clock signal} generated in {TAIL ~ step} ; and 
generated in
making a pulse of a pulse width modulating signal rise synchronously with one of the first clock signal and the clock signal generated in step , and making the pulse of the pulse width modulating signal fall synchronously with a remaining one of the first clock signal and { HEAD ~ the clock signal } generated in { TAIL ~ step } ; and
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL OTH OTH