The capacitor voltage is applied to {HEAD ~ the source} of {TAIL ~ the first FET}, the source of the second FET, and the bottom of the reference precision resistor acting as a virtual ground 
of
The capacitor voltage is applied to { HEAD ~ the source } of { TAIL ~ the first FET } , the source of the second FET , and the bottom of the reference precision resistor acting as a virtual ground
OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH