{TAIL ~ Memory controller} 801 within memory subsystem 800 receives a command from the address switch via unidirectional bus 802, also labeled as bus AInX, through {HEAD ~ a number} of latches FD 803, which is merely a fixed delay pipe 
{ TAIL ~ Memory controller } 801 within memory subsystem 800 receives a command from the address switch via unidirectional bus 802 , also labeled as bus AInX , through { HEAD ~ a number } of latches FD 803 , which is merely a fixed delay pipe
TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH