In another embodiment, the present invention includes the steps of selectively coupling a logic signal on at least one input node to an intermediate node, applying bias to the intermediate node, and amplifying {HEAD ~ the logic signal} on the intermediate node to {TAIL ~ an output node} 
to
In another embodiment , the present invention includes the steps of selectively coupling a logic signal on at least one input node to an intermediate node , applying bias to the intermediate node , and amplifying { HEAD ~ the logic signal } on the intermediate node to { TAIL ~ an output node }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL