The device 1 wherein the input conductors associated with each of the logic blocks receive {HEAD ~ signals} from {TAIL ~ the first set} of conductors 
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The device 1 wherein the input conductors associated with each of the logic blocks receive { HEAD ~ signals } from { TAIL ~ the first set } of conductors
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH