The apparatus 1 wherein said load bank comprises {TAIL ~ a plurality} of {HEAD ~ resistors} in selective parallel interconnection 
The apparatus 1 wherein said load bank comprises { TAIL ~ a plurality } of { HEAD ~ resistors } in selective parallel interconnection
OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH