{HEAD ~ The radiant energy analog} to {TAIL ~ digital converter stage} 1 wherein said gating means is an inverter logic device 
to
{ HEAD ~ The radiant energy analog } to { TAIL ~ digital converter stage } 1 wherein said gating means is an inverter logic device
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH