{HEAD ~ The output} of {TAIL ~ vector adder} 80, labeled RESULT, provides a data input to WT PORT1 
of
{ HEAD ~ The output } of { TAIL ~ vector adder } 80 , labeled RESULT , provides a data input to WT PORT1
HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH