The LDO regulator 1, further comprising an error amplifier that outputs a first gating signal controlling gating of the pass transistor, a voltage of {HEAD ~ the first gating signal} corresponding to {TAIL ~ a difference} between a reference voltage and a feedback voltage, the feedback voltage corresponding to a voltage of the output node 
corresponding to
The LDO regulator 1 , further comprising an error amplifier that outputs a first gating signal controlling gating of the pass transistor , a voltage of { HEAD ~ the first gating signal } corresponding to { TAIL ~ a difference } between a reference voltage and a feedback voltage , the feedback voltage corresponding to a voltage of the output node
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH