For example when input terminals 530 and 531 are both at logical 0 state, the input of {TAIL ~ NAND gate} 501 will both be at logic 1 state and line 537 will be at logical 0 state, which will be inverted to logic 1 state by inverter 511 at {HEAD ~ output terminal L0} 
For example when input terminals 530 and 531 are both at logical 0 state , the input of { TAIL ~ NAND gate } 501 will both be at logic 1 state and line 537 will be at logical 0 state , which will be inverted to logic 1 state by inverter 511 at { HEAD ~ output terminal L0 }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD