Moreover, the portion of the clock tree is configured to individually conditionally gate at least some of the plurality of clocks responsive to {HEAD ~ activity} in {TAIL ~ the respective subcircuits} of the execution circuit 
in
Moreover , the portion of the clock tree is configured to individually conditionally gate at least some of the plurality of clocks responsive to { HEAD ~ activity } in { TAIL ~ the respective subcircuits } of the execution circuit
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH