{HEAD ~ The device} 1, further comprising {TAIL ~ a gate pad} and a data pad on the first substrate 
comprising
{ HEAD ~ The device } 1 , further comprising { TAIL ~ a gate pad } and a data pad on the first substrate
HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH