In another embodiment, the present invention includes the steps of selectively coupling {TAIL ~ a logic signal} on at least one input node to an intermediate node, applying {HEAD ~ bias} to the intermediate node, and amplifying the logic signal on the intermediate node to an output node 
In another embodiment , the present invention includes the steps of selectively coupling { TAIL ~ a logic signal } on at least one input node to an intermediate node , applying { HEAD ~ bias } to the intermediate node , and amplifying the logic signal on the intermediate node to an output node
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH