{HEAD ~ An apparatus} and method for forming {TAIL ~ a HSG silicon layer} on a capacitor lower electrode of a semiconductor memory device 
for forming
{ HEAD ~ An apparatus } and method for forming { TAIL ~ a HSG silicon layer } on a capacitor lower electrode of a semiconductor memory device
HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH