In one embodiment, each memory cell constituted of the floating gate field effect transistor has a triple well structure in which {HEAD ~ a P well} that provides a channel region is formed via an N well on {TAIL ~ a P type semiconductor substrate} 
is formed on
In one embodiment , each memory cell constituted of the floating gate field effect transistor has a triple well structure in which { HEAD ~ a P well } that provides a channel region is formed via an N well on { TAIL ~ a P type semiconductor substrate }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH REL REL OTH OTH OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL