According to another embodiment of the present invention, the AGC circuit provides {HEAD ~ at least a minimum level} of chip gain, which is settable, and which is then divided into analog or VGA gain values and {TAIL ~ digital gain values} 
is divided into
According to another embodiment of the present invention , the AGC circuit provides { HEAD ~ at least a minimum level } of chip gain , which is settable , and which is then divided into analog or VGA gain values and { TAIL ~ digital gain values }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH REL OTH REL REL OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL