The video data accesses and {HEAD ~ transfers} are handled by {TAIL ~ a microprocessor} that interfaces with a controller by which an operator inputs instructions 
are handled by
The video data accesses and { HEAD ~ transfers } are handled by { TAIL ~ a microprocessor } that interfaces with a controller by which an operator inputs instructions
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH