The subsystem monitoring circuit includes a transfer count register which indicates how many data transfer cycles can be run in succession before the local CPU has to relinquish {HEAD ~ control} of {TAIL ~ the system bus} 
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The subsystem monitoring circuit includes a transfer count register which indicates how many data transfer cycles can be run in succession before the local CPU has to relinquish { HEAD ~ control } of { TAIL ~ the system bus }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL