The output of {HEAD ~ the adder} 12 is clocked into {TAIL ~ a latch} 14 by a system clock CLK 
The output of { HEAD ~ the adder } 12 is clocked into { TAIL ~ a latch } 14 by a system clock CLK
OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH