a first multiplexer receiving as inputs {HEAD ~ an output} of {TAIL ~ said first inverted XOR logic gate} and an output of said second inverted XOR gate, 
of
a first multiplexer receiving as inputs { HEAD ~ an output } of { TAIL ~ said first inverted XOR logic gate } and an output of said second inverted XOR gate ,
OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH