{HEAD ~ The memory device} 1, wherein K is two, and wherein a first control line is associated with a rising edge of the clock signal and {TAIL ~ a second control line} is associated with a falling edge of the clock signal 
wherein
{ HEAD ~ The memory device } 1 , wherein K is two , and wherein a first control line is associated with a rising edge of the clock signal and { TAIL ~ a second control line } is associated with a falling edge of the clock signal
HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH REL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH