{HEAD ~ A non volatile semiconductor memory device} that includes an address buffer block, {TAIL ~ a matrix} of memory cells, and an output buffer block 
includes
{ HEAD ~ A non volatile semiconductor memory device } that includes an address buffer block , { TAIL ~ a matrix } of memory cells , and an output buffer block
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH REL OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH