Multiple channels are accommodated via {HEAD ~ a channel interface}, also controlled by the microprocessor, between {TAIL ~ external video devices} and the random access memory 
Multiple channels are accommodated via { HEAD ~ a channel interface } , also controlled by the microprocessor , between { TAIL ~ external video devices } and the random access memory
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH