A method and apparatus for providing a meshed power and signal bus system on {HEAD ~ an array type integrated circuit} that minimizes {TAIL ~ the size} of the circuit 
minimizes
A method and apparatus for providing a meshed power and signal bus system on { HEAD ~ an array type integrated circuit } that minimizes { TAIL ~ the size } of the circuit
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH