{HEAD ~ The structure} 8 further including {TAIL ~ a third set} of switches for selectively reading out said signals from said first and second set of storage capacitors onto a set of output lines as line signals 
including
{ HEAD ~ The structure } 8 further including { TAIL ~ a third set } of switches for selectively reading out said signals from said first and second set of storage capacitors onto a set of output lines as line signals
HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH