Both program related exceptions and hardware errors are detected and, without being corrected by the hardware, flow down {HEAD ~ the pipeline} to {TAIL ~ a trap unit} where they are prioritized and handled via software 
to
Both program related exceptions and hardware errors are detected and , without being corrected by the hardware , flow down { HEAD ~ the pipeline } to { TAIL ~ a trap unit } where they are prioritized and handled via software
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH