{HEAD ~ Negative voltage} at {TAIL ~ node} 38 is obtained from a negative voltage appearing at node 25 for application to gates of pull up and pull down transistors 42 and 41, as is explained in more detail elsewhere herein 
at
{ HEAD ~ Negative voltage } at { TAIL ~ node } 38 is obtained from a negative voltage appearing at node 25 for application to gates of pull up and pull down transistors 42 and 41 , as is explained in more detail elsewhere herein
HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH