Alternatively, one or more edges of the routing area may coincide with {HEAD ~ one or more edges} of chips or {TAIL ~ circuit elements} 
of
Alternatively , one or more edges of the routing area may coincide with { HEAD ~ one or more edges } of chips or { TAIL ~ circuit elements }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL