A gate insulating layer, {HEAD ~ a gate electrode}, and a spacer may be formed over {TAIL ~ a second silicon layer} 
formed over
A gate insulating layer , { HEAD ~ a gate electrode } , and a spacer may be formed over { TAIL ~ a second silicon layer }
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL