In an IC implementing synchronous logic, {HEAD ~ a clock tree} distributes {TAIL ~ a clock signal} to many devices within an IC such as registers, latches and flip flops that are clocked by the clock signal 
distributes
In an IC implementing synchronous logic , { HEAD ~ a clock tree } distributes { TAIL ~ a clock signal } to many devices within an IC such as registers , latches and flip flops that are clocked by the clock signal
OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH