In another embodiment, {HEAD ~ a latency} of a DRAM or SRAM is adjusted based on {TAIL ~ the SPID} 
is adjusted based on
In another embodiment , { HEAD ~ a latency } of a DRAM or SRAM is adjusted based on { TAIL ~ the SPID }
OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH REL REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL