As described above, according to the invention, abnormalities in flatness occurring in {HEAD ~ the vicinity} of the center and in the peripheral edge portion of a ground surface of a wafer are restricted at the possible lowest level and a planarization or polishing method suited for correcting such abnormalities in flatness is used to correct and planarize the wafer and thereby a large effect can be achieved that semiconductor wafers each with high flatness are manufactured with {TAIL ~ good efficiency} 
As described above , according to the invention , abnormalities in flatness occurring in { HEAD ~ the vicinity } of the center and in the peripheral edge portion of a ground surface of a wafer are restricted at the possible lowest level and a planarization or polishing method suited for correcting such abnormalities in flatness is used to correct and planarize the wafer and thereby a large effect can be achieved that semiconductor wafers each with high flatness are manufactured with { TAIL ~ good efficiency }
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