a silicon nitride liner on {HEAD ~ the sidewalls} and on {TAIL ~ the top surface} of each gate electrode 
a silicon nitride liner on { HEAD ~ the sidewalls } and on { TAIL ~ the top surface } of each gate electrode
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH