{HEAD ~ The memory management MMW} transmits {TAIL ~ the MMW configuration signal} to the identified interface MMW transceiver and the MMW transceivers of the memory modules 
transmits
{ HEAD ~ The memory management MMW } transmits { TAIL ~ the MMW configuration signal } to the identified interface MMW transceiver and the MMW transceivers of the memory modules
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH