In response to the active signal on {TAIL ~ terminal R}, {HEAD ~ SR flip flop} generates an active signal on output terminal Q and an inactive signal on output terminal Q 
In response to the active signal on { TAIL ~ terminal R } , { HEAD ~ SR flip flop } generates an active signal on output terminal Q and an inactive signal on output terminal Q
OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH