A first wire in {TAIL ~ the two wire output port} is {HEAD ~ a data wire} and a second wire in said the wire output port is a clock wire 
A first wire in { TAIL ~ the two wire output port } is { HEAD ~ a data wire } and a second wire in said the wire output port is a clock wire
OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH