The period {HEAD ~ T0} to {TAIL ~ T5} covers approximately 133 milliseconds during which approximately 266 pulses are generated by the controller unit 66 and passed to the transistor switch 64 
to
The period { HEAD ~ T0 } to { TAIL ~ T5 } covers approximately 133 milliseconds during which approximately 266 pulses are generated by the controller unit 66 and passed to the transistor switch 64
OTH OTH HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH