The circuit 1 in which the interpreter means comprises a microprocessor for evaluating the binary states of {TAIL ~ the input signal} and the beginning and end of the counting interval and adjusting the pulse count in {HEAD ~ response} 
The circuit 1 in which the interpreter means comprises a microprocessor for evaluating the binary states of { TAIL ~ the input signal } and the beginning and end of the counting interval and adjusting the pulse count in { HEAD ~ response }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD