{HEAD ~ A first wire} in {TAIL ~ the two wire output port} is a data wire and a second wire in said the wire output port is a clock wire 
in
{ HEAD ~ A first wire } in { TAIL ~ the two wire output port } is a data wire and a second wire in said the wire output port is a clock wire
HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH