Digital processor has {HEAD ~ program circuit} to periodically read and square {TAIL ~ the digital representation} at a given rate, register for summing a number N of square digital representations to give a summed value, and an algorithm for periodically dividing the summed value by the number N to provide a quotient and then taking the square root of said quotient to thereby digitally construct rms signal representing the root mean square of the weld current 
to periodically square
Digital processor has { HEAD ~ program circuit } to periodically read and square { TAIL ~ the digital representation } at a given rate , register for summing a number N of square digital representations to give a summed value , and an algorithm for periodically dividing the summed value by the number N to provide a quotient and then taking the square root of said quotient to thereby digitally construct rms signal representing the root mean square of the weld current
OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL REL OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH