The LSSD scan paths of {HEAD ~ each logic circuit chip} on {TAIL ~ a circuit module} are connected to additional test circuit chips on the same module 
The LSSD scan paths of { HEAD ~ each logic circuit chip } on { TAIL ~ a circuit module } are connected to additional test circuit chips on the same module
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH