{HEAD ~ The switch block circuit} further includes {TAIL ~ a selection unit} for correspondingly connecting the second group memories with the second group switching transistors depending on an operation mode 
includes
{ HEAD ~ The switch block circuit } further includes { TAIL ~ a selection unit } for correspondingly connecting the second group memories with the second group switching transistors depending on an operation mode
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH