Provided is a manufacturing process for a semiconductor wafer according to which semiconductor wafers {HEAD ~ each} with higher flatness can be manufactured with good efficiency from a wafer work having passed through a surface grinding step by enabling restriction of reduction in flatness in {TAIL ~ the vicinity} of the center and in the outer peripheral edge portion of a surface ground wafer at the lowest level possible, and correction of the reduction in flatness of both portions with ease to planarize in a planarization or polishing step 
Provided is a manufacturing process for a semiconductor wafer according to which semiconductor wafers { HEAD ~ each } with higher flatness can be manufactured with good efficiency from a wafer work having passed through a surface grinding step by enabling restriction of reduction in flatness in { TAIL ~ the vicinity } of the center and in the outer peripheral edge portion of a surface ground wafer at the lowest level possible , and correction of the reduction in flatness of both portions with ease to planarize in a planarization or polishing step
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