In {HEAD ~ one embodiment}, the apparatus includes {TAIL ~ a buffer} and a routing data generation circuit 
In { HEAD ~ one embodiment } , the apparatus includes { TAIL ~ a buffer } and a routing data generation circuit
OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH