In the illustrated embodiment {HEAD ~ the video data acquisition signals} includes a horizontal reset, a vertical reset, a field, a write enable and {TAIL ~ a pixel clock signal} 
includes
In the illustrated embodiment { HEAD ~ the video data acquisition signals } includes a horizontal reset , a vertical reset , a field , a write enable and { TAIL ~ a pixel clock signal }
OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL