Alternatively, one or more edges of {TAIL ~ the routing area} may coincide with one or more edges of chips or {HEAD ~ circuit elements} 
Alternatively , one or more edges of { TAIL ~ the routing area } may coincide with one or more edges of chips or { HEAD ~ circuit elements }
OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD