The result is {HEAD ~ an ability} to share {TAIL ~ fuse circuitry} in multi ported memory devices 
to share
The result is { HEAD ~ an ability } to share { TAIL ~ fuse circuitry } in multi ported memory devices
OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH