In operation, {HEAD ~ USB host} 12 may provide {TAIL ~ the VBUS power signal} 24, as well as the other three USB signals  
provide
In operation , { HEAD ~ USB host } 12 may provide { TAIL ~ the VBUS power signal } 24 , as well as the other three USB signals
OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH