In some embodiments, {HEAD ~ instructions} may be used to control or access {TAIL ~ the attribute bits} that do not have an associated cache memory operation, such as load or store 
used to access
In some embodiments , { HEAD ~ instructions } may be used to control or access { TAIL ~ the attribute bits } that do not have an associated cache memory operation , such as load or store
OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD OTH OTH REL REL OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH