The control signal is asserted by a control circuit following {HEAD ~ the detection} of {TAIL ~ a logic high signal} of a predetermined duration at the external signal connection point 
of
The control signal is asserted by a control circuit following { HEAD ~ the detection } of { TAIL ~ a logic high signal } of a predetermined duration at the external signal connection point
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH