comparison means responsive to the logical addresses read out from said register and said {HEAD ~ TLB} for comparing {TAIL ~ the logical addresses} in said set having been read out with a portion of said logical address in said register, 
for comparing
comparison means responsive to the logical addresses read out from said register and said { HEAD ~ TLB } for comparing { TAIL ~ the logical addresses } in said set having been read out with a portion of said logical address in said register ,
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH