This disclosure describes {HEAD ~ a snooping coherency protocol} for {TAIL ~ a multiprocessor network} wherein every processor has its own private cache and bus interface means and the network is connected via a common system bus 
for
This disclosure describes { HEAD ~ a snooping coherency protocol } for { TAIL ~ a multiprocessor network } wherein every processor has its own private cache and bus interface means and the network is connected via a common system bus
OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH