According to one or more embodiments, the {HEAD ~ IOM} 13 in processor 10 includes {TAIL ~ additional circuits} and logic that facilitate efficiently flushing the lower pipeline upon discovery of a mispredicted branch instruction 
includes
According to one or more embodiments , the { HEAD ~ IOM } 13 in processor 10 includes { TAIL ~ additional circuits } and logic that facilitate efficiently flushing the lower pipeline upon discovery of a mispredicted branch instruction
OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH