{HEAD ~ A second address compare circuit} compares {TAIL ~ a second received address} for the second memory with the first redundant address 
compares
{ HEAD ~ A second address compare circuit } compares { TAIL ~ a second received address } for the second memory with the first redundant address
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH