{TAIL ~ The first subcircuit} and the third subcircuit are configured to pull the first node and the second node, respectively, to a common precharge voltage in response to a first state of {HEAD ~ the clock signal} in order to pass the clock signal 
{ TAIL ~ The first subcircuit } and the third subcircuit are configured to pull the first node and the second node , respectively , to a common precharge voltage in response to a first state of { HEAD ~ the clock signal } in order to pass the clock signal
TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH