Only one additional mask is needed to fabricate this device in {HEAD ~ addition} to {TAIL ~ the others} normally encountered in a VLSI logic process 
to
Only one additional mask is needed to fabricate this device in { HEAD ~ addition } to { TAIL ~ the others } normally encountered in a VLSI logic process
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH