The LSSD scan paths of each logic circuit chip on {TAIL ~ a circuit module} are connected to additional test circuit chips on {HEAD ~ the same module} 
The LSSD scan paths of each logic circuit chip on { TAIL ~ a circuit module } are connected to additional test circuit chips on { HEAD ~ the same module }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD