a buffer insulating layer between the silicon nitride liner and {TAIL ~ the self aligned contact pad} at {HEAD ~ the top portions} of the first and second gate electrodes, 
a buffer insulating layer between the silicon nitride liner and { TAIL ~ the self aligned contact pad } at { HEAD ~ the top portions } of the first and second gate electrodes ,
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH