{HEAD ~ The burn} in limiting video processor 1, where {TAIL ~ the analysis logic} and the modification logic are embodied on a common integrated circuit 
{ HEAD ~ The burn } in limiting video processor 1 , where { TAIL ~ the analysis logic } and the modification logic are embodied on a common integrated circuit
HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH