{HEAD ~ A clock buffer} in a semiconductor memory device includes {TAIL ~ two kinds} of interface circuits, i.e., an LVTTL interface and an SSTL interface 
includes
{ HEAD ~ A clock buffer } in a semiconductor memory device includes { TAIL ~ two kinds } of interface circuits , i.e. , an LVTTL interface and an SSTL interface
HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH