A semiconductor memory device includes {HEAD ~ different types} of {TAIL ~ memory matrices} adjacently arranged such that bit lines are aligned in the same cell matrix region, a column decoder for selecting the bit lines of the memory matrix, and a row decoder for selecting the row lines of the memory matrix 
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A semiconductor memory device includes { HEAD ~ different types } of { TAIL ~ memory matrices } adjacently arranged such that bit lines are aligned in the same cell matrix region , a column decoder for selecting the bit lines of the memory matrix , and a row decoder for selecting the row lines of the memory matrix
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH