Each of the pixels includes a first switching device connected to a first gate line of {TAIL ~ the plurality} of first gate lines, and one of a first data line of the plurality of data lines and a first dummy data line of the plurality of dummy data lines; and a second switching device connected to {HEAD ~ a second gate line} of the plurality of second gate lines, and the other one of first data line of the plurality of data lines and the first dummy data line of the plurality of dummy data lines 
Each of the pixels includes a first switching device connected to a first gate line of { TAIL ~ the plurality } of first gate lines , and one of a first data line of the plurality of data lines and a first dummy data line of the plurality of dummy data lines ; and a second switching device connected to { HEAD ~ a second gate line } of the plurality of second gate lines , and the other one of first data line of the plurality of data lines and the first dummy data line of the plurality of dummy data lines
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH