Although each bit of the transmitted data is kept output during the time period from the asserting edge AG to the next asserting edge AG of the transmission clock signal SCLKO, {HEAD ~ the holding interval T} of the final bit is determined by {TAIL ~ the holding interval decision register} 9 
is determined by
Although each bit of the transmitted data is kept output during the time period from the asserting edge AG to the next asserting edge AG of the transmission clock signal SCLKO , { HEAD ~ the holding interval T } of the final bit is determined by { TAIL ~ the holding interval decision register } 9
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH