A method of specifying a gate array integrated circuit to include {HEAD ~ a plurality} of {TAIL ~ independently operating circuit blocks} is also disclosed 
of
A method of specifying a gate array integrated circuit to include { HEAD ~ a plurality } of { TAIL ~ independently operating circuit blocks } is also disclosed
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH