{HEAD ~ A heterogeneous integrated circuit} having a digital signal processor and {TAIL ~ at least one programmable logic core} 
having
{ HEAD ~ A heterogeneous integrated circuit } having a digital signal processor and { TAIL ~ at least one programmable logic core }
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL