In one architecture, a memory device includes {HEAD ~ a memory array} for storing {TAIL ~ data values}, multiple sensing circuits, multiple control lines, and an I/O pad 
for storing
In one architecture , a memory device includes { HEAD ~ a memory array } for storing { TAIL ~ data values } , multiple sensing circuits , multiple control lines , and an I / O pad
OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH