The apparatus 8 wherein {TAIL ~ the test control signal} is a test mode select signal and the module test control signal is {HEAD ~ a module test mode select signal} 
The apparatus 8 wherein { TAIL ~ the test control signal } is a test mode select signal and the module test control signal is { HEAD ~ a module test mode select signal }
OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD