In a presently preferred embodiment of the invention, {HEAD ~ an IC chip} is mounted and interconnected with {TAIL ~ a multilayer printed circuit board}, to effect a Level 2 interconnect, without a ceramic chip package, soldered wires, special tooling or special labor 
is mounted with
In a presently preferred embodiment of the invention , { HEAD ~ an IC chip } is mounted and interconnected with { TAIL ~ a multilayer printed circuit board } , to effect a Level 2 interconnect , without a ceramic chip package , soldered wires , special tooling or special labor
OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH