{HEAD ~ A first data switch} is selectively coupled to a first terminal of {TAIL ~ the first capacitor} and one of the data lines 
{ HEAD ~ A first data switch } is selectively coupled to a first terminal of { TAIL ~ the first capacitor } and one of the data lines
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH