Upon the determination of a branch misprediction, a processor may ease the task of flushing {HEAD ~ its pipeline} of erroneously fetched and speculatively executed instructions by {TAIL ~ continuing normal execution} for only several cycles, and utilizing existing hardware that handles pipeline flushes in the event of exceptions 
by
Upon the determination of a branch misprediction , a processor may ease the task of flushing { HEAD ~ its pipeline } of erroneously fetched and speculatively executed instructions by { TAIL ~ continuing normal execution } for only several cycles , and utilizing existing hardware that handles pipeline flushes in the event of exceptions
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH