{HEAD ~ An arithmetic logic unit} is arranged to receive the signals from the registers and to add {TAIL ~ the numbers} together to form a resultant 
is arranged to add
{ HEAD ~ An arithmetic logic unit } is arranged to receive the signals from the registers and to add { TAIL ~ the numbers } together to form a resultant
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL OTH OTH OTH OTH OTH OTH OTH OTH REL REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH