{HEAD ~ A method} of making {TAIL ~ an IGFET} with a selectively doped multilevel polysilicon gate that includes upper and lower polysilicon gate levels is disclosed 
of making
{ HEAD ~ A method } of making { TAIL ~ an IGFET } with a selectively doped multilevel polysilicon gate that includes upper and lower polysilicon gate levels is disclosed
HEAD HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH