The upper pipeline is flushed upon detecting that a branch instruction was mispredicted, minimizing the delay in {HEAD ~ fetching} of instructions from {TAIL ~ the correct branch target address} 
The upper pipeline is flushed upon detecting that a branch instruction was mispredicted , minimizing the delay in { HEAD ~ fetching } of instructions from { TAIL ~ the correct branch target address }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL