Moreover, the portion of the clock tree is configured to individually conditionally gate at least some of the plurality of {TAIL ~ clocks} responsive to {HEAD ~ activity} in the respective subcircuits of the execution circuit 
Moreover , the portion of the clock tree is configured to individually conditionally gate at least some of the plurality of { TAIL ~ clocks } responsive to { HEAD ~ activity } in the respective subcircuits of the execution circuit
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL OTH OTH HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH