According to one aspect of the present invention, a delay circuit delays an internal vertical synchronization signal, and there by the timing of an internal horizontal synchronization signal and an internal vertical synchronization signal can be shifted by {HEAD ~ a predetermined short period} of {TAIL ~ time} 
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According to one aspect of the present invention , a delay circuit delays an internal vertical synchronization signal , and there by the timing of an internal horizontal synchronization signal and an internal vertical synchronization signal can be shifted by { HEAD ~ a predetermined short period } of { TAIL ~ time }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL