The width of the non conductive region, designated Ls in FIG 3, is selected to increase the base width of the parasitic NPN bipolar transistor 39 while preserving {HEAD ~ the surface area} of {TAIL ~ the device} 
of
The width of the non conductive region , designated Ls in FIG 3 , is selected to increase the base width of the parasitic NPN bipolar transistor 39 while preserving { HEAD ~ the surface area } of { TAIL ~ the device }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL