Therefore, the P channel MOS transistor P1 in each of {HEAD ~ all the driver/decoder units} 12 1, 12 2, . . . 12 n enters the off state, and the N channel MOS transistor N1 enters {TAIL ~ the on state} 
Therefore , the P channel MOS transistor P1 in each of { HEAD ~ all the driver / decoder units } 12 1 , 12 2 , . . . 12 n enters the off state , and the N channel MOS transistor N1 enters { TAIL ~ the on state }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL