{HEAD ~ The capacitor voltage} generated by {TAIL ~ the filter capacitor} sets the bias point of the second FET such that the second FET comprises characteristics of an integrated precision resistor 
generated by
{ HEAD ~ The capacitor voltage } generated by { TAIL ~ the filter capacitor } sets the bias point of the second FET such that the second FET comprises characteristics of an integrated precision resistor
HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH