Flexible VLSI architecture implements of {HEAD ~ MPEG video processing unit} for encoding and {TAIL ~ decoding} 
for
Flexible VLSI architecture implements of { HEAD ~ MPEG video processing unit } for encoding and { TAIL ~ decoding }
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL OTH OTH TAIL TAIL TAIL TAIL TAIL