The above described signals enable {HEAD ~ the write module} to continuously write {TAIL ~ as many blocks} into the memory as can be accommodated therein and enable the read module to continuously read as many blocks of data as are available in the memory 
to continuously write
The above described signals enable { HEAD ~ the write module } to continuously write { TAIL ~ as many blocks } into the memory as can be accommodated therein and enable the read module to continuously read as many blocks of data as are available in the memory
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH