{TAIL ~ The switch block circuit} further includes a selection unit for correspondingly connecting {HEAD ~ the second group memories} with the second group switching transistors depending on an operation mode 
{ TAIL ~ The switch block circuit } further includes a selection unit for correspondingly connecting { HEAD ~ the second group memories } with the second group switching transistors depending on an operation mode
TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH