The latched binary states of the input signal and the pulse count of the digital counter are evaluated by {HEAD ~ an interpreter} such as logic circuitry or {TAIL ~ a microprocessor} 
such as
The latched binary states of the input signal and the pulse count of the digital counter are evaluated by { HEAD ~ an interpreter } such as logic circuitry or { TAIL ~ a microprocessor }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL REL OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL