{HEAD ~ The issue circuit} issues {TAIL ~ an instruction} to the execution circuit, and generates a control signal responsive to whether or not the instruction is issued to the execution circuit 
issues
{ HEAD ~ The issue circuit } issues { TAIL ~ an instruction } to the execution circuit , and generates a control signal responsive to whether or not the instruction is issued to the execution circuit
HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH