wherein the comparator compares {HEAD ~ the reference voltage} with {TAIL ~ the single ended signal} to generate the comparison output signal 
with
wherein the comparator compares { HEAD ~ the reference voltage } with { TAIL ~ the single ended signal } to generate the comparison output signal
OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH