{HEAD ~ The output} of the adder 12 is clocked into a latch 14 by {TAIL ~ a system clock} CLK 
is clocked by
{ HEAD ~ The output } of the adder 12 is clocked into a latch 14 by { TAIL ~ a system clock } CLK
HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH REL REL OTH OTH OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH