In this embodiment the memory control means includes a lock having a counter for registering {HEAD ~ the number} of {TAIL ~ control pulses} received, and gating means connected to control application of clock signals to the shift register 
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In this embodiment the memory control means includes a lock having a counter for registering { HEAD ~ the number } of { TAIL ~ control pulses } received , and gating means connected to control application of clock signals to the shift register
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH