In addition, a bus arbiter in {HEAD ~ the node controller} parks a data bus towards {TAIL ~ a memory subsystem} 
In addition , a bus arbiter in { HEAD ~ the node controller } parks a data bus towards { TAIL ~ a memory subsystem }
OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL