The circuit 14 further comprising an inverter coupled between {TAIL ~ a control node} of {HEAD ~ the first transistor} and a control node of the second transistor 
The circuit 14 further comprising an inverter coupled between { TAIL ~ a control node } of { HEAD ~ the first transistor } and a control node of the second transistor
OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH