The structure 8 further including a third set of {TAIL ~ switches} for selectively reading out said {HEAD ~ signals} from said first and second set of storage capacitors onto a set of output lines as line signals 
The structure 8 further including a third set of { TAIL ~ switches } for selectively reading out said { HEAD ~ signals } from said first and second set of storage capacitors onto a set of output lines as line signals
OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH