A further technical advantage of the invention is its compatibility with a VLSI logic process in which other, {HEAD ~ lower power devices} are made simultaneously in {TAIL ~ the same chip} 
are made simultaneously in
A further technical advantage of the invention is its compatibility with a VLSI logic process in which other , { HEAD ~ lower power devices } are made simultaneously in { TAIL ~ the same chip }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL