In {HEAD ~ addition}, {TAIL ~ a bus arbiter} in the node controller parks a data bus towards a memory subsystem 
In { HEAD ~ addition } , { TAIL ~ a bus arbiter } in the node controller parks a data bus towards a memory subsystem
OTH HEAD HEAD HEAD HEAD HEAD OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH