The processes and logic flows can also be performed by, and {TAIL ~ apparatus} of the invention can be implemented as, special purpose logic circuitry, {HEAD ~ e.g., an FPGA} or an ASIC  
The processes and logic flows can also be performed by , and { TAIL ~ apparatus } of the invention can be implemented as , special purpose logic circuitry , { HEAD ~ e.g. , an FPGA } or an ASIC
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH