{HEAD ~ A gate insulating layer}, a gate electrode, and a spacer may be formed over {TAIL ~ a second silicon layer} 
formed over
{ HEAD ~ A gate insulating layer } , a gate electrode , and a spacer may be formed over { TAIL ~ a second silicon layer }
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL