In another, embodiment, {HEAD ~ the sync mark detector} processes {TAIL ~ the even and odd interleaves} of the detected bit sequence in parallel, and the current state of the state machine initializes the sync mark detector rather than enable its output 
processes
In another , embodiment , { HEAD ~ the sync mark detector } processes { TAIL ~ the even and odd interleaves } of the detected bit sequence in parallel , and the current state of the state machine initializes the sync mark detector rather than enable its output
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH