According to a preferred embodiment of the invention, a shift register is used for the memory means, with {HEAD ~ data} being serially loaded in {TAIL ~ the shift register} for storage 
serially loaded in
According to a preferred embodiment of the invention , a shift register is used for the memory means , with { HEAD ~ data } being serially loaded in { TAIL ~ the shift register } for storage
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD OTH REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH