In response to writing to the control register, a clock signal on a clock input line to {HEAD ~ the dedicated diagnostic data port} is coupled to {TAIL ~ the second wire}, and is used to serially shift the stored information from the serially connected memory to the data wire 
In response to writing to the control register , a clock signal on a clock input line to { HEAD ~ the dedicated diagnostic data port } is coupled to { TAIL ~ the second wire } , and is used to serially shift the stored information from the serially connected memory to the data wire
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH