{HEAD ~ The present invention} provides {TAIL ~ a memory controller} for a double data rate synchronous dynamic random access memory  
provides
{ HEAD ~ The present invention } provides { TAIL ~ a memory controller } for a double data rate synchronous dynamic random access memory
HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH