According to {HEAD ~ one embodiment} of the invention, a method for simulating {TAIL ~ the operation} of an integrated circuit is provided 
According to { HEAD ~ one embodiment } of the invention , a method for simulating { TAIL ~ the operation } of an integrated circuit is provided
OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH