The memory sharing arrangement provides {HEAD ~ a separate high speed data transfer mechanism} between the PLCs and {TAIL ~ the DSP} 
between
The memory sharing arrangement provides { HEAD ~ a separate high speed data transfer mechanism } between the PLCs and { TAIL ~ the DSP }
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL