Form over a substrate {HEAD ~ the combination} of a gate oxide layer and {TAIL ~ a gate layer} patterned into gate stacks with sidewalls for an NMOS FET device over a P well in the substrate and a PMOS FET device over an N well 
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Form over a substrate { HEAD ~ the combination } of a gate oxide layer and { TAIL ~ a gate layer } patterned into gate stacks with sidewalls for an NMOS FET device over a P well in the substrate and a PMOS FET device over an N well
OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH