A1 A4 and A1 b A4 b shown in FIG 3 indicate {TAIL ~ potentials} of {HEAD ~ signals} inputted into the wirings A A4 and the wirings A1 b A4 b 
A1 A4 and A1 b A4 b shown in FIG 3 indicate { TAIL ~ potentials } of { HEAD ~ signals } inputted into the wirings A A4 and the wirings A1 b A4 b
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH