In {HEAD ~ addition}, a bus arbiter in {TAIL ~ the node controller} parks a data bus towards a memory subsystem 
In { HEAD ~ addition } , a bus arbiter in { TAIL ~ the node controller } parks a data bus towards a memory subsystem
OTH HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH