a second DAC for outputting a second control voltage corresponding to {HEAD ~ a second digital value} representative of {TAIL ~ a phase delay}; and 
representative of
a second DAC for outputting a second control voltage corresponding to { HEAD ~ a second digital value } representative of { TAIL ~ a phase delay } ; and
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH