a second DAC for outputting a second control voltage corresponding to {TAIL ~ a second digital value} representative of {HEAD ~ a phase delay}; and 
a second DAC for outputting a second control voltage corresponding to { TAIL ~ a second digital value } representative of { HEAD ~ a phase delay } ; and
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH