Upon {TAIL ~ the determination} of a branch misprediction, a processor may ease the task of flushing its pipeline of {HEAD ~ erroneously fetched and speculatively executed instructions} by continuing normal execution for only several cycles, and utilizing existing hardware that handles pipeline flushes in the event of exceptions 
Upon { TAIL ~ the determination } of a branch misprediction , a processor may ease the task of flushing its pipeline of { HEAD ~ erroneously fetched and speculatively executed instructions } by continuing normal execution for only several cycles , and utilizing existing hardware that handles pipeline flushes in the event of exceptions
OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH