{HEAD ~ The first unit} connectable to the wafer voltage source Vb and {TAIL ~ the second unit} connectable to a third, collector voltage source Vc 
{ HEAD ~ The first unit } connectable to the wafer voltage source Vb and { TAIL ~ the second unit } connectable to a third , collector voltage source Vc
HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH