{HEAD ~ A logic circuit} is disclosed that is tolerant of logic signals with {TAIL ~ voltages} different from the voltage of the logic circuit power supply 
{ HEAD ~ A logic circuit } is disclosed that is tolerant of logic signals with { TAIL ~ voltages } different from the voltage of the logic circuit power supply
HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH