In some embodiments, instructions may be used to control or access {TAIL ~ the attribute bits} that do not have {HEAD ~ an associated cache memory operation}, such as load or store 
In some embodiments , instructions may be used to control or access { TAIL ~ the attribute bits } that do not have { HEAD ~ an associated cache memory operation } , such as load or store
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH