{TAIL ~ The phase} of a memory clock signal is adjusted by advancing and delaying {HEAD ~ the phase} 
{ TAIL ~ The phase } of a memory clock signal is adjusted by advancing and delaying { HEAD ~ the phase }
TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD