The differential amplifier 60, wherein the main differential amplifier includes a second differential pair including a fifth transistor and a sixth transistor, the second differential pair, wherein {HEAD ~ the second differential pair} is adapted to receive {TAIL ~ the shifted differential voltage signal} to generate the output signal 
is adapted to receive
The differential amplifier 60 , wherein the main differential amplifier includes a second differential pair including a fifth transistor and a sixth transistor , the second differential pair , wherein { HEAD ~ the second differential pair } is adapted to receive { TAIL ~ the shifted differential voltage signal } to generate the output signal
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH