The process 9, wherein {HEAD ~ the gate electrode} comprises {TAIL ~ in situ doped polysilicon} 
comprises
The process 9 , wherein { HEAD ~ the gate electrode } comprises { TAIL ~ in situ doped polysilicon }
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL