Only one additional mask is needed to fabricate this device in addition to {HEAD ~ the others} normally encountered in {TAIL ~ a VLSI logic process} 
normally encountered in
Only one additional mask is needed to fabricate this device in addition to { HEAD ~ the others } normally encountered in { TAIL ~ a VLSI logic process }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL