Still alternatively, {HEAD ~ thebody} of {TAIL ~ the selected transistor} from the pair is connected to both the gate of one inverter and the drain of the other inverter 
of
Still alternatively , { HEAD ~ thebody } of { TAIL ~ the selected transistor } from the pair is connected to both the gate of one inverter and the drain of the other inverter
OTH OTH OTH HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH