In a preferred embodiment {HEAD ~ the DS3 byte counter} comprises a plurality of flip flops and associated combinatorial logic for counting the DS3 AIS/Idle code bytes, and has {TAIL ~ combinatorial logic} for receiving inputs from the plurality of flip flops for generating an AIS/Idle bytecount enable control signal 
has
In a preferred embodiment { HEAD ~ the DS3 byte counter } comprises a plurality of flip flops and associated combinatorial logic for counting the DS3 AIS / Idle code bytes , and has { TAIL ~ combinatorial logic } for receiving inputs from the plurality of flip flops for generating an AIS / Idle bytecount enable control signal
OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH