{TAIL ~ A DC regulator} 1 wherein {HEAD ~ said first switching means} further comprises a first three electrode FET transistor operatively connected as a switching device across said fourth terminal and said second terminal 
{ TAIL ~ A DC regulator } 1 wherein { HEAD ~ said first switching means } further comprises a first three electrode FET transistor operatively connected as a switching device across said fourth terminal and said second terminal
TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH