An interpolation circuit generates a plurality of intermediate amplitude values linearly related to two consecutive signal amplitude values using {HEAD ~ a system} of adders and {TAIL ~ memory elements} 
of
An interpolation circuit generates a plurality of intermediate amplitude values linearly related to two consecutive signal amplitude values using { HEAD ~ a system } of adders and { TAIL ~ memory elements }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL