The circuit 1 in which {HEAD ~ the interpreter} means comprises a microprocessor for evaluating the binary states of the input signal and the beginning and end of the counting interval and adjusting {TAIL ~ the pulse count} in response 
The circuit 1 in which { HEAD ~ the interpreter } means comprises a microprocessor for evaluating the binary states of the input signal and the beginning and end of the counting interval and adjusting { TAIL ~ the pulse count } in response
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH