{HEAD ~ The phase} of {TAIL ~ a memory clock signal} is adjusted by advancing and delaying the phase 
of
{ HEAD ~ The phase } of { TAIL ~ a memory clock signal } is adjusted by advancing and delaying the phase
HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH