The semiconductor structure 3 wherein the electrical isolation of the source and drain regions comprises {HEAD ~ a dielectric region} partly surrounding the regions and {TAIL ~ a dielectric layer} under each of the regions 
partly surrounding
The semiconductor structure 3 wherein the electrical isolation of the source and drain regions comprises { HEAD ~ a dielectric region } partly surrounding the regions and { TAIL ~ a dielectric layer } under each of the regions
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH