The circuit 1 in which the interpreter means comprises a microprocessor for evaluating the binary states of the input signal and the beginning and end of the counting interval and adjusting {HEAD ~ the pulse count} in {TAIL ~ response} 
in
The circuit 1 in which the interpreter means comprises a microprocessor for evaluating the binary states of the input signal and the beginning and end of the counting interval and adjusting { HEAD ~ the pulse count } in { TAIL ~ response }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL