The device 1, further comprising a gate pad and {HEAD ~ a data pad} on {TAIL ~ the first substrate} 
on
The device 1 , further comprising a gate pad and { HEAD ~ a data pad } on { TAIL ~ the first substrate }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL