In {TAIL ~ one embodiment}, {HEAD ~ the apparatus} includes a buffer and a routing data generation circuit 
In
In { TAIL ~ one embodiment } , { HEAD ~ the apparatus } includes a buffer and a routing data generation circuit
REL TAIL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH