The circuit 14 further comprising an inverter coupled between a control node of {HEAD ~ the first transistor} and {TAIL ~ a control node} of the second transistor 
The circuit 14 further comprising an inverter coupled between a control node of { HEAD ~ the first transistor } and { TAIL ~ a control node } of the second transistor
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH