In the illustrated embodiment, the least significant bit of each submask corresponds to port of {TAIL ~ exit} 634, and the most significant bit corresponds to {HEAD ~ port} of exit 646 
In the illustrated embodiment , the least significant bit of each submask corresponds to port of { TAIL ~ exit } 634 , and the most significant bit corresponds to { HEAD ~ port } of exit 646
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD OTH OTH OTH