Upon the determination of a branch misprediction, a processor may ease {HEAD ~ the task} of flushing {TAIL ~ its pipeline} of erroneously fetched and speculatively executed instructions by continuing normal execution for only several cycles, and utilizing existing hardware that handles pipeline flushes in the event of exceptions 
of flushing
Upon the determination of a branch misprediction , a processor may ease { HEAD ~ the task } of flushing { TAIL ~ its pipeline } of erroneously fetched and speculatively executed instructions by continuing normal execution for only several cycles , and utilizing existing hardware that handles pipeline flushes in the event of exceptions
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH