{TAIL ~ The circuit} 1 in which the interpreter means comprises a microprocessor for evaluating {HEAD ~ the binary states} of the input signal and the beginning and end of the counting interval and adjusting the pulse count in response 
{ TAIL ~ The circuit } 1 in which the interpreter means comprises a microprocessor for evaluating { HEAD ~ the binary states } of the input signal and the beginning and end of the counting interval and adjusting the pulse count in response
TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH