A separate translation look aside buffer is connected to each cache memory, with the TLB connected to {HEAD ~ the cache memory} storing {TAIL ~ instructions} operating to translate logical addresses to real addresses in the MMU storing instructions, while the TLB connected to the cache memory storing operand data operating to translate logical addresses to real addresses in the MMU storing operand data 
storing
A separate translation look aside buffer is connected to each cache memory , with the TLB connected to { HEAD ~ the cache memory } storing { TAIL ~ instructions } operating to translate logical addresses to real addresses in the MMU storing instructions , while the TLB connected to the cache memory storing operand data operating to translate logical addresses to real addresses in the MMU storing operand data
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