Disabling the output circuit following such a delay severs the potential current path between the supply voltage of the integrated circuit and {HEAD ~ an external voltage source} coupled to {TAIL ~ the signal line} via a pull up device 
coupled to
Disabling the output circuit following such a delay severs the potential current path between the supply voltage of the integrated circuit and { HEAD ~ an external voltage source } coupled to { TAIL ~ the signal line } via a pull up device
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH