Device 502 comprises a signal source 2 202, a signal destination 1 206, {TAIL ~ an LVDS driver} 100, an input circuit 504, {HEAD ~ termination resistor} 112, and resistors 510 and 512 
Device 502 comprises a signal source 2 202 , a signal destination 1 206 , { TAIL ~ an LVDS driver } 100 , an input circuit 504 , { HEAD ~ termination resistor } 112 , and resistors 510 and 512
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH