The semiconductor structure 3 wherein the electrical isolation of the source and drain regions comprises {TAIL ~ a dielectric region} partly surrounding {HEAD ~ the regions} and a dielectric layer under each of the regions 
The semiconductor structure 3 wherein the electrical isolation of the source and drain regions comprises { TAIL ~ a dielectric region } partly surrounding { HEAD ~ the regions } and a dielectric layer under each of the regions
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH