The method includes applying a first gate voltage across {HEAD ~ a gate} of {TAIL ~ the semiconductor transistor} 22 to allow the first voltage to form a first write current first time duration from the sourceline SL to the bitline BL and writing a first data state to the resistive sense memory cell 10 
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The method includes applying a first gate voltage across { HEAD ~ a gate } of { TAIL ~ the semiconductor transistor } 22 to allow the first voltage to form a first write current first time duration from the sourceline SL to the bitline BL and writing a first data state to the resistive sense memory cell 10
OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH