This advantageously reduces the number of {HEAD ~ required interconnects} between {TAIL ~ the first and second devices} by one half 
between
This advantageously reduces the number of { HEAD ~ required interconnects } between { TAIL ~ the first and second devices } by one half
OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH