Then, second semiconductor substrate 12 is etched down to {HEAD ~ a predetermined depth} to provide {TAIL ~ etched area} 17 as shown in FIG 3G 
to provide
Then , second semiconductor substrate 12 is etched down to { HEAD ~ a predetermined depth } to provide { TAIL ~ etched area } 17 as shown in FIG 3 G
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH