The differential amplifier 60, wherein {HEAD ~ the main differential amplifier} includes a second differential pair including a fifth transistor and a sixth transistor, the second differential pair, wherein the second differential pair is adapted to receive {TAIL ~ the shifted differential voltage signal} to generate the output signal 
The differential amplifier 60 , wherein { HEAD ~ the main differential amplifier } includes a second differential pair including a fifth transistor and a sixth transistor , the second differential pair , wherein the second differential pair is adapted to receive { TAIL ~ the shifted differential voltage signal } to generate the output signal
OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH