The latched binary states of the input signal and {HEAD ~ the pulse count} of the digital counter are evaluated by an interpreter such as logic circuitry or {TAIL ~ a microprocessor} 
The latched binary states of the input signal and { HEAD ~ the pulse count } of the digital counter are evaluated by an interpreter such as logic circuitry or { TAIL ~ a microprocessor }
OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL