The preferred embodiment circuit of FIG 2 combines {HEAD ~ the prior art circuit} of FIG 1 with {TAIL ~ additional circuitry}, involving two falling edge 1 shots 34 and 36, and an SR flip flop 38 
The preferred embodiment circuit of FIG 2 combines { HEAD ~ the prior art circuit } of FIG 1 with { TAIL ~ additional circuitry } , involving two falling edge 1 shots 34 and 36 , and an SR flip flop 38
OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH