{TAIL ~ A data bus} or related set of wires and associated circuitry forms a suitable data communication path that can interconnect the input, output, CPU and memory, as well as {HEAD ~ any peripheral equipment} in such a way as to permit the system to operate as an integrated whole 
{ TAIL ~ A data bus } or related set of wires and associated circuitry forms a suitable data communication path that can interconnect the input , output , CPU and memory , as well as { HEAD ~ any peripheral equipment } in such a way as to permit the system to operate as an integrated whole
TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH