According to {TAIL ~ one embodiment} of the invention, {HEAD ~ a method} for simulating the operation of an integrated circuit is provided 
According to
According to { TAIL ~ one embodiment } of the invention , { HEAD ~ a method } for simulating the operation of an integrated circuit is provided
REL REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH