The SSE may be provided in a pipeline circuit of a TRSS machine to receive and store a bit state of bit {HEAD ~ signal} generated by combinational circuits within {TAIL ~ the pipeline circuit} 
The SSE may be provided in a pipeline circuit of a TRSS machine to receive and store a bit state of bit { HEAD ~ signal } generated by combinational circuits within { TAIL ~ the pipeline circuit }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL