When a high level or {HEAD ~ a positive signal} is applied to {TAIL ~ the AND gate} 33 from the comparator 21, the clock pulses are supplied to the digital counter 34 and are counted up thereat 
is applied to
When a high level or { HEAD ~ a positive signal } is applied to { TAIL ~ the AND gate } 33 from the comparator 21 , the clock pulses are supplied to the digital counter 34 and are counted up thereat
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH