{HEAD ~ the first circuit} is coupled to {TAIL ~ the oscillator} through the second input node and configured for detecting a phase/frequency difference between the externally provided clock signal and an internal clock signal to be generated by the oscillator, and 
is coupled to
{ HEAD ~ the first circuit } is coupled to { TAIL ~ the oscillator } through the second input node and configured for detecting a phase / frequency difference between the externally provided clock signal and an internal clock signal to be generated by the oscillator , and
HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH