In response to its inputs, the input circuit in each device can use comparators, gates and {HEAD ~ a multiplexer} to determine {TAIL ~ the logic state} being transmitted over the pair of LVDS signal paths from the other device 
to determine
In response to its inputs , the input circuit in each device can use comparators , gates and { HEAD ~ a multiplexer } to determine { TAIL ~ the logic state } being transmitted over the pair of LVDS signal paths from the other device
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH