generating the IC design, wherein {HEAD ~ the IC design} comprises {TAIL ~ an instance} of the macro cell and a description of a clock tree for delivering the clock signal from a root of the clock tree to the root of the clock tree subtree described by the instance of the macro cell; and 
comprises
generating the IC design , wherein { HEAD ~ the IC design } comprises { TAIL ~ an instance } of the macro cell and a description of a clock tree for delivering the clock signal from a root of the clock tree to the root of the clock tree subtree described by the instance of the macro cell ; and
OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH