{HEAD ~ An interpolation circuit} generates a plurality of intermediate amplitude values linearly related to {TAIL ~ two consecutive signal amplitude values} using a system of adders and memory elements 
{ HEAD ~ An interpolation circuit } generates a plurality of intermediate amplitude values linearly related to { TAIL ~ two consecutive signal amplitude values } using a system of adders and memory elements
HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH