Each current control stage includes first, second, and third terminals, and means for conducting current between {HEAD ~ the first and second terminals} in {TAIL ~ response} to a control signal present at the third terminal 
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Each current control stage includes first , second , and third terminals , and means for conducting current between { HEAD ~ the first and second terminals } in { TAIL ~ response } to a control signal present at the third terminal
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH