The bus system provides {HEAD ~ simplified high speed data transfer} between {TAIL ~ the programmable logic core} and the digital signal processor 
between
The bus system provides { HEAD ~ simplified high speed data transfer } between { TAIL ~ the programmable logic core } and the digital signal processor
OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH