A method 10, wherein the sourceline voltage adjustment amount is predetermined based on {HEAD ~ specifications} of {TAIL ~ the resistive sense memory cell} and the transistor 
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A method 10 , wherein the sourceline voltage adjustment amount is predetermined based on { HEAD ~ specifications } of { TAIL ~ the resistive sense memory cell } and the transistor
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH