passing the clock signal through the clock gater in response to {HEAD ~ the test enable signal} having {TAIL ~ a first state} 
having
passing the clock signal through the clock gater in response to { HEAD ~ the test enable signal } having { TAIL ~ a first state }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL