{TAIL ~ The integrated circuit} 46, wherein the channel regions of at least a portion of the array of memory cells are removed prior to {HEAD ~ a corresponding word line} being formed 
{ TAIL ~ The integrated circuit } 46 , wherein the channel regions of at least a portion of the array of memory cells are removed prior to { HEAD ~ a corresponding word line } being formed
TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH