making {TAIL ~ a pulse} of a pulse width modulating signal rise synchronously with one of the first clock signal and the clock signal generated in step , and making the pulse of {HEAD ~ the pulse width modulating signal} fall synchronously with a remaining one of the first clock signal and the clock signal generated in step ; and 
making { TAIL ~ a pulse } of a pulse width modulating signal rise synchronously with one of the first clock signal and the clock signal generated in step , and making the pulse of { HEAD ~ the pulse width modulating signal } fall synchronously with a remaining one of the first clock signal and the clock signal generated in step ; and
OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH