The issue circuit issues {HEAD ~ an instruction} to {TAIL ~ the execution circuit}, and generates a control signal responsive to whether or not the instruction is issued to the execution circuit 
to
The issue circuit issues { HEAD ~ an instruction } to { TAIL ~ the execution circuit } , and generates a control signal responsive to whether or not the instruction is issued to the execution circuit
OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH