{HEAD ~ comparison} means responsive to {TAIL ~ the logical addresses} read out from said register and said TLB for comparing the logical addresses in said set having been read out with a portion of said logical address in said register, 
responsive to
{ HEAD ~ comparison } means responsive to { TAIL ~ the logical addresses } read out from said register and said TLB for comparing the logical addresses in said set having been read out with a portion of said logical address in said register ,
HEAD HEAD HEAD HEAD HEAD OTH REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH