Memory and circuit for accessing data bits in {HEAD ~ a memory array} in {TAIL ~ multi data rate operation} 
in
Memory and circuit for accessing data bits in { HEAD ~ a memory array } in { TAIL ~ multi data rate operation }
OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL