An interpolation circuit generates {HEAD ~ a plurality} of {TAIL ~ intermediate amplitude values} linearly related to two consecutive signal amplitude values using a system of adders and memory elements 
of
An interpolation circuit generates { HEAD ~ a plurality } of { TAIL ~ intermediate amplitude values } linearly related to two consecutive signal amplitude values using a system of adders and memory elements
OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH