An interpolation circuit generates {HEAD ~ a plurality} of intermediate amplitude values linearly related to two consecutive signal amplitude values using {TAIL ~ a system} of adders and memory elements 
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An interpolation circuit generates { HEAD ~ a plurality } of intermediate amplitude values linearly related to two consecutive signal amplitude values using { TAIL ~ a system } of adders and memory elements
OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH