The apparatus further includes {TAIL ~ an allocation circuit} for executing access time allocation with respect to a packet processing time allowed for processing {HEAD ~ each} of the packets 
The apparatus further includes { TAIL ~ an allocation circuit } for executing access time allocation with respect to a packet processing time allowed for processing { HEAD ~ each } of the packets
OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD OTH OTH OTH