The memory is coupled to {HEAD ~ the processor} and is configured to provide {TAIL ~ the processor} with instructions 
The memory is coupled to { HEAD ~ the processor } and is configured to provide { TAIL ~ the processor } with instructions
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH