Once a steady state condition is reached, {HEAD ~ the voltage} produced across {TAIL ~ load resistor RL}, i.e. the voltage Eo, will have the desired DC voltage level 
produced across
Once a steady state condition is reached , { HEAD ~ the voltage } produced across { TAIL ~ load resistor RL } , i.e. the voltage Eo , will have the desired DC voltage level
OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH