The distributed system structure contains {HEAD ~ an address switch}, multiple memory subsystems, and multiple master devices, either processors, I/O agents, or coherent memory adapters, organized into a set of nodes supported by {TAIL ~ a node controller} 
The distributed system structure contains { HEAD ~ an address switch } , multiple memory subsystems , and multiple master devices , either processors , I / O agents , or coherent memory adapters , organized into a set of nodes supported by { TAIL ~ a node controller }
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL