a plurality of pixel electrodes on the interlayer insulating film, each one of said pixel electrodes is connected to {HEAD ~ a respective pixel electrode circuit} within {TAIL ~ the connection holes}, wherein, 
within
a plurality of pixel electrodes on the interlayer insulating film , each one of said pixel electrodes is connected to { HEAD ~ a respective pixel electrode circuit } within { TAIL ~ the connection holes } , wherein ,
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH