{HEAD ~ at least one additional transistor} having two output terminals coupling between an additional input node and {TAIL ~ the intermediate node} 
{ HEAD ~ at least one additional transistor } having two output terminals coupling between an additional input node and { TAIL ~ the intermediate node }
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL