A sum of first and second input signals to be multiplied is applied to a base or {HEAD ~ gate} of {TAIL ~ the first transistor} with regard to a reference point 
of
A sum of first and second input signals to be multiplied is applied to a base or { HEAD ~ gate } of { TAIL ~ the first transistor } with regard to a reference point
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH