The control signal is asserted by a control circuit following {HEAD ~ the detection} of a logic high signal of a predetermined duration at {TAIL ~ the external signal connection point} 
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The control signal is asserted by a control circuit following { HEAD ~ the detection } of a logic high signal of a predetermined duration at { TAIL ~ the external signal connection point }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL