The apparatus further includes an allocation circuit for executing {TAIL ~ access time allocation} with {HEAD ~ respect} to a packet processing time allowed for processing each of the packets 
The apparatus further includes an allocation circuit for executing { TAIL ~ access time allocation } with { HEAD ~ respect } to a packet processing time allowed for processing each of the packets
OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH