The structure 8 further including {HEAD ~ a third set} of {TAIL ~ switches} for selectively reading out said signals from said first and second set of storage capacitors onto a set of output lines as line signals 
of
The structure 8 further including { HEAD ~ a third set } of { TAIL ~ switches } for selectively reading out said signals from said first and second set of storage capacitors onto a set of output lines as line signals
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH