voltage discrimination means located between chip and said {HEAD ~ luminescent target} for modifying {TAIL ~ photoelectron patterns} to represent test point voltages, said voltage discrimination means comprising accelerating grid means and electron optics located between the chip and said luminescent target means  
for modifying
voltage discrimination means located between chip and said { HEAD ~ luminescent target } for modifying { TAIL ~ photoelectron patterns } to represent test point voltages , said voltage discrimination means comprising accelerating grid means and electron optics located between the chip and said luminescent target means
OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH