A clock buffer in {TAIL ~ a semiconductor memory device} includes two kinds of interface circuits, {HEAD ~ i.e., an LVTTL interface} and an SSTL interface 
A clock buffer in { TAIL ~ a semiconductor memory device } includes two kinds of interface circuits , { HEAD ~ i.e. , an LVTTL interface } and an SSTL interface
OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH