The processes and logic flows can also be performed by, and apparatus of {HEAD ~ the invention} can be implemented as, special purpose logic circuitry, e.g., an FPGA or {TAIL ~ an ASIC}  
implemented as
The processes and logic flows can also be performed by , and apparatus of { HEAD ~ the invention } can be implemented as , special purpose logic circuitry , e.g. , an FPGA or { TAIL ~ an ASIC }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH REL REL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH