{HEAD ~ The means} for generating the fourth signal, at the first output of the level 2 comparator block, advantageously include {TAIL ~ an “OR” gate} of which the outputs are connected to the first outputs of the level 1 comparator blocks 
advantageously include
{ HEAD ~ The means } for generating the fourth signal , at the first output of the level 2 comparator block , advantageously include { TAIL ~ an “ OR ” gate } of which the outputs are connected to the first outputs of the level 1 comparator blocks
HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH