Similar to the second embodiment, as shown in FIG 5, {HEAD ~ the DMOS device} 500 is formed in {TAIL ~ a substrate} 51 and includes a field oxide regions 52 a and 52 b, gates 53 a and 53 b, a high voltage well 54, a drain 55, sources 56 a and 56 b, a body region 57, a body electrode 57 a, and at least one N type buried layer 58 a formed beneath and adjacent to the high voltage well 54 in a vertical direction 
is formed in
Similar to the second embodiment , as shown in FIG 5 , { HEAD ~ the DMOS device } 500 is formed in { TAIL ~ a substrate } 51 and includes a field oxide regions 52 a and 52 b , gates 53 a and 53 b , a high voltage well 54 , a drain 55 , sources 56 a and 56 b , a body region 57 , a body electrode 57 a , and at least one N type buried layer 58 a formed beneath and adjacent to the high voltage well 54 in a vertical direction
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