Additionally, the method involves providing for {HEAD ~ generation} of {TAIL ~ at least one file} containing information concerning the location for conducting the circuit operation on the integrated circuit 
of
Additionally , the method involves providing for { HEAD ~ generation } of { TAIL ~ at least one file } containing information concerning the location for conducting the circuit operation on the integrated circuit
OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH