The description and apparatus of {HEAD ~ 3 bit decoders} for {TAIL ~ column} weight three LDPC codes is also presented 
for
The description and apparatus of { HEAD ~ 3 bit decoders } for { TAIL ~ column } weight three LDPC codes is also presented
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH