{HEAD ~ Another specific embodiment} of the invention provides {TAIL ~ a memory architecture} that includes a memory array for storing data values, multiple sensing circuits, multiple switches, multiple control lines, a column timing switch control circuit, and an I/O pad 
provides
{ HEAD ~ Another specific embodiment } of the invention provides { TAIL ~ a memory architecture } that includes a memory array for storing data values , multiple sensing circuits , multiple switches , multiple control lines , a column timing switch control circuit , and an I / O pad
HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH