a second counter receiving {HEAD ~ an output} of {TAIL ~ said second multiplexer} and outputting a second count signal, 
of
a second counter receiving { HEAD ~ an output } of { TAIL ~ said second multiplexer } and outputting a second count signal ,
OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH