Once a steady state condition is reached, {TAIL ~ the voltage} produced across load resistor RL, {HEAD ~ i.e. the voltage} Eo, will have the desired DC voltage level 
Once a steady state condition is reached , { TAIL ~ the voltage } produced across load resistor RL , { HEAD ~ i.e. the voltage } Eo , will have the desired DC voltage level
OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH