The capacitor voltage generated by {HEAD ~ the filter capacitor} sets the bias point of the second FET such that the second FET comprises characteristics of {TAIL ~ an integrated precision resistor} 
The capacitor voltage generated by { HEAD ~ the filter capacitor } sets the bias point of the second FET such that the second FET comprises characteristics of { TAIL ~ an integrated precision resistor }
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL