{HEAD ~ A heterogeneous integrated circuit} having {TAIL ~ a digital signal processor} and at least one programmable logic core 
having
{ HEAD ~ A heterogeneous integrated circuit } having { TAIL ~ a digital signal processor } and at least one programmable logic core
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH