{TAIL ~ A synchronizing circuit} for synchronizing {HEAD ~ an input video signal} with a sampling clock signal, comprising: 
{ TAIL ~ A synchronizing circuit } for synchronizing { HEAD ~ an input video signal } with a sampling clock signal , comprising :
TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH