The presence or absence of {TAIL ~ power voltage VDD supply} from {HEAD ~ the terminal 12 side} is determined from the output of detector 33 
The presence or absence of { TAIL ~ power voltage VDD supply } from { HEAD ~ the terminal 12 side } is determined from the output of detector 33
OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH