The switch block circuit further includes {HEAD ~ a selection unit} for correspondingly connecting {TAIL ~ the second group memories} with the second group switching transistors depending on an operation mode 
for correspondingly connecting
The switch block circuit further includes { HEAD ~ a selection unit } for correspondingly connecting { TAIL ~ the second group memories } with the second group switching transistors depending on an operation mode
OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH