A system for ensuring coherency of data in a multiprocessor network and for minimizing processor cache access time where each local processor has its local private cache means and local private bus interface means connected to {TAIL ~ a common system bus} which provides {HEAD ~ communication} to a main memory means, the combination comprising: 
A system for ensuring coherency of data in a multiprocessor network and for minimizing processor cache access time where each local processor has its local private cache means and local private bus interface means connected to { TAIL ~ a common system bus } which provides { HEAD ~ communication } to a main memory means , the combination comprising :
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