Disabling {HEAD ~ the output circuit} following such a delay severs the potential current path between the supply voltage of the integrated circuit and an external voltage source coupled to the signal line via {TAIL ~ a pull up device} 
Disabling { HEAD ~ the output circuit } following such a delay severs the potential current path between the supply voltage of the integrated circuit and an external voltage source coupled to the signal line via { TAIL ~ a pull up device }
OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL