An arrangement is also provided to enhance deselection speed by discharging {TAIL ~ the base node} of {HEAD ~ the word line driving transistor} 
An arrangement is also provided to enhance deselection speed by discharging { TAIL ~ the base node } of { HEAD ~ the word line driving transistor }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD