The structure 8 further including a third set of switches for selectively reading out said {HEAD ~ signals} from said first and second set of storage capacitors onto {TAIL ~ a set} of output lines as line signals 
onto
The structure 8 further including a third set of switches for selectively reading out said { HEAD ~ signals } from said first and second set of storage capacitors onto { TAIL ~ a set } of output lines as line signals
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH