The circuit 1, wherein {HEAD ~ the circuit} is embodied in {TAIL ~ a video sample rate converter} 
is embodied in
The circuit 1 , wherein { HEAD ~ the circuit } is embodied in { TAIL ~ a video sample rate converter }
OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL