{HEAD ~ The first and second sub gates} of {TAIL ~ the first gate} are separated by a first intergate dielectric layer 
of
{ HEAD ~ The first and second sub gates } of { TAIL ~ the first gate } are separated by a first intergate dielectric layer
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH