The control signal is asserted by a control circuit following the detection of {TAIL ~ a logic high signal} of {HEAD ~ a predetermined duration} at the external signal connection point 
The control signal is asserted by a control circuit following the detection of { TAIL ~ a logic high signal } of { HEAD ~ a predetermined duration } at the external signal connection point
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH