a third element processed to generate a functional computer executable representation of a first field effect transistor and a second field effect transistor, wherein a gate of the first field effect transistor is tied to {HEAD ~ a gate} of {TAIL ~ the second field effect transistor}; and 
a third element processed to generate a functional computer executable representation of a first field effect transistor and a second field effect transistor , wherein a gate of the first field effect transistor is tied to { HEAD ~ a gate } of { TAIL ~ the second field effect transistor } ; and
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH