The second gate is electrically connected to the first gate, and the second source is electrically connected to the first source, such that when {TAIL ~ the DMOS device} is {HEAD ~ ON}, a surface channel and a buried channel are formed 
The second gate is electrically connected to the first gate , and the second source is electrically connected to the first source , such that when { TAIL ~ the DMOS device } is { HEAD ~ ON } , a surface channel and a buried channel are formed
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH