A redundancy circuit for {TAIL ~ a multiport memory device} with first and second memories includes {HEAD ~ a fuse programming circuit}, shared between the first and second memories, for programming a first redundant address 
A redundancy circuit for { TAIL ~ a multiport memory device } with first and second memories includes { HEAD ~ a fuse programming circuit } , shared between the first and second memories , for programming a first redundant address
OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH