The device 1, further comprising {TAIL ~ a gate pad} and a data pad on {HEAD ~ the first substrate} 
The device 1 , further comprising { TAIL ~ a gate pad } and a data pad on { HEAD ~ the first substrate }
OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD