the first circuit is coupled to the oscillator through the second input node and configured for detecting {HEAD ~ a phase/frequency difference} between {TAIL ~ the externally provided clock signal} and an internal clock signal to be generated by the oscillator, and 
the first circuit is coupled to the oscillator through the second input node and configured for detecting { HEAD ~ a phase / frequency difference } between { TAIL ~ the externally provided clock signal } and an internal clock signal to be generated by the oscillator , and
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH