A fail safe circuit for preventing {HEAD ~ an inadvertent communication} of {TAIL ~ a signal} from an input terminal to an output terminal includes a series switching network electrically connected between the input terminal and the output terminal 
A fail safe circuit for preventing { HEAD ~ an inadvertent communication } of { TAIL ~ a signal } from an input terminal to an output terminal includes a series switching network electrically connected between the input terminal and the output terminal
OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH