FIG 4 shows areas to be masked on {HEAD ~ the original PCB layout} for {TAIL ~ primary substrate} 1 
FIG 4 shows areas to be masked on { HEAD ~ the original PCB layout } for { TAIL ~ primary substrate } 1
OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL OTH