{HEAD ~ VPU} functions in {TAIL ~ half duplex}, and hardware modules are shared between encode/decode modes 
{ HEAD ~ VPU } functions in { TAIL ~ half duplex } , and hardware modules are shared between encode / decode modes
HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH