{HEAD ~ A sum} of {TAIL ~ first and second input signals} to be multiplied is applied to a base or gate of the first transistor with regard to a reference point 
{ HEAD ~ A sum } of { TAIL ~ first and second input signals } to be multiplied is applied to a base or gate of the first transistor with regard to a reference point
HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH