{HEAD ~ The serially connected memory} is connected to {TAIL ~ a two wire output port} of the dedicated diagnostic data port 
{ HEAD ~ The serially connected memory } is connected to { TAIL ~ a two wire output port } of the dedicated diagnostic data port
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH