The CMs 6 and 2 are provided, respectively, for the data and instruction storage, so that the capacity of {HEAD ~ each} of {TAIL ~ the CMs} 2 and 6 may be identical, having the same number of block cells and the same number of bytes in each block cell 
The CMs 6 and 2 are provided , respectively , for the data and instruction storage , so that the capacity of { HEAD ~ each } of { TAIL ~ the CMs } 2 and 6 may be identical , having the same number of block cells and the same number of bytes in each block cell
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH