{HEAD ~ A circuit} is usable to generate {TAIL ~ a sense amplifier} enable signal for a static random access memory circuit 
{ HEAD ~ A circuit } is usable to generate { TAIL ~ a sense amplifier } enable signal for a static random access memory circuit
HEAD HEAD HEAD HEAD HEAD HEAD REL REL REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH