FIG 4 shows areas to be masked on {TAIL ~ the original PCB layout} for {HEAD ~ primary substrate} 1 
FIG 4 shows areas to be masked on { TAIL ~ the original PCB layout } for { HEAD ~ primary substrate } 1
OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH