The period {HEAD ~ T0} to T5 covers approximately 133 milliseconds during which approximately 266 pulses are generated by the controller unit 66 and passed to {TAIL ~ the transistor switch} 64 
The period { HEAD ~ T0 } to T5 covers approximately 133 milliseconds during which approximately 266 pulses are generated by the controller unit 66 and passed to { TAIL ~ the transistor switch } 64
OTH OTH HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH