A logic circuit is disclosed that is tolerant of logic signals with voltages different from {HEAD ~ the voltage} of {TAIL ~ the logic circuit power supply} 
A logic circuit is disclosed that is tolerant of logic signals with voltages different from { HEAD ~ the voltage } of { TAIL ~ the logic circuit power supply }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL