{HEAD ~ The apparatus} further includes {TAIL ~ an allocation circuit} for executing access time allocation with respect to a packet processing time allowed for processing each of the packets 
{ HEAD ~ The apparatus } further includes { TAIL ~ an allocation circuit } for executing access time allocation with respect to a packet processing time allowed for processing each of the packets
HEAD HEAD HEAD HEAD HEAD HEAD OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH