Neither the first input signal nor the second input signal are applied to {HEAD ~ a base} or gate of {TAIL ~ the fourth transistor} 
Neither the first input signal nor the second input signal are applied to { HEAD ~ a base } or gate of { TAIL ~ the fourth transistor }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL