The output side 16 includes a plurality of {HEAD ~ switching modules} 22, including {TAIL ~ first, second and third modules} 24, 27 and 29, respectively 
The output side 16 includes a plurality of { HEAD ~ switching modules } 22 , including { TAIL ~ first , second and third modules } 24 , 27 and 29 , respectively
OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH