In {TAIL ~ addition}, a bus arbiter in the node controller parks {HEAD ~ a data bus} towards a memory subsystem 
In { TAIL ~ addition } , a bus arbiter in the node controller parks { HEAD ~ a data bus } towards a memory subsystem
OTH TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH