at least one additional transistor having {HEAD ~ two output terminals} coupling between {TAIL ~ an additional input node} and the intermediate node 
at least one additional transistor having { HEAD ~ two output terminals } coupling between { TAIL ~ an additional input node } and the intermediate node
OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH