An improved circuit design is disclosed that enables a faster and more reliable read process since the reference is {TAIL ~ a second MTJ} within {HEAD ~ the same bit cell} 
An improved circuit design is disclosed that enables a faster and more reliable read process since the reference is { TAIL ~ a second MTJ } within { HEAD ~ the same bit cell }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD