{HEAD ~ at least one additional transistor} having {TAIL ~ two output terminals} coupling between an additional input node and the intermediate node 
{ HEAD ~ at least one additional transistor } having { TAIL ~ two output terminals } coupling between an additional input node and the intermediate node
HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH