The horizontal synchronization signal HSYNC is supplied to a VCO/AFC circuit 12, in which {HEAD ~ a 4 MHz internal clock} synchronized with {TAIL ~ the horizontal synchronization signal} HSYNC is generated 
The horizontal synchronization signal HSYNC is supplied to a VCO / AFC circuit 12 , in which { HEAD ~ a 4 MHz internal clock } synchronized with { TAIL ~ the horizontal synchronization signal } HSYNC is generated
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH