{HEAD ~ The bus} enables single or multiple controllers to access real time information generated by {TAIL ~ the attached hardware} 
{ HEAD ~ The bus } enables single or multiple controllers to access real time information generated by { TAIL ~ the attached hardware }
HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL TAIL