In another, embodiment, the sync mark detector processes the even and odd interleaves of {HEAD ~ the detected bit sequence} in {TAIL ~ parallel}, and the current state of the state machine initializes the sync mark detector rather than enable its output 
In another , embodiment , the sync mark detector processes the even and odd interleaves of { HEAD ~ the detected bit sequence } in { TAIL ~ parallel } , and the current state of the state machine initializes the sync mark detector rather than enable its output
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH