This invention relates to {HEAD ~ non volatile semiconductor memories}, and more particularly, to non volatile semiconductor memories that have a bias applied to the source electrodes of the memory array cells of {TAIL ~ the memory} 
This invention relates to { HEAD ~ non volatile semiconductor memories } , and more particularly , to non volatile semiconductor memories that have a bias applied to the source electrodes of the memory array cells of { TAIL ~ the memory }
OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD HEAD HEAD OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH TAIL TAIL TAIL TAIL TAIL TAIL