A multiprocessor computer system wherein memory buses of separate central processing unit systems are interfaced to an intermemory communication network for {HEAD ~ transfer} of {TAIL ~ data} between memories of said separate central processing unit systems 
A multiprocessor computer system wherein memory buses of separate central processing unit systems are interfaced to an intermemory communication network for { HEAD ~ transfer } of { TAIL ~ data } between memories of said separate central processing unit systems
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL OTH OTH OTH OTH OTH OTH OTH OTH OTH