It should be noted that a video signal obtained at the synchronization separation circuit 10 is displayed on a display at {HEAD ~ the timing} of {TAIL ~ the internally generated horizontal and vertical synchronization signals} 
It should be noted that a video signal obtained at the synchronization separation circuit 10 is displayed on a display at { HEAD ~ the timing } of { TAIL ~ the internally generated horizontal and vertical synchronization signals }
OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH OTH HEAD HEAD HEAD HEAD HEAD HEAD REL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL TAIL