Moore's law 2015 that the pace of advancement has slowed, starting at the 22 nm feature width around 2012, and continuing at 14 nm. Brian Krzanich, the former CEO of Intel, announced, "Our cadence today is closer to two and a half years than two." Intel is expected to reach the 10 nm node in 2018, a three-year cadence. Intel also stated in 2017 that hyperscaling would be able to continue the trend of Moore's law and offset the increased cadence by aggressively scaling beyond the typical doubling of transistors. Krzanich cited Moore's 1975 revision as a precedent for the current deceleration,
Intel 8008 in terms of instructions per second (36,000 to 80,000 at 0.8 MHz) than the 4-bit Intel 4004 and Intel 4040. The fact that the 8008 processed data 8 bits at a time and could access significantly more RAM still gave it a significant speed advantage in most applications. The 8008 had 3,500 transistors. The chip (limited by its 18-pin DIP packaging) had a single 8-bit bus and required a significant amount of external support logic. For example, the 14-bit address, which could access "16 K × 8 bits of memory", needed to be latched by some of this logic into