CompactPCI Serial parallel CompactPCI comprises another specification called PICMG 2.30 CompactPCI PlusIO. This is why CompactPCI Serial and CompactPCI PlusIO as a whole were also called CompactPCI Plus. PICMG's first working title of CompactPCI Serial was CPLUS.0. (See also #Compatibility and Migration.) CompactPCI Serial backplanes and chassis are developed by Schroff, Elmа, and Pixus Technologies companies, as for the CompactPCI Serial board level electronics – they are developed by MEN Mikro Elektronik, Fastwel, EKF, Emerson Embedded Computing, ADLINK, and Kontron. Fast serial point-to-point connections have become the state-of-the-art technology and are gradually replacing the classic bus architecture in computers. The CompactPCI standard
NAS Parallel Benchmarks serial versions of the benchmarks consistent with the parallel versions and defined a problem size "Class W" for small-memory systems. NPB 2.4 of 2002 offered a new MPI implementation and introduced another still larger problem size "Class D". It also augmented one benchmark with I/O-intensive subtypes. NPB 3 retained the MPI implementation from NPB 2 and came in more flavors, namely OpenMP, Java and High Performance Fortran. These new parallel implementations were derived from the serial codes in NPB 2.3 with additional optimizations. NPB 3.1 and NPB 3.2 added three more benchmarks, which, however, were not available across all implementations;