Bit-serial architecture a single N-bit parallel processor. Bit-serial architecture In digital logic applications, bit-serial architectures send data one bit at a time, along a single wire, in contrast to bit-parallel word architectures, in which data values are sent all bits or a word at once along a group of wires. All computers before 1951, and most of the early massive parallel processing machines used a bit-serial architecture—they were serial computers. Bit-serial architectures were developed for digital signal processing in the 1960s through 1980s, including efficient structures for bit-serial multiplication and accumulation. Often N serial processors will take less FPGA area and have
Serial digital interface application and interoperability. An 8-bit parallel digital interface is defined by ITU-R Rec. 601; this is obsolete (however, many clauses in the various standards accommodate the possibility of an 8-bit interface). In SD and ED applications, the serial data format is defined to 10 bits wide, whereas in HD applications, it is 20 bits wide, divided into two parallel 10-bit datastreams (known as Y and C). The SD datastream is arranged like this: whereas the HD datastreams are arranged like this: For all serial digital interfaces (excluding the obsolete composite encodings), the native color encoding is YCbCr format. The luminance