Computation of cyclic redundancy checks may use whichever form is more convenient. Parallel update for a byte or a word at a time can also be done explicitly, without a table. This is normally used in high-speed hardware implementations. For each bit an equation is solved after 8 bits have been shifted in. The following tables list the equations for some commonly used polynomials, using following symbols: As the CRC-32 polynomial has a large number of terms, when computing the remainder a byte at a time each bit depends on several bits of the previous iteration. In byte-parallel hardware implementations this calls for either multiple-input
Packed pixel Packed pixel In packed pixel or chunky framebuffer organization, the bits defining each pixel are grouped together. For example, if there are 16 bits per pixel, each pixel is represented in two consecutive (contiguous) 8-bit bytes in the framebuffer (a.k.a. screen buffer). If there are 4 bits per pixel (16 colors), each frame buffer byte defines two pixels, one in each nibble. The latter example is as opposed to storing perhaps half of the bits—2 bits—for each of four pixels in one byte and the other two bits for each of those four pixels in another byte or bytes. It