Area of a circle inscribe a hexagon. Cut the hexagon into six triangles by splitting it from the center. Two opposite triangles both touch two common diameters; slide them along one so the radial edges are adjacent. They now form a parallelogram, with the hexagon sides making two opposite edges, one of which is the base, "s". Two radial edges form slanted sides, and the height, "h" is equal to its apothem (as in the Archimedes proof). In fact, we can assemble all the triangles into one big parallelogram by putting successive pairs next to each other. The same is true if we increase
Qualcomm Hexagon 20 DMIPS per milliwatt, operating at 500 MHz. Clock speed of Hexagon varies in 400–2000 MHz for QDSP6 and in 256–350 MHz for previous generation of the architecture, the QDSP5. Both Hexagon (QDSP6) and pre-Hexagon (QDSP5) cores are used in modern Qualcomm SoCs, QDSP5 mostly in low-end products. Modem QDSPs (often pre-Hexagon) are not shown in the table. QDSP5 usage: QDSP6 (Hexagon) usage: This is a single instruction packet from the inner loop of a FFT: This packet is claimed by Qualcomm to be equal to 29 classic RISC operations; it includes vector add (4x 16-bit), complex multiply operation and