title: "Nothing to be done for makefile" message
body: <p>I have the following files:</p>
  
  <p><code>Child.c , Cookie.c , Cookie.h , CookieMonster.c , Jar.c , Jar.h, Milk.c , Milk.h</code></p>
  
  <p>and the following makefile, named <code>makePractice</code>, which is supposed to create two executables, <code>Child</code> and <code>CookieMonster</code>.</p>
  
  <pre><code>makefile:
  
  CC = gcc    # the compiler
  CFLAGS = -Wall  # the compiler flags
  ChildObjects = Jar.o    # object files for the Child executable
  CookieMonsterObjects = Jar.o Milk.o     #object files for the CookieMonster executable
  
  all: Child CookieMonster    # the first target. Both executables are created when 
                  # 'make' is invoked with no target
  
  # general rule for compiling a source and producing an object file
  .c.o:
      $(CC) $(CFLAGS) -c $&lt;
  
  # linking rule for the Child executable
  Child: $(ChildObjects)
      $(CC) $(CFLAGS) $(ChildObjects) -o Child
  
  # linking rule for the CookieMonster executable
  CookieMonster: $(CookieMonsterObjects)
      $(CC) $(CFLAGS) $(CookieMonsterObjects) -o CookieMonster
  
  # dependance rules for the .o files
  
  Child.o: Child.c Cookie.h Jar.h
  
  CookieMonster.o: CookieMonster.c Cookie.h Jar.h Milk.h
  
  Jar.o: Jar.c Jar.h Cookie.h
  
  Milk.o: Milk.c Milk.h
  
  Cookie.o: Cookie.c Cookie.h
  
  # gives the option to delete all the executable, .o and temporary files
  
  clean: 
      rm -f *.o *~
  </code></pre>
  
  <p>When I try to use the makefile to create the executables, by running the following line in the shell</p>
  
  <pre><code>make -f makePractice
  </code></pre>
  
  <p>I get the following message:</p>
  
  <pre><code>make: Nothing to be done for `makefile'.
  </code></pre>
  
  <p>I don't understand what's wrong...</p>