title: gcc - Makefile: recipe for target 'all' failed after adding dependency rule
body: <p>I have a Makefile that fails every time I run it. I have been altering a Makefile that is compiling a bunch of files into a directory that needs to be made if it is not already. <code>all:</code> fails, and I honestly have no clue why it does. </p>
  
  <p>Here is what my Makefile looks like:</p>
  
  <pre><code>CC=gcc
  SRCDIR=src
  INCDIR=include
  BINDIR=../bin
  CFLAGS = -flags
  LIBS = -llibrary1 -llibrary2
  
  all: 
      $(BINDIR) \
      $(BINDIR)/program1 \
      $(BINDIR)/program2 \
      $(BINDIR)/program3
  
  $(BINDIR)/program1: $(SRCDIR)/program1.c | $(BINDIR)
      $(CC) $(CFLAGS) $&lt; -o $@ $(LIBS)
  
  $(BINDIR)/program2: $(SRCDIR)/program2.c | $(BINDIR)
      $(CC) $(CFLAGS) $&lt; -o $@ $(LIBS)
  
  $(BINDIR)/program3: $(SRCDIR)/program3.c | $(BINDIR)
      $(CC) $(CFLAGS) $&lt; -o $@ $(LIBS)
  
  $(BINDIR):
      mkdir -p $@
  
  clean:
      rm -f $(BINDIR)/*
  </code></pre>
  
  <p>I know that the issue has to do with the <code>$(BINDIR)</code>, but I can't figure out what to do. The last question I asked on StackOverflow gave me some resources (such as GNU's documentation <a href="https://www.gnu.org/software/make/manual/make.html#Prerequisite-Types" rel="nofollow noreferrer" title="here">here</a>). From my understanding, <code>$(BINDIR)</code> should be made first when I run make, and then the other rules should execute without any issues. </p>
  
  <p>Here is the error I receive, which I know means that <code>$(BINDIR)</code> is not being created before the rest of the rules execute.</p>
  
  <pre><code>user@user-Notebook:~/project/folder$ make
  ../bin \
      ../bin/program1 \
      ../bin/program2 \
      ../bin/program3
  make: ../bin: Command not found
  Makefile:16: recipe for target 'all' failed
  make: *** [all] Error 127
  </code></pre>
  
  <p>What am I missing?</p>