title: Assumption on machine instruction in the sense of multi-thread
body: <p>Can I assume that each instruction is observed atomicity? for example,</p>
  
  <pre><code>mov dword ptr [eax], 0
  </code></pre>
  
  <p>The movement either move successfully or doesn't happen. there is no interrupt in the middle of the instruction executed.</p>
  
  <p>Is my assumption right?</p>
  
  <p>I know the current processor can execute instruction out of order, and compiles will generate codes out of order in terms of optimization. And hence the movement will be executed in the order which isn't same as I wrote. But this doesn't matter, what i concern is once the <strong>single instruction</strong> is executed, it can't be interrupted.</p>
  
  <p><strong>EDIT</strong>:<br>
  what I concern is atomicity of <strong>any single instruction</strong>, not an special instruction or a branch of read-write instructions, I just use <em>mov</em> for example. </p>
  
  <ol>
  <li>Any time when any core of processor executes an instruction(add,mov,shift, etc.),
  can the execution be interrupted?</li>
  <li>Is there  any indeterminate state in the register or the memory(<strong>machine-word-size</strong>).</li>
  </ol>
  
  <p>Or what is the smallest unit that hardware can provide atomicity? </p>