title: How can a branch instruction be mispredicted AND retired?
body: <p>Intel has a hardware event counter called:</p>
  
  <p>BR_MISP_RETIRED.ALL_BRANCHES</p>
  
  <p>where the description says:</p>
  
  <blockquote>
    <p>Mispredicted macro branch instructions retired.</p>
  </blockquote>
  
  <p>But <em>retired</em> instructions are those which were correctly-required:</p>
  
  <blockquote>
    <p>Modern processors execute much more instructions that the program flow
    needs. This is called "speculative execution".</p>
    
    <p>Then the instructions that were "proven" as indeed needed by flow are
    "retired".</p>
  </blockquote>
  
  <p><a href="https://software.intel.com/en-us/forums/topic/311170" rel="nofollow">https://software.intel.com/en-us/forums/topic/311170</a></p>
  
  <p>So how can a branch <strong>misprediction</strong> instruction be proven-as-needed, too?</p>