title: C volatile variables and Cache Memory
body: <p>Cache is controlled by cache hardware transparently to processor, so if we use volatile variables in C program, how is it guaranteed that my program reads data each time from the actual memory address specified but not cache. </p>
  
  <p>My understanding is that,</p>
  
  <ol>
  <li><p>Volatile keyword tells compiler that the variable references shouldn't be optimized and should be read as programmed in the code. </p></li>
  <li><p>Cache is controlled by cache hardware transparently, hence when processor issues an address, it doesn't know whether the data is coming from cache or the memory. </p></li>
  </ol>
  
  <p>So, if I have a requirement of having to read a memory address every time required, how can I make sure that its not referred from cache but from required address? 
   </p>
  
  <p>Some how, these two concepts are not fitting together well. Please clarify how its done. </p>
  
  <p>(Imagining we have write-back policy in cache (if required for analyzing the problem))</p>
  
  <p>Thank you, 
  Microkernel :)</p>