title: Change Makefile variable value depending on a target
body: <p>I am not proficient with makefiles, but am used to simple ones. Right now, I have a task on hand.</p>
  
  <p>I need to compile and link a test application with a different library and different include path based on the given target. If target is TARGET1, then link against LIB1 and include INCLUDEPATH1 during compilation. Similarly, if given target is TARGET2, then compile with INCLUDEPATH2 in CFLAGS and link with LIB2.</p>
  
  <pre><code>%.o: %.c
      @echo [CC]  $&lt; ...
      $(CC) $(CFLAGS) -o $*.o $&lt;
  </code></pre>
  
  <p>Now I have a rule as above which compiles my test application. Now how can the CFLAGS be changed based on the target.</p>