title: Write to port 0cf8h fails with segfault
body: <p>I have an AMD processor of e2-2000 model. THis is family 0fh.
  According to family 0fh BKDG I have this code to read device and vendor ID:</p>
  
  <pre><code>ReadPCIConfiguration:
  movq    $0x80000100, %rax
  movq    $0x0cf8, %rdx
  outl    %eax, %dx          # sigsegv caught here
  movq    $0x0cfc, %rdx
  inl     %dx, %eax
  ret
  </code></pre>
  
  <p>As far as I know the algorithm to read/write PCI configuration is as follows:</p>
  
  <ul>
  <li>write target bus number, device number function number and offset or register number to configuration address port</li>
  <li>perform 1-, 2- or 4-byte r/w operation from/to configuration data port</li>
  </ul>
  
  <p>Ports 0xcf8..0xcfb - configuration address port (doubleword)</p>
  
  <p>Bits meaning:</p>
  
  <ul>
  <li>31 -                EnReg - enable the transaction  (R/W)</li>
  <li>24..31 -            reserved                        (R/O)</li>
  <li>16..23 -            BusNum                          (R/W)</li>
  <li>11..15 -            DevNum                          (R/W)</li>
  <li>8..10 -             FuncNum                         (R/W)</li>
  <li>2..7 -              RegNum                          (R/W)</li>
  <li>0..1 -              Reserved                        (R/O)</li>
  </ul>
  
  <p>So, I write to bus - 0, dev - 0, func - 1, reg - 00</p>
  
  <p>Am I doing something wrong?</p>
  
  <p>(I run the compiled and linked application from userspace, GNU/Debian "Wheezy" Linux 3.11.6)</p>