title: How do I set a Port to Ground using Vivado's I/O Planning tool
body: <p>So, I've designed a 2-bit Full Adder, made up of Full Adders and Half Adders. I just started using Vivado's I/O Planning tool for the port to pin assignments, but I've run into a problem. One of my inputs, the initial carry_in for the first bit, I want set to ground since it should always be 0. I know I could just force it to 0 in my VHDL code, but I'm told that's not really the proper way to do it. I tried to set that port to one of the ground pins in the i/o planner but Vivado just tells me I can't place a terminal in an empty pin location. Anyone know how to do this?</p>
  
  <p>As a temporary solution, I just assigned the carry_in port to a button input that I'll leave unpressed so it will always be 0. Everything works as it should when it's programmed onto the board.</p>
  
  <p>*Using Vivado 2015.2 and working on the ZYBO Development Board.</p>
  
  <p>Here's the top level 2-bit Full Adder Code:</p>
  
  <pre><code>library IEEE;
  use IEEE.STD_LOGIC_1164.all;
  
  entity full_adder_2bit is
       port(
           a : in STD_LOGIC_VECTOR (1 downto 0);
           b : in STD_LOGIC_VECTOR (1 downto 0);
           carry_in : in STD_LOGIC;
           sum : out STD_LOGIC_VECTOR (1 downto 0);
           carry_out : out STD_LOGIC
           );
  end full_adder_2bit;
  
  architecture structural of full_adder_2bit is
  
  component full_adder is
       port(
           a : in STD_LOGIC;
           b : in STD_LOGIC;
           carry_in : in STD_LOGIC;
           sum : out STD_LOGIC;
           carry_out : out STD_LOGIC
           );
  end component;
  
  signal cin_fa1 : std_logic;
  
  begin
  
      fa0: full_adder port map (a =&gt; a(0), b =&gt; b(0), carry_in =&gt; carry_in, sum =&gt; sum(0), carry_out =&gt; cin_fa1); 
  
      fa1: full_adder port map (a =&gt; a(1), b =&gt; b(1), carry_in =&gt; cin_fa1, sum =&gt; sum(1), carry_out =&gt; carry_out);
  
  end structural;
  </code></pre>
  
  <p>And here's what I've got for constraints from the I/O planner. It all works fine, I just want to set the carry_in to ground instead of an unused button.</p>
  
  <pre><code>set_property IOSTANDARD LVCMOS33 [get_ports {a[1]}]
  set_property IOSTANDARD LVCMOS33 [get_ports {a[0]}]
  set_property IOSTANDARD LVCMOS33 [get_ports {b[1]}]
  set_property IOSTANDARD LVCMOS33 [get_ports {b[0]}]
  set_property IOSTANDARD LVCMOS33 [get_ports {sum[1]}]
  set_property IOSTANDARD LVCMOS33 [get_ports {sum[0]}]
  set_property PACKAGE_PIN T16 [get_ports {a[1]}]
  set_property PACKAGE_PIN P15 [get_ports {a[0]}]
  set_property PACKAGE_PIN W13 [get_ports {b[1]}]
  set_property PACKAGE_PIN G15 [get_ports {b[0]}]
  set_property PACKAGE_PIN M15 [get_ports {sum[1]}]
  set_property PACKAGE_PIN M14 [get_ports {sum[0]}]
  set_property PACKAGE_PIN D18 [get_ports carry_out]
  set_property IOSTANDARD LVCMOS33 [get_ports carry_out]
  set_property PACKAGE_PIN Y16 [get_ports carry_in]
  set_property IOSTANDARD LVCMOS33 [get_ports carry_in]
  </code></pre>