title: What's the difference between safe, regular and atomic registers?
body: <p>Can anyone provide exhaustive explanation, please? I'm diving into concurrent programming and met those registers while trying to understand consensus.</p>
  
  <p><a href="http://blog.cykerway.com/post/327" rel="noreferrer">From Lamport's "On interprocess communication"</a>: <em>...a regular register is atomic if two successive reads that overlap the same write cannot obtain the new then the old value...</em>. </p>
  
  <p>Assume, that first comes <code>thread0.write(0)</code> - with no overlapping. Basically, one can say using Lamports definition that <code>thread1</code> can read first <strong>1</strong> and then <strong>0</strong> again, if both reads are consequent and overlap with <code>thread0.write(1)</code>. But how is that possible?</p>