title: Designing a System Timer(Porgrammable Logic Timer)
body: <p><strong>System timer</strong></p>
  
  <p>Computers contain a timer containing programmable channels. Programmable
  channels mean timers of different durations. How to design such a circuit with four
  programmable channels, each disabled initially. An enable input, two channel select
  inputs and 4 lines for duration input can set any channel to a given duration from 1-
  15. Zero means to disable a channel. Four output lines correspond to the channels and
  are set high as soon as the corresponding timer expires.</p>
  
  <p><strong>Inputs</strong>
  Clock Pulse CP</p>
  
  <p>Input Available IA</p>
  
  <p>Channel Select CS0, CS1</p>
  
  <p>Duration D0…D3</p>
  
  <p><strong>Outputs</strong></p>
  
  <p>Timer Expire : TA, TB, TC, TD</p>
  
  <p>I want to use Discrete logic ICs like Flip-Flops,Logic Gates,Decoders,Multiplexers,Encoders, etc.Data input is to be done using buttons(Push-buttons) and output should be displayed on LEDs. The clock should be common. </p>