title: Cannot resolve slice name as type std.standard.integer
body: <p>following code is a simple instruction <code>Memory</code> in <code>Mips</code> CPU</p>
  
  <pre><code>LIBRARY ieee;
  use ieee.std_logic_1164.all;
  use ieee.std_logic_arith.all;
  use ieee.std_logic_unsigned.all;
  
  ENTITY instructionMemory IS
     generic (delay :time :=10 ns);
    PORT( a : INOUT STD_LOGIC_VECTOR ( 31 downto 0);
        output: OUT STD_LOGIC_VECTOR( 31 downto 0)
        );
  END ENTITY;
  ARCHITECTURE instructionMemory OF instructionMemory IS
    type MemMatrix is array ( 0 to 7 ) of std_logic_vector(31 downto 0); -- instruction from memory
    signal Mem:MemMatrix := (x"00000000",x"00000001",x"00000000",x"00000001",x"00000001",x"00000001",x"00000001",x"00000001");
  
    BEGIN
       output &lt;= Mem(conv_integer(a(6 downto 2)));             
  END instructionMemory;
  </code></pre>
  
  <p>I assume Mem is <code>Memory</code> and initilized it with some value. I wanna read this data and assign it to output.</p>
  
  <p>But it's gives me following error :   </p>
  
  <pre><code>no feasible entries for subprogram conv_integer  
  </code></pre>
  
  <p>I change error line to this :</p>
  
  <pre><code>Mem(a(6 downto 2));
  </code></pre>
  
  <p>But again it gives me another error:    </p>
  
  <pre><code>cannot resolve slice name to type std.standard.integer
  </code></pre>
  
  <p>I have no idea how to solve this, Can any body help me ? </p>