title: How to initialize an array in test bench in VHDL?
body: <p>In the following code, the main problem is that the array is not getting initialized by the testbech.</p>
  
  <p>My main purpose is to design the following unit which reads the address and outputs the instructions. The main input "INSTRUCTION_ADRESS" is an array which contains both the address and its contents.</p>
  
  <p><a href="https://i.stack.imgur.com/91NSe.jpg" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/91NSe.jpg" alt="enter image description here"></a></p>
  
  <p>Any comments will be greatly valued.</p>
  
  <pre><code>library IEEE;
  use IEEE.std_logic_1164.all;
  
  PACKAGE MIPS_PACKAGE is
  
      type INSTRUCTION_ARRAY is array (0 to 31) of std_logic_vector(31 downto 0);
  
  end PACKAGE MIPS_PACKAGE;
  
  
      -- INSTRUCTION MEMORY --
      library IEEE;
      use IEEE.STD_LOGIC_1164.ALL;
      use ieee.numeric_std.all;
      use IEEE.std_logic_unsigned."+";
  
      use work.MIPS_PACKAGE.all;
  
      entity INSTRUCTION_MEMORY is
              port(
  
                  PCSrc : in STD_LOGIC;
                  PC_EXT : in STD_LOGIC_VECTOR (31 downto 0);
  
                  INSTRUCTION_ADDRESS : in    INSTRUCTION_ARRAY;  
                  INSTRUCTION     : out   STD_LOGIC_VECTOR (31 downto 0)
  
                  );
      end INSTRUCTION_MEMORY;
  
      architecture INST_MEM of INSTRUCTION_MEMORY is
  
             Signal PC: std_logic_vector (31 downto 0):="00000000000000000000000000000100";
              Signal PC_ADD4: std_logic_vector (31 downto 0):=X"00000000";        
  
      begin
  
              INSTRUCTION &lt;= INSTRUCTION_ADDRESS(to_integer(unsigned(PC))); -- INSTRUCTION MEMORY
              PC_ADD4 &lt;= PC + X"4"; -- ADD 4
  
              MUX_PC: process(PCSrc)
  
                  begin
                      if( PCSrc = '0') then
                          PC &lt;= PC_ADD4; 
                      else
                          PC &lt;= PC_EXT;
                      end if;
                  end process MUX_PC; 
  
  
      end INST_MEM;
  
      ----------
      --TESTBENCH
  
      library IEEE;
      use IEEE.Std_logic_1164.all;
      use IEEE.Numeric_Std.all;
  
      use work.MIPS_PACKAGE.all;
  
      entity INSTRUCTION_MEMORY_tb is
      end;
  
      architecture bench of INSTRUCTION_MEMORY_tb is
  
        component INSTRUCTION_MEMORY
              port(
                  PCSrc : in STD_LOGIC;
                  PC_EXT : in STD_LOGIC_VECTOR (31 downto 0);
                  INSTRUCTION_ADDRESS : in    INSTRUCTION_ARRAY;  
                      INSTRUCTION     : out   STD_LOGIC_VECTOR (31 downto 0)
                  );
        end component;
  
        signal PCSrc: STD_LOGIC;
        signal PC_EXT: STD_LOGIC_VECTOR (31 downto 0);
        signal TestMemory: INSTRUCTION_ARRAY;
        signal INSTRUCTION: STD_LOGIC_VECTOR (31 downto 0) ;
  
      begin
  
        uut: INSTRUCTION_MEMORY port map ( PCSrc               =&gt; PCSrc,
                                           PC_EXT              =&gt; PC_EXT,
                                           INSTRUCTION_ADDRESS =&gt; TestMemory,
                                           INSTRUCTION         =&gt; INSTRUCTION );
  
        stimulus: process
        begin
  
          -- Put initialisation code here
  
      PCSrc  &lt;= '0';
      PC_EXT &lt;= "00000000000000000000000000000000";    
      TestMemory(0)   &lt;= "10001100000000010000000000000000";  
      wait for 1 ns;
  
      PCSrc  &lt;= '0';
      PC_EXT &lt;= "00000000000000000000000000000000"; 
      TestMemory(4)   &lt;= "10001100000000100000000000000001"; 
      wait for 1 ns;
  
      PCSrc  &lt;= '0';
      PC_EXT &lt;= "00000000000000000000000000000000";
      TestMemory(8)   &lt;= "00000000001000101000000000100000";  
  
      PCSrc  &lt;= '0';
      PC_EXT &lt;= "00000000000000000000000000000000";
      TestMemory(12)  &lt;= "00000010000000011000100000100000";  
      wait for 1 ns;
  
      PCSrc  &lt;= '0';
      PC_EXT &lt;= "00000000000000000000000000000000";
      TestMemory( 16 )  &lt;= "10101100000100000000000000000011";  
      wait for 5 ns;
  
          -- Put test bench stimulus code here
  
          wait;
        end process;
  
  
      end;
  </code></pre>