title: Error : Non-static loop limit exceeded
body: <p>Below is the non restoring square root algorithm. It's working fine but during synthesis it's showing an error : "Line 46: Non-static loop limit exceeded".</p>
  
  <pre><code>library IEEE;
  use IEEE.STD_LOGIC_1164.ALL;
  use IEEE.STD_LOGIC_ARITH.ALL;
  
  ENTITY code IS
      GENERIC(n: NATURAL:= 8);
      PORT(
          Xin: IN STD_LOGIC_VECTOR(2*n-1 DOWNTO 0);
          clk :IN STD_LOGIC ;
          root: OUT STD_LOGIC_VECTOR(n-1 DOWNTO 0) ;
          root2: OUT STD_LOGIC_VECTOR(2*n-1 DOWNTO 0) ;
          intval: IN STD_LOGIC_VECTOR(n-1 DOWNTO 0)  
      );
  END code;
  
  architecture Behavioral of code is
  
      Signal Outp : STD_LOGIC_VECTOR(n-1 DOWNTO 0);
      Signal Const1 : STD_LOGIC_VECTOR(n-1 DOWNTO 0) ;
      Signal Const2 : STD_LOGIC_VECTOR(n-1 DOWNTO 0) ;
  
  --Signal Var : STD_LOGIC_VECTOR(n-1 DOWNTO 0);
  
  begin
  
      Const1 &lt;= "00000010";
      Const2 &lt;= "00000000";
      --D &lt;= intval;
      --Var &lt;= intval;
  
      Process (clk) 
          Variable Acc1 : STD_LOGIC_VECTOR(2*n-1 DOWNTO 0);
          Variable Acc2 : STD_LOGIC_VECTOR(n-1 DOWNTO 0);
          Variable D   : STD_LOGIC_VECTOR(n-1 DOWNTO 0);
          Variable Var : STD_LOGIC_VECTOR(n-1 DOWNTO 0);
          Variable Q : STD_LOGIC_VECTOR(2*n-1 DOWNTO 0);
      begin
          Var := "00000000";
          D   := intval;
          Var := intval;
  
          while (Var &gt; "00000000") loop
  
              Q := signed(D)*signed(D);
              Acc1 := signed(Xin) - signed(Q);
  
              if  (Acc1 = "0000000000000000") then
                  var:= Const2;
  
              elsif (Acc1 &lt; "1000000000000000") then
                  --root2&lt;=Acc1;
                  Acc2 := '0' &amp; var(n-1 downto 1);
                  Var := Acc2;
                  D := signed(D) + signed(Var);
  
              elsif (Acc1 &gt; "0111111111111111") then
                  --root2&lt;=Acc1; 
                  Acc2 := '0' &amp; var(n-1 downto 1);
                  Var := Acc2;
                  --root &lt;= Var;
                  D := signed(D) - signed(Var);
  
              end if;
          end loop;
  
          Outp &lt;= D;
      end process;
  
      root &lt;= Outp;
  end Behavioral;
  </code></pre>