title: The "Special Mask Mode" in 8259A with OCW3 (PIC : Programmable Interrupt Controller)
body: <p>The manual for 8259A says that</p>
  <blockquote>
  <p>In the special Mask Mode, when a mask bit is set in OCW1, it inhibits further interrupts at that level and enables interrupt from all other levels (lower as well as higher level) that are not masked.</p>
  <p>Thus, any interrupts may be selectively enabled by loading the mask register.</p>
  </blockquote>
  <p>Do the operating system use this mode when the kernel sets up the PIC? If no then the lower priority interrupts would get a bit lower benefit. Like the keyboard gets more benefit than the FDD. Is the hardware interrupt mapping to the cascaded PIC in the system assigned/hard wired in the order of the importance.</p>
  <p>Special Mask Mode or Normal Mask Mode, Which mode would get better performance or some benefit.</p>
  <p>Suggestion on implementation of the Special Mask Mode when configuring the PIC for an x86 PC system would help me decide if i should use it or not.</p>