title: Makefile to compile kernel module to include out of tree source files
body: <p>I am new to compiling kernel modules to include out of tree source files using a makefile. I have read a few tutorials and I am still falling short. Without getting too detail I have created a scenario to describe the problem and resulting makefile. </p>
  
  <pre><code>dir1/main.c
  
  dir2/subdir2/file.c
  dir2/subdir2/include/file.h
  </code></pre>
  
  <p>Below is a resulting makefile</p>
  
  <pre><code>obj-m:=main.o
  main-y := ../dir2/include/file.o
  KDIR := /home/userid/rowboat-android/kernel/
  PWD := $(shell pwd)
  
  
  default:
        $(MAKE) ARCH=arm CROSS_COMPILE=/home/userid/rowboat-android/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi-  -C $(KDIR) SUBDIRS=$(PWD) modules
  
  clean
        $(MAKE) -C $(KDIR) SUBDIRS=$(PWD) clean
  </code></pre>
  
  <p>Per the scenario described is this Makefile correct?</p>
  
  <p>The reference material talk about ccflags-y and EXTRA_CFLAGS. Can someone please explain the purpose of these switches?</p>
  
  <p>My primary source of references are</p>
  
  <ol>
  <li><a href="https://www.kernel.org/doc/Documentation/kbuild/modules.txt" rel="nofollow">Building External Modules</a></li>
  <li><a href="http://www.ravnborg.org/kbuild/makefiles.html" rel="nofollow">Linux Kernel Makefiles</a></li>
  <li>Questions and answers on Stackoverflow</li>
  </ol>
  
  <p>Thank you for your time in advance</p>