title: makefile execute another target
body: <p>I have a makefile structured something like this:</p>
  
  <pre><code>all : 
      compile executable
  
  clean :
      rm -f *.o $(EXEC)
  </code></pre>
  
  <p>I realized that I was consistently running "make clean" followed by "clear" in my terminal before running "make all". I like to have a clean terminal before I try and sift through nasty C++ compilation errors. So I tried to add a 3rd target:</p>
  
  <pre><code>fresh :
      rm -f *.o $(EXEC)
      clear
      make all
  </code></pre>
  
  <p>This works, however this runs a second instance of make (I believe). Is there a right way to get the same functionality without running a 2nd instance of make?</p>