title: VHDL coding style and best practises reference guide
body: <p>Do any of you know about a good VHDL coding style guide and good practises guide? With sw there are a lot of material, but with VHDL I don't see a reference example. I supposed because each maker has its own synthesis tool, and the code interpretation changes. </p>
  
  <p>I'm looking for a short guide instead of a large book.</p>
  
  <p>Thanks!</p>