title: Overriding explicit rules in Makefiles
body: <p>I have a Makefile system that dynamically generates rules to build lists of files for different platforms. For various reasons implicit rules cannot be used as there is no common pattern to apply, but rather the output of various functions over file lists.</p>
  
  <p>Now I'm trying to add automatic dependency generation in a way that it's triggered only for the targets that are needed to be built. The normal way to do this is to define implicit rules that generate dependencies and then include or define explicit rules requiring these dependencies as prerequisites for the same target (see <a href="http://mad-scientist.net/make/autodep.html" rel="nofollow">http://mad-scientist.net/make/autodep.html</a> for an example). This works because make automatically overrides implicit rules with explicit versions of the same rule without complaining.</p>
  
  <p>However, since I have no option to use implicit rules I'm trying to figure out a way to do this. I see only two approaches:</p>
  
  <ol>
  <li>Dynamically rewrite explicit rules and get a "warning: overriding commands for target" for each one.</li>
  <li>Find a way tell Make to drop an existing rule definition, so I can provide a new one.</li>
  </ol>
  
  <p>Since AFAIK there is no way to do the 2nd option, does anybody know how I can suppress the "overriding commands for target" warnings? Any other suggestions for overriding explicit rules and evaluating them again with new prerequisites?</p>