title: Generate random values in VHDL function
body: <p>I have a design were I'm writing/reading to/from a RAM and perform some computation on the read values. In some cases, I read values from RAM locations where I haven't written anything to yet. This is intentional because in the cases where this happens, the uninitialized values don't affect the computation: in these cases, the uninitialized values are multiplied with 0.</p>
  
  <p>However, multiplying an <code>unsigned</code>/<code>signed</code> type which contains <code>'U'</code> bits results in a "don't care" output (i.e. all bits of the multiplication output are <code>'X'</code>) even if the other operand is 0. Therefore, I can't check the final computation output in my testbench because it becomes "don't care" (it seems like "don't care" outputs are interpreted as 0).</p>
  
  <p>To avoid this problem, I wrote a function that resolves any <code>'U'</code> or <code>'X'</code> bits in a <code>std_logic_vector</code> to <code>'0'</code>. The functions looks as follows</p>
  
  <pre><code>function f(x : std_logic_vector) return std_logic_vector is
    variable y : std_logic_vector (x'range);
  begin
    y := x;
    -- pragma synthesis off
    for i in 0 to x'length-1 loop
      case x(i) is
        when 'U' | 'X' =&gt; y(i) := '0';
        when others    =&gt; y(i) := x(i);
      end case;
    end loop;  -- i
    -- pragma synthesis on
    return y;
  end;
  </code></pre>
  
  <p>Now I'd like to expand the function by not only setting <code>'X'</code> and <code>'U'</code> bits to <code>'0'</code> but to randomly set them to either <code>'0'</code> or <code>'1'</code>. I've tried using the <code>uniform</code> function within <code>f</code>. The problem is that when I define the two seeds within the function, that each time the function <code>f</code> is called it returns the same <code>std_logic_vector</code> (when it is given the same <code>std_logic_vector</code>). As I take it from the <code>uniform</code> function description, I should pass the two seeds from outside the function <code>f</code> because they are modified by the <code>uniform</code> function for the next call to <code>uniform</code>.</p>
  
  <p>Is there a possibility how this can be achieved using a function?</p>