title: Relevance of shared memory bank conflicts in Fermi and higher
body: <p>From what I read in the CUDA documentation, shared memory bank conflicts are irrelevant on sm_20 and higher because values are broadcasted when they are requested simultaneously, preventing any sort of serialization delays.</p>
  
  <p>The documentation:</p>
  
  <blockquote>
    <p>The shared memory hardware is improved on devices of compute
    capability 2.x to support  multiple broadcast words and to generate
    fewer bank conflicts for accesses of 8-bits, 16-bits,  64-bits, or
    128-bits per thread (Section G.4.3).</p>
  </blockquote>
  
  <p>Can someone confirm my assertion?</p>