title: Set and reset on rising and falling edge
body: <p>How to set a bit on rising edge and reset that bit on falling edge of a clock signal?
  I would like to know how i can achieve the same. Depending upon a condition i want to set on rising edge and reset on falling edge. It's like getting clock pulse itself at the output.</p>
  
  <p>I implemented for two different clock pulses but i am getting glitches like these.</p>
  
  <p><img src="https://i.stack.imgur.com/LDDUZ.jpg" alt="enter image description here"></p>
  
  <p>My code for same is as this</p>
  
  <pre><code>process(clk)
  begin 
     if rising_edge(clk) then
        d0 &lt;= new_data;
     end if;
  end process;
  
  process(clk)
  begin 
     if falling_edge(clk) then
        d1 &lt;= new_data;
     end if;
  end process;
  
  out &lt;= d0 when clk = '1' else d1;
  </code></pre>
  
  <p><img src="https://i.stack.imgur.com/nfWlk.jpg" alt="enter image description here"></p>