title: Argh, makefile won't pick up dependencies correctly
body: <p>My simple little makefile is exhibiting behavior which I'm not able to understand. If I touch any source file except Dictionary.cpp then no targets are built, and if I touch Dictionary.cpp then it compiles but doesn't link. Source files are in src/ object (.o) and dependencies (.d) are in obj/ and binary goes into bin/</p>
  
  <p>If I rm obj/* then everything builds OK but the timestamps don't seem to be being picked up. Can anyone tell me where I'm going wrong?</p>
  
  <p>The .d files seem to be being created correctly, here's Dictionary.d:</p>
  
  <pre><code>obj/Dictionary.o: src/Dictionary.cpp src/pch.h src/Types.h src/Util.h \
   src/Refcount.h src/Dictionary.h
  src/Dictionary.cpp:
  src/pch.h:
  src/Types.h:
  src/Util.h:
  src/Refcount.h:
  src/Dictionary.h:
  </code></pre>
  
  <p>Which looks correct to me. Here's the makefile:</p>
  
  <pre><code>sources =   Dictionary.cpp  \
              Util.cpp        \
              Tile.cpp        \
              Board.cpp       \
              Vec2.cpp        \
              Letter.cpp      \
              Random.cpp      \
              Server.cpp      \
              main.cpp
  
  objects = $(patsubst %.cpp,obj/%.o,$(sources))
  depends = $(patsubst %.cpp,obj/%.d,$(sources))
  
  CXX = g++
  CPPFLAGS = -Isrc -std=c++0x
  CXXFLAGS = -c
  
  -include $(depends)
  
  bin/dictionary: $(objects)
      @echo Link...
      $(CXX) $(CPPFLAGS) $(objects) -o bin/dictionary -lrt
  
  obj/%.o: src/%.cpp
      @echo [$*]
      @$(CXX) $(CPPFLAGS) $(CXXFLAGS) src/$*.cpp -o obj/$*.o
      @$(CXX) $(CPPFLAGS) -MM src/$*.cpp -MF obj/$*.d
      @mv -f obj/$*.d obj/$*.d.tmp
      @sed -e 's|.*:|obj/$*.o:|' &lt; obj/$*.d.tmp &gt; obj/$*.d
      @sed -e 's/.*://' -e 's/\\$$//' &lt; obj/$*.d.tmp | fmt -1 | sed -e 's/^ *//' -e '    s/$$/:/' &gt;&gt; obj/$*.d
      @rm -f obj/$*.d.tmp
  </code></pre>