title: GNU make: Override variable based on target
body: <p>I have a nonrecursive build system, where parsing happens once. While parsing, I create a dependency chain for binary &lt;- library &lt;- object </p>
  
  <p>The same source code is compiled for multiple hardware variants.</p>
  
  <p>There is target all which depends on variant/all.
  There are variants/variant_name/all for each hardware needed by variant/all.
  variant/variant_name/all depends on all the binaries.</p>
  
  <p>As parsing would have constructed the rest of the dependency, a simple make all does the job for me.</p>
  
  <p>The requirement now is:
  We have more than one customer, whose toolchain is different for the same hardware variant. How can I parse once, and run build for all customers at once putting Customer Specific binaries, libraries etc into their own directories.</p>
  
  <p>The following are the options I thought about.</p>
  
  <ol>
  <li><p>Parse multiple times(== number of customers), and call make multiple times. Split variant/all into two(==number of customers) all_customer1, all_customer2 variant/all depends on all_customer1 all_customer2 This is working almost fine! But, I'm interested in parsing once, and serving the purpose.</p></li>
  <li><p>Target specific variables feature of Make. But, this cannot be used in my case because I don't know all the targets already, and so the the dependency graph is not predefined and so I cannot really go with this feature.</p></li>
  </ol>
  
  <p>Our system is perhaps more complex than I explained. But, from the comments I hear, I'm hoping to get some more help. Appreciate your time.</p>