title: Declaring and using a static array of constants
body: <p>I just got into verilog and I want to write a simple module that gets a 4 bit value in (called data) and outputs an 8bit value for a 7 segment display (called seven_seg).</p>
  
  <pre><code>module LCD_Encoder (
      input clk,
      input rst,
      input [3:0] data,       // digit to write 0-F
      output [6:0] seven_seg, // 7 segment out, LSB -&gt; A, B, C, D, E, F, G &lt;- MSB
      output dp               // decimal point
      );
  </code></pre>
  
  <p>I didn't want to write if statements all over checking for every 16 different values of the input data and then decide what to display, so I came up with an array like so:</p>
  
  <pre><code>// define 7 segment display, 16(different characters) * 7 bits(7 segment)
  localparam [6:0] display [15:0] = {
      // GFE_DCBA
      7'b011_1111, // 0
      7'b000_0110, // 1
      7'b101_1011, // 2
      7'b100_1111, // 3
      7'b110_0110, // 4
      7'b110_1101, // 5
      7'b111_1101, // 6
      7'b000_0111, // 7
      7'b111_1111, // 8
      7'b110_1111, // 9
      7'b111_0111, // A
      7'b111_1100, // B
      7'b011_1001, // C
      7'b101_1110, // D
      7'b111_1001, // E
      7'b111_0001  // F
  };
  </code></pre>
  
  <p>The decimal point on the 7segment display is handled seperately.
  However I get this error:</p>
  
  <blockquote>
    <p>Constant value or constant expression must be used for initialization</p>
  </blockquote>
  
  <p>Later I want to use the array like so:</p>
  
  <pre><code>always @(posedge clk or posedge rst) begin
      if (rst == 1'b1) begin
          seven_seg &lt;= 7'b0;
      end
      else begin
          // use 4-bit (0-F) data as address for the array
          seven_seg &lt;= display[data]; // does this work??
      end
  end
  </code></pre>
  
  <p>however I fear that this will end in yet another failure.</p>
  
  <p>I use ISE from Xilinx and for now and I simulate a spartan 6 xc6slx9 (my board arrives next month).</p>
  
  <p>What am I doing wrong here?</p>
  
  <p>Also since display is always going to be static, is there a way to only have it once and not create the circuit every time you instantiate a new module?</p>