title: How to declare input and output types in verilog
body: <p>I have this top module that instantiate two modules: </p>
  
  <pre><code>fillRam fillRam1(
    .clk(mclk),
    .ramaddrb(ramaddrb),
    .romaddrb(romaddrb),
    .romoutb(romoutbwire),
    .raminb(raminb));
  
  vga vgainst(
    .ck(mclk),
    .HS(HS),
    .VS(VS),
    .outRed(OutRed),
    .outGreen(OutGreen),
    .outBlue(OutBlue),
    .sw(sw),
    .romouta(romoutawire),
    .ramouta(ramoutawire),
    .romaddra(romaddra),
    .ramaddra(ramaddra));
  </code></pre>
  
  <p>In this top module, i also have two module that makes the connections on the RAM and ROM. </p>
  
  <pre><code>rom rom_instance (
    .clka(mclk), // input clka
    .addra(romaddrawire), // input [14 : 0] addra
    .douta(romouta), // output [7 : 0] douta
    .clkb(ck), // input clkb
    .addrb(romaddrbwire), // input [14 : 0] addrb
    .doutb(romoutb) // output [7 : 0] doutb
  );
  </code></pre>
  
  <p>The thing i want to do is, get the romaddra value from vga module, give it to rom_instance, and get the romouta value and give it back to vga module back. 
  I declare two variables for that:</p>
  
  <pre><code>reg  [14:0] romaddra;
  wire  [14:0] romaddrawire;
  reg [7:0] romouta;
  wire [7:0] romoutawire;
  assign romaddrawire = romaddra;
  assign romoutawire = romouta;
  </code></pre>
  
  <p>In every clock cycle, i get the romaddra value from vga instance, write it to romaddrawire and give it to the ROM instance. Then i take the romouta value, write it to romoutawire and give it back to the VGA instance.</p>
  
  <p>I have similar declarations on other rom ports and ram ports. But in all of them i get this error.</p>
  
  <pre><code>ERROR:HDLCompilers:102 - "top.v" line 82 Connection to output port 'romaddra' must be a net lvalue
  </code></pre>
  
  <p>in vga verilog code:</p>
  
  <pre><code>output reg [14:0] romaddra;
  </code></pre>
  
  <p>and in rom verilog:</p>
  
  <pre><code>output [7 : 0] douta;
  </code></pre>
  
  <p>Im very confused about this whole reg and wire types. I would be glad if someone explain what is going wrong here and the reason aswell. Thanks.</p>