title: ARM Undefined Instruction error
body: <p>I'm getting an Undefined Instruction error while running an embedded system, no coprocessor, no MMU, Atmel 9263. The embedded system has memory in the range 0x20000000 - 0x23FFFFFF. I've had two cases so far:</p>
  
  <ol>
  <li><p>SP 0x0030B840, LR 2000AE78 - the LR points at valid code, so I'm not sure what causes the exception, although the SP is bogus. What other addresses, registers, memory locations should I look at?</p></li>
  <li><p>SP 0x20D384A8, LR 0x1FFCA59C - SP is ok, LR is bogus. Is there some kind of post mortem that I can do to find out how the LR got crushed? Looks like it rolled backwards off the end of the address space, but I can't figure out how.</p></li>
  </ol>
  
  <p>Right now I am just replacing large chunks of code with simulations and running the tests agin to try and isolate the issue - the problem is sometimes it takes 4 hours to show the problem. </p>
  
  <p>Any hints out there would be appreciated, thanks!</p>
  
  <p>The chip is the AT91SAM9263, and we are using the IAR EWARM toolchain. I'm pretty sure it is straight ARM, but I will check.</p>
  
  <p><b>EDIT</b></p>
  
  <p>Another example of the Undef Instruct - this time SP/LR look fine. LR = 0x2000b0c4, and when I disassemble near there:</p>
  
  <p>2000b0bc e5922000 LDR R2, [R2, #+0]<br>
  2000b0c0 e12fff32 BLX R2<br>
  2000b0c4 e1b00004 MOVS R0, R4  </p>
  
  <p>since LR is the instruction following the Undef Exception - how is BLX identified as Undefined? Note that CPSR is 0x00000013, so this is all ARM mode. However, R2 is 0x226d2a08 which is in the heap area, and I think is incorrect - the disassmbly there is ANDEQ R0,R0,R12, the instruction is 0x0000000C, and the other instructions there look like data to me. So I think the bad R2 is the problem, I'm just trying to understand why the Undef at the BLX?</p>
  
  <p>thanks!</p>