title: make keeps rearranging the arguments in the rule command - how do I stop that?
body: <p>witihn the target, there is a rule that invokes libtool with some arguments. Actual command line that gets executed when rule triggers has arguments rearranged.</p>
  
  <p>I tried rearranging the argument sequence in a rule in various combinations, but final line that is executed, is always the same.</p>
  
  <p>Finally, I tried capturing all the line that shall be executed in one variable and then entered that variable to be expanded as a line that gets executed by the shell. That works.</p>
  
  <p>E.g:</p>
  
  <p>1 - original, that fails:</p>
  
  <pre><code>target.o:
  &lt;---------&gt;$(some_command) $(first_arg) $(second_one) $(third) $(fourth)
  </code></pre>
  
  <p>On triggering the rule, something like this gets executed</p>
  
  <pre><code>&lt;---------&gt;$(some_command)  $(second_one) $(fourth) $(third)  $(first_arg)
  </code></pre>
  
  <p>WTF?</p>
  
  <p>In case it's relevant, that some_command is libtool.</p>
  
  <p>(this is from Makefile | gsymcheck/src/MAkefile | within gEDA CAD, that I'm trying to mend to be compilable with LTO  optimizations BTW.)</p>
  
  <p>line is: </p>
  
  <pre><code>$(AM_V_CCLD)$(gsymcheck_LINK) $(gsymcheck_OBJECTS) $(gsymcheck_LDADD) $(LIBS)
  </code></pre>
  
  <p>expect for the recept line of the rule to be executed as it was given, without make playing "origami" with it.</p>