title: How to compile different c files with different CFLAGS using Makefile?
body: <p>all. Let's say I have a program that contains a long list of C source files, A.c, B.c, ...., Z.c, now I want to compile A.c, B.c with certain CFLAGS, and compile the rest part of source files with a different CFLAGS value. </p>
  
  <p>How to write a Makefile to do the above described job? currently what I am doing in my Makefile is:</p>
  
  <pre><code>OBJ=[all other .o files here, e.g. D.o, D.o, E.o .... Z.o]
  SPECIAL_OBJS=A.o B.o
  
  all: $(OBJ) $(SPECIAL_OBJS)
  
  $(SPECIAL_OBJS): 
       @echo [Compiling]: $(@:.o=.c)
       $(CC) [SOME OTHER GCC OPTIONS HERE] $(CFLAGS) -c $(@:.o=.c) -o $@
  
  %.o: %.c
       @echo [Compiling]: $&lt;
       $(CC) $(CFLAGS) -o $@ -c $&lt;
  </code></pre>
  
  <p>It works, but looks just stupid/complicated. Can anyone help to point out what is the recommended way of doing this in Makefile? thanks!</p>