title: MIPS Pipeline Simulator in C
body: <p>I'm supposed to write a C program that takes an .asm file that contains a set of MIPS instructions and then provides a diagnostic of what occurs during each cycle. As far as formatting, etc I won't need help. I've been given code that covers that; however I'm struggling figuring out how to set up my pipeline registers. </p>
  
  <p>I have the IFID pipeline set up and I think I have the IDEX pipeline set up correctly but I'm unsure if I'm on the right track, the <code>regFile</code> array is mainly what I'm unsure about, the <code>state.regFile[(state.PC)/4];</code> is divided by 4 due to the fact that the addresses, meant to mimic MIPS, are word aligned but I don't know if what I currently have even makes sense.</p>
  
  <p>Here is a snippet of my main function. </p>
  
  <p>Note that <code>IFID</code>, <code>IDEX</code>, <code>EXMEM</code>, <code>MEMWB</code> are my pipelines and are structs each containing the necessary information for each pipeline.</p>
  
  <pre><code>void run(){
  
    stateType state;           /* Contains the state of the entire pipeline before the cycle executes */ 
    stateType newState;        /* Contains the state of the entire pipeline after the cycle executes */
    initState(&amp;state);         /* Initialize the state of the pipeline */
  
     while (1) {
  
      printState(&amp;state);
  
  /* If a halt instruction is entering its WB stage, then all of the legitimate */
  /* instruction have completed. Print the statistics and exit the program. */
      if (get_opcode(state.MEMWB.instr) == HALT) {
          printf("Total number of cycles executed: %d\n", state.cycles);
          /* Remember to print the number of stalls, branches, and mispredictions! */
          exit(0);
      }
  
      newState = state;     /* Start by making newState a copy of the state before the cycle */
      newState.cycles++;
  
  /* Modify newState stage-by-stage below to reflect the state of the pipeline after the cycle has executed */
  
      /* --------------------- IF stage --------------------- */
  
      /* Setting IFIDs instruction equal to the instruction found at address state.PC*/
      newState.IFID.instr = state.instMem[(state.PC)/4];
      /* Setting IFID's PCPlus4 to state.PC + 4 */
      newState.IFID.PCPlus4 = state.PC + 4;
      /* Update PC */
      newState.PC = state.PC +  4;
  
      /* --------------------- ID stage --------------------- */       
  
      newState.IDEX.instr = state.instMem[(state.PC)/4];
      newState.IDEX.PCPlus4 = state.PC + 8;
      newState.IDEX.readData1 = state.regFile[(state.PC)/4];
      newState.IDEX.readData2 = state.regFile[(state.PC)/4];
      newState.IDEX.immed = state.regFile[(state.PC)/4];
      newState.IDEX.rsReg = state.regFile[(state.PC)/4];
      newState.IDEX.rtReg = state.regFile[(state.PC)/4];
      newState.IDEX.rdReg = state.regFile[(state.PC)/4];
      newState.IDEX.branchTarget = state.regFile[(state.PC)/4];
  
  
      /* --------------------- EX stage --------------------- */
      newState.EXMEM.instr = state.instrMem[(state.PC)/4];
      newState.EXMEM.PCPlus4 = state.PC + 12;
  
  
      /* --------------------- MEM stage --------------------- */
  
  
      /* --------------------- WB stage --------------------- */
  
  
      state = newState;    /* The newState now becomes the old state before we execute the next cycle */
  }
  }
  </code></pre>