title: makefile with computed variables inside a search pattern
body: <p>I am working on a makefile that I think should use computed variables inside of a pattern. As part of a larger project I have three different parsers that have a lot of overlap and are written in modular form so as to be able to maintain the common components more easily. The relevant part of the makefile is this:</p>
  
  <pre><code>parser1object = firstobject
  parser2object = secondobject
  parser3object = thirdobject
  
  
  $(srcdir)/HIG%.y: \
      $(srcdir)/HIG%.y.1 \
      $(srcdir)/common.tokens \
      $(srcdir)/HIG%.y.2   \
      $(srcdir)/common.syntax  \
      $(srcdir)/HIG%.y.3
  sed 's/parserObjects/S((S*)object))/g' \
           $(srcdir)/HIG$*.y.2        &gt;$*temp.tmp
  sed 's/parserObjects/S((S*)object))/g' \
           $(srcdir)/common.syntax &gt;common.syntax.tmp
  cat $(srcdir)/HIG$*.y.1 \
      $(srcdir)/common.tokens  \
      $*temp.tmp common.syntax.tmp \
      $(srcdir)/HIG$*.y.3 &gt;$(srcdir)/HIG$*.y
  rm -f $*temp.tmp
  rm -f common.syntax.tmp
  </code></pre>
  
  <p>That is, I want to concatenate a number of files into one of several grammar files for bison. In the common syntax file I have some references to a generic object that need to be replaced with the name of the object in the respective parser. However, because it is inside of a pattern, the variable replacement mechanism doesn't seem to work as I had hoped. (For parser1, I want to change <code>$($*)object</code> to <code>$(parser1object)</code> and finally to <code>firstobject</code>.</p>
  
  <p>How can I achieve what I want to do?</p>
  
  <p>Incidentally, because of the pattern replacement this seems to be different from {<a href="https://stackoverflow.com/questions/25815819/makefile-and-computed-variable-names">Makefile and computed variable names</a>}</p>