title: Auto dependencies in makefile and project directory structure
body: <p>I've been trying for a while to use auto dependencies in my makefile, but i struggle a lot to make it work, as i use a more complex structure for my project than just putting every files in a root folder.</p>
  
  <p>I've tried using this piece of code in my makefile : </p>
  
  <pre><code>OBJECTS_DIR = obj/
  SRCS_DIR = src/
  #source files list, i.e : src/foo.cpp src/bar/foo2.cpp
  SOURCES = $(shell find $(SRCS_DIR) -name \*.cpp | xargs -d '\n')
  #object files list, i.e : obj/foo.o obj/foo2.o
  OBJECTS = $(addprefix $(OBJECTS_DIR), $(notdir $(SOURCES:.cpp=.o)))
  DEPS = $(OBJECTS_DIR)make.dep
  
  myproject : $(OBJECTS)
      $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^
  
  $(OBJECTS) : $(SOURCES)
      $(CC) $(CFLAGS) $(LDFLAGS) -o $@ -c $(filter %/$(notdir $(@:.o=.cpp)), $(SOURCES))
  
  $(DEPS): $(SOURCES)
      $(CC) -MM  $(SOURCES) &gt; $(DEPS)
  
  -include $(DEPS)
  
  all : myproject
  
  clean :
      @-rm -f $(RELEASE_DIR)* $(OBJECTS_DIR)*
  </code></pre>
  
  <p>I would like to store all the dependencies in the obj/make.dep file. This gives me the following output (here foo includes foo2) :</p>
  
  <pre><code>foo2.o: src/bar/foo2.cpp src/bar/headers/foo2.h
  foo.o: src/foo.cpp src/bar/headers/foo2.h
  </code></pre>
  
  <p>I would like to rename each of the object files in order to have the following output :
      obj/foo2.o: src/bar/foo2.cpp src/bar/headers/foo2.h
      obj/foo.o: src/foo.cpp src/bar/headers/foo2.h</p>
  
  <p>I've tried with the -MT option with no result...
  Furthermore, is the -include $(DEPS) enough to include the dependencies i created? Shouldn't I replace $(filter %/$(notdir $(@:.o=.cpp)), $(SOURCES)) in the OBJECT rule by the line written in the make.dep file?</p>
  
  <p>Thanks in advance for your insight, please tell me if there is any other way to enhance my makefile !</p>