title: Understanding CPU cache and cache line
body: <p>I am trying to understand how CPU cache is operating. Lets say we have this configuration (as an example).</p>
  
  <ul>
  <li>Cache size 1024 bytes</li>
  <li>Cache line 32 bytes</li>
  <li>1024/32 = 32 cache lines all together.</li>
  <li>Singel cache line can store 32/4 = 8 ints.</li>
  </ul>
  
  <p>1) According to these configuration length of tag should be 32-5=27 bits, and size of index 5 bits (2^5 = 32 addresses for each byte in cache line).</p>
  
  <p>If total cache size is 1024 and there are 32 cache lines, where is tags+indexes are stored? (There is another 4*32 = 128 bytes.) Does it means that actual size of the cache is 1024+128 = 1152?</p>
  
  <p>2) If cache line is 32 bytes in this example, this means that 32 bytes getting copied in cache whenerever CPU need to get new byte from RAM. Am I right to assume that cache line position of the requested byte will be determined by its adress? </p>
  
  <p>This is what I mean: if CPU requested byte at <code>[FF FF 00 08]</code>, then available cache line will be filled with bytes from <code>[FF FF 00 00]</code> to <code>[FF FF 00 1F]</code>. And our requseted single byte will be at position <code>[08]</code>.</p>
  
  <p>3) If previous statement is correct, does it mean that 5 bits that used for index, are technically not needed since all 32 bytes are in the cache line anyway?</p>
  
  <p>Please let me know if I got something wrong.
  Thanks</p>