title: How many bits are needed needed for 2 way associative cache addressing?
body: <p>The question below is confusing me, as it is not similar to other examples that I have seen.</p>
  
  <p>For a 128 byte memory and 32 bytes 2-way set associate write-back, write-allocate data cache with 4 byte blocks and LRU (Least Recently Used) replacement policy, show the memory address breakdown for block offset, set index, and tag fields.  How many bits are needed for each field?</p>
  
  <p>I came up with 7 bits needed for the addressing in total.  Of those 7 bits, 2 bits are needed for the block offset, 2 bits for the set index, and 3 bits for the tag.  Is this correct?</p>