title: memory safety of volatile sig_atomic_t
body: <p><code>volatile sig_atomic_t</code> is a guaranteed safe way of sharing data between a signal handler and the main application. What memory ordering guarantee does Posix make when running on a modern CPU with a more relaxed memory model. Specifically, should one use memory barriers / memory fences when reading or writing data using <code>volatile sig_atomic_t</code>?</p>
  
  <p>Edit: Just to clarify. My question is how when using sig_atomic_t can we guarantee that bad things do not happen with regard to relaxed memory ordering especially in modern highly cached, multicore, etc architecture.</p>