title: Makefile to compile all .c files without needing to specify them
body: <p>I'm trying to create a Makefile that causes all <code>.c</code> files to be compiled without the need to add filenames line per line inside the Makefile. I think this is fairly similar to <a href="https://stackoverflow.com/questions/170467/makefiles-compile-all-c-files-at-once">makefiles - compile all c files at once</a>. Here's what I want to do:</p>
  
  <p>1 - Verify if all <code>.c</code> files from <code>/src</code> have their respective <code>.o</code> files from <code>/obj</code>. If the <code>.o</code> file does not exist, build it from the <code>.c</code> file;</p>
  
  <p>2 - Compile <code>main.exe</code> from all <code>.o</code> and put it on <code>/bin</code>.</p>
  
  <p>My Makefile:</p>
  
  <pre><code>BIN     = ./bin
  OBJ     = ./obj
  INCLUDE = ./include
  SRC     = ./src
  
  all:
      gcc -c "$(SRC)/Distances.c" -o "$(OBJ)/Distances.o"
      gcc -c "$(SRC)/HandleArrays.c" -o "$(OBJ)/HandleArrays.o"
      gcc -c "$(SRC)/HandleFiles.c" -o "$(OBJ)/HandleFiles.o"
      gcc -c "$(SRC)/Classifier.c" -o "$(OBJ)/Classifier.o"
      gcc -c main.c -o "$(OBJ)/main.o"
      gcc -o $(BIN)/main.exe $(OBJ)/*.o -lm
  
  run:
      $(BIN)/main.exe
  
  clean:
      del /F /Q "$(OBJ)" ".o"
      del /F /Q "$(BIN)" ".exe"
  </code></pre>
  
  <p>I guess I need to use something like <code>$(SRC)/*.c</code>, but I couldn't make it.</p>
  
  <p>Now, about <code>make clean</code>, I don't know how to make it work cross-platform. I'm using <code>del</code> as I'm on Windows.</p>