title: Why Make doesn't recognize my variable?
body: <p>I have a short Make script, which works if I put the Build directory in as a string manually myself instead of as a variable:</p>
  
  <pre><code>CC = gcc
  CFLAGS = -O2 -g -Wall -fmessage-length=0
  LDFLAGS =
  SRCDIR = Src
  BUILDDIR = Build 
  SRCS = $(SRCDIR)/Main.c
  OBJS = $(SRCS:.c=.o)
  LIBS =
  TARGET = HelloWorld
  
  all: dir $(SRC) Build/$(TARGET)
  
  dir:
      mkdir -p $(BUILDDIR)
  
  Build/$(TARGET): $(OBJS) 
      $(CC) $(LDFLAGS) $(OBJS) -o $@
  
  $(SRCDIR).c.o:
      $(CC) $(CFLAGS) $&lt; -o $@
  
  clean:
      rm -f $(OBJS) $(TARGET)
  </code></pre>
  
  <p>It stops working with the error message: </p>
  
  <pre><code>make: *** No rule to make target `/HelloWorld', needed by `all'.  Stop.
  </code></pre>
  
  <p>when I replace the line:</p>
  
  <pre><code>all: dir $(SRC) Build/$(TARGET)
  </code></pre>
  
  <p>with:</p>
  
  <pre><code>all: dir $(SRC) $(BUILDDIR)/$(TARGET)
  </code></pre>
  
  <p>Why is Make not substituting the <code>$(BUILDDIR)</code> clause with <code>Build</code>?</p>