title: vhdl: convert vector to string
body: <p>How can I convert a std_logic vector, bit_vector or any other vector to string?</p>
  
  <pre><code>Signal a,b          : UNSIGNED(7 DOWNTO 0);
  SIGNAL x,y,z    : BIT_VECTOR(7 DOWNTO 0);
  
  ...
  
  report "value: " &amp; BIT_VECTOR'Image(x) severity note;
  report "and this one: " &amp; to_string(a) severity note;
  </code></pre>
  
  <p>This does not work, so how can I convert a vector to a string?</p>