title: Alias target name in Makefile
body: <h2>The Problem:</h2>
  
  <p>Is it possible to give a target a different name or alias, such that it can be invoked using either the original target name or the alias.</p>
  
  <p>For example something like</p>
  
  <pre><code>/very/long/path/my_binary: dep_a dep_b dep_c
      # Compile
  
  # Desired command
  ALIAS my_binary = /very/long/path/my_binary
  
  # NOTE: Notice the use of 'my_binary' in the dependencies
  data1: my_binary datafile
      # Build data file using compiled my_binary
  </code></pre>
  
  <h2>Attempt 1: .PHONY</h2>
  
  <p>I have tried using a <code>.PHONY</code> target:</p>
  
  <pre><code>.PHONY: my_binary
  my_binary: /very/long/path/my_binary
  </code></pre>
  
  <p>This works great when invoked from the command-line:</p>
  
  <pre><code># Runs rule 'my_binary' and then *only* runs rule '/very/long/path/my_binary'
  # if the rule '/very/long/path/my_binary' needs updating.
  make my_binary
  </code></pre>
  
  <p>However, this does not work well when the alias <code>my_binary</code> is listed as a dependency:</p>
  
  <pre><code># *Always* thinks that rule 'data1' needs updating, because it always thinks that
  # the .PHONY target 'my_binary' "needs updating". As a result, 'data1' is
  # rebuilt every time.
  make /very/long/path/my_binary
  </code></pre>
  
  <h2>Possible hack?</h2>
  
  <p>A possible hack is to use an empty target as suggested in <a href="https://stackoverflow.com/a/20722034/286731" title="Makefile dependencies don&#39;t work for phony target">an answer to this question</a>, but that would require introducing fake files with names corresponding to the alias:</p>
  
  <pre><code>my_binary: /very/long/path/my_binary
      touch my_binary
  </code></pre>
  
  <p>This will clutter the main directory with files! Placing the fake files in a sub-directory would defeat the purpose, as the alias would have to be referred to as 'directory/my_binary'</p>