title: Concurrent assignment to a non-net is not permitted
body: <p>I'm making module that make results according to cmd using 4 32-bit adder.
  if cmd is 0, dout0 = a0+b0, and other dout is zero
  if cmd is 1, dout1 = a1+b1 and other dout is zero.
  if cmd is 2 or 3 likewise.
  and if cmd is 4 dout0,1,2,3 makes former results.</p>
  <p>The error message is:</p>
  <blockquote>
  <p>ERROR - VRFC 10-529 concurrent assignment to a non-net dout0 is not
  permitted ~/sim_1/new/adder_array.v:63</p>
  </blockquote>
  <p>Why does this error happen, and how can I solve this problem?</p>
  <p>here are code v.23~69.</p>
  <pre><code>module adder_array(
   cmd,
   ain0, ain1, ain2, ain3,
   bin0, bin1, bin2, bin3,
   dout0, dout1, dout2, dout3,
   overflow);
  
  input [2:0] cmd;
  input [31:0] ain0, ain1, ain2, ain3;
  input [31:0] bin0, bin1, bin2, bin3;
  output reg [31:0] dout0, dout1, dout2, dout3;
  output [3:0] overflow;
  
  wire [31:0] a[3:0];
  wire [31:0] b[3:0];
  wire [31:0] d[3:0];
  wire ovf[3:0];
  
  assign {a[0],a[1],a[2],a[3]} = {ain0,ain1,ain2,ain3};
  assign {b[0],b[1],b[2],b[3]} = {bin0,bin1,bin2,bin3};
  assign overflow = {ovf[3], ovf[2], ovf[1], ovf[0]};
  
  parameter size = 4;
  
  genvar i;
  generate for(i = 0 ; i &lt; size - 1 ; i = i + 1)
  begin:adder
      if (i == 0) begin
       my_add adder(.ain(a[0]), .bin(b[0]), .dout(d[0]), .overflow(ovf[0]));
        end
      else if (i == size - 1 ) begin
        my_add adder(.ain(a[i]), .bin(b[i]), .dout(d[i]), .overflow(ovf[i]));
        end
      else begin
        my_add adder(.ain(a[i]), .bin(b[i]), .dout(d[i]), .overflow(ovf[i]));
        end
  end
  endgenerate
  
  assign dout0 = (cmd == 0 || cmd == 4) ? d[0] : 0;
  assign dout1 = (cmd == 1 || cmd == 4) ? d[1] : 0;
  assign dout2 = (cmd == 2 || cmd == 4) ? d[2] : 0;
  assign dout3 = (cmd == 3 || cmd == 4) ? d[3] : 0;
  
  endmodule
  </code></pre>