title: C++ makefile building multiple dll and project structuring
body: <p>I have tried searching for an answer but to no avail, so given that my project has got the following structure</p>
  
  <pre><code>makefile
  ./src
     strings.cpp
     networking.cpp
  ./bin
     strings.dll
     networking.dll
  ./build
     strings.o
     networking.o
  ./include
     strings.h
     networking.h
  ./lib
     boost
  </code></pre>
  
  <p>I am very new to Makefiles and from the research I have done so far I have managed to get this together (not very complicated, I know)</p>
  
  <pre><code>CC = g++ 
  SRC = src/strings.cpp
  OUT = bin/strings.dll
  OBJ = build/strings.o 
  INC= -I include
  
  all: strings.dll
  
  strings.dll: strings.o
      $(CC) -shared -o $(OUT) $(OBJ) 
  
  strings.o: $(SRC) 
      $(CC) $(INC) -DBDLL -c $(SRC) -o $(OBJ)
  </code></pre>
  
  <p>The issues/questions I have are </p>
  
  <p>1- It always goes through the whole compilation process, even when I have not changed the source code ? </p>
  
  <p>2- How could I make things more 'effective' ? I saw examples of people using wildcards and such, but I had difficulty following along. Could I use wildcards to begin with since I want separate dlls for each target ?</p>
  
  <p>3 - Lets say I introduced <code>algorithms.h and algorithms.cpp</code> what would be the recommended way of including that in the build ?</p>
  
  <p>Thanks for any help, really appreciate it</p>