title: How do I read an environment variable in Verilog/System Verilog?
body: <p>How do I read an environment variable in Verilog ? (Running on a VCS simulator)</p>
  
  <p>I am trying to accomplish</p>
  
  <pre><code>File=$fopen("$PATH/FileName","r");
  </code></pre>
  
  <p>$PATH is an environment variable.</p>