title: Detecting errors from compilation of vhdl files using vcom
body: <p>I'm trying to automate the compilation and simulation of a vhdl project in ModelSim. I'm using batch files and using the <code>vcom</code> and <code>vsim</code> commands to compile the VHDL files and simulate the testbenches, respectively.</p>
  
  <p>Because it's an automated process I'd like to detect when vcom encounters an error, if one exists, and if one exists copy the command's output into the command window into a text file, for later analysis.</p>
  
  <p>My current workflow looks something like:</p>
  
  <pre><code>vcom -work src -2008 ..\..\path\to\file\file_name_1.vhd
  vcom -work src -2008 ..\..\path\to\file\file_name_2.vhd
  vcom -work src -2008 ..\..\path\to\file\file_name_3.vhd
  </code></pre>
  
  <p>With each vcom command leading to the expected output (or similar). Ending with the number of Errors/Warnings:</p>
  
  <pre><code>-- Loading package STANDARD
  -- Loading package TEXTIO
  -- Loading package std_logic_1164
  -- Loading package NUMERIC_STD
  -- Compiling entity file_name
  -- Compiling architecture sim of file_name
  End time: 10:09:01 on Aug 14,2018, Elapsed time: 0:00:00
  Errors: 0, Warnings: 0
  </code></pre>
  
  <p>However in the case that there is an error, is there a condition or flag raised by vcom to see that an error has been raised?</p>
  
  <p>How would one ensure that when an error is raised the output of the vcom command, that led to the error, in the command window is logged into a separate text file?</p>
  
  <hr>
  
  <p>I've been using these docs for the <a href="https://www.microsemi.com/document-portal/doc_view/136364-modelsim-me-10-4c-command-reference-manual-for-libero-soc-v11-7" rel="nofollow noreferrer">Command Reference Manual</a> (even though I am using ModelSim PE 10.7). I've seen the <code>-error</code> option for vcom, although it doesn't seem applicable in this case.</p>