title: Is VHDL Turing complete?
body: <p>Is VHDL Turing complete? My understanding is that VHDL creates a register machine, and that register machines - without arbitrary RAM - aren't Turing complete.</p>
  
  <p>Is this accurate? For problems that can't be solved in register machines, is there a standard approach - use RAM outside the VHDL, and manage it via VHDL, for instance?</p>