title: Conflict Miss v/s Compulsory Miss
body: <p><strong>Compulsory miss</strong> occurs when the block is brought first time into the cache.</p>
  
  <p><strong>Conflict miss</strong> in the case of set associative or direct mapped block placement strategies, conflict misses occur when several blocks are mapped to the same set.</p>
  
  <p>Consider a 2 - way set associative cache memory with 4 sets and total 8 cache blocks (0 - 7) .Main memory has 64 blocks (0 - 63). If LRU policy is used for replacement and cache is initially empty then total number of conflict cache misses for the following sequence of memory block references is :
        0  5  9  13  7  0  15  25</p>
  
  <p><strong>My doubt is, will 13 and 25 cause only compulsory miss or compulsory &amp; conflict miss both?</strong> </p>