title: Makefile error, can't resolve include
body: <p>I'm working with a project using flex/bison and trying to compile it using make. The lex.yy.c, tab.c, tab.h from flex/bison are generated correctly and placed in the obj directory. However, there is an error when trying to compile the obj/lex.yy.c file and it cannot resolve an include to a file in the src/frontend directory. Any ideas where I am going wrong? Makefile and output included below.</p>
  
  <p>Makefile:</p>
  
  <pre><code>VPATH = src obj src/frontend src/interpreter
  SRCS = lex.yy.c C.tab.c symbol_table.c nodes.c print_ast.c interpreter.c main.c
  OBJS := $(SRCS:%.c=obj/%.o)
  INCLUDES = -Isrc -Iobj -Isrc/frontend -Isrc/interpreter
  CPPFLAGS = -Wall
  LDFLAGS = -Wall
  CC = gcc
  LEX = flex
  YACC = bison -d -t -v
  
  all: bin/mycc
  
  bin/mycc: $(OBJS)
      $(CC) -g $(LDFLAGS) $(INCLUDES) -o $@ $^
  
  obj/lex.yy.c: C.flex obj/C.tab.h
      $(LEX) -o $@ $&lt;
  
  obj/C.tab.c: C.y
      $(YACC) -o $@ $&lt;
  
  obj/C.tab.h: obj/C.tab.c
      @touch $@
  
  obj/%.o: src/%.c
      $(CC) -g $(CPPFLAGS) $(INCLUDES) -c $^
  
  clean: 
      rm $(OBJS) obj/lex.yy.c obj/C.tab.c obj/C.tab.h
  
  depend: 
      $(CC) -M $(SRCS) &gt; .deps
      cat Makefile .deps &gt; makefile
  </code></pre>
  
  <p>Output:</p>
  
  <pre><code>bison -d -t -v -o obj/C.tab.c src/frontend/C.y
  src/frontend/C.y: conflicts: 4 shift/reduce, 14 reduce/reduce
  src/frontend/C.y:248.11-53: warning: rule useless in parser due to conflicts: external_declaration: function_definition
  flex -o obj/lex.yy.c src/frontend/C.flex
  gcc  -Wall  -c -o obj/lex.yy.o obj/lex.yy.c
  src/frontend/C.flex:13:19: fatal error: token.h: No such file or directory
   #include "token.h"
                 ^
  compilation terminated.
  make: *** [obj/lex.yy.o] Error 1
  </code></pre>