title: trailing whitespace in Makefile variable
body: <p>The Makefile:    </p>
  
  <pre><code>#there is a whitespace after "/my/path/to"
  FOO = "/my/path/to"
  BAR = "dir"
  
  INCLUDE_DIRS = $(FOO)/$(BAR) "/another/path"
  
  INCLUDES = $(foreach dir,$(INCLUDE_DIRS),-I$(dir))
  
  all:
       @echo $(INCLUDES)
  </code></pre>
  
  <p>With Gnu make I expect my $(INCLUDES) to be:</p>
  
  <pre><code>-I/my/path/to/dir -I/another/path
  </code></pre>
  
  <p>However, if the line</p>
  
  <pre><code>FOO = "/my/path/to"
  </code></pre>
  
  <p>ends with a whitespace (which is a common "mistake"), variable FOO will contains the whitespace, and the resulting INCLUDES will contains three directories (the two firsts beeing the first one splitted):</p>
  
  <pre><code>-I/my/path/to -I/dir -I/another/path
  </code></pre>
  
  <p>The only solution I found is to use the strip function:  </p>
  
  <pre><code>FOO = $(strip "/my/path/to" )
  </code></pre>
  
  <p>But isn't there a more natural syntax, or any way to avoid this pitfall?</p>