title: How CPUs are based on CISC architectures work directly on memory?
body: <p>I learned about differences of CISC architectures and RISC architectures.</p>
  <p>As far as I know, RISC architecture is load-store architecture. So it consists of 3-step.</p>
  <ol>
  <li>Load (memory -&gt; register)</li>
  <li>operation (cpu with register)</li>
  <li>store (register -&gt; memory)</li>
  </ol>
  <p>I understand this process with five stages of datapath(instruction fetch, instruction decode, execution, memory access, write back)</p>
  <p>But I don't understand that CISC architecture that is register-memory architecture operates directly on memory.</p>
  <p>How CPUs are based on CISC architectures work directly on memory?</p>