title: Why does nasm use 0x89 when it assembles a MOV instruction between registers?
body: <p>Why does NASM use 0x89 opcode (137) when it assembles a <code>MOV</code> instruction between two registers?</p>
  
  <p>Here is an example of code assembled using NASM:</p>
  
  <pre><code>55      push ebp
  89E5    mov ebp, esp
  83EC04  sub esp, byte +0x4
  31C0    xor eax, eax
  C9      leave
  C3      ret
  </code></pre>
  
  <p>I wanted something like this:</p>
  
  <pre><code>55      push ebp
  8BEC    mov ebp, esp
  83EC04  sub esp, byte +0x4
  33C0    xor eax, eax
  C9      leave
  C3      ret
  </code></pre>
  
  <p>The reason I wanted 0x8B was: if you view the binary representation of the <code>MOV</code> instruction, it looks like this in NASM:</p>
  
  <pre><code>Opcode     Mod   Reg   R/M
  10001001   11    100   101 (89 E5)
  </code></pre>
  
  <p>The confusing part in this is that the reg operand is the second.</p>
  
  <p>The NASM syntax is this: <code>0x89 11 source_reg destination_reg</code><br>
  and the MOV instruction is <code>mov destination_reg, source_reg</code></p>