title: What is the "Early Transmit Interrupt" in the STM32F4x Ethernet MAC DMA status register?
body: <p>My FreeRTOS <strong>Ethernet driver</strong> pop-out a lot of "<em>Early transmit interrupt</em>" on my STM32F4x board. I did not find any explanation about this "abnormal" interrupt despite : </p>
  
  <blockquote>
    <p>Indicates that the packet to be transmitted was fully transferred into
    the FIFO</p>
  </blockquote>
  
  <p>So what's the problem ? It looks like everything is going well.
  What does it mean ?</p>
  
  <p>Datasheet <strong>STM32F401xx</strong> :</p>
  
  <blockquote>
    <p>Ethernet DMA status register (<strong>ETH_DMASR</strong>) <em>p.1228</em></p>
    
    <ul>
    <li>BIT 10 <strong>ETS</strong>: Early transmit status</li>
    </ul>
    
    <p>Ethernet DMA interrupt enable register (<strong>ETH_DMAIER</strong>) <em>p.1233</em></p>
    
    <ul>
    <li>BIT 10 <strong>ETIE</strong>: Early transmit interrupt enable</li>
    </ul>
  </blockquote>