title: page table walk in armv7 linux by S/W leads to which version of page table ARM PTE or Linux PTE
body: <p>My question is in <a href="http://lxr.free-electrons.com/source/arch/arc/mm/fault.c#L133" rel="nofollow">handle_mm_fault</a> function or any S/W page table walk.</p>
  
  <pre><code>pgd = pgd_offset(mm,address);
  pud = pud_offset (pgd,address);
  pmd = pmd_offset (pud,address);
  pte = pte_offset_map(pmd,address);
  </code></pre>
  
  <p>Will the final computed pte be the ARM or LINUX version? </p>
  
  <p>In armv7 supports 2 levels of page table; At the first level 4096 entries of each 4 bytes has an address for the second level. The second level has 256 entries of each 4 bytes. Linux has tweaked the page table to have 2048 entries of each 8 bytes in other words having two pointers to second level of page table having 512 entries placed contiguously. Linux PTE stored below these 512 ARM PTE.</p>
  
  <p>So I understand that page table walk through in S/W will leads to ARM PTE only, but that is not correct Linux always operates on Linux PTEs?</p>
  
  <p>Please tell me where I am wrong?</p>
  
  <p>I Got the answer.
   I understood that, all these macro will leads to the Linux PTE only  , since the  L2 level page table of 4kb size and from 0th offset the linux pte0 starts and 1024th offset linux pte1 starts. while calculating pte_index it mask the lower 12 bits of PMD value thus PMD will always point to the start of page and there are Linux PTE stored.  </p>