title: Avoiding running all makefiles after running make on a target
body: <p>I'm new to Make, and am trying to use it to automate a ml pipeline. I have defined two rules in two files: the first <code>Makefile</code> has file locations and a target to clean a dataset. The second one <code>Makefile.label.surv1</code> has a target to extract labels using a python script. Below is the code for both:</p>
  <p>Makefile</p>
  <pre><code>#--------------------------------------------------------------------------
  # Survival Analysis - Churn prediction top makefile
  #--------------------------------------------------------------------------
  
  # date of the snapshot to consider
  SNAP_TRN := 2019-06-18
  SNAP_TST := 2019-07-24
  
  # directories
  DIR_DATA := data
  DIR_BUILD := build
  DIR_FEATURE := $(DIR_BUILD)/feature
  DIR_METRIC := $(DIR_BUILD)/metric
  DIR_MODEL := $(DIR_BUILD)/model
  DIR_CONFIG := configs
  
  # data files for training and predict
  DATA_TRN := $(DIR_DATA)/processed/
  DATA_TST := $(DIR_DATA)/processed/
  
  # NOS feature selection
  FEATS := $(DIR_CONFIG)/featimp_churnvol.csv
  # Config files
  CONFIG_PANEL := $(DIR_CONFIG)/config_panel.yaml
  CONFIG_INPUT := $(DIR_CONFIG)/config_inpute.yaml
  
  # Generates a clean dataset (inputted and one hot encoded) and labels for train and test
  buildDataset: $(DATA_TRN) $(DATA_TST) $(CONFIG_PANEL) $(CONFIG_INPUT) $(FEATS)
      python src/buildDataset.py --train-file $&lt; \
                                 --test-file $(word 1, $^) \
                                 --config-panel $(word 2, $^) \
                                 --config-input $(word 3, $^) \
                                 --feats $(lastword $^)   
  </code></pre>
  <p>Makefile.label.surv1</p>
  <pre><code>#--------------------------------------------------------------------------
  # surv1: survival labels
  #--------------------------------------------------------------------------
  include Makefile
  
  
  FEATURE_NAME := surv1
  
  GRAN := weekly
  STUDY_DUR := 1
         
  Y_SURV_TRN := $(DIR_DATA)/survival/$(FEATURE_NAME)_train_$(SNAP_TRN)_$(GRAN)_$(STUDY_DUR).pkl
  Y_SURV_TST := $(DIR_DATA)/survival/$(FEATURE_NAME)_test_$(SNAP_TST)_$(GRAN)_$(STUDY_DUR).pkl
  
  $(Y_SURV_TRN) $(Y_SURV_TST): $(DATA_TRN) $(DATA_TST) $(CONFIG_PANEL) $(STUDY_DUR) $(GRAN)
      python ./src/generate_surv_labels.py --train-file $&lt; \
                                           --test-file $(word 1, $^) \
                                           --train-label-file $(Y_SURV_TRN) \
                                           --test-label-file $(Y_SURV_TST)\
                                           --config-panel $(word 2, $^) \
                                           --study-dur $(word 3, $^) \
                                           --granularity $(lastword $^)
  </code></pre>
  <p>So when I run <code>make -f Makefile.label.surv1</code>, it also re-runs the target <code>buildDataset</code>, which I don't want in this case. In this case I haven't made any changes to buildDataset so I don't understand why make re-runs this target... Is there anyway to prevent a target from re-running others?</p>