title: VHDL: Code to put a numeric value in a STD_LOGIC_VECTOR variable
body: <p>I would like to enter a number in a a variable of type STD_LOGIC_VECTOR but I have problems with the compiler.</p>
  
  <pre><code>signal cl_output_ChA :   STD_LOGIC_VECTOR (16-1 downto 0);
  
  cl_ouput_ChA &lt;= 111111111111111;
  </code></pre>
  
  <p>The compiler give me these two messages:</p>
  
  <ul>
  <li>The integer value of 111111111111111 is greater than integer'high.</li>
  <li>Type of cl_output_ChA is incompatible with type of 111111111111111.</li>
  </ul>
  
  <p>could anyone give me a proper code line to put in this variable a particular numeric value?
  Thank you so much.</p>