title: Undocumented 16-bit I/O addressing on Z80
body: <p>I notice from the Zilog datasheet on the Z80 that with the I/O (IN and OUT) group of instructions, the contents of various registers are often placed in the top 8 bits of the address bus (depending on the instruction), with the lower 8 bits selecting one of up to 256 theoretically connected devices.</p>
  
  <p>My question is what is the point of doing this with these upper 8 bits? I know some machines use this in someway related to decreasing decoding complexity, but are they seriously used for anything? I want to implement the instructions exactly as the Z80 suggests, but I don't see the point in implementing this behaviour as it is non-standard. This behaviour is described as undocumented, so on a 'Sega Master System' for example, will I get away with this? Many thanks.</p>
  
  <p>Regards,
  Phil Potter</p>