title: Is it possible to "unset" an environment variable in a Makefile?
body: <p>I'm using GNU make, and including a 3rd party library in a project that has a build system that goes berserk if <code>CFLAGS</code> is defined in the environment when it is called.  I like to have <code>CFLAGS</code> defined in my environment for other reasons.  The library's build is being invoked from another makefile, so that I say e.g.:</p>
  
  <p>3rdparty:
      <code>$(MAKE) -f Makefile.3rdparty</code></p>
  
  <p>But I would like to be sure that <code>CFLAGS</code> is unset when I invoke make on the 3rd party Makefile.  The nearest thing I can find is to say:</p>
  
  <p><code>CFLAGS:=</code></p>
  
  <p>But this still leaves <code>CFLAGS</code> set in the environment, it's just an empty string.  Apart 
  from doing something hideous like saying:</p>
  
  <p>3rdparty:
      <code>bash -c "unset CFLAGS; $(MAKE) -f Makefile.3rdparty"</code></p>
  
  <p>Is there an easy way to "unset" the <code>CFLAGS</code> variable from within my primary makefile, so that it isn't present at all in the environment when the third party library is invoked?</p>