def fmt_wait4_ret(ignored_regno):
    try:
        cpu = SIM_current_processor()
        s = "%d" % SIM_read_register(cpu, r0 + 8)
        statusp = SIM_read_register(cpu, r0 + 33)
        rusagep = SIM_read_register(cpu, r0 + 35)
        if statusp != 0:
            try:
                statusp = SIM_logical_to_physical(cpu, 1, statusp)
                status = SIM_read_phys_memory(cpu, statusp, 2)
                s += " status: %d" % ((status & 0xff00) >> 8)
                if status & 0xf7:
                    s += " signal(%d)" % (status & 0xf7)
            except:
                s += " status: <not in tlb>"
        return s
    except:
        traceback.print_exc()