def test_bitfield_all_but_msb(self):
        a = pyrtl.Const(0, 8)
        pyrtl.probe(pyrtl.bitfield_update(a, None, -1, 0b101110), 'out')
        sim = pyrtl.Simulation()
        sim.step({})
        self.assertEqual(sim.inspect('out'), 0b0101110)