{"push_id":2622990757,"size":16,"distinct_size":3,"ref":"refs/heads/adrv9009_throughput","head":"7b855b5174febe82444112c56b30e7a0e70ad759","before":"2e559965d0edfbc3979d040c7728c503e4abdda4","commits":[{"sha":"5a257ce3c53011e3681c415d208d105fc8be3023","author":{"name":"Istvan Csomortani","email":"63ee0ea55429b66b1576546242ad12d65bccc344@analog.com"},"message":"fmcomms5: Delete unused GPIO lines from system top\n\nIn the system top of the FMCOMMS5 projects, there are several GPIO lines, which\ncan not find in the constraint file, respectively gpio_open_15_15,\ngpio_open_44_44 and gpio_45_45.\n\nThese are floating GPIO pins, as their names suggest. Delete all these wires and\nupdate IOBUF instances.","distinct":false,"url":"https://api.github.com/repos/analogdevicesinc/hdl/commits/5a257ce3c53011e3681c415d208d105fc8be3023"},{"sha":"bcba21da710a251bd2e7d748e1ccaa3a6485406c","author":{"name":"Laszlo Nagy","email":"c91de85e32f6ba15b4dc3060cec24a18ebdfd9ef@analog.com"},"message":"zcu102: updated IOSTANDARD of Bank 44 IOs to match VCCO 3.3V","distinct":false,"url":"https://api.github.com/repos/analogdevicesinc/hdl/commits/bcba21da710a251bd2e7d748e1ccaa3a6485406c"},{"sha":"682895c7ae29c159f1627e3e6a097f888857ae4d","author":{"name":"Lars-Peter Clausen","email":"3318dc5ce3e4fb7c28a0b841b6801c884e1d0896@metafoo.de"},"message":"axi_dmac: dest_axi_stream: Remove outdated comment\n\nThis comment hasn't been true in a long long time. It does not have any\nrelation to the code around it anymore.\n\nSo just remove it.\n\nSigned-off-by: Lars-Peter Clausen <lars@metafoo.de>","distinct":false,"url":"https://api.github.com/repos/analogdevicesinc/hdl/commits/682895c7ae29c159f1627e3e6a097f888857ae4d"},{"sha":"15b0e38e23a46c74b6dd178c2d92f39272c6e83e","author":{"name":"Lars-Peter Clausen","email":"3318dc5ce3e4fb7c28a0b841b6801c884e1d0896@metafoo.de"},"message":"axi_dmac: List valid store-and-forward memory sizes\n\nFor correct operation the store-and-forward memory size must be a\npower-of-two in the range of 2 to 32.\n\nThis is simple enough so we can list all values and let the IP Integrator\nand QSYS perform proper validation of the parameter.\n\nSigned-off-by: Lars-Peter Clausen <lars@metafoo.de>","distinct":false,"url":"https://api.github.com/repos/analogdevicesinc/hdl/commits/15b0e38e23a46c74b6dd178c2d92f39272c6e83e"},{"sha":"b18b16fd3ab22f69a27c9e993321efe1173f7e93","author":{"name":"Lars-Peter Clausen","email":"3318dc5ce3e4fb7c28a0b841b6801c884e1d0896@metafoo.de"},"message":"axi_dmac: Use a more descriptive label for the store-and-forward memory size\n\nThe label for the store-and-forward memory size configuration option at the\nmoment is just \"FIFO Size\" and while the store-and-forward memory uses a\nFIFO that is just a implementation detail.\n\nChange the label to \"Store-and-Forward Memory Size\". This is more\ndescriptive as it references the function not the implementation.\n\nSigned-off-by: Lars-Peter Clausen <lars@metafoo.de>","distinct":false,"url":"https://api.github.com/repos/analogdevicesinc/hdl/commits/b18b16fd3ab22f69a27c9e993321efe1173f7e93"},{"sha":"cf5208122ae808841fec99eab3627315bad7032e","author":{"name":"Lars-Peter Clausen","email":"3318dc5ce3e4fb7c28a0b841b6801c884e1d0896@metafoo.de"},"message":"axi_dmac: Increase default store-and-forward memory size to 8 bursts\n\nA larger store-and-forward memory provides better protection against worst\ncase memory interface latencies by being able to store more data before\nover-/underflowing.\n\nBased on empirical testing it was found that using a size of 4 bursts can\nstill result in underflows/overflows under certain conditions. These do not\nhappen when using a size of 8 bursts.\n\nThis change does not significantly increase resource consumption. Both on\nIntel and Xilinx the block RAM has a minimum depth of 512 entries. With a\ndefault burst length of 16 beats that allows for up to 32 bursts without\nrequiring additional block RAM.\n\nSigned-off-by: Lars-Peter Clausen <lars@metafoo.de>","distinct":false,"url":"https://api.github.com/repos/analogdevicesinc/hdl/commits/cf5208122ae808841fec99eab3627315bad7032e"},{"sha":"67600f9831bde6fb9242628fb333adc9d2c4acac","author":{"name":"Lars-Peter Clausen","email":"3318dc5ce3e4fb7c28a0b841b6801c884e1d0896@metafoo.de"},"message":"axi_dmac: Use localparam instead of parameter\n\nXilinx tools don't allow to use $clog2() when computing the value of a\nlocalparam, even though it is valid Verilog.\n\nFor this reason a parameter was used for BYTES_PER_BURST_WIDTH so far. But\nthat generates warnings from both Quartus and Vivado since the parameter is\nnot part of the parameter list.\n\nFix this by changing it to a localparam and computing the log2() manually.\nThe upper limit for the burst length is known to be 4k, so values larger\nthan that don't have to be supported.\n\nSigned-off-by: Lars-Peter Clausen <lars@metafoo.de>","distinct":false,"url":"https://api.github.com/repos/analogdevicesinc/hdl/commits/67600f9831bde6fb9242628fb333adc9d2c4acac"},{"sha":"6b7a46410c13013c647467247ee7ad028fcf18fc","author":{"name":"Lars-Peter Clausen","email":"3318dc5ce3e4fb7c28a0b841b6801c884e1d0896@metafoo.de"},"message":"axi_dmac: address_generator: Remove resets from data path\n\nThere is no need to reset the data path in the address generator. The\nvalues of the register on the data path are not used until they have been\nexplicitly initialized. Removing the reset simplifies the structure and\nreduces the fan-out of the reset signal.\n\nSigned-off-by: Lars-Peter Clausen <lars@metafoo.de>","distinct":false,"url":"https://api.github.com/repos/analogdevicesinc/hdl/commits/6b7a46410c13013c647467247ee7ad028fcf18fc"},{"sha":"6bc1eae48d933701833b93fb811fcea07607ecd2","author":{"name":"Lars-Peter Clausen","email":"3318dc5ce3e4fb7c28a0b841b6801c884e1d0896@metafoo.de"},"message":"axi_dmac: 2d_transfer: Remove resets from data path\n\nThe data path register of the 2d_transfer module are qualified by the\ncorresponding valid signal. Their content is not used until they have been\nexplicitly initialized. There is no need to reset them explicitly.\n\nThis reduces the fan-out of the reset signal.\n\nSigned-off-by: Lars-Peter Clausen <lars@metafoo.de>","distinct":false,"url":"https://api.github.com/repos/analogdevicesinc/hdl/commits/6bc1eae48d933701833b93fb811fcea07607ecd2"},{"sha":"8b8df70df10689cb8c52bed67af1dc487afeca0f","author":{"name":"Lars-Peter Clausen","email":"3318dc5ce3e4fb7c28a0b841b6801c884e1d0896@metafoo.de"},"message":"axi_dmac: request_generator: Remove reset from data path\n\nThe burst_count signal and its derived signals are not used until the\nburst_count has been explicitly initialized by loading a transfer. There is\nno need to have a reset.\n\nThis reduces the fan-out of the reset signal.\n\nSigned-off-by: Lars-Peter Clausen <lars@metafoo.de>","distinct":false,"url":"https://api.github.com/repos/analogdevicesinc/hdl/commits/8b8df70df10689cb8c52bed67af1dc487afeca0f"},{"sha":"80e7ba56a85538aa4b9ccfe7436a27e40138b827","author":{"name":"Lars-Peter Clausen","email":"3318dc5ce3e4fb7c28a0b841b6801c884e1d0896@metafoo.de"},"message":"axi_dmac: Revert EOT memory to FIFO structure\n\nThis reverts commit 4b1d9fc86b76 \"axi_dmac: Modified in order to avoid\nvivado crash\".\n\nVivado no longer crashes and this structure is much more efficient when it\ncomes to resource usage and timing. The intention here is to create a 1-bit\nmemory that is N entries deep and not a N bit signal.\n\nSigned-off-by: Lars-Peter Clausen <lars@metafoo.de>","distinct":false,"url":"https://api.github.com/repos/analogdevicesinc/hdl/commits/80e7ba56a85538aa4b9ccfe7436a27e40138b827"},{"sha":"deb366d169182096b9f3651bb9173dcc75664241","author":{"name":"Istvan Csomortani","email":"63ee0ea55429b66b1576546242ad12d65bccc344@analog.com"},"message":"daq2|3: Set up OPTIMIZATION_MODE to improve timing\n\nThere are random timing violations on the A10GX board using the\nDAQ3 and DAQ2 projects.\n\nSetting the synthesis/implementation strategy to \"HIGH PERFORMANCE\nEFFORT\" increases the success rate of the timing closure significantly.","distinct":false,"url":"https://api.github.com/repos/analogdevicesinc/hdl/commits/deb366d169182096b9f3651bb9173dcc75664241"},{"sha":"965d3b4c79384650ca40ba9494500a57e3dad0f7","author":{"name":"Lars-Peter Clausen","email":"3318dc5ce3e4fb7c28a0b841b6801c884e1d0896@metafoo.de"},"message":"util_cdc: Silence warnings about unused sequential logic\n\nSome parts of the util_cdc library rely on dead logic elimination to remove\nunused logic. Unfortunately with newer Vivado versions this results in\nwarnings about unused sequential elements being removed. Like:\n\n\tWARNING: [Synth 8-6014] Unused sequential element cdc_sync_stage1_reg was removed.\n\nTo avoid this encase the logic in generate blocks that makes sure they are\nnot generated when not needed.\n\nSigned-off-by: Lars-Peter Clausen <lars@metafoo.de>","distinct":false,"url":"https://api.github.com/repos/analogdevicesinc/hdl/commits/965d3b4c79384650ca40ba9494500a57e3dad0f7"},{"sha":"57804aef196d810409cc5f6e9d890792426b790b","author":{"name":"Adrian Costina","email":"ca19502421e709dbb6a6a362b3a7b73e8a060cd7@analog.com"},"message":"adrv9009: Increase DMA FIFO sizes","distinct":true,"url":"https://api.github.com/repos/analogdevicesinc/hdl/commits/57804aef196d810409cc5f6e9d890792426b790b"},{"sha":"4ad0febb67a3dbbd353caa69dc8edee8d40351d6","author":{"name":"Adrian Costina","email":"ca19502421e709dbb6a6a362b3a7b73e8a060cd7@analog.com"},"message":"adrv9009: Reduced DAC FIFO size, as it's not useful for real applications and the memory can be used in other parts of the design","distinct":true,"url":"https://api.github.com/repos/analogdevicesinc/hdl/commits/4ad0febb67a3dbbd353caa69dc8edee8d40351d6"},{"sha":"7b855b5174febe82444112c56b30e7a0e70ad759","author":{"name":"Adrian Costina","email":"ca19502421e709dbb6a6a362b3a7b73e8a060cd7@analog.com"},"message":"adrv9009: Increase sys_dma_clk to 325MHz. At 333 MHz, there are timing violations","distinct":true,"url":"https://api.github.com/repos/analogdevicesinc/hdl/commits/7b855b5174febe82444112c56b30e7a0e70ad759"}]}
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