{"push_id":2794687850,"size":49,"distinct_size":49,"ref":"refs/heads/master","head":"f65b82ffbe3400af1d674a8afa48b2be6faa1c2a","before":"8fee226da36f799e69041b2ab381064693199c7f","commits":[{"sha":"3fa48f0a1afb5f9eae5e8a701b836befb98649db","author":{"name":"Jagdish Gediya","email":"af43c34a4a6c2873e15d75d386c55e0b6f0d5315@nxp.com"},"message":"board: freescale: ls1012ardb: Add command to switch QSPI bank\n\nAdd command \"boot_bank X\" to switch the boot bank to either 1 or 2.\n\nSigned-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/3fa48f0a1afb5f9eae5e8a701b836befb98649db"},{"sha":"e784cf1bf2a1fca2667198eea0d8031ae0ceeaf3","author":{"name":"Brendan Shanks","email":"407f2d25c5e92c0d6603930cec5982d403f0bc45@teradek.com"},"message":"arm: ls102xa: Fix RGMII phy-connection-type FDT fixup\n\nIn ft_fixup_enet_phy_connect_type(), use strlen() instead of sizeof()\non the pointer result of phy_string_for_interface(). sizeof() was\nreturning the size of the pointer (4 bytes), resulting in the\nphy-connection-type being set to \"rgmi\" rather than \"rgmii-id\".\n\nSigned-off-by: Brendan Shanks <brendan.shanks@teradek.com>\nCc: York Sun <york.sun@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/e784cf1bf2a1fca2667198eea0d8031ae0ceeaf3"},{"sha":"b2486b40dce98ca26bcb6e1dda69efb1b0443b9a","author":{"name":"Vinitha V Pillai","email":"f22ff4cd702b3b7450872b705d3b0d938551e695@nxp.com"},"message":"Board: ls1088ardb: Enable PCIe config for Secure boot defconfigs\n\nSigned-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/b2486b40dce98ca26bcb6e1dda69efb1b0443b9a"},{"sha":"6ce83fb3d6ac1cd25772b3c8c1265afbfa42f718","author":{"name":"Joakim Tjernlund","email":"8a3fe7c43a9c94258eaf74b4c9dca102c9d594a1@infinera.com"},"message":"FSL PCI: Configure PCIe reference ratio\n\nMost FSL PCIe controllers expects 333 MHz PCI reference clock.\nThis clock is derived from the CCB but in many cases the ref.\nclock is not 333 MHz and a divisor needs to be configured.\n\nThis adds PEX_CCB_DIV #define which can be defined for each\ntype of CPU/platform.\n\nSigned-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/6ce83fb3d6ac1cd25772b3c8c1265afbfa42f718"},{"sha":"c022ec039d3f32a153a1f7d3b1ffe3dd548d9be4","author":{"name":"Pankaj Bansal","email":"73f661b05869424e1b59846fd4222a1235aa696e@nxp.com"},"message":"fsl/mc: Limit the ethernet name to ETH_NAME_LEN\n\nThe ethernet name should be within the ETH_NAME_LEN, as this\nis the buffer space allocated to ethernet name.\n\nOtherwise, this causes buffer overflow.\n\nReported-by: Ioana Ciornei <ioana.ciornei@nxp.com>\nSigned-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/c022ec039d3f32a153a1f7d3b1ffe3dd548d9be4"},{"sha":"1666fa587bfaa5ab72ea7bb9e2a811494c2a3e7b","author":{"name":"Pankaj Bansal","email":"73f661b05869424e1b59846fd4222a1235aa696e@nxp.com"},"message":"net: Increase ethernet name string size to 20 chars\n\nThe 16 char ethernet name size is inadequate to hold the name of ethernet\nname \"DPMAC17@rgmii-id\", which is a valid name in LX2160AQDS/LX2160ARDB.\n\nTherefore, increase the name string size to 20 chars.\n\nReported-by: Ioana Ciornei <ioana.ciornei@nxp.com>\nSuggested-by: Ioana Ciocoi Radulescu <ruxandra.radulescu@nxp.com>\nSigned-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/1666fa587bfaa5ab72ea7bb9e2a811494c2a3e7b"},{"sha":"fa0706ef92dc680f16b96659f1177822a3335bb4","author":{"name":"Laurentiu Tudor","email":"2d257793a980026cc12ac069aa3ec1adccc0c30e@nxp.com"},"message":"armv8: fsl-layerscape: add missing register blocks base address defines\n\nAdd defines for the edma and qdma register block base addresses.\n\nReviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>\nSigned-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/fa0706ef92dc680f16b96659f1177822a3335bb4"},{"sha":"5bdfdb7d4fc23fdc458c0f51fe39f0b9c47a2744","author":{"name":"Laurentiu Tudor","email":"2d257793a980026cc12ac069aa3ec1adccc0c30e@nxp.com"},"message":"armv8: ls1046a: advertise QMan v3 in configuration\n\nThe QMan IP block in this SoC is version 3.2 so advertise\nthis in the SoC configuration header.\n\nReviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>\nSigned-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/5bdfdb7d4fc23fdc458c0f51fe39f0b9c47a2744"},{"sha":"92d2e89c8c44a8f41d5f296e46c9cd6c9b34e4f8","author":{"name":"Laurentiu Tudor","email":"2d257793a980026cc12ac069aa3ec1adccc0c30e@nxp.com"},"message":"misc: fsl_portals: setup QMAN_BAR{E} also on ARM platforms\n\nQMAN_BAR{E} register setup was disabled on ARM platforms, however the\nregister does need to be set. Enable the code also on ARMs and fix the\nCONFIG_SYS_QMAN_MEM_PHYS define to the correct value so that the newly\nenabled code works.\n\nReviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>\nSigned-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/92d2e89c8c44a8f41d5f296e46c9cd6c9b34e4f8"},{"sha":"703d18f7fe0186ef7e30820030d5e5edd7123f97","author":{"name":"Laurentiu Tudor","email":"2d257793a980026cc12ac069aa3ec1adccc0c30e@nxp.com"},"message":"armv8: fsl-layerscape: add missing debug stream ID\n\nAdd a define with a value for the missing debug stream ID.\n\nReviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>\nSigned-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/703d18f7fe0186ef7e30820030d5e5edd7123f97"},{"sha":"3cb4fe65f9e88c6cfea2fea5ca934acfa3c415b4","author":{"name":"Laurentiu Tudor","email":"2d257793a980026cc12ac069aa3ec1adccc0c30e@nxp.com"},"message":"armv8: ls1046a: initial icid setup support\n\nAdd infrastructure for ICID setup and device tree fixup on ARM\nplatforms. This include basic ICID setup for several devices.\n\nReviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>\nSigned-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/3cb4fe65f9e88c6cfea2fea5ca934acfa3c415b4"},{"sha":"599a97d49cee04aaa6c2c8cbecc4f47a7c088dbe","author":{"name":"Laurentiu Tudor","email":"2d257793a980026cc12ac069aa3ec1adccc0c30e@nxp.com"},"message":"armv8: ls1046a: add icid setup for qman portals\n\nAdd support for ICID setting of qman portals and the required device\ntree fixups. Also fix an endiness issue in portal setup code.\n\nSigned-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/599a97d49cee04aaa6c2c8cbecc4f47a7c088dbe"},{"sha":"b50ff5e1b67d140092c52e0b31d6c288573c7cb5","author":{"name":"Laurentiu Tudor","email":"2d257793a980026cc12ac069aa3ec1adccc0c30e@nxp.com"},"message":"armv8: ls1046a: setup fman ports ICIDs and device tree\n\nAdd support for ICID setting of fman ports and the required device\ntree fixups.\n\nReviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>\nSigned-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/b50ff5e1b67d140092c52e0b31d6c288573c7cb5"},{"sha":"5651f438f8ac566eb5fec7c1fe92a0282d459e60","author":{"name":"Laurentiu Tudor","email":"2d257793a980026cc12ac069aa3ec1adccc0c30e@nxp.com"},"message":"armv8: ls1046a: setup SEC ICIDs and fix up device tree\n\nAdd support for SEC ICID configuration and apply it for ls1046a.\nAlso add code to make the necessary device tree fixups.\n\nReviewed-by: Horia Geantă <horia.geanta@nxp.com>\nReviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>\nSigned-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/5651f438f8ac566eb5fec7c1fe92a0282d459e60"},{"sha":"1711add3dca291376072ec0c66b01023a3462daf","author":{"name":"Darwin Dingel","email":"c4c0233a70b9c15bf561324b30890e36d951f717@alliedtelesis.co.nz"},"message":"mtd: nand: fsl_ifc: Fix handling of bitflips in erased pages\n\nThis is a fix made for the fsl_ifc_nand driver on linux kernel by\nPavel Machek and is applied to uboot. It is currently on applied on\nlinux-mtd.\n\nhttps://patchwork.kernel.org/patch/9758117/\n\nIFC always raises ECC errors on erased pages. It is only ignored when\nthe buffer is checked for all 0xFF by is_blank(). The problem is a\nsingle bitflip will cause is_blank() and then mtd_read to fail. The fix\nmakes use of nand_check_erased_ecc_chunk() to check for empty pages\ninstead of is_blank(). This also makes sure that reads are made at ECC\npage size granularity to get a proper bitflip count. If the number of\nbitflips does not exceed the ECC strength, the page is considered empty\nand the bitflips will be corrected when data is sent to the higher\nlayers (e.g. ubi).\n\nSigned-off-by: Darwin Dingel <darwin.dingel@alliedtelesis.co.nz>\nCc: Pavel Machek <pavel@denx.de>\nCc: Scott Wood <oss@buserror.net>\nAcked-by: Pavel Machek <pavel@denx.de>\n[Kurt: Replaced dev_err by printf due to compiler warnings]\nTested-by: Kurt Kanzenbach <kurt@linutronix.de>\nSigned-off-by: Kurt Kanzenbach <kurt@linutronix.de>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/1711add3dca291376072ec0c66b01023a3462daf"},{"sha":"cd35855492aafc4076a634a6d748bffc9e26795e","author":{"name":"Ran Wang","email":"7ab5e639ae3d66b9f4e4dc1349246b3a922ca0e5@nxp.com"},"message":"armv8: layerscape: move ns_dev[] define from h to c file.\n\nMove ns_dev[] from header file to C file to avoid compiling warning\nwhen header file is included by others.\n\nSigned-off-by: Ran Wang <ran.wang_1@nxp.com>\n[YS: rewrite commit message]\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/cd35855492aafc4076a634a6d748bffc9e26795e"},{"sha":"9add5a4b75a01cc5f69b9d5f6b30443f2088d7d8","author":{"name":"Ran Wang","email":"7ab5e639ae3d66b9f4e4dc1349246b3a922ca0e5@nxp.com"},"message":"armv8: layerscape: Enable EHCI access for LS1012A\n\nProgram Central Security Unit (CSU) to grant access to USB 2.0\ncontroller.\n\nSigned-off-by: Ran Wang <ran.wang_1@nxp.com>\n[YS: rewrite commit message]\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/9add5a4b75a01cc5f69b9d5f6b30443f2088d7d8"},{"sha":"b8a1f47be3ab050090cd8625e580cf3c63e3ff53","author":{"name":"Tom Rini","email":"47764aff062bf9ebe98a2274b29052b74a9567e2@konsulko.com"},"message":"Merge git://git.denx.de/u-boot-fsl-qoriq","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/b8a1f47be3ab050090cd8625e580cf3c63e3ff53"},{"sha":"7a5fbfe64154c7474a9af2f3ff0a57ea2089fd87","author":{"name":"Igor Opaniuk","email":"ca782e5848fbe7ab0a250faa8ae33b643dd89a09@linaro.org"},"message":"avb2.0: add get_size_of_partition()\n\nImplement get_size_of_partition() operation,\nwhich is required by the latest upstream libavb [1].\n\n[1] https://android.googlesource.com/platform/external/avb/+/android-p-preview-5\n\nSigned-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>\nAcked-by: Andrew F. Davis <afd@ti.com>\nReviewed-by: Sam Protsenko <semen.protsenko@linaro.org>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/7a5fbfe64154c7474a9af2f3ff0a57ea2089fd87"},{"sha":"ca230b094e6379301eb06faeb0f4e868b238e0ed","author":{"name":"Heinrich Schuchardt","email":"2cd7bb605d542f55cc27b85da62ad2c96ce31039@gmx.de"},"message":"fs: fix typo 'dumm'\n\n%s/dumm /dummy /\n\nSigned-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>","distinct":true,"url":"https://api.github.com/repos/uniphier/u-boot/commits/ca230b094e6379301eb06faeb0f4e868b238e0ed"}]}
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