{"push_id":2660679091,"size":491,"distinct_size":2,"ref":"refs/heads/caf/3.10/caf/linux-next/master","head":"28b4446b10e0c3c70665edfad4af4cad4975e6ba","before":"42a0fd2e7b5f1c0130798e94285831d84035dbbf","commits":[{"sha":"1c6ccad8a4b110bac3f9ff6db954ab5a74c2e861","author":{"name":"Tina Zhang","email":"62198d639fa8e461845c7cb6bea9c787fde04863@intel.com"},"message":"drm/i915/gvt: Deliver guest cursor hotspot info\n\nGuest OS driver uses PV info registers to deliver cursor hotspot info\nto host. This patch is used to get cursor hotspot info from virtual\nregisters and deliver it to host userspace.\n\nv4->v5:\n- remove CI warning.\n\nv3->v4:\n- return UINT_MAX when x_hot/y_hot is invalid. (Zhenyu)\n- correct version.\n\nv2->v3:\n- add validate_hotspot(). (Zhenyu)\n\nv1->v2:\n- name as cursor_x_hot/cursor_y_hot. (Zhenyu)\n- use i915_reg_t definition instead of magic numbers. (Zhenyu)\n\nSigned-off-by: Tina Zhang <tina.zhang@intel.com>\nCc: Zhenyu Wang <zhenyuw@linux.intel.com>\nCc: Zhi Wang <zhi.a.wang@intel.com>\nCc: Gerd Hoffmann <kraxel@redhat.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/1c6ccad8a4b110bac3f9ff6db954ab5a74c2e861"},{"sha":"579e2f6d999991d2d2dd39c7185cba0a97137cee","author":{"name":"Chris Wilson","email":"711c73f64afdce07b7e38039a96d2224209e9a6c@chris-wilson.co.uk"},"message":"drm/i915/gvt: Use offsetofend() rather than offsetof + sizeof\n\nCompute the offset of the end of the crc32 field using offsetofend()\nrather than open-coding.\n\nSigned-off-by: Chris Wilson <chris@chris-wilson.co.uk>\nCc: Zhenyu Wang <zhenyuw@linux.intel.com>\nCc: Zhi Wang <zhi.a.wang@intel.com>\nReviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/579e2f6d999991d2d2dd39c7185cba0a97137cee"},{"sha":"f25a49ab8ab9c1b5587837c8a386b276403f315c","author":{"name":"Colin Xu","email":"0f9700d38502a5bc304aee5e9fcaccd684f96120@intel.com"},"message":"drm/i915/gvt: Use vgpu_lock to protect per vgpu access\n\nThe patch set splits out 2 small locks from the original big gvt lock:\n  - vgpu_lock protects per-vGPU data and logic, especially the vGPU\n    trap emulation path.\n  - sched_lock protects gvt scheudler structure, context schedule logic\n    and vGPU's schedule data.\n\nUse vgpu_lock to replace the gvt big lock. By doing this, the\nmmio read/write trap path, vgpu virtual event emulation and other\nvgpu related process, would be protected under per vgpu_lock.\n\nv9:\n  - Change commit author since the patches are improved a lot compared\n    with original version.\n    Original author: Pei Zhang <pei.zhang@intel.com>\n  - Rebase to latest gvt-staging.\nv8:\n  - Correct coding and comment style.\n  - Rebase to latest gvt-staging.\nv7:\n  - Remove gtt_lock since already proteced by gvt_lock and vgpu_lock.\n  - Fix a typo in intel_gvt_deactivate_vgpu, unlock the wrong lock.\nv6:\n  - Rebase to latest gvt-staging.\nv5:\n  - Rebase to latest gvt-staging.\n  - intel_vgpu_page_track_handler should use vgpu_lock.\nv4:\n  - Rebase to latest gvt-staging.\n  - Protect vgpu->active access with vgpu_lock.\n  - Do not wait gpu idle in vgpu_lock.\nv3: update to latest code base\nv2: add gvt->lock in function gvt_check_vblank_emulation\n\nPerformance comparison on Kabylake platform.\n  - Configuration:\n    Host: Ubuntu 16.04.\n    Guest 1 & 2: Ubuntu 16.04.\n\nglmark2 score comparison:\n  - Configuration:\n    Host: glxgears.\n    Guests: glmark2.\n+--------------------------------+-----------------+\n| Setup                          | glmark2 score   |\n+--------------------------------+-----------------+\n| unified lock, iommu=on         | 58~62 (avg. 60) |\n+--------------------------------+-----------------+\n| unified lock, iommu=igfx_off   | 57~61 (avg. 59) |\n+--------------------------------+-----------------+\n| per-logic lock, iommu=on       | 60~68 (avg. 64) |\n+--------------------------------+-----------------+\n| per-logic lock, iommu=igfx_off | 61~67 (avg. 64) |\n+--------------------------------+-----------------+\n\nlock_stat comparison:\n  - Configuration:\n    Stop lock stat immediately after boot up.\n    Boot 2 VM Guests.\n    Run glmark2 in guests.\n    Start perf lock_stat for 20 seconds and stop again.\n  - Legend: c - contentions; w - waittime-avg\n+------------+-----------------+-----------+---------------+------------+\n|            | gvt_lock        |sched_lock | vgpu_lock     | gtt_lock   |\n+ lock type; +-----------------+-----------+---------------+------------+\n| iommu set  | c     | w       | c  | w    | c    | w      | c   | w    |\n+------------+-------+---------+----+------+------+--------+-----+------+\n| unified;   | 20697 | 839     |N/A | N/A  | N/A  | N/A    | N/A | N/A  |\n| on         |       |         |    |      |      |        |     |      |\n+------------+-------+---------+----+------+------+--------+-----+------+\n| unified;   | 21838 | 658.15  |N/A | N/A  | N/A  | N/A    | N/A | N/A  |\n| igfx_off   |       |         |    |      |      |        |     |      |\n+------------+-------+---------+----+------+------+--------+-----+------+\n| per-logic; | 1553  | 1599.96 |9458|429.97| 5846 | 274.33 | 0   | 0.00 |\n| on         |       |         |    |      |      |        |     |      |\n+------------+-------+---------+----+------+------+--------+-----+------+\n| per-logic; | 1911  | 1678.32 |8335|445.16| 5451 | 244.80 | 0   | 0.00 |\n| igfx_off   |       |         |    |      |      |        |     |      |\n+------------+-------+---------+----+------+------+--------+-----+------+\n\nSigned-off-by: Pei Zhang <pei.zhang@intel.com>\nSigned-off-by: Colin Xu <colin.xu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/f25a49ab8ab9c1b5587837c8a386b276403f315c"},{"sha":"9a512e23f173a3598709b74d6ccf9a6616403967","author":{"name":"Colin Xu","email":"0f9700d38502a5bc304aee5e9fcaccd684f96120@intel.com"},"message":"drm/i915/gvt: Use sched_lock to protect gvt scheduler logic.\n\nThe scheduler lock(gvt->sched_lock) is used to protect gvt\nscheduler logic, including the gvt scheduler structure(gvt->scheduler\nand per vgpu schedule data(vgpu->sched_data, vgpu->sched_ctl).\n\nv9:\n  - Change commit author since the patches are improved a lot compared\n    with original version.\n    Original author: Pei Zhang <pei.zhang@intel.com>\n  - Rebase to latest gvt-staging.\nv8:\n  - Correct coding wqstyle.\n  - Rebase to latest gvt-staging.\nv7:\n  - Remove gtt_lock since already proteced by gvt_lock and vgpu_lock.\nv6:\n  - Rebase to latest gvt-staging.\nv5:\n  - Rebase to latest gvt-staging.\nv4:\n  - Rebase to latest gvt-staging.\nv3: update to latest code base\n\nSigned-off-by: Pei Zhang <pei.zhang@intel.com>\nSigned-off-by: Colin Xu <colin.xu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/9a512e23f173a3598709b74d6ccf9a6616403967"},{"sha":"0766e2efc6968179ceec9828caf740ec0ac58a15","author":{"name":"Zhenyu Wang","email":"2be145655f058b1e18fb2a9466bd2b1b12e2cd7e@linux.intel.com"},"message":"Merge tag 'drm-intel-next-2018-06-06' into gvt-next\n\nBackmerge for recent request->hw_context change and\nnew vGPU huge page capability definition.\n\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/0766e2efc6968179ceec9828caf740ec0ac58a15"},{"sha":"1f1c60d5b577377d07863f3e0891e63a0a56a3ad","author":{"name":"Xinyun Liu","email":"7ead7b046ee33a2721fe1bc9ce0ddf0382e90f48@intel.com"},"message":"drm/i915/gvt: Avoid dereference a potential null pointer\n\nAdd sanity check for up_irq_info.\n\nSigned-off-by: Xinyun Liu <xinyun.liu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/1f1c60d5b577377d07863f3e0891e63a0a56a3ad"},{"sha":"659571953d315b36204acac508ef8d477044d260","author":{"name":"Xinyun Liu","email":"7ead7b046ee33a2721fe1bc9ce0ddf0382e90f48@intel.com"},"message":"drm/i915/gvt: removed unnecessary boundary check\n\ntype is already checked in the function entry. So it is unnecessary\nto check it again.\n\nSigned-off-by: Xinyun Liu <xinyun.liu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/659571953d315b36204acac508ef8d477044d260"},{"sha":"1417fad75cb4eddc8d50604be88ca9a8a8de4c71","author":{"name":"Xinyun Liu","email":"7ead7b046ee33a2721fe1bc9ce0ddf0382e90f48@intel.com"},"message":"drm/i915/gvt: use array to avoid potential buffer overflow\n\nArray 'pdp_pair' of size 1 may use index value(s) 1..7.\nChanged to pdps[8] to avoid confusion.\n\nSigned-off-by: Xinyun Liu <xinyun.liu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/1417fad75cb4eddc8d50604be88ca9a8a8de4c71"},{"sha":"2939db9e2879a1f80bcf863ccbd4919b3eef0d91","author":{"name":"Colin Xu","email":"0f9700d38502a5bc304aee5e9fcaccd684f96120@intel.com"},"message":"drm/i915/gvt: Add D_BXT device type define for BXT.\n\nBroxton belongs to GEN9 family so add to SKL and GEN9 plus.\n\nSigned-off-by: Colin Xu <colin.xu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/2939db9e2879a1f80bcf863ccbd4919b3eef0d91"},{"sha":"02b966c12b49ba6dae627c2135b7c1a258e32303","author":{"name":"Colin Xu","email":"0f9700d38502a5bc304aee5e9fcaccd684f96120@intel.com"},"message":"drm/i915/gvt: Add MEDIA_POOL_STATE for BXT.\n\nAs referred in PRM for Broxton Graphics on 01.org\n\nSigned-off-by: Colin Xu <colin.xu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/02b966c12b49ba6dae627c2135b7c1a258e32303"},{"sha":"6fa6616b8f7adaf8380d72e53733bc2472b0d157","author":{"name":"Colin Xu","email":"0f9700d38502a5bc304aee5e9fcaccd684f96120@intel.com"},"message":"drm/i915/gvt: Enable device info initialization for BXT.\n\nInitialize BXT device info as SKL/KBL.\n\nv2: All supported platforms share the same device configuration.\n    Remove the platform check by now and let is_supported_device()\n    be the gate keeper.\n\nSigned-off-by: Colin Xu <colin.xu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/6fa6616b8f7adaf8380d72e53733bc2472b0d157"},{"sha":"665004b8f50612d1e354eb9abd6d97e6eb85a619","author":{"name":"Colin Xu","email":"0f9700d38502a5bc304aee5e9fcaccd684f96120@intel.com"},"message":"drm/i915/gvt: Enable gtt initialization for BXT.\n\nInitialize BXT gtt as SKL/KBL.\n\nv2: All supported platforms share the same gtt ops.\n    Remove the platform check by now and let is_supported_device()\n    be the gate keeper.\n\nSigned-off-by: Colin Xu <colin.xu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/665004b8f50612d1e354eb9abd6d97e6eb85a619"},{"sha":"d0f827bb18fe2ceb39707718334b636b89be4af0","author":{"name":"Colin Xu","email":"0f9700d38502a5bc304aee5e9fcaccd684f96120@intel.com"},"message":"drm/i915/gvt: Enable irq initialization for BXT.\n\nInitialize BXT irq handler as SKL/KBL.\n\nv2: All supported platforms share the same irq ops and map.\n    Remove the platform check by now and let is_supported_device()\n    be the gate keeper.\n\nSigned-off-by: Colin Xu <colin.xu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/d0f827bb18fe2ceb39707718334b636b89be4af0"},{"sha":"a94cf2e0ef7fef5cb42ed96f73c18c3ad4f0d170","author":{"name":"Colin Xu","email":"0f9700d38502a5bc304aee5e9fcaccd684f96120@intel.com"},"message":"drm/i915/gvt: Enable mmio context init and switch for BXT.\n\nHandle pending tlb flush, mocs/mmio switch and context as KBL.\n\nSigned-off-by: Colin Xu <colin.xu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/a94cf2e0ef7fef5cb42ed96f73c18c3ad4f0d170"},{"sha":"f093f182ace9ce3c618c110e316cc1e22d0c9d3b","author":{"name":"Colin Xu","email":"0f9700d38502a5bc304aee5e9fcaccd684f96120@intel.com"},"message":"drm/i915/gvt: Enable cmd_parser support for BXT.\n\nHandle BXT cmd_parser as SKL/KBL.\n\nv2: All supported platforms share the same routines.\n    Remove the platform check by now and let is_supported_device()\n    be the gate keeper.\n\nSigned-off-by: Colin Xu <colin.xu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/f093f182ace9ce3c618c110e316cc1e22d0c9d3b"},{"sha":"47d9d3be5925688dfcc7407b0ae70013ba2dce2e","author":{"name":"Colin Xu","email":"0f9700d38502a5bc304aee5e9fcaccd684f96120@intel.com"},"message":"drm/i915/gvt: Enable force wake support for BXT.\n\nBXT forcewake is handled in the same way as SKL/KBL.\n\nv2: Add missing inhibit_context restore for BXT.\n\nSigned-off-by: Colin Xu <colin.xu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/47d9d3be5925688dfcc7407b0ae70013ba2dce2e"},{"sha":"72bad9972876933b3c428fcee122bb1dcbf8cf5a","author":{"name":"Colin Xu","email":"0f9700d38502a5bc304aee5e9fcaccd684f96120@intel.com"},"message":"drm/i915/gvt: Enable virtual display support for BXT.\n\nVirtual monitor on BXT start from port B.\nUnlike SKL/KBL, digital display port connectivity is detected via\nGEN8_DE_PORT_ISR so emulate monitor state change by setting it.\n\nSigned-off-by: Colin Xu <colin.xu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/72bad9972876933b3c428fcee122bb1dcbf8cf5a"},{"sha":"84eb04f6d77a824b33da11a08118ed2766038f13","author":{"name":"Colin Xu","email":"0f9700d38502a5bc304aee5e9fcaccd684f96120@intel.com"},"message":"drm/i915/gvt: Enable dma_buf support for BXT.\n\nHandle dma_buf on BXT as SKL and KBL.\n\nSigned-off-by: Colin Xu <colin.xu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/84eb04f6d77a824b33da11a08118ed2766038f13"},{"sha":"d71cb7129e7cf038ed1444781a50766e486bb2bd","author":{"name":"Colin Xu","email":"0f9700d38502a5bc304aee5e9fcaccd684f96120@intel.com"},"message":"drm/i915/gvt: Add mmio handler for for BXT.\n\nLeverage most SKL/KBL mmio init info and add different mmio to\nBXT specific function init_bxt_mmio_info().\n\nSigned-off-by: Colin Xu <colin.xu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/d71cb7129e7cf038ed1444781a50766e486bb2bd"},{"sha":"57c8a484a9cbf1315b5299702d12aef04867eeee","author":{"name":"Colin Xu","email":"0f9700d38502a5bc304aee5e9fcaccd684f96120@intel.com"},"message":"drm/i915: Enable KVMGT for BXT.\n\nEnable KVMGT for BXT.\nis_supported_device() acting as the gatekeeper of GVT-g init.\nIf all supported platforms share the same configurations for some\nspecific feature, platform check will rely on this check only.\n\nSigned-off-by: Colin Xu <colin.xu@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.18/commits/57c8a484a9cbf1315b5299702d12aef04867eeee"}]}
{"actor":{"display_login":"Jackeagle"}}